./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/ldv-linux-3.7.3/linux-3.10-rc1-43_1a-bitvector-drivers--atm--he.ko-ldv_main0_true-unreach-call.cil.out.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version aa418289 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_5868046e-448a-457a-b1ef-2b2df03b21ce/bin-2019/ukojak/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_5868046e-448a-457a-b1ef-2b2df03b21ce/bin-2019/ukojak/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_5868046e-448a-457a-b1ef-2b2df03b21ce/bin-2019/ukojak/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_5868046e-448a-457a-b1ef-2b2df03b21ce/bin-2019/ukojak/config/KojakReach.xml -i ../../sv-benchmarks/c/ldv-linux-3.7.3/linux-3.10-rc1-43_1a-bitvector-drivers--atm--he.ko-ldv_main0_true-unreach-call.cil.out.c -s /tmp/vcloud-vcloud-master/worker/working_dir_5868046e-448a-457a-b1ef-2b2df03b21ce/bin-2019/ukojak/config/svcomp-Reach-64bit-Kojak_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_5868046e-448a-457a-b1ef-2b2df03b21ce/bin-2019/ukojak --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Kojak --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash b000bec9d2bd1ef2193cecc6d4f1bb42d6cbc181 ......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_5868046e-448a-457a-b1ef-2b2df03b21ce/bin-2019/ukojak/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_5868046e-448a-457a-b1ef-2b2df03b21ce/bin-2019/ukojak/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_5868046e-448a-457a-b1ef-2b2df03b21ce/bin-2019/ukojak/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_5868046e-448a-457a-b1ef-2b2df03b21ce/bin-2019/ukojak/config/KojakReach.xml -i ../../sv-benchmarks/c/ldv-linux-3.7.3/linux-3.10-rc1-43_1a-bitvector-drivers--atm--he.ko-ldv_main0_true-unreach-call.cil.out.c -s /tmp/vcloud-vcloud-master/worker/working_dir_5868046e-448a-457a-b1ef-2b2df03b21ce/bin-2019/ukojak/config/svcomp-Reach-64bit-Kojak_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_5868046e-448a-457a-b1ef-2b2df03b21ce/bin-2019/ukojak --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Kojak --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash b000bec9d2bd1ef2193cecc6d4f1bb42d6cbc181 ...................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: IllegalArgumentException: Indexed Sort BitVec undefined --- Real Ultimate output --- This is Ultimate 0.1.23-aa41828 [2018-11-23 03:21:10,488 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 03:21:10,489 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 03:21:10,498 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 03:21:10,498 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 03:21:10,499 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 03:21:10,500 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 03:21:10,501 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 03:21:10,502 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 03:21:10,503 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 03:21:10,503 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 03:21:10,504 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 03:21:10,504 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 03:21:10,505 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 03:21:10,506 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 03:21:10,506 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 03:21:10,507 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 03:21:10,508 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 03:21:10,509 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 03:21:10,510 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 03:21:10,511 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 03:21:10,512 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 03:21:10,514 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 03:21:10,514 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 03:21:10,514 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 03:21:10,514 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 03:21:10,515 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 03:21:10,516 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 03:21:10,516 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 03:21:10,517 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 03:21:10,517 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 03:21:10,518 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 03:21:10,518 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 03:21:10,518 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 03:21:10,519 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 03:21:10,519 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 03:21:10,519 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_5868046e-448a-457a-b1ef-2b2df03b21ce/bin-2019/ukojak/config/svcomp-Reach-64bit-Kojak_Default.epf [2018-11-23 03:21:10,529 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 03:21:10,530 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 03:21:10,530 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 03:21:10,530 INFO L133 SettingsManager]: * ... to procedures called more than once=ALWAYS [2018-11-23 03:21:10,531 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 03:21:10,531 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 03:21:10,531 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 03:21:10,531 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-23 03:21:10,532 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 03:21:10,532 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 03:21:10,532 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 03:21:10,532 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 03:21:10,532 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 03:21:10,532 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 03:21:10,532 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 03:21:10,533 INFO L131 SettingsManager]: Preferences of CodeCheck differ from their defaults: [2018-11-23 03:21:10,533 INFO L133 SettingsManager]: * Timeout in seconds=1000000 [2018-11-23 03:21:10,533 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 03:21:10,533 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 03:21:10,533 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 [2018-11-23 03:21:10,533 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 03:21:10,534 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 03:21:10,534 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 03:21:10,534 INFO L133 SettingsManager]: * Trace refinement strategy=PENGUIN [2018-11-23 03:21:10,534 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 03:21:10,534 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-23 03:21:10,534 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 03:21:10,535 INFO L133 SettingsManager]: * To the following directory=dump/ Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_5868046e-448a-457a-b1ef-2b2df03b21ce/bin-2019/ukojak Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Kojak Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> b000bec9d2bd1ef2193cecc6d4f1bb42d6cbc181 [2018-11-23 03:21:10,558 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 03:21:10,565 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 03:21:10,570 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 03:21:10,571 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 03:21:10,572 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 03:21:10,572 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_5868046e-448a-457a-b1ef-2b2df03b21ce/bin-2019/ukojak/../../sv-benchmarks/c/ldv-linux-3.7.3/linux-3.10-rc1-43_1a-bitvector-drivers--atm--he.ko-ldv_main0_true-unreach-call.cil.out.c [2018-11-23 03:21:10,612 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_5868046e-448a-457a-b1ef-2b2df03b21ce/bin-2019/ukojak/data/8c42df423/8423710e7419483882b15ff31a23aa7d/FLAG8c9e15017 [2018-11-23 03:21:11,225 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 03:21:11,225 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_5868046e-448a-457a-b1ef-2b2df03b21ce/sv-benchmarks/c/ldv-linux-3.7.3/linux-3.10-rc1-43_1a-bitvector-drivers--atm--he.ko-ldv_main0_true-unreach-call.cil.out.c [2018-11-23 03:21:11,246 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_5868046e-448a-457a-b1ef-2b2df03b21ce/bin-2019/ukojak/data/8c42df423/8423710e7419483882b15ff31a23aa7d/FLAG8c9e15017 [2018-11-23 03:21:11,594 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_5868046e-448a-457a-b1ef-2b2df03b21ce/bin-2019/ukojak/data/8c42df423/8423710e7419483882b15ff31a23aa7d [2018-11-23 03:21:11,596 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 03:21:11,597 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 03:21:11,598 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 03:21:11,598 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 03:21:11,600 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 03:21:11,601 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 03:21:11" (1/1) ... [2018-11-23 03:21:11,602 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7f4c33c6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:21:11, skipping insertion in model container [2018-11-23 03:21:11,602 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 03:21:11" (1/1) ... [2018-11-23 03:21:11,608 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 03:21:11,682 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 03:21:12,853 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 03:21:12,866 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 03:21:13,098 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 03:21:13,244 INFO L195 MainTranslator]: Completed translation [2018-11-23 03:21:13,245 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:21:13 WrapperNode [2018-11-23 03:21:13,245 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 03:21:13,246 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 03:21:13,246 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 03:21:13,246 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 03:21:13,251 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:21:13" (1/1) ... [2018-11-23 03:21:13,292 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:21:13" (1/1) ... [2018-11-23 03:21:13,371 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 03:21:13,371 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 03:21:13,371 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 03:21:13,371 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 03:21:13,378 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:21:13" (1/1) ... [2018-11-23 03:21:13,378 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:21:13" (1/1) ... [2018-11-23 03:21:13,396 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:21:13" (1/1) ... [2018-11-23 03:21:13,397 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:21:13" (1/1) ... [2018-11-23 03:21:13,461 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:21:13" (1/1) ... [2018-11-23 03:21:13,474 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:21:13" (1/1) ... [2018-11-23 03:21:13,489 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:21:13" (1/1) ... [2018-11-23 03:21:13,505 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 03:21:13,506 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 03:21:13,506 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 03:21:13,506 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 03:21:13,506 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:21:13" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5868046e-448a-457a-b1ef-2b2df03b21ce/bin-2019/ukojak/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 [2018-11-23 03:21:13,541 INFO L130 BoogieDeclarations]: Found specification of procedure he_remove_one [2018-11-23 03:21:13,541 INFO L138 BoogieDeclarations]: Found implementation of procedure he_remove_one [2018-11-23 03:21:13,541 INFO L130 BoogieDeclarations]: Found specification of procedure msleep [2018-11-23 03:21:13,541 INFO L130 BoogieDeclarations]: Found specification of procedure remove_wait_queue [2018-11-23 03:21:13,541 INFO L130 BoogieDeclarations]: Found specification of procedure pci_bus_write_config_dword [2018-11-23 03:21:13,542 INFO L130 BoogieDeclarations]: Found specification of procedure pci_unregister_driver [2018-11-23 03:21:13,542 INFO L130 BoogieDeclarations]: Found specification of procedure __xchg_wrong_size [2018-11-23 03:21:13,542 INFO L130 BoogieDeclarations]: Found specification of procedure he_close [2018-11-23 03:21:13,542 INFO L138 BoogieDeclarations]: Found implementation of procedure he_close [2018-11-23 03:21:13,542 INFO L130 BoogieDeclarations]: Found specification of procedure dma_pool_alloc [2018-11-23 03:21:13,542 INFO L130 BoogieDeclarations]: Found specification of procedure get_current [2018-11-23 03:21:13,542 INFO L138 BoogieDeclarations]: Found implementation of procedure get_current [2018-11-23 03:21:13,542 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_lock [2018-11-23 03:21:13,543 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_lock [2018-11-23 03:21:13,543 INFO L130 BoogieDeclarations]: Found specification of procedure he_phy_get [2018-11-23 03:21:13,543 INFO L138 BoogieDeclarations]: Found implementation of procedure he_phy_get [2018-11-23 03:21:13,544 INFO L130 BoogieDeclarations]: Found specification of procedure pci_read_config_byte [2018-11-23 03:21:13,544 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_read_config_byte [2018-11-23 03:21:13,544 INFO L130 BoogieDeclarations]: Found specification of procedure pci_read_config_word [2018-11-23 03:21:13,544 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_read_config_word [2018-11-23 03:21:13,544 INFO L130 BoogieDeclarations]: Found specification of procedure ioremap_nocache [2018-11-23 03:21:13,544 INFO L130 BoogieDeclarations]: Found specification of procedure free_irq [2018-11-23 03:21:13,544 INFO L130 BoogieDeclarations]: Found specification of procedure __alloc_tpd [2018-11-23 03:21:13,544 INFO L138 BoogieDeclarations]: Found implementation of procedure __alloc_tpd [2018-11-23 03:21:13,544 INFO L130 BoogieDeclarations]: Found specification of procedure dma_set_mask [2018-11-23 03:21:13,544 INFO L130 BoogieDeclarations]: Found specification of procedure rate_to_atmf [2018-11-23 03:21:13,544 INFO L138 BoogieDeclarations]: Found implementation of procedure rate_to_atmf [2018-11-23 03:21:13,545 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2018-11-23 03:21:13,545 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2018-11-23 03:21:13,545 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_return_value [2018-11-23 03:21:13,545 INFO L130 BoogieDeclarations]: Found specification of procedure valid_dma_direction [2018-11-23 03:21:13,545 INFO L138 BoogieDeclarations]: Found implementation of procedure valid_dma_direction [2018-11-23 03:21:13,545 INFO L130 BoogieDeclarations]: Found specification of procedure suni_init [2018-11-23 03:21:13,545 INFO L130 BoogieDeclarations]: Found specification of procedure clear_bit [2018-11-23 03:21:13,545 INFO L138 BoogieDeclarations]: Found implementation of procedure clear_bit [2018-11-23 03:21:13,545 INFO L130 BoogieDeclarations]: Found specification of procedure he_phy_put [2018-11-23 03:21:13,545 INFO L138 BoogieDeclarations]: Found implementation of procedure he_phy_put [2018-11-23 03:21:13,545 INFO L130 BoogieDeclarations]: Found specification of procedure atm_pcr_goal [2018-11-23 03:21:13,545 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-11-23 03:21:13,545 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-11-23 03:21:13,545 INFO L130 BoogieDeclarations]: Found specification of procedure atm_dev_register [2018-11-23 03:21:13,546 INFO L130 BoogieDeclarations]: Found specification of procedure pci_bus_read_config_dword [2018-11-23 03:21:13,546 INFO L130 BoogieDeclarations]: Found specification of procedure pci_alloc_consistent [2018-11-23 03:21:13,546 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_alloc_consistent [2018-11-23 03:21:13,546 INFO L130 BoogieDeclarations]: Found specification of procedure debug_dma_unmap_page [2018-11-23 03:21:13,546 INFO L130 BoogieDeclarations]: Found specification of procedure debug_dma_alloc_coherent [2018-11-23 03:21:13,546 INFO L130 BoogieDeclarations]: Found specification of procedure INIT_LIST_HEAD [2018-11-23 03:21:13,546 INFO L138 BoogieDeclarations]: Found implementation of procedure INIT_LIST_HEAD [2018-11-23 03:21:13,546 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_return_value_probe [2018-11-23 03:21:13,546 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-11-23 03:21:13,546 INFO L130 BoogieDeclarations]: Found specification of procedure dma_pool_create [2018-11-23 03:21:13,546 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_unlock [2018-11-23 03:21:13,546 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_unlock [2018-11-23 03:21:13,546 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irqrestore [2018-11-23 03:21:13,546 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irqrestore [2018-11-23 03:21:13,546 INFO L130 BoogieDeclarations]: Found specification of procedure dma_pool_destroy [2018-11-23 03:21:13,547 INFO L130 BoogieDeclarations]: Found specification of procedure pci_unmap_single [2018-11-23 03:21:13,547 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_unmap_single [2018-11-23 03:21:13,547 INFO L130 BoogieDeclarations]: Found specification of procedure he_readl_internal [2018-11-23 03:21:13,547 INFO L138 BoogieDeclarations]: Found implementation of procedure he_readl_internal [2018-11-23 03:21:13,547 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 03:21:13,547 INFO L130 BoogieDeclarations]: Found specification of procedure dev_set_drvdata [2018-11-23 03:21:13,547 INFO L130 BoogieDeclarations]: Found specification of procedure iounmap [2018-11-23 03:21:13,547 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-11-23 03:21:13,547 INFO L130 BoogieDeclarations]: Found specification of procedure might_fault [2018-11-23 03:21:13,547 INFO L130 BoogieDeclarations]: Found specification of procedure pci_write_config_word [2018-11-23 03:21:13,547 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_write_config_word [2018-11-23 03:21:13,547 INFO L130 BoogieDeclarations]: Found specification of procedure tasklet_init [2018-11-23 03:21:13,547 INFO L130 BoogieDeclarations]: Found specification of procedure capable [2018-11-23 03:21:13,547 INFO L130 BoogieDeclarations]: Found specification of procedure pci_write_config_byte [2018-11-23 03:21:13,547 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_write_config_byte [2018-11-23 03:21:13,547 INFO L130 BoogieDeclarations]: Found specification of procedure kmalloc [2018-11-23 03:21:13,548 INFO L138 BoogieDeclarations]: Found implementation of procedure kmalloc [2018-11-23 03:21:13,548 INFO L130 BoogieDeclarations]: Found specification of procedure add_wait_queue [2018-11-23 03:21:13,548 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_handler_precall [2018-11-23 03:21:13,548 INFO L130 BoogieDeclarations]: Found specification of procedure debug_dma_free_coherent [2018-11-23 03:21:13,548 INFO L130 BoogieDeclarations]: Found specification of procedure _copy_from_user [2018-11-23 03:21:13,548 INFO L130 BoogieDeclarations]: Found specification of procedure pci_write_config_dword [2018-11-23 03:21:13,548 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_write_config_dword [2018-11-23 03:21:13,548 INFO L130 BoogieDeclarations]: Found specification of procedure get_dma_ops [2018-11-23 03:21:13,548 INFO L138 BoogieDeclarations]: Found implementation of procedure get_dma_ops [2018-11-23 03:21:13,548 INFO L130 BoogieDeclarations]: Found specification of procedure dev_get_drvdata [2018-11-23 03:21:13,549 INFO L130 BoogieDeclarations]: Found specification of procedure __raw_spin_lock_init [2018-11-23 03:21:13,549 INFO L130 BoogieDeclarations]: Found specification of procedure he_writel_internal [2018-11-23 03:21:13,549 INFO L138 BoogieDeclarations]: Found implementation of procedure he_writel_internal [2018-11-23 03:21:13,549 INFO L130 BoogieDeclarations]: Found specification of procedure he_ioctl [2018-11-23 03:21:13,549 INFO L138 BoogieDeclarations]: Found implementation of procedure he_ioctl [2018-11-23 03:21:13,549 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 03:21:13,549 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize [2018-11-23 03:21:13,553 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-11-23 03:21:13,554 INFO L130 BoogieDeclarations]: Found specification of procedure he_open [2018-11-23 03:21:13,554 INFO L138 BoogieDeclarations]: Found implementation of procedure he_open [2018-11-23 03:21:13,554 INFO L130 BoogieDeclarations]: Found specification of procedure __phys_addr [2018-11-23 03:21:13,554 INFO L130 BoogieDeclarations]: Found specification of procedure pci_bus_write_config_word [2018-11-23 03:21:13,554 INFO L130 BoogieDeclarations]: Found specification of procedure __tasklet_schedule [2018-11-23 03:21:13,554 INFO L130 BoogieDeclarations]: Found specification of procedure pci_bus_write_config_byte [2018-11-23 03:21:13,554 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_alloc_flags [2018-11-23 03:21:13,554 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_alloc_flags [2018-11-23 03:21:13,554 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-11-23 03:21:13,554 INFO L130 BoogieDeclarations]: Found specification of procedure list_add_tail [2018-11-23 03:21:13,555 INFO L138 BoogieDeclarations]: Found implementation of procedure list_add_tail [2018-11-23 03:21:13,555 INFO L130 BoogieDeclarations]: Found specification of procedure pci_free_consistent [2018-11-23 03:21:13,555 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_free_consistent [2018-11-23 03:21:13,555 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-23 03:21:13,555 INFO L130 BoogieDeclarations]: Found specification of procedure pci_disable_device [2018-11-23 03:21:13,555 INFO L130 BoogieDeclarations]: Found specification of procedure skb_pull [2018-11-23 03:21:13,555 INFO L130 BoogieDeclarations]: Found specification of procedure he_stop [2018-11-23 03:21:13,555 INFO L138 BoogieDeclarations]: Found implementation of procedure he_stop [2018-11-23 03:21:13,555 INFO L130 BoogieDeclarations]: Found specification of procedure pci_set_drvdata [2018-11-23 03:21:13,555 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_set_drvdata [2018-11-23 03:21:13,555 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__builtin_expect [2018-11-23 03:21:13,556 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__builtin_expect [2018-11-23 03:21:13,556 INFO L130 BoogieDeclarations]: Found specification of procedure dev_kfree_skb_any [2018-11-23 03:21:13,556 INFO L130 BoogieDeclarations]: Found specification of procedure __enqueue_tpd [2018-11-23 03:21:13,556 INFO L138 BoogieDeclarations]: Found implementation of procedure __enqueue_tpd [2018-11-23 03:21:13,556 INFO L130 BoogieDeclarations]: Found specification of procedure __list_add [2018-11-23 03:21:13,556 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~int~X~$Pointer$~TO~int [2018-11-23 03:21:13,556 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~int~X~$Pointer$~TO~int [2018-11-23 03:21:13,556 INFO L130 BoogieDeclarations]: Found specification of procedure atomic_inc [2018-11-23 03:21:13,556 INFO L138 BoogieDeclarations]: Found implementation of procedure atomic_inc [2018-11-23 03:21:13,556 INFO L130 BoogieDeclarations]: Found specification of procedure pci_enable_device [2018-11-23 03:21:13,557 INFO L130 BoogieDeclarations]: Found specification of procedure __const_udelay [2018-11-23 03:21:13,557 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-11-23 03:21:13,557 INFO L130 BoogieDeclarations]: Found specification of procedure pci_read_config_dword [2018-11-23 03:21:13,557 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_read_config_dword [2018-11-23 03:21:13,557 INFO L130 BoogieDeclarations]: Found specification of procedure __bad_percpu_size [2018-11-23 03:21:13,557 INFO L130 BoogieDeclarations]: Found specification of procedure _copy_to_user [2018-11-23 03:21:13,557 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_unlock_irqrestore [2018-11-23 03:21:13,557 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~int [2018-11-23 03:21:13,557 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~int [2018-11-23 03:21:13,558 INFO L130 BoogieDeclarations]: Found specification of procedure list_add [2018-11-23 03:21:13,558 INFO L138 BoogieDeclarations]: Found implementation of procedure list_add [2018-11-23 03:21:13,558 INFO L130 BoogieDeclarations]: Found specification of procedure atm_dev_deregister [2018-11-23 03:21:13,558 INFO L130 BoogieDeclarations]: Found specification of procedure debug_dma_map_page [2018-11-23 03:21:13,558 INFO L130 BoogieDeclarations]: Found specification of procedure warn_slowpath_null [2018-11-23 03:21:13,558 INFO L130 BoogieDeclarations]: Found specification of procedure __pci_register_driver [2018-11-23 03:21:13,558 INFO L130 BoogieDeclarations]: Found specification of procedure read_prom_byte [2018-11-23 03:21:13,558 INFO L138 BoogieDeclarations]: Found implementation of procedure read_prom_byte [2018-11-23 03:21:13,559 INFO L130 BoogieDeclarations]: Found specification of procedure readl [2018-11-23 03:21:13,559 INFO L138 BoogieDeclarations]: Found implementation of procedure readl [2018-11-23 03:21:13,559 INFO L130 BoogieDeclarations]: Found specification of procedure __init_waitqueue_head [2018-11-23 03:21:13,559 INFO L130 BoogieDeclarations]: Found specification of procedure writel [2018-11-23 03:21:13,559 INFO L138 BoogieDeclarations]: Found implementation of procedure writel [2018-11-23 03:21:13,559 INFO L130 BoogieDeclarations]: Found specification of procedure set_bit [2018-11-23 03:21:13,559 INFO L138 BoogieDeclarations]: Found implementation of procedure set_bit [2018-11-23 03:21:13,559 INFO L130 BoogieDeclarations]: Found specification of procedure schedule_timeout [2018-11-23 03:21:13,559 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2018-11-23 03:21:13,559 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~$Pointer$~TO~VOID [2018-11-23 03:21:13,559 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~$Pointer$~TO~VOID [2018-11-23 03:21:13,559 INFO L130 BoogieDeclarations]: Found specification of procedure pci_bus_read_config_byte [2018-11-23 03:21:13,560 INFO L130 BoogieDeclarations]: Found specification of procedure pci_bus_read_config_word [2018-11-23 03:21:13,560 INFO L130 BoogieDeclarations]: Found specification of procedure request_threaded_irq [2018-11-23 03:21:13,560 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_final_state [2018-11-23 03:21:13,560 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 03:21:13,560 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 03:21:13,560 INFO L130 BoogieDeclarations]: Found specification of procedure dma_pool_free [2018-11-23 03:23:47,667 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 03:23:47,667 INFO L280 CfgBuilder]: Removed 116 assue(true) statements. [2018-11-23 03:23:47,668 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:23:47 BoogieIcfgContainer [2018-11-23 03:23:47,668 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 03:23:47,668 INFO L113 PluginConnector]: ------------------------CodeCheck---------------------------- [2018-11-23 03:23:47,668 INFO L271 PluginConnector]: Initializing CodeCheck... [2018-11-23 03:23:47,676 INFO L276 PluginConnector]: CodeCheck initialized [2018-11-23 03:23:47,676 INFO L185 PluginConnector]: Executing the observer CodeCheckObserver from plugin CodeCheck for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:23:47" (1/1) ... [2018-11-23 03:23:47,684 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:23:47,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 03:23:47,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1674 states to 1108 states and 1674 transitions. [2018-11-23 03:23:47,747 INFO L276 IsEmpty]: Start isEmpty. Operand 1108 states and 1674 transitions. [2018-11-23 03:23:47,752 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-11-23 03:23:47,753 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 03:23:47,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 03:23:48,064 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 03:23:48,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 03:23:48,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1715 states to 1121 states and 1715 transitions. [2018-11-23 03:23:48,235 INFO L276 IsEmpty]: Start isEmpty. Operand 1121 states and 1715 transitions. [2018-11-23 03:23:48,237 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-11-23 03:23:48,237 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 03:23:48,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 03:23:48,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 03:23:48,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 03:23:49,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 03:23:49,231 WARN L493 CodeCheckObserver]: This program is UNSAFE, Check terminated with 2 iterations. ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string81.base, #t~string81.offset := #Ultimate.alloc(136);call #t~string82.base, #t~string82.offset := #Ultimate.alloc(27);call #t~string163.base, #t~string163.offset := #Ultimate.alloc(137);call #t~string322.base, #t~string322.offset := #Ultimate.alloc(16);call #t~string326.base, #t~string326.offset := #Ultimate.alloc(32);call #t~string327.base, #t~string327.offset := #Ultimate.alloc(3);call write~init~int(104, #t~string327.base, #t~string327.offset, 1);call write~init~int(101, #t~string327.base, 1 + #t~string327.offset, 1);call write~init~int(0, #t~string327.base, 2 + #t~string327.offset, 1);call #t~string333.base, #t~string333.offset := #Ultimate.alloc(31);call #t~string380.base, #t~string380.offset := #Ultimate.alloc(30);call #t~string410.base, #t~string410.offset := #Ultimate.alloc(45);call #t~string416.base, #t~string416.offset := #Ultimate.alloc(43);call #t~string418.base, #t~string418.offset := #Ultimate.alloc(5);call write~init~int(114, #t~string418.base, #t~string418.offset, 1);call write~init~int(98, #t~string418.base, 1 + #t~string418.offset, 1);call write~init~int(112, #t~string418.base, 2 + #t~string418.offset, 1);call write~init~int(108, #t~string418.base, 3 + #t~string418.offset, 1);call write~init~int(0, #t~string418.base, 4 + #t~string418.offset, 1);call #t~string423.base, #t~string423.offset := #Ultimate.alloc(35);call #t~string429.base, #t~string429.offset := #Ultimate.alloc(34);call #t~string452.base, #t~string452.offset := #Ultimate.alloc(32);call #t~string462.base, #t~string462.offset := #Ultimate.alloc(30);call #t~string470.base, #t~string470.offset := #Ultimate.alloc(32);call #t~string498.base, #t~string498.offset := #Ultimate.alloc(31);call #t~string528.base, #t~string528.offset := #Ultimate.alloc(3);call write~init~int(104, #t~string528.base, #t~string528.offset, 1);call write~init~int(101, #t~string528.base, 1 + #t~string528.offset, 1);call write~init~int(0, #t~string528.base, 2 + #t~string528.offset, 1);call #t~string531.base, #t~string531.offset := #Ultimate.alloc(30);call #t~string542.base, #t~string542.offset := #Ultimate.alloc(30);call #t~string548.base, #t~string548.offset := #Ultimate.alloc(32);call #t~string552.base, #t~string552.offset := #Ultimate.alloc(32);call #t~string558.base, #t~string558.offset := #Ultimate.alloc(29);call #t~string562.base, #t~string562.offset := #Ultimate.alloc(36);call #t~string568.base, #t~string568.offset := #Ultimate.alloc(40);call #t~string573.base, #t~string573.offset := #Ultimate.alloc(34);call #t~string579.base, #t~string579.offset := #Ultimate.alloc(38);call #t~string584.base, #t~string584.offset := #Ultimate.alloc(34);call #t~string591.base, #t~string591.offset := #Ultimate.alloc(21);call #t~string598.base, #t~string598.offset := #Ultimate.alloc(43);call #t~string603.base, #t~string603.offset := #Ultimate.alloc(33);call #t~string611.base, #t~string611.offset := #Ultimate.alloc(32);call #t~string614.base, #t~string614.offset := #Ultimate.alloc(3);call write~init~int(83, #t~string614.base, #t~string614.offset, 1);call write~init~int(77, #t~string614.base, 1 + #t~string614.offset, 1);call write~init~int(0, #t~string614.base, 2 + #t~string614.offset, 1);call #t~string615.base, #t~string615.offset := #Ultimate.alloc(3);call write~init~int(77, #t~string615.base, #t~string615.offset, 1);call write~init~int(77, #t~string615.base, 1 + #t~string615.offset, 1);call write~init~int(0, #t~string615.base, 2 + #t~string615.offset, 1);call #t~string640.base, #t~string640.offset := #Ultimate.alloc(34);call #t~string742.base, #t~string742.offset := #Ultimate.alloc(4);call write~init~int(116, #t~string742.base, #t~string742.offset, 1);call write~init~int(112, #t~string742.base, 1 + #t~string742.offset, 1);call write~init~int(100, #t~string742.base, 2 + #t~string742.offset, 1);call write~init~int(0, #t~string742.base, 3 + #t~string742.offset, 1);call #t~string747.base, #t~string747.offset := #Ultimate.alloc(38);call #t~string770.base, #t~string770.offset := #Ultimate.alloc(44);call #t~string892.base, #t~string892.offset := #Ultimate.alloc(39);call #t~string902.base, #t~string902.offset := #Ultimate.alloc(30);call #t~string963.base, #t~string963.offset := #Ultimate.alloc(47);call #t~string1039.base, #t~string1039.offset := #Ultimate.alloc(21);call #t~string1044.base, #t~string1044.offset := #Ultimate.alloc(19);call #t~string1048.base, #t~string1048.offset := #Ultimate.alloc(22);call #t~string1085.base, #t~string1085.offset := #Ultimate.alloc(30);call #t~string1121.base, #t~string1121.offset := #Ultimate.alloc(46);call #t~string1123.base, #t~string1123.offset := #Ultimate.alloc(18);call #t~string1124.base, #t~string1124.offset := #Ultimate.alloc(18);call #t~string1133.base, #t~string1133.offset := #Ultimate.alloc(40);call #t~string1157.base, #t~string1157.offset := #Ultimate.alloc(40);call #t~string1185.base, #t~string1185.offset := #Ultimate.alloc(34);call #t~string1191.base, #t~string1191.offset := #Ultimate.alloc(40);call #t~string1199.base, #t~string1199.offset := #Ultimate.alloc(46);call #t~string1214.base, #t~string1214.offset := #Ultimate.alloc(34);call #t~string1222.base, #t~string1222.offset := #Ultimate.alloc(32);call #t~string1238.base, #t~string1238.offset := #Ultimate.alloc(48);call #t~string1250.base, #t~string1250.offset := #Ultimate.alloc(34);call #t~string1319.base, #t~string1319.offset := #Ultimate.alloc(15);call #t~string1321.base, #t~string1321.offset := #Ultimate.alloc(7);call write~init~int(37, #t~string1321.base, #t~string1321.offset, 1);call write~init~int(115, #t~string1321.base, 1 + #t~string1321.offset, 1);call write~init~int(37, #t~string1321.base, 2 + #t~string1321.offset, 1);call write~init~int(115, #t~string1321.base, 3 + #t~string1321.offset, 1);call write~init~int(10, #t~string1321.base, 4 + #t~string1321.offset, 1);call write~init~int(10, #t~string1321.base, 5 + #t~string1321.offset, 1);call write~init~int(0, #t~string1321.base, 6 + #t~string1321.offset, 1);call #t~string1323.base, #t~string1323.offset := #Ultimate.alloc(3);call write~init~int(83, #t~string1323.base, #t~string1323.offset, 1);call write~init~int(77, #t~string1323.base, 1 + #t~string1323.offset, 1);call write~init~int(0, #t~string1323.base, 2 + #t~string1323.offset, 1);call #t~string1324.base, #t~string1324.offset := #Ultimate.alloc(3);call write~init~int(77, #t~string1324.base, #t~string1324.offset, 1);call write~init~int(77, #t~string1324.base, 1 + #t~string1324.offset, 1);call write~init~int(0, #t~string1324.base, 2 + #t~string1324.offset, 1);call #t~string1327.base, #t~string1327.offset := #Ultimate.alloc(70);call #t~string1337.base, #t~string1337.offset := #Ultimate.alloc(29);call #t~string1339.base, #t~string1339.offset := #Ultimate.alloc(37);call #t~string1342.base, #t~string1342.offset := #Ultimate.alloc(28);call #t~string1344.base, #t~string1344.offset := #Ultimate.alloc(38);call #t~string1347.base, #t~string1347.offset := #Ultimate.alloc(27);call #t~string1350.base, #t~string1350.offset := #Ultimate.alloc(57);call #t~string1352.base, #t~string1352.offset := #Ultimate.alloc(25);call #t~string1356.base, #t~string1356.offset := #Ultimate.alloc(32);call #t~string1377.base, #t~string1377.offset := #Ultimate.alloc(3);call write~init~int(104, #t~string1377.base, #t~string1377.offset, 1);call write~init~int(101, #t~string1377.base, 1 + #t~string1377.offset, 1);call write~init~int(0, #t~string1377.base, 2 + #t~string1377.offset, 1);call #t~string1378.base, #t~string1378.offset := #Ultimate.alloc(3);call write~init~int(104, #t~string1378.base, #t~string1378.offset, 1);call write~init~int(101, #t~string1378.base, 1 + #t~string1378.offset, 1);call write~init~int(0, #t~string1378.base, 2 + #t~string1378.offset, 1);~nvpibits~0 := -1;~nvcibits~0 := -1;~rx_skb_reserve~0 := 16;call ~#readtab~0.base, ~#readtab~0.offset := #Ultimate.alloc(68);call write~init~int(4352, ~#readtab~0.base, ~#readtab~0.offset, 4);call write~init~int(0, ~#readtab~0.base, 4 + ~#readtab~0.offset, 4);call write~init~int(256, ~#readtab~0.base, 8 + ~#readtab~0.offset, 4);call write~init~int(0, ~#readtab~0.base, 12 + ~#readtab~0.offset, 4);call write~init~int(256, ~#readtab~0.base, 16 + ~#readtab~0.offset, 4);call write~init~int(0, ~#readtab~0.base, 20 + ~#readtab~0.offset, 4);call write~init~int(256, ~#readtab~0.base, 24 + ~#readtab~0.offset, 4);call write~init~int(0, ~#readtab~0.base, 28 + ~#readtab~0.offset, 4);call write~init~int(256, ~#readtab~0.base, 32 + ~#readtab~0.offset, 4);call write~init~int(0, ~#readtab~0.base, 36 + ~#readtab~0.offset, 4);call write~init~int(256, ~#readtab~0.base, 40 + ~#readtab~0.offset, 4);call write~init~int(0, ~#readtab~0.base, 44 + ~#readtab~0.offset, 4);call write~init~int(256, ~#readtab~0.base, 48 + ~#readtab~0.offset, 4);call write~init~int(512, ~#readtab~0.base, 52 + ~#readtab~0.offset, 4);call write~init~int(768, ~#readtab~0.base, 56 + ~#readtab~0.offset, 4);call write~init~int(512, ~#readtab~0.base, 60 + ~#readtab~0.offset, 4);call write~init~int(768, ~#readtab~0.base, 64 + ~#readtab~0.offset, 4);call ~#clocktab~0.base, ~#clocktab~0.offset := #Ultimate.alloc(68);call write~init~int(0, ~#clocktab~0.base, ~#clocktab~0.offset, 4);call write~init~int(256, ~#clocktab~0.base, 4 + ~#clocktab~0.offset, 4);call write~init~int(0, ~#clocktab~0.base, 8 + ~#clocktab~0.offset, 4);call write~init~int(256, ~#clocktab~0.base, 12 + ~#clocktab~0.offset, 4);call write~init~int(0, ~#clocktab~0.base, 16 + ~#clocktab~0.offset, 4);call write~init~int(256, ~#clocktab~0.base, 20 + ~#clocktab~0.offset, 4);call write~init~int(0, ~#clocktab~0.base, 24 + ~#clocktab~0.offset, 4);call write~init~int(256, ~#clocktab~0.base, 28 + ~#clocktab~0.offset, 4);call write~init~int(0, ~#clocktab~0.base, 32 + ~#clocktab~0.offset, 4);call write~init~int(256, ~#clocktab~0.base, 36 + ~#clocktab~0.offset, 4);call write~init~int(0, ~#clocktab~0.base, 40 + ~#clocktab~0.offset, 4);call write~init~int(256, ~#clocktab~0.base, 44 + ~#clocktab~0.offset, 4);call write~init~int(0, ~#clocktab~0.base, 48 + ~#clocktab~0.offset, 4);call write~init~int(256, ~#clocktab~0.base, 52 + ~#clocktab~0.offset, 4);call write~init~int(0, ~#clocktab~0.base, 56 + ~#clocktab~0.offset, 4);call write~init~int(256, ~#clocktab~0.base, 60 + ~#clocktab~0.offset, 4);call write~init~int(0, ~#clocktab~0.base, 64 + ~#clocktab~0.offset, 4);~LDV_IN_INTERRUPT~0 := 0;~ldv_spin~0 := 0;~he_devs~0.base, ~he_devs~0.offset := 0, 0;~disable64~0 := 0;~irq_coalesce~0 := 1;~sdh~0 := 0;call ~#he_ops~0.base, ~#he_ops~0.offset := #Ultimate.alloc(112);call write~init~$Pointer$(0, 0, ~#he_ops~0.base, ~#he_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~he_open.base, #funAddr~he_open.offset, ~#he_ops~0.base, 8 + ~#he_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~he_close.base, #funAddr~he_close.offset, ~#he_ops~0.base, 16 + ~#he_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~he_ioctl.base, #funAddr~he_ioctl.offset, ~#he_ops~0.base, 24 + ~#he_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_ops~0.base, 32 + ~#he_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_ops~0.base, 40 + ~#he_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_ops~0.base, 48 + ~#he_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~he_send.base, #funAddr~he_send.offset, ~#he_ops~0.base, 56 + ~#he_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_ops~0.base, 64 + ~#he_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~he_phy_put.base, #funAddr~he_phy_put.offset, ~#he_ops~0.base, 72 + ~#he_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~he_phy_get.base, #funAddr~he_phy_get.offset, ~#he_ops~0.base, 80 + ~#he_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_ops~0.base, 88 + ~#he_ops~0.offset, 8);call write~init~$Pointer$(#funAddr~he_proc_read.base, #funAddr~he_proc_read.offset, ~#he_ops~0.base, 96 + ~#he_ops~0.offset, 8);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#he_ops~0.base, 104 + ~#he_ops~0.offset, 8);call ~#he_pci_tbl~0.base, ~#he_pci_tbl~0.offset := #Ultimate.alloc(64);call write~init~int(4391, ~#he_pci_tbl~0.base, ~#he_pci_tbl~0.offset, 4);call write~init~int(1024, ~#he_pci_tbl~0.base, 4 + ~#he_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#he_pci_tbl~0.base, 8 + ~#he_pci_tbl~0.offset, 4);call write~init~int(4294967295, ~#he_pci_tbl~0.base, 12 + ~#he_pci_tbl~0.offset, 4);call write~init~int(0, ~#he_pci_tbl~0.base, 16 + ~#he_pci_tbl~0.offset, 4);call write~init~int(0, ~#he_pci_tbl~0.base, 20 + ~#he_pci_tbl~0.offset, 4);call write~init~int(0, ~#he_pci_tbl~0.base, 24 + ~#he_pci_tbl~0.offset, 8);call write~init~int(0, ~#he_pci_tbl~0.base, 32 + ~#he_pci_tbl~0.offset, 4);call write~init~int(0, ~#he_pci_tbl~0.base, 36 + ~#he_pci_tbl~0.offset, 4);call write~init~int(0, ~#he_pci_tbl~0.base, 40 + ~#he_pci_tbl~0.offset, 4);call write~init~int(0, ~#he_pci_tbl~0.base, 44 + ~#he_pci_tbl~0.offset, 4);call write~init~int(0, ~#he_pci_tbl~0.base, 48 + ~#he_pci_tbl~0.offset, 4);call write~init~int(0, ~#he_pci_tbl~0.base, 52 + ~#he_pci_tbl~0.offset, 4);call write~init~int(0, ~#he_pci_tbl~0.base, 56 + ~#he_pci_tbl~0.offset, 8);~__mod_pci_device_table~0.vendor := 0;~__mod_pci_device_table~0.device := 0;~__mod_pci_device_table~0.subvendor := 0;~__mod_pci_device_table~0.subdevice := 0;~__mod_pci_device_table~0.class := 0;~__mod_pci_device_table~0.class_mask := 0;~__mod_pci_device_table~0.driver_data := 0;call ~#he_driver~0.base, ~#he_driver~0.offset := #Ultimate.alloc(301);call write~init~$Pointer$(0, 0, ~#he_driver~0.base, ~#he_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 8 + ~#he_driver~0.offset, 8);call write~init~$Pointer$(#t~string1377.base, #t~string1377.offset, ~#he_driver~0.base, 16 + ~#he_driver~0.offset, 8);call write~init~$Pointer$(~#he_pci_tbl~0.base, ~#he_pci_tbl~0.offset, ~#he_driver~0.base, 24 + ~#he_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~he_init_one.base, #funAddr~he_init_one.offset, ~#he_driver~0.base, 32 + ~#he_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~he_remove_one.base, #funAddr~he_remove_one.offset, ~#he_driver~0.base, 40 + ~#he_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 48 + ~#he_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 56 + ~#he_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 64 + ~#he_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 72 + ~#he_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 80 + ~#he_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 88 + ~#he_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 96 + ~#he_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 104 + ~#he_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 112 + ~#he_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 120 + ~#he_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 128 + ~#he_driver~0.offset, 8);call write~init~int(0, ~#he_driver~0.base, 136 + ~#he_driver~0.offset, 1);call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 137 + ~#he_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 145 + ~#he_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 153 + ~#he_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 161 + ~#he_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 169 + ~#he_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 177 + ~#he_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 185 + ~#he_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 193 + ~#he_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 201 + ~#he_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 209 + ~#he_driver~0.offset, 8);call write~init~int(0, ~#he_driver~0.base, 217 + ~#he_driver~0.offset, 4);call write~init~int(0, ~#he_driver~0.base, 221 + ~#he_driver~0.offset, 4);call write~init~int(0, ~#he_driver~0.base, 225 + ~#he_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 229 + ~#he_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 237 + ~#he_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 245 + ~#he_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 253 + ~#he_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 261 + ~#he_driver~0.offset, 8);call write~init~int(0, ~#he_driver~0.base, 269 + ~#he_driver~0.offset, 4);call write~init~int(0, ~#he_driver~0.base, 273 + ~#he_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 285 + ~#he_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 293 + ~#he_driver~0.offset, 8);havoc main_#res;havoc main_#t~malloc1383.base, main_#t~malloc1383.offset, main_#t~ret1384, main_#t~nondet1385, main_#t~switch1386, main_#t~ret1387, main_#t~ret1388, main_#t~ret1389, main_#t~ret1390, main_#t~ret1391, main_#t~ret1392, main_#t~ret1393, main_#t~nondet1394, main_~var_group1~0.base, main_~var_group1~0.offset, main_~res_he_open_23~0, main_~var_group2~0.base, main_~var_group2~0.offset, main_~var_he_ioctl_26_p1~0, main_~var_he_ioctl_26_p2~0.base, main_~var_he_ioctl_26_p2~0.offset, main_~var_group3~0.base, main_~var_group3~0.offset, main_~var_he_phy_put_27_p1~0, main_~var_he_phy_put_27_p2~0, main_~var_he_phy_get_28_p1~0, main_~var_he_proc_read_29_p1~0.base, main_~var_he_proc_read_29_p1~0.offset, main_~var_he_proc_read_29_p2~0.base, main_~var_he_proc_read_29_p2~0.offset, main_~var_group4~0.base, main_~var_group4~0.offset, main_~var_he_init_one_3_p1~0.base, main_~var_he_init_one_3_p1~0.offset, main_~res_he_init_one_3~0, main_~var_he_irq_handler_21_p0~0, main_~var_he_irq_handler_21_p1~0.base, main_~var_he_irq_handler_21_p1~0.offset, main_~ldv_s_he_ops_atmdev_ops~0, main_~ldv_s_he_driver_pci_driver~0, main_~tmp~47, main_~tmp___0~20, main_~tmp___1~14;havoc main_~var_group1~0.base, main_~var_group1~0.offset;havoc main_~res_he_open_23~0;havoc main_~var_group2~0.base, main_~var_group2~0.offset;havoc main_~var_he_ioctl_26_p1~0;havoc main_~var_he_ioctl_26_p2~0.base, main_~var_he_ioctl_26_p2~0.offset;havoc main_~var_group3~0.base, main_~var_group3~0.offset;havoc main_~var_he_phy_put_27_p1~0;havoc main_~var_he_phy_put_27_p2~0;havoc main_~var_he_phy_get_28_p1~0;havoc main_~var_he_proc_read_29_p1~0.base, main_~var_he_proc_read_29_p1~0.offset;havoc main_~var_he_proc_read_29_p2~0.base, main_~var_he_proc_read_29_p2~0.offset;havoc main_~var_group4~0.base, main_~var_group4~0.offset;havoc main_~var_he_init_one_3_p1~0.base, main_~var_he_init_one_3_p1~0.offset;havoc main_~res_he_init_one_3~0;havoc main_~var_he_irq_handler_21_p0~0;havoc main_~var_he_irq_handler_21_p1~0.base, main_~var_he_irq_handler_21_p1~0.offset;havoc main_~ldv_s_he_ops_atmdev_ops~0;havoc main_~ldv_s_he_driver_pci_driver~0;havoc main_~tmp~47;havoc main_~tmp___0~20;havoc main_~tmp___1~14;call main_#t~malloc1383.base, main_#t~malloc1383.offset := #Ultimate.alloc(1590);main_~var_group1~0.base, main_~var_group1~0.offset := main_#t~malloc1383.base, main_#t~malloc1383.offset;call write~$Pointer$(#funAddr~void_one_par_dummy.base, #funAddr~void_one_par_dummy.offset, main_~var_group1~0.base, 1420 + main_~var_group1~0.offset, 8);call write~$Pointer$(#funAddr~void_two_par_dummy.base, #funAddr~void_two_par_dummy.offset, main_~var_group1~0.base, 1428 + main_~var_group1~0.offset, 8);call write~$Pointer$(#funAddr~void_two_par_dummy.base, #funAddr~void_two_par_dummy.offset, main_~var_group1~0.base, 1436 + main_~var_group1~0.offset, 8);call write~$Pointer$(#funAddr~int_two_par_dummy.base, #funAddr~int_two_par_dummy.offset, main_~var_group1~0.base, 1444 + main_~var_group1~0.offset, 8);call write~$Pointer$(#funAddr~int_two_par_dummy.base, #funAddr~int_two_par_dummy.offset, main_~var_group1~0.base, 1452 + main_~var_group1~0.offset, 8);main_~ldv_s_he_ops_atmdev_ops~0 := 0;main_~ldv_s_he_driver_pci_driver~0 := 0;~LDV_IN_INTERRUPT~0 := 1;call ldv_initialize();call ldv_handler_precall();havoc he_init_#res;havoc he_init_#t~ret1379, he_init_~tmp~46;havoc he_init_~tmp~46;call he_init_#t~ret1379 := __pci_register_driver(~#he_driver~0.base, ~#he_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, #t~string1378.base, #t~string1378.offset);assume -2147483648 <= he_init_#t~ret1379 && he_init_#t~ret1379 <= 2147483647;he_init_~tmp~46 := he_init_#t~ret1379;havoc he_init_#t~ret1379;he_init_#res := he_init_~tmp~46;main_#t~ret1384 := he_init_#res;assume -2147483648 <= main_#t~ret1384 && main_#t~ret1384 <= 2147483647;main_~tmp~47 := main_#t~ret1384;havoc main_#t~ret1384; VAL [ULTIMATE.start_he_init_~tmp~46=0, ULTIMATE.start_main_~ldv_s_he_driver_pci_driver~0=0, ULTIMATE.start_main_~ldv_s_he_ops_atmdev_ops~0=0, ULTIMATE.start_main_~tmp~47=0, ULTIMATE.start_main_~var_group1~0.base=174, ULTIMATE.start_main_~var_group1~0.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1039.base|=41, |#t~string1039.offset|=0, |#t~string1044.base|=147, |#t~string1044.offset|=0, |#t~string1048.base|=146, |#t~string1048.offset|=0, |#t~string1085.base|=144, |#t~string1085.offset|=0, |#t~string1121.base|=143, |#t~string1121.offset|=0, |#t~string1123.base|=142, |#t~string1123.offset|=0, |#t~string1124.base|=141, |#t~string1124.offset|=0, |#t~string1133.base|=139, |#t~string1133.offset|=0, |#t~string1157.base|=138, |#t~string1157.offset|=0, |#t~string1185.base|=135, |#t~string1185.offset|=0, |#t~string1191.base|=103, |#t~string1191.offset|=0, |#t~string1199.base|=134, |#t~string1199.offset|=0, |#t~string1214.base|=133, |#t~string1214.offset|=0, |#t~string1222.base|=131, |#t~string1222.offset|=0, |#t~string1238.base|=130, |#t~string1238.offset|=0, |#t~string1250.base|=129, |#t~string1250.offset|=0, |#t~string1319.base|=127, |#t~string1319.offset|=0, |#t~string1321.base|=126, |#t~string1321.offset|=0, |#t~string1323.base|=125, |#t~string1323.offset|=0, |#t~string1324.base|=124, |#t~string1324.offset|=0, |#t~string1327.base|=123, |#t~string1327.offset|=0, |#t~string1337.base|=122, |#t~string1337.offset|=0, |#t~string1339.base|=121, |#t~string1339.offset|=0, |#t~string1342.base|=119, |#t~string1342.offset|=0, |#t~string1344.base|=118, |#t~string1344.offset|=0, |#t~string1347.base|=117, |#t~string1347.offset|=0, |#t~string1350.base|=113, |#t~string1350.offset|=0, |#t~string1352.base|=110, |#t~string1352.offset|=0, |#t~string1356.base|=111, |#t~string1356.offset|=0, |#t~string1377.base|=160, |#t~string1377.offset|=0, |#t~string1378.base|=105, |#t~string1378.offset|=0, |#t~string163.base|=95, |#t~string163.offset|=0, |#t~string322.base|=94, |#t~string322.offset|=0, |#t~string326.base|=93, |#t~string326.offset|=0, |#t~string327.base|=92, |#t~string327.offset|=0, |#t~string333.base|=91, |#t~string333.offset|=0, |#t~string380.base|=90, |#t~string380.offset|=0, |#t~string410.base|=89, |#t~string410.offset|=0, |#t~string416.base|=87, |#t~string416.offset|=0, |#t~string418.base|=86, |#t~string418.offset|=0, |#t~string423.base|=85, |#t~string423.offset|=0, |#t~string429.base|=84, |#t~string429.offset|=0, |#t~string452.base|=82, |#t~string452.offset|=0, |#t~string462.base|=81, |#t~string462.offset|=0, |#t~string470.base|=79, |#t~string470.offset|=0, |#t~string498.base|=78, |#t~string498.offset|=0, |#t~string528.base|=76, |#t~string528.offset|=0, |#t~string531.base|=75, |#t~string531.offset|=0, |#t~string542.base|=74, |#t~string542.offset|=0, |#t~string548.base|=73, |#t~string548.offset|=0, |#t~string552.base|=71, |#t~string552.offset|=0, |#t~string558.base|=69, |#t~string558.offset|=0, |#t~string562.base|=67, |#t~string562.offset|=0, |#t~string568.base|=66, |#t~string568.offset|=0, |#t~string573.base|=65, |#t~string573.offset|=0, |#t~string579.base|=63, |#t~string579.offset|=0, |#t~string584.base|=62, |#t~string584.offset|=0, |#t~string591.base|=61, |#t~string591.offset|=0, |#t~string598.base|=59, |#t~string598.offset|=0, |#t~string603.base|=58, |#t~string603.offset|=0, |#t~string611.base|=55, |#t~string611.offset|=0, |#t~string614.base|=54, |#t~string614.offset|=0, |#t~string615.base|=53, |#t~string615.offset|=0, |#t~string640.base|=50, |#t~string640.offset|=0, |#t~string742.base|=51, |#t~string742.offset|=0, |#t~string747.base|=109, |#t~string747.offset|=0, |#t~string770.base|=106, |#t~string770.offset|=0, |#t~string81.base|=26, |#t~string81.offset|=0, |#t~string82.base|=97, |#t~string82.offset|=0, |#t~string892.base|=107, |#t~string892.offset|=0, |#t~string902.base|=150, |#t~string902.offset|=0, |#t~string963.base|=149, |#t~string963.offset|=0, |ULTIMATE.start_he_init_#res|=0, |ULTIMATE.start_main_#t~malloc1383.base|=174, |ULTIMATE.start_main_#t~malloc1383.offset|=0, |~#__this_module~0.base|=158, |~#__this_module~0.offset|=170, |~#clocktab~0.base|=155, |~#clocktab~0.offset|=0, |~#he_driver~0.base|=17, |~#he_driver~0.offset|=0, |~#he_ops~0.base|=99, |~#he_ops~0.offset|=0, |~#he_pci_tbl~0.base|=167, |~#he_pci_tbl~0.offset|=0, |~#readtab~0.base|=49, |~#readtab~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=(- 1), ~nvpibits~0=(- 1), ~rx_skb_reserve~0=16, ~sdh~0=0] [?] assume !(0 != main_~tmp~47); VAL [ULTIMATE.start_he_init_~tmp~46=0, ULTIMATE.start_main_~ldv_s_he_driver_pci_driver~0=0, ULTIMATE.start_main_~ldv_s_he_ops_atmdev_ops~0=0, ULTIMATE.start_main_~tmp~47=0, ULTIMATE.start_main_~var_group1~0.base=174, ULTIMATE.start_main_~var_group1~0.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1039.base|=41, |#t~string1039.offset|=0, |#t~string1044.base|=147, |#t~string1044.offset|=0, |#t~string1048.base|=146, |#t~string1048.offset|=0, |#t~string1085.base|=144, |#t~string1085.offset|=0, |#t~string1121.base|=143, |#t~string1121.offset|=0, |#t~string1123.base|=142, |#t~string1123.offset|=0, |#t~string1124.base|=141, |#t~string1124.offset|=0, |#t~string1133.base|=139, |#t~string1133.offset|=0, |#t~string1157.base|=138, |#t~string1157.offset|=0, |#t~string1185.base|=135, |#t~string1185.offset|=0, |#t~string1191.base|=103, |#t~string1191.offset|=0, |#t~string1199.base|=134, |#t~string1199.offset|=0, |#t~string1214.base|=133, |#t~string1214.offset|=0, |#t~string1222.base|=131, |#t~string1222.offset|=0, |#t~string1238.base|=130, |#t~string1238.offset|=0, |#t~string1250.base|=129, |#t~string1250.offset|=0, |#t~string1319.base|=127, |#t~string1319.offset|=0, |#t~string1321.base|=126, |#t~string1321.offset|=0, |#t~string1323.base|=125, |#t~string1323.offset|=0, |#t~string1324.base|=124, |#t~string1324.offset|=0, |#t~string1327.base|=123, |#t~string1327.offset|=0, |#t~string1337.base|=122, |#t~string1337.offset|=0, |#t~string1339.base|=121, |#t~string1339.offset|=0, |#t~string1342.base|=119, |#t~string1342.offset|=0, |#t~string1344.base|=118, |#t~string1344.offset|=0, |#t~string1347.base|=117, |#t~string1347.offset|=0, |#t~string1350.base|=113, |#t~string1350.offset|=0, |#t~string1352.base|=110, |#t~string1352.offset|=0, |#t~string1356.base|=111, |#t~string1356.offset|=0, |#t~string1377.base|=160, |#t~string1377.offset|=0, |#t~string1378.base|=105, |#t~string1378.offset|=0, |#t~string163.base|=95, |#t~string163.offset|=0, |#t~string322.base|=94, |#t~string322.offset|=0, |#t~string326.base|=93, |#t~string326.offset|=0, |#t~string327.base|=92, |#t~string327.offset|=0, |#t~string333.base|=91, |#t~string333.offset|=0, |#t~string380.base|=90, |#t~string380.offset|=0, |#t~string410.base|=89, |#t~string410.offset|=0, |#t~string416.base|=87, |#t~string416.offset|=0, |#t~string418.base|=86, |#t~string418.offset|=0, |#t~string423.base|=85, |#t~string423.offset|=0, |#t~string429.base|=84, |#t~string429.offset|=0, |#t~string452.base|=82, |#t~string452.offset|=0, |#t~string462.base|=81, |#t~string462.offset|=0, |#t~string470.base|=79, |#t~string470.offset|=0, |#t~string498.base|=78, |#t~string498.offset|=0, |#t~string528.base|=76, |#t~string528.offset|=0, |#t~string531.base|=75, |#t~string531.offset|=0, |#t~string542.base|=74, |#t~string542.offset|=0, |#t~string548.base|=73, |#t~string548.offset|=0, |#t~string552.base|=71, |#t~string552.offset|=0, |#t~string558.base|=69, |#t~string558.offset|=0, |#t~string562.base|=67, |#t~string562.offset|=0, |#t~string568.base|=66, |#t~string568.offset|=0, |#t~string573.base|=65, |#t~string573.offset|=0, |#t~string579.base|=63, |#t~string579.offset|=0, |#t~string584.base|=62, |#t~string584.offset|=0, |#t~string591.base|=61, |#t~string591.offset|=0, |#t~string598.base|=59, |#t~string598.offset|=0, |#t~string603.base|=58, |#t~string603.offset|=0, |#t~string611.base|=55, |#t~string611.offset|=0, |#t~string614.base|=54, |#t~string614.offset|=0, |#t~string615.base|=53, |#t~string615.offset|=0, |#t~string640.base|=50, |#t~string640.offset|=0, |#t~string742.base|=51, |#t~string742.offset|=0, |#t~string747.base|=109, |#t~string747.offset|=0, |#t~string770.base|=106, |#t~string770.offset|=0, |#t~string81.base|=26, |#t~string81.offset|=0, |#t~string82.base|=97, |#t~string82.offset|=0, |#t~string892.base|=107, |#t~string892.offset|=0, |#t~string902.base|=150, |#t~string902.offset|=0, |#t~string963.base|=149, |#t~string963.offset|=0, |ULTIMATE.start_he_init_#res|=0, |ULTIMATE.start_main_#t~malloc1383.base|=174, |ULTIMATE.start_main_#t~malloc1383.offset|=0, |~#__this_module~0.base|=158, |~#__this_module~0.offset|=170, |~#clocktab~0.base|=155, |~#clocktab~0.offset|=0, |~#he_driver~0.base|=17, |~#he_driver~0.offset|=0, |~#he_ops~0.base|=99, |~#he_ops~0.offset|=0, |~#he_pci_tbl~0.base|=167, |~#he_pci_tbl~0.offset|=0, |~#readtab~0.base|=49, |~#readtab~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=(- 1), ~nvpibits~0=(- 1), ~rx_skb_reserve~0=16, ~sdh~0=0] [?] assume -2147483648 <= main_#t~nondet1394 && main_#t~nondet1394 <= 2147483647;main_~tmp___1~14 := main_#t~nondet1394;havoc main_#t~nondet1394; VAL [ULTIMATE.start_he_init_~tmp~46=0, ULTIMATE.start_main_~ldv_s_he_driver_pci_driver~0=0, ULTIMATE.start_main_~ldv_s_he_ops_atmdev_ops~0=0, ULTIMATE.start_main_~tmp___1~14=(- 1), ULTIMATE.start_main_~tmp~47=0, ULTIMATE.start_main_~var_group1~0.base=174, ULTIMATE.start_main_~var_group1~0.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1039.base|=41, |#t~string1039.offset|=0, |#t~string1044.base|=147, |#t~string1044.offset|=0, |#t~string1048.base|=146, |#t~string1048.offset|=0, |#t~string1085.base|=144, |#t~string1085.offset|=0, |#t~string1121.base|=143, |#t~string1121.offset|=0, |#t~string1123.base|=142, |#t~string1123.offset|=0, |#t~string1124.base|=141, |#t~string1124.offset|=0, |#t~string1133.base|=139, |#t~string1133.offset|=0, |#t~string1157.base|=138, |#t~string1157.offset|=0, |#t~string1185.base|=135, |#t~string1185.offset|=0, |#t~string1191.base|=103, |#t~string1191.offset|=0, |#t~string1199.base|=134, |#t~string1199.offset|=0, |#t~string1214.base|=133, |#t~string1214.offset|=0, |#t~string1222.base|=131, |#t~string1222.offset|=0, |#t~string1238.base|=130, |#t~string1238.offset|=0, |#t~string1250.base|=129, |#t~string1250.offset|=0, |#t~string1319.base|=127, |#t~string1319.offset|=0, |#t~string1321.base|=126, |#t~string1321.offset|=0, |#t~string1323.base|=125, |#t~string1323.offset|=0, |#t~string1324.base|=124, |#t~string1324.offset|=0, |#t~string1327.base|=123, |#t~string1327.offset|=0, |#t~string1337.base|=122, |#t~string1337.offset|=0, |#t~string1339.base|=121, |#t~string1339.offset|=0, |#t~string1342.base|=119, |#t~string1342.offset|=0, |#t~string1344.base|=118, |#t~string1344.offset|=0, |#t~string1347.base|=117, |#t~string1347.offset|=0, |#t~string1350.base|=113, |#t~string1350.offset|=0, |#t~string1352.base|=110, |#t~string1352.offset|=0, |#t~string1356.base|=111, |#t~string1356.offset|=0, |#t~string1377.base|=160, |#t~string1377.offset|=0, |#t~string1378.base|=105, |#t~string1378.offset|=0, |#t~string163.base|=95, |#t~string163.offset|=0, |#t~string322.base|=94, |#t~string322.offset|=0, |#t~string326.base|=93, |#t~string326.offset|=0, |#t~string327.base|=92, |#t~string327.offset|=0, |#t~string333.base|=91, |#t~string333.offset|=0, |#t~string380.base|=90, |#t~string380.offset|=0, |#t~string410.base|=89, |#t~string410.offset|=0, |#t~string416.base|=87, |#t~string416.offset|=0, |#t~string418.base|=86, |#t~string418.offset|=0, |#t~string423.base|=85, |#t~string423.offset|=0, |#t~string429.base|=84, |#t~string429.offset|=0, |#t~string452.base|=82, |#t~string452.offset|=0, |#t~string462.base|=81, |#t~string462.offset|=0, |#t~string470.base|=79, |#t~string470.offset|=0, |#t~string498.base|=78, |#t~string498.offset|=0, |#t~string528.base|=76, |#t~string528.offset|=0, |#t~string531.base|=75, |#t~string531.offset|=0, |#t~string542.base|=74, |#t~string542.offset|=0, |#t~string548.base|=73, |#t~string548.offset|=0, |#t~string552.base|=71, |#t~string552.offset|=0, |#t~string558.base|=69, |#t~string558.offset|=0, |#t~string562.base|=67, |#t~string562.offset|=0, |#t~string568.base|=66, |#t~string568.offset|=0, |#t~string573.base|=65, |#t~string573.offset|=0, |#t~string579.base|=63, |#t~string579.offset|=0, |#t~string584.base|=62, |#t~string584.offset|=0, |#t~string591.base|=61, |#t~string591.offset|=0, |#t~string598.base|=59, |#t~string598.offset|=0, |#t~string603.base|=58, |#t~string603.offset|=0, |#t~string611.base|=55, |#t~string611.offset|=0, |#t~string614.base|=54, |#t~string614.offset|=0, |#t~string615.base|=53, |#t~string615.offset|=0, |#t~string640.base|=50, |#t~string640.offset|=0, |#t~string742.base|=51, |#t~string742.offset|=0, |#t~string747.base|=109, |#t~string747.offset|=0, |#t~string770.base|=106, |#t~string770.offset|=0, |#t~string81.base|=26, |#t~string81.offset|=0, |#t~string82.base|=97, |#t~string82.offset|=0, |#t~string892.base|=107, |#t~string892.offset|=0, |#t~string902.base|=150, |#t~string902.offset|=0, |#t~string963.base|=149, |#t~string963.offset|=0, |ULTIMATE.start_he_init_#res|=0, |ULTIMATE.start_main_#t~malloc1383.base|=174, |ULTIMATE.start_main_#t~malloc1383.offset|=0, |~#__this_module~0.base|=158, |~#__this_module~0.offset|=170, |~#clocktab~0.base|=155, |~#clocktab~0.offset|=0, |~#he_driver~0.base|=17, |~#he_driver~0.offset|=0, |~#he_ops~0.base|=99, |~#he_ops~0.offset|=0, |~#he_pci_tbl~0.base|=167, |~#he_pci_tbl~0.offset|=0, |~#readtab~0.base|=49, |~#readtab~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=(- 1), ~nvpibits~0=(- 1), ~rx_skb_reserve~0=16, ~sdh~0=0] [?] assume (0 != main_~tmp___1~14 || 0 != main_~ldv_s_he_ops_atmdev_ops~0) || 0 != main_~ldv_s_he_driver_pci_driver~0;assume -2147483648 <= main_#t~nondet1385 && main_#t~nondet1385 <= 2147483647;main_~tmp___0~20 := main_#t~nondet1385;havoc main_#t~nondet1385;main_#t~switch1386 := 0 == main_~tmp___0~20; VAL [ULTIMATE.start_he_init_~tmp~46=0, ULTIMATE.start_main_~ldv_s_he_driver_pci_driver~0=0, ULTIMATE.start_main_~ldv_s_he_ops_atmdev_ops~0=0, ULTIMATE.start_main_~tmp___0~20=3, ULTIMATE.start_main_~tmp___1~14=(- 1), ULTIMATE.start_main_~tmp~47=0, ULTIMATE.start_main_~var_group1~0.base=174, ULTIMATE.start_main_~var_group1~0.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1039.base|=41, |#t~string1039.offset|=0, |#t~string1044.base|=147, |#t~string1044.offset|=0, |#t~string1048.base|=146, |#t~string1048.offset|=0, |#t~string1085.base|=144, |#t~string1085.offset|=0, |#t~string1121.base|=143, |#t~string1121.offset|=0, |#t~string1123.base|=142, |#t~string1123.offset|=0, |#t~string1124.base|=141, |#t~string1124.offset|=0, |#t~string1133.base|=139, |#t~string1133.offset|=0, |#t~string1157.base|=138, |#t~string1157.offset|=0, |#t~string1185.base|=135, |#t~string1185.offset|=0, |#t~string1191.base|=103, |#t~string1191.offset|=0, |#t~string1199.base|=134, |#t~string1199.offset|=0, |#t~string1214.base|=133, |#t~string1214.offset|=0, |#t~string1222.base|=131, |#t~string1222.offset|=0, |#t~string1238.base|=130, |#t~string1238.offset|=0, |#t~string1250.base|=129, |#t~string1250.offset|=0, |#t~string1319.base|=127, |#t~string1319.offset|=0, |#t~string1321.base|=126, |#t~string1321.offset|=0, |#t~string1323.base|=125, |#t~string1323.offset|=0, |#t~string1324.base|=124, |#t~string1324.offset|=0, |#t~string1327.base|=123, |#t~string1327.offset|=0, |#t~string1337.base|=122, |#t~string1337.offset|=0, |#t~string1339.base|=121, |#t~string1339.offset|=0, |#t~string1342.base|=119, |#t~string1342.offset|=0, |#t~string1344.base|=118, |#t~string1344.offset|=0, |#t~string1347.base|=117, |#t~string1347.offset|=0, |#t~string1350.base|=113, |#t~string1350.offset|=0, |#t~string1352.base|=110, |#t~string1352.offset|=0, |#t~string1356.base|=111, |#t~string1356.offset|=0, |#t~string1377.base|=160, |#t~string1377.offset|=0, |#t~string1378.base|=105, |#t~string1378.offset|=0, |#t~string163.base|=95, |#t~string163.offset|=0, |#t~string322.base|=94, |#t~string322.offset|=0, |#t~string326.base|=93, |#t~string326.offset|=0, |#t~string327.base|=92, |#t~string327.offset|=0, |#t~string333.base|=91, |#t~string333.offset|=0, |#t~string380.base|=90, |#t~string380.offset|=0, |#t~string410.base|=89, |#t~string410.offset|=0, |#t~string416.base|=87, |#t~string416.offset|=0, |#t~string418.base|=86, |#t~string418.offset|=0, |#t~string423.base|=85, |#t~string423.offset|=0, |#t~string429.base|=84, |#t~string429.offset|=0, |#t~string452.base|=82, |#t~string452.offset|=0, |#t~string462.base|=81, |#t~string462.offset|=0, |#t~string470.base|=79, |#t~string470.offset|=0, |#t~string498.base|=78, |#t~string498.offset|=0, |#t~string528.base|=76, |#t~string528.offset|=0, |#t~string531.base|=75, |#t~string531.offset|=0, |#t~string542.base|=74, |#t~string542.offset|=0, |#t~string548.base|=73, |#t~string548.offset|=0, |#t~string552.base|=71, |#t~string552.offset|=0, |#t~string558.base|=69, |#t~string558.offset|=0, |#t~string562.base|=67, |#t~string562.offset|=0, |#t~string568.base|=66, |#t~string568.offset|=0, |#t~string573.base|=65, |#t~string573.offset|=0, |#t~string579.base|=63, |#t~string579.offset|=0, |#t~string584.base|=62, |#t~string584.offset|=0, |#t~string591.base|=61, |#t~string591.offset|=0, |#t~string598.base|=59, |#t~string598.offset|=0, |#t~string603.base|=58, |#t~string603.offset|=0, |#t~string611.base|=55, |#t~string611.offset|=0, |#t~string614.base|=54, |#t~string614.offset|=0, |#t~string615.base|=53, |#t~string615.offset|=0, |#t~string640.base|=50, |#t~string640.offset|=0, |#t~string742.base|=51, |#t~string742.offset|=0, |#t~string747.base|=109, |#t~string747.offset|=0, |#t~string770.base|=106, |#t~string770.offset|=0, |#t~string81.base|=26, |#t~string81.offset|=0, |#t~string82.base|=97, |#t~string82.offset|=0, |#t~string892.base|=107, |#t~string892.offset|=0, |#t~string902.base|=150, |#t~string902.offset|=0, |#t~string963.base|=149, |#t~string963.offset|=0, |ULTIMATE.start_he_init_#res|=0, |ULTIMATE.start_main_#t~malloc1383.base|=174, |ULTIMATE.start_main_#t~malloc1383.offset|=0, |ULTIMATE.start_main_#t~switch1386|=false, |~#__this_module~0.base|=158, |~#__this_module~0.offset|=170, |~#clocktab~0.base|=155, |~#clocktab~0.offset|=0, |~#he_driver~0.base|=17, |~#he_driver~0.offset|=0, |~#he_ops~0.base|=99, |~#he_ops~0.offset|=0, |~#he_pci_tbl~0.base|=167, |~#he_pci_tbl~0.offset|=0, |~#readtab~0.base|=49, |~#readtab~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=(- 1), ~nvpibits~0=(- 1), ~rx_skb_reserve~0=16, ~sdh~0=0] [?] assume !main_#t~switch1386;main_#t~switch1386 := main_#t~switch1386 || 1 == main_~tmp___0~20; VAL [ULTIMATE.start_he_init_~tmp~46=0, ULTIMATE.start_main_~ldv_s_he_driver_pci_driver~0=0, ULTIMATE.start_main_~ldv_s_he_ops_atmdev_ops~0=0, ULTIMATE.start_main_~tmp___0~20=3, ULTIMATE.start_main_~tmp___1~14=(- 1), ULTIMATE.start_main_~tmp~47=0, ULTIMATE.start_main_~var_group1~0.base=174, ULTIMATE.start_main_~var_group1~0.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1039.base|=41, |#t~string1039.offset|=0, |#t~string1044.base|=147, |#t~string1044.offset|=0, |#t~string1048.base|=146, |#t~string1048.offset|=0, |#t~string1085.base|=144, |#t~string1085.offset|=0, |#t~string1121.base|=143, |#t~string1121.offset|=0, |#t~string1123.base|=142, |#t~string1123.offset|=0, |#t~string1124.base|=141, |#t~string1124.offset|=0, |#t~string1133.base|=139, |#t~string1133.offset|=0, |#t~string1157.base|=138, |#t~string1157.offset|=0, |#t~string1185.base|=135, |#t~string1185.offset|=0, |#t~string1191.base|=103, |#t~string1191.offset|=0, |#t~string1199.base|=134, |#t~string1199.offset|=0, |#t~string1214.base|=133, |#t~string1214.offset|=0, |#t~string1222.base|=131, |#t~string1222.offset|=0, |#t~string1238.base|=130, |#t~string1238.offset|=0, |#t~string1250.base|=129, |#t~string1250.offset|=0, |#t~string1319.base|=127, |#t~string1319.offset|=0, |#t~string1321.base|=126, |#t~string1321.offset|=0, |#t~string1323.base|=125, |#t~string1323.offset|=0, |#t~string1324.base|=124, |#t~string1324.offset|=0, |#t~string1327.base|=123, |#t~string1327.offset|=0, |#t~string1337.base|=122, |#t~string1337.offset|=0, |#t~string1339.base|=121, |#t~string1339.offset|=0, |#t~string1342.base|=119, |#t~string1342.offset|=0, |#t~string1344.base|=118, |#t~string1344.offset|=0, |#t~string1347.base|=117, |#t~string1347.offset|=0, |#t~string1350.base|=113, |#t~string1350.offset|=0, |#t~string1352.base|=110, |#t~string1352.offset|=0, |#t~string1356.base|=111, |#t~string1356.offset|=0, |#t~string1377.base|=160, |#t~string1377.offset|=0, |#t~string1378.base|=105, |#t~string1378.offset|=0, |#t~string163.base|=95, |#t~string163.offset|=0, |#t~string322.base|=94, |#t~string322.offset|=0, |#t~string326.base|=93, |#t~string326.offset|=0, |#t~string327.base|=92, |#t~string327.offset|=0, |#t~string333.base|=91, |#t~string333.offset|=0, |#t~string380.base|=90, |#t~string380.offset|=0, |#t~string410.base|=89, |#t~string410.offset|=0, |#t~string416.base|=87, |#t~string416.offset|=0, |#t~string418.base|=86, |#t~string418.offset|=0, |#t~string423.base|=85, |#t~string423.offset|=0, |#t~string429.base|=84, |#t~string429.offset|=0, |#t~string452.base|=82, |#t~string452.offset|=0, |#t~string462.base|=81, |#t~string462.offset|=0, |#t~string470.base|=79, |#t~string470.offset|=0, |#t~string498.base|=78, |#t~string498.offset|=0, |#t~string528.base|=76, |#t~string528.offset|=0, |#t~string531.base|=75, |#t~string531.offset|=0, |#t~string542.base|=74, |#t~string542.offset|=0, |#t~string548.base|=73, |#t~string548.offset|=0, |#t~string552.base|=71, |#t~string552.offset|=0, |#t~string558.base|=69, |#t~string558.offset|=0, |#t~string562.base|=67, |#t~string562.offset|=0, |#t~string568.base|=66, |#t~string568.offset|=0, |#t~string573.base|=65, |#t~string573.offset|=0, |#t~string579.base|=63, |#t~string579.offset|=0, |#t~string584.base|=62, |#t~string584.offset|=0, |#t~string591.base|=61, |#t~string591.offset|=0, |#t~string598.base|=59, |#t~string598.offset|=0, |#t~string603.base|=58, |#t~string603.offset|=0, |#t~string611.base|=55, |#t~string611.offset|=0, |#t~string614.base|=54, |#t~string614.offset|=0, |#t~string615.base|=53, |#t~string615.offset|=0, |#t~string640.base|=50, |#t~string640.offset|=0, |#t~string742.base|=51, |#t~string742.offset|=0, |#t~string747.base|=109, |#t~string747.offset|=0, |#t~string770.base|=106, |#t~string770.offset|=0, |#t~string81.base|=26, |#t~string81.offset|=0, |#t~string82.base|=97, |#t~string82.offset|=0, |#t~string892.base|=107, |#t~string892.offset|=0, |#t~string902.base|=150, |#t~string902.offset|=0, |#t~string963.base|=149, |#t~string963.offset|=0, |ULTIMATE.start_he_init_#res|=0, |ULTIMATE.start_main_#t~malloc1383.base|=174, |ULTIMATE.start_main_#t~malloc1383.offset|=0, |ULTIMATE.start_main_#t~switch1386|=false, |~#__this_module~0.base|=158, |~#__this_module~0.offset|=170, |~#clocktab~0.base|=155, |~#clocktab~0.offset|=0, |~#he_driver~0.base|=17, |~#he_driver~0.offset|=0, |~#he_ops~0.base|=99, |~#he_ops~0.offset|=0, |~#he_pci_tbl~0.base|=167, |~#he_pci_tbl~0.offset|=0, |~#readtab~0.base|=49, |~#readtab~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=(- 1), ~nvpibits~0=(- 1), ~rx_skb_reserve~0=16, ~sdh~0=0] [?] assume !main_#t~switch1386;main_#t~switch1386 := main_#t~switch1386 || 2 == main_~tmp___0~20; VAL [ULTIMATE.start_he_init_~tmp~46=0, ULTIMATE.start_main_~ldv_s_he_driver_pci_driver~0=0, ULTIMATE.start_main_~ldv_s_he_ops_atmdev_ops~0=0, ULTIMATE.start_main_~tmp___0~20=3, ULTIMATE.start_main_~tmp___1~14=(- 1), ULTIMATE.start_main_~tmp~47=0, ULTIMATE.start_main_~var_group1~0.base=174, ULTIMATE.start_main_~var_group1~0.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1039.base|=41, |#t~string1039.offset|=0, |#t~string1044.base|=147, |#t~string1044.offset|=0, |#t~string1048.base|=146, |#t~string1048.offset|=0, |#t~string1085.base|=144, |#t~string1085.offset|=0, |#t~string1121.base|=143, |#t~string1121.offset|=0, |#t~string1123.base|=142, |#t~string1123.offset|=0, |#t~string1124.base|=141, |#t~string1124.offset|=0, |#t~string1133.base|=139, |#t~string1133.offset|=0, |#t~string1157.base|=138, |#t~string1157.offset|=0, |#t~string1185.base|=135, |#t~string1185.offset|=0, |#t~string1191.base|=103, |#t~string1191.offset|=0, |#t~string1199.base|=134, |#t~string1199.offset|=0, |#t~string1214.base|=133, |#t~string1214.offset|=0, |#t~string1222.base|=131, |#t~string1222.offset|=0, |#t~string1238.base|=130, |#t~string1238.offset|=0, |#t~string1250.base|=129, |#t~string1250.offset|=0, |#t~string1319.base|=127, |#t~string1319.offset|=0, |#t~string1321.base|=126, |#t~string1321.offset|=0, |#t~string1323.base|=125, |#t~string1323.offset|=0, |#t~string1324.base|=124, |#t~string1324.offset|=0, |#t~string1327.base|=123, |#t~string1327.offset|=0, |#t~string1337.base|=122, |#t~string1337.offset|=0, |#t~string1339.base|=121, |#t~string1339.offset|=0, |#t~string1342.base|=119, |#t~string1342.offset|=0, |#t~string1344.base|=118, |#t~string1344.offset|=0, |#t~string1347.base|=117, |#t~string1347.offset|=0, |#t~string1350.base|=113, |#t~string1350.offset|=0, |#t~string1352.base|=110, |#t~string1352.offset|=0, |#t~string1356.base|=111, |#t~string1356.offset|=0, |#t~string1377.base|=160, |#t~string1377.offset|=0, |#t~string1378.base|=105, |#t~string1378.offset|=0, |#t~string163.base|=95, |#t~string163.offset|=0, |#t~string322.base|=94, |#t~string322.offset|=0, |#t~string326.base|=93, |#t~string326.offset|=0, |#t~string327.base|=92, |#t~string327.offset|=0, |#t~string333.base|=91, |#t~string333.offset|=0, |#t~string380.base|=90, |#t~string380.offset|=0, |#t~string410.base|=89, |#t~string410.offset|=0, |#t~string416.base|=87, |#t~string416.offset|=0, |#t~string418.base|=86, |#t~string418.offset|=0, |#t~string423.base|=85, |#t~string423.offset|=0, |#t~string429.base|=84, |#t~string429.offset|=0, |#t~string452.base|=82, |#t~string452.offset|=0, |#t~string462.base|=81, |#t~string462.offset|=0, |#t~string470.base|=79, |#t~string470.offset|=0, |#t~string498.base|=78, |#t~string498.offset|=0, |#t~string528.base|=76, |#t~string528.offset|=0, |#t~string531.base|=75, |#t~string531.offset|=0, |#t~string542.base|=74, |#t~string542.offset|=0, |#t~string548.base|=73, |#t~string548.offset|=0, |#t~string552.base|=71, |#t~string552.offset|=0, |#t~string558.base|=69, |#t~string558.offset|=0, |#t~string562.base|=67, |#t~string562.offset|=0, |#t~string568.base|=66, |#t~string568.offset|=0, |#t~string573.base|=65, |#t~string573.offset|=0, |#t~string579.base|=63, |#t~string579.offset|=0, |#t~string584.base|=62, |#t~string584.offset|=0, |#t~string591.base|=61, |#t~string591.offset|=0, |#t~string598.base|=59, |#t~string598.offset|=0, |#t~string603.base|=58, |#t~string603.offset|=0, |#t~string611.base|=55, |#t~string611.offset|=0, |#t~string614.base|=54, |#t~string614.offset|=0, |#t~string615.base|=53, |#t~string615.offset|=0, |#t~string640.base|=50, |#t~string640.offset|=0, |#t~string742.base|=51, |#t~string742.offset|=0, |#t~string747.base|=109, |#t~string747.offset|=0, |#t~string770.base|=106, |#t~string770.offset|=0, |#t~string81.base|=26, |#t~string81.offset|=0, |#t~string82.base|=97, |#t~string82.offset|=0, |#t~string892.base|=107, |#t~string892.offset|=0, |#t~string902.base|=150, |#t~string902.offset|=0, |#t~string963.base|=149, |#t~string963.offset|=0, |ULTIMATE.start_he_init_#res|=0, |ULTIMATE.start_main_#t~malloc1383.base|=174, |ULTIMATE.start_main_#t~malloc1383.offset|=0, |ULTIMATE.start_main_#t~switch1386|=false, |~#__this_module~0.base|=158, |~#__this_module~0.offset|=170, |~#clocktab~0.base|=155, |~#clocktab~0.offset|=0, |~#he_driver~0.base|=17, |~#he_driver~0.offset|=0, |~#he_ops~0.base|=99, |~#he_ops~0.offset|=0, |~#he_pci_tbl~0.base|=167, |~#he_pci_tbl~0.offset|=0, |~#readtab~0.base|=49, |~#readtab~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=(- 1), ~nvpibits~0=(- 1), ~rx_skb_reserve~0=16, ~sdh~0=0] [?] assume !main_#t~switch1386;main_#t~switch1386 := main_#t~switch1386 || 3 == main_~tmp___0~20; VAL [ULTIMATE.start_he_init_~tmp~46=0, ULTIMATE.start_main_~ldv_s_he_driver_pci_driver~0=0, ULTIMATE.start_main_~ldv_s_he_ops_atmdev_ops~0=0, ULTIMATE.start_main_~tmp___0~20=3, ULTIMATE.start_main_~tmp___1~14=(- 1), ULTIMATE.start_main_~tmp~47=0, ULTIMATE.start_main_~var_group1~0.base=174, ULTIMATE.start_main_~var_group1~0.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1039.base|=41, |#t~string1039.offset|=0, |#t~string1044.base|=147, |#t~string1044.offset|=0, |#t~string1048.base|=146, |#t~string1048.offset|=0, |#t~string1085.base|=144, |#t~string1085.offset|=0, |#t~string1121.base|=143, |#t~string1121.offset|=0, |#t~string1123.base|=142, |#t~string1123.offset|=0, |#t~string1124.base|=141, |#t~string1124.offset|=0, |#t~string1133.base|=139, |#t~string1133.offset|=0, |#t~string1157.base|=138, |#t~string1157.offset|=0, |#t~string1185.base|=135, |#t~string1185.offset|=0, |#t~string1191.base|=103, |#t~string1191.offset|=0, |#t~string1199.base|=134, |#t~string1199.offset|=0, |#t~string1214.base|=133, |#t~string1214.offset|=0, |#t~string1222.base|=131, |#t~string1222.offset|=0, |#t~string1238.base|=130, |#t~string1238.offset|=0, |#t~string1250.base|=129, |#t~string1250.offset|=0, |#t~string1319.base|=127, |#t~string1319.offset|=0, |#t~string1321.base|=126, |#t~string1321.offset|=0, |#t~string1323.base|=125, |#t~string1323.offset|=0, |#t~string1324.base|=124, |#t~string1324.offset|=0, |#t~string1327.base|=123, |#t~string1327.offset|=0, |#t~string1337.base|=122, |#t~string1337.offset|=0, |#t~string1339.base|=121, |#t~string1339.offset|=0, |#t~string1342.base|=119, |#t~string1342.offset|=0, |#t~string1344.base|=118, |#t~string1344.offset|=0, |#t~string1347.base|=117, |#t~string1347.offset|=0, |#t~string1350.base|=113, |#t~string1350.offset|=0, |#t~string1352.base|=110, |#t~string1352.offset|=0, |#t~string1356.base|=111, |#t~string1356.offset|=0, |#t~string1377.base|=160, |#t~string1377.offset|=0, |#t~string1378.base|=105, |#t~string1378.offset|=0, |#t~string163.base|=95, |#t~string163.offset|=0, |#t~string322.base|=94, |#t~string322.offset|=0, |#t~string326.base|=93, |#t~string326.offset|=0, |#t~string327.base|=92, |#t~string327.offset|=0, |#t~string333.base|=91, |#t~string333.offset|=0, |#t~string380.base|=90, |#t~string380.offset|=0, |#t~string410.base|=89, |#t~string410.offset|=0, |#t~string416.base|=87, |#t~string416.offset|=0, |#t~string418.base|=86, |#t~string418.offset|=0, |#t~string423.base|=85, |#t~string423.offset|=0, |#t~string429.base|=84, |#t~string429.offset|=0, |#t~string452.base|=82, |#t~string452.offset|=0, |#t~string462.base|=81, |#t~string462.offset|=0, |#t~string470.base|=79, |#t~string470.offset|=0, |#t~string498.base|=78, |#t~string498.offset|=0, |#t~string528.base|=76, |#t~string528.offset|=0, |#t~string531.base|=75, |#t~string531.offset|=0, |#t~string542.base|=74, |#t~string542.offset|=0, |#t~string548.base|=73, |#t~string548.offset|=0, |#t~string552.base|=71, |#t~string552.offset|=0, |#t~string558.base|=69, |#t~string558.offset|=0, |#t~string562.base|=67, |#t~string562.offset|=0, |#t~string568.base|=66, |#t~string568.offset|=0, |#t~string573.base|=65, |#t~string573.offset|=0, |#t~string579.base|=63, |#t~string579.offset|=0, |#t~string584.base|=62, |#t~string584.offset|=0, |#t~string591.base|=61, |#t~string591.offset|=0, |#t~string598.base|=59, |#t~string598.offset|=0, |#t~string603.base|=58, |#t~string603.offset|=0, |#t~string611.base|=55, |#t~string611.offset|=0, |#t~string614.base|=54, |#t~string614.offset|=0, |#t~string615.base|=53, |#t~string615.offset|=0, |#t~string640.base|=50, |#t~string640.offset|=0, |#t~string742.base|=51, |#t~string742.offset|=0, |#t~string747.base|=109, |#t~string747.offset|=0, |#t~string770.base|=106, |#t~string770.offset|=0, |#t~string81.base|=26, |#t~string81.offset|=0, |#t~string82.base|=97, |#t~string82.offset|=0, |#t~string892.base|=107, |#t~string892.offset|=0, |#t~string902.base|=150, |#t~string902.offset|=0, |#t~string963.base|=149, |#t~string963.offset|=0, |ULTIMATE.start_he_init_#res|=0, |ULTIMATE.start_main_#t~malloc1383.base|=174, |ULTIMATE.start_main_#t~malloc1383.offset|=0, |ULTIMATE.start_main_#t~switch1386|=true, |~#__this_module~0.base|=158, |~#__this_module~0.offset|=170, |~#clocktab~0.base|=155, |~#clocktab~0.offset|=0, |~#he_driver~0.base|=17, |~#he_driver~0.offset|=0, |~#he_ops~0.base|=99, |~#he_ops~0.offset|=0, |~#he_pci_tbl~0.base|=167, |~#he_pci_tbl~0.offset|=0, |~#readtab~0.base|=49, |~#readtab~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=(- 1), ~nvpibits~0=(- 1), ~rx_skb_reserve~0=16, ~sdh~0=0] [?] assume main_#t~switch1386;call ldv_handler_precall();he_send_#in~vcc.base, he_send_#in~vcc.offset, he_send_#in~skb.base, he_send_#in~skb.offset := main_~var_group1~0.base, main_~var_group1~0.offset, main_~var_group3~0.base, main_~var_group3~0.offset;havoc he_send_#res;havoc he_send_#t~mem1227.base, he_send_#t~mem1227.offset, he_send_#t~mem1228.base, he_send_#t~mem1228.offset, he_send_#t~mem1229, he_send_#t~mem1230, he_send_#t~mem1231, he_send_#t~mem1232, he_send_#t~mem1233, he_send_#t~mem1234, he_send_#t~short1235, he_send_#t~short1236, he_send_#t~nondet1237, he_send_#t~mem1239, he_send_#t~mem1240, he_send_#t~mem1241.base, he_send_#t~mem1241.offset, he_send_#t~mem1245.base, he_send_#t~mem1245.offset, he_send_#t~mem1246.base, he_send_#t~mem1246.offset, he_send_#t~ret1247.base, he_send_#t~ret1247.offset, he_send_#t~mem1248, he_send_#t~nondet1249, he_send_#t~mem1251, he_send_#t~mem1252.base, he_send_#t~mem1252.offset, he_send_#t~mem1256.base, he_send_#t~mem1256.offset, he_send_#t~mem1257.base, he_send_#t~mem1257.offset, he_send_#t~ret1258.base, he_send_#t~ret1258.offset, he_send_#t~mem1259.base, he_send_#t~mem1259.offset, he_send_#t~mem1263.base, he_send_#t~mem1263.offset, he_send_#t~mem1264.base, he_send_#t~mem1264.offset, he_send_#t~mem1265, he_send_#t~mem1266, he_send_#t~mem1267.base, he_send_#t~mem1267.offset, he_send_#t~mem1268, he_send_#t~mem1269, he_send_#t~mem1270, he_send_#t~mem1271, he_send_#t~ret1272.base, he_send_#t~ret1272.offset, he_send_#t~mem1273.base, he_send_#t~mem1273.offset, he_send_#t~mem1274.base, he_send_#t~mem1274.offset, he_send_#t~mem1275, he_send_#t~ret1276, he_send_#t~mem1277, he_send_#t~mem1278, he_send_#t~mem1279.base, he_send_#t~mem1279.offset, he_send_~vcc.base, he_send_~vcc.offset, he_send_~skb.base, he_send_~skb.offset, he_send_~flags~4, he_send_~he_dev~7.base, he_send_~he_dev~7.offset, he_send_~cid~3, he_send_~tpd~3.base, he_send_~tpd~3.offset, he_send_~tmp~42.base, he_send_~tmp~42.offset, he_send_~pti_clp~0.base, he_send_~pti_clp~0.offset, he_send_~clp~0, he_send_~pti~0, he_send_~tmp___0~16;he_send_~vcc.base, he_send_~vcc.offset := he_send_#in~vcc.base, he_send_#in~vcc.offset;he_send_~skb.base, he_send_~skb.offset := he_send_#in~skb.base, he_send_#in~skb.offset;havoc he_send_~flags~4;havoc he_send_~he_dev~7.base, he_send_~he_dev~7.offset;havoc he_send_~cid~3;havoc he_send_~tpd~3.base, he_send_~tpd~3.offset;havoc he_send_~tmp~42.base, he_send_~tmp~42.offset;havoc he_send_~pti_clp~0.base, he_send_~pti_clp~0.offset;havoc he_send_~clp~0;havoc he_send_~pti~0;havoc he_send_~tmp___0~16;call he_send_#t~mem1227.base, he_send_#t~mem1227.offset := read~$Pointer$(he_send_~vcc.base, 1279 + he_send_~vcc.offset, 8);call he_send_#t~mem1228.base, he_send_#t~mem1228.offset := read~$Pointer$(he_send_#t~mem1227.base, 28 + he_send_#t~mem1227.offset, 8);he_send_~he_dev~7.base, he_send_~he_dev~7.offset := he_send_#t~mem1228.base, he_send_#t~mem1228.offset;havoc he_send_#t~mem1227.base, he_send_#t~mem1227.offset;havoc he_send_#t~mem1228.base, he_send_#t~mem1228.offset;call he_send_#t~mem1229 := read~int(he_send_~vcc.base, 1257 + he_send_~vcc.offset, 2);call he_send_#t~mem1230 := read~int(he_send_~he_dev~7.base, 56 + he_send_~he_dev~7.offset, 4);call he_send_#t~mem1231 := read~int(he_send_~vcc.base, 1259 + he_send_~vcc.offset, 4);he_send_~cid~3 := ~bitwiseAnd(~bitwiseOr(~shiftLeft(he_send_#t~mem1229, (if he_send_#t~mem1230 % 4294967296 % 4294967296 <= 2147483647 then he_send_#t~mem1230 % 4294967296 % 4294967296 else he_send_#t~mem1230 % 4294967296 % 4294967296 - 4294967296)), he_send_#t~mem1231), 8191);havoc he_send_#t~mem1229;havoc he_send_#t~mem1230;havoc he_send_#t~mem1231;call he_send_#t~mem1232 := read~int(he_send_~skb.base, 104 + he_send_~skb.offset, 4);he_send_#t~short1236 := he_send_#t~mem1232 % 4294967296 > 65535;BeginParallelComposition{ParallelCodeBlock0: assume he_send_#t~short1236;ParallelCodeBlock1: assume !he_send_#t~short1236;call he_send_#t~mem1233 := read~int(he_send_~vcc.base, 1379 + he_send_~vcc.offset, 1);he_send_#t~short1235 := 13 == he_send_#t~mem1233 % 256 % 4294967296;BeginParallelComposition{ParallelCodeBlock0: assume he_send_#t~short1235;call he_send_#t~mem1234 := read~int(he_send_~skb.base, 104 + he_send_~skb.offset, 4);he_send_#t~short1235 := 52 != he_send_#t~mem1234 % 4294967296;ParallelCodeBlock1: assume !he_send_#t~short1235;}EndParallelCompositionhe_send_#t~short1236 := he_send_#t~short1235;}EndParallelComposition VAL [ULTIMATE.start_he_init_~tmp~46=0, ULTIMATE.start_he_send_~he_dev~7.base=176, ULTIMATE.start_he_send_~he_dev~7.offset=5382, ULTIMATE.start_he_send_~skb.base=174, ULTIMATE.start_he_send_~skb.offset=1349, ULTIMATE.start_he_send_~vcc.base=174, ULTIMATE.start_he_send_~vcc.offset=0, ULTIMATE.start_main_~ldv_s_he_driver_pci_driver~0=0, ULTIMATE.start_main_~ldv_s_he_ops_atmdev_ops~0=0, ULTIMATE.start_main_~tmp___0~20=3, ULTIMATE.start_main_~tmp___1~14=(- 1), ULTIMATE.start_main_~tmp~47=0, ULTIMATE.start_main_~var_group1~0.base=174, ULTIMATE.start_main_~var_group1~0.offset=0, ULTIMATE.start_main_~var_group3~0.base=174, ULTIMATE.start_main_~var_group3~0.offset=1349, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1039.base|=41, |#t~string1039.offset|=0, |#t~string1044.base|=147, |#t~string1044.offset|=0, |#t~string1048.base|=146, |#t~string1048.offset|=0, |#t~string1085.base|=144, |#t~string1085.offset|=0, |#t~string1121.base|=143, |#t~string1121.offset|=0, |#t~string1123.base|=142, |#t~string1123.offset|=0, |#t~string1124.base|=141, |#t~string1124.offset|=0, |#t~string1133.base|=139, |#t~string1133.offset|=0, |#t~string1157.base|=138, |#t~string1157.offset|=0, |#t~string1185.base|=135, |#t~string1185.offset|=0, |#t~string1191.base|=103, |#t~string1191.offset|=0, |#t~string1199.base|=134, |#t~string1199.offset|=0, |#t~string1214.base|=133, |#t~string1214.offset|=0, |#t~string1222.base|=131, |#t~string1222.offset|=0, |#t~string1238.base|=130, |#t~string1238.offset|=0, |#t~string1250.base|=129, |#t~string1250.offset|=0, |#t~string1319.base|=127, |#t~string1319.offset|=0, |#t~string1321.base|=126, |#t~string1321.offset|=0, |#t~string1323.base|=125, |#t~string1323.offset|=0, |#t~string1324.base|=124, |#t~string1324.offset|=0, |#t~string1327.base|=123, |#t~string1327.offset|=0, |#t~string1337.base|=122, |#t~string1337.offset|=0, |#t~string1339.base|=121, |#t~string1339.offset|=0, |#t~string1342.base|=119, |#t~string1342.offset|=0, |#t~string1344.base|=118, |#t~string1344.offset|=0, |#t~string1347.base|=117, |#t~string1347.offset|=0, |#t~string1350.base|=113, |#t~string1350.offset|=0, |#t~string1352.base|=110, |#t~string1352.offset|=0, |#t~string1356.base|=111, |#t~string1356.offset|=0, |#t~string1377.base|=160, |#t~string1377.offset|=0, |#t~string1378.base|=105, |#t~string1378.offset|=0, |#t~string163.base|=95, |#t~string163.offset|=0, |#t~string322.base|=94, |#t~string322.offset|=0, |#t~string326.base|=93, |#t~string326.offset|=0, |#t~string327.base|=92, |#t~string327.offset|=0, |#t~string333.base|=91, |#t~string333.offset|=0, |#t~string380.base|=90, |#t~string380.offset|=0, |#t~string410.base|=89, |#t~string410.offset|=0, |#t~string416.base|=87, |#t~string416.offset|=0, |#t~string418.base|=86, |#t~string418.offset|=0, |#t~string423.base|=85, |#t~string423.offset|=0, |#t~string429.base|=84, |#t~string429.offset|=0, |#t~string452.base|=82, |#t~string452.offset|=0, |#t~string462.base|=81, |#t~string462.offset|=0, |#t~string470.base|=79, |#t~string470.offset|=0, |#t~string498.base|=78, |#t~string498.offset|=0, |#t~string528.base|=76, |#t~string528.offset|=0, |#t~string531.base|=75, |#t~string531.offset|=0, |#t~string542.base|=74, |#t~string542.offset|=0, |#t~string548.base|=73, |#t~string548.offset|=0, |#t~string552.base|=71, |#t~string552.offset|=0, |#t~string558.base|=69, |#t~string558.offset|=0, |#t~string562.base|=67, |#t~string562.offset|=0, |#t~string568.base|=66, |#t~string568.offset|=0, |#t~string573.base|=65, |#t~string573.offset|=0, |#t~string579.base|=63, |#t~string579.offset|=0, |#t~string584.base|=62, |#t~string584.offset|=0, |#t~string591.base|=61, |#t~string591.offset|=0, |#t~string598.base|=59, |#t~string598.offset|=0, |#t~string603.base|=58, |#t~string603.offset|=0, |#t~string611.base|=55, |#t~string611.offset|=0, |#t~string614.base|=54, |#t~string614.offset|=0, |#t~string615.base|=53, |#t~string615.offset|=0, |#t~string640.base|=50, |#t~string640.offset|=0, |#t~string742.base|=51, |#t~string742.offset|=0, |#t~string747.base|=109, |#t~string747.offset|=0, |#t~string770.base|=106, |#t~string770.offset|=0, |#t~string81.base|=26, |#t~string81.offset|=0, |#t~string82.base|=97, |#t~string82.offset|=0, |#t~string892.base|=107, |#t~string892.offset|=0, |#t~string902.base|=150, |#t~string902.offset|=0, |#t~string963.base|=149, |#t~string963.offset|=0, |ULTIMATE.start_he_init_#res|=0, |ULTIMATE.start_he_send_#in~skb.base|=174, |ULTIMATE.start_he_send_#in~skb.offset|=1349, |ULTIMATE.start_he_send_#in~vcc.base|=174, |ULTIMATE.start_he_send_#in~vcc.offset|=0, |ULTIMATE.start_he_send_#t~mem1232|=14551349198900, |ULTIMATE.start_he_send_#t~mem1233|=2284557, |ULTIMATE.start_he_send_#t~mem1234|=14551349198900, |ULTIMATE.start_he_send_#t~short1235|=false, |ULTIMATE.start_he_send_#t~short1236|=false, |ULTIMATE.start_main_#t~malloc1383.base|=174, |ULTIMATE.start_main_#t~malloc1383.offset|=0, |ULTIMATE.start_main_#t~switch1386|=true, |~#__this_module~0.base|=158, |~#__this_module~0.offset|=170, |~#clocktab~0.base|=155, |~#clocktab~0.offset|=0, |~#he_driver~0.base|=17, |~#he_driver~0.offset|=0, |~#he_ops~0.base|=99, |~#he_ops~0.offset|=0, |~#he_pci_tbl~0.base|=167, |~#he_pci_tbl~0.offset|=0, |~#readtab~0.base|=49, |~#readtab~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=(- 1), ~nvpibits~0=(- 1), ~rx_skb_reserve~0=16, ~sdh~0=0] [?] assume !he_send_#t~short1236;havoc he_send_#t~mem1233;havoc he_send_#t~mem1234;havoc he_send_#t~short1235;havoc he_send_#t~short1236;havoc he_send_#t~mem1232;skb_end_pointer_#in~skb.base, skb_end_pointer_#in~skb.offset := he_send_~skb.base, he_send_~skb.offset;havoc skb_end_pointer_#res.base, skb_end_pointer_#res.offset;havoc skb_end_pointer_#t~mem181.base, skb_end_pointer_#t~mem181.offset, skb_end_pointer_#t~mem182, skb_end_pointer_~skb.base, skb_end_pointer_~skb.offset;skb_end_pointer_~skb.base, skb_end_pointer_~skb.offset := skb_end_pointer_#in~skb.base, skb_end_pointer_#in~skb.offset;call skb_end_pointer_#t~mem181.base, skb_end_pointer_#t~mem181.offset := read~$Pointer$(skb_end_pointer_~skb.base, 239 + skb_end_pointer_~skb.offset, 8);call skb_end_pointer_#t~mem182 := read~int(skb_end_pointer_~skb.base, 235 + skb_end_pointer_~skb.offset, 4);skb_end_pointer_#res.base, skb_end_pointer_#res.offset := skb_end_pointer_#t~mem181.base, skb_end_pointer_#t~mem181.offset + (if skb_end_pointer_#t~mem182 % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then skb_end_pointer_#t~mem182 % 4294967296 % 18446744073709551616 % 18446744073709551616 else skb_end_pointer_#t~mem182 % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);havoc skb_end_pointer_#t~mem182;havoc skb_end_pointer_#t~mem181.base, skb_end_pointer_#t~mem181.offset;he_send_#t~ret1247.base, he_send_#t~ret1247.offset := skb_end_pointer_#res.base, skb_end_pointer_#res.offset;he_send_~tmp~42.base, he_send_~tmp~42.offset := he_send_#t~ret1247.base, he_send_#t~ret1247.offset;havoc he_send_#t~ret1247.base, he_send_#t~ret1247.offset;call he_send_#t~mem1248 := read~int(he_send_~tmp~42.base, he_send_~tmp~42.offset, 1); VAL [ULTIMATE.start_he_init_~tmp~46=0, ULTIMATE.start_he_send_~he_dev~7.base=176, ULTIMATE.start_he_send_~he_dev~7.offset=5382, ULTIMATE.start_he_send_~skb.base=174, ULTIMATE.start_he_send_~skb.offset=1349, ULTIMATE.start_he_send_~tmp~42.base=174, ULTIMATE.start_he_send_~tmp~42.offset=1419, ULTIMATE.start_he_send_~vcc.base=174, ULTIMATE.start_he_send_~vcc.offset=0, ULTIMATE.start_main_~ldv_s_he_driver_pci_driver~0=0, ULTIMATE.start_main_~ldv_s_he_ops_atmdev_ops~0=0, ULTIMATE.start_main_~tmp___0~20=3, ULTIMATE.start_main_~tmp___1~14=(- 1), ULTIMATE.start_main_~tmp~47=0, ULTIMATE.start_main_~var_group1~0.base=174, ULTIMATE.start_main_~var_group1~0.offset=0, ULTIMATE.start_main_~var_group3~0.base=174, ULTIMATE.start_main_~var_group3~0.offset=1349, ULTIMATE.start_skb_end_pointer_~skb.base=174, ULTIMATE.start_skb_end_pointer_~skb.offset=1349, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1039.base|=41, |#t~string1039.offset|=0, |#t~string1044.base|=147, |#t~string1044.offset|=0, |#t~string1048.base|=146, |#t~string1048.offset|=0, |#t~string1085.base|=144, |#t~string1085.offset|=0, |#t~string1121.base|=143, |#t~string1121.offset|=0, |#t~string1123.base|=142, |#t~string1123.offset|=0, |#t~string1124.base|=141, |#t~string1124.offset|=0, |#t~string1133.base|=139, |#t~string1133.offset|=0, |#t~string1157.base|=138, |#t~string1157.offset|=0, |#t~string1185.base|=135, |#t~string1185.offset|=0, |#t~string1191.base|=103, |#t~string1191.offset|=0, |#t~string1199.base|=134, |#t~string1199.offset|=0, |#t~string1214.base|=133, |#t~string1214.offset|=0, |#t~string1222.base|=131, |#t~string1222.offset|=0, |#t~string1238.base|=130, |#t~string1238.offset|=0, |#t~string1250.base|=129, |#t~string1250.offset|=0, |#t~string1319.base|=127, |#t~string1319.offset|=0, |#t~string1321.base|=126, |#t~string1321.offset|=0, |#t~string1323.base|=125, |#t~string1323.offset|=0, |#t~string1324.base|=124, |#t~string1324.offset|=0, |#t~string1327.base|=123, |#t~string1327.offset|=0, |#t~string1337.base|=122, |#t~string1337.offset|=0, |#t~string1339.base|=121, |#t~string1339.offset|=0, |#t~string1342.base|=119, |#t~string1342.offset|=0, |#t~string1344.base|=118, |#t~string1344.offset|=0, |#t~string1347.base|=117, |#t~string1347.offset|=0, |#t~string1350.base|=113, |#t~string1350.offset|=0, |#t~string1352.base|=110, |#t~string1352.offset|=0, |#t~string1356.base|=111, |#t~string1356.offset|=0, |#t~string1377.base|=160, |#t~string1377.offset|=0, |#t~string1378.base|=105, |#t~string1378.offset|=0, |#t~string163.base|=95, |#t~string163.offset|=0, |#t~string322.base|=94, |#t~string322.offset|=0, |#t~string326.base|=93, |#t~string326.offset|=0, |#t~string327.base|=92, |#t~string327.offset|=0, |#t~string333.base|=91, |#t~string333.offset|=0, |#t~string380.base|=90, |#t~string380.offset|=0, |#t~string410.base|=89, |#t~string410.offset|=0, |#t~string416.base|=87, |#t~string416.offset|=0, |#t~string418.base|=86, |#t~string418.offset|=0, |#t~string423.base|=85, |#t~string423.offset|=0, |#t~string429.base|=84, |#t~string429.offset|=0, |#t~string452.base|=82, |#t~string452.offset|=0, |#t~string462.base|=81, |#t~string462.offset|=0, |#t~string470.base|=79, |#t~string470.offset|=0, |#t~string498.base|=78, |#t~string498.offset|=0, |#t~string528.base|=76, |#t~string528.offset|=0, |#t~string531.base|=75, |#t~string531.offset|=0, |#t~string542.base|=74, |#t~string542.offset|=0, |#t~string548.base|=73, |#t~string548.offset|=0, |#t~string552.base|=71, |#t~string552.offset|=0, |#t~string558.base|=69, |#t~string558.offset|=0, |#t~string562.base|=67, |#t~string562.offset|=0, |#t~string568.base|=66, |#t~string568.offset|=0, |#t~string573.base|=65, |#t~string573.offset|=0, |#t~string579.base|=63, |#t~string579.offset|=0, |#t~string584.base|=62, |#t~string584.offset|=0, |#t~string591.base|=61, |#t~string591.offset|=0, |#t~string598.base|=59, |#t~string598.offset|=0, |#t~string603.base|=58, |#t~string603.offset|=0, |#t~string611.base|=55, |#t~string611.offset|=0, |#t~string614.base|=54, |#t~string614.offset|=0, |#t~string615.base|=53, |#t~string615.offset|=0, |#t~string640.base|=50, |#t~string640.offset|=0, |#t~string742.base|=51, |#t~string742.offset|=0, |#t~string747.base|=109, |#t~string747.offset|=0, |#t~string770.base|=106, |#t~string770.offset|=0, |#t~string81.base|=26, |#t~string81.offset|=0, |#t~string82.base|=97, |#t~string82.offset|=0, |#t~string892.base|=107, |#t~string892.offset|=0, |#t~string902.base|=150, |#t~string902.offset|=0, |#t~string963.base|=149, |#t~string963.offset|=0, |ULTIMATE.start_he_init_#res|=0, |ULTIMATE.start_he_send_#in~skb.base|=174, |ULTIMATE.start_he_send_#in~skb.offset|=1349, |ULTIMATE.start_he_send_#in~vcc.base|=174, |ULTIMATE.start_he_send_#in~vcc.offset|=0, |ULTIMATE.start_he_send_#t~mem1248|=1391872, |ULTIMATE.start_main_#t~malloc1383.base|=174, |ULTIMATE.start_main_#t~malloc1383.offset|=0, |ULTIMATE.start_main_#t~switch1386|=true, |ULTIMATE.start_skb_end_pointer_#in~skb.base|=174, |ULTIMATE.start_skb_end_pointer_#in~skb.offset|=1349, |ULTIMATE.start_skb_end_pointer_#res.base|=174, |ULTIMATE.start_skb_end_pointer_#res.offset|=1419, |~#__this_module~0.base|=158, |~#__this_module~0.offset|=170, |~#clocktab~0.base|=155, |~#clocktab~0.offset|=0, |~#he_driver~0.base|=17, |~#he_driver~0.offset|=0, |~#he_ops~0.base|=99, |~#he_ops~0.offset|=0, |~#he_pci_tbl~0.base|=167, |~#he_pci_tbl~0.offset|=0, |~#readtab~0.base|=49, |~#readtab~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=(- 1), ~nvpibits~0=(- 1), ~rx_skb_reserve~0=16, ~sdh~0=0] [?] assume !(0 != he_send_#t~mem1248 % 256 % 4294967296);havoc he_send_#t~mem1248; VAL [ULTIMATE.start_he_init_~tmp~46=0, ULTIMATE.start_he_send_~he_dev~7.base=176, ULTIMATE.start_he_send_~he_dev~7.offset=5382, ULTIMATE.start_he_send_~skb.base=174, ULTIMATE.start_he_send_~skb.offset=1349, ULTIMATE.start_he_send_~tmp~42.base=174, ULTIMATE.start_he_send_~tmp~42.offset=1419, ULTIMATE.start_he_send_~vcc.base=174, ULTIMATE.start_he_send_~vcc.offset=0, ULTIMATE.start_main_~ldv_s_he_driver_pci_driver~0=0, ULTIMATE.start_main_~ldv_s_he_ops_atmdev_ops~0=0, ULTIMATE.start_main_~tmp___0~20=3, ULTIMATE.start_main_~tmp___1~14=(- 1), ULTIMATE.start_main_~tmp~47=0, ULTIMATE.start_main_~var_group1~0.base=174, ULTIMATE.start_main_~var_group1~0.offset=0, ULTIMATE.start_main_~var_group3~0.base=174, ULTIMATE.start_main_~var_group3~0.offset=1349, ULTIMATE.start_skb_end_pointer_~skb.base=174, ULTIMATE.start_skb_end_pointer_~skb.offset=1349, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1039.base|=41, |#t~string1039.offset|=0, |#t~string1044.base|=147, |#t~string1044.offset|=0, |#t~string1048.base|=146, |#t~string1048.offset|=0, |#t~string1085.base|=144, |#t~string1085.offset|=0, |#t~string1121.base|=143, |#t~string1121.offset|=0, |#t~string1123.base|=142, |#t~string1123.offset|=0, |#t~string1124.base|=141, |#t~string1124.offset|=0, |#t~string1133.base|=139, |#t~string1133.offset|=0, |#t~string1157.base|=138, |#t~string1157.offset|=0, |#t~string1185.base|=135, |#t~string1185.offset|=0, |#t~string1191.base|=103, |#t~string1191.offset|=0, |#t~string1199.base|=134, |#t~string1199.offset|=0, |#t~string1214.base|=133, |#t~string1214.offset|=0, |#t~string1222.base|=131, |#t~string1222.offset|=0, |#t~string1238.base|=130, |#t~string1238.offset|=0, |#t~string1250.base|=129, |#t~string1250.offset|=0, |#t~string1319.base|=127, |#t~string1319.offset|=0, |#t~string1321.base|=126, |#t~string1321.offset|=0, |#t~string1323.base|=125, |#t~string1323.offset|=0, |#t~string1324.base|=124, |#t~string1324.offset|=0, |#t~string1327.base|=123, |#t~string1327.offset|=0, |#t~string1337.base|=122, |#t~string1337.offset|=0, |#t~string1339.base|=121, |#t~string1339.offset|=0, |#t~string1342.base|=119, |#t~string1342.offset|=0, |#t~string1344.base|=118, |#t~string1344.offset|=0, |#t~string1347.base|=117, |#t~string1347.offset|=0, |#t~string1350.base|=113, |#t~string1350.offset|=0, |#t~string1352.base|=110, |#t~string1352.offset|=0, |#t~string1356.base|=111, |#t~string1356.offset|=0, |#t~string1377.base|=160, |#t~string1377.offset|=0, |#t~string1378.base|=105, |#t~string1378.offset|=0, |#t~string163.base|=95, |#t~string163.offset|=0, |#t~string322.base|=94, |#t~string322.offset|=0, |#t~string326.base|=93, |#t~string326.offset|=0, |#t~string327.base|=92, |#t~string327.offset|=0, |#t~string333.base|=91, |#t~string333.offset|=0, |#t~string380.base|=90, |#t~string380.offset|=0, |#t~string410.base|=89, |#t~string410.offset|=0, |#t~string416.base|=87, |#t~string416.offset|=0, |#t~string418.base|=86, |#t~string418.offset|=0, |#t~string423.base|=85, |#t~string423.offset|=0, |#t~string429.base|=84, |#t~string429.offset|=0, |#t~string452.base|=82, |#t~string452.offset|=0, |#t~string462.base|=81, |#t~string462.offset|=0, |#t~string470.base|=79, |#t~string470.offset|=0, |#t~string498.base|=78, |#t~string498.offset|=0, |#t~string528.base|=76, |#t~string528.offset|=0, |#t~string531.base|=75, |#t~string531.offset|=0, |#t~string542.base|=74, |#t~string542.offset|=0, |#t~string548.base|=73, |#t~string548.offset|=0, |#t~string552.base|=71, |#t~string552.offset|=0, |#t~string558.base|=69, |#t~string558.offset|=0, |#t~string562.base|=67, |#t~string562.offset|=0, |#t~string568.base|=66, |#t~string568.offset|=0, |#t~string573.base|=65, |#t~string573.offset|=0, |#t~string579.base|=63, |#t~string579.offset|=0, |#t~string584.base|=62, |#t~string584.offset|=0, |#t~string591.base|=61, |#t~string591.offset|=0, |#t~string598.base|=59, |#t~string598.offset|=0, |#t~string603.base|=58, |#t~string603.offset|=0, |#t~string611.base|=55, |#t~string611.offset|=0, |#t~string614.base|=54, |#t~string614.offset|=0, |#t~string615.base|=53, |#t~string615.offset|=0, |#t~string640.base|=50, |#t~string640.offset|=0, |#t~string742.base|=51, |#t~string742.offset|=0, |#t~string747.base|=109, |#t~string747.offset|=0, |#t~string770.base|=106, |#t~string770.offset|=0, |#t~string81.base|=26, |#t~string81.offset|=0, |#t~string82.base|=97, |#t~string82.offset|=0, |#t~string892.base|=107, |#t~string892.offset|=0, |#t~string902.base|=150, |#t~string902.offset|=0, |#t~string963.base|=149, |#t~string963.offset|=0, |ULTIMATE.start_he_init_#res|=0, |ULTIMATE.start_he_send_#in~skb.base|=174, |ULTIMATE.start_he_send_#in~skb.offset|=1349, |ULTIMATE.start_he_send_#in~vcc.base|=174, |ULTIMATE.start_he_send_#in~vcc.offset|=0, |ULTIMATE.start_main_#t~malloc1383.base|=174, |ULTIMATE.start_main_#t~malloc1383.offset|=0, |ULTIMATE.start_main_#t~switch1386|=true, |ULTIMATE.start_skb_end_pointer_#in~skb.base|=174, |ULTIMATE.start_skb_end_pointer_#in~skb.offset|=1349, |ULTIMATE.start_skb_end_pointer_#res.base|=174, |ULTIMATE.start_skb_end_pointer_#res.offset|=1419, |~#__this_module~0.base|=158, |~#__this_module~0.offset|=170, |~#clocktab~0.base|=155, |~#clocktab~0.offset|=0, |~#he_driver~0.base|=17, |~#he_driver~0.offset|=0, |~#he_ops~0.base|=99, |~#he_ops~0.offset|=0, |~#he_pci_tbl~0.base|=167, |~#he_pci_tbl~0.offset|=0, |~#readtab~0.base|=49, |~#readtab~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=(- 1), ~nvpibits~0=(- 1), ~rx_skb_reserve~0=16, ~sdh~0=0] [?] CALL call ldv_spin_lock(); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1039.base|=41, |#t~string1039.offset|=0, |#t~string1044.base|=147, |#t~string1044.offset|=0, |#t~string1048.base|=146, |#t~string1048.offset|=0, |#t~string1085.base|=144, |#t~string1085.offset|=0, |#t~string1121.base|=143, |#t~string1121.offset|=0, |#t~string1123.base|=142, |#t~string1123.offset|=0, |#t~string1124.base|=141, |#t~string1124.offset|=0, |#t~string1133.base|=139, |#t~string1133.offset|=0, |#t~string1157.base|=138, |#t~string1157.offset|=0, |#t~string1185.base|=135, |#t~string1185.offset|=0, |#t~string1191.base|=103, |#t~string1191.offset|=0, |#t~string1199.base|=134, |#t~string1199.offset|=0, |#t~string1214.base|=133, |#t~string1214.offset|=0, |#t~string1222.base|=131, |#t~string1222.offset|=0, |#t~string1238.base|=130, |#t~string1238.offset|=0, |#t~string1250.base|=129, |#t~string1250.offset|=0, |#t~string1319.base|=127, |#t~string1319.offset|=0, |#t~string1321.base|=126, |#t~string1321.offset|=0, |#t~string1323.base|=125, |#t~string1323.offset|=0, |#t~string1324.base|=124, |#t~string1324.offset|=0, |#t~string1327.base|=123, |#t~string1327.offset|=0, |#t~string1337.base|=122, |#t~string1337.offset|=0, |#t~string1339.base|=121, |#t~string1339.offset|=0, |#t~string1342.base|=119, |#t~string1342.offset|=0, |#t~string1344.base|=118, |#t~string1344.offset|=0, |#t~string1347.base|=117, |#t~string1347.offset|=0, |#t~string1350.base|=113, |#t~string1350.offset|=0, |#t~string1352.base|=110, |#t~string1352.offset|=0, |#t~string1356.base|=111, |#t~string1356.offset|=0, |#t~string1377.base|=160, |#t~string1377.offset|=0, |#t~string1378.base|=105, |#t~string1378.offset|=0, |#t~string163.base|=95, |#t~string163.offset|=0, |#t~string322.base|=94, |#t~string322.offset|=0, |#t~string326.base|=93, |#t~string326.offset|=0, |#t~string327.base|=92, |#t~string327.offset|=0, |#t~string333.base|=91, |#t~string333.offset|=0, |#t~string380.base|=90, |#t~string380.offset|=0, |#t~string410.base|=89, |#t~string410.offset|=0, |#t~string416.base|=87, |#t~string416.offset|=0, |#t~string418.base|=86, |#t~string418.offset|=0, |#t~string423.base|=85, |#t~string423.offset|=0, |#t~string429.base|=84, |#t~string429.offset|=0, |#t~string452.base|=82, |#t~string452.offset|=0, |#t~string462.base|=81, |#t~string462.offset|=0, |#t~string470.base|=79, |#t~string470.offset|=0, |#t~string498.base|=78, |#t~string498.offset|=0, |#t~string528.base|=76, |#t~string528.offset|=0, |#t~string531.base|=75, |#t~string531.offset|=0, |#t~string542.base|=74, |#t~string542.offset|=0, |#t~string548.base|=73, |#t~string548.offset|=0, |#t~string552.base|=71, |#t~string552.offset|=0, |#t~string558.base|=69, |#t~string558.offset|=0, |#t~string562.base|=67, |#t~string562.offset|=0, |#t~string568.base|=66, |#t~string568.offset|=0, |#t~string573.base|=65, |#t~string573.offset|=0, |#t~string579.base|=63, |#t~string579.offset|=0, |#t~string584.base|=62, |#t~string584.offset|=0, |#t~string591.base|=61, |#t~string591.offset|=0, |#t~string598.base|=59, |#t~string598.offset|=0, |#t~string603.base|=58, |#t~string603.offset|=0, |#t~string611.base|=55, |#t~string611.offset|=0, |#t~string614.base|=54, |#t~string614.offset|=0, |#t~string615.base|=53, |#t~string615.offset|=0, |#t~string640.base|=50, |#t~string640.offset|=0, |#t~string742.base|=51, |#t~string742.offset|=0, |#t~string747.base|=109, |#t~string747.offset|=0, |#t~string770.base|=106, |#t~string770.offset|=0, |#t~string81.base|=26, |#t~string81.offset|=0, |#t~string82.base|=97, |#t~string82.offset|=0, |#t~string892.base|=107, |#t~string892.offset|=0, |#t~string902.base|=150, |#t~string902.offset|=0, |#t~string963.base|=149, |#t~string963.offset|=0, |old(~ldv_spin~0)|=0, |~#__this_module~0.base|=158, |~#__this_module~0.offset|=170, |~#clocktab~0.base|=155, |~#clocktab~0.offset|=0, |~#he_driver~0.base|=17, |~#he_driver~0.offset|=0, |~#he_ops~0.base|=99, |~#he_ops~0.offset|=0, |~#he_pci_tbl~0.base|=167, |~#he_pci_tbl~0.offset|=0, |~#readtab~0.base|=49, |~#readtab~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=(- 1), ~nvpibits~0=(- 1), ~rx_skb_reserve~0=16, ~sdh~0=0] [?] ~ldv_spin~0 := 1;assume true; VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1039.base|=41, |#t~string1039.offset|=0, |#t~string1044.base|=147, |#t~string1044.offset|=0, |#t~string1048.base|=146, |#t~string1048.offset|=0, |#t~string1085.base|=144, |#t~string1085.offset|=0, |#t~string1121.base|=143, |#t~string1121.offset|=0, |#t~string1123.base|=142, |#t~string1123.offset|=0, |#t~string1124.base|=141, |#t~string1124.offset|=0, |#t~string1133.base|=139, |#t~string1133.offset|=0, |#t~string1157.base|=138, |#t~string1157.offset|=0, |#t~string1185.base|=135, |#t~string1185.offset|=0, |#t~string1191.base|=103, |#t~string1191.offset|=0, |#t~string1199.base|=134, |#t~string1199.offset|=0, |#t~string1214.base|=133, |#t~string1214.offset|=0, |#t~string1222.base|=131, |#t~string1222.offset|=0, |#t~string1238.base|=130, |#t~string1238.offset|=0, |#t~string1250.base|=129, |#t~string1250.offset|=0, |#t~string1319.base|=127, |#t~string1319.offset|=0, |#t~string1321.base|=126, |#t~string1321.offset|=0, |#t~string1323.base|=125, |#t~string1323.offset|=0, |#t~string1324.base|=124, |#t~string1324.offset|=0, |#t~string1327.base|=123, |#t~string1327.offset|=0, |#t~string1337.base|=122, |#t~string1337.offset|=0, |#t~string1339.base|=121, |#t~string1339.offset|=0, |#t~string1342.base|=119, |#t~string1342.offset|=0, |#t~string1344.base|=118, |#t~string1344.offset|=0, |#t~string1347.base|=117, |#t~string1347.offset|=0, |#t~string1350.base|=113, |#t~string1350.offset|=0, |#t~string1352.base|=110, |#t~string1352.offset|=0, |#t~string1356.base|=111, |#t~string1356.offset|=0, |#t~string1377.base|=160, |#t~string1377.offset|=0, |#t~string1378.base|=105, |#t~string1378.offset|=0, |#t~string163.base|=95, |#t~string163.offset|=0, |#t~string322.base|=94, |#t~string322.offset|=0, |#t~string326.base|=93, |#t~string326.offset|=0, |#t~string327.base|=92, |#t~string327.offset|=0, |#t~string333.base|=91, |#t~string333.offset|=0, |#t~string380.base|=90, |#t~string380.offset|=0, |#t~string410.base|=89, |#t~string410.offset|=0, |#t~string416.base|=87, |#t~string416.offset|=0, |#t~string418.base|=86, |#t~string418.offset|=0, |#t~string423.base|=85, |#t~string423.offset|=0, |#t~string429.base|=84, |#t~string429.offset|=0, |#t~string452.base|=82, |#t~string452.offset|=0, |#t~string462.base|=81, |#t~string462.offset|=0, |#t~string470.base|=79, |#t~string470.offset|=0, |#t~string498.base|=78, |#t~string498.offset|=0, |#t~string528.base|=76, |#t~string528.offset|=0, |#t~string531.base|=75, |#t~string531.offset|=0, |#t~string542.base|=74, |#t~string542.offset|=0, |#t~string548.base|=73, |#t~string548.offset|=0, |#t~string552.base|=71, |#t~string552.offset|=0, |#t~string558.base|=69, |#t~string558.offset|=0, |#t~string562.base|=67, |#t~string562.offset|=0, |#t~string568.base|=66, |#t~string568.offset|=0, |#t~string573.base|=65, |#t~string573.offset|=0, |#t~string579.base|=63, |#t~string579.offset|=0, |#t~string584.base|=62, |#t~string584.offset|=0, |#t~string591.base|=61, |#t~string591.offset|=0, |#t~string598.base|=59, |#t~string598.offset|=0, |#t~string603.base|=58, |#t~string603.offset|=0, |#t~string611.base|=55, |#t~string611.offset|=0, |#t~string614.base|=54, |#t~string614.offset|=0, |#t~string615.base|=53, |#t~string615.offset|=0, |#t~string640.base|=50, |#t~string640.offset|=0, |#t~string742.base|=51, |#t~string742.offset|=0, |#t~string747.base|=109, |#t~string747.offset|=0, |#t~string770.base|=106, |#t~string770.offset|=0, |#t~string81.base|=26, |#t~string81.offset|=0, |#t~string82.base|=97, |#t~string82.offset|=0, |#t~string892.base|=107, |#t~string892.offset|=0, |#t~string902.base|=150, |#t~string902.offset|=0, |#t~string963.base|=149, |#t~string963.offset|=0, |old(~ldv_spin~0)|=0, |~#__this_module~0.base|=158, |~#__this_module~0.offset|=170, |~#clocktab~0.base|=155, |~#clocktab~0.offset|=0, |~#he_driver~0.base|=17, |~#he_driver~0.offset|=0, |~#he_ops~0.base|=99, |~#he_ops~0.offset|=0, |~#he_pci_tbl~0.base|=167, |~#he_pci_tbl~0.offset|=0, |~#readtab~0.base|=49, |~#readtab~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=(- 1), ~nvpibits~0=(- 1), ~rx_skb_reserve~0=16, ~sdh~0=0] [?] RET #3063#return; VAL [ULTIMATE.start_he_init_~tmp~46=0, ULTIMATE.start_he_send_~he_dev~7.base=176, ULTIMATE.start_he_send_~he_dev~7.offset=5382, ULTIMATE.start_he_send_~skb.base=174, ULTIMATE.start_he_send_~skb.offset=1349, ULTIMATE.start_he_send_~tmp~42.base=174, ULTIMATE.start_he_send_~tmp~42.offset=1419, ULTIMATE.start_he_send_~vcc.base=174, ULTIMATE.start_he_send_~vcc.offset=0, ULTIMATE.start_main_~ldv_s_he_driver_pci_driver~0=0, ULTIMATE.start_main_~ldv_s_he_ops_atmdev_ops~0=0, ULTIMATE.start_main_~tmp___0~20=3, ULTIMATE.start_main_~tmp___1~14=(- 1), ULTIMATE.start_main_~tmp~47=0, ULTIMATE.start_main_~var_group1~0.base=174, ULTIMATE.start_main_~var_group1~0.offset=0, ULTIMATE.start_main_~var_group3~0.base=174, ULTIMATE.start_main_~var_group3~0.offset=1349, ULTIMATE.start_skb_end_pointer_~skb.base=174, ULTIMATE.start_skb_end_pointer_~skb.offset=1349, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1039.base|=41, |#t~string1039.offset|=0, |#t~string1044.base|=147, |#t~string1044.offset|=0, |#t~string1048.base|=146, |#t~string1048.offset|=0, |#t~string1085.base|=144, |#t~string1085.offset|=0, |#t~string1121.base|=143, |#t~string1121.offset|=0, |#t~string1123.base|=142, |#t~string1123.offset|=0, |#t~string1124.base|=141, |#t~string1124.offset|=0, |#t~string1133.base|=139, |#t~string1133.offset|=0, |#t~string1157.base|=138, |#t~string1157.offset|=0, |#t~string1185.base|=135, |#t~string1185.offset|=0, |#t~string1191.base|=103, |#t~string1191.offset|=0, |#t~string1199.base|=134, |#t~string1199.offset|=0, |#t~string1214.base|=133, |#t~string1214.offset|=0, |#t~string1222.base|=131, |#t~string1222.offset|=0, |#t~string1238.base|=130, |#t~string1238.offset|=0, |#t~string1250.base|=129, |#t~string1250.offset|=0, |#t~string1319.base|=127, |#t~string1319.offset|=0, |#t~string1321.base|=126, |#t~string1321.offset|=0, |#t~string1323.base|=125, |#t~string1323.offset|=0, |#t~string1324.base|=124, |#t~string1324.offset|=0, |#t~string1327.base|=123, |#t~string1327.offset|=0, |#t~string1337.base|=122, |#t~string1337.offset|=0, |#t~string1339.base|=121, |#t~string1339.offset|=0, |#t~string1342.base|=119, |#t~string1342.offset|=0, |#t~string1344.base|=118, |#t~string1344.offset|=0, |#t~string1347.base|=117, |#t~string1347.offset|=0, |#t~string1350.base|=113, |#t~string1350.offset|=0, |#t~string1352.base|=110, |#t~string1352.offset|=0, |#t~string1356.base|=111, |#t~string1356.offset|=0, |#t~string1377.base|=160, |#t~string1377.offset|=0, |#t~string1378.base|=105, |#t~string1378.offset|=0, |#t~string163.base|=95, |#t~string163.offset|=0, |#t~string322.base|=94, |#t~string322.offset|=0, |#t~string326.base|=93, |#t~string326.offset|=0, |#t~string327.base|=92, |#t~string327.offset|=0, |#t~string333.base|=91, |#t~string333.offset|=0, |#t~string380.base|=90, |#t~string380.offset|=0, |#t~string410.base|=89, |#t~string410.offset|=0, |#t~string416.base|=87, |#t~string416.offset|=0, |#t~string418.base|=86, |#t~string418.offset|=0, |#t~string423.base|=85, |#t~string423.offset|=0, |#t~string429.base|=84, |#t~string429.offset|=0, |#t~string452.base|=82, |#t~string452.offset|=0, |#t~string462.base|=81, |#t~string462.offset|=0, |#t~string470.base|=79, |#t~string470.offset|=0, |#t~string498.base|=78, |#t~string498.offset|=0, |#t~string528.base|=76, |#t~string528.offset|=0, |#t~string531.base|=75, |#t~string531.offset|=0, |#t~string542.base|=74, |#t~string542.offset|=0, |#t~string548.base|=73, |#t~string548.offset|=0, |#t~string552.base|=71, |#t~string552.offset|=0, |#t~string558.base|=69, |#t~string558.offset|=0, |#t~string562.base|=67, |#t~string562.offset|=0, |#t~string568.base|=66, |#t~string568.offset|=0, |#t~string573.base|=65, |#t~string573.offset|=0, |#t~string579.base|=63, |#t~string579.offset|=0, |#t~string584.base|=62, |#t~string584.offset|=0, |#t~string591.base|=61, |#t~string591.offset|=0, |#t~string598.base|=59, |#t~string598.offset|=0, |#t~string603.base|=58, |#t~string603.offset|=0, |#t~string611.base|=55, |#t~string611.offset|=0, |#t~string614.base|=54, |#t~string614.offset|=0, |#t~string615.base|=53, |#t~string615.offset|=0, |#t~string640.base|=50, |#t~string640.offset|=0, |#t~string742.base|=51, |#t~string742.offset|=0, |#t~string747.base|=109, |#t~string747.offset|=0, |#t~string770.base|=106, |#t~string770.offset|=0, |#t~string81.base|=26, |#t~string81.offset|=0, |#t~string82.base|=97, |#t~string82.offset|=0, |#t~string892.base|=107, |#t~string892.offset|=0, |#t~string902.base|=150, |#t~string902.offset|=0, |#t~string963.base|=149, |#t~string963.offset|=0, |ULTIMATE.start_he_init_#res|=0, |ULTIMATE.start_he_send_#in~skb.base|=174, |ULTIMATE.start_he_send_#in~skb.offset|=1349, |ULTIMATE.start_he_send_#in~vcc.base|=174, |ULTIMATE.start_he_send_#in~vcc.offset|=0, |ULTIMATE.start_main_#t~malloc1383.base|=174, |ULTIMATE.start_main_#t~malloc1383.offset|=0, |ULTIMATE.start_main_#t~switch1386|=true, |ULTIMATE.start_skb_end_pointer_#in~skb.base|=174, |ULTIMATE.start_skb_end_pointer_#in~skb.offset|=1349, |ULTIMATE.start_skb_end_pointer_#res.base|=174, |ULTIMATE.start_skb_end_pointer_#res.offset|=1419, |~#__this_module~0.base|=158, |~#__this_module~0.offset|=170, |~#clocktab~0.base|=155, |~#clocktab~0.offset|=0, |~#he_driver~0.base|=17, |~#he_driver~0.offset|=0, |~#he_ops~0.base|=99, |~#he_ops~0.offset|=0, |~#he_pci_tbl~0.base|=167, |~#he_pci_tbl~0.offset|=0, |~#readtab~0.base|=49, |~#readtab~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=(- 1), ~nvpibits~0=(- 1), ~rx_skb_reserve~0=16, ~sdh~0=0] [?] CALL call he_send_#t~ret1258.base, he_send_#t~ret1258.offset := __alloc_tpd(he_send_~he_dev~7.base, he_send_~he_dev~7.offset); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1039.base|=41, |#t~string1039.offset|=0, |#t~string1044.base|=147, |#t~string1044.offset|=0, |#t~string1048.base|=146, |#t~string1048.offset|=0, |#t~string1085.base|=144, |#t~string1085.offset|=0, |#t~string1121.base|=143, |#t~string1121.offset|=0, |#t~string1123.base|=142, |#t~string1123.offset|=0, |#t~string1124.base|=141, |#t~string1124.offset|=0, |#t~string1133.base|=139, |#t~string1133.offset|=0, |#t~string1157.base|=138, |#t~string1157.offset|=0, |#t~string1185.base|=135, |#t~string1185.offset|=0, |#t~string1191.base|=103, |#t~string1191.offset|=0, |#t~string1199.base|=134, |#t~string1199.offset|=0, |#t~string1214.base|=133, |#t~string1214.offset|=0, |#t~string1222.base|=131, |#t~string1222.offset|=0, |#t~string1238.base|=130, |#t~string1238.offset|=0, |#t~string1250.base|=129, |#t~string1250.offset|=0, |#t~string1319.base|=127, |#t~string1319.offset|=0, |#t~string1321.base|=126, |#t~string1321.offset|=0, |#t~string1323.base|=125, |#t~string1323.offset|=0, |#t~string1324.base|=124, |#t~string1324.offset|=0, |#t~string1327.base|=123, |#t~string1327.offset|=0, |#t~string1337.base|=122, |#t~string1337.offset|=0, |#t~string1339.base|=121, |#t~string1339.offset|=0, |#t~string1342.base|=119, |#t~string1342.offset|=0, |#t~string1344.base|=118, |#t~string1344.offset|=0, |#t~string1347.base|=117, |#t~string1347.offset|=0, |#t~string1350.base|=113, |#t~string1350.offset|=0, |#t~string1352.base|=110, |#t~string1352.offset|=0, |#t~string1356.base|=111, |#t~string1356.offset|=0, |#t~string1377.base|=160, |#t~string1377.offset|=0, |#t~string1378.base|=105, |#t~string1378.offset|=0, |#t~string163.base|=95, |#t~string163.offset|=0, |#t~string322.base|=94, |#t~string322.offset|=0, |#t~string326.base|=93, |#t~string326.offset|=0, |#t~string327.base|=92, |#t~string327.offset|=0, |#t~string333.base|=91, |#t~string333.offset|=0, |#t~string380.base|=90, |#t~string380.offset|=0, |#t~string410.base|=89, |#t~string410.offset|=0, |#t~string416.base|=87, |#t~string416.offset|=0, |#t~string418.base|=86, |#t~string418.offset|=0, |#t~string423.base|=85, |#t~string423.offset|=0, |#t~string429.base|=84, |#t~string429.offset|=0, |#t~string452.base|=82, |#t~string452.offset|=0, |#t~string462.base|=81, |#t~string462.offset|=0, |#t~string470.base|=79, |#t~string470.offset|=0, |#t~string498.base|=78, |#t~string498.offset|=0, |#t~string528.base|=76, |#t~string528.offset|=0, |#t~string531.base|=75, |#t~string531.offset|=0, |#t~string542.base|=74, |#t~string542.offset|=0, |#t~string548.base|=73, |#t~string548.offset|=0, |#t~string552.base|=71, |#t~string552.offset|=0, |#t~string558.base|=69, |#t~string558.offset|=0, |#t~string562.base|=67, |#t~string562.offset|=0, |#t~string568.base|=66, |#t~string568.offset|=0, |#t~string573.base|=65, |#t~string573.offset|=0, |#t~string579.base|=63, |#t~string579.offset|=0, |#t~string584.base|=62, |#t~string584.offset|=0, |#t~string591.base|=61, |#t~string591.offset|=0, |#t~string598.base|=59, |#t~string598.offset|=0, |#t~string603.base|=58, |#t~string603.offset|=0, |#t~string611.base|=55, |#t~string611.offset|=0, |#t~string614.base|=54, |#t~string614.offset|=0, |#t~string615.base|=53, |#t~string615.offset|=0, |#t~string640.base|=50, |#t~string640.offset|=0, |#t~string742.base|=51, |#t~string742.offset|=0, |#t~string747.base|=109, |#t~string747.offset|=0, |#t~string770.base|=106, |#t~string770.offset|=0, |#t~string81.base|=26, |#t~string81.offset|=0, |#t~string82.base|=97, |#t~string82.offset|=0, |#t~string892.base|=107, |#t~string892.offset|=0, |#t~string902.base|=150, |#t~string902.offset|=0, |#t~string963.base|=149, |#t~string963.offset|=0, |__alloc_tpd_#in~he_dev.base|=176, |__alloc_tpd_#in~he_dev.offset|=5382, |~#__this_module~0.base|=158, |~#__this_module~0.offset|=170, |~#clocktab~0.base|=155, |~#clocktab~0.offset|=0, |~#he_driver~0.base|=17, |~#he_driver~0.offset|=0, |~#he_ops~0.base|=99, |~#he_ops~0.offset|=0, |~#he_pci_tbl~0.base|=167, |~#he_pci_tbl~0.offset|=0, |~#readtab~0.base|=49, |~#readtab~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=(- 1), ~nvpibits~0=(- 1), ~rx_skb_reserve~0=16, ~sdh~0=0] [?] ~he_dev.base, ~he_dev.offset := #in~he_dev.base, #in~he_dev.offset;havoc ~tpd~0.base, ~tpd~0.offset;call ~#mapping~1.base, ~#mapping~1.offset := #Ultimate.alloc(8);havoc ~tmp~35.base, ~tmp~35.offset;call #t~mem877.base, #t~mem877.offset := read~$Pointer$(~he_dev.base, 400 + ~he_dev.offset, 8);ldv_dma_pool_alloc_33_#in~ldv_func_arg1.base, ldv_dma_pool_alloc_33_#in~ldv_func_arg1.offset, ldv_dma_pool_alloc_33_#in~flags, ldv_dma_pool_alloc_33_#in~ldv_func_arg3.base, ldv_dma_pool_alloc_33_#in~ldv_func_arg3.offset := #t~mem877.base, #t~mem877.offset, 33, ~#mapping~1.base, ~#mapping~1.offset;havoc ldv_dma_pool_alloc_33_#res.base, ldv_dma_pool_alloc_33_#res.offset;havoc ldv_dma_pool_alloc_33_#t~ret1406.base, ldv_dma_pool_alloc_33_#t~ret1406.offset, ldv_dma_pool_alloc_33_~ldv_func_arg1.base, ldv_dma_pool_alloc_33_~ldv_func_arg1.offset, ldv_dma_pool_alloc_33_~flags, ldv_dma_pool_alloc_33_~ldv_func_arg3.base, ldv_dma_pool_alloc_33_~ldv_func_arg3.offset;ldv_dma_pool_alloc_33_~ldv_func_arg1.base, ldv_dma_pool_alloc_33_~ldv_func_arg1.offset := ldv_dma_pool_alloc_33_#in~ldv_func_arg1.base, ldv_dma_pool_alloc_33_#in~ldv_func_arg1.offset;ldv_dma_pool_alloc_33_~flags := ldv_dma_pool_alloc_33_#in~flags;ldv_dma_pool_alloc_33_~ldv_func_arg3.base, ldv_dma_pool_alloc_33_~ldv_func_arg3.offset := ldv_dma_pool_alloc_33_#in~ldv_func_arg3.base, ldv_dma_pool_alloc_33_#in~ldv_func_arg3.offset; VAL [__alloc_tpd_ldv_dma_pool_alloc_33_~flags=33, __alloc_tpd_ldv_dma_pool_alloc_33_~ldv_func_arg1.base=180, __alloc_tpd_ldv_dma_pool_alloc_33_~ldv_func_arg1.offset=183, __alloc_tpd_ldv_dma_pool_alloc_33_~ldv_func_arg3.base=179, __alloc_tpd_ldv_dma_pool_alloc_33_~ldv_func_arg3.offset=0, __alloc_tpd_~he_dev.base=176, __alloc_tpd_~he_dev.offset=5382, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1039.base|=41, |#t~string1039.offset|=0, |#t~string1044.base|=147, |#t~string1044.offset|=0, |#t~string1048.base|=146, |#t~string1048.offset|=0, |#t~string1085.base|=144, |#t~string1085.offset|=0, |#t~string1121.base|=143, |#t~string1121.offset|=0, |#t~string1123.base|=142, |#t~string1123.offset|=0, |#t~string1124.base|=141, |#t~string1124.offset|=0, |#t~string1133.base|=139, |#t~string1133.offset|=0, |#t~string1157.base|=138, |#t~string1157.offset|=0, |#t~string1185.base|=135, |#t~string1185.offset|=0, |#t~string1191.base|=103, |#t~string1191.offset|=0, |#t~string1199.base|=134, |#t~string1199.offset|=0, |#t~string1214.base|=133, |#t~string1214.offset|=0, |#t~string1222.base|=131, |#t~string1222.offset|=0, |#t~string1238.base|=130, |#t~string1238.offset|=0, |#t~string1250.base|=129, |#t~string1250.offset|=0, |#t~string1319.base|=127, |#t~string1319.offset|=0, |#t~string1321.base|=126, |#t~string1321.offset|=0, |#t~string1323.base|=125, |#t~string1323.offset|=0, |#t~string1324.base|=124, |#t~string1324.offset|=0, |#t~string1327.base|=123, |#t~string1327.offset|=0, |#t~string1337.base|=122, |#t~string1337.offset|=0, |#t~string1339.base|=121, |#t~string1339.offset|=0, |#t~string1342.base|=119, |#t~string1342.offset|=0, |#t~string1344.base|=118, |#t~string1344.offset|=0, |#t~string1347.base|=117, |#t~string1347.offset|=0, |#t~string1350.base|=113, |#t~string1350.offset|=0, |#t~string1352.base|=110, |#t~string1352.offset|=0, |#t~string1356.base|=111, |#t~string1356.offset|=0, |#t~string1377.base|=160, |#t~string1377.offset|=0, |#t~string1378.base|=105, |#t~string1378.offset|=0, |#t~string163.base|=95, |#t~string163.offset|=0, |#t~string322.base|=94, |#t~string322.offset|=0, |#t~string326.base|=93, |#t~string326.offset|=0, |#t~string327.base|=92, |#t~string327.offset|=0, |#t~string333.base|=91, |#t~string333.offset|=0, |#t~string380.base|=90, |#t~string380.offset|=0, |#t~string410.base|=89, |#t~string410.offset|=0, |#t~string416.base|=87, |#t~string416.offset|=0, |#t~string418.base|=86, |#t~string418.offset|=0, |#t~string423.base|=85, |#t~string423.offset|=0, |#t~string429.base|=84, |#t~string429.offset|=0, |#t~string452.base|=82, |#t~string452.offset|=0, |#t~string462.base|=81, |#t~string462.offset|=0, |#t~string470.base|=79, |#t~string470.offset|=0, |#t~string498.base|=78, |#t~string498.offset|=0, |#t~string528.base|=76, |#t~string528.offset|=0, |#t~string531.base|=75, |#t~string531.offset|=0, |#t~string542.base|=74, |#t~string542.offset|=0, |#t~string548.base|=73, |#t~string548.offset|=0, |#t~string552.base|=71, |#t~string552.offset|=0, |#t~string558.base|=69, |#t~string558.offset|=0, |#t~string562.base|=67, |#t~string562.offset|=0, |#t~string568.base|=66, |#t~string568.offset|=0, |#t~string573.base|=65, |#t~string573.offset|=0, |#t~string579.base|=63, |#t~string579.offset|=0, |#t~string584.base|=62, |#t~string584.offset|=0, |#t~string591.base|=61, |#t~string591.offset|=0, |#t~string598.base|=59, |#t~string598.offset|=0, |#t~string603.base|=58, |#t~string603.offset|=0, |#t~string611.base|=55, |#t~string611.offset|=0, |#t~string614.base|=54, |#t~string614.offset|=0, |#t~string615.base|=53, |#t~string615.offset|=0, |#t~string640.base|=50, |#t~string640.offset|=0, |#t~string742.base|=51, |#t~string742.offset|=0, |#t~string747.base|=109, |#t~string747.offset|=0, |#t~string770.base|=106, |#t~string770.offset|=0, |#t~string81.base|=26, |#t~string81.offset|=0, |#t~string82.base|=97, |#t~string82.offset|=0, |#t~string892.base|=107, |#t~string892.offset|=0, |#t~string902.base|=150, |#t~string902.offset|=0, |#t~string963.base|=149, |#t~string963.offset|=0, |__alloc_tpd_#in~he_dev.base|=176, |__alloc_tpd_#in~he_dev.offset|=5382, |__alloc_tpd_#t~mem877.base|=180, |__alloc_tpd_#t~mem877.offset|=183, |__alloc_tpd_ldv_dma_pool_alloc_33_#in~flags|=33, |__alloc_tpd_ldv_dma_pool_alloc_33_#in~ldv_func_arg1.base|=180, |__alloc_tpd_ldv_dma_pool_alloc_33_#in~ldv_func_arg1.offset|=183, |__alloc_tpd_ldv_dma_pool_alloc_33_#in~ldv_func_arg3.base|=179, |__alloc_tpd_ldv_dma_pool_alloc_33_#in~ldv_func_arg3.offset|=0, |__alloc_tpd_~#mapping~1.base|=179, |__alloc_tpd_~#mapping~1.offset|=0, |~#__this_module~0.base|=158, |~#__this_module~0.offset|=170, |~#clocktab~0.base|=155, |~#clocktab~0.offset|=0, |~#he_driver~0.base|=17, |~#he_driver~0.offset|=0, |~#he_ops~0.base|=99, |~#he_ops~0.offset|=0, |~#he_pci_tbl~0.base|=167, |~#he_pci_tbl~0.offset|=0, |~#readtab~0.base|=49, |~#readtab~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=(- 1), ~nvpibits~0=(- 1), ~rx_skb_reserve~0=16, ~sdh~0=0] [?] CALL call ldv_check_alloc_flags(ldv_dma_pool_alloc_33_~flags); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1039.base|=41, |#t~string1039.offset|=0, |#t~string1044.base|=147, |#t~string1044.offset|=0, |#t~string1048.base|=146, |#t~string1048.offset|=0, |#t~string1085.base|=144, |#t~string1085.offset|=0, |#t~string1121.base|=143, |#t~string1121.offset|=0, |#t~string1123.base|=142, |#t~string1123.offset|=0, |#t~string1124.base|=141, |#t~string1124.offset|=0, |#t~string1133.base|=139, |#t~string1133.offset|=0, |#t~string1157.base|=138, |#t~string1157.offset|=0, |#t~string1185.base|=135, |#t~string1185.offset|=0, |#t~string1191.base|=103, |#t~string1191.offset|=0, |#t~string1199.base|=134, |#t~string1199.offset|=0, |#t~string1214.base|=133, |#t~string1214.offset|=0, |#t~string1222.base|=131, |#t~string1222.offset|=0, |#t~string1238.base|=130, |#t~string1238.offset|=0, |#t~string1250.base|=129, |#t~string1250.offset|=0, |#t~string1319.base|=127, |#t~string1319.offset|=0, |#t~string1321.base|=126, |#t~string1321.offset|=0, |#t~string1323.base|=125, |#t~string1323.offset|=0, |#t~string1324.base|=124, |#t~string1324.offset|=0, |#t~string1327.base|=123, |#t~string1327.offset|=0, |#t~string1337.base|=122, |#t~string1337.offset|=0, |#t~string1339.base|=121, |#t~string1339.offset|=0, |#t~string1342.base|=119, |#t~string1342.offset|=0, |#t~string1344.base|=118, |#t~string1344.offset|=0, |#t~string1347.base|=117, |#t~string1347.offset|=0, |#t~string1350.base|=113, |#t~string1350.offset|=0, |#t~string1352.base|=110, |#t~string1352.offset|=0, |#t~string1356.base|=111, |#t~string1356.offset|=0, |#t~string1377.base|=160, |#t~string1377.offset|=0, |#t~string1378.base|=105, |#t~string1378.offset|=0, |#t~string163.base|=95, |#t~string163.offset|=0, |#t~string322.base|=94, |#t~string322.offset|=0, |#t~string326.base|=93, |#t~string326.offset|=0, |#t~string327.base|=92, |#t~string327.offset|=0, |#t~string333.base|=91, |#t~string333.offset|=0, |#t~string380.base|=90, |#t~string380.offset|=0, |#t~string410.base|=89, |#t~string410.offset|=0, |#t~string416.base|=87, |#t~string416.offset|=0, |#t~string418.base|=86, |#t~string418.offset|=0, |#t~string423.base|=85, |#t~string423.offset|=0, |#t~string429.base|=84, |#t~string429.offset|=0, |#t~string452.base|=82, |#t~string452.offset|=0, |#t~string462.base|=81, |#t~string462.offset|=0, |#t~string470.base|=79, |#t~string470.offset|=0, |#t~string498.base|=78, |#t~string498.offset|=0, |#t~string528.base|=76, |#t~string528.offset|=0, |#t~string531.base|=75, |#t~string531.offset|=0, |#t~string542.base|=74, |#t~string542.offset|=0, |#t~string548.base|=73, |#t~string548.offset|=0, |#t~string552.base|=71, |#t~string552.offset|=0, |#t~string558.base|=69, |#t~string558.offset|=0, |#t~string562.base|=67, |#t~string562.offset|=0, |#t~string568.base|=66, |#t~string568.offset|=0, |#t~string573.base|=65, |#t~string573.offset|=0, |#t~string579.base|=63, |#t~string579.offset|=0, |#t~string584.base|=62, |#t~string584.offset|=0, |#t~string591.base|=61, |#t~string591.offset|=0, |#t~string598.base|=59, |#t~string598.offset|=0, |#t~string603.base|=58, |#t~string603.offset|=0, |#t~string611.base|=55, |#t~string611.offset|=0, |#t~string614.base|=54, |#t~string614.offset|=0, |#t~string615.base|=53, |#t~string615.offset|=0, |#t~string640.base|=50, |#t~string640.offset|=0, |#t~string742.base|=51, |#t~string742.offset|=0, |#t~string747.base|=109, |#t~string747.offset|=0, |#t~string770.base|=106, |#t~string770.offset|=0, |#t~string81.base|=26, |#t~string81.offset|=0, |#t~string82.base|=97, |#t~string82.offset|=0, |#t~string892.base|=107, |#t~string892.offset|=0, |#t~string902.base|=150, |#t~string902.offset|=0, |#t~string963.base|=149, |#t~string963.offset|=0, |ldv_check_alloc_flags_#in~flags|=33, |~#__this_module~0.base|=158, |~#__this_module~0.offset|=170, |~#clocktab~0.base|=155, |~#clocktab~0.offset|=0, |~#he_driver~0.base|=17, |~#he_driver~0.offset|=0, |~#he_ops~0.base|=99, |~#he_ops~0.offset|=0, |~#he_pci_tbl~0.base|=167, |~#he_pci_tbl~0.offset|=0, |~#readtab~0.base|=49, |~#readtab~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=(- 1), ~nvpibits~0=(- 1), ~rx_skb_reserve~0=16, ~sdh~0=0] [?] ~flags := #in~flags; VAL [ldv_check_alloc_flags_~flags=33, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1039.base|=41, |#t~string1039.offset|=0, |#t~string1044.base|=147, |#t~string1044.offset|=0, |#t~string1048.base|=146, |#t~string1048.offset|=0, |#t~string1085.base|=144, |#t~string1085.offset|=0, |#t~string1121.base|=143, |#t~string1121.offset|=0, |#t~string1123.base|=142, |#t~string1123.offset|=0, |#t~string1124.base|=141, |#t~string1124.offset|=0, |#t~string1133.base|=139, |#t~string1133.offset|=0, |#t~string1157.base|=138, |#t~string1157.offset|=0, |#t~string1185.base|=135, |#t~string1185.offset|=0, |#t~string1191.base|=103, |#t~string1191.offset|=0, |#t~string1199.base|=134, |#t~string1199.offset|=0, |#t~string1214.base|=133, |#t~string1214.offset|=0, |#t~string1222.base|=131, |#t~string1222.offset|=0, |#t~string1238.base|=130, |#t~string1238.offset|=0, |#t~string1250.base|=129, |#t~string1250.offset|=0, |#t~string1319.base|=127, |#t~string1319.offset|=0, |#t~string1321.base|=126, |#t~string1321.offset|=0, |#t~string1323.base|=125, |#t~string1323.offset|=0, |#t~string1324.base|=124, |#t~string1324.offset|=0, |#t~string1327.base|=123, |#t~string1327.offset|=0, |#t~string1337.base|=122, |#t~string1337.offset|=0, |#t~string1339.base|=121, |#t~string1339.offset|=0, |#t~string1342.base|=119, |#t~string1342.offset|=0, |#t~string1344.base|=118, |#t~string1344.offset|=0, |#t~string1347.base|=117, |#t~string1347.offset|=0, |#t~string1350.base|=113, |#t~string1350.offset|=0, |#t~string1352.base|=110, |#t~string1352.offset|=0, |#t~string1356.base|=111, |#t~string1356.offset|=0, |#t~string1377.base|=160, |#t~string1377.offset|=0, |#t~string1378.base|=105, |#t~string1378.offset|=0, |#t~string163.base|=95, |#t~string163.offset|=0, |#t~string322.base|=94, |#t~string322.offset|=0, |#t~string326.base|=93, |#t~string326.offset|=0, |#t~string327.base|=92, |#t~string327.offset|=0, |#t~string333.base|=91, |#t~string333.offset|=0, |#t~string380.base|=90, |#t~string380.offset|=0, |#t~string410.base|=89, |#t~string410.offset|=0, |#t~string416.base|=87, |#t~string416.offset|=0, |#t~string418.base|=86, |#t~string418.offset|=0, |#t~string423.base|=85, |#t~string423.offset|=0, |#t~string429.base|=84, |#t~string429.offset|=0, |#t~string452.base|=82, |#t~string452.offset|=0, |#t~string462.base|=81, |#t~string462.offset|=0, |#t~string470.base|=79, |#t~string470.offset|=0, |#t~string498.base|=78, |#t~string498.offset|=0, |#t~string528.base|=76, |#t~string528.offset|=0, |#t~string531.base|=75, |#t~string531.offset|=0, |#t~string542.base|=74, |#t~string542.offset|=0, |#t~string548.base|=73, |#t~string548.offset|=0, |#t~string552.base|=71, |#t~string552.offset|=0, |#t~string558.base|=69, |#t~string558.offset|=0, |#t~string562.base|=67, |#t~string562.offset|=0, |#t~string568.base|=66, |#t~string568.offset|=0, |#t~string573.base|=65, |#t~string573.offset|=0, |#t~string579.base|=63, |#t~string579.offset|=0, |#t~string584.base|=62, |#t~string584.offset|=0, |#t~string591.base|=61, |#t~string591.offset|=0, |#t~string598.base|=59, |#t~string598.offset|=0, |#t~string603.base|=58, |#t~string603.offset|=0, |#t~string611.base|=55, |#t~string611.offset|=0, |#t~string614.base|=54, |#t~string614.offset|=0, |#t~string615.base|=53, |#t~string615.offset|=0, |#t~string640.base|=50, |#t~string640.offset|=0, |#t~string742.base|=51, |#t~string742.offset|=0, |#t~string747.base|=109, |#t~string747.offset|=0, |#t~string770.base|=106, |#t~string770.offset|=0, |#t~string81.base|=26, |#t~string81.offset|=0, |#t~string82.base|=97, |#t~string82.offset|=0, |#t~string892.base|=107, |#t~string892.offset|=0, |#t~string902.base|=150, |#t~string902.offset|=0, |#t~string963.base|=149, |#t~string963.offset|=0, |ldv_check_alloc_flags_#in~flags|=33, |~#__this_module~0.base|=158, |~#__this_module~0.offset|=170, |~#clocktab~0.base|=155, |~#clocktab~0.offset|=0, |~#he_driver~0.base|=17, |~#he_driver~0.offset|=0, |~#he_ops~0.base|=99, |~#he_ops~0.offset|=0, |~#he_pci_tbl~0.base|=167, |~#he_pci_tbl~0.offset|=0, |~#readtab~0.base|=49, |~#readtab~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=(- 1), ~nvpibits~0=(- 1), ~rx_skb_reserve~0=16, ~sdh~0=0] [?] assume !(0 == ~ldv_spin~0 || 0 != ~bitwiseAnd(~flags, 32) % 4294967296); VAL [ldv_check_alloc_flags_~flags=33, |#NULL.base|=0, |#NULL.offset|=0, |#t~string1039.base|=41, |#t~string1039.offset|=0, |#t~string1044.base|=147, |#t~string1044.offset|=0, |#t~string1048.base|=146, |#t~string1048.offset|=0, |#t~string1085.base|=144, |#t~string1085.offset|=0, |#t~string1121.base|=143, |#t~string1121.offset|=0, |#t~string1123.base|=142, |#t~string1123.offset|=0, |#t~string1124.base|=141, |#t~string1124.offset|=0, |#t~string1133.base|=139, |#t~string1133.offset|=0, |#t~string1157.base|=138, |#t~string1157.offset|=0, |#t~string1185.base|=135, |#t~string1185.offset|=0, |#t~string1191.base|=103, |#t~string1191.offset|=0, |#t~string1199.base|=134, |#t~string1199.offset|=0, |#t~string1214.base|=133, |#t~string1214.offset|=0, |#t~string1222.base|=131, |#t~string1222.offset|=0, |#t~string1238.base|=130, |#t~string1238.offset|=0, |#t~string1250.base|=129, |#t~string1250.offset|=0, |#t~string1319.base|=127, |#t~string1319.offset|=0, |#t~string1321.base|=126, |#t~string1321.offset|=0, |#t~string1323.base|=125, |#t~string1323.offset|=0, |#t~string1324.base|=124, |#t~string1324.offset|=0, |#t~string1327.base|=123, |#t~string1327.offset|=0, |#t~string1337.base|=122, |#t~string1337.offset|=0, |#t~string1339.base|=121, |#t~string1339.offset|=0, |#t~string1342.base|=119, |#t~string1342.offset|=0, |#t~string1344.base|=118, |#t~string1344.offset|=0, |#t~string1347.base|=117, |#t~string1347.offset|=0, |#t~string1350.base|=113, |#t~string1350.offset|=0, |#t~string1352.base|=110, |#t~string1352.offset|=0, |#t~string1356.base|=111, |#t~string1356.offset|=0, |#t~string1377.base|=160, |#t~string1377.offset|=0, |#t~string1378.base|=105, |#t~string1378.offset|=0, |#t~string163.base|=95, |#t~string163.offset|=0, |#t~string322.base|=94, |#t~string322.offset|=0, |#t~string326.base|=93, |#t~string326.offset|=0, |#t~string327.base|=92, |#t~string327.offset|=0, |#t~string333.base|=91, |#t~string333.offset|=0, |#t~string380.base|=90, |#t~string380.offset|=0, |#t~string410.base|=89, |#t~string410.offset|=0, |#t~string416.base|=87, |#t~string416.offset|=0, |#t~string418.base|=86, |#t~string418.offset|=0, |#t~string423.base|=85, |#t~string423.offset|=0, |#t~string429.base|=84, |#t~string429.offset|=0, |#t~string452.base|=82, |#t~string452.offset|=0, |#t~string462.base|=81, |#t~string462.offset|=0, |#t~string470.base|=79, |#t~string470.offset|=0, |#t~string498.base|=78, |#t~string498.offset|=0, |#t~string528.base|=76, |#t~string528.offset|=0, |#t~string531.base|=75, |#t~string531.offset|=0, |#t~string542.base|=74, |#t~string542.offset|=0, |#t~string548.base|=73, |#t~string548.offset|=0, |#t~string552.base|=71, |#t~string552.offset|=0, |#t~string558.base|=69, |#t~string558.offset|=0, |#t~string562.base|=67, |#t~string562.offset|=0, |#t~string568.base|=66, |#t~string568.offset|=0, |#t~string573.base|=65, |#t~string573.offset|=0, |#t~string579.base|=63, |#t~string579.offset|=0, |#t~string584.base|=62, |#t~string584.offset|=0, |#t~string591.base|=61, |#t~string591.offset|=0, |#t~string598.base|=59, |#t~string598.offset|=0, |#t~string603.base|=58, |#t~string603.offset|=0, |#t~string611.base|=55, |#t~string611.offset|=0, |#t~string614.base|=54, |#t~string614.offset|=0, |#t~string615.base|=53, |#t~string615.offset|=0, |#t~string640.base|=50, |#t~string640.offset|=0, |#t~string742.base|=51, |#t~string742.offset|=0, |#t~string747.base|=109, |#t~string747.offset|=0, |#t~string770.base|=106, |#t~string770.offset|=0, |#t~string81.base|=26, |#t~string81.offset|=0, |#t~string82.base|=97, |#t~string82.offset|=0, |#t~string892.base|=107, |#t~string892.offset|=0, |#t~string902.base|=150, |#t~string902.offset|=0, |#t~string963.base|=149, |#t~string963.offset|=0, |ldv_check_alloc_flags_#in~flags|=33, |~#__this_module~0.base|=158, |~#__this_module~0.offset|=170, |~#clocktab~0.base|=155, |~#clocktab~0.offset|=0, |~#he_driver~0.base|=17, |~#he_driver~0.offset|=0, |~#he_ops~0.base|=99, |~#he_ops~0.offset|=0, |~#he_pci_tbl~0.base|=167, |~#he_pci_tbl~0.offset|=0, |~#readtab~0.base|=49, |~#readtab~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=(- 1), ~nvpibits~0=(- 1), ~rx_skb_reserve~0=16, ~sdh~0=0] [?] CALL call ldv_error(); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1039.base|=41, |#t~string1039.offset|=0, |#t~string1044.base|=147, |#t~string1044.offset|=0, |#t~string1048.base|=146, |#t~string1048.offset|=0, |#t~string1085.base|=144, |#t~string1085.offset|=0, |#t~string1121.base|=143, |#t~string1121.offset|=0, |#t~string1123.base|=142, |#t~string1123.offset|=0, |#t~string1124.base|=141, |#t~string1124.offset|=0, |#t~string1133.base|=139, |#t~string1133.offset|=0, |#t~string1157.base|=138, |#t~string1157.offset|=0, |#t~string1185.base|=135, |#t~string1185.offset|=0, |#t~string1191.base|=103, |#t~string1191.offset|=0, |#t~string1199.base|=134, |#t~string1199.offset|=0, |#t~string1214.base|=133, |#t~string1214.offset|=0, |#t~string1222.base|=131, |#t~string1222.offset|=0, |#t~string1238.base|=130, |#t~string1238.offset|=0, |#t~string1250.base|=129, |#t~string1250.offset|=0, |#t~string1319.base|=127, |#t~string1319.offset|=0, |#t~string1321.base|=126, |#t~string1321.offset|=0, |#t~string1323.base|=125, |#t~string1323.offset|=0, |#t~string1324.base|=124, |#t~string1324.offset|=0, |#t~string1327.base|=123, |#t~string1327.offset|=0, |#t~string1337.base|=122, |#t~string1337.offset|=0, |#t~string1339.base|=121, |#t~string1339.offset|=0, |#t~string1342.base|=119, |#t~string1342.offset|=0, |#t~string1344.base|=118, |#t~string1344.offset|=0, |#t~string1347.base|=117, |#t~string1347.offset|=0, |#t~string1350.base|=113, |#t~string1350.offset|=0, |#t~string1352.base|=110, |#t~string1352.offset|=0, |#t~string1356.base|=111, |#t~string1356.offset|=0, |#t~string1377.base|=160, |#t~string1377.offset|=0, |#t~string1378.base|=105, |#t~string1378.offset|=0, |#t~string163.base|=95, |#t~string163.offset|=0, |#t~string322.base|=94, |#t~string322.offset|=0, |#t~string326.base|=93, |#t~string326.offset|=0, |#t~string327.base|=92, |#t~string327.offset|=0, |#t~string333.base|=91, |#t~string333.offset|=0, |#t~string380.base|=90, |#t~string380.offset|=0, |#t~string410.base|=89, |#t~string410.offset|=0, |#t~string416.base|=87, |#t~string416.offset|=0, |#t~string418.base|=86, |#t~string418.offset|=0, |#t~string423.base|=85, |#t~string423.offset|=0, |#t~string429.base|=84, |#t~string429.offset|=0, |#t~string452.base|=82, |#t~string452.offset|=0, |#t~string462.base|=81, |#t~string462.offset|=0, |#t~string470.base|=79, |#t~string470.offset|=0, |#t~string498.base|=78, |#t~string498.offset|=0, |#t~string528.base|=76, |#t~string528.offset|=0, |#t~string531.base|=75, |#t~string531.offset|=0, |#t~string542.base|=74, |#t~string542.offset|=0, |#t~string548.base|=73, |#t~string548.offset|=0, |#t~string552.base|=71, |#t~string552.offset|=0, |#t~string558.base|=69, |#t~string558.offset|=0, |#t~string562.base|=67, |#t~string562.offset|=0, |#t~string568.base|=66, |#t~string568.offset|=0, |#t~string573.base|=65, |#t~string573.offset|=0, |#t~string579.base|=63, |#t~string579.offset|=0, |#t~string584.base|=62, |#t~string584.offset|=0, |#t~string591.base|=61, |#t~string591.offset|=0, |#t~string598.base|=59, |#t~string598.offset|=0, |#t~string603.base|=58, |#t~string603.offset|=0, |#t~string611.base|=55, |#t~string611.offset|=0, |#t~string614.base|=54, |#t~string614.offset|=0, |#t~string615.base|=53, |#t~string615.offset|=0, |#t~string640.base|=50, |#t~string640.offset|=0, |#t~string742.base|=51, |#t~string742.offset|=0, |#t~string747.base|=109, |#t~string747.offset|=0, |#t~string770.base|=106, |#t~string770.offset|=0, |#t~string81.base|=26, |#t~string81.offset|=0, |#t~string82.base|=97, |#t~string82.offset|=0, |#t~string892.base|=107, |#t~string892.offset|=0, |#t~string902.base|=150, |#t~string902.offset|=0, |#t~string963.base|=149, |#t~string963.offset|=0, |~#__this_module~0.base|=158, |~#__this_module~0.offset|=170, |~#clocktab~0.base|=155, |~#clocktab~0.offset|=0, |~#he_driver~0.base|=17, |~#he_driver~0.offset|=0, |~#he_ops~0.base|=99, |~#he_ops~0.offset|=0, |~#he_pci_tbl~0.base|=167, |~#he_pci_tbl~0.offset|=0, |~#readtab~0.base|=49, |~#readtab~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=(- 1), ~nvpibits~0=(- 1), ~rx_skb_reserve~0=16, ~sdh~0=0] [?] assume !false; VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string1039.base|=41, |#t~string1039.offset|=0, |#t~string1044.base|=147, |#t~string1044.offset|=0, |#t~string1048.base|=146, |#t~string1048.offset|=0, |#t~string1085.base|=144, |#t~string1085.offset|=0, |#t~string1121.base|=143, |#t~string1121.offset|=0, |#t~string1123.base|=142, |#t~string1123.offset|=0, |#t~string1124.base|=141, |#t~string1124.offset|=0, |#t~string1133.base|=139, |#t~string1133.offset|=0, |#t~string1157.base|=138, |#t~string1157.offset|=0, |#t~string1185.base|=135, |#t~string1185.offset|=0, |#t~string1191.base|=103, |#t~string1191.offset|=0, |#t~string1199.base|=134, |#t~string1199.offset|=0, |#t~string1214.base|=133, |#t~string1214.offset|=0, |#t~string1222.base|=131, |#t~string1222.offset|=0, |#t~string1238.base|=130, |#t~string1238.offset|=0, |#t~string1250.base|=129, |#t~string1250.offset|=0, |#t~string1319.base|=127, |#t~string1319.offset|=0, |#t~string1321.base|=126, |#t~string1321.offset|=0, |#t~string1323.base|=125, |#t~string1323.offset|=0, |#t~string1324.base|=124, |#t~string1324.offset|=0, |#t~string1327.base|=123, |#t~string1327.offset|=0, |#t~string1337.base|=122, |#t~string1337.offset|=0, |#t~string1339.base|=121, |#t~string1339.offset|=0, |#t~string1342.base|=119, |#t~string1342.offset|=0, |#t~string1344.base|=118, |#t~string1344.offset|=0, |#t~string1347.base|=117, |#t~string1347.offset|=0, |#t~string1350.base|=113, |#t~string1350.offset|=0, |#t~string1352.base|=110, |#t~string1352.offset|=0, |#t~string1356.base|=111, |#t~string1356.offset|=0, |#t~string1377.base|=160, |#t~string1377.offset|=0, |#t~string1378.base|=105, |#t~string1378.offset|=0, |#t~string163.base|=95, |#t~string163.offset|=0, |#t~string322.base|=94, |#t~string322.offset|=0, |#t~string326.base|=93, |#t~string326.offset|=0, |#t~string327.base|=92, |#t~string327.offset|=0, |#t~string333.base|=91, |#t~string333.offset|=0, |#t~string380.base|=90, |#t~string380.offset|=0, |#t~string410.base|=89, |#t~string410.offset|=0, |#t~string416.base|=87, |#t~string416.offset|=0, |#t~string418.base|=86, |#t~string418.offset|=0, |#t~string423.base|=85, |#t~string423.offset|=0, |#t~string429.base|=84, |#t~string429.offset|=0, |#t~string452.base|=82, |#t~string452.offset|=0, |#t~string462.base|=81, |#t~string462.offset|=0, |#t~string470.base|=79, |#t~string470.offset|=0, |#t~string498.base|=78, |#t~string498.offset|=0, |#t~string528.base|=76, |#t~string528.offset|=0, |#t~string531.base|=75, |#t~string531.offset|=0, |#t~string542.base|=74, |#t~string542.offset|=0, |#t~string548.base|=73, |#t~string548.offset|=0, |#t~string552.base|=71, |#t~string552.offset|=0, |#t~string558.base|=69, |#t~string558.offset|=0, |#t~string562.base|=67, |#t~string562.offset|=0, |#t~string568.base|=66, |#t~string568.offset|=0, |#t~string573.base|=65, |#t~string573.offset|=0, |#t~string579.base|=63, |#t~string579.offset|=0, |#t~string584.base|=62, |#t~string584.offset|=0, |#t~string591.base|=61, |#t~string591.offset|=0, |#t~string598.base|=59, |#t~string598.offset|=0, |#t~string603.base|=58, |#t~string603.offset|=0, |#t~string611.base|=55, |#t~string611.offset|=0, |#t~string614.base|=54, |#t~string614.offset|=0, |#t~string615.base|=53, |#t~string615.offset|=0, |#t~string640.base|=50, |#t~string640.offset|=0, |#t~string742.base|=51, |#t~string742.offset|=0, |#t~string747.base|=109, |#t~string747.offset|=0, |#t~string770.base|=106, |#t~string770.offset|=0, |#t~string81.base|=26, |#t~string81.offset|=0, |#t~string82.base|=97, |#t~string82.offset|=0, |#t~string892.base|=107, |#t~string892.offset|=0, |#t~string902.base|=150, |#t~string902.offset|=0, |#t~string963.base|=149, |#t~string963.offset|=0, |~#__this_module~0.base|=158, |~#__this_module~0.offset|=170, |~#clocktab~0.base|=155, |~#clocktab~0.offset|=0, |~#he_driver~0.base|=17, |~#he_driver~0.offset|=0, |~#he_ops~0.base|=99, |~#he_ops~0.offset|=0, |~#he_pci_tbl~0.base|=167, |~#he_pci_tbl~0.offset|=0, |~#readtab~0.base|=49, |~#readtab~0.offset|=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=(- 1), ~nvpibits~0=(- 1), ~rx_skb_reserve~0=16, ~sdh~0=0] [?] #NULL.base, #NULL.offset := 0, 0; [?] #valid := #valid[0 := 0]; [L5888] call #t~string81.base, #t~string81.offset := #Ultimate.alloc(136); [L5889] call #t~string82.base, #t~string82.offset := #Ultimate.alloc(27); [L6110] call #t~string163.base, #t~string163.offset := #Ultimate.alloc(137); [L6585] call #t~string322.base, #t~string322.offset := #Ultimate.alloc(16); [L6594] call #t~string326.base, #t~string326.offset := #Ultimate.alloc(32); [L6600] call #t~string327.base, #t~string327.offset := #Ultimate.alloc(3); [L6600] call write~init~int(104, #t~string327.base, #t~string327.offset, 1); [L6600] call write~init~int(101, #t~string327.base, 1 + #t~string327.offset, 1); [L6600] call write~init~int(0, #t~string327.base, 2 + #t~string327.offset, 1); [L6624] call #t~string333.base, #t~string333.offset := #Ultimate.alloc(31); [L6854] call #t~string380.base, #t~string380.offset := #Ultimate.alloc(30); [L7146] call #t~string410.base, #t~string410.offset := #Ultimate.alloc(45); [L7155] call #t~string416.base, #t~string416.offset := #Ultimate.alloc(43); [L7160] call #t~string418.base, #t~string418.offset := #Ultimate.alloc(5); [L7160] call write~init~int(114, #t~string418.base, #t~string418.offset, 1); [L7160] call write~init~int(98, #t~string418.base, 1 + #t~string418.offset, 1); [L7160] call write~init~int(112, #t~string418.base, 2 + #t~string418.offset, 1); [L7160] call write~init~int(108, #t~string418.base, 3 + #t~string418.offset, 1); [L7160] call write~init~int(0, #t~string418.base, 4 + #t~string418.offset, 1); [L7163] call #t~string423.base, #t~string423.offset := #Ultimate.alloc(35); [L7171] call #t~string429.base, #t~string429.offset := #Ultimate.alloc(34); [L7214] call #t~string452.base, #t~string452.offset := #Ultimate.alloc(32); [L7228] call #t~string462.base, #t~string462.offset := #Ultimate.alloc(30); [L7238] call #t~string470.base, #t~string470.offset := #Ultimate.alloc(32); [L7293] call #t~string498.base, #t~string498.offset := #Ultimate.alloc(31); [L7353] call #t~string528.base, #t~string528.offset := #Ultimate.alloc(3); [L7353] call write~init~int(104, #t~string528.base, #t~string528.offset, 1); [L7353] call write~init~int(101, #t~string528.base, 1 + #t~string528.offset, 1); [L7353] call write~init~int(0, #t~string528.base, 2 + #t~string528.offset, 1); [L7355] call #t~string531.base, #t~string531.offset := #Ultimate.alloc(30); [L7404] call #t~string542.base, #t~string542.offset := #Ultimate.alloc(30); [L7412] call #t~string548.base, #t~string548.offset := #Ultimate.alloc(32); [L7419] call #t~string552.base, #t~string552.offset := #Ultimate.alloc(32); [L7427] call #t~string558.base, #t~string558.offset := #Ultimate.alloc(29); [L7434] call #t~string562.base, #t~string562.offset := #Ultimate.alloc(36); [L7443] call #t~string568.base, #t~string568.offset := #Ultimate.alloc(40); [L7452] call #t~string573.base, #t~string573.offset := #Ultimate.alloc(34); [L7461] call #t~string579.base, #t~string579.offset := #Ultimate.alloc(38); [L7471] call #t~string584.base, #t~string584.offset := #Ultimate.alloc(34); [L7483] call #t~string591.base, #t~string591.offset := #Ultimate.alloc(21); [L7495] call #t~string598.base, #t~string598.offset := #Ultimate.alloc(43); [L7501] call #t~string603.base, #t~string603.offset := #Ultimate.alloc(33); [L7531] call #t~string611.base, #t~string611.offset := #Ultimate.alloc(32); [L7532] call #t~string614.base, #t~string614.offset := #Ultimate.alloc(3); [L7532] call write~init~int(83, #t~string614.base, #t~string614.offset, 1); [L7532] call write~init~int(77, #t~string614.base, 1 + #t~string614.offset, 1); [L7532] call write~init~int(0, #t~string614.base, 2 + #t~string614.offset, 1); [L7532] call #t~string615.base, #t~string615.offset := #Ultimate.alloc(3); [L7532] call write~init~int(77, #t~string615.base, #t~string615.offset, 1); [L7532] call write~init~int(77, #t~string615.base, 1 + #t~string615.offset, 1); [L7532] call write~init~int(0, #t~string615.base, 2 + #t~string615.offset, 1); [L7565] call #t~string640.base, #t~string640.offset := #Ultimate.alloc(34); [L7778] call #t~string742.base, #t~string742.offset := #Ultimate.alloc(4); [L7778] call write~init~int(116, #t~string742.base, #t~string742.offset, 1); [L7778] call write~init~int(112, #t~string742.base, 1 + #t~string742.offset, 1); [L7778] call write~init~int(100, #t~string742.base, 2 + #t~string742.offset, 1); [L7778] call write~init~int(0, #t~string742.base, 3 + #t~string742.offset, 1); [L7781] call #t~string747.base, #t~string747.offset := #Ultimate.alloc(38); [L7838] call #t~string770.base, #t~string770.offset := #Ultimate.alloc(44); [L8078] call #t~string892.base, #t~string892.offset := #Ultimate.alloc(39); [L8092] call #t~string902.base, #t~string902.offset := #Ultimate.alloc(30); [L8244] call #t~string963.base, #t~string963.offset := #Ultimate.alloc(47); [L8434] call #t~string1039.base, #t~string1039.offset := #Ultimate.alloc(21); [L8438] call #t~string1044.base, #t~string1044.offset := #Ultimate.alloc(19); [L8449] call #t~string1048.base, #t~string1048.offset := #Ultimate.alloc(22); [L8526] call #t~string1085.base, #t~string1085.offset := #Ultimate.alloc(30); [L8617] call #t~string1121.base, #t~string1121.offset := #Ultimate.alloc(46); [L8625] call #t~string1123.base, #t~string1123.offset := #Ultimate.alloc(18); [L8626] call #t~string1124.base, #t~string1124.offset := #Ultimate.alloc(18); [L8658] call #t~string1133.base, #t~string1133.offset := #Ultimate.alloc(40); [L8757] call #t~string1157.base, #t~string1157.offset := #Ultimate.alloc(40); [L8915] call #t~string1185.base, #t~string1185.offset := #Ultimate.alloc(34); [L8942] call #t~string1191.base, #t~string1191.offset := #Ultimate.alloc(40); [L8961] call #t~string1199.base, #t~string1199.offset := #Ultimate.alloc(46); [L9030] call #t~string1214.base, #t~string1214.offset := #Ultimate.alloc(34); [L9063] call #t~string1222.base, #t~string1222.offset := #Ultimate.alloc(32); [L9096] call #t~string1238.base, #t~string1238.offset := #Ultimate.alloc(48); [L9110] call #t~string1250.base, #t~string1250.offset := #Ultimate.alloc(34); [L9326] call #t~string1319.base, #t~string1319.offset := #Ultimate.alloc(15); [L9334] call #t~string1321.base, #t~string1321.offset := #Ultimate.alloc(7); [L9334] call write~init~int(37, #t~string1321.base, #t~string1321.offset, 1); [L9334] call write~init~int(115, #t~string1321.base, 1 + #t~string1321.offset, 1); [L9334] call write~init~int(37, #t~string1321.base, 2 + #t~string1321.offset, 1); [L9334] call write~init~int(115, #t~string1321.base, 3 + #t~string1321.offset, 1); [L9334] call write~init~int(10, #t~string1321.base, 4 + #t~string1321.offset, 1); [L9334] call write~init~int(10, #t~string1321.base, 5 + #t~string1321.offset, 1); [L9334] call write~init~int(0, #t~string1321.base, 6 + #t~string1321.offset, 1); [L9334] call #t~string1323.base, #t~string1323.offset := #Ultimate.alloc(3); [L9334] call write~init~int(83, #t~string1323.base, #t~string1323.offset, 1); [L9334] call write~init~int(77, #t~string1323.base, 1 + #t~string1323.offset, 1); [L9334] call write~init~int(0, #t~string1323.base, 2 + #t~string1323.offset, 1); [L9334] call #t~string1324.base, #t~string1324.offset := #Ultimate.alloc(3); [L9334] call write~init~int(77, #t~string1324.base, #t~string1324.offset, 1); [L9334] call write~init~int(77, #t~string1324.base, 1 + #t~string1324.offset, 1); [L9334] call write~init~int(0, #t~string1324.base, 2 + #t~string1324.offset, 1); [L9342] call #t~string1327.base, #t~string1327.offset := #Ultimate.alloc(70); [L9360] call #t~string1337.base, #t~string1337.offset := #Ultimate.alloc(29); [L9368] call #t~string1339.base, #t~string1339.offset := #Ultimate.alloc(37); [L9376] call #t~string1342.base, #t~string1342.offset := #Ultimate.alloc(28); [L9384] call #t~string1344.base, #t~string1344.offset := #Ultimate.alloc(38); [L9392] call #t~string1347.base, #t~string1347.offset := #Ultimate.alloc(27); [L9400] call #t~string1350.base, #t~string1350.offset := #Ultimate.alloc(57); [L9411] call #t~string1352.base, #t~string1352.offset := #Ultimate.alloc(25); [L9427] call #t~string1356.base, #t~string1356.offset := #Ultimate.alloc(32); [L9527] call #t~string1377.base, #t~string1377.offset := #Ultimate.alloc(3); [L9527] call write~init~int(104, #t~string1377.base, #t~string1377.offset, 1); [L9527] call write~init~int(101, #t~string1377.base, 1 + #t~string1377.offset, 1); [L9527] call write~init~int(0, #t~string1377.base, 2 + #t~string1377.offset, 1); [L9545] call #t~string1378.base, #t~string1378.offset := #Ultimate.alloc(3); [L9545] call write~init~int(104, #t~string1378.base, #t~string1378.offset, 1); [L9545] call write~init~int(101, #t~string1378.base, 1 + #t~string1378.offset, 1); [L9545] call write~init~int(0, #t~string1378.base, 2 + #t~string1378.offset, 1); [L6452] ~nvpibits~0 := -1; [L6453] ~nvcibits~0 := -1; [L6454] ~rx_skb_reserve~0 := 16; [L6457-L6462] call ~#readtab~0.base, ~#readtab~0.offset := #Ultimate.alloc(68); [L6457-L6462] call write~init~int(4352, ~#readtab~0.base, ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(0, ~#readtab~0.base, 4 + ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(256, ~#readtab~0.base, 8 + ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(0, ~#readtab~0.base, 12 + ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(256, ~#readtab~0.base, 16 + ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(0, ~#readtab~0.base, 20 + ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(256, ~#readtab~0.base, 24 + ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(0, ~#readtab~0.base, 28 + ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(256, ~#readtab~0.base, 32 + ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(0, ~#readtab~0.base, 36 + ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(256, ~#readtab~0.base, 40 + ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(0, ~#readtab~0.base, 44 + ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(256, ~#readtab~0.base, 48 + ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(512, ~#readtab~0.base, 52 + ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(768, ~#readtab~0.base, 56 + ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(512, ~#readtab~0.base, 60 + ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(768, ~#readtab~0.base, 64 + ~#readtab~0.offset, 4); [L6463-L6468] call ~#clocktab~0.base, ~#clocktab~0.offset := #Ultimate.alloc(68); [L6463-L6468] call write~init~int(0, ~#clocktab~0.base, ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(256, ~#clocktab~0.base, 4 + ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(0, ~#clocktab~0.base, 8 + ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(256, ~#clocktab~0.base, 12 + ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(0, ~#clocktab~0.base, 16 + ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(256, ~#clocktab~0.base, 20 + ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(0, ~#clocktab~0.base, 24 + ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(256, ~#clocktab~0.base, 28 + ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(0, ~#clocktab~0.base, 32 + ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(256, ~#clocktab~0.base, 36 + ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(0, ~#clocktab~0.base, 40 + ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(256, ~#clocktab~0.base, 44 + ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(0, ~#clocktab~0.base, 48 + ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(256, ~#clocktab~0.base, 52 + ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(0, ~#clocktab~0.base, 56 + ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(256, ~#clocktab~0.base, 60 + ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(0, ~#clocktab~0.base, 64 + ~#clocktab~0.offset, 4); [L9564] ~LDV_IN_INTERRUPT~0 := 0; [L9907] ~ldv_spin~0 := 0; [L6450] ~he_devs~0.base, ~he_devs~0.offset := 0, 0; [L6451] ~disable64~0 := 0; [L6455] ~irq_coalesce~0 := 1; [L6456] ~sdh~0 := 0; [L6469-L6471] call ~#he_ops~0.base, ~#he_ops~0.offset := #Ultimate.alloc(112); [L6469-L6471] call write~init~$Pointer$(0, 0, ~#he_ops~0.base, ~#he_ops~0.offset, 8); [L6469-L6471] call write~init~$Pointer$(#funAddr~he_open.base, #funAddr~he_open.offset, ~#he_ops~0.base, 8 + ~#he_ops~0.offset, 8); [L6469-L6471] call write~init~$Pointer$(#funAddr~he_close.base, #funAddr~he_close.offset, ~#he_ops~0.base, 16 + ~#he_ops~0.offset, 8); [L6469-L6471] call write~init~$Pointer$(#funAddr~he_ioctl.base, #funAddr~he_ioctl.offset, ~#he_ops~0.base, 24 + ~#he_ops~0.offset, 8); [L6469-L6471] call write~init~$Pointer$(0, 0, ~#he_ops~0.base, 32 + ~#he_ops~0.offset, 8); [L6469-L6471] call write~init~$Pointer$(0, 0, ~#he_ops~0.base, 40 + ~#he_ops~0.offset, 8); [L6469-L6471] call write~init~$Pointer$(0, 0, ~#he_ops~0.base, 48 + ~#he_ops~0.offset, 8); [L6469-L6471] call write~init~$Pointer$(#funAddr~he_send.base, #funAddr~he_send.offset, ~#he_ops~0.base, 56 + ~#he_ops~0.offset, 8); [L6469-L6471] call write~init~$Pointer$(0, 0, ~#he_ops~0.base, 64 + ~#he_ops~0.offset, 8); [L6469-L6471] call write~init~$Pointer$(#funAddr~he_phy_put.base, #funAddr~he_phy_put.offset, ~#he_ops~0.base, 72 + ~#he_ops~0.offset, 8); [L6469-L6471] call write~init~$Pointer$(#funAddr~he_phy_get.base, #funAddr~he_phy_get.offset, ~#he_ops~0.base, 80 + ~#he_ops~0.offset, 8); [L6469-L6471] call write~init~$Pointer$(0, 0, ~#he_ops~0.base, 88 + ~#he_ops~0.offset, 8); [L6469-L6471] call write~init~$Pointer$(#funAddr~he_proc_read.base, #funAddr~he_proc_read.offset, ~#he_ops~0.base, 96 + ~#he_ops~0.offset, 8); [L6469-L6471] call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#he_ops~0.base, 104 + ~#he_ops~0.offset, 8); [L9523-L9524] call ~#he_pci_tbl~0.base, ~#he_pci_tbl~0.offset := #Ultimate.alloc(64); [L9523-L9524] call write~init~int(4391, ~#he_pci_tbl~0.base, ~#he_pci_tbl~0.offset, 4); [L9523-L9524] call write~init~int(1024, ~#he_pci_tbl~0.base, 4 + ~#he_pci_tbl~0.offset, 4); [L9523-L9524] call write~init~int(4294967295, ~#he_pci_tbl~0.base, 8 + ~#he_pci_tbl~0.offset, 4); [L9523-L9524] call write~init~int(4294967295, ~#he_pci_tbl~0.base, 12 + ~#he_pci_tbl~0.offset, 4); [L9523-L9524] call write~init~int(0, ~#he_pci_tbl~0.base, 16 + ~#he_pci_tbl~0.offset, 4); [L9523-L9524] call write~init~int(0, ~#he_pci_tbl~0.base, 20 + ~#he_pci_tbl~0.offset, 4); [L9523-L9524] call write~init~int(0, ~#he_pci_tbl~0.base, 24 + ~#he_pci_tbl~0.offset, 8); [L9523-L9524] call write~init~int(0, ~#he_pci_tbl~0.base, 32 + ~#he_pci_tbl~0.offset, 4); [L9523-L9524] call write~init~int(0, ~#he_pci_tbl~0.base, 36 + ~#he_pci_tbl~0.offset, 4); [L9523-L9524] call write~init~int(0, ~#he_pci_tbl~0.base, 40 + ~#he_pci_tbl~0.offset, 4); [L9523-L9524] call write~init~int(0, ~#he_pci_tbl~0.base, 44 + ~#he_pci_tbl~0.offset, 4); [L9523-L9524] call write~init~int(0, ~#he_pci_tbl~0.base, 48 + ~#he_pci_tbl~0.offset, 4); [L9523-L9524] call write~init~int(0, ~#he_pci_tbl~0.base, 52 + ~#he_pci_tbl~0.offset, 4); [L9523-L9524] call write~init~int(0, ~#he_pci_tbl~0.base, 56 + ~#he_pci_tbl~0.offset, 8); [L9525] ~__mod_pci_device_table~0.vendor := 0; [L9525] ~__mod_pci_device_table~0.device := 0; [L9525] ~__mod_pci_device_table~0.subvendor := 0; [L9525] ~__mod_pci_device_table~0.subdevice := 0; [L9525] ~__mod_pci_device_table~0.class := 0; [L9525] ~__mod_pci_device_table~0.class_mask := 0; [L9525] ~__mod_pci_device_table~0.driver_data := 0; [L9526-L9539] call ~#he_driver~0.base, ~#he_driver~0.offset := #Ultimate.alloc(301); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 8 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(#t~string1377.base, #t~string1377.offset, ~#he_driver~0.base, 16 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(~#he_pci_tbl~0.base, ~#he_pci_tbl~0.offset, ~#he_driver~0.base, 24 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(#funAddr~he_init_one.base, #funAddr~he_init_one.offset, ~#he_driver~0.base, 32 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(#funAddr~he_remove_one.base, #funAddr~he_remove_one.offset, ~#he_driver~0.base, 40 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 48 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 56 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 64 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 72 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 80 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 88 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 96 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 104 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 112 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 120 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 128 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~int(0, ~#he_driver~0.base, 136 + ~#he_driver~0.offset, 1); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 137 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 145 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 153 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 161 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 169 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 177 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 185 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 193 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 201 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 209 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~int(0, ~#he_driver~0.base, 217 + ~#he_driver~0.offset, 4); [L9526-L9539] call write~init~int(0, ~#he_driver~0.base, 221 + ~#he_driver~0.offset, 4); [L9526-L9539] call write~init~int(0, ~#he_driver~0.base, 225 + ~#he_driver~0.offset, 4); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 229 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 237 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 245 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 253 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 261 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~int(0, ~#he_driver~0.base, 269 + ~#he_driver~0.offset, 4); [L9526-L9539] call write~init~int(0, ~#he_driver~0.base, 273 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 285 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 293 + ~#he_driver~0.offset, 8); [?] havoc main_#res; [?] havoc main_#t~malloc1383.base, main_#t~malloc1383.offset, main_#t~ret1384, main_#t~nondet1385, main_#t~switch1386, main_#t~ret1387, main_#t~ret1388, main_#t~ret1389, main_#t~ret1390, main_#t~ret1391, main_#t~ret1392, main_#t~ret1393, main_#t~nondet1394, main_~var_group1~0.base, main_~var_group1~0.offset, main_~res_he_open_23~0, main_~var_group2~0.base, main_~var_group2~0.offset, main_~var_he_ioctl_26_p1~0, main_~var_he_ioctl_26_p2~0.base, main_~var_he_ioctl_26_p2~0.offset, main_~var_group3~0.base, main_~var_group3~0.offset, main_~var_he_phy_put_27_p1~0, main_~var_he_phy_put_27_p2~0, main_~var_he_phy_get_28_p1~0, main_~var_he_proc_read_29_p1~0.base, main_~var_he_proc_read_29_p1~0.offset, main_~var_he_proc_read_29_p2~0.base, main_~var_he_proc_read_29_p2~0.offset, main_~var_group4~0.base, main_~var_group4~0.offset, main_~var_he_init_one_3_p1~0.base, main_~var_he_init_one_3_p1~0.offset, main_~res_he_init_one_3~0, main_~var_he_irq_handler_21_p0~0, main_~var_he_irq_handler_21_p1~0.base, main_~var_he_irq_handler_21_p1~0.offset, main_~ldv_s_he_ops_atmdev_ops~0, main_~ldv_s_he_driver_pci_driver~0, main_~tmp~47, main_~tmp___0~20, main_~tmp___1~14; [L9576] havoc main_~var_group1~0.base, main_~var_group1~0.offset; [L9577] havoc main_~res_he_open_23~0; [L9578] havoc main_~var_group2~0.base, main_~var_group2~0.offset; [L9579] havoc main_~var_he_ioctl_26_p1~0; [L9580] havoc main_~var_he_ioctl_26_p2~0.base, main_~var_he_ioctl_26_p2~0.offset; [L9581] havoc main_~var_group3~0.base, main_~var_group3~0.offset; [L9582] havoc main_~var_he_phy_put_27_p1~0; [L9583] havoc main_~var_he_phy_put_27_p2~0; [L9584] havoc main_~var_he_phy_get_28_p1~0; [L9585] havoc main_~var_he_proc_read_29_p1~0.base, main_~var_he_proc_read_29_p1~0.offset; [L9586] havoc main_~var_he_proc_read_29_p2~0.base, main_~var_he_proc_read_29_p2~0.offset; [L9587] havoc main_~var_group4~0.base, main_~var_group4~0.offset; [L9588] havoc main_~var_he_init_one_3_p1~0.base, main_~var_he_init_one_3_p1~0.offset; [L9589] havoc main_~res_he_init_one_3~0; [L9590] havoc main_~var_he_irq_handler_21_p0~0; [L9591] havoc main_~var_he_irq_handler_21_p1~0.base, main_~var_he_irq_handler_21_p1~0.offset; [L9592] havoc main_~ldv_s_he_ops_atmdev_ops~0; [L9593] havoc main_~ldv_s_he_driver_pci_driver~0; [L9594] havoc main_~tmp~47; [L9595] havoc main_~tmp___0~20; [L9596] havoc main_~tmp___1~14; [L9598] call main_#t~malloc1383.base, main_#t~malloc1383.offset := #Ultimate.alloc(1590); [L9598] main_~var_group1~0.base, main_~var_group1~0.offset := main_#t~malloc1383.base, main_#t~malloc1383.offset; [L9599] call write~$Pointer$(#funAddr~void_one_par_dummy.base, #funAddr~void_one_par_dummy.offset, main_~var_group1~0.base, 1420 + main_~var_group1~0.offset, 8); [L9600] call write~$Pointer$(#funAddr~void_two_par_dummy.base, #funAddr~void_two_par_dummy.offset, main_~var_group1~0.base, 1428 + main_~var_group1~0.offset, 8); [L9601] call write~$Pointer$(#funAddr~void_two_par_dummy.base, #funAddr~void_two_par_dummy.offset, main_~var_group1~0.base, 1436 + main_~var_group1~0.offset, 8); [L9602] call write~$Pointer$(#funAddr~int_two_par_dummy.base, #funAddr~int_two_par_dummy.offset, main_~var_group1~0.base, 1444 + main_~var_group1~0.offset, 8); [L9603] call write~$Pointer$(#funAddr~int_two_par_dummy.base, #funAddr~int_two_par_dummy.offset, main_~var_group1~0.base, 1452 + main_~var_group1~0.offset, 8); [L9606] main_~ldv_s_he_ops_atmdev_ops~0 := 0; [L9607] main_~ldv_s_he_driver_pci_driver~0 := 0; [L9608] ~LDV_IN_INTERRUPT~0 := 1; [L9609] call ldv_initialize(); [L9610] call ldv_handler_precall(); [L9611] havoc he_init_#res; [L9611] havoc he_init_#t~ret1379, he_init_~tmp~46; [L9542] havoc he_init_~tmp~46; [L9545] call he_init_#t~ret1379 := __pci_register_driver(~#he_driver~0.base, ~#he_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, #t~string1378.base, #t~string1378.offset); [L9545] assume -2147483648 <= he_init_#t~ret1379 && he_init_#t~ret1379 <= 2147483647; [L9545] he_init_~tmp~46 := he_init_#t~ret1379; [L9545] havoc he_init_#t~ret1379; [L9546] he_init_#res := he_init_~tmp~46; [L9611] main_#t~ret1384 := he_init_#res; [L9611] assume -2147483648 <= main_#t~ret1384 && main_#t~ret1384 <= 2147483647; [L9611] main_~tmp~47 := main_#t~ret1384; [L9611] havoc main_#t~ret1384; VAL [#NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, he_init_#res=0, he_init_~tmp~46=0, main_#t~malloc1383.base=174, main_#t~malloc1383.offset=0, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp~47=0, main_~var_group1~0.base=174, main_~var_group1~0.offset=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9612-L9616] assume !(0 != main_~tmp~47); VAL [#NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, he_init_#res=0, he_init_~tmp~46=0, main_#t~malloc1383.base=174, main_#t~malloc1383.offset=0, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp~47=0, main_~var_group1~0.base=174, main_~var_group1~0.offset=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9700] assume -2147483648 <= main_#t~nondet1394 && main_#t~nondet1394 <= 2147483647; [L9700] main_~tmp___1~14 := main_#t~nondet1394; [L9700] havoc main_#t~nondet1394; VAL [#NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, he_init_#res=0, he_init_~tmp~46=0, main_#t~malloc1383.base=174, main_#t~malloc1383.offset=0, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0.base=174, main_~var_group1~0.offset=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9701-L9705] assume (0 != main_~tmp___1~14 || 0 != main_~ldv_s_he_ops_atmdev_ops~0) || 0 != main_~ldv_s_he_driver_pci_driver~0; [L9619] assume -2147483648 <= main_#t~nondet1385 && main_#t~nondet1385 <= 2147483647; [L9619] main_~tmp___0~20 := main_#t~nondet1385; [L9619] havoc main_#t~nondet1385; [L9621] main_#t~switch1386 := 0 == main_~tmp___0~20; VAL [#NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, he_init_#res=0, he_init_~tmp~46=0, main_#t~malloc1383.base=174, main_#t~malloc1383.offset=0, main_#t~switch1386=false, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0.base=174, main_~var_group1~0.offset=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9621] assume !main_#t~switch1386; [L9636] main_#t~switch1386 := main_#t~switch1386 || 1 == main_~tmp___0~20; VAL [#NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, he_init_#res=0, he_init_~tmp~46=0, main_#t~malloc1383.base=174, main_#t~malloc1383.offset=0, main_#t~switch1386=false, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0.base=174, main_~var_group1~0.offset=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9636] assume !main_#t~switch1386; [L9645] main_#t~switch1386 := main_#t~switch1386 || 2 == main_~tmp___0~20; VAL [#NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, he_init_#res=0, he_init_~tmp~46=0, main_#t~malloc1383.base=174, main_#t~malloc1383.offset=0, main_#t~switch1386=false, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0.base=174, main_~var_group1~0.offset=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9645] assume !main_#t~switch1386; [L9649] main_#t~switch1386 := main_#t~switch1386 || 3 == main_~tmp___0~20; VAL [#NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, he_init_#res=0, he_init_~tmp~46=0, main_#t~malloc1383.base=174, main_#t~malloc1383.offset=0, main_#t~switch1386=true, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0.base=174, main_~var_group1~0.offset=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9649] assume main_#t~switch1386; [L9650] call ldv_handler_precall(); [L9651] he_send_#in~vcc.base, he_send_#in~vcc.offset, he_send_#in~skb.base, he_send_#in~skb.offset := main_~var_group1~0.base, main_~var_group1~0.offset, main_~var_group3~0.base, main_~var_group3~0.offset; [L9651] havoc he_send_#res; [L9651] havoc he_send_#t~mem1227.base, he_send_#t~mem1227.offset, he_send_#t~mem1228.base, he_send_#t~mem1228.offset, he_send_#t~mem1229, he_send_#t~mem1230, he_send_#t~mem1231, he_send_#t~mem1232, he_send_#t~mem1233, he_send_#t~mem1234, he_send_#t~short1235, he_send_#t~short1236, he_send_#t~nondet1237, he_send_#t~mem1239, he_send_#t~mem1240, he_send_#t~mem1241.base, he_send_#t~mem1241.offset, he_send_#t~mem1245.base, he_send_#t~mem1245.offset, he_send_#t~mem1246.base, he_send_#t~mem1246.offset, he_send_#t~ret1247.base, he_send_#t~ret1247.offset, he_send_#t~mem1248, he_send_#t~nondet1249, he_send_#t~mem1251, he_send_#t~mem1252.base, he_send_#t~mem1252.offset, he_send_#t~mem1256.base, he_send_#t~mem1256.offset, he_send_#t~mem1257.base, he_send_#t~mem1257.offset, he_send_#t~ret1258.base, he_send_#t~ret1258.offset, he_send_#t~mem1259.base, he_send_#t~mem1259.offset, he_send_#t~mem1263.base, he_send_#t~mem1263.offset, he_send_#t~mem1264.base, he_send_#t~mem1264.offset, he_send_#t~mem1265, he_send_#t~mem1266, he_send_#t~mem1267.base, he_send_#t~mem1267.offset, he_send_#t~mem1268, he_send_#t~mem1269, he_send_#t~mem1270, he_send_#t~mem1271, he_send_#t~ret1272.base, he_send_#t~ret1272.offset, he_send_#t~mem1273.base, he_send_#t~mem1273.offset, he_send_#t~mem1274.base, he_send_#t~mem1274.offset, he_send_#t~mem1275, he_send_#t~ret1276, he_send_#t~mem1277, he_send_#t~mem1278, he_send_#t~mem1279.base, he_send_#t~mem1279.offset, he_send_~vcc.base, he_send_~vcc.offset, he_send_~skb.base, he_send_~skb.offset, he_send_~flags~4, he_send_~he_dev~7.base, he_send_~he_dev~7.offset, he_send_~cid~3, he_send_~tpd~3.base, he_send_~tpd~3.offset, he_send_~tmp~42.base, he_send_~tmp~42.offset, he_send_~pti_clp~0.base, he_send_~pti_clp~0.offset, he_send_~clp~0, he_send_~pti~0, he_send_~tmp___0~16; [L9080-L9165] he_send_~vcc.base, he_send_~vcc.offset := he_send_#in~vcc.base, he_send_#in~vcc.offset; [L9080-L9165] he_send_~skb.base, he_send_~skb.offset := he_send_#in~skb.base, he_send_#in~skb.offset; [L9082] havoc he_send_~flags~4; [L9083] havoc he_send_~he_dev~7.base, he_send_~he_dev~7.offset; [L9084] havoc he_send_~cid~3; [L9085] havoc he_send_~tpd~3.base, he_send_~tpd~3.offset; [L9086] havoc he_send_~tmp~42.base, he_send_~tmp~42.offset; [L9087] havoc he_send_~pti_clp~0.base, he_send_~pti_clp~0.offset; [L9088] havoc he_send_~clp~0; [L9089] havoc he_send_~pti~0; [L9090] havoc he_send_~tmp___0~16; [L9093] call he_send_#t~mem1227.base, he_send_#t~mem1227.offset := read~$Pointer$(he_send_~vcc.base, 1279 + he_send_~vcc.offset, 8); [L9093] call he_send_#t~mem1228.base, he_send_#t~mem1228.offset := read~$Pointer$(he_send_#t~mem1227.base, 28 + he_send_#t~mem1227.offset, 8); [L9093] he_send_~he_dev~7.base, he_send_~he_dev~7.offset := he_send_#t~mem1228.base, he_send_#t~mem1228.offset; [L9093] havoc he_send_#t~mem1227.base, he_send_#t~mem1227.offset; [L9093] havoc he_send_#t~mem1228.base, he_send_#t~mem1228.offset; [L9094] call he_send_#t~mem1229 := read~int(he_send_~vcc.base, 1257 + he_send_~vcc.offset, 2); [L9094] call he_send_#t~mem1230 := read~int(he_send_~he_dev~7.base, 56 + he_send_~he_dev~7.offset, 4); [L9094] call he_send_#t~mem1231 := read~int(he_send_~vcc.base, 1259 + he_send_~vcc.offset, 4); [L9094] he_send_~cid~3 := ~bitwiseAnd(~bitwiseOr(~shiftLeft(he_send_#t~mem1229, (if he_send_#t~mem1230 % 4294967296 % 4294967296 <= 2147483647 then he_send_#t~mem1230 % 4294967296 % 4294967296 else he_send_#t~mem1230 % 4294967296 % 4294967296 - 4294967296)), he_send_#t~mem1231), 8191); [L9094] havoc he_send_#t~mem1229; [L9094] havoc he_send_#t~mem1230; [L9094] havoc he_send_#t~mem1231; [L9095] call he_send_#t~mem1232 := read~int(he_send_~skb.base, 104 + he_send_~skb.offset, 4); [L9095] he_send_#t~short1236 := he_send_#t~mem1232 % 4294967296 > 65535; [L9095] assume !he_send_#t~short1236; [L9095] call he_send_#t~mem1233 := read~int(he_send_~vcc.base, 1379 + he_send_~vcc.offset, 1); [L9095] he_send_#t~short1235 := 13 == he_send_#t~mem1233 % 256 % 4294967296; [L9095] assume he_send_#t~short1235; [L9095] call he_send_#t~mem1234 := read~int(he_send_~skb.base, 104 + he_send_~skb.offset, 4); [L9095] he_send_#t~short1235 := 52 != he_send_#t~mem1234 % 4294967296; [L9095] he_send_#t~short1236 := he_send_#t~short1235; VAL [#NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, he_init_#res=0, he_init_~tmp~46=0, he_send_#in~skb.base=174, he_send_#in~skb.offset=1349, he_send_#in~vcc.base=174, he_send_#in~vcc.offset=0, he_send_#t~mem1232=14551349198900, he_send_#t~mem1233=2284557, he_send_#t~mem1234=14551349198900, he_send_#t~short1235=false, he_send_#t~short1236=false, he_send_~he_dev~7.base=176, he_send_~he_dev~7.offset=5382, he_send_~skb.base=174, he_send_~skb.offset=1349, he_send_~vcc.base=174, he_send_~vcc.offset=0, main_#t~malloc1383.base=174, main_#t~malloc1383.offset=0, main_#t~switch1386=true, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0.base=174, main_~var_group1~0.offset=0, main_~var_group3~0.base=174, main_~var_group3~0.offset=1349, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9095-L9107] assume !he_send_#t~short1236; [L9095] havoc he_send_#t~mem1233; [L9095] havoc he_send_#t~mem1234; [L9095] havoc he_send_#t~short1235; [L9095] havoc he_send_#t~short1236; [L9095] havoc he_send_#t~mem1232; [L9108] skb_end_pointer_#in~skb.base, skb_end_pointer_#in~skb.offset := he_send_~skb.base, he_send_~skb.offset; [L9108] havoc skb_end_pointer_#res.base, skb_end_pointer_#res.offset; [L9108] havoc skb_end_pointer_#t~mem181.base, skb_end_pointer_#t~mem181.offset, skb_end_pointer_#t~mem182, skb_end_pointer_~skb.base, skb_end_pointer_~skb.offset; [L6136-L6143] skb_end_pointer_~skb.base, skb_end_pointer_~skb.offset := skb_end_pointer_#in~skb.base, skb_end_pointer_#in~skb.offset; [L6141] call skb_end_pointer_#t~mem181.base, skb_end_pointer_#t~mem181.offset := read~$Pointer$(skb_end_pointer_~skb.base, 239 + skb_end_pointer_~skb.offset, 8); [L6141] call skb_end_pointer_#t~mem182 := read~int(skb_end_pointer_~skb.base, 235 + skb_end_pointer_~skb.offset, 4); [L6141] skb_end_pointer_#res.base, skb_end_pointer_#res.offset := skb_end_pointer_#t~mem181.base, skb_end_pointer_#t~mem181.offset + (if skb_end_pointer_#t~mem182 % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then skb_end_pointer_#t~mem182 % 4294967296 % 18446744073709551616 % 18446744073709551616 else skb_end_pointer_#t~mem182 % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616); [L6141] havoc skb_end_pointer_#t~mem182; [L6141] havoc skb_end_pointer_#t~mem181.base, skb_end_pointer_#t~mem181.offset; [L9108] he_send_#t~ret1247.base, he_send_#t~ret1247.offset := skb_end_pointer_#res.base, skb_end_pointer_#res.offset; [L9108] he_send_~tmp~42.base, he_send_~tmp~42.offset := he_send_#t~ret1247.base, he_send_#t~ret1247.offset; [L9108] havoc he_send_#t~ret1247.base, he_send_#t~ret1247.offset; [L9109] call he_send_#t~mem1248 := read~int(he_send_~tmp~42.base, he_send_~tmp~42.offset, 1); VAL [#NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, he_init_#res=0, he_init_~tmp~46=0, he_send_#in~skb.base=174, he_send_#in~skb.offset=1349, he_send_#in~vcc.base=174, he_send_#in~vcc.offset=0, he_send_#t~mem1248=1391872, he_send_~he_dev~7.base=176, he_send_~he_dev~7.offset=5382, he_send_~skb.base=174, he_send_~skb.offset=1349, he_send_~tmp~42.base=174, he_send_~tmp~42.offset=1419, he_send_~vcc.base=174, he_send_~vcc.offset=0, main_#t~malloc1383.base=174, main_#t~malloc1383.offset=0, main_#t~switch1386=true, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0.base=174, main_~var_group1~0.offset=0, main_~var_group3~0.base=174, main_~var_group3~0.offset=1349, skb_end_pointer_#in~skb.base=174, skb_end_pointer_#in~skb.offset=1349, skb_end_pointer_#res.base=174, skb_end_pointer_#res.offset=1419, skb_end_pointer_~skb.base=174, skb_end_pointer_~skb.offset=1349, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9109-L9121] assume !(0 != he_send_#t~mem1248 % 256 % 4294967296); [L9109] havoc he_send_#t~mem1248; VAL [#NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, he_init_#res=0, he_init_~tmp~46=0, he_send_#in~skb.base=174, he_send_#in~skb.offset=1349, he_send_#in~vcc.base=174, he_send_#in~vcc.offset=0, he_send_~he_dev~7.base=176, he_send_~he_dev~7.offset=5382, he_send_~skb.base=174, he_send_~skb.offset=1349, he_send_~tmp~42.base=174, he_send_~tmp~42.offset=1419, he_send_~vcc.base=174, he_send_~vcc.offset=0, main_#t~malloc1383.base=174, main_#t~malloc1383.offset=0, main_#t~switch1386=true, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0.base=174, main_~var_group1~0.offset=0, main_~var_group3~0.base=174, main_~var_group3~0.offset=1349, skb_end_pointer_#in~skb.base=174, skb_end_pointer_#in~skb.offset=1349, skb_end_pointer_#res.base=174, skb_end_pointer_#res.offset=1419, skb_end_pointer_~skb.base=174, skb_end_pointer_~skb.offset=1349, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9122] CALL call ldv_spin_lock(); VAL [#NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, old(~ldv_spin~0)=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9954] ~ldv_spin~0 := 1; [L5549] ensures true; VAL [#NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, old(~ldv_spin~0)=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9122] RET call ldv_spin_lock(); VAL [#NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, he_init_#res=0, he_init_~tmp~46=0, he_send_#in~skb.base=174, he_send_#in~skb.offset=1349, he_send_#in~vcc.base=174, he_send_#in~vcc.offset=0, he_send_~he_dev~7.base=176, he_send_~he_dev~7.offset=5382, he_send_~skb.base=174, he_send_~skb.offset=1349, he_send_~tmp~42.base=174, he_send_~tmp~42.offset=1419, he_send_~vcc.base=174, he_send_~vcc.offset=0, main_#t~malloc1383.base=174, main_#t~malloc1383.offset=0, main_#t~switch1386=true, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0.base=174, main_~var_group1~0.offset=0, main_~var_group3~0.base=174, main_~var_group3~0.offset=1349, skb_end_pointer_#in~skb.base=174, skb_end_pointer_#in~skb.offset=1349, skb_end_pointer_#res.base=174, skb_end_pointer_#res.offset=1419, skb_end_pointer_~skb.base=174, skb_end_pointer_~skb.offset=1349, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9123] CALL call he_send_#t~ret1258.base, he_send_#t~ret1258.offset := __alloc_tpd(he_send_~he_dev~7.base, he_send_~he_dev~7.offset); VAL [#in~he_dev.base=176, #in~he_dev.offset=5382, #NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L8006-L8030] ~he_dev.base, ~he_dev.offset := #in~he_dev.base, #in~he_dev.offset; [L8008] havoc ~tpd~0.base, ~tpd~0.offset; [L8009] call ~#mapping~1.base, ~#mapping~1.offset := #Ultimate.alloc(8); [L8010] havoc ~tmp~35.base, ~tmp~35.offset; [L8013] call #t~mem877.base, #t~mem877.offset := read~$Pointer$(~he_dev.base, 400 + ~he_dev.offset, 8); [L8013] ldv_dma_pool_alloc_33_#in~ldv_func_arg1.base, ldv_dma_pool_alloc_33_#in~ldv_func_arg1.offset, ldv_dma_pool_alloc_33_#in~flags, ldv_dma_pool_alloc_33_#in~ldv_func_arg3.base, ldv_dma_pool_alloc_33_#in~ldv_func_arg3.offset := #t~mem877.base, #t~mem877.offset, 33, ~#mapping~1.base, ~#mapping~1.offset; [L8013] havoc ldv_dma_pool_alloc_33_#res.base, ldv_dma_pool_alloc_33_#res.offset; [L8013] havoc ldv_dma_pool_alloc_33_#t~ret1406.base, ldv_dma_pool_alloc_33_#t~ret1406.offset, ldv_dma_pool_alloc_33_~ldv_func_arg1.base, ldv_dma_pool_alloc_33_~ldv_func_arg1.offset, ldv_dma_pool_alloc_33_~flags, ldv_dma_pool_alloc_33_~ldv_func_arg3.base, ldv_dma_pool_alloc_33_~ldv_func_arg3.offset; [L9869-L9878] ldv_dma_pool_alloc_33_~ldv_func_arg1.base, ldv_dma_pool_alloc_33_~ldv_func_arg1.offset := ldv_dma_pool_alloc_33_#in~ldv_func_arg1.base, ldv_dma_pool_alloc_33_#in~ldv_func_arg1.offset; [L9869-L9878] ldv_dma_pool_alloc_33_~flags := ldv_dma_pool_alloc_33_#in~flags; [L9869-L9878] ldv_dma_pool_alloc_33_~ldv_func_arg3.base, ldv_dma_pool_alloc_33_~ldv_func_arg3.offset := ldv_dma_pool_alloc_33_#in~ldv_func_arg3.base, ldv_dma_pool_alloc_33_#in~ldv_func_arg3.offset; VAL [#in~he_dev.base=176, #in~he_dev.offset=5382, #NULL.base=0, #NULL.offset=0, #t~mem877.base=180, #t~mem877.offset=183, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, ldv_dma_pool_alloc_33_#in~flags=33, ldv_dma_pool_alloc_33_#in~ldv_func_arg1.base=180, ldv_dma_pool_alloc_33_#in~ldv_func_arg1.offset=183, ldv_dma_pool_alloc_33_#in~ldv_func_arg3.base=179, ldv_dma_pool_alloc_33_#in~ldv_func_arg3.offset=0, ldv_dma_pool_alloc_33_~flags=33, ldv_dma_pool_alloc_33_~ldv_func_arg1.base=180, ldv_dma_pool_alloc_33_~ldv_func_arg1.offset=183, ldv_dma_pool_alloc_33_~ldv_func_arg3.base=179, ldv_dma_pool_alloc_33_~ldv_func_arg3.offset=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#mapping~1.base=179, ~#mapping~1.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_dev.base=176, ~he_dev.offset=5382, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9874] CALL call ldv_check_alloc_flags(ldv_dma_pool_alloc_33_~flags); VAL [#in~flags=33, #NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9908-L9920] ~flags := #in~flags; VAL [#in~flags=33, #NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~flags=33, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9913-L9917] assume !(0 == ~ldv_spin~0 || 0 != ~bitwiseAnd(~flags, 32) % 4294967296); VAL [#in~flags=33, #NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~flags=33, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9916] CALL call ldv_error(); VAL [#NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9895] assert false; VAL [#NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] #NULL.base, #NULL.offset := 0, 0; [?] #valid := #valid[0 := 0]; [L5888] call #t~string81.base, #t~string81.offset := #Ultimate.alloc(136); [L5889] call #t~string82.base, #t~string82.offset := #Ultimate.alloc(27); [L6110] call #t~string163.base, #t~string163.offset := #Ultimate.alloc(137); [L6585] call #t~string322.base, #t~string322.offset := #Ultimate.alloc(16); [L6594] call #t~string326.base, #t~string326.offset := #Ultimate.alloc(32); [L6600] call #t~string327.base, #t~string327.offset := #Ultimate.alloc(3); [L6600] call write~init~int(104, #t~string327.base, #t~string327.offset, 1); [L6600] call write~init~int(101, #t~string327.base, 1 + #t~string327.offset, 1); [L6600] call write~init~int(0, #t~string327.base, 2 + #t~string327.offset, 1); [L6624] call #t~string333.base, #t~string333.offset := #Ultimate.alloc(31); [L6854] call #t~string380.base, #t~string380.offset := #Ultimate.alloc(30); [L7146] call #t~string410.base, #t~string410.offset := #Ultimate.alloc(45); [L7155] call #t~string416.base, #t~string416.offset := #Ultimate.alloc(43); [L7160] call #t~string418.base, #t~string418.offset := #Ultimate.alloc(5); [L7160] call write~init~int(114, #t~string418.base, #t~string418.offset, 1); [L7160] call write~init~int(98, #t~string418.base, 1 + #t~string418.offset, 1); [L7160] call write~init~int(112, #t~string418.base, 2 + #t~string418.offset, 1); [L7160] call write~init~int(108, #t~string418.base, 3 + #t~string418.offset, 1); [L7160] call write~init~int(0, #t~string418.base, 4 + #t~string418.offset, 1); [L7163] call #t~string423.base, #t~string423.offset := #Ultimate.alloc(35); [L7171] call #t~string429.base, #t~string429.offset := #Ultimate.alloc(34); [L7214] call #t~string452.base, #t~string452.offset := #Ultimate.alloc(32); [L7228] call #t~string462.base, #t~string462.offset := #Ultimate.alloc(30); [L7238] call #t~string470.base, #t~string470.offset := #Ultimate.alloc(32); [L7293] call #t~string498.base, #t~string498.offset := #Ultimate.alloc(31); [L7353] call #t~string528.base, #t~string528.offset := #Ultimate.alloc(3); [L7353] call write~init~int(104, #t~string528.base, #t~string528.offset, 1); [L7353] call write~init~int(101, #t~string528.base, 1 + #t~string528.offset, 1); [L7353] call write~init~int(0, #t~string528.base, 2 + #t~string528.offset, 1); [L7355] call #t~string531.base, #t~string531.offset := #Ultimate.alloc(30); [L7404] call #t~string542.base, #t~string542.offset := #Ultimate.alloc(30); [L7412] call #t~string548.base, #t~string548.offset := #Ultimate.alloc(32); [L7419] call #t~string552.base, #t~string552.offset := #Ultimate.alloc(32); [L7427] call #t~string558.base, #t~string558.offset := #Ultimate.alloc(29); [L7434] call #t~string562.base, #t~string562.offset := #Ultimate.alloc(36); [L7443] call #t~string568.base, #t~string568.offset := #Ultimate.alloc(40); [L7452] call #t~string573.base, #t~string573.offset := #Ultimate.alloc(34); [L7461] call #t~string579.base, #t~string579.offset := #Ultimate.alloc(38); [L7471] call #t~string584.base, #t~string584.offset := #Ultimate.alloc(34); [L7483] call #t~string591.base, #t~string591.offset := #Ultimate.alloc(21); [L7495] call #t~string598.base, #t~string598.offset := #Ultimate.alloc(43); [L7501] call #t~string603.base, #t~string603.offset := #Ultimate.alloc(33); [L7531] call #t~string611.base, #t~string611.offset := #Ultimate.alloc(32); [L7532] call #t~string614.base, #t~string614.offset := #Ultimate.alloc(3); [L7532] call write~init~int(83, #t~string614.base, #t~string614.offset, 1); [L7532] call write~init~int(77, #t~string614.base, 1 + #t~string614.offset, 1); [L7532] call write~init~int(0, #t~string614.base, 2 + #t~string614.offset, 1); [L7532] call #t~string615.base, #t~string615.offset := #Ultimate.alloc(3); [L7532] call write~init~int(77, #t~string615.base, #t~string615.offset, 1); [L7532] call write~init~int(77, #t~string615.base, 1 + #t~string615.offset, 1); [L7532] call write~init~int(0, #t~string615.base, 2 + #t~string615.offset, 1); [L7565] call #t~string640.base, #t~string640.offset := #Ultimate.alloc(34); [L7778] call #t~string742.base, #t~string742.offset := #Ultimate.alloc(4); [L7778] call write~init~int(116, #t~string742.base, #t~string742.offset, 1); [L7778] call write~init~int(112, #t~string742.base, 1 + #t~string742.offset, 1); [L7778] call write~init~int(100, #t~string742.base, 2 + #t~string742.offset, 1); [L7778] call write~init~int(0, #t~string742.base, 3 + #t~string742.offset, 1); [L7781] call #t~string747.base, #t~string747.offset := #Ultimate.alloc(38); [L7838] call #t~string770.base, #t~string770.offset := #Ultimate.alloc(44); [L8078] call #t~string892.base, #t~string892.offset := #Ultimate.alloc(39); [L8092] call #t~string902.base, #t~string902.offset := #Ultimate.alloc(30); [L8244] call #t~string963.base, #t~string963.offset := #Ultimate.alloc(47); [L8434] call #t~string1039.base, #t~string1039.offset := #Ultimate.alloc(21); [L8438] call #t~string1044.base, #t~string1044.offset := #Ultimate.alloc(19); [L8449] call #t~string1048.base, #t~string1048.offset := #Ultimate.alloc(22); [L8526] call #t~string1085.base, #t~string1085.offset := #Ultimate.alloc(30); [L8617] call #t~string1121.base, #t~string1121.offset := #Ultimate.alloc(46); [L8625] call #t~string1123.base, #t~string1123.offset := #Ultimate.alloc(18); [L8626] call #t~string1124.base, #t~string1124.offset := #Ultimate.alloc(18); [L8658] call #t~string1133.base, #t~string1133.offset := #Ultimate.alloc(40); [L8757] call #t~string1157.base, #t~string1157.offset := #Ultimate.alloc(40); [L8915] call #t~string1185.base, #t~string1185.offset := #Ultimate.alloc(34); [L8942] call #t~string1191.base, #t~string1191.offset := #Ultimate.alloc(40); [L8961] call #t~string1199.base, #t~string1199.offset := #Ultimate.alloc(46); [L9030] call #t~string1214.base, #t~string1214.offset := #Ultimate.alloc(34); [L9063] call #t~string1222.base, #t~string1222.offset := #Ultimate.alloc(32); [L9096] call #t~string1238.base, #t~string1238.offset := #Ultimate.alloc(48); [L9110] call #t~string1250.base, #t~string1250.offset := #Ultimate.alloc(34); [L9326] call #t~string1319.base, #t~string1319.offset := #Ultimate.alloc(15); [L9334] call #t~string1321.base, #t~string1321.offset := #Ultimate.alloc(7); [L9334] call write~init~int(37, #t~string1321.base, #t~string1321.offset, 1); [L9334] call write~init~int(115, #t~string1321.base, 1 + #t~string1321.offset, 1); [L9334] call write~init~int(37, #t~string1321.base, 2 + #t~string1321.offset, 1); [L9334] call write~init~int(115, #t~string1321.base, 3 + #t~string1321.offset, 1); [L9334] call write~init~int(10, #t~string1321.base, 4 + #t~string1321.offset, 1); [L9334] call write~init~int(10, #t~string1321.base, 5 + #t~string1321.offset, 1); [L9334] call write~init~int(0, #t~string1321.base, 6 + #t~string1321.offset, 1); [L9334] call #t~string1323.base, #t~string1323.offset := #Ultimate.alloc(3); [L9334] call write~init~int(83, #t~string1323.base, #t~string1323.offset, 1); [L9334] call write~init~int(77, #t~string1323.base, 1 + #t~string1323.offset, 1); [L9334] call write~init~int(0, #t~string1323.base, 2 + #t~string1323.offset, 1); [L9334] call #t~string1324.base, #t~string1324.offset := #Ultimate.alloc(3); [L9334] call write~init~int(77, #t~string1324.base, #t~string1324.offset, 1); [L9334] call write~init~int(77, #t~string1324.base, 1 + #t~string1324.offset, 1); [L9334] call write~init~int(0, #t~string1324.base, 2 + #t~string1324.offset, 1); [L9342] call #t~string1327.base, #t~string1327.offset := #Ultimate.alloc(70); [L9360] call #t~string1337.base, #t~string1337.offset := #Ultimate.alloc(29); [L9368] call #t~string1339.base, #t~string1339.offset := #Ultimate.alloc(37); [L9376] call #t~string1342.base, #t~string1342.offset := #Ultimate.alloc(28); [L9384] call #t~string1344.base, #t~string1344.offset := #Ultimate.alloc(38); [L9392] call #t~string1347.base, #t~string1347.offset := #Ultimate.alloc(27); [L9400] call #t~string1350.base, #t~string1350.offset := #Ultimate.alloc(57); [L9411] call #t~string1352.base, #t~string1352.offset := #Ultimate.alloc(25); [L9427] call #t~string1356.base, #t~string1356.offset := #Ultimate.alloc(32); [L9527] call #t~string1377.base, #t~string1377.offset := #Ultimate.alloc(3); [L9527] call write~init~int(104, #t~string1377.base, #t~string1377.offset, 1); [L9527] call write~init~int(101, #t~string1377.base, 1 + #t~string1377.offset, 1); [L9527] call write~init~int(0, #t~string1377.base, 2 + #t~string1377.offset, 1); [L9545] call #t~string1378.base, #t~string1378.offset := #Ultimate.alloc(3); [L9545] call write~init~int(104, #t~string1378.base, #t~string1378.offset, 1); [L9545] call write~init~int(101, #t~string1378.base, 1 + #t~string1378.offset, 1); [L9545] call write~init~int(0, #t~string1378.base, 2 + #t~string1378.offset, 1); [L6452] ~nvpibits~0 := -1; [L6453] ~nvcibits~0 := -1; [L6454] ~rx_skb_reserve~0 := 16; [L6457-L6462] call ~#readtab~0.base, ~#readtab~0.offset := #Ultimate.alloc(68); [L6457-L6462] call write~init~int(4352, ~#readtab~0.base, ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(0, ~#readtab~0.base, 4 + ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(256, ~#readtab~0.base, 8 + ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(0, ~#readtab~0.base, 12 + ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(256, ~#readtab~0.base, 16 + ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(0, ~#readtab~0.base, 20 + ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(256, ~#readtab~0.base, 24 + ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(0, ~#readtab~0.base, 28 + ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(256, ~#readtab~0.base, 32 + ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(0, ~#readtab~0.base, 36 + ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(256, ~#readtab~0.base, 40 + ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(0, ~#readtab~0.base, 44 + ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(256, ~#readtab~0.base, 48 + ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(512, ~#readtab~0.base, 52 + ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(768, ~#readtab~0.base, 56 + ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(512, ~#readtab~0.base, 60 + ~#readtab~0.offset, 4); [L6457-L6462] call write~init~int(768, ~#readtab~0.base, 64 + ~#readtab~0.offset, 4); [L6463-L6468] call ~#clocktab~0.base, ~#clocktab~0.offset := #Ultimate.alloc(68); [L6463-L6468] call write~init~int(0, ~#clocktab~0.base, ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(256, ~#clocktab~0.base, 4 + ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(0, ~#clocktab~0.base, 8 + ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(256, ~#clocktab~0.base, 12 + ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(0, ~#clocktab~0.base, 16 + ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(256, ~#clocktab~0.base, 20 + ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(0, ~#clocktab~0.base, 24 + ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(256, ~#clocktab~0.base, 28 + ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(0, ~#clocktab~0.base, 32 + ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(256, ~#clocktab~0.base, 36 + ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(0, ~#clocktab~0.base, 40 + ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(256, ~#clocktab~0.base, 44 + ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(0, ~#clocktab~0.base, 48 + ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(256, ~#clocktab~0.base, 52 + ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(0, ~#clocktab~0.base, 56 + ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(256, ~#clocktab~0.base, 60 + ~#clocktab~0.offset, 4); [L6463-L6468] call write~init~int(0, ~#clocktab~0.base, 64 + ~#clocktab~0.offset, 4); [L9564] ~LDV_IN_INTERRUPT~0 := 0; [L9907] ~ldv_spin~0 := 0; [L6450] ~he_devs~0.base, ~he_devs~0.offset := 0, 0; [L6451] ~disable64~0 := 0; [L6455] ~irq_coalesce~0 := 1; [L6456] ~sdh~0 := 0; [L6469-L6471] call ~#he_ops~0.base, ~#he_ops~0.offset := #Ultimate.alloc(112); [L6469-L6471] call write~init~$Pointer$(0, 0, ~#he_ops~0.base, ~#he_ops~0.offset, 8); [L6469-L6471] call write~init~$Pointer$(#funAddr~he_open.base, #funAddr~he_open.offset, ~#he_ops~0.base, 8 + ~#he_ops~0.offset, 8); [L6469-L6471] call write~init~$Pointer$(#funAddr~he_close.base, #funAddr~he_close.offset, ~#he_ops~0.base, 16 + ~#he_ops~0.offset, 8); [L6469-L6471] call write~init~$Pointer$(#funAddr~he_ioctl.base, #funAddr~he_ioctl.offset, ~#he_ops~0.base, 24 + ~#he_ops~0.offset, 8); [L6469-L6471] call write~init~$Pointer$(0, 0, ~#he_ops~0.base, 32 + ~#he_ops~0.offset, 8); [L6469-L6471] call write~init~$Pointer$(0, 0, ~#he_ops~0.base, 40 + ~#he_ops~0.offset, 8); [L6469-L6471] call write~init~$Pointer$(0, 0, ~#he_ops~0.base, 48 + ~#he_ops~0.offset, 8); [L6469-L6471] call write~init~$Pointer$(#funAddr~he_send.base, #funAddr~he_send.offset, ~#he_ops~0.base, 56 + ~#he_ops~0.offset, 8); [L6469-L6471] call write~init~$Pointer$(0, 0, ~#he_ops~0.base, 64 + ~#he_ops~0.offset, 8); [L6469-L6471] call write~init~$Pointer$(#funAddr~he_phy_put.base, #funAddr~he_phy_put.offset, ~#he_ops~0.base, 72 + ~#he_ops~0.offset, 8); [L6469-L6471] call write~init~$Pointer$(#funAddr~he_phy_get.base, #funAddr~he_phy_get.offset, ~#he_ops~0.base, 80 + ~#he_ops~0.offset, 8); [L6469-L6471] call write~init~$Pointer$(0, 0, ~#he_ops~0.base, 88 + ~#he_ops~0.offset, 8); [L6469-L6471] call write~init~$Pointer$(#funAddr~he_proc_read.base, #funAddr~he_proc_read.offset, ~#he_ops~0.base, 96 + ~#he_ops~0.offset, 8); [L6469-L6471] call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#he_ops~0.base, 104 + ~#he_ops~0.offset, 8); [L9523-L9524] call ~#he_pci_tbl~0.base, ~#he_pci_tbl~0.offset := #Ultimate.alloc(64); [L9523-L9524] call write~init~int(4391, ~#he_pci_tbl~0.base, ~#he_pci_tbl~0.offset, 4); [L9523-L9524] call write~init~int(1024, ~#he_pci_tbl~0.base, 4 + ~#he_pci_tbl~0.offset, 4); [L9523-L9524] call write~init~int(4294967295, ~#he_pci_tbl~0.base, 8 + ~#he_pci_tbl~0.offset, 4); [L9523-L9524] call write~init~int(4294967295, ~#he_pci_tbl~0.base, 12 + ~#he_pci_tbl~0.offset, 4); [L9523-L9524] call write~init~int(0, ~#he_pci_tbl~0.base, 16 + ~#he_pci_tbl~0.offset, 4); [L9523-L9524] call write~init~int(0, ~#he_pci_tbl~0.base, 20 + ~#he_pci_tbl~0.offset, 4); [L9523-L9524] call write~init~int(0, ~#he_pci_tbl~0.base, 24 + ~#he_pci_tbl~0.offset, 8); [L9523-L9524] call write~init~int(0, ~#he_pci_tbl~0.base, 32 + ~#he_pci_tbl~0.offset, 4); [L9523-L9524] call write~init~int(0, ~#he_pci_tbl~0.base, 36 + ~#he_pci_tbl~0.offset, 4); [L9523-L9524] call write~init~int(0, ~#he_pci_tbl~0.base, 40 + ~#he_pci_tbl~0.offset, 4); [L9523-L9524] call write~init~int(0, ~#he_pci_tbl~0.base, 44 + ~#he_pci_tbl~0.offset, 4); [L9523-L9524] call write~init~int(0, ~#he_pci_tbl~0.base, 48 + ~#he_pci_tbl~0.offset, 4); [L9523-L9524] call write~init~int(0, ~#he_pci_tbl~0.base, 52 + ~#he_pci_tbl~0.offset, 4); [L9523-L9524] call write~init~int(0, ~#he_pci_tbl~0.base, 56 + ~#he_pci_tbl~0.offset, 8); [L9525] ~__mod_pci_device_table~0.vendor := 0; [L9525] ~__mod_pci_device_table~0.device := 0; [L9525] ~__mod_pci_device_table~0.subvendor := 0; [L9525] ~__mod_pci_device_table~0.subdevice := 0; [L9525] ~__mod_pci_device_table~0.class := 0; [L9525] ~__mod_pci_device_table~0.class_mask := 0; [L9525] ~__mod_pci_device_table~0.driver_data := 0; [L9526-L9539] call ~#he_driver~0.base, ~#he_driver~0.offset := #Ultimate.alloc(301); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 8 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(#t~string1377.base, #t~string1377.offset, ~#he_driver~0.base, 16 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(~#he_pci_tbl~0.base, ~#he_pci_tbl~0.offset, ~#he_driver~0.base, 24 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(#funAddr~he_init_one.base, #funAddr~he_init_one.offset, ~#he_driver~0.base, 32 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(#funAddr~he_remove_one.base, #funAddr~he_remove_one.offset, ~#he_driver~0.base, 40 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 48 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 56 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 64 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 72 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 80 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 88 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 96 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 104 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 112 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 120 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 128 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~int(0, ~#he_driver~0.base, 136 + ~#he_driver~0.offset, 1); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 137 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 145 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 153 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 161 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 169 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 177 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 185 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 193 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 201 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 209 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~int(0, ~#he_driver~0.base, 217 + ~#he_driver~0.offset, 4); [L9526-L9539] call write~init~int(0, ~#he_driver~0.base, 221 + ~#he_driver~0.offset, 4); [L9526-L9539] call write~init~int(0, ~#he_driver~0.base, 225 + ~#he_driver~0.offset, 4); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 229 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 237 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 245 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 253 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 261 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~int(0, ~#he_driver~0.base, 269 + ~#he_driver~0.offset, 4); [L9526-L9539] call write~init~int(0, ~#he_driver~0.base, 273 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 285 + ~#he_driver~0.offset, 8); [L9526-L9539] call write~init~$Pointer$(0, 0, ~#he_driver~0.base, 293 + ~#he_driver~0.offset, 8); [?] havoc main_#res; [?] havoc main_#t~malloc1383.base, main_#t~malloc1383.offset, main_#t~ret1384, main_#t~nondet1385, main_#t~switch1386, main_#t~ret1387, main_#t~ret1388, main_#t~ret1389, main_#t~ret1390, main_#t~ret1391, main_#t~ret1392, main_#t~ret1393, main_#t~nondet1394, main_~var_group1~0.base, main_~var_group1~0.offset, main_~res_he_open_23~0, main_~var_group2~0.base, main_~var_group2~0.offset, main_~var_he_ioctl_26_p1~0, main_~var_he_ioctl_26_p2~0.base, main_~var_he_ioctl_26_p2~0.offset, main_~var_group3~0.base, main_~var_group3~0.offset, main_~var_he_phy_put_27_p1~0, main_~var_he_phy_put_27_p2~0, main_~var_he_phy_get_28_p1~0, main_~var_he_proc_read_29_p1~0.base, main_~var_he_proc_read_29_p1~0.offset, main_~var_he_proc_read_29_p2~0.base, main_~var_he_proc_read_29_p2~0.offset, main_~var_group4~0.base, main_~var_group4~0.offset, main_~var_he_init_one_3_p1~0.base, main_~var_he_init_one_3_p1~0.offset, main_~res_he_init_one_3~0, main_~var_he_irq_handler_21_p0~0, main_~var_he_irq_handler_21_p1~0.base, main_~var_he_irq_handler_21_p1~0.offset, main_~ldv_s_he_ops_atmdev_ops~0, main_~ldv_s_he_driver_pci_driver~0, main_~tmp~47, main_~tmp___0~20, main_~tmp___1~14; [L9576] havoc main_~var_group1~0.base, main_~var_group1~0.offset; [L9577] havoc main_~res_he_open_23~0; [L9578] havoc main_~var_group2~0.base, main_~var_group2~0.offset; [L9579] havoc main_~var_he_ioctl_26_p1~0; [L9580] havoc main_~var_he_ioctl_26_p2~0.base, main_~var_he_ioctl_26_p2~0.offset; [L9581] havoc main_~var_group3~0.base, main_~var_group3~0.offset; [L9582] havoc main_~var_he_phy_put_27_p1~0; [L9583] havoc main_~var_he_phy_put_27_p2~0; [L9584] havoc main_~var_he_phy_get_28_p1~0; [L9585] havoc main_~var_he_proc_read_29_p1~0.base, main_~var_he_proc_read_29_p1~0.offset; [L9586] havoc main_~var_he_proc_read_29_p2~0.base, main_~var_he_proc_read_29_p2~0.offset; [L9587] havoc main_~var_group4~0.base, main_~var_group4~0.offset; [L9588] havoc main_~var_he_init_one_3_p1~0.base, main_~var_he_init_one_3_p1~0.offset; [L9589] havoc main_~res_he_init_one_3~0; [L9590] havoc main_~var_he_irq_handler_21_p0~0; [L9591] havoc main_~var_he_irq_handler_21_p1~0.base, main_~var_he_irq_handler_21_p1~0.offset; [L9592] havoc main_~ldv_s_he_ops_atmdev_ops~0; [L9593] havoc main_~ldv_s_he_driver_pci_driver~0; [L9594] havoc main_~tmp~47; [L9595] havoc main_~tmp___0~20; [L9596] havoc main_~tmp___1~14; [L9598] call main_#t~malloc1383.base, main_#t~malloc1383.offset := #Ultimate.alloc(1590); [L9598] main_~var_group1~0.base, main_~var_group1~0.offset := main_#t~malloc1383.base, main_#t~malloc1383.offset; [L9599] call write~$Pointer$(#funAddr~void_one_par_dummy.base, #funAddr~void_one_par_dummy.offset, main_~var_group1~0.base, 1420 + main_~var_group1~0.offset, 8); [L9600] call write~$Pointer$(#funAddr~void_two_par_dummy.base, #funAddr~void_two_par_dummy.offset, main_~var_group1~0.base, 1428 + main_~var_group1~0.offset, 8); [L9601] call write~$Pointer$(#funAddr~void_two_par_dummy.base, #funAddr~void_two_par_dummy.offset, main_~var_group1~0.base, 1436 + main_~var_group1~0.offset, 8); [L9602] call write~$Pointer$(#funAddr~int_two_par_dummy.base, #funAddr~int_two_par_dummy.offset, main_~var_group1~0.base, 1444 + main_~var_group1~0.offset, 8); [L9603] call write~$Pointer$(#funAddr~int_two_par_dummy.base, #funAddr~int_two_par_dummy.offset, main_~var_group1~0.base, 1452 + main_~var_group1~0.offset, 8); [L9606] main_~ldv_s_he_ops_atmdev_ops~0 := 0; [L9607] main_~ldv_s_he_driver_pci_driver~0 := 0; [L9608] ~LDV_IN_INTERRUPT~0 := 1; [L9609] call ldv_initialize(); [L9610] call ldv_handler_precall(); [L9611] havoc he_init_#res; [L9611] havoc he_init_#t~ret1379, he_init_~tmp~46; [L9542] havoc he_init_~tmp~46; [L9545] call he_init_#t~ret1379 := __pci_register_driver(~#he_driver~0.base, ~#he_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset, #t~string1378.base, #t~string1378.offset); [L9545] assume -2147483648 <= he_init_#t~ret1379 && he_init_#t~ret1379 <= 2147483647; [L9545] he_init_~tmp~46 := he_init_#t~ret1379; [L9545] havoc he_init_#t~ret1379; [L9546] he_init_#res := he_init_~tmp~46; [L9611] main_#t~ret1384 := he_init_#res; [L9611] assume -2147483648 <= main_#t~ret1384 && main_#t~ret1384 <= 2147483647; [L9611] main_~tmp~47 := main_#t~ret1384; [L9611] havoc main_#t~ret1384; VAL [#NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, he_init_#res=0, he_init_~tmp~46=0, main_#t~malloc1383.base=174, main_#t~malloc1383.offset=0, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp~47=0, main_~var_group1~0.base=174, main_~var_group1~0.offset=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9612-L9616] assume !(0 != main_~tmp~47); VAL [#NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, he_init_#res=0, he_init_~tmp~46=0, main_#t~malloc1383.base=174, main_#t~malloc1383.offset=0, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp~47=0, main_~var_group1~0.base=174, main_~var_group1~0.offset=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9700] assume -2147483648 <= main_#t~nondet1394 && main_#t~nondet1394 <= 2147483647; [L9700] main_~tmp___1~14 := main_#t~nondet1394; [L9700] havoc main_#t~nondet1394; VAL [#NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, he_init_#res=0, he_init_~tmp~46=0, main_#t~malloc1383.base=174, main_#t~malloc1383.offset=0, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0.base=174, main_~var_group1~0.offset=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9701-L9705] assume (0 != main_~tmp___1~14 || 0 != main_~ldv_s_he_ops_atmdev_ops~0) || 0 != main_~ldv_s_he_driver_pci_driver~0; [L9619] assume -2147483648 <= main_#t~nondet1385 && main_#t~nondet1385 <= 2147483647; [L9619] main_~tmp___0~20 := main_#t~nondet1385; [L9619] havoc main_#t~nondet1385; [L9621] main_#t~switch1386 := 0 == main_~tmp___0~20; VAL [#NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, he_init_#res=0, he_init_~tmp~46=0, main_#t~malloc1383.base=174, main_#t~malloc1383.offset=0, main_#t~switch1386=false, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0.base=174, main_~var_group1~0.offset=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9621] assume !main_#t~switch1386; [L9636] main_#t~switch1386 := main_#t~switch1386 || 1 == main_~tmp___0~20; VAL [#NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, he_init_#res=0, he_init_~tmp~46=0, main_#t~malloc1383.base=174, main_#t~malloc1383.offset=0, main_#t~switch1386=false, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0.base=174, main_~var_group1~0.offset=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9636] assume !main_#t~switch1386; [L9645] main_#t~switch1386 := main_#t~switch1386 || 2 == main_~tmp___0~20; VAL [#NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, he_init_#res=0, he_init_~tmp~46=0, main_#t~malloc1383.base=174, main_#t~malloc1383.offset=0, main_#t~switch1386=false, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0.base=174, main_~var_group1~0.offset=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9645] assume !main_#t~switch1386; [L9649] main_#t~switch1386 := main_#t~switch1386 || 3 == main_~tmp___0~20; VAL [#NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, he_init_#res=0, he_init_~tmp~46=0, main_#t~malloc1383.base=174, main_#t~malloc1383.offset=0, main_#t~switch1386=true, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0.base=174, main_~var_group1~0.offset=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9649] assume main_#t~switch1386; [L9650] call ldv_handler_precall(); [L9651] he_send_#in~vcc.base, he_send_#in~vcc.offset, he_send_#in~skb.base, he_send_#in~skb.offset := main_~var_group1~0.base, main_~var_group1~0.offset, main_~var_group3~0.base, main_~var_group3~0.offset; [L9651] havoc he_send_#res; [L9651] havoc he_send_#t~mem1227.base, he_send_#t~mem1227.offset, he_send_#t~mem1228.base, he_send_#t~mem1228.offset, he_send_#t~mem1229, he_send_#t~mem1230, he_send_#t~mem1231, he_send_#t~mem1232, he_send_#t~mem1233, he_send_#t~mem1234, he_send_#t~short1235, he_send_#t~short1236, he_send_#t~nondet1237, he_send_#t~mem1239, he_send_#t~mem1240, he_send_#t~mem1241.base, he_send_#t~mem1241.offset, he_send_#t~mem1245.base, he_send_#t~mem1245.offset, he_send_#t~mem1246.base, he_send_#t~mem1246.offset, he_send_#t~ret1247.base, he_send_#t~ret1247.offset, he_send_#t~mem1248, he_send_#t~nondet1249, he_send_#t~mem1251, he_send_#t~mem1252.base, he_send_#t~mem1252.offset, he_send_#t~mem1256.base, he_send_#t~mem1256.offset, he_send_#t~mem1257.base, he_send_#t~mem1257.offset, he_send_#t~ret1258.base, he_send_#t~ret1258.offset, he_send_#t~mem1259.base, he_send_#t~mem1259.offset, he_send_#t~mem1263.base, he_send_#t~mem1263.offset, he_send_#t~mem1264.base, he_send_#t~mem1264.offset, he_send_#t~mem1265, he_send_#t~mem1266, he_send_#t~mem1267.base, he_send_#t~mem1267.offset, he_send_#t~mem1268, he_send_#t~mem1269, he_send_#t~mem1270, he_send_#t~mem1271, he_send_#t~ret1272.base, he_send_#t~ret1272.offset, he_send_#t~mem1273.base, he_send_#t~mem1273.offset, he_send_#t~mem1274.base, he_send_#t~mem1274.offset, he_send_#t~mem1275, he_send_#t~ret1276, he_send_#t~mem1277, he_send_#t~mem1278, he_send_#t~mem1279.base, he_send_#t~mem1279.offset, he_send_~vcc.base, he_send_~vcc.offset, he_send_~skb.base, he_send_~skb.offset, he_send_~flags~4, he_send_~he_dev~7.base, he_send_~he_dev~7.offset, he_send_~cid~3, he_send_~tpd~3.base, he_send_~tpd~3.offset, he_send_~tmp~42.base, he_send_~tmp~42.offset, he_send_~pti_clp~0.base, he_send_~pti_clp~0.offset, he_send_~clp~0, he_send_~pti~0, he_send_~tmp___0~16; [L9080-L9165] he_send_~vcc.base, he_send_~vcc.offset := he_send_#in~vcc.base, he_send_#in~vcc.offset; [L9080-L9165] he_send_~skb.base, he_send_~skb.offset := he_send_#in~skb.base, he_send_#in~skb.offset; [L9082] havoc he_send_~flags~4; [L9083] havoc he_send_~he_dev~7.base, he_send_~he_dev~7.offset; [L9084] havoc he_send_~cid~3; [L9085] havoc he_send_~tpd~3.base, he_send_~tpd~3.offset; [L9086] havoc he_send_~tmp~42.base, he_send_~tmp~42.offset; [L9087] havoc he_send_~pti_clp~0.base, he_send_~pti_clp~0.offset; [L9088] havoc he_send_~clp~0; [L9089] havoc he_send_~pti~0; [L9090] havoc he_send_~tmp___0~16; [L9093] call he_send_#t~mem1227.base, he_send_#t~mem1227.offset := read~$Pointer$(he_send_~vcc.base, 1279 + he_send_~vcc.offset, 8); [L9093] call he_send_#t~mem1228.base, he_send_#t~mem1228.offset := read~$Pointer$(he_send_#t~mem1227.base, 28 + he_send_#t~mem1227.offset, 8); [L9093] he_send_~he_dev~7.base, he_send_~he_dev~7.offset := he_send_#t~mem1228.base, he_send_#t~mem1228.offset; [L9093] havoc he_send_#t~mem1227.base, he_send_#t~mem1227.offset; [L9093] havoc he_send_#t~mem1228.base, he_send_#t~mem1228.offset; [L9094] call he_send_#t~mem1229 := read~int(he_send_~vcc.base, 1257 + he_send_~vcc.offset, 2); [L9094] call he_send_#t~mem1230 := read~int(he_send_~he_dev~7.base, 56 + he_send_~he_dev~7.offset, 4); [L9094] call he_send_#t~mem1231 := read~int(he_send_~vcc.base, 1259 + he_send_~vcc.offset, 4); [L9094] he_send_~cid~3 := ~bitwiseAnd(~bitwiseOr(~shiftLeft(he_send_#t~mem1229, (if he_send_#t~mem1230 % 4294967296 % 4294967296 <= 2147483647 then he_send_#t~mem1230 % 4294967296 % 4294967296 else he_send_#t~mem1230 % 4294967296 % 4294967296 - 4294967296)), he_send_#t~mem1231), 8191); [L9094] havoc he_send_#t~mem1229; [L9094] havoc he_send_#t~mem1230; [L9094] havoc he_send_#t~mem1231; [L9095] call he_send_#t~mem1232 := read~int(he_send_~skb.base, 104 + he_send_~skb.offset, 4); [L9095] he_send_#t~short1236 := he_send_#t~mem1232 % 4294967296 > 65535; [L9095] assume !he_send_#t~short1236; [L9095] call he_send_#t~mem1233 := read~int(he_send_~vcc.base, 1379 + he_send_~vcc.offset, 1); [L9095] he_send_#t~short1235 := 13 == he_send_#t~mem1233 % 256 % 4294967296; [L9095] assume he_send_#t~short1235; [L9095] call he_send_#t~mem1234 := read~int(he_send_~skb.base, 104 + he_send_~skb.offset, 4); [L9095] he_send_#t~short1235 := 52 != he_send_#t~mem1234 % 4294967296; [L9095] he_send_#t~short1236 := he_send_#t~short1235; VAL [#NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, he_init_#res=0, he_init_~tmp~46=0, he_send_#in~skb.base=174, he_send_#in~skb.offset=1349, he_send_#in~vcc.base=174, he_send_#in~vcc.offset=0, he_send_#t~mem1232=14551349198900, he_send_#t~mem1233=2284557, he_send_#t~mem1234=14551349198900, he_send_#t~short1235=false, he_send_#t~short1236=false, he_send_~he_dev~7.base=176, he_send_~he_dev~7.offset=5382, he_send_~skb.base=174, he_send_~skb.offset=1349, he_send_~vcc.base=174, he_send_~vcc.offset=0, main_#t~malloc1383.base=174, main_#t~malloc1383.offset=0, main_#t~switch1386=true, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0.base=174, main_~var_group1~0.offset=0, main_~var_group3~0.base=174, main_~var_group3~0.offset=1349, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9095-L9107] assume !he_send_#t~short1236; [L9095] havoc he_send_#t~mem1233; [L9095] havoc he_send_#t~mem1234; [L9095] havoc he_send_#t~short1235; [L9095] havoc he_send_#t~short1236; [L9095] havoc he_send_#t~mem1232; [L9108] skb_end_pointer_#in~skb.base, skb_end_pointer_#in~skb.offset := he_send_~skb.base, he_send_~skb.offset; [L9108] havoc skb_end_pointer_#res.base, skb_end_pointer_#res.offset; [L9108] havoc skb_end_pointer_#t~mem181.base, skb_end_pointer_#t~mem181.offset, skb_end_pointer_#t~mem182, skb_end_pointer_~skb.base, skb_end_pointer_~skb.offset; [L6136-L6143] skb_end_pointer_~skb.base, skb_end_pointer_~skb.offset := skb_end_pointer_#in~skb.base, skb_end_pointer_#in~skb.offset; [L6141] call skb_end_pointer_#t~mem181.base, skb_end_pointer_#t~mem181.offset := read~$Pointer$(skb_end_pointer_~skb.base, 239 + skb_end_pointer_~skb.offset, 8); [L6141] call skb_end_pointer_#t~mem182 := read~int(skb_end_pointer_~skb.base, 235 + skb_end_pointer_~skb.offset, 4); [L6141] skb_end_pointer_#res.base, skb_end_pointer_#res.offset := skb_end_pointer_#t~mem181.base, skb_end_pointer_#t~mem181.offset + (if skb_end_pointer_#t~mem182 % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then skb_end_pointer_#t~mem182 % 4294967296 % 18446744073709551616 % 18446744073709551616 else skb_end_pointer_#t~mem182 % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616); [L6141] havoc skb_end_pointer_#t~mem182; [L6141] havoc skb_end_pointer_#t~mem181.base, skb_end_pointer_#t~mem181.offset; [L9108] he_send_#t~ret1247.base, he_send_#t~ret1247.offset := skb_end_pointer_#res.base, skb_end_pointer_#res.offset; [L9108] he_send_~tmp~42.base, he_send_~tmp~42.offset := he_send_#t~ret1247.base, he_send_#t~ret1247.offset; [L9108] havoc he_send_#t~ret1247.base, he_send_#t~ret1247.offset; [L9109] call he_send_#t~mem1248 := read~int(he_send_~tmp~42.base, he_send_~tmp~42.offset, 1); VAL [#NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, he_init_#res=0, he_init_~tmp~46=0, he_send_#in~skb.base=174, he_send_#in~skb.offset=1349, he_send_#in~vcc.base=174, he_send_#in~vcc.offset=0, he_send_#t~mem1248=1391872, he_send_~he_dev~7.base=176, he_send_~he_dev~7.offset=5382, he_send_~skb.base=174, he_send_~skb.offset=1349, he_send_~tmp~42.base=174, he_send_~tmp~42.offset=1419, he_send_~vcc.base=174, he_send_~vcc.offset=0, main_#t~malloc1383.base=174, main_#t~malloc1383.offset=0, main_#t~switch1386=true, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0.base=174, main_~var_group1~0.offset=0, main_~var_group3~0.base=174, main_~var_group3~0.offset=1349, skb_end_pointer_#in~skb.base=174, skb_end_pointer_#in~skb.offset=1349, skb_end_pointer_#res.base=174, skb_end_pointer_#res.offset=1419, skb_end_pointer_~skb.base=174, skb_end_pointer_~skb.offset=1349, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9109-L9121] assume !(0 != he_send_#t~mem1248 % 256 % 4294967296); [L9109] havoc he_send_#t~mem1248; VAL [#NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, he_init_#res=0, he_init_~tmp~46=0, he_send_#in~skb.base=174, he_send_#in~skb.offset=1349, he_send_#in~vcc.base=174, he_send_#in~vcc.offset=0, he_send_~he_dev~7.base=176, he_send_~he_dev~7.offset=5382, he_send_~skb.base=174, he_send_~skb.offset=1349, he_send_~tmp~42.base=174, he_send_~tmp~42.offset=1419, he_send_~vcc.base=174, he_send_~vcc.offset=0, main_#t~malloc1383.base=174, main_#t~malloc1383.offset=0, main_#t~switch1386=true, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0.base=174, main_~var_group1~0.offset=0, main_~var_group3~0.base=174, main_~var_group3~0.offset=1349, skb_end_pointer_#in~skb.base=174, skb_end_pointer_#in~skb.offset=1349, skb_end_pointer_#res.base=174, skb_end_pointer_#res.offset=1419, skb_end_pointer_~skb.base=174, skb_end_pointer_~skb.offset=1349, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9122] CALL call ldv_spin_lock(); VAL [#NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, old(~ldv_spin~0)=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9954] ~ldv_spin~0 := 1; [L5549] ensures true; VAL [#NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, old(~ldv_spin~0)=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9122] RET call ldv_spin_lock(); VAL [#NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, he_init_#res=0, he_init_~tmp~46=0, he_send_#in~skb.base=174, he_send_#in~skb.offset=1349, he_send_#in~vcc.base=174, he_send_#in~vcc.offset=0, he_send_~he_dev~7.base=176, he_send_~he_dev~7.offset=5382, he_send_~skb.base=174, he_send_~skb.offset=1349, he_send_~tmp~42.base=174, he_send_~tmp~42.offset=1419, he_send_~vcc.base=174, he_send_~vcc.offset=0, main_#t~malloc1383.base=174, main_#t~malloc1383.offset=0, main_#t~switch1386=true, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0.base=174, main_~var_group1~0.offset=0, main_~var_group3~0.base=174, main_~var_group3~0.offset=1349, skb_end_pointer_#in~skb.base=174, skb_end_pointer_#in~skb.offset=1349, skb_end_pointer_#res.base=174, skb_end_pointer_#res.offset=1419, skb_end_pointer_~skb.base=174, skb_end_pointer_~skb.offset=1349, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9123] CALL call he_send_#t~ret1258.base, he_send_#t~ret1258.offset := __alloc_tpd(he_send_~he_dev~7.base, he_send_~he_dev~7.offset); VAL [#in~he_dev.base=176, #in~he_dev.offset=5382, #NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L8006-L8030] ~he_dev.base, ~he_dev.offset := #in~he_dev.base, #in~he_dev.offset; [L8008] havoc ~tpd~0.base, ~tpd~0.offset; [L8009] call ~#mapping~1.base, ~#mapping~1.offset := #Ultimate.alloc(8); [L8010] havoc ~tmp~35.base, ~tmp~35.offset; [L8013] call #t~mem877.base, #t~mem877.offset := read~$Pointer$(~he_dev.base, 400 + ~he_dev.offset, 8); [L8013] ldv_dma_pool_alloc_33_#in~ldv_func_arg1.base, ldv_dma_pool_alloc_33_#in~ldv_func_arg1.offset, ldv_dma_pool_alloc_33_#in~flags, ldv_dma_pool_alloc_33_#in~ldv_func_arg3.base, ldv_dma_pool_alloc_33_#in~ldv_func_arg3.offset := #t~mem877.base, #t~mem877.offset, 33, ~#mapping~1.base, ~#mapping~1.offset; [L8013] havoc ldv_dma_pool_alloc_33_#res.base, ldv_dma_pool_alloc_33_#res.offset; [L8013] havoc ldv_dma_pool_alloc_33_#t~ret1406.base, ldv_dma_pool_alloc_33_#t~ret1406.offset, ldv_dma_pool_alloc_33_~ldv_func_arg1.base, ldv_dma_pool_alloc_33_~ldv_func_arg1.offset, ldv_dma_pool_alloc_33_~flags, ldv_dma_pool_alloc_33_~ldv_func_arg3.base, ldv_dma_pool_alloc_33_~ldv_func_arg3.offset; [L9869-L9878] ldv_dma_pool_alloc_33_~ldv_func_arg1.base, ldv_dma_pool_alloc_33_~ldv_func_arg1.offset := ldv_dma_pool_alloc_33_#in~ldv_func_arg1.base, ldv_dma_pool_alloc_33_#in~ldv_func_arg1.offset; [L9869-L9878] ldv_dma_pool_alloc_33_~flags := ldv_dma_pool_alloc_33_#in~flags; [L9869-L9878] ldv_dma_pool_alloc_33_~ldv_func_arg3.base, ldv_dma_pool_alloc_33_~ldv_func_arg3.offset := ldv_dma_pool_alloc_33_#in~ldv_func_arg3.base, ldv_dma_pool_alloc_33_#in~ldv_func_arg3.offset; VAL [#in~he_dev.base=176, #in~he_dev.offset=5382, #NULL.base=0, #NULL.offset=0, #t~mem877.base=180, #t~mem877.offset=183, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, ldv_dma_pool_alloc_33_#in~flags=33, ldv_dma_pool_alloc_33_#in~ldv_func_arg1.base=180, ldv_dma_pool_alloc_33_#in~ldv_func_arg1.offset=183, ldv_dma_pool_alloc_33_#in~ldv_func_arg3.base=179, ldv_dma_pool_alloc_33_#in~ldv_func_arg3.offset=0, ldv_dma_pool_alloc_33_~flags=33, ldv_dma_pool_alloc_33_~ldv_func_arg1.base=180, ldv_dma_pool_alloc_33_~ldv_func_arg1.offset=183, ldv_dma_pool_alloc_33_~ldv_func_arg3.base=179, ldv_dma_pool_alloc_33_~ldv_func_arg3.offset=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#mapping~1.base=179, ~#mapping~1.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_dev.base=176, ~he_dev.offset=5382, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9874] CALL call ldv_check_alloc_flags(ldv_dma_pool_alloc_33_~flags); VAL [#in~flags=33, #NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9908-L9920] ~flags := #in~flags; VAL [#in~flags=33, #NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~flags=33, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9913-L9917] assume !(0 == ~ldv_spin~0 || 0 != ~bitwiseAnd(~flags, 32) % 4294967296); VAL [#in~flags=33, #NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~flags=33, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9916] CALL call ldv_error(); VAL [#NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9895] assert false; VAL [#NULL.base=0, #NULL.offset=0, #t~string1039.base=41, #t~string1039.offset=0, #t~string1044.base=147, #t~string1044.offset=0, #t~string1048.base=146, #t~string1048.offset=0, #t~string1085.base=144, #t~string1085.offset=0, #t~string1121.base=143, #t~string1121.offset=0, #t~string1123.base=142, #t~string1123.offset=0, #t~string1124.base=141, #t~string1124.offset=0, #t~string1133.base=139, #t~string1133.offset=0, #t~string1157.base=138, #t~string1157.offset=0, #t~string1185.base=135, #t~string1185.offset=0, #t~string1191.base=103, #t~string1191.offset=0, #t~string1199.base=134, #t~string1199.offset=0, #t~string1214.base=133, #t~string1214.offset=0, #t~string1222.base=131, #t~string1222.offset=0, #t~string1238.base=130, #t~string1238.offset=0, #t~string1250.base=129, #t~string1250.offset=0, #t~string1319.base=127, #t~string1319.offset=0, #t~string1321.base=126, #t~string1321.offset=0, #t~string1323.base=125, #t~string1323.offset=0, #t~string1324.base=124, #t~string1324.offset=0, #t~string1327.base=123, #t~string1327.offset=0, #t~string1337.base=122, #t~string1337.offset=0, #t~string1339.base=121, #t~string1339.offset=0, #t~string1342.base=119, #t~string1342.offset=0, #t~string1344.base=118, #t~string1344.offset=0, #t~string1347.base=117, #t~string1347.offset=0, #t~string1350.base=113, #t~string1350.offset=0, #t~string1352.base=110, #t~string1352.offset=0, #t~string1356.base=111, #t~string1356.offset=0, #t~string1377.base=160, #t~string1377.offset=0, #t~string1378.base=105, #t~string1378.offset=0, #t~string163.base=95, #t~string163.offset=0, #t~string322.base=94, #t~string322.offset=0, #t~string326.base=93, #t~string326.offset=0, #t~string327.base=92, #t~string327.offset=0, #t~string333.base=91, #t~string333.offset=0, #t~string380.base=90, #t~string380.offset=0, #t~string410.base=89, #t~string410.offset=0, #t~string416.base=87, #t~string416.offset=0, #t~string418.base=86, #t~string418.offset=0, #t~string423.base=85, #t~string423.offset=0, #t~string429.base=84, #t~string429.offset=0, #t~string452.base=82, #t~string452.offset=0, #t~string462.base=81, #t~string462.offset=0, #t~string470.base=79, #t~string470.offset=0, #t~string498.base=78, #t~string498.offset=0, #t~string528.base=76, #t~string528.offset=0, #t~string531.base=75, #t~string531.offset=0, #t~string542.base=74, #t~string542.offset=0, #t~string548.base=73, #t~string548.offset=0, #t~string552.base=71, #t~string552.offset=0, #t~string558.base=69, #t~string558.offset=0, #t~string562.base=67, #t~string562.offset=0, #t~string568.base=66, #t~string568.offset=0, #t~string573.base=65, #t~string573.offset=0, #t~string579.base=63, #t~string579.offset=0, #t~string584.base=62, #t~string584.offset=0, #t~string591.base=61, #t~string591.offset=0, #t~string598.base=59, #t~string598.offset=0, #t~string603.base=58, #t~string603.offset=0, #t~string611.base=55, #t~string611.offset=0, #t~string614.base=54, #t~string614.offset=0, #t~string615.base=53, #t~string615.offset=0, #t~string640.base=50, #t~string640.offset=0, #t~string742.base=51, #t~string742.offset=0, #t~string747.base=109, #t~string747.offset=0, #t~string770.base=106, #t~string770.offset=0, #t~string81.base=26, #t~string81.offset=0, #t~string82.base=97, #t~string82.offset=0, #t~string892.base=107, #t~string892.offset=0, #t~string902.base=150, #t~string902.offset=0, #t~string963.base=149, #t~string963.offset=0, ~#__this_module~0.base=158, ~#__this_module~0.offset=170, ~#clocktab~0.base=155, ~#clocktab~0.offset=0, ~#he_driver~0.base=17, ~#he_driver~0.offset=0, ~#he_ops~0.base=99, ~#he_ops~0.offset=0, ~#he_pci_tbl~0.base=167, ~#he_pci_tbl~0.offset=0, ~#readtab~0.base=49, ~#readtab~0.offset=0, ~__mod_pci_device_table~0.class=0, ~__mod_pci_device_table~0.class_mask=0, ~__mod_pci_device_table~0.device=0, ~__mod_pci_device_table~0.driver_data=0, ~__mod_pci_device_table~0.subdevice=0, ~__mod_pci_device_table~0.subvendor=0, ~__mod_pci_device_table~0.vendor=0, ~disable64~0=0, ~he_devs~0.base=0, ~he_devs~0.offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [?] #NULL := { base: 0, offset: 0 }; [?] #valid[0] := 0; [L5888] FCALL call #t~string81 := #Ultimate.alloc(136); [L5889] FCALL call #t~string82 := #Ultimate.alloc(27); [L6110] FCALL call #t~string163 := #Ultimate.alloc(137); [L6585] FCALL call #t~string322 := #Ultimate.alloc(16); [L6594] FCALL call #t~string326 := #Ultimate.alloc(32); [L6600] FCALL call #t~string327 := #Ultimate.alloc(3); [L6600] FCALL call write~init~int(104, { base: #t~string327!base, offset: #t~string327!offset }, 1); [L6600] FCALL call write~init~int(101, { base: #t~string327!base, offset: 1 + #t~string327!offset }, 1); [L6600] FCALL call write~init~int(0, { base: #t~string327!base, offset: 2 + #t~string327!offset }, 1); [L6624] FCALL call #t~string333 := #Ultimate.alloc(31); [L6854] FCALL call #t~string380 := #Ultimate.alloc(30); [L7146] FCALL call #t~string410 := #Ultimate.alloc(45); [L7155] FCALL call #t~string416 := #Ultimate.alloc(43); [L7160] FCALL call #t~string418 := #Ultimate.alloc(5); [L7160] FCALL call write~init~int(114, { base: #t~string418!base, offset: #t~string418!offset }, 1); [L7160] FCALL call write~init~int(98, { base: #t~string418!base, offset: 1 + #t~string418!offset }, 1); [L7160] FCALL call write~init~int(112, { base: #t~string418!base, offset: 2 + #t~string418!offset }, 1); [L7160] FCALL call write~init~int(108, { base: #t~string418!base, offset: 3 + #t~string418!offset }, 1); [L7160] FCALL call write~init~int(0, { base: #t~string418!base, offset: 4 + #t~string418!offset }, 1); [L7163] FCALL call #t~string423 := #Ultimate.alloc(35); [L7171] FCALL call #t~string429 := #Ultimate.alloc(34); [L7214] FCALL call #t~string452 := #Ultimate.alloc(32); [L7228] FCALL call #t~string462 := #Ultimate.alloc(30); [L7238] FCALL call #t~string470 := #Ultimate.alloc(32); [L7293] FCALL call #t~string498 := #Ultimate.alloc(31); [L7353] FCALL call #t~string528 := #Ultimate.alloc(3); [L7353] FCALL call write~init~int(104, { base: #t~string528!base, offset: #t~string528!offset }, 1); [L7353] FCALL call write~init~int(101, { base: #t~string528!base, offset: 1 + #t~string528!offset }, 1); [L7353] FCALL call write~init~int(0, { base: #t~string528!base, offset: 2 + #t~string528!offset }, 1); [L7355] FCALL call #t~string531 := #Ultimate.alloc(30); [L7404] FCALL call #t~string542 := #Ultimate.alloc(30); [L7412] FCALL call #t~string548 := #Ultimate.alloc(32); [L7419] FCALL call #t~string552 := #Ultimate.alloc(32); [L7427] FCALL call #t~string558 := #Ultimate.alloc(29); [L7434] FCALL call #t~string562 := #Ultimate.alloc(36); [L7443] FCALL call #t~string568 := #Ultimate.alloc(40); [L7452] FCALL call #t~string573 := #Ultimate.alloc(34); [L7461] FCALL call #t~string579 := #Ultimate.alloc(38); [L7471] FCALL call #t~string584 := #Ultimate.alloc(34); [L7483] FCALL call #t~string591 := #Ultimate.alloc(21); [L7495] FCALL call #t~string598 := #Ultimate.alloc(43); [L7501] FCALL call #t~string603 := #Ultimate.alloc(33); [L7531] FCALL call #t~string611 := #Ultimate.alloc(32); [L7532] FCALL call #t~string614 := #Ultimate.alloc(3); [L7532] FCALL call write~init~int(83, { base: #t~string614!base, offset: #t~string614!offset }, 1); [L7532] FCALL call write~init~int(77, { base: #t~string614!base, offset: 1 + #t~string614!offset }, 1); [L7532] FCALL call write~init~int(0, { base: #t~string614!base, offset: 2 + #t~string614!offset }, 1); [L7532] FCALL call #t~string615 := #Ultimate.alloc(3); [L7532] FCALL call write~init~int(77, { base: #t~string615!base, offset: #t~string615!offset }, 1); [L7532] FCALL call write~init~int(77, { base: #t~string615!base, offset: 1 + #t~string615!offset }, 1); [L7532] FCALL call write~init~int(0, { base: #t~string615!base, offset: 2 + #t~string615!offset }, 1); [L7565] FCALL call #t~string640 := #Ultimate.alloc(34); [L7778] FCALL call #t~string742 := #Ultimate.alloc(4); [L7778] FCALL call write~init~int(116, { base: #t~string742!base, offset: #t~string742!offset }, 1); [L7778] FCALL call write~init~int(112, { base: #t~string742!base, offset: 1 + #t~string742!offset }, 1); [L7778] FCALL call write~init~int(100, { base: #t~string742!base, offset: 2 + #t~string742!offset }, 1); [L7778] FCALL call write~init~int(0, { base: #t~string742!base, offset: 3 + #t~string742!offset }, 1); [L7781] FCALL call #t~string747 := #Ultimate.alloc(38); [L7838] FCALL call #t~string770 := #Ultimate.alloc(44); [L8078] FCALL call #t~string892 := #Ultimate.alloc(39); [L8092] FCALL call #t~string902 := #Ultimate.alloc(30); [L8244] FCALL call #t~string963 := #Ultimate.alloc(47); [L8434] FCALL call #t~string1039 := #Ultimate.alloc(21); [L8438] FCALL call #t~string1044 := #Ultimate.alloc(19); [L8449] FCALL call #t~string1048 := #Ultimate.alloc(22); [L8526] FCALL call #t~string1085 := #Ultimate.alloc(30); [L8617] FCALL call #t~string1121 := #Ultimate.alloc(46); [L8625] FCALL call #t~string1123 := #Ultimate.alloc(18); [L8626] FCALL call #t~string1124 := #Ultimate.alloc(18); [L8658] FCALL call #t~string1133 := #Ultimate.alloc(40); [L8757] FCALL call #t~string1157 := #Ultimate.alloc(40); [L8915] FCALL call #t~string1185 := #Ultimate.alloc(34); [L8942] FCALL call #t~string1191 := #Ultimate.alloc(40); [L8961] FCALL call #t~string1199 := #Ultimate.alloc(46); [L9030] FCALL call #t~string1214 := #Ultimate.alloc(34); [L9063] FCALL call #t~string1222 := #Ultimate.alloc(32); [L9096] FCALL call #t~string1238 := #Ultimate.alloc(48); [L9110] FCALL call #t~string1250 := #Ultimate.alloc(34); [L9326] FCALL call #t~string1319 := #Ultimate.alloc(15); [L9334] FCALL call #t~string1321 := #Ultimate.alloc(7); [L9334] FCALL call write~init~int(37, { base: #t~string1321!base, offset: #t~string1321!offset }, 1); [L9334] FCALL call write~init~int(115, { base: #t~string1321!base, offset: 1 + #t~string1321!offset }, 1); [L9334] FCALL call write~init~int(37, { base: #t~string1321!base, offset: 2 + #t~string1321!offset }, 1); [L9334] FCALL call write~init~int(115, { base: #t~string1321!base, offset: 3 + #t~string1321!offset }, 1); [L9334] FCALL call write~init~int(10, { base: #t~string1321!base, offset: 4 + #t~string1321!offset }, 1); [L9334] FCALL call write~init~int(10, { base: #t~string1321!base, offset: 5 + #t~string1321!offset }, 1); [L9334] FCALL call write~init~int(0, { base: #t~string1321!base, offset: 6 + #t~string1321!offset }, 1); [L9334] FCALL call #t~string1323 := #Ultimate.alloc(3); [L9334] FCALL call write~init~int(83, { base: #t~string1323!base, offset: #t~string1323!offset }, 1); [L9334] FCALL call write~init~int(77, { base: #t~string1323!base, offset: 1 + #t~string1323!offset }, 1); [L9334] FCALL call write~init~int(0, { base: #t~string1323!base, offset: 2 + #t~string1323!offset }, 1); [L9334] FCALL call #t~string1324 := #Ultimate.alloc(3); [L9334] FCALL call write~init~int(77, { base: #t~string1324!base, offset: #t~string1324!offset }, 1); [L9334] FCALL call write~init~int(77, { base: #t~string1324!base, offset: 1 + #t~string1324!offset }, 1); [L9334] FCALL call write~init~int(0, { base: #t~string1324!base, offset: 2 + #t~string1324!offset }, 1); [L9342] FCALL call #t~string1327 := #Ultimate.alloc(70); [L9360] FCALL call #t~string1337 := #Ultimate.alloc(29); [L9368] FCALL call #t~string1339 := #Ultimate.alloc(37); [L9376] FCALL call #t~string1342 := #Ultimate.alloc(28); [L9384] FCALL call #t~string1344 := #Ultimate.alloc(38); [L9392] FCALL call #t~string1347 := #Ultimate.alloc(27); [L9400] FCALL call #t~string1350 := #Ultimate.alloc(57); [L9411] FCALL call #t~string1352 := #Ultimate.alloc(25); [L9427] FCALL call #t~string1356 := #Ultimate.alloc(32); [L9527] FCALL call #t~string1377 := #Ultimate.alloc(3); [L9527] FCALL call write~init~int(104, { base: #t~string1377!base, offset: #t~string1377!offset }, 1); [L9527] FCALL call write~init~int(101, { base: #t~string1377!base, offset: 1 + #t~string1377!offset }, 1); [L9527] FCALL call write~init~int(0, { base: #t~string1377!base, offset: 2 + #t~string1377!offset }, 1); [L9545] FCALL call #t~string1378 := #Ultimate.alloc(3); [L9545] FCALL call write~init~int(104, { base: #t~string1378!base, offset: #t~string1378!offset }, 1); [L9545] FCALL call write~init~int(101, { base: #t~string1378!base, offset: 1 + #t~string1378!offset }, 1); [L9545] FCALL call write~init~int(0, { base: #t~string1378!base, offset: 2 + #t~string1378!offset }, 1); [L6452] ~nvpibits~0 := -1; [L6453] ~nvcibits~0 := -1; [L6454] ~rx_skb_reserve~0 := 16; [L6457-L6462] FCALL call ~#readtab~0 := #Ultimate.alloc(68); [L6457-L6462] FCALL call write~init~int(4352, { base: ~#readtab~0!base, offset: ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(0, { base: ~#readtab~0!base, offset: 4 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(256, { base: ~#readtab~0!base, offset: 8 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(0, { base: ~#readtab~0!base, offset: 12 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(256, { base: ~#readtab~0!base, offset: 16 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(0, { base: ~#readtab~0!base, offset: 20 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(256, { base: ~#readtab~0!base, offset: 24 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(0, { base: ~#readtab~0!base, offset: 28 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(256, { base: ~#readtab~0!base, offset: 32 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(0, { base: ~#readtab~0!base, offset: 36 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(256, { base: ~#readtab~0!base, offset: 40 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(0, { base: ~#readtab~0!base, offset: 44 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(256, { base: ~#readtab~0!base, offset: 48 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(512, { base: ~#readtab~0!base, offset: 52 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(768, { base: ~#readtab~0!base, offset: 56 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(512, { base: ~#readtab~0!base, offset: 60 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(768, { base: ~#readtab~0!base, offset: 64 + ~#readtab~0!offset }, 4); [L6463-L6468] FCALL call ~#clocktab~0 := #Ultimate.alloc(68); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 4 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 8 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 12 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 16 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 20 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 24 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 28 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 32 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 36 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 40 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 44 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 48 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 52 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 56 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 60 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 64 + ~#clocktab~0!offset }, 4); [L9564] ~LDV_IN_INTERRUPT~0 := 0; [L9907] ~ldv_spin~0 := 0; [L6450] ~he_devs~0 := { base: 0, offset: 0 }; [L6451] ~disable64~0 := 0; [L6455] ~irq_coalesce~0 := 1; [L6456] ~sdh~0 := 0; [L6469-L6471] FCALL call ~#he_ops~0 := #Ultimate.alloc(112); [L6469-L6471] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_ops~0!base, offset: ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(#funAddr~he_open, { base: ~#he_ops~0!base, offset: 8 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(#funAddr~he_close, { base: ~#he_ops~0!base, offset: 16 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(#funAddr~he_ioctl, { base: ~#he_ops~0!base, offset: 24 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_ops~0!base, offset: 32 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_ops~0!base, offset: 40 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_ops~0!base, offset: 48 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(#funAddr~he_send, { base: ~#he_ops~0!base, offset: 56 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_ops~0!base, offset: 64 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(#funAddr~he_phy_put, { base: ~#he_ops~0!base, offset: 72 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(#funAddr~he_phy_get, { base: ~#he_ops~0!base, offset: 80 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_ops~0!base, offset: 88 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(#funAddr~he_proc_read, { base: ~#he_ops~0!base, offset: 96 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(~#__this_module~0, { base: ~#he_ops~0!base, offset: 104 + ~#he_ops~0!offset }, 8); [L9523-L9524] FCALL call ~#he_pci_tbl~0 := #Ultimate.alloc(64); [L9523-L9524] FCALL call write~init~int(4391, { base: ~#he_pci_tbl~0!base, offset: ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(1024, { base: ~#he_pci_tbl~0!base, offset: 4 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(4294967295, { base: ~#he_pci_tbl~0!base, offset: 8 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(4294967295, { base: ~#he_pci_tbl~0!base, offset: 12 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 16 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 20 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 24 + ~#he_pci_tbl~0!offset }, 8); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 32 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 36 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 40 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 44 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 48 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 52 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 56 + ~#he_pci_tbl~0!offset }, 8); [L9525] ~__mod_pci_device_table~0!vendor := 0; [L9525] ~__mod_pci_device_table~0!device := 0; [L9525] ~__mod_pci_device_table~0!subvendor := 0; [L9525] ~__mod_pci_device_table~0!subdevice := 0; [L9525] ~__mod_pci_device_table~0!class := 0; [L9525] ~__mod_pci_device_table~0!class_mask := 0; [L9525] ~__mod_pci_device_table~0!driver_data := 0; [L9526-L9539] FCALL call ~#he_driver~0 := #Ultimate.alloc(301); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 8 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$(#t~string1377, { base: ~#he_driver~0!base, offset: 16 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$(~#he_pci_tbl~0, { base: ~#he_driver~0!base, offset: 24 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$(#funAddr~he_init_one, { base: ~#he_driver~0!base, offset: 32 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$(#funAddr~he_remove_one, { base: ~#he_driver~0!base, offset: 40 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 48 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 56 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 64 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 72 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 80 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 88 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 96 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 104 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 112 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 120 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 128 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~int(0, { base: ~#he_driver~0!base, offset: 136 + ~#he_driver~0!offset }, 1); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 137 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 145 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 153 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 161 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 169 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 177 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 185 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 193 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 201 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 209 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~int(0, { base: ~#he_driver~0!base, offset: 217 + ~#he_driver~0!offset }, 4); [L9526-L9539] FCALL call write~init~int(0, { base: ~#he_driver~0!base, offset: 221 + ~#he_driver~0!offset }, 4); [L9526-L9539] FCALL call write~init~int(0, { base: ~#he_driver~0!base, offset: 225 + ~#he_driver~0!offset }, 4); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 229 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 237 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 245 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 253 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 261 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~int(0, { base: ~#he_driver~0!base, offset: 269 + ~#he_driver~0!offset }, 4); [L9526-L9539] FCALL call write~init~int(0, { base: ~#he_driver~0!base, offset: 273 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 285 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 293 + ~#he_driver~0!offset }, 8); [?] havoc main_#res; [?] havoc main_#t~malloc1383, main_#t~ret1384, main_#t~nondet1385, main_#t~switch1386, main_#t~ret1387, main_#t~ret1388, main_#t~ret1389, main_#t~ret1390, main_#t~ret1391, main_#t~ret1392, main_#t~ret1393, main_#t~nondet1394, main_~var_group1~0, main_~res_he_open_23~0, main_~var_group2~0, main_~var_he_ioctl_26_p1~0, main_~var_he_ioctl_26_p2~0, main_~var_group3~0, main_~var_he_phy_put_27_p1~0, main_~var_he_phy_put_27_p2~0, main_~var_he_phy_get_28_p1~0, main_~var_he_proc_read_29_p1~0, main_~var_he_proc_read_29_p2~0, main_~var_group4~0, main_~var_he_init_one_3_p1~0, main_~res_he_init_one_3~0, main_~var_he_irq_handler_21_p0~0, main_~var_he_irq_handler_21_p1~0, main_~ldv_s_he_ops_atmdev_ops~0, main_~ldv_s_he_driver_pci_driver~0, main_~tmp~47, main_~tmp___0~20, main_~tmp___1~14; [L9576] havoc main_~var_group1~0; [L9577] havoc main_~res_he_open_23~0; [L9578] havoc main_~var_group2~0; [L9579] havoc main_~var_he_ioctl_26_p1~0; [L9580] havoc main_~var_he_ioctl_26_p2~0; [L9581] havoc main_~var_group3~0; [L9582] havoc main_~var_he_phy_put_27_p1~0; [L9583] havoc main_~var_he_phy_put_27_p2~0; [L9584] havoc main_~var_he_phy_get_28_p1~0; [L9585] havoc main_~var_he_proc_read_29_p1~0; [L9586] havoc main_~var_he_proc_read_29_p2~0; [L9587] havoc main_~var_group4~0; [L9588] havoc main_~var_he_init_one_3_p1~0; [L9589] havoc main_~res_he_init_one_3~0; [L9590] havoc main_~var_he_irq_handler_21_p0~0; [L9591] havoc main_~var_he_irq_handler_21_p1~0; [L9592] havoc main_~ldv_s_he_ops_atmdev_ops~0; [L9593] havoc main_~ldv_s_he_driver_pci_driver~0; [L9594] havoc main_~tmp~47; [L9595] havoc main_~tmp___0~20; [L9596] havoc main_~tmp___1~14; [L9598] FCALL call main_#t~malloc1383 := #Ultimate.alloc(1590); [L9598] main_~var_group1~0 := main_#t~malloc1383; [L9599] FCALL call write~$Pointer$(#funAddr~void_one_par_dummy, { base: main_~var_group1~0!base, offset: 1420 + main_~var_group1~0!offset }, 8); [L9600] FCALL call write~$Pointer$(#funAddr~void_two_par_dummy, { base: main_~var_group1~0!base, offset: 1428 + main_~var_group1~0!offset }, 8); [L9601] FCALL call write~$Pointer$(#funAddr~void_two_par_dummy, { base: main_~var_group1~0!base, offset: 1436 + main_~var_group1~0!offset }, 8); [L9602] FCALL call write~$Pointer$(#funAddr~int_two_par_dummy, { base: main_~var_group1~0!base, offset: 1444 + main_~var_group1~0!offset }, 8); [L9603] FCALL call write~$Pointer$(#funAddr~int_two_par_dummy, { base: main_~var_group1~0!base, offset: 1452 + main_~var_group1~0!offset }, 8); [L9606] main_~ldv_s_he_ops_atmdev_ops~0 := 0; [L9607] main_~ldv_s_he_driver_pci_driver~0 := 0; [L9608] ~LDV_IN_INTERRUPT~0 := 1; [L9609] FCALL call ldv_initialize(); [L9610] FCALL call ldv_handler_precall(); [L9611] havoc he_init_#res; [L9611] havoc he_init_#t~ret1379, he_init_~tmp~46; [L9542] havoc he_init_~tmp~46; [L9545] FCALL call he_init_#t~ret1379 := __pci_register_driver(~#he_driver~0, ~#__this_module~0, #t~string1378); [L9545] assume -2147483648 <= he_init_#t~ret1379 && he_init_#t~ret1379 <= 2147483647; [L9545] he_init_~tmp~46 := he_init_#t~ret1379; [L9545] havoc he_init_#t~ret1379; [L9546] he_init_#res := he_init_~tmp~46; [L9611] main_#t~ret1384 := he_init_#res; [L9611] assume -2147483648 <= main_#t~ret1384 && main_#t~ret1384 <= 2147483647; [L9611] main_~tmp~47 := main_#t~ret1384; [L9611] havoc main_#t~ret1384; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, he_init_#res=0, he_init_~tmp~46=0, main_#t~malloc1383!base=174, main_#t~malloc1383!offset=0, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp~47=0, main_~var_group1~0!base=174, main_~var_group1~0!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9612] COND FALSE !(0 != main_~tmp~47) VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, he_init_#res=0, he_init_~tmp~46=0, main_#t~malloc1383!base=174, main_#t~malloc1383!offset=0, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp~47=0, main_~var_group1~0!base=174, main_~var_group1~0!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9700] assume -2147483648 <= main_#t~nondet1394 && main_#t~nondet1394 <= 2147483647; [L9700] main_~tmp___1~14 := main_#t~nondet1394; [L9700] havoc main_#t~nondet1394; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, he_init_#res=0, he_init_~tmp~46=0, main_#t~malloc1383!base=174, main_#t~malloc1383!offset=0, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0!base=174, main_~var_group1~0!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9701] COND TRUE (0 != main_~tmp___1~14 || 0 != main_~ldv_s_he_ops_atmdev_ops~0) || 0 != main_~ldv_s_he_driver_pci_driver~0 [L9619] assume -2147483648 <= main_#t~nondet1385 && main_#t~nondet1385 <= 2147483647; [L9619] main_~tmp___0~20 := main_#t~nondet1385; [L9619] havoc main_#t~nondet1385; [L9621] main_#t~switch1386 := 0 == main_~tmp___0~20; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, he_init_#res=0, he_init_~tmp~46=0, main_#t~malloc1383!base=174, main_#t~malloc1383!offset=0, main_#t~switch1386=false, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0!base=174, main_~var_group1~0!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9620-L9697] COND FALSE !(main_#t~switch1386) [L9636] main_#t~switch1386 := main_#t~switch1386 || 1 == main_~tmp___0~20; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, he_init_#res=0, he_init_~tmp~46=0, main_#t~malloc1383!base=174, main_#t~malloc1383!offset=0, main_#t~switch1386=false, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0!base=174, main_~var_group1~0!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9620-L9697] COND FALSE !(main_#t~switch1386) [L9645] main_#t~switch1386 := main_#t~switch1386 || 2 == main_~tmp___0~20; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, he_init_#res=0, he_init_~tmp~46=0, main_#t~malloc1383!base=174, main_#t~malloc1383!offset=0, main_#t~switch1386=false, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0!base=174, main_~var_group1~0!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9620-L9697] COND FALSE !(main_#t~switch1386) [L9649] main_#t~switch1386 := main_#t~switch1386 || 3 == main_~tmp___0~20; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, he_init_#res=0, he_init_~tmp~46=0, main_#t~malloc1383!base=174, main_#t~malloc1383!offset=0, main_#t~switch1386=true, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0!base=174, main_~var_group1~0!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9620-L9697] COND TRUE main_#t~switch1386 [L9650] FCALL call ldv_handler_precall(); [L9651] he_send_#in~vcc, he_send_#in~skb := main_~var_group1~0, main_~var_group3~0; [L9651] havoc he_send_#res; [L9651] havoc he_send_#t~mem1227, he_send_#t~mem1228, he_send_#t~mem1229, he_send_#t~mem1230, he_send_#t~mem1231, he_send_#t~mem1232, he_send_#t~mem1233, he_send_#t~mem1234, he_send_#t~short1235, he_send_#t~short1236, he_send_#t~nondet1237, he_send_#t~mem1239, he_send_#t~mem1240, he_send_#t~mem1241, he_send_#t~mem1245, he_send_#t~mem1246, he_send_#t~ret1247, he_send_#t~mem1248, he_send_#t~nondet1249, he_send_#t~mem1251, he_send_#t~mem1252, he_send_#t~mem1256, he_send_#t~mem1257, he_send_#t~ret1258, he_send_#t~mem1259, he_send_#t~mem1263, he_send_#t~mem1264, he_send_#t~mem1265, he_send_#t~mem1266, he_send_#t~mem1267, he_send_#t~mem1268, he_send_#t~mem1269, he_send_#t~mem1270, he_send_#t~mem1271, he_send_#t~ret1272, he_send_#t~mem1273, he_send_#t~mem1274, he_send_#t~mem1275, he_send_#t~ret1276, he_send_#t~mem1277, he_send_#t~mem1278, he_send_#t~mem1279, he_send_~vcc, he_send_~skb, he_send_~flags~4, he_send_~he_dev~7, he_send_~cid~3, he_send_~tpd~3, he_send_~tmp~42, he_send_~pti_clp~0, he_send_~clp~0, he_send_~pti~0, he_send_~tmp___0~16; [L9080-L9165] he_send_~vcc := he_send_#in~vcc; [L9080-L9165] he_send_~skb := he_send_#in~skb; [L9082] havoc he_send_~flags~4; [L9083] havoc he_send_~he_dev~7; [L9084] havoc he_send_~cid~3; [L9085] havoc he_send_~tpd~3; [L9086] havoc he_send_~tmp~42; [L9087] havoc he_send_~pti_clp~0; [L9088] havoc he_send_~clp~0; [L9089] havoc he_send_~pti~0; [L9090] havoc he_send_~tmp___0~16; [L9093] FCALL call he_send_#t~mem1227 := read~$Pointer$({ base: he_send_~vcc!base, offset: 1279 + he_send_~vcc!offset }, 8); [L9093] FCALL call he_send_#t~mem1228 := read~$Pointer$({ base: he_send_#t~mem1227!base, offset: 28 + he_send_#t~mem1227!offset }, 8); [L9093] he_send_~he_dev~7 := he_send_#t~mem1228; [L9093] havoc he_send_#t~mem1227; [L9093] havoc he_send_#t~mem1228; [L9094] FCALL call he_send_#t~mem1229 := read~int({ base: he_send_~vcc!base, offset: 1257 + he_send_~vcc!offset }, 2); [L9094] FCALL call he_send_#t~mem1230 := read~int({ base: he_send_~he_dev~7!base, offset: 56 + he_send_~he_dev~7!offset }, 4); [L9094] FCALL call he_send_#t~mem1231 := read~int({ base: he_send_~vcc!base, offset: 1259 + he_send_~vcc!offset }, 4); [L9094] he_send_~cid~3 := ~bitwiseAnd(~bitwiseOr(~shiftLeft(he_send_#t~mem1229, (if he_send_#t~mem1230 % 4294967296 % 4294967296 <= 2147483647 then he_send_#t~mem1230 % 4294967296 % 4294967296 else he_send_#t~mem1230 % 4294967296 % 4294967296 - 4294967296)), he_send_#t~mem1231), 8191); [L9094] havoc he_send_#t~mem1229; [L9094] havoc he_send_#t~mem1230; [L9094] havoc he_send_#t~mem1231; [L9095] FCALL call he_send_#t~mem1232 := read~int({ base: he_send_~skb!base, offset: 104 + he_send_~skb!offset }, 4); [L9095] he_send_#t~short1236 := he_send_#t~mem1232 % 4294967296 > 65535; [L9095] COND FALSE !(he_send_#t~short1236) [L9095] FCALL call he_send_#t~mem1233 := read~int({ base: he_send_~vcc!base, offset: 1379 + he_send_~vcc!offset }, 1); [L9095] he_send_#t~short1235 := 13 == he_send_#t~mem1233 % 256 % 4294967296; [L9095] COND TRUE he_send_#t~short1235 [L9095] FCALL call he_send_#t~mem1234 := read~int({ base: he_send_~skb!base, offset: 104 + he_send_~skb!offset }, 4); [L9095] he_send_#t~short1235 := 52 != he_send_#t~mem1234 % 4294967296; [L9095] he_send_#t~short1236 := he_send_#t~short1235; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, he_init_#res=0, he_init_~tmp~46=0, he_send_#in~skb!base=174, he_send_#in~skb!offset=1349, he_send_#in~vcc!base=174, he_send_#in~vcc!offset=0, he_send_#t~mem1232=14551349198900, he_send_#t~mem1233=2284557, he_send_#t~mem1234=14551349198900, he_send_#t~short1235=false, he_send_#t~short1236=false, he_send_~he_dev~7!base=176, he_send_~he_dev~7!offset=5382, he_send_~skb!base=174, he_send_~skb!offset=1349, he_send_~vcc!base=174, he_send_~vcc!offset=0, main_#t~malloc1383!base=174, main_#t~malloc1383!offset=0, main_#t~switch1386=true, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0!base=174, main_~var_group1~0!offset=0, main_~var_group3~0!base=174, main_~var_group3~0!offset=1349, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9095] COND FALSE !(he_send_#t~short1236) [L9095] havoc he_send_#t~mem1233; [L9095] havoc he_send_#t~mem1234; [L9095] havoc he_send_#t~short1235; [L9095] havoc he_send_#t~short1236; [L9095] havoc he_send_#t~mem1232; [L9108] skb_end_pointer_#in~skb := he_send_~skb; [L9108] havoc skb_end_pointer_#res; [L9108] havoc skb_end_pointer_#t~mem181, skb_end_pointer_#t~mem182, skb_end_pointer_~skb; [L6136-L6143] skb_end_pointer_~skb := skb_end_pointer_#in~skb; [L6141] FCALL call skb_end_pointer_#t~mem181 := read~$Pointer$({ base: skb_end_pointer_~skb!base, offset: 239 + skb_end_pointer_~skb!offset }, 8); [L6141] FCALL call skb_end_pointer_#t~mem182 := read~int({ base: skb_end_pointer_~skb!base, offset: 235 + skb_end_pointer_~skb!offset }, 4); [L6141] skb_end_pointer_#res := { base: skb_end_pointer_#t~mem181!base, offset: skb_end_pointer_#t~mem181!offset + (if skb_end_pointer_#t~mem182 % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then skb_end_pointer_#t~mem182 % 4294967296 % 18446744073709551616 % 18446744073709551616 else skb_end_pointer_#t~mem182 % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616) }; [L6141] havoc skb_end_pointer_#t~mem182; [L6141] havoc skb_end_pointer_#t~mem181; [L9108] he_send_#t~ret1247 := skb_end_pointer_#res; [L9108] he_send_~tmp~42 := he_send_#t~ret1247; [L9108] havoc he_send_#t~ret1247; [L9109] FCALL call he_send_#t~mem1248 := read~int({ base: he_send_~tmp~42!base, offset: he_send_~tmp~42!offset }, 1); VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, he_init_#res=0, he_init_~tmp~46=0, he_send_#in~skb!base=174, he_send_#in~skb!offset=1349, he_send_#in~vcc!base=174, he_send_#in~vcc!offset=0, he_send_#t~mem1248=1391872, he_send_~he_dev~7!base=176, he_send_~he_dev~7!offset=5382, he_send_~skb!base=174, he_send_~skb!offset=1349, he_send_~tmp~42!base=174, he_send_~tmp~42!offset=1419, he_send_~vcc!base=174, he_send_~vcc!offset=0, main_#t~malloc1383!base=174, main_#t~malloc1383!offset=0, main_#t~switch1386=true, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0!base=174, main_~var_group1~0!offset=0, main_~var_group3~0!base=174, main_~var_group3~0!offset=1349, skb_end_pointer_#in~skb!base=174, skb_end_pointer_#in~skb!offset=1349, skb_end_pointer_#res!base=174, skb_end_pointer_#res!offset=1419, skb_end_pointer_~skb!base=174, skb_end_pointer_~skb!offset=1349, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9109] COND FALSE !(0 != he_send_#t~mem1248 % 256 % 4294967296) [L9109] havoc he_send_#t~mem1248; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, he_init_#res=0, he_init_~tmp~46=0, he_send_#in~skb!base=174, he_send_#in~skb!offset=1349, he_send_#in~vcc!base=174, he_send_#in~vcc!offset=0, he_send_~he_dev~7!base=176, he_send_~he_dev~7!offset=5382, he_send_~skb!base=174, he_send_~skb!offset=1349, he_send_~tmp~42!base=174, he_send_~tmp~42!offset=1419, he_send_~vcc!base=174, he_send_~vcc!offset=0, main_#t~malloc1383!base=174, main_#t~malloc1383!offset=0, main_#t~switch1386=true, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0!base=174, main_~var_group1~0!offset=0, main_~var_group3~0!base=174, main_~var_group3~0!offset=1349, skb_end_pointer_#in~skb!base=174, skb_end_pointer_#in~skb!offset=1349, skb_end_pointer_#res!base=174, skb_end_pointer_#res!offset=1419, skb_end_pointer_~skb!base=174, skb_end_pointer_~skb!offset=1349, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9122] CALL call ldv_spin_lock(); VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, old(~ldv_spin~0)=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9954] ~ldv_spin~0 := 1; [L9122] RET call ldv_spin_lock(); VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, he_init_#res=0, he_init_~tmp~46=0, he_send_#in~skb!base=174, he_send_#in~skb!offset=1349, he_send_#in~vcc!base=174, he_send_#in~vcc!offset=0, he_send_~he_dev~7!base=176, he_send_~he_dev~7!offset=5382, he_send_~skb!base=174, he_send_~skb!offset=1349, he_send_~tmp~42!base=174, he_send_~tmp~42!offset=1419, he_send_~vcc!base=174, he_send_~vcc!offset=0, main_#t~malloc1383!base=174, main_#t~malloc1383!offset=0, main_#t~switch1386=true, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0!base=174, main_~var_group1~0!offset=0, main_~var_group3~0!base=174, main_~var_group3~0!offset=1349, skb_end_pointer_#in~skb!base=174, skb_end_pointer_#in~skb!offset=1349, skb_end_pointer_#res!base=174, skb_end_pointer_#res!offset=1419, skb_end_pointer_~skb!base=174, skb_end_pointer_~skb!offset=1349, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9123] CALL call he_send_#t~ret1258 := __alloc_tpd(he_send_~he_dev~7); VAL [#in~he_dev!base=176, #in~he_dev!offset=5382, #NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L8006-L8030] ~he_dev := #in~he_dev; [L8008] havoc ~tpd~0; [L8009] FCALL call ~#mapping~1 := #Ultimate.alloc(8); [L8010] havoc ~tmp~35; [L8013] FCALL call #t~mem877 := read~$Pointer$({ base: ~he_dev!base, offset: 400 + ~he_dev!offset }, 8); [L8013] ldv_dma_pool_alloc_33_#in~ldv_func_arg1, ldv_dma_pool_alloc_33_#in~flags, ldv_dma_pool_alloc_33_#in~ldv_func_arg3 := #t~mem877, 33, ~#mapping~1; [L8013] havoc ldv_dma_pool_alloc_33_#res; [L8013] havoc ldv_dma_pool_alloc_33_#t~ret1406, ldv_dma_pool_alloc_33_~ldv_func_arg1, ldv_dma_pool_alloc_33_~flags, ldv_dma_pool_alloc_33_~ldv_func_arg3; [L9869-L9878] ldv_dma_pool_alloc_33_~ldv_func_arg1 := ldv_dma_pool_alloc_33_#in~ldv_func_arg1; [L9869-L9878] ldv_dma_pool_alloc_33_~flags := ldv_dma_pool_alloc_33_#in~flags; [L9869-L9878] ldv_dma_pool_alloc_33_~ldv_func_arg3 := ldv_dma_pool_alloc_33_#in~ldv_func_arg3; VAL [#in~he_dev!base=176, #in~he_dev!offset=5382, #NULL!base=0, #NULL!offset=0, #t~mem877!base=180, #t~mem877!offset=183, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ldv_dma_pool_alloc_33_#in~flags=33, ldv_dma_pool_alloc_33_#in~ldv_func_arg1!base=180, ldv_dma_pool_alloc_33_#in~ldv_func_arg1!offset=183, ldv_dma_pool_alloc_33_#in~ldv_func_arg3!base=179, ldv_dma_pool_alloc_33_#in~ldv_func_arg3!offset=0, ldv_dma_pool_alloc_33_~flags=33, ldv_dma_pool_alloc_33_~ldv_func_arg1!base=180, ldv_dma_pool_alloc_33_~ldv_func_arg1!offset=183, ldv_dma_pool_alloc_33_~ldv_func_arg3!base=179, ldv_dma_pool_alloc_33_~ldv_func_arg3!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#mapping~1!base=179, ~#mapping~1!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_dev!base=176, ~he_dev!offset=5382, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9874] CALL call ldv_check_alloc_flags(ldv_dma_pool_alloc_33_~flags); VAL [#in~flags=33, #NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9908-L9920] ~flags := #in~flags; VAL [#in~flags=33, #NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~flags=33, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9913] COND FALSE !(0 == ~ldv_spin~0 || 0 != ~bitwiseAnd(~flags, 32) % 4294967296) VAL [#in~flags=33, #NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~flags=33, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9916] CALL call ldv_error(); VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9895] assert false; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] #NULL := { base: 0, offset: 0 }; [?] #valid[0] := 0; [L5888] FCALL call #t~string81 := #Ultimate.alloc(136); [L5889] FCALL call #t~string82 := #Ultimate.alloc(27); [L6110] FCALL call #t~string163 := #Ultimate.alloc(137); [L6585] FCALL call #t~string322 := #Ultimate.alloc(16); [L6594] FCALL call #t~string326 := #Ultimate.alloc(32); [L6600] FCALL call #t~string327 := #Ultimate.alloc(3); [L6600] FCALL call write~init~int(104, { base: #t~string327!base, offset: #t~string327!offset }, 1); [L6600] FCALL call write~init~int(101, { base: #t~string327!base, offset: 1 + #t~string327!offset }, 1); [L6600] FCALL call write~init~int(0, { base: #t~string327!base, offset: 2 + #t~string327!offset }, 1); [L6624] FCALL call #t~string333 := #Ultimate.alloc(31); [L6854] FCALL call #t~string380 := #Ultimate.alloc(30); [L7146] FCALL call #t~string410 := #Ultimate.alloc(45); [L7155] FCALL call #t~string416 := #Ultimate.alloc(43); [L7160] FCALL call #t~string418 := #Ultimate.alloc(5); [L7160] FCALL call write~init~int(114, { base: #t~string418!base, offset: #t~string418!offset }, 1); [L7160] FCALL call write~init~int(98, { base: #t~string418!base, offset: 1 + #t~string418!offset }, 1); [L7160] FCALL call write~init~int(112, { base: #t~string418!base, offset: 2 + #t~string418!offset }, 1); [L7160] FCALL call write~init~int(108, { base: #t~string418!base, offset: 3 + #t~string418!offset }, 1); [L7160] FCALL call write~init~int(0, { base: #t~string418!base, offset: 4 + #t~string418!offset }, 1); [L7163] FCALL call #t~string423 := #Ultimate.alloc(35); [L7171] FCALL call #t~string429 := #Ultimate.alloc(34); [L7214] FCALL call #t~string452 := #Ultimate.alloc(32); [L7228] FCALL call #t~string462 := #Ultimate.alloc(30); [L7238] FCALL call #t~string470 := #Ultimate.alloc(32); [L7293] FCALL call #t~string498 := #Ultimate.alloc(31); [L7353] FCALL call #t~string528 := #Ultimate.alloc(3); [L7353] FCALL call write~init~int(104, { base: #t~string528!base, offset: #t~string528!offset }, 1); [L7353] FCALL call write~init~int(101, { base: #t~string528!base, offset: 1 + #t~string528!offset }, 1); [L7353] FCALL call write~init~int(0, { base: #t~string528!base, offset: 2 + #t~string528!offset }, 1); [L7355] FCALL call #t~string531 := #Ultimate.alloc(30); [L7404] FCALL call #t~string542 := #Ultimate.alloc(30); [L7412] FCALL call #t~string548 := #Ultimate.alloc(32); [L7419] FCALL call #t~string552 := #Ultimate.alloc(32); [L7427] FCALL call #t~string558 := #Ultimate.alloc(29); [L7434] FCALL call #t~string562 := #Ultimate.alloc(36); [L7443] FCALL call #t~string568 := #Ultimate.alloc(40); [L7452] FCALL call #t~string573 := #Ultimate.alloc(34); [L7461] FCALL call #t~string579 := #Ultimate.alloc(38); [L7471] FCALL call #t~string584 := #Ultimate.alloc(34); [L7483] FCALL call #t~string591 := #Ultimate.alloc(21); [L7495] FCALL call #t~string598 := #Ultimate.alloc(43); [L7501] FCALL call #t~string603 := #Ultimate.alloc(33); [L7531] FCALL call #t~string611 := #Ultimate.alloc(32); [L7532] FCALL call #t~string614 := #Ultimate.alloc(3); [L7532] FCALL call write~init~int(83, { base: #t~string614!base, offset: #t~string614!offset }, 1); [L7532] FCALL call write~init~int(77, { base: #t~string614!base, offset: 1 + #t~string614!offset }, 1); [L7532] FCALL call write~init~int(0, { base: #t~string614!base, offset: 2 + #t~string614!offset }, 1); [L7532] FCALL call #t~string615 := #Ultimate.alloc(3); [L7532] FCALL call write~init~int(77, { base: #t~string615!base, offset: #t~string615!offset }, 1); [L7532] FCALL call write~init~int(77, { base: #t~string615!base, offset: 1 + #t~string615!offset }, 1); [L7532] FCALL call write~init~int(0, { base: #t~string615!base, offset: 2 + #t~string615!offset }, 1); [L7565] FCALL call #t~string640 := #Ultimate.alloc(34); [L7778] FCALL call #t~string742 := #Ultimate.alloc(4); [L7778] FCALL call write~init~int(116, { base: #t~string742!base, offset: #t~string742!offset }, 1); [L7778] FCALL call write~init~int(112, { base: #t~string742!base, offset: 1 + #t~string742!offset }, 1); [L7778] FCALL call write~init~int(100, { base: #t~string742!base, offset: 2 + #t~string742!offset }, 1); [L7778] FCALL call write~init~int(0, { base: #t~string742!base, offset: 3 + #t~string742!offset }, 1); [L7781] FCALL call #t~string747 := #Ultimate.alloc(38); [L7838] FCALL call #t~string770 := #Ultimate.alloc(44); [L8078] FCALL call #t~string892 := #Ultimate.alloc(39); [L8092] FCALL call #t~string902 := #Ultimate.alloc(30); [L8244] FCALL call #t~string963 := #Ultimate.alloc(47); [L8434] FCALL call #t~string1039 := #Ultimate.alloc(21); [L8438] FCALL call #t~string1044 := #Ultimate.alloc(19); [L8449] FCALL call #t~string1048 := #Ultimate.alloc(22); [L8526] FCALL call #t~string1085 := #Ultimate.alloc(30); [L8617] FCALL call #t~string1121 := #Ultimate.alloc(46); [L8625] FCALL call #t~string1123 := #Ultimate.alloc(18); [L8626] FCALL call #t~string1124 := #Ultimate.alloc(18); [L8658] FCALL call #t~string1133 := #Ultimate.alloc(40); [L8757] FCALL call #t~string1157 := #Ultimate.alloc(40); [L8915] FCALL call #t~string1185 := #Ultimate.alloc(34); [L8942] FCALL call #t~string1191 := #Ultimate.alloc(40); [L8961] FCALL call #t~string1199 := #Ultimate.alloc(46); [L9030] FCALL call #t~string1214 := #Ultimate.alloc(34); [L9063] FCALL call #t~string1222 := #Ultimate.alloc(32); [L9096] FCALL call #t~string1238 := #Ultimate.alloc(48); [L9110] FCALL call #t~string1250 := #Ultimate.alloc(34); [L9326] FCALL call #t~string1319 := #Ultimate.alloc(15); [L9334] FCALL call #t~string1321 := #Ultimate.alloc(7); [L9334] FCALL call write~init~int(37, { base: #t~string1321!base, offset: #t~string1321!offset }, 1); [L9334] FCALL call write~init~int(115, { base: #t~string1321!base, offset: 1 + #t~string1321!offset }, 1); [L9334] FCALL call write~init~int(37, { base: #t~string1321!base, offset: 2 + #t~string1321!offset }, 1); [L9334] FCALL call write~init~int(115, { base: #t~string1321!base, offset: 3 + #t~string1321!offset }, 1); [L9334] FCALL call write~init~int(10, { base: #t~string1321!base, offset: 4 + #t~string1321!offset }, 1); [L9334] FCALL call write~init~int(10, { base: #t~string1321!base, offset: 5 + #t~string1321!offset }, 1); [L9334] FCALL call write~init~int(0, { base: #t~string1321!base, offset: 6 + #t~string1321!offset }, 1); [L9334] FCALL call #t~string1323 := #Ultimate.alloc(3); [L9334] FCALL call write~init~int(83, { base: #t~string1323!base, offset: #t~string1323!offset }, 1); [L9334] FCALL call write~init~int(77, { base: #t~string1323!base, offset: 1 + #t~string1323!offset }, 1); [L9334] FCALL call write~init~int(0, { base: #t~string1323!base, offset: 2 + #t~string1323!offset }, 1); [L9334] FCALL call #t~string1324 := #Ultimate.alloc(3); [L9334] FCALL call write~init~int(77, { base: #t~string1324!base, offset: #t~string1324!offset }, 1); [L9334] FCALL call write~init~int(77, { base: #t~string1324!base, offset: 1 + #t~string1324!offset }, 1); [L9334] FCALL call write~init~int(0, { base: #t~string1324!base, offset: 2 + #t~string1324!offset }, 1); [L9342] FCALL call #t~string1327 := #Ultimate.alloc(70); [L9360] FCALL call #t~string1337 := #Ultimate.alloc(29); [L9368] FCALL call #t~string1339 := #Ultimate.alloc(37); [L9376] FCALL call #t~string1342 := #Ultimate.alloc(28); [L9384] FCALL call #t~string1344 := #Ultimate.alloc(38); [L9392] FCALL call #t~string1347 := #Ultimate.alloc(27); [L9400] FCALL call #t~string1350 := #Ultimate.alloc(57); [L9411] FCALL call #t~string1352 := #Ultimate.alloc(25); [L9427] FCALL call #t~string1356 := #Ultimate.alloc(32); [L9527] FCALL call #t~string1377 := #Ultimate.alloc(3); [L9527] FCALL call write~init~int(104, { base: #t~string1377!base, offset: #t~string1377!offset }, 1); [L9527] FCALL call write~init~int(101, { base: #t~string1377!base, offset: 1 + #t~string1377!offset }, 1); [L9527] FCALL call write~init~int(0, { base: #t~string1377!base, offset: 2 + #t~string1377!offset }, 1); [L9545] FCALL call #t~string1378 := #Ultimate.alloc(3); [L9545] FCALL call write~init~int(104, { base: #t~string1378!base, offset: #t~string1378!offset }, 1); [L9545] FCALL call write~init~int(101, { base: #t~string1378!base, offset: 1 + #t~string1378!offset }, 1); [L9545] FCALL call write~init~int(0, { base: #t~string1378!base, offset: 2 + #t~string1378!offset }, 1); [L6452] ~nvpibits~0 := -1; [L6453] ~nvcibits~0 := -1; [L6454] ~rx_skb_reserve~0 := 16; [L6457-L6462] FCALL call ~#readtab~0 := #Ultimate.alloc(68); [L6457-L6462] FCALL call write~init~int(4352, { base: ~#readtab~0!base, offset: ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(0, { base: ~#readtab~0!base, offset: 4 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(256, { base: ~#readtab~0!base, offset: 8 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(0, { base: ~#readtab~0!base, offset: 12 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(256, { base: ~#readtab~0!base, offset: 16 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(0, { base: ~#readtab~0!base, offset: 20 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(256, { base: ~#readtab~0!base, offset: 24 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(0, { base: ~#readtab~0!base, offset: 28 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(256, { base: ~#readtab~0!base, offset: 32 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(0, { base: ~#readtab~0!base, offset: 36 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(256, { base: ~#readtab~0!base, offset: 40 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(0, { base: ~#readtab~0!base, offset: 44 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(256, { base: ~#readtab~0!base, offset: 48 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(512, { base: ~#readtab~0!base, offset: 52 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(768, { base: ~#readtab~0!base, offset: 56 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(512, { base: ~#readtab~0!base, offset: 60 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(768, { base: ~#readtab~0!base, offset: 64 + ~#readtab~0!offset }, 4); [L6463-L6468] FCALL call ~#clocktab~0 := #Ultimate.alloc(68); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 4 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 8 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 12 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 16 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 20 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 24 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 28 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 32 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 36 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 40 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 44 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 48 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 52 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 56 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 60 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 64 + ~#clocktab~0!offset }, 4); [L9564] ~LDV_IN_INTERRUPT~0 := 0; [L9907] ~ldv_spin~0 := 0; [L6450] ~he_devs~0 := { base: 0, offset: 0 }; [L6451] ~disable64~0 := 0; [L6455] ~irq_coalesce~0 := 1; [L6456] ~sdh~0 := 0; [L6469-L6471] FCALL call ~#he_ops~0 := #Ultimate.alloc(112); [L6469-L6471] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_ops~0!base, offset: ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(#funAddr~he_open, { base: ~#he_ops~0!base, offset: 8 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(#funAddr~he_close, { base: ~#he_ops~0!base, offset: 16 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(#funAddr~he_ioctl, { base: ~#he_ops~0!base, offset: 24 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_ops~0!base, offset: 32 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_ops~0!base, offset: 40 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_ops~0!base, offset: 48 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(#funAddr~he_send, { base: ~#he_ops~0!base, offset: 56 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_ops~0!base, offset: 64 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(#funAddr~he_phy_put, { base: ~#he_ops~0!base, offset: 72 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(#funAddr~he_phy_get, { base: ~#he_ops~0!base, offset: 80 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_ops~0!base, offset: 88 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(#funAddr~he_proc_read, { base: ~#he_ops~0!base, offset: 96 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(~#__this_module~0, { base: ~#he_ops~0!base, offset: 104 + ~#he_ops~0!offset }, 8); [L9523-L9524] FCALL call ~#he_pci_tbl~0 := #Ultimate.alloc(64); [L9523-L9524] FCALL call write~init~int(4391, { base: ~#he_pci_tbl~0!base, offset: ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(1024, { base: ~#he_pci_tbl~0!base, offset: 4 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(4294967295, { base: ~#he_pci_tbl~0!base, offset: 8 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(4294967295, { base: ~#he_pci_tbl~0!base, offset: 12 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 16 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 20 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 24 + ~#he_pci_tbl~0!offset }, 8); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 32 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 36 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 40 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 44 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 48 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 52 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 56 + ~#he_pci_tbl~0!offset }, 8); [L9525] ~__mod_pci_device_table~0!vendor := 0; [L9525] ~__mod_pci_device_table~0!device := 0; [L9525] ~__mod_pci_device_table~0!subvendor := 0; [L9525] ~__mod_pci_device_table~0!subdevice := 0; [L9525] ~__mod_pci_device_table~0!class := 0; [L9525] ~__mod_pci_device_table~0!class_mask := 0; [L9525] ~__mod_pci_device_table~0!driver_data := 0; [L9526-L9539] FCALL call ~#he_driver~0 := #Ultimate.alloc(301); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 8 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$(#t~string1377, { base: ~#he_driver~0!base, offset: 16 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$(~#he_pci_tbl~0, { base: ~#he_driver~0!base, offset: 24 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$(#funAddr~he_init_one, { base: ~#he_driver~0!base, offset: 32 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$(#funAddr~he_remove_one, { base: ~#he_driver~0!base, offset: 40 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 48 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 56 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 64 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 72 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 80 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 88 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 96 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 104 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 112 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 120 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 128 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~int(0, { base: ~#he_driver~0!base, offset: 136 + ~#he_driver~0!offset }, 1); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 137 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 145 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 153 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 161 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 169 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 177 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 185 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 193 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 201 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 209 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~int(0, { base: ~#he_driver~0!base, offset: 217 + ~#he_driver~0!offset }, 4); [L9526-L9539] FCALL call write~init~int(0, { base: ~#he_driver~0!base, offset: 221 + ~#he_driver~0!offset }, 4); [L9526-L9539] FCALL call write~init~int(0, { base: ~#he_driver~0!base, offset: 225 + ~#he_driver~0!offset }, 4); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 229 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 237 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 245 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 253 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 261 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~int(0, { base: ~#he_driver~0!base, offset: 269 + ~#he_driver~0!offset }, 4); [L9526-L9539] FCALL call write~init~int(0, { base: ~#he_driver~0!base, offset: 273 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 285 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 293 + ~#he_driver~0!offset }, 8); [?] havoc main_#res; [?] havoc main_#t~malloc1383, main_#t~ret1384, main_#t~nondet1385, main_#t~switch1386, main_#t~ret1387, main_#t~ret1388, main_#t~ret1389, main_#t~ret1390, main_#t~ret1391, main_#t~ret1392, main_#t~ret1393, main_#t~nondet1394, main_~var_group1~0, main_~res_he_open_23~0, main_~var_group2~0, main_~var_he_ioctl_26_p1~0, main_~var_he_ioctl_26_p2~0, main_~var_group3~0, main_~var_he_phy_put_27_p1~0, main_~var_he_phy_put_27_p2~0, main_~var_he_phy_get_28_p1~0, main_~var_he_proc_read_29_p1~0, main_~var_he_proc_read_29_p2~0, main_~var_group4~0, main_~var_he_init_one_3_p1~0, main_~res_he_init_one_3~0, main_~var_he_irq_handler_21_p0~0, main_~var_he_irq_handler_21_p1~0, main_~ldv_s_he_ops_atmdev_ops~0, main_~ldv_s_he_driver_pci_driver~0, main_~tmp~47, main_~tmp___0~20, main_~tmp___1~14; [L9576] havoc main_~var_group1~0; [L9577] havoc main_~res_he_open_23~0; [L9578] havoc main_~var_group2~0; [L9579] havoc main_~var_he_ioctl_26_p1~0; [L9580] havoc main_~var_he_ioctl_26_p2~0; [L9581] havoc main_~var_group3~0; [L9582] havoc main_~var_he_phy_put_27_p1~0; [L9583] havoc main_~var_he_phy_put_27_p2~0; [L9584] havoc main_~var_he_phy_get_28_p1~0; [L9585] havoc main_~var_he_proc_read_29_p1~0; [L9586] havoc main_~var_he_proc_read_29_p2~0; [L9587] havoc main_~var_group4~0; [L9588] havoc main_~var_he_init_one_3_p1~0; [L9589] havoc main_~res_he_init_one_3~0; [L9590] havoc main_~var_he_irq_handler_21_p0~0; [L9591] havoc main_~var_he_irq_handler_21_p1~0; [L9592] havoc main_~ldv_s_he_ops_atmdev_ops~0; [L9593] havoc main_~ldv_s_he_driver_pci_driver~0; [L9594] havoc main_~tmp~47; [L9595] havoc main_~tmp___0~20; [L9596] havoc main_~tmp___1~14; [L9598] FCALL call main_#t~malloc1383 := #Ultimate.alloc(1590); [L9598] main_~var_group1~0 := main_#t~malloc1383; [L9599] FCALL call write~$Pointer$(#funAddr~void_one_par_dummy, { base: main_~var_group1~0!base, offset: 1420 + main_~var_group1~0!offset }, 8); [L9600] FCALL call write~$Pointer$(#funAddr~void_two_par_dummy, { base: main_~var_group1~0!base, offset: 1428 + main_~var_group1~0!offset }, 8); [L9601] FCALL call write~$Pointer$(#funAddr~void_two_par_dummy, { base: main_~var_group1~0!base, offset: 1436 + main_~var_group1~0!offset }, 8); [L9602] FCALL call write~$Pointer$(#funAddr~int_two_par_dummy, { base: main_~var_group1~0!base, offset: 1444 + main_~var_group1~0!offset }, 8); [L9603] FCALL call write~$Pointer$(#funAddr~int_two_par_dummy, { base: main_~var_group1~0!base, offset: 1452 + main_~var_group1~0!offset }, 8); [L9606] main_~ldv_s_he_ops_atmdev_ops~0 := 0; [L9607] main_~ldv_s_he_driver_pci_driver~0 := 0; [L9608] ~LDV_IN_INTERRUPT~0 := 1; [L9609] FCALL call ldv_initialize(); [L9610] FCALL call ldv_handler_precall(); [L9611] havoc he_init_#res; [L9611] havoc he_init_#t~ret1379, he_init_~tmp~46; [L9542] havoc he_init_~tmp~46; [L9545] FCALL call he_init_#t~ret1379 := __pci_register_driver(~#he_driver~0, ~#__this_module~0, #t~string1378); [L9545] assume -2147483648 <= he_init_#t~ret1379 && he_init_#t~ret1379 <= 2147483647; [L9545] he_init_~tmp~46 := he_init_#t~ret1379; [L9545] havoc he_init_#t~ret1379; [L9546] he_init_#res := he_init_~tmp~46; [L9611] main_#t~ret1384 := he_init_#res; [L9611] assume -2147483648 <= main_#t~ret1384 && main_#t~ret1384 <= 2147483647; [L9611] main_~tmp~47 := main_#t~ret1384; [L9611] havoc main_#t~ret1384; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, he_init_#res=0, he_init_~tmp~46=0, main_#t~malloc1383!base=174, main_#t~malloc1383!offset=0, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp~47=0, main_~var_group1~0!base=174, main_~var_group1~0!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9612] COND FALSE !(0 != main_~tmp~47) VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, he_init_#res=0, he_init_~tmp~46=0, main_#t~malloc1383!base=174, main_#t~malloc1383!offset=0, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp~47=0, main_~var_group1~0!base=174, main_~var_group1~0!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9700] assume -2147483648 <= main_#t~nondet1394 && main_#t~nondet1394 <= 2147483647; [L9700] main_~tmp___1~14 := main_#t~nondet1394; [L9700] havoc main_#t~nondet1394; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, he_init_#res=0, he_init_~tmp~46=0, main_#t~malloc1383!base=174, main_#t~malloc1383!offset=0, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0!base=174, main_~var_group1~0!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9701] COND TRUE (0 != main_~tmp___1~14 || 0 != main_~ldv_s_he_ops_atmdev_ops~0) || 0 != main_~ldv_s_he_driver_pci_driver~0 [L9619] assume -2147483648 <= main_#t~nondet1385 && main_#t~nondet1385 <= 2147483647; [L9619] main_~tmp___0~20 := main_#t~nondet1385; [L9619] havoc main_#t~nondet1385; [L9621] main_#t~switch1386 := 0 == main_~tmp___0~20; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, he_init_#res=0, he_init_~tmp~46=0, main_#t~malloc1383!base=174, main_#t~malloc1383!offset=0, main_#t~switch1386=false, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0!base=174, main_~var_group1~0!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9620-L9697] COND FALSE !(main_#t~switch1386) [L9636] main_#t~switch1386 := main_#t~switch1386 || 1 == main_~tmp___0~20; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, he_init_#res=0, he_init_~tmp~46=0, main_#t~malloc1383!base=174, main_#t~malloc1383!offset=0, main_#t~switch1386=false, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0!base=174, main_~var_group1~0!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9620-L9697] COND FALSE !(main_#t~switch1386) [L9645] main_#t~switch1386 := main_#t~switch1386 || 2 == main_~tmp___0~20; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, he_init_#res=0, he_init_~tmp~46=0, main_#t~malloc1383!base=174, main_#t~malloc1383!offset=0, main_#t~switch1386=false, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0!base=174, main_~var_group1~0!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9620-L9697] COND FALSE !(main_#t~switch1386) [L9649] main_#t~switch1386 := main_#t~switch1386 || 3 == main_~tmp___0~20; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, he_init_#res=0, he_init_~tmp~46=0, main_#t~malloc1383!base=174, main_#t~malloc1383!offset=0, main_#t~switch1386=true, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0!base=174, main_~var_group1~0!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9620-L9697] COND TRUE main_#t~switch1386 [L9650] FCALL call ldv_handler_precall(); [L9651] he_send_#in~vcc, he_send_#in~skb := main_~var_group1~0, main_~var_group3~0; [L9651] havoc he_send_#res; [L9651] havoc he_send_#t~mem1227, he_send_#t~mem1228, he_send_#t~mem1229, he_send_#t~mem1230, he_send_#t~mem1231, he_send_#t~mem1232, he_send_#t~mem1233, he_send_#t~mem1234, he_send_#t~short1235, he_send_#t~short1236, he_send_#t~nondet1237, he_send_#t~mem1239, he_send_#t~mem1240, he_send_#t~mem1241, he_send_#t~mem1245, he_send_#t~mem1246, he_send_#t~ret1247, he_send_#t~mem1248, he_send_#t~nondet1249, he_send_#t~mem1251, he_send_#t~mem1252, he_send_#t~mem1256, he_send_#t~mem1257, he_send_#t~ret1258, he_send_#t~mem1259, he_send_#t~mem1263, he_send_#t~mem1264, he_send_#t~mem1265, he_send_#t~mem1266, he_send_#t~mem1267, he_send_#t~mem1268, he_send_#t~mem1269, he_send_#t~mem1270, he_send_#t~mem1271, he_send_#t~ret1272, he_send_#t~mem1273, he_send_#t~mem1274, he_send_#t~mem1275, he_send_#t~ret1276, he_send_#t~mem1277, he_send_#t~mem1278, he_send_#t~mem1279, he_send_~vcc, he_send_~skb, he_send_~flags~4, he_send_~he_dev~7, he_send_~cid~3, he_send_~tpd~3, he_send_~tmp~42, he_send_~pti_clp~0, he_send_~clp~0, he_send_~pti~0, he_send_~tmp___0~16; [L9080-L9165] he_send_~vcc := he_send_#in~vcc; [L9080-L9165] he_send_~skb := he_send_#in~skb; [L9082] havoc he_send_~flags~4; [L9083] havoc he_send_~he_dev~7; [L9084] havoc he_send_~cid~3; [L9085] havoc he_send_~tpd~3; [L9086] havoc he_send_~tmp~42; [L9087] havoc he_send_~pti_clp~0; [L9088] havoc he_send_~clp~0; [L9089] havoc he_send_~pti~0; [L9090] havoc he_send_~tmp___0~16; [L9093] FCALL call he_send_#t~mem1227 := read~$Pointer$({ base: he_send_~vcc!base, offset: 1279 + he_send_~vcc!offset }, 8); [L9093] FCALL call he_send_#t~mem1228 := read~$Pointer$({ base: he_send_#t~mem1227!base, offset: 28 + he_send_#t~mem1227!offset }, 8); [L9093] he_send_~he_dev~7 := he_send_#t~mem1228; [L9093] havoc he_send_#t~mem1227; [L9093] havoc he_send_#t~mem1228; [L9094] FCALL call he_send_#t~mem1229 := read~int({ base: he_send_~vcc!base, offset: 1257 + he_send_~vcc!offset }, 2); [L9094] FCALL call he_send_#t~mem1230 := read~int({ base: he_send_~he_dev~7!base, offset: 56 + he_send_~he_dev~7!offset }, 4); [L9094] FCALL call he_send_#t~mem1231 := read~int({ base: he_send_~vcc!base, offset: 1259 + he_send_~vcc!offset }, 4); [L9094] he_send_~cid~3 := ~bitwiseAnd(~bitwiseOr(~shiftLeft(he_send_#t~mem1229, (if he_send_#t~mem1230 % 4294967296 % 4294967296 <= 2147483647 then he_send_#t~mem1230 % 4294967296 % 4294967296 else he_send_#t~mem1230 % 4294967296 % 4294967296 - 4294967296)), he_send_#t~mem1231), 8191); [L9094] havoc he_send_#t~mem1229; [L9094] havoc he_send_#t~mem1230; [L9094] havoc he_send_#t~mem1231; [L9095] FCALL call he_send_#t~mem1232 := read~int({ base: he_send_~skb!base, offset: 104 + he_send_~skb!offset }, 4); [L9095] he_send_#t~short1236 := he_send_#t~mem1232 % 4294967296 > 65535; [L9095] COND FALSE !(he_send_#t~short1236) [L9095] FCALL call he_send_#t~mem1233 := read~int({ base: he_send_~vcc!base, offset: 1379 + he_send_~vcc!offset }, 1); [L9095] he_send_#t~short1235 := 13 == he_send_#t~mem1233 % 256 % 4294967296; [L9095] COND TRUE he_send_#t~short1235 [L9095] FCALL call he_send_#t~mem1234 := read~int({ base: he_send_~skb!base, offset: 104 + he_send_~skb!offset }, 4); [L9095] he_send_#t~short1235 := 52 != he_send_#t~mem1234 % 4294967296; [L9095] he_send_#t~short1236 := he_send_#t~short1235; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, he_init_#res=0, he_init_~tmp~46=0, he_send_#in~skb!base=174, he_send_#in~skb!offset=1349, he_send_#in~vcc!base=174, he_send_#in~vcc!offset=0, he_send_#t~mem1232=14551349198900, he_send_#t~mem1233=2284557, he_send_#t~mem1234=14551349198900, he_send_#t~short1235=false, he_send_#t~short1236=false, he_send_~he_dev~7!base=176, he_send_~he_dev~7!offset=5382, he_send_~skb!base=174, he_send_~skb!offset=1349, he_send_~vcc!base=174, he_send_~vcc!offset=0, main_#t~malloc1383!base=174, main_#t~malloc1383!offset=0, main_#t~switch1386=true, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0!base=174, main_~var_group1~0!offset=0, main_~var_group3~0!base=174, main_~var_group3~0!offset=1349, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9095] COND FALSE !(he_send_#t~short1236) [L9095] havoc he_send_#t~mem1233; [L9095] havoc he_send_#t~mem1234; [L9095] havoc he_send_#t~short1235; [L9095] havoc he_send_#t~short1236; [L9095] havoc he_send_#t~mem1232; [L9108] skb_end_pointer_#in~skb := he_send_~skb; [L9108] havoc skb_end_pointer_#res; [L9108] havoc skb_end_pointer_#t~mem181, skb_end_pointer_#t~mem182, skb_end_pointer_~skb; [L6136-L6143] skb_end_pointer_~skb := skb_end_pointer_#in~skb; [L6141] FCALL call skb_end_pointer_#t~mem181 := read~$Pointer$({ base: skb_end_pointer_~skb!base, offset: 239 + skb_end_pointer_~skb!offset }, 8); [L6141] FCALL call skb_end_pointer_#t~mem182 := read~int({ base: skb_end_pointer_~skb!base, offset: 235 + skb_end_pointer_~skb!offset }, 4); [L6141] skb_end_pointer_#res := { base: skb_end_pointer_#t~mem181!base, offset: skb_end_pointer_#t~mem181!offset + (if skb_end_pointer_#t~mem182 % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then skb_end_pointer_#t~mem182 % 4294967296 % 18446744073709551616 % 18446744073709551616 else skb_end_pointer_#t~mem182 % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616) }; [L6141] havoc skb_end_pointer_#t~mem182; [L6141] havoc skb_end_pointer_#t~mem181; [L9108] he_send_#t~ret1247 := skb_end_pointer_#res; [L9108] he_send_~tmp~42 := he_send_#t~ret1247; [L9108] havoc he_send_#t~ret1247; [L9109] FCALL call he_send_#t~mem1248 := read~int({ base: he_send_~tmp~42!base, offset: he_send_~tmp~42!offset }, 1); VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, he_init_#res=0, he_init_~tmp~46=0, he_send_#in~skb!base=174, he_send_#in~skb!offset=1349, he_send_#in~vcc!base=174, he_send_#in~vcc!offset=0, he_send_#t~mem1248=1391872, he_send_~he_dev~7!base=176, he_send_~he_dev~7!offset=5382, he_send_~skb!base=174, he_send_~skb!offset=1349, he_send_~tmp~42!base=174, he_send_~tmp~42!offset=1419, he_send_~vcc!base=174, he_send_~vcc!offset=0, main_#t~malloc1383!base=174, main_#t~malloc1383!offset=0, main_#t~switch1386=true, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0!base=174, main_~var_group1~0!offset=0, main_~var_group3~0!base=174, main_~var_group3~0!offset=1349, skb_end_pointer_#in~skb!base=174, skb_end_pointer_#in~skb!offset=1349, skb_end_pointer_#res!base=174, skb_end_pointer_#res!offset=1419, skb_end_pointer_~skb!base=174, skb_end_pointer_~skb!offset=1349, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9109] COND FALSE !(0 != he_send_#t~mem1248 % 256 % 4294967296) [L9109] havoc he_send_#t~mem1248; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, he_init_#res=0, he_init_~tmp~46=0, he_send_#in~skb!base=174, he_send_#in~skb!offset=1349, he_send_#in~vcc!base=174, he_send_#in~vcc!offset=0, he_send_~he_dev~7!base=176, he_send_~he_dev~7!offset=5382, he_send_~skb!base=174, he_send_~skb!offset=1349, he_send_~tmp~42!base=174, he_send_~tmp~42!offset=1419, he_send_~vcc!base=174, he_send_~vcc!offset=0, main_#t~malloc1383!base=174, main_#t~malloc1383!offset=0, main_#t~switch1386=true, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0!base=174, main_~var_group1~0!offset=0, main_~var_group3~0!base=174, main_~var_group3~0!offset=1349, skb_end_pointer_#in~skb!base=174, skb_end_pointer_#in~skb!offset=1349, skb_end_pointer_#res!base=174, skb_end_pointer_#res!offset=1419, skb_end_pointer_~skb!base=174, skb_end_pointer_~skb!offset=1349, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9122] CALL call ldv_spin_lock(); VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, old(~ldv_spin~0)=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9954] ~ldv_spin~0 := 1; [L9122] RET call ldv_spin_lock(); VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, he_init_#res=0, he_init_~tmp~46=0, he_send_#in~skb!base=174, he_send_#in~skb!offset=1349, he_send_#in~vcc!base=174, he_send_#in~vcc!offset=0, he_send_~he_dev~7!base=176, he_send_~he_dev~7!offset=5382, he_send_~skb!base=174, he_send_~skb!offset=1349, he_send_~tmp~42!base=174, he_send_~tmp~42!offset=1419, he_send_~vcc!base=174, he_send_~vcc!offset=0, main_#t~malloc1383!base=174, main_#t~malloc1383!offset=0, main_#t~switch1386=true, main_~ldv_s_he_driver_pci_driver~0=0, main_~ldv_s_he_ops_atmdev_ops~0=0, main_~tmp___0~20=3, main_~tmp___1~14=-1, main_~tmp~47=0, main_~var_group1~0!base=174, main_~var_group1~0!offset=0, main_~var_group3~0!base=174, main_~var_group3~0!offset=1349, skb_end_pointer_#in~skb!base=174, skb_end_pointer_#in~skb!offset=1349, skb_end_pointer_#res!base=174, skb_end_pointer_#res!offset=1419, skb_end_pointer_~skb!base=174, skb_end_pointer_~skb!offset=1349, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9123] CALL call he_send_#t~ret1258 := __alloc_tpd(he_send_~he_dev~7); VAL [#in~he_dev!base=176, #in~he_dev!offset=5382, #NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L8006-L8030] ~he_dev := #in~he_dev; [L8008] havoc ~tpd~0; [L8009] FCALL call ~#mapping~1 := #Ultimate.alloc(8); [L8010] havoc ~tmp~35; [L8013] FCALL call #t~mem877 := read~$Pointer$({ base: ~he_dev!base, offset: 400 + ~he_dev!offset }, 8); [L8013] ldv_dma_pool_alloc_33_#in~ldv_func_arg1, ldv_dma_pool_alloc_33_#in~flags, ldv_dma_pool_alloc_33_#in~ldv_func_arg3 := #t~mem877, 33, ~#mapping~1; [L8013] havoc ldv_dma_pool_alloc_33_#res; [L8013] havoc ldv_dma_pool_alloc_33_#t~ret1406, ldv_dma_pool_alloc_33_~ldv_func_arg1, ldv_dma_pool_alloc_33_~flags, ldv_dma_pool_alloc_33_~ldv_func_arg3; [L9869-L9878] ldv_dma_pool_alloc_33_~ldv_func_arg1 := ldv_dma_pool_alloc_33_#in~ldv_func_arg1; [L9869-L9878] ldv_dma_pool_alloc_33_~flags := ldv_dma_pool_alloc_33_#in~flags; [L9869-L9878] ldv_dma_pool_alloc_33_~ldv_func_arg3 := ldv_dma_pool_alloc_33_#in~ldv_func_arg3; VAL [#in~he_dev!base=176, #in~he_dev!offset=5382, #NULL!base=0, #NULL!offset=0, #t~mem877!base=180, #t~mem877!offset=183, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ldv_dma_pool_alloc_33_#in~flags=33, ldv_dma_pool_alloc_33_#in~ldv_func_arg1!base=180, ldv_dma_pool_alloc_33_#in~ldv_func_arg1!offset=183, ldv_dma_pool_alloc_33_#in~ldv_func_arg3!base=179, ldv_dma_pool_alloc_33_#in~ldv_func_arg3!offset=0, ldv_dma_pool_alloc_33_~flags=33, ldv_dma_pool_alloc_33_~ldv_func_arg1!base=180, ldv_dma_pool_alloc_33_~ldv_func_arg1!offset=183, ldv_dma_pool_alloc_33_~ldv_func_arg3!base=179, ldv_dma_pool_alloc_33_~ldv_func_arg3!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#mapping~1!base=179, ~#mapping~1!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_dev!base=176, ~he_dev!offset=5382, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9874] CALL call ldv_check_alloc_flags(ldv_dma_pool_alloc_33_~flags); VAL [#in~flags=33, #NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9908-L9920] ~flags := #in~flags; VAL [#in~flags=33, #NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~flags=33, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9913] COND FALSE !(0 == ~ldv_spin~0 || 0 != ~bitwiseAnd(~flags, 32) % 4294967296) VAL [#in~flags=33, #NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~flags=33, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9916] CALL call ldv_error(); VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9895] assert false; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [?] #NULL := { base: 0, offset: 0 }; [?] #valid[0] := 0; [L5888] FCALL call #t~string81 := #Ultimate.alloc(136); [L5889] FCALL call #t~string82 := #Ultimate.alloc(27); [L6110] FCALL call #t~string163 := #Ultimate.alloc(137); [L6585] FCALL call #t~string322 := #Ultimate.alloc(16); [L6594] FCALL call #t~string326 := #Ultimate.alloc(32); [L6600] FCALL call #t~string327 := #Ultimate.alloc(3); [L6600] FCALL call write~init~int(104, { base: #t~string327!base, offset: #t~string327!offset }, 1); [L6600] FCALL call write~init~int(101, { base: #t~string327!base, offset: 1 + #t~string327!offset }, 1); [L6600] FCALL call write~init~int(0, { base: #t~string327!base, offset: 2 + #t~string327!offset }, 1); [L6624] FCALL call #t~string333 := #Ultimate.alloc(31); [L6854] FCALL call #t~string380 := #Ultimate.alloc(30); [L7146] FCALL call #t~string410 := #Ultimate.alloc(45); [L7155] FCALL call #t~string416 := #Ultimate.alloc(43); [L7160] FCALL call #t~string418 := #Ultimate.alloc(5); [L7160] FCALL call write~init~int(114, { base: #t~string418!base, offset: #t~string418!offset }, 1); [L7160] FCALL call write~init~int(98, { base: #t~string418!base, offset: 1 + #t~string418!offset }, 1); [L7160] FCALL call write~init~int(112, { base: #t~string418!base, offset: 2 + #t~string418!offset }, 1); [L7160] FCALL call write~init~int(108, { base: #t~string418!base, offset: 3 + #t~string418!offset }, 1); [L7160] FCALL call write~init~int(0, { base: #t~string418!base, offset: 4 + #t~string418!offset }, 1); [L7163] FCALL call #t~string423 := #Ultimate.alloc(35); [L7171] FCALL call #t~string429 := #Ultimate.alloc(34); [L7214] FCALL call #t~string452 := #Ultimate.alloc(32); [L7228] FCALL call #t~string462 := #Ultimate.alloc(30); [L7238] FCALL call #t~string470 := #Ultimate.alloc(32); [L7293] FCALL call #t~string498 := #Ultimate.alloc(31); [L7353] FCALL call #t~string528 := #Ultimate.alloc(3); [L7353] FCALL call write~init~int(104, { base: #t~string528!base, offset: #t~string528!offset }, 1); [L7353] FCALL call write~init~int(101, { base: #t~string528!base, offset: 1 + #t~string528!offset }, 1); [L7353] FCALL call write~init~int(0, { base: #t~string528!base, offset: 2 + #t~string528!offset }, 1); [L7355] FCALL call #t~string531 := #Ultimate.alloc(30); [L7404] FCALL call #t~string542 := #Ultimate.alloc(30); [L7412] FCALL call #t~string548 := #Ultimate.alloc(32); [L7419] FCALL call #t~string552 := #Ultimate.alloc(32); [L7427] FCALL call #t~string558 := #Ultimate.alloc(29); [L7434] FCALL call #t~string562 := #Ultimate.alloc(36); [L7443] FCALL call #t~string568 := #Ultimate.alloc(40); [L7452] FCALL call #t~string573 := #Ultimate.alloc(34); [L7461] FCALL call #t~string579 := #Ultimate.alloc(38); [L7471] FCALL call #t~string584 := #Ultimate.alloc(34); [L7483] FCALL call #t~string591 := #Ultimate.alloc(21); [L7495] FCALL call #t~string598 := #Ultimate.alloc(43); [L7501] FCALL call #t~string603 := #Ultimate.alloc(33); [L7531] FCALL call #t~string611 := #Ultimate.alloc(32); [L7532] FCALL call #t~string614 := #Ultimate.alloc(3); [L7532] FCALL call write~init~int(83, { base: #t~string614!base, offset: #t~string614!offset }, 1); [L7532] FCALL call write~init~int(77, { base: #t~string614!base, offset: 1 + #t~string614!offset }, 1); [L7532] FCALL call write~init~int(0, { base: #t~string614!base, offset: 2 + #t~string614!offset }, 1); [L7532] FCALL call #t~string615 := #Ultimate.alloc(3); [L7532] FCALL call write~init~int(77, { base: #t~string615!base, offset: #t~string615!offset }, 1); [L7532] FCALL call write~init~int(77, { base: #t~string615!base, offset: 1 + #t~string615!offset }, 1); [L7532] FCALL call write~init~int(0, { base: #t~string615!base, offset: 2 + #t~string615!offset }, 1); [L7565] FCALL call #t~string640 := #Ultimate.alloc(34); [L7778] FCALL call #t~string742 := #Ultimate.alloc(4); [L7778] FCALL call write~init~int(116, { base: #t~string742!base, offset: #t~string742!offset }, 1); [L7778] FCALL call write~init~int(112, { base: #t~string742!base, offset: 1 + #t~string742!offset }, 1); [L7778] FCALL call write~init~int(100, { base: #t~string742!base, offset: 2 + #t~string742!offset }, 1); [L7778] FCALL call write~init~int(0, { base: #t~string742!base, offset: 3 + #t~string742!offset }, 1); [L7781] FCALL call #t~string747 := #Ultimate.alloc(38); [L7838] FCALL call #t~string770 := #Ultimate.alloc(44); [L8078] FCALL call #t~string892 := #Ultimate.alloc(39); [L8092] FCALL call #t~string902 := #Ultimate.alloc(30); [L8244] FCALL call #t~string963 := #Ultimate.alloc(47); [L8434] FCALL call #t~string1039 := #Ultimate.alloc(21); [L8438] FCALL call #t~string1044 := #Ultimate.alloc(19); [L8449] FCALL call #t~string1048 := #Ultimate.alloc(22); [L8526] FCALL call #t~string1085 := #Ultimate.alloc(30); [L8617] FCALL call #t~string1121 := #Ultimate.alloc(46); [L8625] FCALL call #t~string1123 := #Ultimate.alloc(18); [L8626] FCALL call #t~string1124 := #Ultimate.alloc(18); [L8658] FCALL call #t~string1133 := #Ultimate.alloc(40); [L8757] FCALL call #t~string1157 := #Ultimate.alloc(40); [L8915] FCALL call #t~string1185 := #Ultimate.alloc(34); [L8942] FCALL call #t~string1191 := #Ultimate.alloc(40); [L8961] FCALL call #t~string1199 := #Ultimate.alloc(46); [L9030] FCALL call #t~string1214 := #Ultimate.alloc(34); [L9063] FCALL call #t~string1222 := #Ultimate.alloc(32); [L9096] FCALL call #t~string1238 := #Ultimate.alloc(48); [L9110] FCALL call #t~string1250 := #Ultimate.alloc(34); [L9326] FCALL call #t~string1319 := #Ultimate.alloc(15); [L9334] FCALL call #t~string1321 := #Ultimate.alloc(7); [L9334] FCALL call write~init~int(37, { base: #t~string1321!base, offset: #t~string1321!offset }, 1); [L9334] FCALL call write~init~int(115, { base: #t~string1321!base, offset: 1 + #t~string1321!offset }, 1); [L9334] FCALL call write~init~int(37, { base: #t~string1321!base, offset: 2 + #t~string1321!offset }, 1); [L9334] FCALL call write~init~int(115, { base: #t~string1321!base, offset: 3 + #t~string1321!offset }, 1); [L9334] FCALL call write~init~int(10, { base: #t~string1321!base, offset: 4 + #t~string1321!offset }, 1); [L9334] FCALL call write~init~int(10, { base: #t~string1321!base, offset: 5 + #t~string1321!offset }, 1); [L9334] FCALL call write~init~int(0, { base: #t~string1321!base, offset: 6 + #t~string1321!offset }, 1); [L9334] FCALL call #t~string1323 := #Ultimate.alloc(3); [L9334] FCALL call write~init~int(83, { base: #t~string1323!base, offset: #t~string1323!offset }, 1); [L9334] FCALL call write~init~int(77, { base: #t~string1323!base, offset: 1 + #t~string1323!offset }, 1); [L9334] FCALL call write~init~int(0, { base: #t~string1323!base, offset: 2 + #t~string1323!offset }, 1); [L9334] FCALL call #t~string1324 := #Ultimate.alloc(3); [L9334] FCALL call write~init~int(77, { base: #t~string1324!base, offset: #t~string1324!offset }, 1); [L9334] FCALL call write~init~int(77, { base: #t~string1324!base, offset: 1 + #t~string1324!offset }, 1); [L9334] FCALL call write~init~int(0, { base: #t~string1324!base, offset: 2 + #t~string1324!offset }, 1); [L9342] FCALL call #t~string1327 := #Ultimate.alloc(70); [L9360] FCALL call #t~string1337 := #Ultimate.alloc(29); [L9368] FCALL call #t~string1339 := #Ultimate.alloc(37); [L9376] FCALL call #t~string1342 := #Ultimate.alloc(28); [L9384] FCALL call #t~string1344 := #Ultimate.alloc(38); [L9392] FCALL call #t~string1347 := #Ultimate.alloc(27); [L9400] FCALL call #t~string1350 := #Ultimate.alloc(57); [L9411] FCALL call #t~string1352 := #Ultimate.alloc(25); [L9427] FCALL call #t~string1356 := #Ultimate.alloc(32); [L9527] FCALL call #t~string1377 := #Ultimate.alloc(3); [L9527] FCALL call write~init~int(104, { base: #t~string1377!base, offset: #t~string1377!offset }, 1); [L9527] FCALL call write~init~int(101, { base: #t~string1377!base, offset: 1 + #t~string1377!offset }, 1); [L9527] FCALL call write~init~int(0, { base: #t~string1377!base, offset: 2 + #t~string1377!offset }, 1); [L9545] FCALL call #t~string1378 := #Ultimate.alloc(3); [L9545] FCALL call write~init~int(104, { base: #t~string1378!base, offset: #t~string1378!offset }, 1); [L9545] FCALL call write~init~int(101, { base: #t~string1378!base, offset: 1 + #t~string1378!offset }, 1); [L9545] FCALL call write~init~int(0, { base: #t~string1378!base, offset: 2 + #t~string1378!offset }, 1); [L6452] ~nvpibits~0 := -1; [L6453] ~nvcibits~0 := -1; [L6454] ~rx_skb_reserve~0 := 16; [L6457-L6462] FCALL call ~#readtab~0 := #Ultimate.alloc(68); [L6457-L6462] FCALL call write~init~int(4352, { base: ~#readtab~0!base, offset: ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(0, { base: ~#readtab~0!base, offset: 4 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(256, { base: ~#readtab~0!base, offset: 8 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(0, { base: ~#readtab~0!base, offset: 12 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(256, { base: ~#readtab~0!base, offset: 16 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(0, { base: ~#readtab~0!base, offset: 20 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(256, { base: ~#readtab~0!base, offset: 24 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(0, { base: ~#readtab~0!base, offset: 28 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(256, { base: ~#readtab~0!base, offset: 32 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(0, { base: ~#readtab~0!base, offset: 36 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(256, { base: ~#readtab~0!base, offset: 40 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(0, { base: ~#readtab~0!base, offset: 44 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(256, { base: ~#readtab~0!base, offset: 48 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(512, { base: ~#readtab~0!base, offset: 52 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(768, { base: ~#readtab~0!base, offset: 56 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(512, { base: ~#readtab~0!base, offset: 60 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(768, { base: ~#readtab~0!base, offset: 64 + ~#readtab~0!offset }, 4); [L6463-L6468] FCALL call ~#clocktab~0 := #Ultimate.alloc(68); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 4 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 8 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 12 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 16 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 20 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 24 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 28 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 32 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 36 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 40 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 44 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 48 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 52 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 56 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 60 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 64 + ~#clocktab~0!offset }, 4); [L9564] ~LDV_IN_INTERRUPT~0 := 0; [L9907] ~ldv_spin~0 := 0; [L6450] ~he_devs~0 := { base: 0, offset: 0 }; [L6451] ~disable64~0 := 0; [L6455] ~irq_coalesce~0 := 1; [L6456] ~sdh~0 := 0; [L6469-L6471] FCALL call ~#he_ops~0 := #Ultimate.alloc(112); [L6469-L6471] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_ops~0!base, offset: ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(#funAddr~he_open, { base: ~#he_ops~0!base, offset: 8 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(#funAddr~he_close, { base: ~#he_ops~0!base, offset: 16 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(#funAddr~he_ioctl, { base: ~#he_ops~0!base, offset: 24 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_ops~0!base, offset: 32 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_ops~0!base, offset: 40 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_ops~0!base, offset: 48 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(#funAddr~he_send, { base: ~#he_ops~0!base, offset: 56 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_ops~0!base, offset: 64 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(#funAddr~he_phy_put, { base: ~#he_ops~0!base, offset: 72 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(#funAddr~he_phy_get, { base: ~#he_ops~0!base, offset: 80 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_ops~0!base, offset: 88 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(#funAddr~he_proc_read, { base: ~#he_ops~0!base, offset: 96 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(~#__this_module~0, { base: ~#he_ops~0!base, offset: 104 + ~#he_ops~0!offset }, 8); [L9523-L9524] FCALL call ~#he_pci_tbl~0 := #Ultimate.alloc(64); [L9523-L9524] FCALL call write~init~int(4391, { base: ~#he_pci_tbl~0!base, offset: ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(1024, { base: ~#he_pci_tbl~0!base, offset: 4 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(4294967295, { base: ~#he_pci_tbl~0!base, offset: 8 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(4294967295, { base: ~#he_pci_tbl~0!base, offset: 12 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 16 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 20 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 24 + ~#he_pci_tbl~0!offset }, 8); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 32 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 36 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 40 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 44 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 48 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 52 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 56 + ~#he_pci_tbl~0!offset }, 8); [L9525] ~__mod_pci_device_table~0!vendor := 0; [L9525] ~__mod_pci_device_table~0!device := 0; [L9525] ~__mod_pci_device_table~0!subvendor := 0; [L9525] ~__mod_pci_device_table~0!subdevice := 0; [L9525] ~__mod_pci_device_table~0!class := 0; [L9525] ~__mod_pci_device_table~0!class_mask := 0; [L9525] ~__mod_pci_device_table~0!driver_data := 0; [L9526-L9539] FCALL call ~#he_driver~0 := #Ultimate.alloc(301); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 8 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$(#t~string1377, { base: ~#he_driver~0!base, offset: 16 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$(~#he_pci_tbl~0, { base: ~#he_driver~0!base, offset: 24 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$(#funAddr~he_init_one, { base: ~#he_driver~0!base, offset: 32 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$(#funAddr~he_remove_one, { base: ~#he_driver~0!base, offset: 40 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 48 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 56 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 64 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 72 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 80 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 88 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 96 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 104 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 112 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 120 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 128 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~int(0, { base: ~#he_driver~0!base, offset: 136 + ~#he_driver~0!offset }, 1); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 137 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 145 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 153 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 161 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 169 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 177 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 185 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 193 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 201 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 209 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~int(0, { base: ~#he_driver~0!base, offset: 217 + ~#he_driver~0!offset }, 4); [L9526-L9539] FCALL call write~init~int(0, { base: ~#he_driver~0!base, offset: 221 + ~#he_driver~0!offset }, 4); [L9526-L9539] FCALL call write~init~int(0, { base: ~#he_driver~0!base, offset: 225 + ~#he_driver~0!offset }, 4); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 229 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 237 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 245 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 253 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 261 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~int(0, { base: ~#he_driver~0!base, offset: 269 + ~#he_driver~0!offset }, 4); [L9526-L9539] FCALL call write~init~int(0, { base: ~#he_driver~0!base, offset: 273 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 285 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 293 + ~#he_driver~0!offset }, 8); [L9576] havoc ~var_group1~0; [L9577] havoc ~res_he_open_23~0; [L9578] havoc ~var_group2~0; [L9579] havoc ~var_he_ioctl_26_p1~0; [L9580] havoc ~var_he_ioctl_26_p2~0; [L9581] havoc ~var_group3~0; [L9582] havoc ~var_he_phy_put_27_p1~0; [L9583] havoc ~var_he_phy_put_27_p2~0; [L9584] havoc ~var_he_phy_get_28_p1~0; [L9585] havoc ~var_he_proc_read_29_p1~0; [L9586] havoc ~var_he_proc_read_29_p2~0; [L9587] havoc ~var_group4~0; [L9588] havoc ~var_he_init_one_3_p1~0; [L9589] havoc ~res_he_init_one_3~0; [L9590] havoc ~var_he_irq_handler_21_p0~0; [L9591] havoc ~var_he_irq_handler_21_p1~0; [L9592] havoc ~ldv_s_he_ops_atmdev_ops~0; [L9593] havoc ~ldv_s_he_driver_pci_driver~0; [L9594] havoc ~tmp~47; [L9595] havoc ~tmp___0~20; [L9596] havoc ~tmp___1~14; [L9598] FCALL call #t~malloc1383 := #Ultimate.alloc(1590); [L9598] ~var_group1~0 := #t~malloc1383; [L9599] FCALL call write~$Pointer$(#funAddr~void_one_par_dummy, { base: ~var_group1~0!base, offset: 1420 + ~var_group1~0!offset }, 8); [L9600] FCALL call write~$Pointer$(#funAddr~void_two_par_dummy, { base: ~var_group1~0!base, offset: 1428 + ~var_group1~0!offset }, 8); [L9601] FCALL call write~$Pointer$(#funAddr~void_two_par_dummy, { base: ~var_group1~0!base, offset: 1436 + ~var_group1~0!offset }, 8); [L9602] FCALL call write~$Pointer$(#funAddr~int_two_par_dummy, { base: ~var_group1~0!base, offset: 1444 + ~var_group1~0!offset }, 8); [L9603] FCALL call write~$Pointer$(#funAddr~int_two_par_dummy, { base: ~var_group1~0!base, offset: 1452 + ~var_group1~0!offset }, 8); [L9606] ~ldv_s_he_ops_atmdev_ops~0 := 0; [L9607] ~ldv_s_he_driver_pci_driver~0 := 0; [L9608] ~LDV_IN_INTERRUPT~0 := 1; [L9609] FCALL call ldv_initialize(); [L9610] FCALL call ldv_handler_precall(); [L9542] havoc ~tmp~46; [L9545] FCALL call #t~ret1379 := __pci_register_driver(~#he_driver~0, ~#__this_module~0, #t~string1378); [L9545] assume -2147483648 <= #t~ret1379 && #t~ret1379 <= 2147483647; [L9545] ~tmp~46 := #t~ret1379; [L9545] havoc #t~ret1379; [L9546] #res := ~tmp~46; [L9611] assume -2147483648 <= #t~ret1384 && #t~ret1384 <= 2147483647; [L9611] ~tmp~47 := #t~ret1384; [L9611] havoc #t~ret1384; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9612] COND FALSE !(0 != ~tmp~47) VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9700] assume -2147483648 <= #t~nondet1394 && #t~nondet1394 <= 2147483647; [L9700] ~tmp___1~14 := #t~nondet1394; [L9700] havoc #t~nondet1394; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9701] COND TRUE (0 != ~tmp___1~14 || 0 != ~ldv_s_he_ops_atmdev_ops~0) || 0 != ~ldv_s_he_driver_pci_driver~0 [L9619] assume -2147483648 <= #t~nondet1385 && #t~nondet1385 <= 2147483647; [L9619] ~tmp___0~20 := #t~nondet1385; [L9619] havoc #t~nondet1385; [L9621] #t~switch1386 := 0 == ~tmp___0~20; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9620-L9697] COND FALSE !(#t~switch1386) [L9636] #t~switch1386 := #t~switch1386 || 1 == ~tmp___0~20; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9620-L9697] COND FALSE !(#t~switch1386) [L9645] #t~switch1386 := #t~switch1386 || 2 == ~tmp___0~20; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9620-L9697] COND FALSE !(#t~switch1386) [L9649] #t~switch1386 := #t~switch1386 || 3 == ~tmp___0~20; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9620-L9697] COND TRUE #t~switch1386 [L9650] FCALL call ldv_handler_precall(); [L9080-L9165] ~vcc := #in~vcc; [L9080-L9165] ~skb := #in~skb; [L9082] havoc ~flags~4; [L9083] havoc ~he_dev~7; [L9084] havoc ~cid~3; [L9085] havoc ~tpd~3; [L9086] havoc ~tmp~42; [L9087] havoc ~pti_clp~0; [L9088] havoc ~clp~0; [L9089] havoc ~pti~0; [L9090] havoc ~tmp___0~16; [L9093] FCALL call #t~mem1227 := read~$Pointer$({ base: ~vcc!base, offset: 1279 + ~vcc!offset }, 8); [L9093] FCALL call #t~mem1228 := read~$Pointer$({ base: #t~mem1227!base, offset: 28 + #t~mem1227!offset }, 8); [L9093] ~he_dev~7 := #t~mem1228; [L9093] havoc #t~mem1227; [L9093] havoc #t~mem1228; [L9094] FCALL call #t~mem1229 := read~int({ base: ~vcc!base, offset: 1257 + ~vcc!offset }, 2); [L9094] FCALL call #t~mem1230 := read~int({ base: ~he_dev~7!base, offset: 56 + ~he_dev~7!offset }, 4); [L9094] FCALL call #t~mem1231 := read~int({ base: ~vcc!base, offset: 1259 + ~vcc!offset }, 4); [L9094] ~cid~3 := ~bitwiseAnd(~bitwiseOr(~shiftLeft(#t~mem1229, (if #t~mem1230 % 4294967296 % 4294967296 <= 2147483647 then #t~mem1230 % 4294967296 % 4294967296 else #t~mem1230 % 4294967296 % 4294967296 - 4294967296)), #t~mem1231), 8191); [L9094] havoc #t~mem1229; [L9094] havoc #t~mem1230; [L9094] havoc #t~mem1231; [L9095] FCALL call #t~mem1232 := read~int({ base: ~skb!base, offset: 104 + ~skb!offset }, 4); [L9095] #t~short1236 := #t~mem1232 % 4294967296 > 65535; [L9095] COND FALSE !(#t~short1236) [L9095] FCALL call #t~mem1233 := read~int({ base: ~vcc!base, offset: 1379 + ~vcc!offset }, 1); [L9095] #t~short1235 := 13 == #t~mem1233 % 256 % 4294967296; [L9095] COND TRUE #t~short1235 [L9095] FCALL call #t~mem1234 := read~int({ base: ~skb!base, offset: 104 + ~skb!offset }, 4); [L9095] #t~short1235 := 52 != #t~mem1234 % 4294967296; [L9095] #t~short1236 := #t~short1235; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9095] COND FALSE !(#t~short1236) [L9095] havoc #t~mem1233; [L9095] havoc #t~mem1234; [L9095] havoc #t~short1235; [L9095] havoc #t~short1236; [L9095] havoc #t~mem1232; [L6136-L6143] ~skb := #in~skb; [L6141] FCALL call #t~mem181 := read~$Pointer$({ base: ~skb!base, offset: 239 + ~skb!offset }, 8); [L6141] FCALL call #t~mem182 := read~int({ base: ~skb!base, offset: 235 + ~skb!offset }, 4); [L6141] #res := { base: #t~mem181!base, offset: #t~mem181!offset + (if #t~mem182 % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then #t~mem182 % 4294967296 % 18446744073709551616 % 18446744073709551616 else #t~mem182 % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616) }; [L6141] havoc #t~mem182; [L6141] havoc #t~mem181; [L9108] ~tmp~42 := #t~ret1247; [L9108] havoc #t~ret1247; [L9109] FCALL call #t~mem1248 := read~int({ base: ~tmp~42!base, offset: ~tmp~42!offset }, 1); VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9109] COND FALSE !(0 != #t~mem1248 % 256 % 4294967296) [L9109] havoc #t~mem1248; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9122] CALL call ldv_spin_lock(); VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, old(~ldv_spin~0)=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9954] ~ldv_spin~0 := 1; [L9122] RET call ldv_spin_lock(); VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9123] CALL call #t~ret1258 := __alloc_tpd(~he_dev~7); VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L8006-L8030] ~he_dev := #in~he_dev; [L8008] havoc ~tpd~0; [L8009] FCALL call ~#mapping~1 := #Ultimate.alloc(8); [L8010] havoc ~tmp~35; [L8013] FCALL call #t~mem877 := read~$Pointer$({ base: ~he_dev!base, offset: 400 + ~he_dev!offset }, 8); [L9869-L9878] ~ldv_func_arg1 := #in~ldv_func_arg1; [L9869-L9878] ~flags := #in~flags; [L9869-L9878] ~ldv_func_arg3 := #in~ldv_func_arg3; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9874] CALL call ldv_check_alloc_flags(~flags); VAL [#in~flags=33, #NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9908-L9920] ~flags := #in~flags; VAL [#in~flags=33, #NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~flags=33, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9913] COND FALSE !(0 == ~ldv_spin~0 || 0 != ~bitwiseAnd(~flags, 32) % 4294967296) VAL [#in~flags=33, #NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~flags=33, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9916] CALL call ldv_error(); VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9895] assert false; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] ----- [2018-11-23 03:23:50,776 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!class [2018-11-23 03:23:50,777 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!device [2018-11-23 03:23:50,777 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!class [2018-11-23 03:23:50,777 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!device [2018-11-23 03:23:50,778 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!vendor [2018-11-23 03:23:50,778 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!driver_data [2018-11-23 03:23:50,778 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!vendor [2018-11-23 03:23:50,781 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!vendor [2018-11-23 03:23:50,781 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!device [2018-11-23 03:23:50,781 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!class [2018-11-23 03:23:50,782 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!device [2018-11-23 03:23:50,782 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!class [2018-11-23 03:23:50,782 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!driver_data [2018-11-23 03:23:50,782 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!vendor [2018-11-23 03:23:50,785 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!class [2018-11-23 03:23:50,785 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!class [2018-11-23 03:23:50,785 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!vendor [2018-11-23 03:23:50,785 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!vendor [2018-11-23 03:23:50,786 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!device [2018-11-23 03:23:50,786 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!device [2018-11-23 03:23:50,786 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!driver_data [2018-11-23 03:23:50,788 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!driver_data [2018-11-23 03:23:50,788 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!device [2018-11-23 03:23:50,789 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!class [2018-11-23 03:23:50,789 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!vendor [2018-11-23 03:23:50,789 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!vendor [2018-11-23 03:23:50,789 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!class [2018-11-23 03:23:50,789 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!device [2018-11-23 03:23:50,791 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!device [2018-11-23 03:23:50,792 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!device [2018-11-23 03:23:50,792 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!driver_data [2018-11-23 03:23:50,792 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!vendor [2018-11-23 03:23:50,792 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!vendor [2018-11-23 03:23:50,792 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!class [2018-11-23 03:23:50,793 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!class [2018-11-23 03:23:50,794 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!driver_data [2018-11-23 03:23:50,795 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!device [2018-11-23 03:23:50,795 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!device [2018-11-23 03:23:50,795 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!class [2018-11-23 03:23:50,795 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!class [2018-11-23 03:23:50,796 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!vendor [2018-11-23 03:23:50,796 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!vendor [2018-11-23 03:23:50,797 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!class [2018-11-23 03:23:50,798 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!vendor [2018-11-23 03:23:50,798 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!device [2018-11-23 03:23:50,798 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!device [2018-11-23 03:23:50,799 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!driver_data [2018-11-23 03:23:50,799 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!class [2018-11-23 03:23:50,799 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!vendor [2018-11-23 03:23:50,801 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!device [2018-11-23 03:23:50,801 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!driver_data [2018-11-23 03:23:50,801 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!device [2018-11-23 03:23:50,801 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!class [2018-11-23 03:23:50,802 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!class [2018-11-23 03:23:50,802 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!vendor [2018-11-23 03:23:50,802 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!vendor [2018-11-23 03:23:50,804 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!device [2018-11-23 03:23:50,805 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!class [2018-11-23 03:23:50,805 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!device [2018-11-23 03:23:50,805 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!vendor [2018-11-23 03:23:50,805 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!vendor [2018-11-23 03:23:50,806 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!class [2018-11-23 03:23:50,806 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!driver_data [2018-11-23 03:23:50,807 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!class [2018-11-23 03:23:50,808 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!class [2018-11-23 03:23:50,808 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!vendor [2018-11-23 03:23:50,808 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!device [2018-11-23 03:23:50,809 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!device [2018-11-23 03:23:50,809 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!vendor [2018-11-23 03:23:50,809 WARN L1272 BoogieBacktranslator]: unknown boogie variable ~__mod_pci_device_table~0!driver_data ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] #NULL := { base: 0, offset: 0 }; [?] #valid[0] := 0; [L5888] FCALL call #t~string81 := #Ultimate.alloc(136); [L5889] FCALL call #t~string82 := #Ultimate.alloc(27); [L6110] FCALL call #t~string163 := #Ultimate.alloc(137); [L6585] FCALL call #t~string322 := #Ultimate.alloc(16); [L6594] FCALL call #t~string326 := #Ultimate.alloc(32); [L6600] FCALL call #t~string327 := #Ultimate.alloc(3); [L6600] FCALL call write~init~int(104, { base: #t~string327!base, offset: #t~string327!offset }, 1); [L6600] FCALL call write~init~int(101, { base: #t~string327!base, offset: 1 + #t~string327!offset }, 1); [L6600] FCALL call write~init~int(0, { base: #t~string327!base, offset: 2 + #t~string327!offset }, 1); [L6624] FCALL call #t~string333 := #Ultimate.alloc(31); [L6854] FCALL call #t~string380 := #Ultimate.alloc(30); [L7146] FCALL call #t~string410 := #Ultimate.alloc(45); [L7155] FCALL call #t~string416 := #Ultimate.alloc(43); [L7160] FCALL call #t~string418 := #Ultimate.alloc(5); [L7160] FCALL call write~init~int(114, { base: #t~string418!base, offset: #t~string418!offset }, 1); [L7160] FCALL call write~init~int(98, { base: #t~string418!base, offset: 1 + #t~string418!offset }, 1); [L7160] FCALL call write~init~int(112, { base: #t~string418!base, offset: 2 + #t~string418!offset }, 1); [L7160] FCALL call write~init~int(108, { base: #t~string418!base, offset: 3 + #t~string418!offset }, 1); [L7160] FCALL call write~init~int(0, { base: #t~string418!base, offset: 4 + #t~string418!offset }, 1); [L7163] FCALL call #t~string423 := #Ultimate.alloc(35); [L7171] FCALL call #t~string429 := #Ultimate.alloc(34); [L7214] FCALL call #t~string452 := #Ultimate.alloc(32); [L7228] FCALL call #t~string462 := #Ultimate.alloc(30); [L7238] FCALL call #t~string470 := #Ultimate.alloc(32); [L7293] FCALL call #t~string498 := #Ultimate.alloc(31); [L7353] FCALL call #t~string528 := #Ultimate.alloc(3); [L7353] FCALL call write~init~int(104, { base: #t~string528!base, offset: #t~string528!offset }, 1); [L7353] FCALL call write~init~int(101, { base: #t~string528!base, offset: 1 + #t~string528!offset }, 1); [L7353] FCALL call write~init~int(0, { base: #t~string528!base, offset: 2 + #t~string528!offset }, 1); [L7355] FCALL call #t~string531 := #Ultimate.alloc(30); [L7404] FCALL call #t~string542 := #Ultimate.alloc(30); [L7412] FCALL call #t~string548 := #Ultimate.alloc(32); [L7419] FCALL call #t~string552 := #Ultimate.alloc(32); [L7427] FCALL call #t~string558 := #Ultimate.alloc(29); [L7434] FCALL call #t~string562 := #Ultimate.alloc(36); [L7443] FCALL call #t~string568 := #Ultimate.alloc(40); [L7452] FCALL call #t~string573 := #Ultimate.alloc(34); [L7461] FCALL call #t~string579 := #Ultimate.alloc(38); [L7471] FCALL call #t~string584 := #Ultimate.alloc(34); [L7483] FCALL call #t~string591 := #Ultimate.alloc(21); [L7495] FCALL call #t~string598 := #Ultimate.alloc(43); [L7501] FCALL call #t~string603 := #Ultimate.alloc(33); [L7531] FCALL call #t~string611 := #Ultimate.alloc(32); [L7532] FCALL call #t~string614 := #Ultimate.alloc(3); [L7532] FCALL call write~init~int(83, { base: #t~string614!base, offset: #t~string614!offset }, 1); [L7532] FCALL call write~init~int(77, { base: #t~string614!base, offset: 1 + #t~string614!offset }, 1); [L7532] FCALL call write~init~int(0, { base: #t~string614!base, offset: 2 + #t~string614!offset }, 1); [L7532] FCALL call #t~string615 := #Ultimate.alloc(3); [L7532] FCALL call write~init~int(77, { base: #t~string615!base, offset: #t~string615!offset }, 1); [L7532] FCALL call write~init~int(77, { base: #t~string615!base, offset: 1 + #t~string615!offset }, 1); [L7532] FCALL call write~init~int(0, { base: #t~string615!base, offset: 2 + #t~string615!offset }, 1); [L7565] FCALL call #t~string640 := #Ultimate.alloc(34); [L7778] FCALL call #t~string742 := #Ultimate.alloc(4); [L7778] FCALL call write~init~int(116, { base: #t~string742!base, offset: #t~string742!offset }, 1); [L7778] FCALL call write~init~int(112, { base: #t~string742!base, offset: 1 + #t~string742!offset }, 1); [L7778] FCALL call write~init~int(100, { base: #t~string742!base, offset: 2 + #t~string742!offset }, 1); [L7778] FCALL call write~init~int(0, { base: #t~string742!base, offset: 3 + #t~string742!offset }, 1); [L7781] FCALL call #t~string747 := #Ultimate.alloc(38); [L7838] FCALL call #t~string770 := #Ultimate.alloc(44); [L8078] FCALL call #t~string892 := #Ultimate.alloc(39); [L8092] FCALL call #t~string902 := #Ultimate.alloc(30); [L8244] FCALL call #t~string963 := #Ultimate.alloc(47); [L8434] FCALL call #t~string1039 := #Ultimate.alloc(21); [L8438] FCALL call #t~string1044 := #Ultimate.alloc(19); [L8449] FCALL call #t~string1048 := #Ultimate.alloc(22); [L8526] FCALL call #t~string1085 := #Ultimate.alloc(30); [L8617] FCALL call #t~string1121 := #Ultimate.alloc(46); [L8625] FCALL call #t~string1123 := #Ultimate.alloc(18); [L8626] FCALL call #t~string1124 := #Ultimate.alloc(18); [L8658] FCALL call #t~string1133 := #Ultimate.alloc(40); [L8757] FCALL call #t~string1157 := #Ultimate.alloc(40); [L8915] FCALL call #t~string1185 := #Ultimate.alloc(34); [L8942] FCALL call #t~string1191 := #Ultimate.alloc(40); [L8961] FCALL call #t~string1199 := #Ultimate.alloc(46); [L9030] FCALL call #t~string1214 := #Ultimate.alloc(34); [L9063] FCALL call #t~string1222 := #Ultimate.alloc(32); [L9096] FCALL call #t~string1238 := #Ultimate.alloc(48); [L9110] FCALL call #t~string1250 := #Ultimate.alloc(34); [L9326] FCALL call #t~string1319 := #Ultimate.alloc(15); [L9334] FCALL call #t~string1321 := #Ultimate.alloc(7); [L9334] FCALL call write~init~int(37, { base: #t~string1321!base, offset: #t~string1321!offset }, 1); [L9334] FCALL call write~init~int(115, { base: #t~string1321!base, offset: 1 + #t~string1321!offset }, 1); [L9334] FCALL call write~init~int(37, { base: #t~string1321!base, offset: 2 + #t~string1321!offset }, 1); [L9334] FCALL call write~init~int(115, { base: #t~string1321!base, offset: 3 + #t~string1321!offset }, 1); [L9334] FCALL call write~init~int(10, { base: #t~string1321!base, offset: 4 + #t~string1321!offset }, 1); [L9334] FCALL call write~init~int(10, { base: #t~string1321!base, offset: 5 + #t~string1321!offset }, 1); [L9334] FCALL call write~init~int(0, { base: #t~string1321!base, offset: 6 + #t~string1321!offset }, 1); [L9334] FCALL call #t~string1323 := #Ultimate.alloc(3); [L9334] FCALL call write~init~int(83, { base: #t~string1323!base, offset: #t~string1323!offset }, 1); [L9334] FCALL call write~init~int(77, { base: #t~string1323!base, offset: 1 + #t~string1323!offset }, 1); [L9334] FCALL call write~init~int(0, { base: #t~string1323!base, offset: 2 + #t~string1323!offset }, 1); [L9334] FCALL call #t~string1324 := #Ultimate.alloc(3); [L9334] FCALL call write~init~int(77, { base: #t~string1324!base, offset: #t~string1324!offset }, 1); [L9334] FCALL call write~init~int(77, { base: #t~string1324!base, offset: 1 + #t~string1324!offset }, 1); [L9334] FCALL call write~init~int(0, { base: #t~string1324!base, offset: 2 + #t~string1324!offset }, 1); [L9342] FCALL call #t~string1327 := #Ultimate.alloc(70); [L9360] FCALL call #t~string1337 := #Ultimate.alloc(29); [L9368] FCALL call #t~string1339 := #Ultimate.alloc(37); [L9376] FCALL call #t~string1342 := #Ultimate.alloc(28); [L9384] FCALL call #t~string1344 := #Ultimate.alloc(38); [L9392] FCALL call #t~string1347 := #Ultimate.alloc(27); [L9400] FCALL call #t~string1350 := #Ultimate.alloc(57); [L9411] FCALL call #t~string1352 := #Ultimate.alloc(25); [L9427] FCALL call #t~string1356 := #Ultimate.alloc(32); [L9527] FCALL call #t~string1377 := #Ultimate.alloc(3); [L9527] FCALL call write~init~int(104, { base: #t~string1377!base, offset: #t~string1377!offset }, 1); [L9527] FCALL call write~init~int(101, { base: #t~string1377!base, offset: 1 + #t~string1377!offset }, 1); [L9527] FCALL call write~init~int(0, { base: #t~string1377!base, offset: 2 + #t~string1377!offset }, 1); [L9545] FCALL call #t~string1378 := #Ultimate.alloc(3); [L9545] FCALL call write~init~int(104, { base: #t~string1378!base, offset: #t~string1378!offset }, 1); [L9545] FCALL call write~init~int(101, { base: #t~string1378!base, offset: 1 + #t~string1378!offset }, 1); [L9545] FCALL call write~init~int(0, { base: #t~string1378!base, offset: 2 + #t~string1378!offset }, 1); [L6452] ~nvpibits~0 := -1; [L6453] ~nvcibits~0 := -1; [L6454] ~rx_skb_reserve~0 := 16; [L6457-L6462] FCALL call ~#readtab~0 := #Ultimate.alloc(68); [L6457-L6462] FCALL call write~init~int(4352, { base: ~#readtab~0!base, offset: ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(0, { base: ~#readtab~0!base, offset: 4 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(256, { base: ~#readtab~0!base, offset: 8 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(0, { base: ~#readtab~0!base, offset: 12 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(256, { base: ~#readtab~0!base, offset: 16 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(0, { base: ~#readtab~0!base, offset: 20 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(256, { base: ~#readtab~0!base, offset: 24 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(0, { base: ~#readtab~0!base, offset: 28 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(256, { base: ~#readtab~0!base, offset: 32 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(0, { base: ~#readtab~0!base, offset: 36 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(256, { base: ~#readtab~0!base, offset: 40 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(0, { base: ~#readtab~0!base, offset: 44 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(256, { base: ~#readtab~0!base, offset: 48 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(512, { base: ~#readtab~0!base, offset: 52 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(768, { base: ~#readtab~0!base, offset: 56 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(512, { base: ~#readtab~0!base, offset: 60 + ~#readtab~0!offset }, 4); [L6457-L6462] FCALL call write~init~int(768, { base: ~#readtab~0!base, offset: 64 + ~#readtab~0!offset }, 4); [L6463-L6468] FCALL call ~#clocktab~0 := #Ultimate.alloc(68); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 4 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 8 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 12 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 16 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 20 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 24 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 28 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 32 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 36 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 40 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 44 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 48 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 52 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 56 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(256, { base: ~#clocktab~0!base, offset: 60 + ~#clocktab~0!offset }, 4); [L6463-L6468] FCALL call write~init~int(0, { base: ~#clocktab~0!base, offset: 64 + ~#clocktab~0!offset }, 4); [L9564] ~LDV_IN_INTERRUPT~0 := 0; [L9907] ~ldv_spin~0 := 0; [L6450] ~he_devs~0 := { base: 0, offset: 0 }; [L6451] ~disable64~0 := 0; [L6455] ~irq_coalesce~0 := 1; [L6456] ~sdh~0 := 0; [L6469-L6471] FCALL call ~#he_ops~0 := #Ultimate.alloc(112); [L6469-L6471] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_ops~0!base, offset: ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(#funAddr~he_open, { base: ~#he_ops~0!base, offset: 8 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(#funAddr~he_close, { base: ~#he_ops~0!base, offset: 16 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(#funAddr~he_ioctl, { base: ~#he_ops~0!base, offset: 24 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_ops~0!base, offset: 32 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_ops~0!base, offset: 40 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_ops~0!base, offset: 48 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(#funAddr~he_send, { base: ~#he_ops~0!base, offset: 56 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_ops~0!base, offset: 64 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(#funAddr~he_phy_put, { base: ~#he_ops~0!base, offset: 72 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(#funAddr~he_phy_get, { base: ~#he_ops~0!base, offset: 80 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_ops~0!base, offset: 88 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(#funAddr~he_proc_read, { base: ~#he_ops~0!base, offset: 96 + ~#he_ops~0!offset }, 8); [L6469-L6471] FCALL call write~init~$Pointer$(~#__this_module~0, { base: ~#he_ops~0!base, offset: 104 + ~#he_ops~0!offset }, 8); [L9523-L9524] FCALL call ~#he_pci_tbl~0 := #Ultimate.alloc(64); [L9523-L9524] FCALL call write~init~int(4391, { base: ~#he_pci_tbl~0!base, offset: ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(1024, { base: ~#he_pci_tbl~0!base, offset: 4 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(4294967295, { base: ~#he_pci_tbl~0!base, offset: 8 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(4294967295, { base: ~#he_pci_tbl~0!base, offset: 12 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 16 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 20 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 24 + ~#he_pci_tbl~0!offset }, 8); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 32 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 36 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 40 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 44 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 48 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 52 + ~#he_pci_tbl~0!offset }, 4); [L9523-L9524] FCALL call write~init~int(0, { base: ~#he_pci_tbl~0!base, offset: 56 + ~#he_pci_tbl~0!offset }, 8); [L9525] ~__mod_pci_device_table~0!vendor := 0; [L9525] ~__mod_pci_device_table~0!device := 0; [L9525] ~__mod_pci_device_table~0!subvendor := 0; [L9525] ~__mod_pci_device_table~0!subdevice := 0; [L9525] ~__mod_pci_device_table~0!class := 0; [L9525] ~__mod_pci_device_table~0!class_mask := 0; [L9525] ~__mod_pci_device_table~0!driver_data := 0; [L9526-L9539] FCALL call ~#he_driver~0 := #Ultimate.alloc(301); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 8 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$(#t~string1377, { base: ~#he_driver~0!base, offset: 16 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$(~#he_pci_tbl~0, { base: ~#he_driver~0!base, offset: 24 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$(#funAddr~he_init_one, { base: ~#he_driver~0!base, offset: 32 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$(#funAddr~he_remove_one, { base: ~#he_driver~0!base, offset: 40 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 48 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 56 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 64 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 72 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 80 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 88 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 96 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 104 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 112 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 120 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 128 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~int(0, { base: ~#he_driver~0!base, offset: 136 + ~#he_driver~0!offset }, 1); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 137 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 145 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 153 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 161 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 169 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 177 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 185 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 193 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 201 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 209 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~int(0, { base: ~#he_driver~0!base, offset: 217 + ~#he_driver~0!offset }, 4); [L9526-L9539] FCALL call write~init~int(0, { base: ~#he_driver~0!base, offset: 221 + ~#he_driver~0!offset }, 4); [L9526-L9539] FCALL call write~init~int(0, { base: ~#he_driver~0!base, offset: 225 + ~#he_driver~0!offset }, 4); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 229 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 237 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 245 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 253 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 261 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~int(0, { base: ~#he_driver~0!base, offset: 269 + ~#he_driver~0!offset }, 4); [L9526-L9539] FCALL call write~init~int(0, { base: ~#he_driver~0!base, offset: 273 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 285 + ~#he_driver~0!offset }, 8); [L9526-L9539] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#he_driver~0!base, offset: 293 + ~#he_driver~0!offset }, 8); [L9576] havoc ~var_group1~0; [L9577] havoc ~res_he_open_23~0; [L9578] havoc ~var_group2~0; [L9579] havoc ~var_he_ioctl_26_p1~0; [L9580] havoc ~var_he_ioctl_26_p2~0; [L9581] havoc ~var_group3~0; [L9582] havoc ~var_he_phy_put_27_p1~0; [L9583] havoc ~var_he_phy_put_27_p2~0; [L9584] havoc ~var_he_phy_get_28_p1~0; [L9585] havoc ~var_he_proc_read_29_p1~0; [L9586] havoc ~var_he_proc_read_29_p2~0; [L9587] havoc ~var_group4~0; [L9588] havoc ~var_he_init_one_3_p1~0; [L9589] havoc ~res_he_init_one_3~0; [L9590] havoc ~var_he_irq_handler_21_p0~0; [L9591] havoc ~var_he_irq_handler_21_p1~0; [L9592] havoc ~ldv_s_he_ops_atmdev_ops~0; [L9593] havoc ~ldv_s_he_driver_pci_driver~0; [L9594] havoc ~tmp~47; [L9595] havoc ~tmp___0~20; [L9596] havoc ~tmp___1~14; [L9598] FCALL call #t~malloc1383 := #Ultimate.alloc(1590); [L9598] ~var_group1~0 := #t~malloc1383; [L9599] FCALL call write~$Pointer$(#funAddr~void_one_par_dummy, { base: ~var_group1~0!base, offset: 1420 + ~var_group1~0!offset }, 8); [L9600] FCALL call write~$Pointer$(#funAddr~void_two_par_dummy, { base: ~var_group1~0!base, offset: 1428 + ~var_group1~0!offset }, 8); [L9601] FCALL call write~$Pointer$(#funAddr~void_two_par_dummy, { base: ~var_group1~0!base, offset: 1436 + ~var_group1~0!offset }, 8); [L9602] FCALL call write~$Pointer$(#funAddr~int_two_par_dummy, { base: ~var_group1~0!base, offset: 1444 + ~var_group1~0!offset }, 8); [L9603] FCALL call write~$Pointer$(#funAddr~int_two_par_dummy, { base: ~var_group1~0!base, offset: 1452 + ~var_group1~0!offset }, 8); [L9606] ~ldv_s_he_ops_atmdev_ops~0 := 0; [L9607] ~ldv_s_he_driver_pci_driver~0 := 0; [L9608] ~LDV_IN_INTERRUPT~0 := 1; [L9609] FCALL call ldv_initialize(); [L9610] FCALL call ldv_handler_precall(); [L9542] havoc ~tmp~46; [L9545] FCALL call #t~ret1379 := __pci_register_driver(~#he_driver~0, ~#__this_module~0, #t~string1378); [L9545] assume -2147483648 <= #t~ret1379 && #t~ret1379 <= 2147483647; [L9545] ~tmp~46 := #t~ret1379; [L9545] havoc #t~ret1379; [L9546] #res := ~tmp~46; [L9611] assume -2147483648 <= #t~ret1384 && #t~ret1384 <= 2147483647; [L9611] ~tmp~47 := #t~ret1384; [L9611] havoc #t~ret1384; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9612] COND FALSE !(0 != ~tmp~47) VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9700] assume -2147483648 <= #t~nondet1394 && #t~nondet1394 <= 2147483647; [L9700] ~tmp___1~14 := #t~nondet1394; [L9700] havoc #t~nondet1394; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9701] COND TRUE (0 != ~tmp___1~14 || 0 != ~ldv_s_he_ops_atmdev_ops~0) || 0 != ~ldv_s_he_driver_pci_driver~0 [L9619] assume -2147483648 <= #t~nondet1385 && #t~nondet1385 <= 2147483647; [L9619] ~tmp___0~20 := #t~nondet1385; [L9619] havoc #t~nondet1385; [L9621] #t~switch1386 := 0 == ~tmp___0~20; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9620-L9697] COND FALSE !(#t~switch1386) [L9636] #t~switch1386 := #t~switch1386 || 1 == ~tmp___0~20; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9620-L9697] COND FALSE !(#t~switch1386) [L9645] #t~switch1386 := #t~switch1386 || 2 == ~tmp___0~20; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9620-L9697] COND FALSE !(#t~switch1386) [L9649] #t~switch1386 := #t~switch1386 || 3 == ~tmp___0~20; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9620-L9697] COND TRUE #t~switch1386 [L9650] FCALL call ldv_handler_precall(); [L9080-L9165] ~vcc := #in~vcc; [L9080-L9165] ~skb := #in~skb; [L9082] havoc ~flags~4; [L9083] havoc ~he_dev~7; [L9084] havoc ~cid~3; [L9085] havoc ~tpd~3; [L9086] havoc ~tmp~42; [L9087] havoc ~pti_clp~0; [L9088] havoc ~clp~0; [L9089] havoc ~pti~0; [L9090] havoc ~tmp___0~16; [L9093] FCALL call #t~mem1227 := read~$Pointer$({ base: ~vcc!base, offset: 1279 + ~vcc!offset }, 8); [L9093] FCALL call #t~mem1228 := read~$Pointer$({ base: #t~mem1227!base, offset: 28 + #t~mem1227!offset }, 8); [L9093] ~he_dev~7 := #t~mem1228; [L9093] havoc #t~mem1227; [L9093] havoc #t~mem1228; [L9094] FCALL call #t~mem1229 := read~int({ base: ~vcc!base, offset: 1257 + ~vcc!offset }, 2); [L9094] FCALL call #t~mem1230 := read~int({ base: ~he_dev~7!base, offset: 56 + ~he_dev~7!offset }, 4); [L9094] FCALL call #t~mem1231 := read~int({ base: ~vcc!base, offset: 1259 + ~vcc!offset }, 4); [L9094] ~cid~3 := ~bitwiseAnd(~bitwiseOr(~shiftLeft(#t~mem1229, (if #t~mem1230 % 4294967296 % 4294967296 <= 2147483647 then #t~mem1230 % 4294967296 % 4294967296 else #t~mem1230 % 4294967296 % 4294967296 - 4294967296)), #t~mem1231), 8191); [L9094] havoc #t~mem1229; [L9094] havoc #t~mem1230; [L9094] havoc #t~mem1231; [L9095] FCALL call #t~mem1232 := read~int({ base: ~skb!base, offset: 104 + ~skb!offset }, 4); [L9095] #t~short1236 := #t~mem1232 % 4294967296 > 65535; [L9095] COND FALSE !(#t~short1236) [L9095] FCALL call #t~mem1233 := read~int({ base: ~vcc!base, offset: 1379 + ~vcc!offset }, 1); [L9095] #t~short1235 := 13 == #t~mem1233 % 256 % 4294967296; [L9095] COND TRUE #t~short1235 [L9095] FCALL call #t~mem1234 := read~int({ base: ~skb!base, offset: 104 + ~skb!offset }, 4); [L9095] #t~short1235 := 52 != #t~mem1234 % 4294967296; [L9095] #t~short1236 := #t~short1235; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9095] COND FALSE !(#t~short1236) [L9095] havoc #t~mem1233; [L9095] havoc #t~mem1234; [L9095] havoc #t~short1235; [L9095] havoc #t~short1236; [L9095] havoc #t~mem1232; [L6136-L6143] ~skb := #in~skb; [L6141] FCALL call #t~mem181 := read~$Pointer$({ base: ~skb!base, offset: 239 + ~skb!offset }, 8); [L6141] FCALL call #t~mem182 := read~int({ base: ~skb!base, offset: 235 + ~skb!offset }, 4); [L6141] #res := { base: #t~mem181!base, offset: #t~mem181!offset + (if #t~mem182 % 4294967296 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then #t~mem182 % 4294967296 % 18446744073709551616 % 18446744073709551616 else #t~mem182 % 4294967296 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616) }; [L6141] havoc #t~mem182; [L6141] havoc #t~mem181; [L9108] ~tmp~42 := #t~ret1247; [L9108] havoc #t~ret1247; [L9109] FCALL call #t~mem1248 := read~int({ base: ~tmp~42!base, offset: ~tmp~42!offset }, 1); VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9109] COND FALSE !(0 != #t~mem1248 % 256 % 4294967296) [L9109] havoc #t~mem1248; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9122] CALL call ldv_spin_lock(); VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, old(~ldv_spin~0)=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=0, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9954] ~ldv_spin~0 := 1; [L9122] RET call ldv_spin_lock(); VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9123] CALL call #t~ret1258 := __alloc_tpd(~he_dev~7); VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L8006-L8030] ~he_dev := #in~he_dev; [L8008] havoc ~tpd~0; [L8009] FCALL call ~#mapping~1 := #Ultimate.alloc(8); [L8010] havoc ~tmp~35; [L8013] FCALL call #t~mem877 := read~$Pointer$({ base: ~he_dev!base, offset: 400 + ~he_dev!offset }, 8); [L9869-L9878] ~ldv_func_arg1 := #in~ldv_func_arg1; [L9869-L9878] ~flags := #in~flags; [L9869-L9878] ~ldv_func_arg3 := #in~ldv_func_arg3; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9874] CALL call ldv_check_alloc_flags(~flags); VAL [#in~flags=33, #NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9908-L9920] ~flags := #in~flags; VAL [#in~flags=33, #NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~flags=33, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9913] COND FALSE !(0 == ~ldv_spin~0 || 0 != ~bitwiseAnd(~flags, 32) % 4294967296) VAL [#in~flags=33, #NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~flags=33, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9916] CALL call ldv_error(); VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L9895] assert false; VAL [#NULL!base=0, #NULL!offset=0, #t~string1039!base=41, #t~string1039!offset=0, #t~string1044!base=147, #t~string1044!offset=0, #t~string1048!base=146, #t~string1048!offset=0, #t~string1085!base=144, #t~string1085!offset=0, #t~string1121!base=143, #t~string1121!offset=0, #t~string1123!base=142, #t~string1123!offset=0, #t~string1124!base=141, #t~string1124!offset=0, #t~string1133!base=139, #t~string1133!offset=0, #t~string1157!base=138, #t~string1157!offset=0, #t~string1185!base=135, #t~string1185!offset=0, #t~string1191!base=103, #t~string1191!offset=0, #t~string1199!base=134, #t~string1199!offset=0, #t~string1214!base=133, #t~string1214!offset=0, #t~string1222!base=131, #t~string1222!offset=0, #t~string1238!base=130, #t~string1238!offset=0, #t~string1250!base=129, #t~string1250!offset=0, #t~string1319!base=127, #t~string1319!offset=0, #t~string1321!base=126, #t~string1321!offset=0, #t~string1323!base=125, #t~string1323!offset=0, #t~string1324!base=124, #t~string1324!offset=0, #t~string1327!base=123, #t~string1327!offset=0, #t~string1337!base=122, #t~string1337!offset=0, #t~string1339!base=121, #t~string1339!offset=0, #t~string1342!base=119, #t~string1342!offset=0, #t~string1344!base=118, #t~string1344!offset=0, #t~string1347!base=117, #t~string1347!offset=0, #t~string1350!base=113, #t~string1350!offset=0, #t~string1352!base=110, #t~string1352!offset=0, #t~string1356!base=111, #t~string1356!offset=0, #t~string1377!base=160, #t~string1377!offset=0, #t~string1378!base=105, #t~string1378!offset=0, #t~string163!base=95, #t~string163!offset=0, #t~string322!base=94, #t~string322!offset=0, #t~string326!base=93, #t~string326!offset=0, #t~string327!base=92, #t~string327!offset=0, #t~string333!base=91, #t~string333!offset=0, #t~string380!base=90, #t~string380!offset=0, #t~string410!base=89, #t~string410!offset=0, #t~string416!base=87, #t~string416!offset=0, #t~string418!base=86, #t~string418!offset=0, #t~string423!base=85, #t~string423!offset=0, #t~string429!base=84, #t~string429!offset=0, #t~string452!base=82, #t~string452!offset=0, #t~string462!base=81, #t~string462!offset=0, #t~string470!base=79, #t~string470!offset=0, #t~string498!base=78, #t~string498!offset=0, #t~string528!base=76, #t~string528!offset=0, #t~string531!base=75, #t~string531!offset=0, #t~string542!base=74, #t~string542!offset=0, #t~string548!base=73, #t~string548!offset=0, #t~string552!base=71, #t~string552!offset=0, #t~string558!base=69, #t~string558!offset=0, #t~string562!base=67, #t~string562!offset=0, #t~string568!base=66, #t~string568!offset=0, #t~string573!base=65, #t~string573!offset=0, #t~string579!base=63, #t~string579!offset=0, #t~string584!base=62, #t~string584!offset=0, #t~string591!base=61, #t~string591!offset=0, #t~string598!base=59, #t~string598!offset=0, #t~string603!base=58, #t~string603!offset=0, #t~string611!base=55, #t~string611!offset=0, #t~string614!base=54, #t~string614!offset=0, #t~string615!base=53, #t~string615!offset=0, #t~string640!base=50, #t~string640!offset=0, #t~string742!base=51, #t~string742!offset=0, #t~string747!base=109, #t~string747!offset=0, #t~string770!base=106, #t~string770!offset=0, #t~string81!base=26, #t~string81!offset=0, #t~string82!base=97, #t~string82!offset=0, #t~string892!base=107, #t~string892!offset=0, #t~string902!base=150, #t~string902!offset=0, #t~string963!base=149, #t~string963!offset=0, ~#__this_module~0!base=158, ~#__this_module~0!offset=170, ~#clocktab~0!base=155, ~#clocktab~0!offset=0, ~#he_driver~0!base=17, ~#he_driver~0!offset=0, ~#he_ops~0!base=99, ~#he_ops~0!offset=0, ~#he_pci_tbl~0!base=167, ~#he_pci_tbl~0!offset=0, ~#readtab~0!base=49, ~#readtab~0!offset=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!class=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!device=0, ~__mod_pci_device_table~0!driver_data=0, ~__mod_pci_device_table~0!vendor=0, ~__mod_pci_device_table~0!vendor=0, ~disable64~0=0, ~he_devs~0!base=0, ~he_devs~0!offset=0, ~irq_coalesce~0=1, ~LDV_IN_INTERRUPT~0=1, ~ldv_spin~0=1, ~nvcibits~0=-1, ~nvpibits~0=-1, ~rx_skb_reserve~0=16, ~sdh~0=0] [L6452] static short nvpibits = -1; [L6453] static short nvcibits = -1; [L6454] static short rx_skb_reserve = 16; [L6457-L6462] static unsigned int readtab[17U] = { 4352U, 0U, 256U, 0U, 256U, 0U, 256U, 0U, 256U, 0U, 256U, 0U, 256U, 512U, 768U, 512U, 768U}; [L6463-L6468] static unsigned int clocktab[17U] = { 0U, 256U, 0U, 256U, 0U, 256U, 0U, 256U, 0U, 256U, 0U, 256U, 0U, 256U, 0U, 256U, 0U}; [L9564] int LDV_IN_INTERRUPT ; [L9907] int ldv_spin = 0; [L6450] static struct he_dev *he_devs ; [L6451] static bool disable64 ; [L6455] static bool irq_coalesce = 1; [L6456] static bool sdh = 0; [L6469-L6471] static struct atmdev_ops he_ops = {0, & he_open, & he_close, & he_ioctl, 0, 0, 0, & he_send, 0, & he_phy_put, & he_phy_get, 0, & he_proc_read, & __this_module}; [L9523-L9524] static struct pci_device_id he_pci_tbl[2U] = { {4391U, 1024U, 4294967295U, 4294967295U, 0U, 0U, 0UL}, {0U, 0U, 0U, 0U, 0U, 0U, 0UL}}; [L9525] struct pci_device_id const __mod_pci_device_table ; [L9526-L9539] static struct pci_driver he_driver = {{0, 0}, "he", (struct pci_device_id const *)(& he_pci_tbl), & he_init_one, & he_remove_one, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0, (_Bool)0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, {{{{{{0U}}, 0U, 0U, 0, {0, {0, 0}, 0, 0, 0UL}}}}, {0, 0}}}; [L9576] struct atm_vcc *var_group1 ; [L9577] int res_he_open_23 ; [L9578] struct atm_dev *var_group2 ; [L9579] unsigned int var_he_ioctl_26_p1 ; [L9580] void *var_he_ioctl_26_p2 ; [L9581] struct sk_buff *var_group3 ; [L9582] unsigned char var_he_phy_put_27_p1 ; [L9583] unsigned long var_he_phy_put_27_p2 ; [L9584] unsigned long var_he_phy_get_28_p1 ; [L9585] loff_t *var_he_proc_read_29_p1 ; [L9586] char *var_he_proc_read_29_p2 ; [L9587] struct pci_dev *var_group4 ; [L9588] struct pci_device_id const *var_he_init_one_3_p1 ; [L9589] int res_he_init_one_3 ; [L9590] int var_he_irq_handler_21_p0 ; [L9591] void *var_he_irq_handler_21_p1 ; [L9592] int ldv_s_he_ops_atmdev_ops ; [L9593] int ldv_s_he_driver_pci_driver ; [L9594] int tmp ; [L9595] int tmp___0 ; [L9596] int tmp___1 ; [L9598] var_group1 = malloc(sizeof(struct atm_vcc)) [L9599] var_group1->release_cb = &void_one_par_dummy [L9600] var_group1->push = &void_two_par_dummy [L9601] var_group1->pop = &void_two_par_dummy [L9602] var_group1->push_oam = &int_two_par_dummy [L9603] var_group1->send = &int_two_par_dummy [L9606] ldv_s_he_ops_atmdev_ops = 0 [L9607] ldv_s_he_driver_pci_driver = 0 [L9608] LDV_IN_INTERRUPT = 1 [L9542] int tmp ; [L9545] tmp = __pci_register_driver(& he_driver, & __this_module, "he") [L9546] return (tmp); [L9611] tmp = he_init() [L9612] COND FALSE !(tmp != 0) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={158:170}, clocktab={155:0}, disable64=0, he_devs={0:0}, he_driver={17:0}, he_ops={99:0}, he_pci_tbl={167:0}, irq_coalesce=1, LDV_IN_INTERRUPT=1, ldv_spin=0, nvcibits=-1, nvpibits=-1, readtab={49:0}, rx_skb_reserve=16, sdh=0] [L9700] tmp___1 = __VERIFIER_nondet_int() [L9701] COND TRUE (tmp___1 != 0 || ldv_s_he_ops_atmdev_ops != 0) || ldv_s_he_driver_pci_driver != 0 [L9619] tmp___0 = __VERIFIER_nondet_int() [L9621] case 0: [L9636] case 1: [L9645] case 2: [L9649] case 3: [L9082] unsigned long flags ; [L9083] struct he_dev *he_dev ; [L9084] unsigned int cid ; [L9085] struct he_tpd *tpd ; [L9086] unsigned char *tmp ; [L9087] char *pti_clp ; [L9088] int clp ; [L9089] int pti ; [L9090] dma_addr_t tmp___0 ; [L9093] EXPR vcc->dev [L9093] EXPR (vcc->dev)->dev_data [L9093] he_dev = (struct he_dev *)(vcc->dev)->dev_data [L9094] EXPR vcc->vpi [L9094] EXPR he_dev->vcibits [L9094] EXPR vcc->vci [L9094] cid = (unsigned int )(((int )vcc->vpi << (int )he_dev->vcibits) | vcc->vci) & 8191U [L9095] EXPR skb->len [L9095] skb->len > 65535U || ((unsigned int )vcc->qos.aal == 13U && skb->len != 52U) [L9095] EXPR vcc->qos.aal [L9095] EXPR (unsigned int )vcc->qos.aal == 13U && skb->len != 52U [L9095] EXPR skb->len [L9095] EXPR (unsigned int )vcc->qos.aal == 13U && skb->len != 52U [L9095] skb->len > 65535U || ((unsigned int )vcc->qos.aal == 13U && skb->len != 52U) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={158:170}, clocktab={155:0}, disable64=0, he_devs={0:0}, he_driver={17:0}, he_ops={99:0}, he_pci_tbl={167:0}, irq_coalesce=1, LDV_IN_INTERRUPT=1, ldv_spin=0, nvcibits=-1, nvpibits=-1, readtab={49:0}, rx_skb_reserve=16, sdh=0] [L9095] COND FALSE !(skb->len > 65535U || ((unsigned int )vcc->qos.aal == 13U && skb->len != 52U)) [L6141] EXPR skb->head [L6141] EXPR skb->end [L6141] return ((unsigned char *)skb->head + (unsigned long )skb->end); [L9108] tmp = skb_end_pointer((struct sk_buff const *)skb) [L9109] EXPR ((struct skb_shared_info *)tmp)->nr_frags VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={158:170}, clocktab={155:0}, disable64=0, he_devs={0:0}, he_driver={17:0}, he_ops={99:0}, he_pci_tbl={167:0}, irq_coalesce=1, LDV_IN_INTERRUPT=1, ldv_spin=0, nvcibits=-1, nvpibits=-1, readtab={49:0}, rx_skb_reserve=16, sdh=0] [L9109] COND FALSE !((unsigned int )((struct skb_shared_info *)tmp)->nr_frags != 0U) [L9122] CALL ldv_spin_lock() VAL [\old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={158:170}, clocktab={155:0}, disable64=0, he_devs={0:0}, he_driver={17:0}, he_ops={99:0}, he_pci_tbl={167:0}, irq_coalesce=1, LDV_IN_INTERRUPT=1, ldv_spin=0, nvcibits=-1, nvpibits=-1, readtab={49:0}, rx_skb_reserve=16, sdh=0] [L9954] ldv_spin = 1 [L9122] RET ldv_spin_lock() VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={158:170}, clocktab={155:0}, disable64=0, he_devs={0:0}, he_driver={17:0}, he_ops={99:0}, he_pci_tbl={167:0}, irq_coalesce=1, LDV_IN_INTERRUPT=1, ldv_spin=1, nvcibits=-1, nvpibits=-1, readtab={49:0}, rx_skb_reserve=16, sdh=0] [L9123] CALL __alloc_tpd(he_dev) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={158:170}, clocktab={155:0}, disable64=0, he_devs={0:0}, he_driver={17:0}, he_ops={99:0}, he_pci_tbl={167:0}, irq_coalesce=1, LDV_IN_INTERRUPT=1, ldv_spin=1, nvcibits=-1, nvpibits=-1, readtab={49:0}, rx_skb_reserve=16, sdh=0] [L8008] struct he_tpd *tpd ; [L8009] dma_addr_t mapping ; [L8010] void *tmp ; [L8013] he_dev->tpd_pool [L9874] CALL ldv_check_alloc_flags(flags) VAL [\old(flags)=33, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={158:170}, clocktab={155:0}, disable64=0, he_devs={0:0}, he_driver={17:0}, he_ops={99:0}, he_pci_tbl={167:0}, irq_coalesce=1, LDV_IN_INTERRUPT=1, ldv_spin=1, nvcibits=-1, nvpibits=-1, readtab={49:0}, rx_skb_reserve=16, sdh=0] [L9913] COND FALSE !(ldv_spin == 0 || flags & 32U) VAL [\old(flags)=33, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={158:170}, clocktab={155:0}, disable64=0, flags=33, he_devs={0:0}, he_driver={17:0}, he_ops={99:0}, he_pci_tbl={167:0}, irq_coalesce=1, LDV_IN_INTERRUPT=1, ldv_spin=1, nvcibits=-1, nvpibits=-1, readtab={49:0}, rx_skb_reserve=16, sdh=0] [L9916] CALL ldv_error() VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={158:170}, clocktab={155:0}, disable64=0, he_devs={0:0}, he_driver={17:0}, he_ops={99:0}, he_pci_tbl={167:0}, irq_coalesce=1, LDV_IN_INTERRUPT=1, ldv_spin=1, nvcibits=-1, nvpibits=-1, readtab={49:0}, rx_skb_reserve=16, sdh=0] [L9895] __VERIFIER_error() VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={158:170}, clocktab={155:0}, disable64=0, he_devs={0:0}, he_driver={17:0}, he_ops={99:0}, he_pci_tbl={167:0}, irq_coalesce=1, LDV_IN_INTERRUPT=1, ldv_spin=1, nvcibits=-1, nvpibits=-1, readtab={49:0}, rx_skb_reserve=16, sdh=0] ----- [2018-11-23 03:23:51,321 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck CFG 23.11 03:23:51 ImpRootNode [2018-11-23 03:23:51,321 INFO L132 PluginConnector]: ------------------------ END CodeCheck---------------------------- [2018-11-23 03:23:51,322 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-23 03:23:51,339 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-23 03:23:51,339 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-23 03:23:51,340 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:23:47" (3/4) ... [2018-11-23 03:23:51,343 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-11-23 03:23:51,344 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-23 03:23:51,344 INFO L168 Benchmark]: Toolchain (without parser) took 159747.65 ms. Allocated memory was 1.0 GB in the beginning and 1.4 GB in the end (delta: 369.1 MB). Free memory was 945.5 MB in the beginning and 860.2 MB in the end (delta: 85.3 MB). Peak memory consumption was 454.4 MB. Max. memory is 11.5 GB. [2018-11-23 03:23:51,346 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 985.4 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 03:23:51,346 INFO L168 Benchmark]: CACSL2BoogieTranslator took 1647.54 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 179.3 MB). Free memory was 945.5 MB in the beginning and 953.1 MB in the end (delta: -7.6 MB). Peak memory consumption was 196.7 MB. Max. memory is 11.5 GB. [2018-11-23 03:23:51,347 INFO L168 Benchmark]: Boogie Procedure Inliner took 125.47 ms. Allocated memory is still 1.2 GB. Free memory was 953.1 MB in the beginning and 929.5 MB in the end (delta: 23.6 MB). Peak memory consumption was 23.6 MB. Max. memory is 11.5 GB. [2018-11-23 03:23:51,348 INFO L168 Benchmark]: Boogie Preprocessor took 134.16 ms. Allocated memory is still 1.2 GB. Free memory was 929.5 MB in the beginning and 901.9 MB in the end (delta: 27.5 MB). Peak memory consumption was 27.5 MB. Max. memory is 11.5 GB. [2018-11-23 03:23:51,349 INFO L168 Benchmark]: RCFGBuilder took 154162.22 ms. Allocated memory was 1.2 GB in the beginning and 1.4 GB in the end (delta: 189.8 MB). Free memory was 901.9 MB in the beginning and 1.2 GB in the end (delta: -280.4 MB). Peak memory consumption was 324.7 MB. Max. memory is 11.5 GB. [2018-11-23 03:23:51,350 INFO L168 Benchmark]: CodeCheck took 3653.35 ms. Allocated memory is still 1.4 GB. Free memory was 1.2 GB in the beginning and 860.2 MB in the end (delta: 322.2 MB). Peak memory consumption was 322.2 MB. Max. memory is 11.5 GB. [2018-11-23 03:23:51,350 INFO L168 Benchmark]: Witness Printer took 21.85 ms. Allocated memory is still 1.4 GB. Free memory is still 860.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 03:23:51,356 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck: - StatisticsResult: Ultimate CodeCheck benchmark data CFG has 46 procedures, 1378 locations, 1 error locations. UNSAFE Result, 1.5s OverallTime, 2 OverallIterations, 0 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 52 SDtfs, 28 SDslu, 66 SDs, 0 SdLazy, 12 SolverSat, 2 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 209 GetRequests, 206 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=-1occurred in iteration=-1, traceCheckStatistics: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 0.1s InterpolantComputationTime, 40 NumberOfCodeBlocks, 40 NumberOfCodeBlocksAsserted, 2 NumberOfCheckSat, 19 ConstructedInterpolants, 0 QuantifiedInterpolants, 931 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 1 InterpolantComputations, 1 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, ReuseStatistics: No data available - UnprovableResult [Line: 9895]: Unable to prove that call of __VERIFIER_error() unreachable Unable to prove that call of __VERIFIER_error() unreachable Reason: overapproximation of bitwiseAnd at line 9913. Possible FailurePath: [L6452] static short nvpibits = -1; [L6453] static short nvcibits = -1; [L6454] static short rx_skb_reserve = 16; [L6457-L6462] static unsigned int readtab[17U] = { 4352U, 0U, 256U, 0U, 256U, 0U, 256U, 0U, 256U, 0U, 256U, 0U, 256U, 512U, 768U, 512U, 768U}; [L6463-L6468] static unsigned int clocktab[17U] = { 0U, 256U, 0U, 256U, 0U, 256U, 0U, 256U, 0U, 256U, 0U, 256U, 0U, 256U, 0U, 256U, 0U}; [L9564] int LDV_IN_INTERRUPT ; [L9907] int ldv_spin = 0; [L6450] static struct he_dev *he_devs ; [L6451] static bool disable64 ; [L6455] static bool irq_coalesce = 1; [L6456] static bool sdh = 0; [L6469-L6471] static struct atmdev_ops he_ops = {0, & he_open, & he_close, & he_ioctl, 0, 0, 0, & he_send, 0, & he_phy_put, & he_phy_get, 0, & he_proc_read, & __this_module}; [L9523-L9524] static struct pci_device_id he_pci_tbl[2U] = { {4391U, 1024U, 4294967295U, 4294967295U, 0U, 0U, 0UL}, {0U, 0U, 0U, 0U, 0U, 0U, 0UL}}; [L9525] struct pci_device_id const __mod_pci_device_table ; [L9526-L9539] static struct pci_driver he_driver = {{0, 0}, "he", (struct pci_device_id const *)(& he_pci_tbl), & he_init_one, & he_remove_one, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0, (_Bool)0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, {{{{{{0U}}, 0U, 0U, 0, {0, {0, 0}, 0, 0, 0UL}}}}, {0, 0}}}; [L9576] struct atm_vcc *var_group1 ; [L9577] int res_he_open_23 ; [L9578] struct atm_dev *var_group2 ; [L9579] unsigned int var_he_ioctl_26_p1 ; [L9580] void *var_he_ioctl_26_p2 ; [L9581] struct sk_buff *var_group3 ; [L9582] unsigned char var_he_phy_put_27_p1 ; [L9583] unsigned long var_he_phy_put_27_p2 ; [L9584] unsigned long var_he_phy_get_28_p1 ; [L9585] loff_t *var_he_proc_read_29_p1 ; [L9586] char *var_he_proc_read_29_p2 ; [L9587] struct pci_dev *var_group4 ; [L9588] struct pci_device_id const *var_he_init_one_3_p1 ; [L9589] int res_he_init_one_3 ; [L9590] int var_he_irq_handler_21_p0 ; [L9591] void *var_he_irq_handler_21_p1 ; [L9592] int ldv_s_he_ops_atmdev_ops ; [L9593] int ldv_s_he_driver_pci_driver ; [L9594] int tmp ; [L9595] int tmp___0 ; [L9596] int tmp___1 ; [L9598] var_group1 = malloc(sizeof(struct atm_vcc)) [L9599] var_group1->release_cb = &void_one_par_dummy [L9600] var_group1->push = &void_two_par_dummy [L9601] var_group1->pop = &void_two_par_dummy [L9602] var_group1->push_oam = &int_two_par_dummy [L9603] var_group1->send = &int_two_par_dummy [L9606] ldv_s_he_ops_atmdev_ops = 0 [L9607] ldv_s_he_driver_pci_driver = 0 [L9608] LDV_IN_INTERRUPT = 1 [L9542] int tmp ; [L9545] tmp = __pci_register_driver(& he_driver, & __this_module, "he") [L9546] return (tmp); [L9611] tmp = he_init() [L9612] COND FALSE !(tmp != 0) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={158:170}, clocktab={155:0}, disable64=0, he_devs={0:0}, he_driver={17:0}, he_ops={99:0}, he_pci_tbl={167:0}, irq_coalesce=1, LDV_IN_INTERRUPT=1, ldv_spin=0, nvcibits=-1, nvpibits=-1, readtab={49:0}, rx_skb_reserve=16, sdh=0] [L9700] tmp___1 = __VERIFIER_nondet_int() [L9701] COND TRUE (tmp___1 != 0 || ldv_s_he_ops_atmdev_ops != 0) || ldv_s_he_driver_pci_driver != 0 [L9619] tmp___0 = __VERIFIER_nondet_int() [L9621] case 0: [L9636] case 1: [L9645] case 2: [L9649] case 3: [L9082] unsigned long flags ; [L9083] struct he_dev *he_dev ; [L9084] unsigned int cid ; [L9085] struct he_tpd *tpd ; [L9086] unsigned char *tmp ; [L9087] char *pti_clp ; [L9088] int clp ; [L9089] int pti ; [L9090] dma_addr_t tmp___0 ; [L9093] EXPR vcc->dev [L9093] EXPR (vcc->dev)->dev_data [L9093] he_dev = (struct he_dev *)(vcc->dev)->dev_data [L9094] EXPR vcc->vpi [L9094] EXPR he_dev->vcibits [L9094] EXPR vcc->vci [L9094] cid = (unsigned int )(((int )vcc->vpi << (int )he_dev->vcibits) | vcc->vci) & 8191U [L9095] EXPR skb->len [L9095] skb->len > 65535U || ((unsigned int )vcc->qos.aal == 13U && skb->len != 52U) [L9095] EXPR vcc->qos.aal [L9095] EXPR (unsigned int )vcc->qos.aal == 13U && skb->len != 52U [L9095] EXPR skb->len [L9095] EXPR (unsigned int )vcc->qos.aal == 13U && skb->len != 52U [L9095] skb->len > 65535U || ((unsigned int )vcc->qos.aal == 13U && skb->len != 52U) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={158:170}, clocktab={155:0}, disable64=0, he_devs={0:0}, he_driver={17:0}, he_ops={99:0}, he_pci_tbl={167:0}, irq_coalesce=1, LDV_IN_INTERRUPT=1, ldv_spin=0, nvcibits=-1, nvpibits=-1, readtab={49:0}, rx_skb_reserve=16, sdh=0] [L9095] COND FALSE !(skb->len > 65535U || ((unsigned int )vcc->qos.aal == 13U && skb->len != 52U)) [L6141] EXPR skb->head [L6141] EXPR skb->end [L6141] return ((unsigned char *)skb->head + (unsigned long )skb->end); [L9108] tmp = skb_end_pointer((struct sk_buff const *)skb) [L9109] EXPR ((struct skb_shared_info *)tmp)->nr_frags VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={158:170}, clocktab={155:0}, disable64=0, he_devs={0:0}, he_driver={17:0}, he_ops={99:0}, he_pci_tbl={167:0}, irq_coalesce=1, LDV_IN_INTERRUPT=1, ldv_spin=0, nvcibits=-1, nvpibits=-1, readtab={49:0}, rx_skb_reserve=16, sdh=0] [L9109] COND FALSE !((unsigned int )((struct skb_shared_info *)tmp)->nr_frags != 0U) [L9122] CALL ldv_spin_lock() VAL [\old(ldv_spin)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={158:170}, clocktab={155:0}, disable64=0, he_devs={0:0}, he_driver={17:0}, he_ops={99:0}, he_pci_tbl={167:0}, irq_coalesce=1, LDV_IN_INTERRUPT=1, ldv_spin=0, nvcibits=-1, nvpibits=-1, readtab={49:0}, rx_skb_reserve=16, sdh=0] [L9954] ldv_spin = 1 [L9122] RET ldv_spin_lock() VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={158:170}, clocktab={155:0}, disable64=0, he_devs={0:0}, he_driver={17:0}, he_ops={99:0}, he_pci_tbl={167:0}, irq_coalesce=1, LDV_IN_INTERRUPT=1, ldv_spin=1, nvcibits=-1, nvpibits=-1, readtab={49:0}, rx_skb_reserve=16, sdh=0] [L9123] CALL __alloc_tpd(he_dev) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={158:170}, clocktab={155:0}, disable64=0, he_devs={0:0}, he_driver={17:0}, he_ops={99:0}, he_pci_tbl={167:0}, irq_coalesce=1, LDV_IN_INTERRUPT=1, ldv_spin=1, nvcibits=-1, nvpibits=-1, readtab={49:0}, rx_skb_reserve=16, sdh=0] [L8008] struct he_tpd *tpd ; [L8009] dma_addr_t mapping ; [L8010] void *tmp ; [L8013] he_dev->tpd_pool [L9874] CALL ldv_check_alloc_flags(flags) VAL [\old(flags)=33, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={158:170}, clocktab={155:0}, disable64=0, he_devs={0:0}, he_driver={17:0}, he_ops={99:0}, he_pci_tbl={167:0}, irq_coalesce=1, LDV_IN_INTERRUPT=1, ldv_spin=1, nvcibits=-1, nvpibits=-1, readtab={49:0}, rx_skb_reserve=16, sdh=0] [L9913] COND FALSE !(ldv_spin == 0 || flags & 32U) VAL [\old(flags)=33, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={158:170}, clocktab={155:0}, disable64=0, flags=33, he_devs={0:0}, he_driver={17:0}, he_ops={99:0}, he_pci_tbl={167:0}, irq_coalesce=1, LDV_IN_INTERRUPT=1, ldv_spin=1, nvcibits=-1, nvpibits=-1, readtab={49:0}, rx_skb_reserve=16, sdh=0] [L9916] CALL ldv_error() VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={158:170}, clocktab={155:0}, disable64=0, he_devs={0:0}, he_driver={17:0}, he_ops={99:0}, he_pci_tbl={167:0}, irq_coalesce=1, LDV_IN_INTERRUPT=1, ldv_spin=1, nvcibits=-1, nvpibits=-1, readtab={49:0}, rx_skb_reserve=16, sdh=0] [L9895] __VERIFIER_error() VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={158:170}, clocktab={155:0}, disable64=0, he_devs={0:0}, he_driver={17:0}, he_ops={99:0}, he_pci_tbl={167:0}, irq_coalesce=1, LDV_IN_INTERRUPT=1, ldv_spin=1, nvcibits=-1, nvpibits=-1, readtab={49:0}, rx_skb_reserve=16, sdh=0] * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 985.4 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 1647.54 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 179.3 MB). Free memory was 945.5 MB in the beginning and 953.1 MB in the end (delta: -7.6 MB). Peak memory consumption was 196.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 125.47 ms. Allocated memory is still 1.2 GB. Free memory was 953.1 MB in the beginning and 929.5 MB in the end (delta: 23.6 MB). Peak memory consumption was 23.6 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 134.16 ms. Allocated memory is still 1.2 GB. Free memory was 929.5 MB in the beginning and 901.9 MB in the end (delta: 27.5 MB). Peak memory consumption was 27.5 MB. Max. memory is 11.5 GB. * RCFGBuilder took 154162.22 ms. Allocated memory was 1.2 GB in the beginning and 1.4 GB in the end (delta: 189.8 MB). Free memory was 901.9 MB in the beginning and 1.2 GB in the end (delta: -280.4 MB). Peak memory consumption was 324.7 MB. Max. memory is 11.5 GB. * CodeCheck took 3653.35 ms. Allocated memory is still 1.4 GB. Free memory was 1.2 GB in the beginning and 860.2 MB in the end (delta: 322.2 MB). Peak memory consumption was 322.2 MB. Max. memory is 11.5 GB. * Witness Printer took 21.85 ms. Allocated memory is still 1.4 GB. Free memory is still 860.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!class - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!device - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!vendor - GenericResult: Unfinished Backtranslation unknown boogie variable ~__mod_pci_device_table~0!driver_data RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-aa41828 [2018-11-23 03:23:53,202 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 03:23:53,203 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 03:23:53,211 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 03:23:53,211 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 03:23:53,212 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 03:23:53,213 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 03:23:53,214 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 03:23:53,216 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 03:23:53,216 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 03:23:53,217 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 03:23:53,217 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 03:23:53,219 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 03:23:53,219 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 03:23:53,220 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 03:23:53,221 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 03:23:53,222 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 03:23:53,223 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 03:23:53,225 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 03:23:53,226 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 03:23:53,227 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 03:23:53,228 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 03:23:53,230 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 03:23:53,230 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 03:23:53,231 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 03:23:53,231 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 03:23:53,232 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 03:23:53,233 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 03:23:53,233 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 03:23:53,235 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 03:23:53,235 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 03:23:53,235 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 03:23:53,236 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 03:23:53,236 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 03:23:53,236 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 03:23:53,237 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 03:23:53,237 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_5868046e-448a-457a-b1ef-2b2df03b21ce/bin-2019/ukojak/config/svcomp-Reach-64bit-Kojak_Bitvector.epf [2018-11-23 03:23:53,248 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 03:23:53,248 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 03:23:53,249 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 03:23:53,249 INFO L133 SettingsManager]: * ... to procedures called more than once=ALWAYS [2018-11-23 03:23:53,249 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 03:23:53,249 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 03:23:53,250 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 03:23:53,250 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 03:23:53,250 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 03:23:53,251 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 03:23:53,251 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 03:23:53,251 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-23 03:23:53,251 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-23 03:23:53,251 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 03:23:53,251 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 03:23:53,251 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 03:23:53,251 INFO L131 SettingsManager]: Preferences of CodeCheck differ from their defaults: [2018-11-23 03:23:53,251 INFO L133 SettingsManager]: * Timeout in seconds=1000000 [2018-11-23 03:23:53,252 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 03:23:53,252 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 03:23:53,252 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 [2018-11-23 03:23:53,252 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 03:23:53,252 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 03:23:53,252 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 03:23:53,252 INFO L133 SettingsManager]: * Use separate solver for trace checks=false [2018-11-23 03:23:53,252 INFO L133 SettingsManager]: * Trace refinement strategy=WALRUS [2018-11-23 03:23:53,253 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 03:23:53,253 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-23 03:23:53,253 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-23 03:23:53,253 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 03:23:53,253 INFO L133 SettingsManager]: * To the following directory=dump/ Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_5868046e-448a-457a-b1ef-2b2df03b21ce/bin-2019/ukojak Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Kojak Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> b000bec9d2bd1ef2193cecc6d4f1bb42d6cbc181 [2018-11-23 03:23:53,289 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 03:23:53,300 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 03:23:53,303 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 03:23:53,304 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 03:23:53,304 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 03:23:53,305 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_5868046e-448a-457a-b1ef-2b2df03b21ce/bin-2019/ukojak/../../sv-benchmarks/c/ldv-linux-3.7.3/linux-3.10-rc1-43_1a-bitvector-drivers--atm--he.ko-ldv_main0_true-unreach-call.cil.out.c [2018-11-23 03:23:53,353 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_5868046e-448a-457a-b1ef-2b2df03b21ce/bin-2019/ukojak/data/df6d62e34/6ee187cfa1a340838033cdba419d11e0/FLAGea9ce7b30 [2018-11-23 03:23:53,901 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 03:23:53,902 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_5868046e-448a-457a-b1ef-2b2df03b21ce/sv-benchmarks/c/ldv-linux-3.7.3/linux-3.10-rc1-43_1a-bitvector-drivers--atm--he.ko-ldv_main0_true-unreach-call.cil.out.c [2018-11-23 03:23:53,934 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_5868046e-448a-457a-b1ef-2b2df03b21ce/bin-2019/ukojak/data/df6d62e34/6ee187cfa1a340838033cdba419d11e0/FLAGea9ce7b30 [2018-11-23 03:23:54,122 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_5868046e-448a-457a-b1ef-2b2df03b21ce/bin-2019/ukojak/data/df6d62e34/6ee187cfa1a340838033cdba419d11e0 [2018-11-23 03:23:54,125 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 03:23:54,126 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 03:23:54,127 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 03:23:54,127 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 03:23:54,130 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 03:23:54,131 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 03:23:54" (1/1) ... [2018-11-23 03:23:54,133 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1b592943 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:23:54, skipping insertion in model container [2018-11-23 03:23:54,134 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 03:23:54" (1/1) ... [2018-11-23 03:23:54,143 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 03:23:54,245 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 03:23:55,888 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 03:23:55,910 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 03:23:56,280 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 03:23:56,496 INFO L195 MainTranslator]: Completed translation [2018-11-23 03:23:56,497 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:23:56 WrapperNode [2018-11-23 03:23:56,497 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 03:23:56,497 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 03:23:56,498 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 03:23:56,498 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 03:23:56,503 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:23:56" (1/1) ... [2018-11-23 03:23:56,554 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:23:56" (1/1) ... [2018-11-23 03:23:56,645 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 03:23:56,645 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 03:23:56,645 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 03:23:56,645 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 03:23:56,654 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:23:56" (1/1) ... [2018-11-23 03:23:56,654 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:23:56" (1/1) ... [2018-11-23 03:23:56,669 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:23:56" (1/1) ... [2018-11-23 03:23:56,670 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:23:56" (1/1) ... [2018-11-23 03:23:56,733 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:23:56" (1/1) ... [2018-11-23 03:23:56,747 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:23:56" (1/1) ... [2018-11-23 03:23:56,763 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:23:56" (1/1) ... [2018-11-23 03:23:56,780 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 03:23:56,781 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 03:23:56,781 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 03:23:56,781 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 03:23:56,782 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:23:56" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5868046e-448a-457a-b1ef-2b2df03b21ce/bin-2019/ukojak/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 [2018-11-23 03:23:56,827 INFO L130 BoogieDeclarations]: Found specification of procedure he_remove_one [2018-11-23 03:23:56,828 INFO L138 BoogieDeclarations]: Found implementation of procedure he_remove_one [2018-11-23 03:23:56,828 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE1 [2018-11-23 03:23:56,828 INFO L130 BoogieDeclarations]: Found specification of procedure msleep [2018-11-23 03:23:56,828 INFO L130 BoogieDeclarations]: Found specification of procedure remove_wait_queue [2018-11-23 03:23:56,828 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE8 [2018-11-23 03:23:56,828 INFO L130 BoogieDeclarations]: Found specification of procedure pci_bus_write_config_dword [2018-11-23 03:23:56,828 INFO L130 BoogieDeclarations]: Found specification of procedure pci_unregister_driver [2018-11-23 03:23:56,829 INFO L130 BoogieDeclarations]: Found specification of procedure __xchg_wrong_size [2018-11-23 03:23:56,829 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-23 03:23:56,829 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE2 [2018-11-23 03:23:56,829 INFO L130 BoogieDeclarations]: Found specification of procedure he_close [2018-11-23 03:23:56,829 INFO L138 BoogieDeclarations]: Found implementation of procedure he_close [2018-11-23 03:23:56,829 INFO L130 BoogieDeclarations]: Found specification of procedure dma_pool_alloc [2018-11-23 03:23:56,830 INFO L130 BoogieDeclarations]: Found specification of procedure get_current [2018-11-23 03:23:56,830 INFO L138 BoogieDeclarations]: Found implementation of procedure get_current [2018-11-23 03:23:56,830 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_lock [2018-11-23 03:23:56,830 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_lock [2018-11-23 03:23:56,830 INFO L130 BoogieDeclarations]: Found specification of procedure he_phy_get [2018-11-23 03:23:56,831 INFO L138 BoogieDeclarations]: Found implementation of procedure he_phy_get [2018-11-23 03:23:56,831 INFO L130 BoogieDeclarations]: Found specification of procedure pci_read_config_byte [2018-11-23 03:23:56,831 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_read_config_byte [2018-11-23 03:23:56,831 INFO L130 BoogieDeclarations]: Found specification of procedure pci_read_config_word [2018-11-23 03:23:56,831 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_read_config_word [2018-11-23 03:23:56,831 INFO L130 BoogieDeclarations]: Found specification of procedure ioremap_nocache [2018-11-23 03:23:56,831 INFO L130 BoogieDeclarations]: Found specification of procedure free_irq [2018-11-23 03:23:56,831 INFO L130 BoogieDeclarations]: Found specification of procedure __alloc_tpd [2018-11-23 03:23:56,831 INFO L138 BoogieDeclarations]: Found implementation of procedure __alloc_tpd [2018-11-23 03:23:56,832 INFO L130 BoogieDeclarations]: Found specification of procedure dma_set_mask [2018-11-23 03:23:56,832 INFO L130 BoogieDeclarations]: Found specification of procedure rate_to_atmf [2018-11-23 03:23:56,832 INFO L138 BoogieDeclarations]: Found implementation of procedure rate_to_atmf [2018-11-23 03:23:56,832 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2018-11-23 03:23:56,832 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2018-11-23 03:23:56,832 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~C_UINT~X~$Pointer$~TO~C_INT [2018-11-23 03:23:56,832 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~C_UINT~X~$Pointer$~TO~C_INT [2018-11-23 03:23:56,832 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_return_value [2018-11-23 03:23:56,832 INFO L130 BoogieDeclarations]: Found specification of procedure valid_dma_direction [2018-11-23 03:23:56,833 INFO L138 BoogieDeclarations]: Found implementation of procedure valid_dma_direction [2018-11-23 03:23:56,833 INFO L130 BoogieDeclarations]: Found specification of procedure suni_init [2018-11-23 03:23:56,833 INFO L130 BoogieDeclarations]: Found specification of procedure clear_bit [2018-11-23 03:23:56,833 INFO L138 BoogieDeclarations]: Found implementation of procedure clear_bit [2018-11-23 03:23:56,833 INFO L130 BoogieDeclarations]: Found specification of procedure he_phy_put [2018-11-23 03:23:56,833 INFO L138 BoogieDeclarations]: Found implementation of procedure he_phy_put [2018-11-23 03:23:56,833 INFO L130 BoogieDeclarations]: Found specification of procedure atm_pcr_goal [2018-11-23 03:23:56,833 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-11-23 03:23:56,833 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-11-23 03:23:56,833 INFO L130 BoogieDeclarations]: Found specification of procedure atm_dev_register [2018-11-23 03:23:56,833 INFO L130 BoogieDeclarations]: Found specification of procedure pci_bus_read_config_dword [2018-11-23 03:23:56,833 INFO L130 BoogieDeclarations]: Found specification of procedure pci_alloc_consistent [2018-11-23 03:23:56,833 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_alloc_consistent [2018-11-23 03:23:56,834 INFO L130 BoogieDeclarations]: Found specification of procedure debug_dma_unmap_page [2018-11-23 03:23:56,834 INFO L130 BoogieDeclarations]: Found specification of procedure debug_dma_alloc_coherent [2018-11-23 03:23:56,834 INFO L130 BoogieDeclarations]: Found specification of procedure INIT_LIST_HEAD [2018-11-23 03:23:56,834 INFO L138 BoogieDeclarations]: Found implementation of procedure INIT_LIST_HEAD [2018-11-23 03:23:56,834 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_return_value_probe [2018-11-23 03:23:56,834 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-11-23 03:23:56,834 INFO L130 BoogieDeclarations]: Found specification of procedure dma_pool_create [2018-11-23 03:23:56,834 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_spin_unlock [2018-11-23 03:23:56,834 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_spin_unlock [2018-11-23 03:23:56,835 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irqrestore [2018-11-23 03:23:56,835 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irqrestore [2018-11-23 03:23:56,835 INFO L130 BoogieDeclarations]: Found specification of procedure dma_pool_destroy [2018-11-23 03:23:56,835 INFO L130 BoogieDeclarations]: Found specification of procedure pci_unmap_single [2018-11-23 03:23:56,835 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_unmap_single [2018-11-23 03:23:56,835 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE8 [2018-11-23 03:23:56,835 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE1 [2018-11-23 03:23:56,835 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE2 [2018-11-23 03:23:56,835 INFO L130 BoogieDeclarations]: Found specification of procedure he_readl_internal [2018-11-23 03:23:56,835 INFO L138 BoogieDeclarations]: Found implementation of procedure he_readl_internal [2018-11-23 03:23:56,836 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 03:23:56,836 INFO L130 BoogieDeclarations]: Found specification of procedure dev_set_drvdata [2018-11-23 03:23:56,836 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-23 03:23:56,836 INFO L130 BoogieDeclarations]: Found specification of procedure iounmap [2018-11-23 03:23:56,836 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-11-23 03:23:56,836 INFO L130 BoogieDeclarations]: Found specification of procedure might_fault [2018-11-23 03:23:56,836 INFO L130 BoogieDeclarations]: Found specification of procedure pci_write_config_word [2018-11-23 03:23:56,836 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_write_config_word [2018-11-23 03:23:56,836 INFO L130 BoogieDeclarations]: Found specification of procedure tasklet_init [2018-11-23 03:23:56,836 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1 [2018-11-23 03:23:56,837 INFO L130 BoogieDeclarations]: Found specification of procedure capable [2018-11-23 03:23:56,837 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE4 [2018-11-23 03:23:56,837 INFO L130 BoogieDeclarations]: Found specification of procedure pci_write_config_byte [2018-11-23 03:23:56,837 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_write_config_byte [2018-11-23 03:23:56,837 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE8 [2018-11-23 03:23:56,837 INFO L130 BoogieDeclarations]: Found specification of procedure kmalloc [2018-11-23 03:23:56,837 INFO L138 BoogieDeclarations]: Found implementation of procedure kmalloc [2018-11-23 03:23:56,837 INFO L130 BoogieDeclarations]: Found specification of procedure add_wait_queue [2018-11-23 03:23:56,837 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_handler_precall [2018-11-23 03:23:56,837 INFO L130 BoogieDeclarations]: Found specification of procedure debug_dma_free_coherent [2018-11-23 03:23:56,838 INFO L130 BoogieDeclarations]: Found specification of procedure _copy_from_user [2018-11-23 03:23:56,838 INFO L130 BoogieDeclarations]: Found specification of procedure pci_write_config_dword [2018-11-23 03:23:56,838 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_write_config_dword [2018-11-23 03:23:56,838 INFO L130 BoogieDeclarations]: Found specification of procedure get_dma_ops [2018-11-23 03:23:56,838 INFO L138 BoogieDeclarations]: Found implementation of procedure get_dma_ops [2018-11-23 03:23:56,838 INFO L130 BoogieDeclarations]: Found specification of procedure dev_get_drvdata [2018-11-23 03:23:56,838 INFO L130 BoogieDeclarations]: Found specification of procedure __raw_spin_lock_init [2018-11-23 03:23:56,838 INFO L130 BoogieDeclarations]: Found specification of procedure he_writel_internal [2018-11-23 03:23:56,839 INFO L138 BoogieDeclarations]: Found implementation of procedure he_writel_internal [2018-11-23 03:23:56,839 INFO L130 BoogieDeclarations]: Found specification of procedure he_ioctl [2018-11-23 03:23:56,839 INFO L138 BoogieDeclarations]: Found implementation of procedure he_ioctl [2018-11-23 03:23:56,839 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 03:23:56,839 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize [2018-11-23 03:23:56,839 INFO L130 BoogieDeclarations]: Found specification of procedure he_open [2018-11-23 03:23:56,839 INFO L138 BoogieDeclarations]: Found implementation of procedure he_open [2018-11-23 03:23:56,839 INFO L130 BoogieDeclarations]: Found specification of procedure __phys_addr [2018-11-23 03:23:56,839 INFO L130 BoogieDeclarations]: Found specification of procedure pci_bus_write_config_word [2018-11-23 03:23:56,839 INFO L130 BoogieDeclarations]: Found specification of procedure __tasklet_schedule [2018-11-23 03:23:56,840 INFO L130 BoogieDeclarations]: Found specification of procedure pci_bus_write_config_byte [2018-11-23 03:23:56,840 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~C_INT [2018-11-23 03:23:56,840 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~C_INT [2018-11-23 03:23:56,840 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_alloc_flags [2018-11-23 03:23:56,840 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_alloc_flags [2018-11-23 03:23:56,840 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-11-23 03:23:56,840 INFO L130 BoogieDeclarations]: Found specification of procedure list_add_tail [2018-11-23 03:23:56,840 INFO L138 BoogieDeclarations]: Found implementation of procedure list_add_tail [2018-11-23 03:23:56,840 INFO L130 BoogieDeclarations]: Found specification of procedure pci_free_consistent [2018-11-23 03:23:56,840 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_free_consistent [2018-11-23 03:23:56,841 INFO L130 BoogieDeclarations]: Found specification of procedure pci_disable_device [2018-11-23 03:23:56,841 INFO L130 BoogieDeclarations]: Found specification of procedure skb_pull [2018-11-23 03:23:56,841 INFO L130 BoogieDeclarations]: Found specification of procedure he_stop [2018-11-23 03:23:56,841 INFO L138 BoogieDeclarations]: Found implementation of procedure he_stop [2018-11-23 03:23:56,841 INFO L130 BoogieDeclarations]: Found specification of procedure pci_set_drvdata [2018-11-23 03:23:56,841 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_set_drvdata [2018-11-23 03:23:56,841 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__builtin_expect [2018-11-23 03:23:56,841 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__builtin_expect [2018-11-23 03:23:56,841 INFO L130 BoogieDeclarations]: Found specification of procedure dev_kfree_skb_any [2018-11-23 03:23:56,841 INFO L130 BoogieDeclarations]: Found specification of procedure __enqueue_tpd [2018-11-23 03:23:56,842 INFO L138 BoogieDeclarations]: Found implementation of procedure __enqueue_tpd [2018-11-23 03:23:56,842 INFO L130 BoogieDeclarations]: Found specification of procedure __list_add [2018-11-23 03:23:56,842 INFO L130 BoogieDeclarations]: Found specification of procedure atomic_inc [2018-11-23 03:23:56,842 INFO L138 BoogieDeclarations]: Found implementation of procedure atomic_inc [2018-11-23 03:23:56,842 INFO L130 BoogieDeclarations]: Found specification of procedure pci_enable_device [2018-11-23 03:23:56,842 INFO L130 BoogieDeclarations]: Found specification of procedure __const_udelay [2018-11-23 03:23:56,842 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-11-23 03:23:56,843 INFO L130 BoogieDeclarations]: Found specification of procedure pci_read_config_dword [2018-11-23 03:23:56,843 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_read_config_dword [2018-11-23 03:23:56,843 INFO L130 BoogieDeclarations]: Found specification of procedure __bad_percpu_size [2018-11-23 03:23:56,843 INFO L130 BoogieDeclarations]: Found specification of procedure _copy_to_user [2018-11-23 03:23:56,843 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_unlock_irqrestore [2018-11-23 03:23:56,843 INFO L130 BoogieDeclarations]: Found specification of procedure list_add [2018-11-23 03:23:56,843 INFO L138 BoogieDeclarations]: Found implementation of procedure list_add [2018-11-23 03:23:56,844 INFO L130 BoogieDeclarations]: Found specification of procedure atm_dev_deregister [2018-11-23 03:23:56,844 INFO L130 BoogieDeclarations]: Found specification of procedure debug_dma_map_page [2018-11-23 03:23:56,844 INFO L130 BoogieDeclarations]: Found specification of procedure warn_slowpath_null [2018-11-23 03:23:56,844 INFO L130 BoogieDeclarations]: Found specification of procedure __pci_register_driver [2018-11-23 03:23:56,844 INFO L130 BoogieDeclarations]: Found specification of procedure read_prom_byte [2018-11-23 03:23:56,844 INFO L138 BoogieDeclarations]: Found implementation of procedure read_prom_byte [2018-11-23 03:23:56,844 INFO L130 BoogieDeclarations]: Found specification of procedure readl [2018-11-23 03:23:56,844 INFO L138 BoogieDeclarations]: Found implementation of procedure readl [2018-11-23 03:23:56,845 INFO L130 BoogieDeclarations]: Found specification of procedure __init_waitqueue_head [2018-11-23 03:23:56,845 INFO L130 BoogieDeclarations]: Found specification of procedure writel [2018-11-23 03:23:56,845 INFO L138 BoogieDeclarations]: Found implementation of procedure writel [2018-11-23 03:23:56,845 INFO L130 BoogieDeclarations]: Found specification of procedure set_bit [2018-11-23 03:23:56,845 INFO L138 BoogieDeclarations]: Found implementation of procedure set_bit [2018-11-23 03:23:56,845 INFO L130 BoogieDeclarations]: Found specification of procedure schedule_timeout [2018-11-23 03:23:56,845 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~$Pointer$~TO~VOID [2018-11-23 03:23:56,845 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~$Pointer$~TO~VOID [2018-11-23 03:23:56,845 INFO L130 BoogieDeclarations]: Found specification of procedure pci_bus_read_config_byte [2018-11-23 03:23:56,846 INFO L130 BoogieDeclarations]: Found specification of procedure pci_bus_read_config_word [2018-11-23 03:23:56,846 INFO L130 BoogieDeclarations]: Found specification of procedure request_threaded_irq [2018-11-23 03:23:56,846 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_final_state [2018-11-23 03:23:56,846 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 03:23:56,846 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 03:23:56,846 INFO L130 BoogieDeclarations]: Found specification of procedure dma_pool_free [2018-11-23 03:27:52,957 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 03:27:52,957 INFO L280 CfgBuilder]: Removed 116 assue(true) statements. [2018-11-23 03:27:52,958 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:27:52 BoogieIcfgContainer [2018-11-23 03:27:52,958 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 03:27:52,958 INFO L113 PluginConnector]: ------------------------CodeCheck---------------------------- [2018-11-23 03:27:52,958 INFO L271 PluginConnector]: Initializing CodeCheck... [2018-11-23 03:27:52,966 INFO L276 PluginConnector]: CodeCheck initialized [2018-11-23 03:27:52,966 INFO L185 PluginConnector]: Executing the observer CodeCheckObserver from plugin CodeCheck for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:27:52" (1/1) ... [2018-11-23 03:27:52,974 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 03:27:53,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 03:27:53,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1674 states to 1108 states and 1674 transitions. [2018-11-23 03:27:53,025 INFO L276 IsEmpty]: Start isEmpty. Operand 1108 states and 1674 transitions. [2018-11-23 03:27:53,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-11-23 03:27:53,029 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 03:27:53,065 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck has thrown an exception: java.lang.IllegalArgumentException: Indexed Sort BitVec undefined at de.uni_freiburg.informatik.ultimate.logic.SortSymbol.checkArity(SortSymbol.java:153) at de.uni_freiburg.informatik.ultimate.logic.SortSymbol.getSort(SortSymbol.java:177) at de.uni_freiburg.informatik.ultimate.logic.Theory.getSort(Theory.java:1243) at de.uni_freiburg.informatik.ultimate.logic.NoopScript.sort(NoopScript.java:287) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.TermTransferrer.transferSort(TermTransferrer.java:128) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.TermTransferrer.convertApplicationTerm(TermTransferrer.java:162) at de.uni_freiburg.informatik.ultimate.logic.TermTransformer$BuildApplicationTerm.walk(TermTransformer.java:320) at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:122) at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:113) at de.uni_freiburg.informatik.ultimate.logic.TermTransformer.transform(TermTransformer.java:253) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.cfg.SmtSymbols.transferSymbols(SmtSymbols.java:129) at de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck.CodeCheckObserver.process(CodeCheckObserver.java:449) at de.uni_freiburg.informatik.ultimate.core.coreplugin.modelwalker.CFGWalker.runObserver(CFGWalker.java:57) at de.uni_freiburg.informatik.ultimate.core.coreplugin.modelwalker.BaseWalker.runObserver(BaseWalker.java:93) at de.uni_freiburg.informatik.ultimate.core.coreplugin.modelwalker.BaseWalker.run(BaseWalker.java:86) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:316) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-11-23 03:27:53,068 INFO L168 Benchmark]: Toolchain (without parser) took 238942.30 ms. Allocated memory was 1.0 GB in the beginning and 1.4 GB in the end (delta: 370.1 MB). Free memory was 934.3 MB in the beginning and 1.1 GB in the end (delta: -204.9 MB). Peak memory consumption was 165.2 MB. Max. memory is 11.5 GB. [2018-11-23 03:27:53,070 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 03:27:53,070 INFO L168 Benchmark]: CACSL2BoogieTranslator took 2369.98 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 169.3 MB). Free memory was 934.3 MB in the beginning and 940.8 MB in the end (delta: -6.4 MB). Peak memory consumption was 190.3 MB. Max. memory is 11.5 GB. [2018-11-23 03:27:53,071 INFO L168 Benchmark]: Boogie Procedure Inliner took 147.30 ms. Allocated memory is still 1.2 GB. Free memory was 940.8 MB in the beginning and 918.5 MB in the end (delta: 22.3 MB). Peak memory consumption was 22.3 MB. Max. memory is 11.5 GB. [2018-11-23 03:27:53,071 INFO L168 Benchmark]: Boogie Preprocessor took 135.59 ms. Allocated memory is still 1.2 GB. Free memory was 918.5 MB in the beginning and 885.1 MB in the end (delta: 33.4 MB). Peak memory consumption was 33.4 MB. Max. memory is 11.5 GB. [2018-11-23 03:27:53,072 INFO L168 Benchmark]: RCFGBuilder took 236177.06 ms. Allocated memory was 1.2 GB in the beginning and 1.4 GB in the end (delta: 200.8 MB). Free memory was 885.1 MB in the beginning and 1.2 GB in the end (delta: -273.6 MB). Peak memory consumption was 311.2 MB. Max. memory is 11.5 GB. [2018-11-23 03:27:53,073 INFO L168 Benchmark]: CodeCheck took 109.12 ms. Allocated memory is still 1.4 GB. Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 19.4 MB). Peak memory consumption was 19.4 MB. Max. memory is 11.5 GB. [2018-11-23 03:27:53,078 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck: - ExceptionOrErrorResult: IllegalArgumentException: Indexed Sort BitVec undefined de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck: IllegalArgumentException: Indexed Sort BitVec undefined: de.uni_freiburg.informatik.ultimate.logic.SortSymbol.checkArity(SortSymbol.java:153) * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 2369.98 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 169.3 MB). Free memory was 934.3 MB in the beginning and 940.8 MB in the end (delta: -6.4 MB). Peak memory consumption was 190.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 147.30 ms. Allocated memory is still 1.2 GB. Free memory was 940.8 MB in the beginning and 918.5 MB in the end (delta: 22.3 MB). Peak memory consumption was 22.3 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 135.59 ms. Allocated memory is still 1.2 GB. Free memory was 918.5 MB in the beginning and 885.1 MB in the end (delta: 33.4 MB). Peak memory consumption was 33.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 236177.06 ms. Allocated memory was 1.2 GB in the beginning and 1.4 GB in the end (delta: 200.8 MB). Free memory was 885.1 MB in the beginning and 1.2 GB in the end (delta: -273.6 MB). Peak memory consumption was 311.2 MB. Max. memory is 11.5 GB. * CodeCheck took 109.12 ms. Allocated memory is still 1.4 GB. Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 19.4 MB). Peak memory consumption was 19.4 MB. Max. memory is 11.5 GB. RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request...