./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/ldv-linux-4.2-rc1/linux-4.2-rc1.tar.xz-08_1a-drivers--iio--trigger--iio-trig-interrupt.ko-entry_point_false-unreach-call.cil.out.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version aa418289 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_61e1e425-8a20-42d1-b0ad-5933b00438de/bin-2019/ukojak/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_61e1e425-8a20-42d1-b0ad-5933b00438de/bin-2019/ukojak/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_61e1e425-8a20-42d1-b0ad-5933b00438de/bin-2019/ukojak/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_61e1e425-8a20-42d1-b0ad-5933b00438de/bin-2019/ukojak/config/KojakReach.xml -i ../../sv-benchmarks/c/ldv-linux-4.2-rc1/linux-4.2-rc1.tar.xz-08_1a-drivers--iio--trigger--iio-trig-interrupt.ko-entry_point_false-unreach-call.cil.out.c -s /tmp/vcloud-vcloud-master/worker/working_dir_61e1e425-8a20-42d1-b0ad-5933b00438de/bin-2019/ukojak/config/svcomp-Reach-64bit-Kojak_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_61e1e425-8a20-42d1-b0ad-5933b00438de/bin-2019/ukojak --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Kojak --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 7bd51965801d54a8df6708663b3231e8bf30dd75 ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_61e1e425-8a20-42d1-b0ad-5933b00438de/bin-2019/ukojak/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_61e1e425-8a20-42d1-b0ad-5933b00438de/bin-2019/ukojak/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_61e1e425-8a20-42d1-b0ad-5933b00438de/bin-2019/ukojak/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_61e1e425-8a20-42d1-b0ad-5933b00438de/bin-2019/ukojak/config/KojakReach.xml -i ../../sv-benchmarks/c/ldv-linux-4.2-rc1/linux-4.2-rc1.tar.xz-08_1a-drivers--iio--trigger--iio-trig-interrupt.ko-entry_point_false-unreach-call.cil.out.c -s /tmp/vcloud-vcloud-master/worker/working_dir_61e1e425-8a20-42d1-b0ad-5933b00438de/bin-2019/ukojak/config/svcomp-Reach-64bit-Kojak_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_61e1e425-8a20-42d1-b0ad-5933b00438de/bin-2019/ukojak --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Kojak --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 7bd51965801d54a8df6708663b3231e8bf30dd75 ...................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: IllegalArgumentException: Indexed Sort BitVec undefined --- Real Ultimate output --- This is Ultimate 0.1.23-aa41828 [2018-11-23 09:39:04,396 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 09:39:04,397 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 09:39:04,408 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 09:39:04,408 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 09:39:04,409 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 09:39:04,410 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 09:39:04,411 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 09:39:04,413 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 09:39:04,413 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 09:39:04,414 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 09:39:04,414 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 09:39:04,415 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 09:39:04,416 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 09:39:04,417 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 09:39:04,417 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 09:39:04,418 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 09:39:04,419 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 09:39:04,420 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 09:39:04,421 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 09:39:04,422 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 09:39:04,423 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 09:39:04,424 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 09:39:04,424 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 09:39:04,424 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 09:39:04,425 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 09:39:04,425 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 09:39:04,426 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 09:39:04,426 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 09:39:04,427 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 09:39:04,427 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 09:39:04,428 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 09:39:04,428 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 09:39:04,428 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 09:39:04,429 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 09:39:04,429 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 09:39:04,430 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_61e1e425-8a20-42d1-b0ad-5933b00438de/bin-2019/ukojak/config/svcomp-Reach-64bit-Kojak_Default.epf [2018-11-23 09:39:04,440 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 09:39:04,441 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 09:39:04,441 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 09:39:04,442 INFO L133 SettingsManager]: * ... to procedures called more than once=ALWAYS [2018-11-23 09:39:04,442 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 09:39:04,442 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 09:39:04,443 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 09:39:04,443 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-23 09:39:04,443 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 09:39:04,443 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 09:39:04,443 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 09:39:04,443 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 09:39:04,444 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 09:39:04,444 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 09:39:04,444 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 09:39:04,444 INFO L131 SettingsManager]: Preferences of CodeCheck differ from their defaults: [2018-11-23 09:39:04,444 INFO L133 SettingsManager]: * Timeout in seconds=1000000 [2018-11-23 09:39:04,444 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 09:39:04,445 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 09:39:04,445 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 [2018-11-23 09:39:04,445 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 09:39:04,445 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 09:39:04,445 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 09:39:04,446 INFO L133 SettingsManager]: * Trace refinement strategy=PENGUIN [2018-11-23 09:39:04,446 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 09:39:04,446 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-23 09:39:04,446 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 09:39:04,446 INFO L133 SettingsManager]: * To the following directory=dump/ Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_61e1e425-8a20-42d1-b0ad-5933b00438de/bin-2019/ukojak Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Kojak Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 7bd51965801d54a8df6708663b3231e8bf30dd75 [2018-11-23 09:39:04,476 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 09:39:04,487 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 09:39:04,490 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 09:39:04,492 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 09:39:04,492 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 09:39:04,493 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_61e1e425-8a20-42d1-b0ad-5933b00438de/bin-2019/ukojak/../../sv-benchmarks/c/ldv-linux-4.2-rc1/linux-4.2-rc1.tar.xz-08_1a-drivers--iio--trigger--iio-trig-interrupt.ko-entry_point_false-unreach-call.cil.out.c [2018-11-23 09:39:04,554 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_61e1e425-8a20-42d1-b0ad-5933b00438de/bin-2019/ukojak/data/651395729/8eff01d68e44463ab47242bf8f7ca872/FLAG406455519 [2018-11-23 09:39:05,028 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 09:39:05,028 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_61e1e425-8a20-42d1-b0ad-5933b00438de/sv-benchmarks/c/ldv-linux-4.2-rc1/linux-4.2-rc1.tar.xz-08_1a-drivers--iio--trigger--iio-trig-interrupt.ko-entry_point_false-unreach-call.cil.out.c [2018-11-23 09:39:05,050 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_61e1e425-8a20-42d1-b0ad-5933b00438de/bin-2019/ukojak/data/651395729/8eff01d68e44463ab47242bf8f7ca872/FLAG406455519 [2018-11-23 09:39:05,517 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_61e1e425-8a20-42d1-b0ad-5933b00438de/bin-2019/ukojak/data/651395729/8eff01d68e44463ab47242bf8f7ca872 [2018-11-23 09:39:05,520 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 09:39:05,521 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 09:39:05,522 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 09:39:05,522 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 09:39:05,526 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 09:39:05,526 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 09:39:05" (1/1) ... [2018-11-23 09:39:05,529 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@79859daf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:39:05, skipping insertion in model container [2018-11-23 09:39:05,529 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 09:39:05" (1/1) ... [2018-11-23 09:39:05,536 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 09:39:05,595 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 09:39:06,178 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 09:39:06,193 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 09:39:06,289 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 09:39:06,318 INFO L195 MainTranslator]: Completed translation [2018-11-23 09:39:06,318 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:39:06 WrapperNode [2018-11-23 09:39:06,318 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 09:39:06,319 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 09:39:06,319 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 09:39:06,319 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 09:39:06,326 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:39:06" (1/1) ... [2018-11-23 09:39:06,346 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:39:06" (1/1) ... [2018-11-23 09:39:06,378 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 09:39:06,378 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 09:39:06,378 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 09:39:06,378 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 09:39:06,387 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:39:06" (1/1) ... [2018-11-23 09:39:06,387 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:39:06" (1/1) ... [2018-11-23 09:39:06,395 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:39:06" (1/1) ... [2018-11-23 09:39:06,395 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:39:06" (1/1) ... [2018-11-23 09:39:06,412 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:39:06" (1/1) ... [2018-11-23 09:39:06,416 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:39:06" (1/1) ... [2018-11-23 09:39:06,420 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:39:06" (1/1) ... [2018-11-23 09:39:06,426 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 09:39:06,426 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 09:39:06,426 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 09:39:06,427 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 09:39:06,428 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:39:06" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_61e1e425-8a20-42d1-b0ad-5933b00438de/bin-2019/ukojak/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 [2018-11-23 09:39:06,496 INFO L130 BoogieDeclarations]: Found specification of procedure iio_trigger_unregister [2018-11-23 09:39:06,496 INFO L130 BoogieDeclarations]: Found specification of procedure dev_get_drvdata [2018-11-23 09:39:06,496 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_get_drvdata [2018-11-23 09:39:06,496 INFO L130 BoogieDeclarations]: Found specification of procedure iio_interrupt_trigger_probe [2018-11-23 09:39:06,496 INFO L138 BoogieDeclarations]: Found implementation of procedure iio_interrupt_trigger_probe [2018-11-23 09:39:06,497 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-11-23 09:39:06,497 INFO L130 BoogieDeclarations]: Found specification of procedure platform_driver_unregister [2018-11-23 09:39:06,497 INFO L130 BoogieDeclarations]: Found specification of procedure iio_trigger_register [2018-11-23 09:39:06,497 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_irq_1 [2018-11-23 09:39:06,497 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_irq_1 [2018-11-23 09:39:06,497 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 09:39:06,498 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2018-11-23 09:39:06,498 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2018-11-23 09:39:06,498 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize [2018-11-23 09:39:06,498 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-11-23 09:39:06,498 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-11-23 09:39:06,499 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-11-23 09:39:06,500 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-11-23 09:39:06,500 INFO L130 BoogieDeclarations]: Found specification of procedure iio_trigger_put [2018-11-23 09:39:06,500 INFO L138 BoogieDeclarations]: Found implementation of procedure iio_trigger_put [2018-11-23 09:39:06,500 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_module_put [2018-11-23 09:39:06,500 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_module_put [2018-11-23 09:39:06,500 INFO L130 BoogieDeclarations]: Found specification of procedure platform_get_resource [2018-11-23 09:39:06,500 INFO L130 BoogieDeclarations]: Found specification of procedure dev_set_drvdata [2018-11-23 09:39:06,501 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_set_drvdata [2018-11-23 09:39:06,501 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-11-23 09:39:06,501 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-11-23 09:39:06,501 INFO L130 BoogieDeclarations]: Found specification of procedure free_irq [2018-11-23 09:39:06,501 INFO L130 BoogieDeclarations]: Found specification of procedure put_device [2018-11-23 09:39:06,501 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-23 09:39:06,501 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2018-11-23 09:39:06,501 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2018-11-23 09:39:06,502 INFO L130 BoogieDeclarations]: Found specification of procedure disable_suitable_irq_1 [2018-11-23 09:39:06,502 INFO L138 BoogieDeclarations]: Found implementation of procedure disable_suitable_irq_1 [2018-11-23 09:39:06,502 INFO L130 BoogieDeclarations]: Found specification of procedure __platform_driver_register [2018-11-23 09:39:06,502 INFO L130 BoogieDeclarations]: Found specification of procedure iio_trigger_poll [2018-11-23 09:39:06,502 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2018-11-23 09:39:06,502 INFO L130 BoogieDeclarations]: Found specification of procedure request_threaded_irq [2018-11-23 09:39:06,502 INFO L130 BoogieDeclarations]: Found specification of procedure iio_interrupt_trigger_remove [2018-11-23 09:39:06,502 INFO L138 BoogieDeclarations]: Found implementation of procedure iio_interrupt_trigger_remove [2018-11-23 09:39:06,503 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 09:39:06,503 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 09:39:07,641 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 09:39:07,641 INFO L280 CfgBuilder]: Removed 52 assue(true) statements. [2018-11-23 09:39:07,641 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 09:39:07 BoogieIcfgContainer [2018-11-23 09:39:07,642 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 09:39:07,642 INFO L113 PluginConnector]: ------------------------CodeCheck---------------------------- [2018-11-23 09:39:07,642 INFO L271 PluginConnector]: Initializing CodeCheck... [2018-11-23 09:39:07,651 INFO L276 PluginConnector]: CodeCheck initialized [2018-11-23 09:39:07,651 INFO L185 PluginConnector]: Executing the observer CodeCheckObserver from plugin CodeCheck for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 09:39:07" (1/1) ... [2018-11-23 09:39:07,661 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 09:39:07,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:07,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 113 states and 157 transitions. [2018-11-23 09:39:07,701 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 157 transitions. [2018-11-23 09:39:07,707 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2018-11-23 09:39:07,707 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:07,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:07,917 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 09:39:07,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:07,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 118 states and 178 transitions. [2018-11-23 09:39:07,987 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 178 transitions. [2018-11-23 09:39:07,989 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-11-23 09:39:07,990 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:08,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:08,078 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 09:39:08,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:08,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 198 states to 121 states and 198 transitions. [2018-11-23 09:39:08,156 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 198 transitions. [2018-11-23 09:39:08,158 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-11-23 09:39:08,158 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:08,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:08,214 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-23 09:39:08,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:08,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201 states to 123 states and 201 transitions. [2018-11-23 09:39:08,223 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 201 transitions. [2018-11-23 09:39:08,225 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-23 09:39:08,225 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:08,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:08,313 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 09:39:08,543 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:08,545 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237 states to 134 states and 237 transitions. [2018-11-23 09:39:08,545 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 237 transitions. [2018-11-23 09:39:08,547 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-23 09:39:08,547 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:08,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:08,614 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 09:39:08,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:08,639 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 232 states to 133 states and 232 transitions. [2018-11-23 09:39:08,639 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 232 transitions. [2018-11-23 09:39:08,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-11-23 09:39:08,640 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:08,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:08,700 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 09:39:09,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:09,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 254 states to 138 states and 254 transitions. [2018-11-23 09:39:09,038 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 254 transitions. [2018-11-23 09:39:09,039 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-11-23 09:39:09,040 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:09,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:09,073 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 09:39:09,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:09,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 256 states to 140 states and 256 transitions. [2018-11-23 09:39:09,131 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 256 transitions. [2018-11-23 09:39:09,132 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-11-23 09:39:09,132 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:09,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:09,161 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-23 09:39:09,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:09,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 261 states to 143 states and 261 transitions. [2018-11-23 09:39:09,327 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 261 transitions. [2018-11-23 09:39:09,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-11-23 09:39:09,328 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:09,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:09,382 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 09:39:09,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:09,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 255 states to 142 states and 255 transitions. [2018-11-23 09:39:09,428 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 255 transitions. [2018-11-23 09:39:09,429 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-11-23 09:39:09,430 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:09,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:09,499 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 09:39:09,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:09,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 249 states to 141 states and 249 transitions. [2018-11-23 09:39:09,546 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 249 transitions. [2018-11-23 09:39:09,547 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-11-23 09:39:09,547 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:09,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:09,573 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-23 09:39:09,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:09,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 254 states to 144 states and 254 transitions. [2018-11-23 09:39:09,652 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 254 transitions. [2018-11-23 09:39:09,653 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-11-23 09:39:09,653 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:09,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:09,681 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-23 09:39:09,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:09,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 260 states to 148 states and 260 transitions. [2018-11-23 09:39:09,747 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 260 transitions. [2018-11-23 09:39:09,748 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-11-23 09:39:09,748 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:09,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:09,785 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-23 09:39:09,863 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:09,864 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 262 states to 150 states and 262 transitions. [2018-11-23 09:39:09,865 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 262 transitions. [2018-11-23 09:39:09,867 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-11-23 09:39:09,867 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:09,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:09,896 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-23 09:39:09,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:09,920 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 266 states to 153 states and 266 transitions. [2018-11-23 09:39:09,920 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 266 transitions. [2018-11-23 09:39:09,921 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-11-23 09:39:09,921 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:09,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:09,957 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-23 09:39:10,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:10,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 287 states to 159 states and 287 transitions. [2018-11-23 09:39:10,039 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 287 transitions. [2018-11-23 09:39:10,039 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-11-23 09:39:10,040 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:10,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:10,073 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-23 09:39:10,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:10,086 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 287 states to 160 states and 287 transitions. [2018-11-23 09:39:10,086 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 287 transitions. [2018-11-23 09:39:10,087 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-11-23 09:39:10,087 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:10,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:10,115 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-23 09:39:10,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:10,126 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 291 states to 163 states and 291 transitions. [2018-11-23 09:39:10,126 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 291 transitions. [2018-11-23 09:39:10,127 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-11-23 09:39:10,127 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:10,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:10,186 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 09:39:10,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:10,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 312 states to 166 states and 310 transitions. [2018-11-23 09:39:10,514 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 310 transitions. [2018-11-23 09:39:10,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-11-23 09:39:10,515 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:10,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:10,539 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-23 09:39:10,549 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:10,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 316 states to 169 states and 314 transitions. [2018-11-23 09:39:10,550 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 314 transitions. [2018-11-23 09:39:10,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-11-23 09:39:10,551 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:10,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:10,569 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-23 09:39:10,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:10,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 319 states to 172 states and 317 transitions. [2018-11-23 09:39:10,584 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 317 transitions. [2018-11-23 09:39:10,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-11-23 09:39:10,585 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:10,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:10,602 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 09:39:10,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:10,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 320 states to 172 states and 316 transitions. [2018-11-23 09:39:10,624 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 316 transitions. [2018-11-23 09:39:10,624 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-11-23 09:39:10,624 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:10,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:10,651 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-23 09:39:10,877 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:10,878 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 343 states to 179 states and 339 transitions. [2018-11-23 09:39:10,878 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 339 transitions. [2018-11-23 09:39:10,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-11-23 09:39:10,879 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:10,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:10,904 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-23 09:39:11,150 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:11,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 362 states to 185 states and 358 transitions. [2018-11-23 09:39:11,151 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 358 transitions. [2018-11-23 09:39:11,152 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-11-23 09:39:11,152 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:11,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:11,168 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 09:39:11,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:11,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 363 states to 185 states and 357 transitions. [2018-11-23 09:39:11,180 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 357 transitions. [2018-11-23 09:39:11,181 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-11-23 09:39:11,181 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:11,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:11,199 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 09:39:11,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:11,216 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 364 states to 185 states and 356 transitions. [2018-11-23 09:39:11,216 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 356 transitions. [2018-11-23 09:39:11,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-11-23 09:39:11,217 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:11,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:11,241 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-23 09:39:11,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:11,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 368 states to 188 states and 360 transitions. [2018-11-23 09:39:11,264 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 360 transitions. [2018-11-23 09:39:11,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-11-23 09:39:11,266 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:11,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:11,290 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 09:39:11,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:11,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 193 states and 380 transitions. [2018-11-23 09:39:11,799 INFO L276 IsEmpty]: Start isEmpty. Operand 193 states and 380 transitions. [2018-11-23 09:39:11,800 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-11-23 09:39:11,800 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:11,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:11,829 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-23 09:39:12,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:12,047 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 400 states to 197 states and 387 transitions. [2018-11-23 09:39:12,047 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 387 transitions. [2018-11-23 09:39:12,048 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-11-23 09:39:12,048 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:12,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:12,073 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-23 09:39:12,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:12,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 412 states to 199 states and 399 transitions. [2018-11-23 09:39:12,250 INFO L276 IsEmpty]: Start isEmpty. Operand 199 states and 399 transitions. [2018-11-23 09:39:12,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-23 09:39:12,251 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:12,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:12,284 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-23 09:39:12,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:12,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 416 states to 202 states and 403 transitions. [2018-11-23 09:39:12,301 INFO L276 IsEmpty]: Start isEmpty. Operand 202 states and 403 transitions. [2018-11-23 09:39:12,302 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-23 09:39:12,302 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:12,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:12,325 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-23 09:39:12,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:12,571 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 421 states to 205 states and 408 transitions. [2018-11-23 09:39:12,571 INFO L276 IsEmpty]: Start isEmpty. Operand 205 states and 408 transitions. [2018-11-23 09:39:12,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-23 09:39:12,572 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:12,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:12,605 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-23 09:39:12,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:12,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 425 states to 208 states and 412 transitions. [2018-11-23 09:39:12,624 INFO L276 IsEmpty]: Start isEmpty. Operand 208 states and 412 transitions. [2018-11-23 09:39:12,625 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-23 09:39:12,626 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:12,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:12,648 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-23 09:39:12,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:12,666 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 429 states to 211 states and 416 transitions. [2018-11-23 09:39:12,666 INFO L276 IsEmpty]: Start isEmpty. Operand 211 states and 416 transitions. [2018-11-23 09:39:12,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-23 09:39:12,667 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:12,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:12,749 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 09:39:13,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:13,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 458 states to 218 states and 440 transitions. [2018-11-23 09:39:13,351 INFO L276 IsEmpty]: Start isEmpty. Operand 218 states and 440 transitions. [2018-11-23 09:39:13,352 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-23 09:39:13,352 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:13,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:13,381 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 09:39:13,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:13,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 478 states to 223 states and 460 transitions. [2018-11-23 09:39:13,812 INFO L276 IsEmpty]: Start isEmpty. Operand 223 states and 460 transitions. [2018-11-23 09:39:13,813 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-23 09:39:13,813 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:13,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:13,836 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-23 09:39:13,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:13,920 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 483 states to 225 states and 465 transitions. [2018-11-23 09:39:13,920 INFO L276 IsEmpty]: Start isEmpty. Operand 225 states and 465 transitions. [2018-11-23 09:39:13,921 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-23 09:39:13,921 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:13,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:13,935 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-23 09:39:14,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:14,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 489 states to 228 states and 471 transitions. [2018-11-23 09:39:14,041 INFO L276 IsEmpty]: Start isEmpty. Operand 228 states and 471 transitions. [2018-11-23 09:39:14,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-11-23 09:39:14,041 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:14,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 09:39:14,056 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-23 09:39:14,066 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:14,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 493 states to 231 states and 475 transitions. [2018-11-23 09:39:14,067 INFO L276 IsEmpty]: Start isEmpty. Operand 231 states and 475 transitions. [2018-11-23 09:39:14,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-11-23 09:39:14,068 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:14,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 09:39:14,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 09:39:14,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 09:39:14,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 09:39:14,370 WARN L493 CodeCheckObserver]: This program is UNSAFE, Check terminated with 39 iterations. ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];call #t~string52.base, #t~string52.offset := #Ultimate.alloc(10);call #t~string56.base, #t~string56.offset := #Ultimate.alloc(22);call #t~string61.base, #t~string61.offset := #Ultimate.alloc(22);~ldv_irq_1_2~0 := 0;~LDV_IN_INTERRUPT~0 := 1;~ldv_irq_1_3~0 := 0;~ldv_irq_data_1_1~0.base, ~ldv_irq_data_1_1~0.offset := 0, 0;~ldv_irq_1_1~0 := 0;~ldv_irq_1_0~0 := 0;~probed_2~0 := 0;~ldv_irq_line_1_3~0 := 0;~ldv_irq_data_1_0~0.base, ~ldv_irq_data_1_0~0.offset := 0, 0;~ldv_state_variable_0~0 := 0;~ldv_irq_line_1_0~0 := 0;~ldv_state_variable_2~0 := 0;~ldv_irq_data_1_3~0.base, ~ldv_irq_data_1_3~0.offset := 0, 0;~ref_cnt~0 := 0;~ldv_irq_line_1_1~0 := 0;~ldv_irq_data_1_2~0.base, ~ldv_irq_data_1_2~0.offset := 0, 0;~ldv_state_variable_1~0 := 0;~ldv_irq_line_1_2~0 := 0;~ldv_retval_0~0 := 0;~ldv_retval_1~0 := 0;~ldv_retval_2~0 := 0;~ldv_module_refcounter~0 := 1;~iio_interrupt_trigger_driver_group1~0.base, ~iio_interrupt_trigger_driver_group1~0.offset := 0, 0;call ~#iio_interrupt_trigger_ops~0.base, ~#iio_interrupt_trigger_ops~0.offset := #Ultimate.alloc(32);call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#iio_interrupt_trigger_ops~0.base, ~#iio_interrupt_trigger_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_ops~0.base, 8 + ~#iio_interrupt_trigger_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_ops~0.base, 16 + ~#iio_interrupt_trigger_ops~0.offset, 8);call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_ops~0.base, 24 + ~#iio_interrupt_trigger_ops~0.offset, 8);call ~#iio_interrupt_trigger_driver~0.base, ~#iio_interrupt_trigger_driver~0.offset := #Ultimate.alloc(166);call write~init~$Pointer$(#funAddr~iio_interrupt_trigger_probe.base, #funAddr~iio_interrupt_trigger_probe.offset, ~#iio_interrupt_trigger_driver~0.base, ~#iio_interrupt_trigger_driver~0.offset, 8);call write~init~$Pointer$(#funAddr~iio_interrupt_trigger_remove.base, #funAddr~iio_interrupt_trigger_remove.offset, ~#iio_interrupt_trigger_driver~0.base, 8 + ~#iio_interrupt_trigger_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 16 + ~#iio_interrupt_trigger_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 24 + ~#iio_interrupt_trigger_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 32 + ~#iio_interrupt_trigger_driver~0.offset, 8);call write~init~$Pointer$(#t~string61.base, #t~string61.offset, ~#iio_interrupt_trigger_driver~0.base, 40 + ~#iio_interrupt_trigger_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 48 + ~#iio_interrupt_trigger_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 56 + ~#iio_interrupt_trigger_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 64 + ~#iio_interrupt_trigger_driver~0.offset, 8);call write~init~int(0, ~#iio_interrupt_trigger_driver~0.base, 72 + ~#iio_interrupt_trigger_driver~0.offset, 1);call write~init~int(0, ~#iio_interrupt_trigger_driver~0.base, 73 + ~#iio_interrupt_trigger_driver~0.offset, 4);call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 77 + ~#iio_interrupt_trigger_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 85 + ~#iio_interrupt_trigger_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 93 + ~#iio_interrupt_trigger_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 101 + ~#iio_interrupt_trigger_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 109 + ~#iio_interrupt_trigger_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 117 + ~#iio_interrupt_trigger_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 125 + ~#iio_interrupt_trigger_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 133 + ~#iio_interrupt_trigger_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 141 + ~#iio_interrupt_trigger_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 149 + ~#iio_interrupt_trigger_driver~0.offset, 8);call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 157 + ~#iio_interrupt_trigger_driver~0.offset, 8);call write~init~int(0, ~#iio_interrupt_trigger_driver~0.base, 165 + ~#iio_interrupt_trigger_driver~0.offset, 1);havoc main_#res;havoc main_#t~nondet76, main_#t~switch77, main_#t~nondet78, main_#t~switch79, main_#t~ret80, main_#t~nondet81, main_#t~switch82, main_#t~ret83, main_#t~ret84, main_#t~ret85, main_~tmp~17, main_~tmp___0~4, main_~tmp___1~0;havoc main_~tmp~17;havoc main_~tmp___0~4;havoc main_~tmp___1~0;call ldv_initialize();~ldv_state_variable_1~0 := 1;~ref_cnt~0 := 0;~ldv_state_variable_0~0 := 1;~ldv_state_variable_2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [?] assume -2147483648 <= main_#t~nondet76 && main_#t~nondet76 <= 2147483647;main_~tmp~17 := main_#t~nondet76;havoc main_#t~nondet76;main_#t~switch77 := 0 == main_~tmp~17; VAL [ULTIMATE.start_main_~tmp~17=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |ULTIMATE.start_main_#t~switch77|=false, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [?] assume !main_#t~switch77;main_#t~switch77 := main_#t~switch77 || 1 == main_~tmp~17; VAL [ULTIMATE.start_main_~tmp~17=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |ULTIMATE.start_main_#t~switch77|=true, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [?] assume main_#t~switch77; VAL [ULTIMATE.start_main_~tmp~17=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |ULTIMATE.start_main_#t~switch77|=true, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [?] assume 0 != ~ldv_state_variable_0~0;assume -2147483648 <= main_#t~nondet78 && main_#t~nondet78 <= 2147483647;main_~tmp___0~4 := main_#t~nondet78;havoc main_#t~nondet78;main_#t~switch79 := 0 == main_~tmp___0~4; VAL [ULTIMATE.start_main_~tmp___0~4=1, ULTIMATE.start_main_~tmp~17=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |ULTIMATE.start_main_#t~switch77|=true, |ULTIMATE.start_main_#t~switch79|=false, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [?] assume !main_#t~switch79;main_#t~switch79 := main_#t~switch79 || 1 == main_~tmp___0~4; VAL [ULTIMATE.start_main_~tmp___0~4=1, ULTIMATE.start_main_~tmp~17=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |ULTIMATE.start_main_#t~switch77|=true, |ULTIMATE.start_main_#t~switch79|=true, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [?] assume main_#t~switch79; VAL [ULTIMATE.start_main_~tmp___0~4=1, ULTIMATE.start_main_~tmp~17=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |ULTIMATE.start_main_#t~switch77|=true, |ULTIMATE.start_main_#t~switch79|=true, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [?] assume 1 == ~ldv_state_variable_0~0;havoc iio_interrupt_trigger_driver_init_#res;havoc iio_interrupt_trigger_driver_init_#t~ret62, iio_interrupt_trigger_driver_init_~tmp~13;havoc iio_interrupt_trigger_driver_init_~tmp~13;ldv___platform_driver_register_10_#in~ldv_func_arg1.base, ldv___platform_driver_register_10_#in~ldv_func_arg1.offset, ldv___platform_driver_register_10_#in~ldv_func_arg2.base, ldv___platform_driver_register_10_#in~ldv_func_arg2.offset := ~#iio_interrupt_trigger_driver~0.base, ~#iio_interrupt_trigger_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset;havoc ldv___platform_driver_register_10_#res;havoc ldv___platform_driver_register_10_#t~ret88, ldv___platform_driver_register_10_~ldv_func_arg1.base, ldv___platform_driver_register_10_~ldv_func_arg1.offset, ldv___platform_driver_register_10_~ldv_func_arg2.base, ldv___platform_driver_register_10_~ldv_func_arg2.offset, ldv___platform_driver_register_10_~ldv_func_res~1, ldv___platform_driver_register_10_~tmp~19;ldv___platform_driver_register_10_~ldv_func_arg1.base, ldv___platform_driver_register_10_~ldv_func_arg1.offset := ldv___platform_driver_register_10_#in~ldv_func_arg1.base, ldv___platform_driver_register_10_#in~ldv_func_arg1.offset;ldv___platform_driver_register_10_~ldv_func_arg2.base, ldv___platform_driver_register_10_~ldv_func_arg2.offset := ldv___platform_driver_register_10_#in~ldv_func_arg2.base, ldv___platform_driver_register_10_#in~ldv_func_arg2.offset;havoc ldv___platform_driver_register_10_~ldv_func_res~1;havoc ldv___platform_driver_register_10_~tmp~19;call ldv___platform_driver_register_10_#t~ret88 := __platform_driver_register(ldv___platform_driver_register_10_~ldv_func_arg1.base, ldv___platform_driver_register_10_~ldv_func_arg1.offset, ldv___platform_driver_register_10_~ldv_func_arg2.base, ldv___platform_driver_register_10_~ldv_func_arg2.offset);assume -2147483648 <= ldv___platform_driver_register_10_#t~ret88 && ldv___platform_driver_register_10_#t~ret88 <= 2147483647;ldv___platform_driver_register_10_~tmp~19 := ldv___platform_driver_register_10_#t~ret88;havoc ldv___platform_driver_register_10_#t~ret88;ldv___platform_driver_register_10_~ldv_func_res~1 := ldv___platform_driver_register_10_~tmp~19;~ldv_state_variable_2~0 := 1;havoc ldv_platform_driver_init_2_#t~ret75.base, ldv_platform_driver_init_2_#t~ret75.offset, ldv_platform_driver_init_2_~tmp~16.base, ldv_platform_driver_init_2_~tmp~16.offset;havoc ldv_platform_driver_init_2_~tmp~16.base, ldv_platform_driver_init_2_~tmp~16.offset;ldv_init_zalloc_#in~size := 1472;havoc ldv_init_zalloc_#res.base, ldv_init_zalloc_#res.offset;havoc ldv_init_zalloc_#t~malloc16.base, ldv_init_zalloc_#t~malloc16.offset, ldv_init_zalloc_~size, ldv_init_zalloc_~p~2.base, ldv_init_zalloc_~p~2.offset, ldv_init_zalloc_~tmp~3.base, ldv_init_zalloc_~tmp~3.offset;ldv_init_zalloc_~size := ldv_init_zalloc_#in~size;havoc ldv_init_zalloc_~p~2.base, ldv_init_zalloc_~p~2.offset;havoc ldv_init_zalloc_~tmp~3.base, ldv_init_zalloc_~tmp~3.offset;call ldv_init_zalloc_#t~malloc16.base, ldv_init_zalloc_#t~malloc16.offset := #Ultimate.alloc((if ldv_init_zalloc_~size % 4294967296 % 4294967296 <= 2147483647 then ldv_init_zalloc_~size % 4294967296 % 4294967296 else ldv_init_zalloc_~size % 4294967296 % 4294967296 - 4294967296)); VAL [ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_res~1=0, ULTIMATE.start_ldv___platform_driver_register_10_~tmp~19=0, ULTIMATE.start_ldv_init_zalloc_~size=1472, ULTIMATE.start_main_~tmp___0~4=1, ULTIMATE.start_main_~tmp~17=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg1.base|=37, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg1.offset|=0, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg2.base|=36, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg2.offset|=35, |ULTIMATE.start_ldv_init_zalloc_#in~size|=1472, |ULTIMATE.start_ldv_init_zalloc_#t~malloc16.base|=(- 18446744073709551617), |ULTIMATE.start_ldv_init_zalloc_#t~malloc16.offset|=0, |ULTIMATE.start_main_#t~switch77|=true, |ULTIMATE.start_main_#t~switch79|=true, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] CALL call #Ultimate.meminit(ldv_init_zalloc_#t~malloc16.base, ldv_init_zalloc_#t~malloc16.offset, 1, (if ldv_init_zalloc_~size % 4294967296 % 4294967296 <= 2147483647 then ldv_init_zalloc_~size % 4294967296 % 4294967296 else ldv_init_zalloc_~size % 4294967296 % 4294967296 - 4294967296), (if ldv_init_zalloc_~size % 4294967296 % 4294967296 <= 2147483647 then ldv_init_zalloc_~size % 4294967296 % 4294967296 else ldv_init_zalloc_~size % 4294967296 % 4294967296 - 4294967296)); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |#Ultimate.meminit_#amountOfFields|=1, |#Ultimate.meminit_#product|=1472, |#Ultimate.meminit_#ptr.base|=(- 18446744073709551617), |#Ultimate.meminit_#ptr.offset|=0, |#Ultimate.meminit_#sizeOfFields|=1472, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base);assume true; VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |#Ultimate.meminit_#amountOfFields|=1, |#Ultimate.meminit_#product|=1472, |#Ultimate.meminit_#ptr.base|=(- 18446744073709551617), |#Ultimate.meminit_#ptr.offset|=0, |#Ultimate.meminit_#sizeOfFields|=1472, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] RET #432#return; VAL [ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_res~1=0, ULTIMATE.start_ldv___platform_driver_register_10_~tmp~19=0, ULTIMATE.start_ldv_init_zalloc_~size=1472, ULTIMATE.start_main_~tmp___0~4=1, ULTIMATE.start_main_~tmp~17=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg1.base|=37, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg1.offset|=0, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg2.base|=36, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg2.offset|=35, |ULTIMATE.start_ldv_init_zalloc_#in~size|=1472, |ULTIMATE.start_ldv_init_zalloc_#t~malloc16.base|=(- 18446744073709551617), |ULTIMATE.start_ldv_init_zalloc_#t~malloc16.offset|=0, |ULTIMATE.start_main_#t~switch77|=true, |ULTIMATE.start_main_#t~switch79|=true, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] ldv_init_zalloc_~tmp~3.base, ldv_init_zalloc_~tmp~3.offset := ldv_init_zalloc_#t~malloc16.base, ldv_init_zalloc_#t~malloc16.offset;ldv_init_zalloc_~p~2.base, ldv_init_zalloc_~p~2.offset := ldv_init_zalloc_~tmp~3.base, ldv_init_zalloc_~tmp~3.offset;assume 0 != (if 0 != (ldv_init_zalloc_~p~2.base + ldv_init_zalloc_~p~2.offset) % 18446744073709551616 then 1 else 0);ldv_init_zalloc_#res.base, ldv_init_zalloc_#res.offset := ldv_init_zalloc_~p~2.base, ldv_init_zalloc_~p~2.offset;ldv_platform_driver_init_2_#t~ret75.base, ldv_platform_driver_init_2_#t~ret75.offset := ldv_init_zalloc_#res.base, ldv_init_zalloc_#res.offset;ldv_platform_driver_init_2_~tmp~16.base, ldv_platform_driver_init_2_~tmp~16.offset := ldv_platform_driver_init_2_#t~ret75.base, ldv_platform_driver_init_2_#t~ret75.offset;havoc ldv_platform_driver_init_2_#t~ret75.base, ldv_platform_driver_init_2_#t~ret75.offset;~iio_interrupt_trigger_driver_group1~0.base, ~iio_interrupt_trigger_driver_group1~0.offset := ldv_platform_driver_init_2_~tmp~16.base, ldv_platform_driver_init_2_~tmp~16.offset;ldv___platform_driver_register_10_#res := ldv___platform_driver_register_10_~ldv_func_res~1;iio_interrupt_trigger_driver_init_#t~ret62 := ldv___platform_driver_register_10_#res;assume -2147483648 <= iio_interrupt_trigger_driver_init_#t~ret62 && iio_interrupt_trigger_driver_init_#t~ret62 <= 2147483647;iio_interrupt_trigger_driver_init_~tmp~13 := iio_interrupt_trigger_driver_init_#t~ret62;havoc iio_interrupt_trigger_driver_init_#t~ret62;iio_interrupt_trigger_driver_init_#res := iio_interrupt_trigger_driver_init_~tmp~13;main_#t~ret80 := iio_interrupt_trigger_driver_init_#res;assume -2147483648 <= main_#t~ret80 && main_#t~ret80 <= 2147483647;~ldv_retval_0~0 := main_#t~ret80;havoc main_#t~ret80;BeginParallelComposition{ParallelCodeBlock0: assume 0 == ~ldv_retval_0~0;~ldv_state_variable_0~0 := 3;ParallelCodeBlock1: assume !(0 == ~ldv_retval_0~0);}EndParallelComposition VAL [ULTIMATE.start_iio_interrupt_trigger_driver_init_~tmp~13=0, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_res~1=0, ULTIMATE.start_ldv___platform_driver_register_10_~tmp~19=0, ULTIMATE.start_ldv_init_zalloc_~p~2.base=(- 18446744073709551617), ULTIMATE.start_ldv_init_zalloc_~p~2.offset=0, ULTIMATE.start_ldv_init_zalloc_~size=1472, ULTIMATE.start_ldv_init_zalloc_~tmp~3.base=(- 18446744073709551617), ULTIMATE.start_ldv_init_zalloc_~tmp~3.offset=0, ULTIMATE.start_ldv_platform_driver_init_2_~tmp~16.base=(- 18446744073709551617), ULTIMATE.start_ldv_platform_driver_init_2_~tmp~16.offset=0, ULTIMATE.start_main_~tmp___0~4=1, ULTIMATE.start_main_~tmp~17=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |ULTIMATE.start_iio_interrupt_trigger_driver_init_#res|=0, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg1.base|=37, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg1.offset|=0, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg2.base|=36, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg2.offset|=35, |ULTIMATE.start_ldv___platform_driver_register_10_#res|=0, |ULTIMATE.start_ldv_init_zalloc_#in~size|=1472, |ULTIMATE.start_ldv_init_zalloc_#res.base|=(- 18446744073709551617), |ULTIMATE.start_ldv_init_zalloc_#res.offset|=0, |ULTIMATE.start_ldv_init_zalloc_#t~malloc16.base|=(- 18446744073709551617), |ULTIMATE.start_ldv_init_zalloc_#t~malloc16.offset|=0, |ULTIMATE.start_main_#t~switch77|=true, |ULTIMATE.start_main_#t~switch79|=true, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=(- 18446744073709551617), ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] assume !(0 != ~ldv_retval_0~0); VAL [ULTIMATE.start_iio_interrupt_trigger_driver_init_~tmp~13=0, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_res~1=0, ULTIMATE.start_ldv___platform_driver_register_10_~tmp~19=0, ULTIMATE.start_ldv_init_zalloc_~p~2.base=(- 18446744073709551617), ULTIMATE.start_ldv_init_zalloc_~p~2.offset=0, ULTIMATE.start_ldv_init_zalloc_~size=1472, ULTIMATE.start_ldv_init_zalloc_~tmp~3.base=(- 18446744073709551617), ULTIMATE.start_ldv_init_zalloc_~tmp~3.offset=0, ULTIMATE.start_ldv_platform_driver_init_2_~tmp~16.base=(- 18446744073709551617), ULTIMATE.start_ldv_platform_driver_init_2_~tmp~16.offset=0, ULTIMATE.start_main_~tmp___0~4=1, ULTIMATE.start_main_~tmp~17=1, |#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |ULTIMATE.start_iio_interrupt_trigger_driver_init_#res|=0, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg1.base|=37, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg1.offset|=0, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg2.base|=36, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg2.offset|=35, |ULTIMATE.start_ldv___platform_driver_register_10_#res|=0, |ULTIMATE.start_ldv_init_zalloc_#in~size|=1472, |ULTIMATE.start_ldv_init_zalloc_#res.base|=(- 18446744073709551617), |ULTIMATE.start_ldv_init_zalloc_#res.offset|=0, |ULTIMATE.start_ldv_init_zalloc_#t~malloc16.base|=(- 18446744073709551617), |ULTIMATE.start_ldv_init_zalloc_#t~malloc16.offset|=0, |ULTIMATE.start_main_#t~switch77|=true, |ULTIMATE.start_main_#t~switch79|=true, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=(- 18446744073709551617), ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] assume -2147483648 <= main_#t~nondet76 && main_#t~nondet76 <= 2147483647;main_~tmp~17 := main_#t~nondet76;havoc main_#t~nondet76;main_#t~switch77 := 0 == main_~tmp~17; VAL [ULTIMATE.start_iio_interrupt_trigger_driver_init_~tmp~13=0, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_res~1=0, ULTIMATE.start_ldv___platform_driver_register_10_~tmp~19=0, ULTIMATE.start_ldv_init_zalloc_~p~2.base=(- 18446744073709551617), ULTIMATE.start_ldv_init_zalloc_~p~2.offset=0, ULTIMATE.start_ldv_init_zalloc_~size=1472, ULTIMATE.start_ldv_init_zalloc_~tmp~3.base=(- 18446744073709551617), ULTIMATE.start_ldv_init_zalloc_~tmp~3.offset=0, ULTIMATE.start_ldv_platform_driver_init_2_~tmp~16.base=(- 18446744073709551617), ULTIMATE.start_ldv_platform_driver_init_2_~tmp~16.offset=0, ULTIMATE.start_main_~tmp___0~4=1, ULTIMATE.start_main_~tmp~17=2, |#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |ULTIMATE.start_iio_interrupt_trigger_driver_init_#res|=0, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg1.base|=37, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg1.offset|=0, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg2.base|=36, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg2.offset|=35, |ULTIMATE.start_ldv___platform_driver_register_10_#res|=0, |ULTIMATE.start_ldv_init_zalloc_#in~size|=1472, |ULTIMATE.start_ldv_init_zalloc_#res.base|=(- 18446744073709551617), |ULTIMATE.start_ldv_init_zalloc_#res.offset|=0, |ULTIMATE.start_ldv_init_zalloc_#t~malloc16.base|=(- 18446744073709551617), |ULTIMATE.start_ldv_init_zalloc_#t~malloc16.offset|=0, |ULTIMATE.start_main_#t~switch77|=false, |ULTIMATE.start_main_#t~switch79|=true, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=(- 18446744073709551617), ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] assume !main_#t~switch77;main_#t~switch77 := main_#t~switch77 || 1 == main_~tmp~17; VAL [ULTIMATE.start_iio_interrupt_trigger_driver_init_~tmp~13=0, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_res~1=0, ULTIMATE.start_ldv___platform_driver_register_10_~tmp~19=0, ULTIMATE.start_ldv_init_zalloc_~p~2.base=(- 18446744073709551617), ULTIMATE.start_ldv_init_zalloc_~p~2.offset=0, ULTIMATE.start_ldv_init_zalloc_~size=1472, ULTIMATE.start_ldv_init_zalloc_~tmp~3.base=(- 18446744073709551617), ULTIMATE.start_ldv_init_zalloc_~tmp~3.offset=0, ULTIMATE.start_ldv_platform_driver_init_2_~tmp~16.base=(- 18446744073709551617), ULTIMATE.start_ldv_platform_driver_init_2_~tmp~16.offset=0, ULTIMATE.start_main_~tmp___0~4=1, ULTIMATE.start_main_~tmp~17=2, |#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |ULTIMATE.start_iio_interrupt_trigger_driver_init_#res|=0, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg1.base|=37, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg1.offset|=0, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg2.base|=36, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg2.offset|=35, |ULTIMATE.start_ldv___platform_driver_register_10_#res|=0, |ULTIMATE.start_ldv_init_zalloc_#in~size|=1472, |ULTIMATE.start_ldv_init_zalloc_#res.base|=(- 18446744073709551617), |ULTIMATE.start_ldv_init_zalloc_#res.offset|=0, |ULTIMATE.start_ldv_init_zalloc_#t~malloc16.base|=(- 18446744073709551617), |ULTIMATE.start_ldv_init_zalloc_#t~malloc16.offset|=0, |ULTIMATE.start_main_#t~switch77|=false, |ULTIMATE.start_main_#t~switch79|=true, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=(- 18446744073709551617), ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] assume !main_#t~switch77;main_#t~switch77 := main_#t~switch77 || 2 == main_~tmp~17; VAL [ULTIMATE.start_iio_interrupt_trigger_driver_init_~tmp~13=0, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_res~1=0, ULTIMATE.start_ldv___platform_driver_register_10_~tmp~19=0, ULTIMATE.start_ldv_init_zalloc_~p~2.base=(- 18446744073709551617), ULTIMATE.start_ldv_init_zalloc_~p~2.offset=0, ULTIMATE.start_ldv_init_zalloc_~size=1472, ULTIMATE.start_ldv_init_zalloc_~tmp~3.base=(- 18446744073709551617), ULTIMATE.start_ldv_init_zalloc_~tmp~3.offset=0, ULTIMATE.start_ldv_platform_driver_init_2_~tmp~16.base=(- 18446744073709551617), ULTIMATE.start_ldv_platform_driver_init_2_~tmp~16.offset=0, ULTIMATE.start_main_~tmp___0~4=1, ULTIMATE.start_main_~tmp~17=2, |#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |ULTIMATE.start_iio_interrupt_trigger_driver_init_#res|=0, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg1.base|=37, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg1.offset|=0, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg2.base|=36, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg2.offset|=35, |ULTIMATE.start_ldv___platform_driver_register_10_#res|=0, |ULTIMATE.start_ldv_init_zalloc_#in~size|=1472, |ULTIMATE.start_ldv_init_zalloc_#res.base|=(- 18446744073709551617), |ULTIMATE.start_ldv_init_zalloc_#res.offset|=0, |ULTIMATE.start_ldv_init_zalloc_#t~malloc16.base|=(- 18446744073709551617), |ULTIMATE.start_ldv_init_zalloc_#t~malloc16.offset|=0, |ULTIMATE.start_main_#t~switch77|=true, |ULTIMATE.start_main_#t~switch79|=true, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=(- 18446744073709551617), ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] assume main_#t~switch77; VAL [ULTIMATE.start_iio_interrupt_trigger_driver_init_~tmp~13=0, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_res~1=0, ULTIMATE.start_ldv___platform_driver_register_10_~tmp~19=0, ULTIMATE.start_ldv_init_zalloc_~p~2.base=(- 18446744073709551617), ULTIMATE.start_ldv_init_zalloc_~p~2.offset=0, ULTIMATE.start_ldv_init_zalloc_~size=1472, ULTIMATE.start_ldv_init_zalloc_~tmp~3.base=(- 18446744073709551617), ULTIMATE.start_ldv_init_zalloc_~tmp~3.offset=0, ULTIMATE.start_ldv_platform_driver_init_2_~tmp~16.base=(- 18446744073709551617), ULTIMATE.start_ldv_platform_driver_init_2_~tmp~16.offset=0, ULTIMATE.start_main_~tmp___0~4=1, ULTIMATE.start_main_~tmp~17=2, |#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |ULTIMATE.start_iio_interrupt_trigger_driver_init_#res|=0, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg1.base|=37, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg1.offset|=0, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg2.base|=36, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg2.offset|=35, |ULTIMATE.start_ldv___platform_driver_register_10_#res|=0, |ULTIMATE.start_ldv_init_zalloc_#in~size|=1472, |ULTIMATE.start_ldv_init_zalloc_#res.base|=(- 18446744073709551617), |ULTIMATE.start_ldv_init_zalloc_#res.offset|=0, |ULTIMATE.start_ldv_init_zalloc_#t~malloc16.base|=(- 18446744073709551617), |ULTIMATE.start_ldv_init_zalloc_#t~malloc16.offset|=0, |ULTIMATE.start_main_#t~switch77|=true, |ULTIMATE.start_main_#t~switch79|=true, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=(- 18446744073709551617), ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] assume 0 != ~ldv_state_variable_2~0;assume -2147483648 <= main_#t~nondet81 && main_#t~nondet81 <= 2147483647;main_~tmp___1~0 := main_#t~nondet81;havoc main_#t~nondet81;main_#t~switch82 := 0 == main_~tmp___1~0; VAL [ULTIMATE.start_iio_interrupt_trigger_driver_init_~tmp~13=0, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_res~1=0, ULTIMATE.start_ldv___platform_driver_register_10_~tmp~19=0, ULTIMATE.start_ldv_init_zalloc_~p~2.base=(- 18446744073709551617), ULTIMATE.start_ldv_init_zalloc_~p~2.offset=0, ULTIMATE.start_ldv_init_zalloc_~size=1472, ULTIMATE.start_ldv_init_zalloc_~tmp~3.base=(- 18446744073709551617), ULTIMATE.start_ldv_init_zalloc_~tmp~3.offset=0, ULTIMATE.start_ldv_platform_driver_init_2_~tmp~16.base=(- 18446744073709551617), ULTIMATE.start_ldv_platform_driver_init_2_~tmp~16.offset=0, ULTIMATE.start_main_~tmp___0~4=1, ULTIMATE.start_main_~tmp___1~0=0, ULTIMATE.start_main_~tmp~17=2, |#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |ULTIMATE.start_iio_interrupt_trigger_driver_init_#res|=0, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg1.base|=37, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg1.offset|=0, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg2.base|=36, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg2.offset|=35, |ULTIMATE.start_ldv___platform_driver_register_10_#res|=0, |ULTIMATE.start_ldv_init_zalloc_#in~size|=1472, |ULTIMATE.start_ldv_init_zalloc_#res.base|=(- 18446744073709551617), |ULTIMATE.start_ldv_init_zalloc_#res.offset|=0, |ULTIMATE.start_ldv_init_zalloc_#t~malloc16.base|=(- 18446744073709551617), |ULTIMATE.start_ldv_init_zalloc_#t~malloc16.offset|=0, |ULTIMATE.start_main_#t~switch77|=true, |ULTIMATE.start_main_#t~switch79|=true, |ULTIMATE.start_main_#t~switch82|=true, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=(- 18446744073709551617), ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] assume main_#t~switch82; VAL [ULTIMATE.start_iio_interrupt_trigger_driver_init_~tmp~13=0, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_res~1=0, ULTIMATE.start_ldv___platform_driver_register_10_~tmp~19=0, ULTIMATE.start_ldv_init_zalloc_~p~2.base=(- 18446744073709551617), ULTIMATE.start_ldv_init_zalloc_~p~2.offset=0, ULTIMATE.start_ldv_init_zalloc_~size=1472, ULTIMATE.start_ldv_init_zalloc_~tmp~3.base=(- 18446744073709551617), ULTIMATE.start_ldv_init_zalloc_~tmp~3.offset=0, ULTIMATE.start_ldv_platform_driver_init_2_~tmp~16.base=(- 18446744073709551617), ULTIMATE.start_ldv_platform_driver_init_2_~tmp~16.offset=0, ULTIMATE.start_main_~tmp___0~4=1, ULTIMATE.start_main_~tmp___1~0=0, ULTIMATE.start_main_~tmp~17=2, |#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |ULTIMATE.start_iio_interrupt_trigger_driver_init_#res|=0, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg1.base|=37, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg1.offset|=0, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg2.base|=36, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg2.offset|=35, |ULTIMATE.start_ldv___platform_driver_register_10_#res|=0, |ULTIMATE.start_ldv_init_zalloc_#in~size|=1472, |ULTIMATE.start_ldv_init_zalloc_#res.base|=(- 18446744073709551617), |ULTIMATE.start_ldv_init_zalloc_#res.offset|=0, |ULTIMATE.start_ldv_init_zalloc_#t~malloc16.base|=(- 18446744073709551617), |ULTIMATE.start_ldv_init_zalloc_#t~malloc16.offset|=0, |ULTIMATE.start_main_#t~switch77|=true, |ULTIMATE.start_main_#t~switch79|=true, |ULTIMATE.start_main_#t~switch82|=true, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=(- 18446744073709551617), ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] assume 1 == ~ldv_state_variable_2~0; VAL [ULTIMATE.start_iio_interrupt_trigger_driver_init_~tmp~13=0, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ULTIMATE.start_ldv___platform_driver_register_10_~ldv_func_res~1=0, ULTIMATE.start_ldv___platform_driver_register_10_~tmp~19=0, ULTIMATE.start_ldv_init_zalloc_~p~2.base=(- 18446744073709551617), ULTIMATE.start_ldv_init_zalloc_~p~2.offset=0, ULTIMATE.start_ldv_init_zalloc_~size=1472, ULTIMATE.start_ldv_init_zalloc_~tmp~3.base=(- 18446744073709551617), ULTIMATE.start_ldv_init_zalloc_~tmp~3.offset=0, ULTIMATE.start_ldv_platform_driver_init_2_~tmp~16.base=(- 18446744073709551617), ULTIMATE.start_ldv_platform_driver_init_2_~tmp~16.offset=0, ULTIMATE.start_main_~tmp___0~4=1, ULTIMATE.start_main_~tmp___1~0=0, ULTIMATE.start_main_~tmp~17=2, |#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |ULTIMATE.start_iio_interrupt_trigger_driver_init_#res|=0, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg1.base|=37, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg1.offset|=0, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg2.base|=36, |ULTIMATE.start_ldv___platform_driver_register_10_#in~ldv_func_arg2.offset|=35, |ULTIMATE.start_ldv___platform_driver_register_10_#res|=0, |ULTIMATE.start_ldv_init_zalloc_#in~size|=1472, |ULTIMATE.start_ldv_init_zalloc_#res.base|=(- 18446744073709551617), |ULTIMATE.start_ldv_init_zalloc_#res.offset|=0, |ULTIMATE.start_ldv_init_zalloc_#t~malloc16.base|=(- 18446744073709551617), |ULTIMATE.start_ldv_init_zalloc_#t~malloc16.offset|=0, |ULTIMATE.start_main_#t~switch77|=true, |ULTIMATE.start_main_#t~switch79|=true, |ULTIMATE.start_main_#t~switch82|=true, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=(- 18446744073709551617), ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] CALL call main_#t~ret83 := iio_interrupt_trigger_probe(~iio_interrupt_trigger_driver_group1~0.base, ~iio_interrupt_trigger_driver_group1~0.offset); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |iio_interrupt_trigger_probe_#in~pdev.base|=(- 18446744073709551617), |iio_interrupt_trigger_probe_#in~pdev.offset|=0, |old(~ldv_irq_1_0~0)|=0, |old(~ldv_irq_1_1~0)|=0, |old(~ldv_irq_1_2~0)|=0, |old(~ldv_irq_1_3~0)|=0, |old(~ldv_irq_data_1_0~0.base)|=0, |old(~ldv_irq_data_1_0~0.offset)|=0, |old(~ldv_irq_data_1_1~0.base)|=0, |old(~ldv_irq_data_1_1~0.offset)|=0, |old(~ldv_irq_data_1_2~0.base)|=0, |old(~ldv_irq_data_1_2~0.offset)|=0, |old(~ldv_irq_data_1_3~0.base)|=0, |old(~ldv_irq_data_1_3~0.offset)|=0, |old(~ldv_irq_line_1_0~0)|=0, |old(~ldv_irq_line_1_1~0)|=0, |old(~ldv_irq_line_1_2~0)|=0, |old(~ldv_irq_line_1_3~0)|=0, |old(~ldv_module_refcounter~0)|=1, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=(- 18446744073709551617), ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] ~pdev.base, ~pdev.offset := #in~pdev.base, #in~pdev.offset;havoc ~trig_info~0.base, ~trig_info~0.offset;havoc ~trig~0.base, ~trig~0.offset;havoc ~irqflags~0;havoc ~irq_res~0.base, ~irq_res~0.offset;havoc ~irq~0;havoc ~ret~0;havoc ~tmp~11.base, ~tmp~11.offset;~ret~0 := 0;call #t~ret48.base, #t~ret48.offset := platform_get_resource(~pdev.base, ~pdev.offset, 1024, 0);~irq_res~0.base, ~irq_res~0.offset := #t~ret48.base, #t~ret48.offset;havoc #t~ret48.base, #t~ret48.offset; VAL [iio_interrupt_trigger_probe_~pdev.base=(- 18446744073709551617), iio_interrupt_trigger_probe_~pdev.offset=0, iio_interrupt_trigger_probe_~ret~0=0, |#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |iio_interrupt_trigger_probe_#in~pdev.base|=(- 18446744073709551617), |iio_interrupt_trigger_probe_#in~pdev.offset|=0, |old(~ldv_irq_1_0~0)|=0, |old(~ldv_irq_1_1~0)|=0, |old(~ldv_irq_1_2~0)|=0, |old(~ldv_irq_1_3~0)|=0, |old(~ldv_irq_data_1_0~0.base)|=0, |old(~ldv_irq_data_1_0~0.offset)|=0, |old(~ldv_irq_data_1_1~0.base)|=0, |old(~ldv_irq_data_1_1~0.offset)|=0, |old(~ldv_irq_data_1_2~0.base)|=0, |old(~ldv_irq_data_1_2~0.offset)|=0, |old(~ldv_irq_data_1_3~0.base)|=0, |old(~ldv_irq_data_1_3~0.offset)|=0, |old(~ldv_irq_line_1_0~0)|=0, |old(~ldv_irq_line_1_1~0)|=0, |old(~ldv_irq_line_1_2~0)|=0, |old(~ldv_irq_line_1_3~0)|=0, |old(~ldv_module_refcounter~0)|=1, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=(- 18446744073709551617), ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] assume !(0 == (~irq_res~0.base + ~irq_res~0.offset) % 18446744073709551616);call #t~mem49 := read~int(~irq_res~0.base, 24 + ~irq_res~0.offset, 8);~irqflags~0 := ~bitwiseOr(~bitwiseAnd(#t~mem49, 15), 128);havoc #t~mem49;call #t~mem50 := read~int(~irq_res~0.base, ~irq_res~0.offset, 8);~irq~0 := (if #t~mem50 % 18446744073709551616 % 4294967296 <= 2147483647 then #t~mem50 % 18446744073709551616 % 4294967296 else #t~mem50 % 18446744073709551616 % 4294967296 - 4294967296);havoc #t~mem50;havoc #t~nondet51.base, #t~nondet51.offset;~trig~0.base, ~trig~0.offset := #t~nondet51.base, #t~nondet51.offset; VAL [iio_interrupt_trigger_probe_~irq_res~0.base=(- 18446744073709551617), iio_interrupt_trigger_probe_~irq_res~0.offset=(- 174432411960997520080894), iio_interrupt_trigger_probe_~irq~0=0, iio_interrupt_trigger_probe_~pdev.base=(- 18446744073709551617), iio_interrupt_trigger_probe_~pdev.offset=0, iio_interrupt_trigger_probe_~ret~0=0, iio_interrupt_trigger_probe_~trig~0.base=(- 171646953605867377786880), iio_interrupt_trigger_probe_~trig~0.offset=(- 21693371030682432700415), |#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |iio_interrupt_trigger_probe_#in~pdev.base|=(- 18446744073709551617), |iio_interrupt_trigger_probe_#in~pdev.offset|=0, |iio_interrupt_trigger_probe_#t~nondet51.base|=(- 171646953605867377786880), |iio_interrupt_trigger_probe_#t~nondet51.offset|=(- 21693371030682432700415), |old(~ldv_irq_1_0~0)|=0, |old(~ldv_irq_1_1~0)|=0, |old(~ldv_irq_1_2~0)|=0, |old(~ldv_irq_1_3~0)|=0, |old(~ldv_irq_data_1_0~0.base)|=0, |old(~ldv_irq_data_1_0~0.offset)|=0, |old(~ldv_irq_data_1_1~0.base)|=0, |old(~ldv_irq_data_1_1~0.offset)|=0, |old(~ldv_irq_data_1_2~0.base)|=0, |old(~ldv_irq_data_1_2~0.offset)|=0, |old(~ldv_irq_data_1_3~0.base)|=0, |old(~ldv_irq_data_1_3~0.offset)|=0, |old(~ldv_irq_line_1_0~0)|=0, |old(~ldv_irq_line_1_1~0)|=0, |old(~ldv_irq_line_1_2~0)|=0, |old(~ldv_irq_line_1_3~0)|=0, |old(~ldv_module_refcounter~0)|=1, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=(- 18446744073709551617), ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] assume !(0 == (~trig~0.base + ~trig~0.offset) % 18446744073709551616);kzalloc_#in~size, kzalloc_#in~flags := 4, 208;havoc kzalloc_#res.base, kzalloc_#res.offset;havoc kzalloc_#t~ret7.base, kzalloc_#t~ret7.offset, kzalloc_~size, kzalloc_~flags, kzalloc_~tmp~0.base, kzalloc_~tmp~0.offset;kzalloc_~size := kzalloc_#in~size;kzalloc_~flags := kzalloc_#in~flags;havoc kzalloc_~tmp~0.base, kzalloc_~tmp~0.offset;kmalloc_#in~size, kmalloc_#in~flags := kzalloc_~size, ~bitwiseOr(kzalloc_~flags, 32768);havoc kmalloc_#res.base, kmalloc_#res.offset;havoc kmalloc_#t~ret6.base, kmalloc_#t~ret6.offset, kmalloc_~size, kmalloc_~flags, kmalloc_~tmp___2~0.base, kmalloc_~tmp___2~0.offset;kmalloc_~size := kmalloc_#in~size;kmalloc_~flags := kmalloc_#in~flags;havoc kmalloc_~tmp___2~0.base, kmalloc_~tmp___2~0.offset;__kmalloc_#in~size, __kmalloc_#in~t := kmalloc_~size, kmalloc_~flags;havoc __kmalloc_#res.base, __kmalloc_#res.offset;havoc __kmalloc_#t~ret5.base, __kmalloc_#t~ret5.offset, __kmalloc_~size, __kmalloc_~t;__kmalloc_~size := __kmalloc_#in~size;__kmalloc_~t := __kmalloc_#in~t;ldv_malloc_#in~size := __kmalloc_~size;havoc ldv_malloc_#res.base, ldv_malloc_#res.offset;havoc ldv_malloc_#t~nondet12, ldv_malloc_#t~malloc13.base, ldv_malloc_#t~malloc13.offset, ldv_malloc_~size, ldv_malloc_~p~0.base, ldv_malloc_~p~0.offset, ldv_malloc_~tmp~1.base, ldv_malloc_~tmp~1.offset, ldv_malloc_~tmp___0~0;ldv_malloc_~size := ldv_malloc_#in~size;havoc ldv_malloc_~p~0.base, ldv_malloc_~p~0.offset;havoc ldv_malloc_~tmp~1.base, ldv_malloc_~tmp~1.offset;havoc ldv_malloc_~tmp___0~0;assume -2147483648 <= ldv_malloc_#t~nondet12 && ldv_malloc_#t~nondet12 <= 2147483647;ldv_malloc_~tmp___0~0 := ldv_malloc_#t~nondet12;havoc ldv_malloc_#t~nondet12;BeginParallelComposition{ParallelCodeBlock0: assume 0 != ldv_malloc_~tmp___0~0;ldv_malloc_#res.base, ldv_malloc_#res.offset := 0, 0;ParallelCodeBlock1: assume !(0 != ldv_malloc_~tmp___0~0);call ldv_malloc_#t~malloc13.base, ldv_malloc_#t~malloc13.offset := #Ultimate.alloc(ldv_malloc_~size);ldv_malloc_~tmp~1.base, ldv_malloc_~tmp~1.offset := ldv_malloc_#t~malloc13.base, ldv_malloc_#t~malloc13.offset;ldv_malloc_~p~0.base, ldv_malloc_~p~0.offset := ldv_malloc_~tmp~1.base, ldv_malloc_~tmp~1.offset;assume 0 != (if 0 != (ldv_malloc_~p~0.base + ldv_malloc_~p~0.offset) % 18446744073709551616 then 1 else 0);ldv_malloc_#res.base, ldv_malloc_#res.offset := ldv_malloc_~p~0.base, ldv_malloc_~p~0.offset;}EndParallelComposition__kmalloc_#t~ret5.base, __kmalloc_#t~ret5.offset := ldv_malloc_#res.base, ldv_malloc_#res.offset;__kmalloc_#res.base, __kmalloc_#res.offset := __kmalloc_#t~ret5.base, __kmalloc_#t~ret5.offset;havoc __kmalloc_#t~ret5.base, __kmalloc_#t~ret5.offset;kmalloc_#t~ret6.base, kmalloc_#t~ret6.offset := __kmalloc_#res.base, __kmalloc_#res.offset;kmalloc_~tmp___2~0.base, kmalloc_~tmp___2~0.offset := kmalloc_#t~ret6.base, kmalloc_#t~ret6.offset;havoc kmalloc_#t~ret6.base, kmalloc_#t~ret6.offset;kmalloc_#res.base, kmalloc_#res.offset := kmalloc_~tmp___2~0.base, kmalloc_~tmp___2~0.offset;kzalloc_#t~ret7.base, kzalloc_#t~ret7.offset := kmalloc_#res.base, kmalloc_#res.offset;kzalloc_~tmp~0.base, kzalloc_~tmp~0.offset := kzalloc_#t~ret7.base, kzalloc_#t~ret7.offset;havoc kzalloc_#t~ret7.base, kzalloc_#t~ret7.offset;kzalloc_#res.base, kzalloc_#res.offset := kzalloc_~tmp~0.base, kzalloc_~tmp~0.offset;#t~ret53.base, #t~ret53.offset := kzalloc_#res.base, kzalloc_#res.offset;~tmp~11.base, ~tmp~11.offset := #t~ret53.base, #t~ret53.offset;havoc #t~ret53.base, #t~ret53.offset;~trig_info~0.base, ~trig_info~0.offset := ~tmp~11.base, ~tmp~11.offset; VAL [iio_interrupt_trigger_probe___kmalloc_~size=4, iio_interrupt_trigger_probe___kmalloc_~t=57, iio_interrupt_trigger_probe_kmalloc_~flags=57, iio_interrupt_trigger_probe_kmalloc_~size=4, iio_interrupt_trigger_probe_kmalloc_~tmp___2~0.base=0, iio_interrupt_trigger_probe_kmalloc_~tmp___2~0.offset=0, iio_interrupt_trigger_probe_kzalloc_~flags=208, iio_interrupt_trigger_probe_kzalloc_~size=4, iio_interrupt_trigger_probe_kzalloc_~tmp~0.base=0, iio_interrupt_trigger_probe_kzalloc_~tmp~0.offset=0, iio_interrupt_trigger_probe_ldv_malloc_~p~0.base=18446744073709551616, iio_interrupt_trigger_probe_ldv_malloc_~p~0.offset=0, iio_interrupt_trigger_probe_ldv_malloc_~size=4, iio_interrupt_trigger_probe_ldv_malloc_~tmp___0~0=(- 1), iio_interrupt_trigger_probe_ldv_malloc_~tmp~1.base=54, iio_interrupt_trigger_probe_ldv_malloc_~tmp~1.offset=53, iio_interrupt_trigger_probe_~irq_res~0.base=(- 18446744073709551617), iio_interrupt_trigger_probe_~irq_res~0.offset=(- 174432411960997520080894), iio_interrupt_trigger_probe_~irq~0=0, iio_interrupt_trigger_probe_~pdev.base=(- 18446744073709551617), iio_interrupt_trigger_probe_~pdev.offset=0, iio_interrupt_trigger_probe_~ret~0=0, iio_interrupt_trigger_probe_~tmp~11.base=0, iio_interrupt_trigger_probe_~tmp~11.offset=0, iio_interrupt_trigger_probe_~trig_info~0.base=0, iio_interrupt_trigger_probe_~trig_info~0.offset=0, iio_interrupt_trigger_probe_~trig~0.base=(- 171646953605867377786880), iio_interrupt_trigger_probe_~trig~0.offset=(- 21693371030682432700415), |#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |iio_interrupt_trigger_probe_#in~pdev.base|=(- 18446744073709551617), |iio_interrupt_trigger_probe_#in~pdev.offset|=0, |iio_interrupt_trigger_probe_#t~nondet51.base|=(- 171646953605867377786880), |iio_interrupt_trigger_probe_#t~nondet51.offset|=(- 21693371030682432700415), |iio_interrupt_trigger_probe___kmalloc_#in~size|=4, |iio_interrupt_trigger_probe___kmalloc_#in~t|=57, |iio_interrupt_trigger_probe___kmalloc_#res.base|=0, |iio_interrupt_trigger_probe___kmalloc_#res.offset|=0, |iio_interrupt_trigger_probe_kmalloc_#in~flags|=57, |iio_interrupt_trigger_probe_kmalloc_#in~size|=4, |iio_interrupt_trigger_probe_kmalloc_#res.base|=0, |iio_interrupt_trigger_probe_kmalloc_#res.offset|=0, |iio_interrupt_trigger_probe_kzalloc_#in~flags|=208, |iio_interrupt_trigger_probe_kzalloc_#in~size|=4, |iio_interrupt_trigger_probe_kzalloc_#res.base|=0, |iio_interrupt_trigger_probe_kzalloc_#res.offset|=0, |iio_interrupt_trigger_probe_ldv_malloc_#in~size|=4, |iio_interrupt_trigger_probe_ldv_malloc_#res.base|=0, |iio_interrupt_trigger_probe_ldv_malloc_#res.offset|=0, |iio_interrupt_trigger_probe_ldv_malloc_#t~malloc13.base|=47, |iio_interrupt_trigger_probe_ldv_malloc_#t~malloc13.offset|=55, |old(~ldv_irq_1_0~0)|=0, |old(~ldv_irq_1_1~0)|=0, |old(~ldv_irq_1_2~0)|=0, |old(~ldv_irq_1_3~0)|=0, |old(~ldv_irq_data_1_0~0.base)|=0, |old(~ldv_irq_data_1_0~0.offset)|=0, |old(~ldv_irq_data_1_1~0.base)|=0, |old(~ldv_irq_data_1_1~0.offset)|=0, |old(~ldv_irq_data_1_2~0.base)|=0, |old(~ldv_irq_data_1_2~0.offset)|=0, |old(~ldv_irq_data_1_3~0.base)|=0, |old(~ldv_irq_data_1_3~0.offset)|=0, |old(~ldv_irq_line_1_0~0)|=0, |old(~ldv_irq_line_1_1~0)|=0, |old(~ldv_irq_line_1_2~0)|=0, |old(~ldv_irq_line_1_3~0)|=0, |old(~ldv_module_refcounter~0)|=1, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=(- 18446744073709551617), ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] assume 0 == (~trig_info~0.base + ~trig_info~0.offset) % 18446744073709551616;~ret~0 := -12; VAL [iio_interrupt_trigger_probe___kmalloc_~size=4, iio_interrupt_trigger_probe___kmalloc_~t=57, iio_interrupt_trigger_probe_kmalloc_~flags=57, iio_interrupt_trigger_probe_kmalloc_~size=4, iio_interrupt_trigger_probe_kmalloc_~tmp___2~0.base=0, iio_interrupt_trigger_probe_kmalloc_~tmp___2~0.offset=0, iio_interrupt_trigger_probe_kzalloc_~flags=208, iio_interrupt_trigger_probe_kzalloc_~size=4, iio_interrupt_trigger_probe_kzalloc_~tmp~0.base=0, iio_interrupt_trigger_probe_kzalloc_~tmp~0.offset=0, iio_interrupt_trigger_probe_ldv_malloc_~p~0.base=18446744073709551616, iio_interrupt_trigger_probe_ldv_malloc_~p~0.offset=0, iio_interrupt_trigger_probe_ldv_malloc_~size=4, iio_interrupt_trigger_probe_ldv_malloc_~tmp___0~0=(- 1), iio_interrupt_trigger_probe_ldv_malloc_~tmp~1.base=54, iio_interrupt_trigger_probe_ldv_malloc_~tmp~1.offset=53, iio_interrupt_trigger_probe_~irq_res~0.base=(- 18446744073709551617), iio_interrupt_trigger_probe_~irq_res~0.offset=(- 174432411960997520080894), iio_interrupt_trigger_probe_~irq~0=0, iio_interrupt_trigger_probe_~pdev.base=(- 18446744073709551617), iio_interrupt_trigger_probe_~pdev.offset=0, iio_interrupt_trigger_probe_~ret~0=(- 12), iio_interrupt_trigger_probe_~tmp~11.base=0, iio_interrupt_trigger_probe_~tmp~11.offset=0, iio_interrupt_trigger_probe_~trig_info~0.base=0, iio_interrupt_trigger_probe_~trig_info~0.offset=0, iio_interrupt_trigger_probe_~trig~0.base=(- 171646953605867377786880), iio_interrupt_trigger_probe_~trig~0.offset=(- 21693371030682432700415), |#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |iio_interrupt_trigger_probe_#in~pdev.base|=(- 18446744073709551617), |iio_interrupt_trigger_probe_#in~pdev.offset|=0, |iio_interrupt_trigger_probe_#t~nondet51.base|=(- 171646953605867377786880), |iio_interrupt_trigger_probe_#t~nondet51.offset|=(- 21693371030682432700415), |iio_interrupt_trigger_probe___kmalloc_#in~size|=4, |iio_interrupt_trigger_probe___kmalloc_#in~t|=57, |iio_interrupt_trigger_probe___kmalloc_#res.base|=0, |iio_interrupt_trigger_probe___kmalloc_#res.offset|=0, |iio_interrupt_trigger_probe_kmalloc_#in~flags|=57, |iio_interrupt_trigger_probe_kmalloc_#in~size|=4, |iio_interrupt_trigger_probe_kmalloc_#res.base|=0, |iio_interrupt_trigger_probe_kmalloc_#res.offset|=0, |iio_interrupt_trigger_probe_kzalloc_#in~flags|=208, |iio_interrupt_trigger_probe_kzalloc_#in~size|=4, |iio_interrupt_trigger_probe_kzalloc_#res.base|=0, |iio_interrupt_trigger_probe_kzalloc_#res.offset|=0, |iio_interrupt_trigger_probe_ldv_malloc_#in~size|=4, |iio_interrupt_trigger_probe_ldv_malloc_#res.base|=0, |iio_interrupt_trigger_probe_ldv_malloc_#res.offset|=0, |iio_interrupt_trigger_probe_ldv_malloc_#t~malloc13.base|=47, |iio_interrupt_trigger_probe_ldv_malloc_#t~malloc13.offset|=55, |old(~ldv_irq_1_0~0)|=0, |old(~ldv_irq_1_1~0)|=0, |old(~ldv_irq_1_2~0)|=0, |old(~ldv_irq_1_3~0)|=0, |old(~ldv_irq_data_1_0~0.base)|=0, |old(~ldv_irq_data_1_0~0.offset)|=0, |old(~ldv_irq_data_1_1~0.base)|=0, |old(~ldv_irq_data_1_1~0.offset)|=0, |old(~ldv_irq_data_1_2~0.base)|=0, |old(~ldv_irq_data_1_2~0.offset)|=0, |old(~ldv_irq_data_1_3~0.base)|=0, |old(~ldv_irq_data_1_3~0.offset)|=0, |old(~ldv_irq_line_1_0~0)|=0, |old(~ldv_irq_line_1_1~0)|=0, |old(~ldv_irq_line_1_2~0)|=0, |old(~ldv_irq_line_1_3~0)|=0, |old(~ldv_module_refcounter~0)|=1, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=(- 18446744073709551617), ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] CALL call iio_trigger_put(~trig~0.base, ~trig~0.offset); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |iio_trigger_put_#in~trig.base|=(- 171646953605867377786880), |iio_trigger_put_#in~trig.offset|=(- 21693371030682432700415), |old(~ldv_irq_1_0~0)|=0, |old(~ldv_irq_1_1~0)|=0, |old(~ldv_irq_1_2~0)|=0, |old(~ldv_irq_1_3~0)|=0, |old(~ldv_irq_data_1_0~0.base)|=0, |old(~ldv_irq_data_1_0~0.offset)|=0, |old(~ldv_irq_data_1_1~0.base)|=0, |old(~ldv_irq_data_1_1~0.offset)|=0, |old(~ldv_irq_data_1_2~0.base)|=0, |old(~ldv_irq_data_1_2~0.offset)|=0, |old(~ldv_irq_data_1_3~0.base)|=0, |old(~ldv_irq_data_1_3~0.offset)|=0, |old(~ldv_irq_line_1_0~0)|=0, |old(~ldv_irq_line_1_1~0)|=0, |old(~ldv_irq_line_1_2~0)|=0, |old(~ldv_irq_line_1_3~0)|=0, |old(~ldv_module_refcounter~0)|=1, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=(- 18446744073709551617), ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] ~trig.base, ~trig.offset := #in~trig.base, #in~trig.offset;call #t~mem41.base, #t~mem41.offset := read~$Pointer$(~trig.base, ~trig.offset, 8);call #t~mem42.base, #t~mem42.offset := read~$Pointer$(#t~mem41.base, #t~mem41.offset, 8);ldv_module_put_5_#in~ldv_func_arg1.base, ldv_module_put_5_#in~ldv_func_arg1.offset := #t~mem42.base, #t~mem42.offset;havoc ldv_module_put_5_~ldv_func_arg1.base, ldv_module_put_5_~ldv_func_arg1.offset;ldv_module_put_5_~ldv_func_arg1.base, ldv_module_put_5_~ldv_func_arg1.offset := ldv_module_put_5_#in~ldv_func_arg1.base, ldv_module_put_5_#in~ldv_func_arg1.offset; VAL [iio_trigger_put_ldv_module_put_5_~ldv_func_arg1.base=(- 552), iio_trigger_put_ldv_module_put_5_~ldv_func_arg1.offset=(- 18446744073709551023), iio_trigger_put_~trig.base=(- 171646953605867377786880), iio_trigger_put_~trig.offset=(- 21693371030682432700415), |#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |iio_trigger_put_#in~trig.base|=(- 171646953605867377786880), |iio_trigger_put_#in~trig.offset|=(- 21693371030682432700415), |iio_trigger_put_#t~mem41.base|=45, |iio_trigger_put_#t~mem41.offset|=39, |iio_trigger_put_#t~mem42.base|=(- 552), |iio_trigger_put_#t~mem42.offset|=(- 18446744073709551023), |iio_trigger_put_ldv_module_put_5_#in~ldv_func_arg1.base|=(- 552), |iio_trigger_put_ldv_module_put_5_#in~ldv_func_arg1.offset|=(- 18446744073709551023), |old(~ldv_irq_1_0~0)|=0, |old(~ldv_irq_1_1~0)|=0, |old(~ldv_irq_1_2~0)|=0, |old(~ldv_irq_1_3~0)|=0, |old(~ldv_irq_data_1_0~0.base)|=0, |old(~ldv_irq_data_1_0~0.offset)|=0, |old(~ldv_irq_data_1_1~0.base)|=0, |old(~ldv_irq_data_1_1~0.offset)|=0, |old(~ldv_irq_data_1_2~0.base)|=0, |old(~ldv_irq_data_1_2~0.offset)|=0, |old(~ldv_irq_data_1_3~0.base)|=0, |old(~ldv_irq_data_1_3~0.offset)|=0, |old(~ldv_irq_line_1_0~0)|=0, |old(~ldv_irq_line_1_1~0)|=0, |old(~ldv_irq_line_1_2~0)|=0, |old(~ldv_irq_line_1_3~0)|=0, |old(~ldv_module_refcounter~0)|=1, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=(- 18446744073709551617), ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] CALL call ldv_module_put(ldv_module_put_5_~ldv_func_arg1.base, ldv_module_put_5_~ldv_func_arg1.offset); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |ldv_module_put_#in~module.base|=(- 552), |ldv_module_put_#in~module.offset|=(- 18446744073709551023), |old(~ldv_irq_1_0~0)|=0, |old(~ldv_irq_1_1~0)|=0, |old(~ldv_irq_1_2~0)|=0, |old(~ldv_irq_1_3~0)|=0, |old(~ldv_irq_data_1_0~0.base)|=0, |old(~ldv_irq_data_1_0~0.offset)|=0, |old(~ldv_irq_data_1_1~0.base)|=0, |old(~ldv_irq_data_1_1~0.offset)|=0, |old(~ldv_irq_data_1_2~0.base)|=0, |old(~ldv_irq_data_1_2~0.offset)|=0, |old(~ldv_irq_data_1_3~0.base)|=0, |old(~ldv_irq_data_1_3~0.offset)|=0, |old(~ldv_irq_line_1_0~0)|=0, |old(~ldv_irq_line_1_1~0)|=0, |old(~ldv_irq_line_1_2~0)|=0, |old(~ldv_irq_line_1_3~0)|=0, |old(~ldv_module_refcounter~0)|=1, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=(- 18446744073709551617), ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] ~module.base, ~module.offset := #in~module.base, #in~module.offset; VAL [ldv_module_put_~module.base=(- 552), ldv_module_put_~module.offset=(- 18446744073709551023), |#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |ldv_module_put_#in~module.base|=(- 552), |ldv_module_put_#in~module.offset|=(- 18446744073709551023), |old(~ldv_irq_1_0~0)|=0, |old(~ldv_irq_1_1~0)|=0, |old(~ldv_irq_1_2~0)|=0, |old(~ldv_irq_1_3~0)|=0, |old(~ldv_irq_data_1_0~0.base)|=0, |old(~ldv_irq_data_1_0~0.offset)|=0, |old(~ldv_irq_data_1_1~0.base)|=0, |old(~ldv_irq_data_1_1~0.offset)|=0, |old(~ldv_irq_data_1_2~0.base)|=0, |old(~ldv_irq_data_1_2~0.offset)|=0, |old(~ldv_irq_data_1_3~0.base)|=0, |old(~ldv_irq_data_1_3~0.offset)|=0, |old(~ldv_irq_line_1_0~0)|=0, |old(~ldv_irq_line_1_1~0)|=0, |old(~ldv_irq_line_1_2~0)|=0, |old(~ldv_irq_line_1_3~0)|=0, |old(~ldv_module_refcounter~0)|=1, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=(- 18446744073709551617), ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] assume 0 != (~module.base + ~module.offset) % 18446744073709551616; VAL [ldv_module_put_~module.base=(- 552), ldv_module_put_~module.offset=(- 18446744073709551023), |#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |ldv_module_put_#in~module.base|=(- 552), |ldv_module_put_#in~module.offset|=(- 18446744073709551023), |old(~ldv_irq_1_0~0)|=0, |old(~ldv_irq_1_1~0)|=0, |old(~ldv_irq_1_2~0)|=0, |old(~ldv_irq_1_3~0)|=0, |old(~ldv_irq_data_1_0~0.base)|=0, |old(~ldv_irq_data_1_0~0.offset)|=0, |old(~ldv_irq_data_1_1~0.base)|=0, |old(~ldv_irq_data_1_1~0.offset)|=0, |old(~ldv_irq_data_1_2~0.base)|=0, |old(~ldv_irq_data_1_2~0.offset)|=0, |old(~ldv_irq_data_1_3~0.base)|=0, |old(~ldv_irq_data_1_3~0.offset)|=0, |old(~ldv_irq_line_1_0~0)|=0, |old(~ldv_irq_line_1_1~0)|=0, |old(~ldv_irq_line_1_2~0)|=0, |old(~ldv_irq_line_1_3~0)|=0, |old(~ldv_module_refcounter~0)|=1, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=(- 18446744073709551617), ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] assume ~ldv_module_refcounter~0 <= 1; VAL [ldv_module_put_~module.base=(- 552), ldv_module_put_~module.offset=(- 18446744073709551023), |#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |ldv_module_put_#in~module.base|=(- 552), |ldv_module_put_#in~module.offset|=(- 18446744073709551023), |old(~ldv_irq_1_0~0)|=0, |old(~ldv_irq_1_1~0)|=0, |old(~ldv_irq_1_2~0)|=0, |old(~ldv_irq_1_3~0)|=0, |old(~ldv_irq_data_1_0~0.base)|=0, |old(~ldv_irq_data_1_0~0.offset)|=0, |old(~ldv_irq_data_1_1~0.base)|=0, |old(~ldv_irq_data_1_1~0.offset)|=0, |old(~ldv_irq_data_1_2~0.base)|=0, |old(~ldv_irq_data_1_2~0.offset)|=0, |old(~ldv_irq_data_1_3~0.base)|=0, |old(~ldv_irq_data_1_3~0.offset)|=0, |old(~ldv_irq_line_1_0~0)|=0, |old(~ldv_irq_line_1_1~0)|=0, |old(~ldv_irq_line_1_2~0)|=0, |old(~ldv_irq_line_1_3~0)|=0, |old(~ldv_module_refcounter~0)|=1, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=(- 18446744073709551617), ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] CALL call ldv_error(); VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |old(~ldv_irq_1_0~0)|=0, |old(~ldv_irq_1_1~0)|=0, |old(~ldv_irq_1_2~0)|=0, |old(~ldv_irq_1_3~0)|=0, |old(~ldv_irq_data_1_0~0.base)|=0, |old(~ldv_irq_data_1_0~0.offset)|=0, |old(~ldv_irq_data_1_1~0.base)|=0, |old(~ldv_irq_data_1_1~0.offset)|=0, |old(~ldv_irq_data_1_2~0.base)|=0, |old(~ldv_irq_data_1_2~0.offset)|=0, |old(~ldv_irq_data_1_3~0.base)|=0, |old(~ldv_irq_data_1_3~0.offset)|=0, |old(~ldv_irq_line_1_0~0)|=0, |old(~ldv_irq_line_1_1~0)|=0, |old(~ldv_irq_line_1_2~0)|=0, |old(~ldv_irq_line_1_3~0)|=0, |old(~ldv_module_refcounter~0)|=1, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=(- 18446744073709551617), ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] assume !false; VAL [|#NULL.base|=0, |#NULL.offset|=0, |#t~string52.base|=26, |#t~string52.offset|=0, |#t~string56.base|=27, |#t~string56.offset|=0, |#t~string61.base|=28, |#t~string61.offset|=0, |old(~ldv_irq_1_0~0)|=0, |old(~ldv_irq_1_1~0)|=0, |old(~ldv_irq_1_2~0)|=0, |old(~ldv_irq_1_3~0)|=0, |old(~ldv_irq_data_1_0~0.base)|=0, |old(~ldv_irq_data_1_0~0.offset)|=0, |old(~ldv_irq_data_1_1~0.base)|=0, |old(~ldv_irq_data_1_1~0.offset)|=0, |old(~ldv_irq_data_1_2~0.base)|=0, |old(~ldv_irq_data_1_2~0.offset)|=0, |old(~ldv_irq_data_1_3~0.base)|=0, |old(~ldv_irq_data_1_3~0.offset)|=0, |old(~ldv_irq_line_1_0~0)|=0, |old(~ldv_irq_line_1_1~0)|=0, |old(~ldv_irq_line_1_2~0)|=0, |old(~ldv_irq_line_1_3~0)|=0, |old(~ldv_module_refcounter~0)|=1, |~#__this_module~0.base|=36, |~#__this_module~0.offset|=35, |~#iio_interrupt_trigger_driver~0.base|=37, |~#iio_interrupt_trigger_driver~0.offset|=0, |~#iio_interrupt_trigger_ops~0.base|=29, |~#iio_interrupt_trigger_ops~0.offset|=0, ~iio_interrupt_trigger_driver_group1~0.base=(- 18446744073709551617), ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] #NULL.base, #NULL.offset := 0, 0; [?] #valid := #valid[0 := 0]; [L2926] call #t~string52.base, #t~string52.offset := #Ultimate.alloc(10); [L2947] call #t~string56.base, #t~string56.offset := #Ultimate.alloc(22); [L2990] call #t~string61.base, #t~string61.offset := #Ultimate.alloc(22); [L2775] ~ldv_irq_1_2~0 := 0; [L2776] ~LDV_IN_INTERRUPT~0 := 1; [L2777] ~ldv_irq_1_3~0 := 0; [L2778] ~ldv_irq_data_1_1~0.base, ~ldv_irq_data_1_1~0.offset := 0, 0; [L2779] ~ldv_irq_1_1~0 := 0; [L2780] ~ldv_irq_1_0~0 := 0; [L2781] ~probed_2~0 := 0; [L2782] ~ldv_irq_line_1_3~0 := 0; [L2783] ~ldv_irq_data_1_0~0.base, ~ldv_irq_data_1_0~0.offset := 0, 0; [L2784] ~ldv_state_variable_0~0 := 0; [L2785] ~ldv_irq_line_1_0~0 := 0; [L2786] ~ldv_state_variable_2~0 := 0; [L2787] ~ldv_irq_data_1_3~0.base, ~ldv_irq_data_1_3~0.offset := 0, 0; [L2788] ~ref_cnt~0 := 0; [L2789] ~ldv_irq_line_1_1~0 := 0; [L2791] ~ldv_irq_data_1_2~0.base, ~ldv_irq_data_1_2~0.offset := 0, 0; [L2792] ~ldv_state_variable_1~0 := 0; [L2793] ~ldv_irq_line_1_2~0 := 0; [L3018] ~ldv_retval_0~0 := 0; [L3019] ~ldv_retval_1~0 := 0; [L3022] ~ldv_retval_2~0 := 0; [L3448] ~ldv_module_refcounter~0 := 1; [L2790] ~iio_interrupt_trigger_driver_group1~0.base, ~iio_interrupt_trigger_driver_group1~0.offset := 0, 0; [L2905] call ~#iio_interrupt_trigger_ops~0.base, ~#iio_interrupt_trigger_ops~0.offset := #Ultimate.alloc(32); [L2905] call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#iio_interrupt_trigger_ops~0.base, ~#iio_interrupt_trigger_ops~0.offset, 8); [L2905] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_ops~0.base, 8 + ~#iio_interrupt_trigger_ops~0.offset, 8); [L2905] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_ops~0.base, 16 + ~#iio_interrupt_trigger_ops~0.offset, 8); [L2905] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_ops~0.base, 24 + ~#iio_interrupt_trigger_ops~0.offset, 8); [L2989-L2999] call ~#iio_interrupt_trigger_driver~0.base, ~#iio_interrupt_trigger_driver~0.offset := #Ultimate.alloc(166); [L2989-L2999] call write~init~$Pointer$(#funAddr~iio_interrupt_trigger_probe.base, #funAddr~iio_interrupt_trigger_probe.offset, ~#iio_interrupt_trigger_driver~0.base, ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(#funAddr~iio_interrupt_trigger_remove.base, #funAddr~iio_interrupt_trigger_remove.offset, ~#iio_interrupt_trigger_driver~0.base, 8 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 16 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 24 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 32 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(#t~string61.base, #t~string61.offset, ~#iio_interrupt_trigger_driver~0.base, 40 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 48 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 56 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 64 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~int(0, ~#iio_interrupt_trigger_driver~0.base, 72 + ~#iio_interrupt_trigger_driver~0.offset, 1); [L2989-L2999] call write~init~int(0, ~#iio_interrupt_trigger_driver~0.base, 73 + ~#iio_interrupt_trigger_driver~0.offset, 4); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 77 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 85 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 93 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 101 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 109 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 117 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 125 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 133 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 141 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 149 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 157 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~int(0, ~#iio_interrupt_trigger_driver~0.base, 165 + ~#iio_interrupt_trigger_driver~0.offset, 1); [?] havoc main_#res; [?] havoc main_#t~nondet76, main_#t~switch77, main_#t~nondet78, main_#t~switch79, main_#t~ret80, main_#t~nondet81, main_#t~switch82, main_#t~ret83, main_#t~ret84, main_#t~ret85, main_~tmp~17, main_~tmp___0~4, main_~tmp___1~0; [L3193] havoc main_~tmp~17; [L3194] havoc main_~tmp___0~4; [L3195] havoc main_~tmp___1~0; [L3198] call ldv_initialize(); [L3199] ~ldv_state_variable_1~0 := 1; [L3200] ~ref_cnt~0 := 0; [L3201] ~ldv_state_variable_0~0 := 1; [L3202] ~ldv_state_variable_2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3204] assume -2147483648 <= main_#t~nondet76 && main_#t~nondet76 <= 2147483647; [L3204] main_~tmp~17 := main_#t~nondet76; [L3204] havoc main_#t~nondet76; [L3206] main_#t~switch77 := 0 == main_~tmp~17; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, main_#t~switch77=false, main_~tmp~17=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3206] assume !main_#t~switch77; [L3213] main_#t~switch77 := main_#t~switch77 || 1 == main_~tmp~17; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, main_#t~switch77=true, main_~tmp~17=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3213] assume main_#t~switch77; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, main_#t~switch77=true, main_~tmp~17=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3214-L3250] assume 0 != ~ldv_state_variable_0~0; [L3215] assume -2147483648 <= main_#t~nondet78 && main_#t~nondet78 <= 2147483647; [L3215] main_~tmp___0~4 := main_#t~nondet78; [L3215] havoc main_#t~nondet78; [L3217] main_#t~switch79 := 0 == main_~tmp___0~4; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, main_#t~switch77=true, main_#t~switch79=false, main_~tmp___0~4=1, main_~tmp~17=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3217] assume !main_#t~switch79; [L3226] main_#t~switch79 := main_#t~switch79 || 1 == main_~tmp___0~4; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3226] assume main_#t~switch79; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3227-L3242] assume 1 == ~ldv_state_variable_0~0; [L3228] havoc iio_interrupt_trigger_driver_init_#res; [L3228] havoc iio_interrupt_trigger_driver_init_#t~ret62, iio_interrupt_trigger_driver_init_~tmp~13; [L3002] havoc iio_interrupt_trigger_driver_init_~tmp~13; [L3005] ldv___platform_driver_register_10_#in~ldv_func_arg1.base, ldv___platform_driver_register_10_#in~ldv_func_arg1.offset, ldv___platform_driver_register_10_#in~ldv_func_arg2.base, ldv___platform_driver_register_10_#in~ldv_func_arg2.offset := ~#iio_interrupt_trigger_driver~0.base, ~#iio_interrupt_trigger_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset; [L3005] havoc ldv___platform_driver_register_10_#res; [L3005] havoc ldv___platform_driver_register_10_#t~ret88, ldv___platform_driver_register_10_~ldv_func_arg1.base, ldv___platform_driver_register_10_~ldv_func_arg1.offset, ldv___platform_driver_register_10_~ldv_func_arg2.base, ldv___platform_driver_register_10_~ldv_func_arg2.offset, ldv___platform_driver_register_10_~ldv_func_res~1, ldv___platform_driver_register_10_~tmp~19; [L3372-L3384] ldv___platform_driver_register_10_~ldv_func_arg1.base, ldv___platform_driver_register_10_~ldv_func_arg1.offset := ldv___platform_driver_register_10_#in~ldv_func_arg1.base, ldv___platform_driver_register_10_#in~ldv_func_arg1.offset; [L3372-L3384] ldv___platform_driver_register_10_~ldv_func_arg2.base, ldv___platform_driver_register_10_~ldv_func_arg2.offset := ldv___platform_driver_register_10_#in~ldv_func_arg2.base, ldv___platform_driver_register_10_#in~ldv_func_arg2.offset; [L3374] havoc ldv___platform_driver_register_10_~ldv_func_res~1; [L3375] havoc ldv___platform_driver_register_10_~tmp~19; [L3378] call ldv___platform_driver_register_10_#t~ret88 := __platform_driver_register(ldv___platform_driver_register_10_~ldv_func_arg1.base, ldv___platform_driver_register_10_~ldv_func_arg1.offset, ldv___platform_driver_register_10_~ldv_func_arg2.base, ldv___platform_driver_register_10_~ldv_func_arg2.offset); [L3378] assume -2147483648 <= ldv___platform_driver_register_10_#t~ret88 && ldv___platform_driver_register_10_#t~ret88 <= 2147483647; [L3378] ldv___platform_driver_register_10_~tmp~19 := ldv___platform_driver_register_10_#t~ret88; [L3378] havoc ldv___platform_driver_register_10_#t~ret88; [L3379] ldv___platform_driver_register_10_~ldv_func_res~1 := ldv___platform_driver_register_10_~tmp~19; [L3380] ~ldv_state_variable_2~0 := 1; [L3381] havoc ldv_platform_driver_init_2_#t~ret75.base, ldv_platform_driver_init_2_#t~ret75.offset, ldv_platform_driver_init_2_~tmp~16.base, ldv_platform_driver_init_2_~tmp~16.offset; [L3151] havoc ldv_platform_driver_init_2_~tmp~16.base, ldv_platform_driver_init_2_~tmp~16.offset; [L3154] ldv_init_zalloc_#in~size := 1472; [L3154] havoc ldv_init_zalloc_#res.base, ldv_init_zalloc_#res.offset; [L3154] havoc ldv_init_zalloc_#t~malloc16.base, ldv_init_zalloc_#t~malloc16.offset, ldv_init_zalloc_~size, ldv_init_zalloc_~p~2.base, ldv_init_zalloc_~p~2.offset, ldv_init_zalloc_~tmp~3.base, ldv_init_zalloc_~tmp~3.offset; [L2718-L2729] ldv_init_zalloc_~size := ldv_init_zalloc_#in~size; [L2720] havoc ldv_init_zalloc_~p~2.base, ldv_init_zalloc_~p~2.offset; [L2721] havoc ldv_init_zalloc_~tmp~3.base, ldv_init_zalloc_~tmp~3.offset; [L2724] call ldv_init_zalloc_#t~malloc16.base, ldv_init_zalloc_#t~malloc16.offset := #Ultimate.alloc((if ldv_init_zalloc_~size % 4294967296 % 4294967296 <= 2147483647 then ldv_init_zalloc_~size % 4294967296 % 4294967296 else ldv_init_zalloc_~size % 4294967296 % 4294967296 - 4294967296)); VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg1.base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2.base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#t~malloc16.base=-18446744073709551617, ldv_init_zalloc_#t~malloc16.offset=0, ldv_init_zalloc_~size=1472, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2724] CALL call #Ultimate.meminit(ldv_init_zalloc_#t~malloc16.base, ldv_init_zalloc_#t~malloc16.offset, 1, (if ldv_init_zalloc_~size % 4294967296 % 4294967296 <= 2147483647 then ldv_init_zalloc_~size % 4294967296 % 4294967296 else ldv_init_zalloc_~size % 4294967296 % 4294967296 - 4294967296), (if ldv_init_zalloc_~size % 4294967296 % 4294967296 <= 2147483647 then ldv_init_zalloc_~size % 4294967296 % 4294967296 else ldv_init_zalloc_~size % 4294967296 % 4294967296 - 4294967296)); VAL [#amountOfFields=1, #NULL.base=0, #NULL.offset=0, #product=1472, #ptr.base=-18446744073709551617, #ptr.offset=0, #sizeOfFields=1472, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); [?] ensures true; VAL [#amountOfFields=1, #NULL.base=0, #NULL.offset=0, #product=1472, #ptr.base=-18446744073709551617, #ptr.offset=0, #sizeOfFields=1472, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2724] RET call #Ultimate.meminit(ldv_init_zalloc_#t~malloc16.base, ldv_init_zalloc_#t~malloc16.offset, 1, (if ldv_init_zalloc_~size % 4294967296 % 4294967296 <= 2147483647 then ldv_init_zalloc_~size % 4294967296 % 4294967296 else ldv_init_zalloc_~size % 4294967296 % 4294967296 - 4294967296), (if ldv_init_zalloc_~size % 4294967296 % 4294967296 <= 2147483647 then ldv_init_zalloc_~size % 4294967296 % 4294967296 else ldv_init_zalloc_~size % 4294967296 % 4294967296 - 4294967296)); VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg1.base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2.base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#t~malloc16.base=-18446744073709551617, ldv_init_zalloc_#t~malloc16.offset=0, ldv_init_zalloc_~size=1472, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2724] ldv_init_zalloc_~tmp~3.base, ldv_init_zalloc_~tmp~3.offset := ldv_init_zalloc_#t~malloc16.base, ldv_init_zalloc_#t~malloc16.offset; [L2725] ldv_init_zalloc_~p~2.base, ldv_init_zalloc_~p~2.offset := ldv_init_zalloc_~tmp~3.base, ldv_init_zalloc_~tmp~3.offset; [L2726] assume 0 != (if 0 != (ldv_init_zalloc_~p~2.base + ldv_init_zalloc_~p~2.offset) % 18446744073709551616 then 1 else 0); [L2727] ldv_init_zalloc_#res.base, ldv_init_zalloc_#res.offset := ldv_init_zalloc_~p~2.base, ldv_init_zalloc_~p~2.offset; [L3154] ldv_platform_driver_init_2_#t~ret75.base, ldv_platform_driver_init_2_#t~ret75.offset := ldv_init_zalloc_#res.base, ldv_init_zalloc_#res.offset; [L3154] ldv_platform_driver_init_2_~tmp~16.base, ldv_platform_driver_init_2_~tmp~16.offset := ldv_platform_driver_init_2_#t~ret75.base, ldv_platform_driver_init_2_#t~ret75.offset; [L3154] havoc ldv_platform_driver_init_2_#t~ret75.base, ldv_platform_driver_init_2_#t~ret75.offset; [L3155] ~iio_interrupt_trigger_driver_group1~0.base, ~iio_interrupt_trigger_driver_group1~0.offset := ldv_platform_driver_init_2_~tmp~16.base, ldv_platform_driver_init_2_~tmp~16.offset; [L3382] ldv___platform_driver_register_10_#res := ldv___platform_driver_register_10_~ldv_func_res~1; [L3005] iio_interrupt_trigger_driver_init_#t~ret62 := ldv___platform_driver_register_10_#res; [L3005] assume -2147483648 <= iio_interrupt_trigger_driver_init_#t~ret62 && iio_interrupt_trigger_driver_init_#t~ret62 <= 2147483647; [L3005] iio_interrupt_trigger_driver_init_~tmp~13 := iio_interrupt_trigger_driver_init_#t~ret62; [L3005] havoc iio_interrupt_trigger_driver_init_#t~ret62; [L3006] iio_interrupt_trigger_driver_init_#res := iio_interrupt_trigger_driver_init_~tmp~13; [L3228] main_#t~ret80 := iio_interrupt_trigger_driver_init_#res; [L3228] assume -2147483648 <= main_#t~ret80 && main_#t~ret80 <= 2147483647; [L3228] ~ldv_retval_0~0 := main_#t~ret80; [L3228] havoc main_#t~ret80; [L3229-L3233] assume 0 == ~ldv_retval_0~0; [L3230] ~ldv_state_variable_0~0 := 3; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1.base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2.base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res.base=-18446744073709551617, ldv_init_zalloc_#res.offset=0, ldv_init_zalloc_#t~malloc16.base=-18446744073709551617, ldv_init_zalloc_#t~malloc16.offset=0, ldv_init_zalloc_~p~2.base=-18446744073709551617, ldv_init_zalloc_~p~2.offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3.base=-18446744073709551617, ldv_init_zalloc_~tmp~3.offset=0, ldv_platform_driver_init_2_~tmp~16.base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16.offset=0, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3234-L3239] assume !(0 != ~ldv_retval_0~0); VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1.base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2.base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res.base=-18446744073709551617, ldv_init_zalloc_#res.offset=0, ldv_init_zalloc_#t~malloc16.base=-18446744073709551617, ldv_init_zalloc_#t~malloc16.offset=0, ldv_init_zalloc_~p~2.base=-18446744073709551617, ldv_init_zalloc_~p~2.offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3.base=-18446744073709551617, ldv_init_zalloc_~tmp~3.offset=0, ldv_platform_driver_init_2_~tmp~16.base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16.offset=0, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3204] assume -2147483648 <= main_#t~nondet76 && main_#t~nondet76 <= 2147483647; [L3204] main_~tmp~17 := main_#t~nondet76; [L3204] havoc main_#t~nondet76; [L3206] main_#t~switch77 := 0 == main_~tmp~17; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1.base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2.base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res.base=-18446744073709551617, ldv_init_zalloc_#res.offset=0, ldv_init_zalloc_#t~malloc16.base=-18446744073709551617, ldv_init_zalloc_#t~malloc16.offset=0, ldv_init_zalloc_~p~2.base=-18446744073709551617, ldv_init_zalloc_~p~2.offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3.base=-18446744073709551617, ldv_init_zalloc_~tmp~3.offset=0, ldv_platform_driver_init_2_~tmp~16.base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16.offset=0, main_#t~switch77=false, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=2, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3206] assume !main_#t~switch77; [L3213] main_#t~switch77 := main_#t~switch77 || 1 == main_~tmp~17; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1.base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2.base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res.base=-18446744073709551617, ldv_init_zalloc_#res.offset=0, ldv_init_zalloc_#t~malloc16.base=-18446744073709551617, ldv_init_zalloc_#t~malloc16.offset=0, ldv_init_zalloc_~p~2.base=-18446744073709551617, ldv_init_zalloc_~p~2.offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3.base=-18446744073709551617, ldv_init_zalloc_~tmp~3.offset=0, ldv_platform_driver_init_2_~tmp~16.base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16.offset=0, main_#t~switch77=false, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=2, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3213] assume !main_#t~switch77; [L3252] main_#t~switch77 := main_#t~switch77 || 2 == main_~tmp~17; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1.base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2.base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res.base=-18446744073709551617, ldv_init_zalloc_#res.offset=0, ldv_init_zalloc_#t~malloc16.base=-18446744073709551617, ldv_init_zalloc_#t~malloc16.offset=0, ldv_init_zalloc_~p~2.base=-18446744073709551617, ldv_init_zalloc_~p~2.offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3.base=-18446744073709551617, ldv_init_zalloc_~tmp~3.offset=0, ldv_platform_driver_init_2_~tmp~16.base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16.offset=0, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=2, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3252] assume main_#t~switch77; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1.base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2.base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res.base=-18446744073709551617, ldv_init_zalloc_#res.offset=0, ldv_init_zalloc_#t~malloc16.base=-18446744073709551617, ldv_init_zalloc_#t~malloc16.offset=0, ldv_init_zalloc_~p~2.base=-18446744073709551617, ldv_init_zalloc_~p~2.offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3.base=-18446744073709551617, ldv_init_zalloc_~tmp~3.offset=0, ldv_platform_driver_init_2_~tmp~16.base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16.offset=0, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=2, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3253-L3302] assume 0 != ~ldv_state_variable_2~0; [L3254] assume -2147483648 <= main_#t~nondet81 && main_#t~nondet81 <= 2147483647; [L3254] main_~tmp___1~0 := main_#t~nondet81; [L3254] havoc main_#t~nondet81; [L3256] main_#t~switch82 := 0 == main_~tmp___1~0; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1.base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2.base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res.base=-18446744073709551617, ldv_init_zalloc_#res.offset=0, ldv_init_zalloc_#t~malloc16.base=-18446744073709551617, ldv_init_zalloc_#t~malloc16.offset=0, ldv_init_zalloc_~p~2.base=-18446744073709551617, ldv_init_zalloc_~p~2.offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3.base=-18446744073709551617, ldv_init_zalloc_~tmp~3.offset=0, ldv_platform_driver_init_2_~tmp~16.base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16.offset=0, main_#t~switch77=true, main_#t~switch79=true, main_#t~switch82=true, main_~tmp___0~4=1, main_~tmp___1~0=0, main_~tmp~17=2, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3256] assume main_#t~switch82; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1.base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2.base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res.base=-18446744073709551617, ldv_init_zalloc_#res.offset=0, ldv_init_zalloc_#t~malloc16.base=-18446744073709551617, ldv_init_zalloc_#t~malloc16.offset=0, ldv_init_zalloc_~p~2.base=-18446744073709551617, ldv_init_zalloc_~p~2.offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3.base=-18446744073709551617, ldv_init_zalloc_~tmp~3.offset=0, ldv_platform_driver_init_2_~tmp~16.base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16.offset=0, main_#t~switch77=true, main_#t~switch79=true, main_#t~switch82=true, main_~tmp___0~4=1, main_~tmp___1~0=0, main_~tmp~17=2, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3257-L3268] assume 1 == ~ldv_state_variable_2~0; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1.base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2.base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res.base=-18446744073709551617, ldv_init_zalloc_#res.offset=0, ldv_init_zalloc_#t~malloc16.base=-18446744073709551617, ldv_init_zalloc_#t~malloc16.offset=0, ldv_init_zalloc_~p~2.base=-18446744073709551617, ldv_init_zalloc_~p~2.offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3.base=-18446744073709551617, ldv_init_zalloc_~tmp~3.offset=0, ldv_platform_driver_init_2_~tmp~16.base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16.offset=0, main_#t~switch77=true, main_#t~switch79=true, main_#t~switch82=true, main_~tmp___0~4=1, main_~tmp___1~0=0, main_~tmp~17=2, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3258] CALL call main_#t~ret83 := iio_interrupt_trigger_probe(~iio_interrupt_trigger_driver_group1~0.base, ~iio_interrupt_trigger_driver_group1~0.offset); VAL [#in~pdev.base=-18446744073709551617, #in~pdev.offset=0, #NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0.base)=0, old(~ldv_irq_data_1_0~0.offset)=0, old(~ldv_irq_data_1_1~0.base)=0, old(~ldv_irq_data_1_1~0.offset)=0, old(~ldv_irq_data_1_2~0.base)=0, old(~ldv_irq_data_1_2~0.offset)=0, old(~ldv_irq_data_1_3~0.base)=0, old(~ldv_irq_data_1_3~0.offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2906-L2969] ~pdev.base, ~pdev.offset := #in~pdev.base, #in~pdev.offset; [L2908] havoc ~trig_info~0.base, ~trig_info~0.offset; [L2909] havoc ~trig~0.base, ~trig~0.offset; [L2910] havoc ~irqflags~0; [L2911] havoc ~irq_res~0.base, ~irq_res~0.offset; [L2912] havoc ~irq~0; [L2913] havoc ~ret~0; [L2914] havoc ~tmp~11.base, ~tmp~11.offset; [L2917] ~ret~0 := 0; [L2918] call #t~ret48.base, #t~ret48.offset := platform_get_resource(~pdev.base, ~pdev.offset, 1024, 0); [L2918] ~irq_res~0.base, ~irq_res~0.offset := #t~ret48.base, #t~ret48.offset; [L2918] havoc #t~ret48.base, #t~ret48.offset; VAL [#in~pdev.base=-18446744073709551617, #in~pdev.offset=0, #NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0.base)=0, old(~ldv_irq_data_1_0~0.offset)=0, old(~ldv_irq_data_1_1~0.base)=0, old(~ldv_irq_data_1_1~0.offset)=0, old(~ldv_irq_data_1_2~0.base)=0, old(~ldv_irq_data_1_2~0.offset)=0, old(~ldv_irq_data_1_3~0.base)=0, old(~ldv_irq_data_1_3~0.offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~pdev.base=-18446744073709551617, ~pdev.offset=0, ~probed_2~0=0, ~ref_cnt~0=0, ~ret~0=0] [L2919-L2923] assume !(0 == (~irq_res~0.base + ~irq_res~0.offset) % 18446744073709551616); [L2924] call #t~mem49 := read~int(~irq_res~0.base, 24 + ~irq_res~0.offset, 8); [L2924] ~irqflags~0 := ~bitwiseOr(~bitwiseAnd(#t~mem49, 15), 128); [L2924] havoc #t~mem49; [L2925] call #t~mem50 := read~int(~irq_res~0.base, ~irq_res~0.offset, 8); [L2925] ~irq~0 := (if #t~mem50 % 18446744073709551616 % 4294967296 <= 2147483647 then #t~mem50 % 18446744073709551616 % 4294967296 else #t~mem50 % 18446744073709551616 % 4294967296 - 4294967296); [L2925] havoc #t~mem50; [L2926] havoc #t~nondet51.base, #t~nondet51.offset; [L2926] ~trig~0.base, ~trig~0.offset := #t~nondet51.base, #t~nondet51.offset; VAL [#in~pdev.base=-18446744073709551617, #in~pdev.offset=0, #NULL.base=0, #NULL.offset=0, #t~nondet51.base=-171646953605867377786880, #t~nondet51.offset=-21693371030682432700415, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0.base)=0, old(~ldv_irq_data_1_0~0.offset)=0, old(~ldv_irq_data_1_1~0.base)=0, old(~ldv_irq_data_1_1~0.offset)=0, old(~ldv_irq_data_1_2~0.base)=0, old(~ldv_irq_data_1_2~0.offset)=0, old(~ldv_irq_data_1_3~0.base)=0, old(~ldv_irq_data_1_3~0.offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~irq_res~0.base=-18446744073709551617, ~irq_res~0.offset=-174432411960997520080894, ~irq~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~pdev.base=-18446744073709551617, ~pdev.offset=0, ~probed_2~0=0, ~ref_cnt~0=0, ~ret~0=0, ~trig~0.base=-171646953605867377786880, ~trig~0.offset=-21693371030682432700415] [L2927-L2932] assume !(0 == (~trig~0.base + ~trig~0.offset) % 18446744073709551616); [L2933] kzalloc_#in~size, kzalloc_#in~flags := 4, 208; [L2933] havoc kzalloc_#res.base, kzalloc_#res.offset; [L2933] havoc kzalloc_#t~ret7.base, kzalloc_#t~ret7.offset, kzalloc_~size, kzalloc_~flags, kzalloc_~tmp~0.base, kzalloc_~tmp~0.offset; [L2667-L2675] kzalloc_~size := kzalloc_#in~size; [L2667-L2675] kzalloc_~flags := kzalloc_#in~flags; [L2669] havoc kzalloc_~tmp~0.base, kzalloc_~tmp~0.offset; [L2672] kmalloc_#in~size, kmalloc_#in~flags := kzalloc_~size, ~bitwiseOr(kzalloc_~flags, 32768); [L2672] havoc kmalloc_#res.base, kmalloc_#res.offset; [L2672] havoc kmalloc_#t~ret6.base, kmalloc_#t~ret6.offset, kmalloc_~size, kmalloc_~flags, kmalloc_~tmp___2~0.base, kmalloc_~tmp___2~0.offset; [L2658-L2666] kmalloc_~size := kmalloc_#in~size; [L2658-L2666] kmalloc_~flags := kmalloc_#in~flags; [L2660] havoc kmalloc_~tmp___2~0.base, kmalloc_~tmp___2~0.offset; [L2663] __kmalloc_#in~size, __kmalloc_#in~t := kmalloc_~size, kmalloc_~flags; [L2663] havoc __kmalloc_#res.base, __kmalloc_#res.offset; [L2663] havoc __kmalloc_#t~ret5.base, __kmalloc_#t~ret5.offset, __kmalloc_~size, __kmalloc_~t; [L2654-L2657] __kmalloc_~size := __kmalloc_#in~size; [L2654-L2657] __kmalloc_~t := __kmalloc_#in~t; [L2656] ldv_malloc_#in~size := __kmalloc_~size; [L2656] havoc ldv_malloc_#res.base, ldv_malloc_#res.offset; [L2656] havoc ldv_malloc_#t~nondet12, ldv_malloc_#t~malloc13.base, ldv_malloc_#t~malloc13.offset, ldv_malloc_~size, ldv_malloc_~p~0.base, ldv_malloc_~p~0.offset, ldv_malloc_~tmp~1.base, ldv_malloc_~tmp~1.offset, ldv_malloc_~tmp___0~0; [L2682-L2699] ldv_malloc_~size := ldv_malloc_#in~size; [L2684] havoc ldv_malloc_~p~0.base, ldv_malloc_~p~0.offset; [L2685] havoc ldv_malloc_~tmp~1.base, ldv_malloc_~tmp~1.offset; [L2686] havoc ldv_malloc_~tmp___0~0; [L2689] assume -2147483648 <= ldv_malloc_#t~nondet12 && ldv_malloc_#t~nondet12 <= 2147483647; [L2689] ldv_malloc_~tmp___0~0 := ldv_malloc_#t~nondet12; [L2689] havoc ldv_malloc_#t~nondet12; [L2690-L2697] assume 0 != ldv_malloc_~tmp___0~0; [L2691] ldv_malloc_#res.base, ldv_malloc_#res.offset := 0, 0; [L2656] __kmalloc_#t~ret5.base, __kmalloc_#t~ret5.offset := ldv_malloc_#res.base, ldv_malloc_#res.offset; [L2656] __kmalloc_#res.base, __kmalloc_#res.offset := __kmalloc_#t~ret5.base, __kmalloc_#t~ret5.offset; [L2656] havoc __kmalloc_#t~ret5.base, __kmalloc_#t~ret5.offset; [L2663] kmalloc_#t~ret6.base, kmalloc_#t~ret6.offset := __kmalloc_#res.base, __kmalloc_#res.offset; [L2663] kmalloc_~tmp___2~0.base, kmalloc_~tmp___2~0.offset := kmalloc_#t~ret6.base, kmalloc_#t~ret6.offset; [L2663] havoc kmalloc_#t~ret6.base, kmalloc_#t~ret6.offset; [L2664] kmalloc_#res.base, kmalloc_#res.offset := kmalloc_~tmp___2~0.base, kmalloc_~tmp___2~0.offset; [L2672] kzalloc_#t~ret7.base, kzalloc_#t~ret7.offset := kmalloc_#res.base, kmalloc_#res.offset; [L2672] kzalloc_~tmp~0.base, kzalloc_~tmp~0.offset := kzalloc_#t~ret7.base, kzalloc_#t~ret7.offset; [L2672] havoc kzalloc_#t~ret7.base, kzalloc_#t~ret7.offset; [L2673] kzalloc_#res.base, kzalloc_#res.offset := kzalloc_~tmp~0.base, kzalloc_~tmp~0.offset; [L2933] #t~ret53.base, #t~ret53.offset := kzalloc_#res.base, kzalloc_#res.offset; [L2933] ~tmp~11.base, ~tmp~11.offset := #t~ret53.base, #t~ret53.offset; [L2933] havoc #t~ret53.base, #t~ret53.offset; [L2934] ~trig_info~0.base, ~trig_info~0.offset := ~tmp~11.base, ~tmp~11.offset; VAL [#in~pdev.base=-18446744073709551617, #in~pdev.offset=0, #NULL.base=0, #NULL.offset=0, #t~nondet51.base=-171646953605867377786880, #t~nondet51.offset=-21693371030682432700415, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, __kmalloc_#in~size=4, __kmalloc_#in~t=57, __kmalloc_#res.base=0, __kmalloc_#res.offset=0, __kmalloc_~size=4, __kmalloc_~t=57, kmalloc_#in~flags=57, kmalloc_#in~size=4, kmalloc_#res.base=0, kmalloc_#res.offset=0, kmalloc_~flags=57, kmalloc_~size=4, kmalloc_~tmp___2~0.base=0, kmalloc_~tmp___2~0.offset=0, kzalloc_#in~flags=208, kzalloc_#in~size=4, kzalloc_#res.base=0, kzalloc_#res.offset=0, kzalloc_~flags=208, kzalloc_~size=4, kzalloc_~tmp~0.base=0, kzalloc_~tmp~0.offset=0, ldv_malloc_#in~size=4, ldv_malloc_#res.base=0, ldv_malloc_#res.offset=0, ldv_malloc_#t~malloc13.base=47, ldv_malloc_#t~malloc13.offset=55, ldv_malloc_~p~0.base=18446744073709551616, ldv_malloc_~p~0.offset=0, ldv_malloc_~size=4, ldv_malloc_~tmp___0~0=-1, ldv_malloc_~tmp~1.base=54, ldv_malloc_~tmp~1.offset=53, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0.base)=0, old(~ldv_irq_data_1_0~0.offset)=0, old(~ldv_irq_data_1_1~0.base)=0, old(~ldv_irq_data_1_1~0.offset)=0, old(~ldv_irq_data_1_2~0.base)=0, old(~ldv_irq_data_1_2~0.offset)=0, old(~ldv_irq_data_1_3~0.base)=0, old(~ldv_irq_data_1_3~0.offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~irq_res~0.base=-18446744073709551617, ~irq_res~0.offset=-174432411960997520080894, ~irq~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~pdev.base=-18446744073709551617, ~pdev.offset=0, ~probed_2~0=0, ~ref_cnt~0=0, ~ret~0=0, ~tmp~11.base=0, ~tmp~11.offset=0, ~trig_info~0.base=0, ~trig_info~0.offset=0, ~trig~0.base=-171646953605867377786880, ~trig~0.offset=-21693371030682432700415] [L2935-L2940] assume 0 == (~trig_info~0.base + ~trig_info~0.offset) % 18446744073709551616; [L2936] ~ret~0 := -12; VAL [#in~pdev.base=-18446744073709551617, #in~pdev.offset=0, #NULL.base=0, #NULL.offset=0, #t~nondet51.base=-171646953605867377786880, #t~nondet51.offset=-21693371030682432700415, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, __kmalloc_#in~size=4, __kmalloc_#in~t=57, __kmalloc_#res.base=0, __kmalloc_#res.offset=0, __kmalloc_~size=4, __kmalloc_~t=57, kmalloc_#in~flags=57, kmalloc_#in~size=4, kmalloc_#res.base=0, kmalloc_#res.offset=0, kmalloc_~flags=57, kmalloc_~size=4, kmalloc_~tmp___2~0.base=0, kmalloc_~tmp___2~0.offset=0, kzalloc_#in~flags=208, kzalloc_#in~size=4, kzalloc_#res.base=0, kzalloc_#res.offset=0, kzalloc_~flags=208, kzalloc_~size=4, kzalloc_~tmp~0.base=0, kzalloc_~tmp~0.offset=0, ldv_malloc_#in~size=4, ldv_malloc_#res.base=0, ldv_malloc_#res.offset=0, ldv_malloc_#t~malloc13.base=47, ldv_malloc_#t~malloc13.offset=55, ldv_malloc_~p~0.base=18446744073709551616, ldv_malloc_~p~0.offset=0, ldv_malloc_~size=4, ldv_malloc_~tmp___0~0=-1, ldv_malloc_~tmp~1.base=54, ldv_malloc_~tmp~1.offset=53, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0.base)=0, old(~ldv_irq_data_1_0~0.offset)=0, old(~ldv_irq_data_1_1~0.base)=0, old(~ldv_irq_data_1_1~0.offset)=0, old(~ldv_irq_data_1_2~0.base)=0, old(~ldv_irq_data_1_2~0.offset)=0, old(~ldv_irq_data_1_3~0.base)=0, old(~ldv_irq_data_1_3~0.offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~irq_res~0.base=-18446744073709551617, ~irq_res~0.offset=-174432411960997520080894, ~irq~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~pdev.base=-18446744073709551617, ~pdev.offset=0, ~probed_2~0=0, ~ref_cnt~0=0, ~ret~0=-12, ~tmp~11.base=0, ~tmp~11.offset=0, ~trig_info~0.base=0, ~trig_info~0.offset=0, ~trig~0.base=-171646953605867377786880, ~trig~0.offset=-21693371030682432700415] [L2965] CALL call iio_trigger_put(~trig~0.base, ~trig~0.offset); VAL [#in~trig.base=-171646953605867377786880, #in~trig.offset=-21693371030682432700415, #NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0.base)=0, old(~ldv_irq_data_1_0~0.offset)=0, old(~ldv_irq_data_1_1~0.base)=0, old(~ldv_irq_data_1_1~0.offset)=0, old(~ldv_irq_data_1_2~0.base)=0, old(~ldv_irq_data_1_2~0.offset)=0, old(~ldv_irq_data_1_3~0.base)=0, old(~ldv_irq_data_1_3~0.offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2864-L2873] ~trig.base, ~trig.offset := #in~trig.base, #in~trig.offset; [L2869] call #t~mem41.base, #t~mem41.offset := read~$Pointer$(~trig.base, ~trig.offset, 8); [L2869] call #t~mem42.base, #t~mem42.offset := read~$Pointer$(#t~mem41.base, #t~mem41.offset, 8); [L2869] ldv_module_put_5_#in~ldv_func_arg1.base, ldv_module_put_5_#in~ldv_func_arg1.offset := #t~mem42.base, #t~mem42.offset; [L2869] havoc ldv_module_put_5_~ldv_func_arg1.base, ldv_module_put_5_~ldv_func_arg1.offset; [L3314-L3322] ldv_module_put_5_~ldv_func_arg1.base, ldv_module_put_5_~ldv_func_arg1.offset := ldv_module_put_5_#in~ldv_func_arg1.base, ldv_module_put_5_#in~ldv_func_arg1.offset; VAL [#in~trig.base=-171646953605867377786880, #in~trig.offset=-21693371030682432700415, #NULL.base=0, #NULL.offset=0, #t~mem41.base=45, #t~mem41.offset=39, #t~mem42.base=-552, #t~mem42.offset=-18446744073709551023, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, ldv_module_put_5_#in~ldv_func_arg1.base=-552, ldv_module_put_5_#in~ldv_func_arg1.offset=-18446744073709551023, ldv_module_put_5_~ldv_func_arg1.base=-552, ldv_module_put_5_~ldv_func_arg1.offset=-18446744073709551023, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0.base)=0, old(~ldv_irq_data_1_0~0.offset)=0, old(~ldv_irq_data_1_1~0.base)=0, old(~ldv_irq_data_1_1~0.offset)=0, old(~ldv_irq_data_1_2~0.base)=0, old(~ldv_irq_data_1_2~0.offset)=0, old(~ldv_irq_data_1_3~0.base)=0, old(~ldv_irq_data_1_3~0.offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0, ~trig.base=-171646953605867377786880, ~trig.offset=-21693371030682432700415] [L3319] CALL call ldv_module_put(ldv_module_put_5_~ldv_func_arg1.base, ldv_module_put_5_~ldv_func_arg1.offset); VAL [#in~module.base=-552, #in~module.offset=-18446744073709551023, #NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0.base)=0, old(~ldv_irq_data_1_0~0.offset)=0, old(~ldv_irq_data_1_1~0.base)=0, old(~ldv_irq_data_1_1~0.offset)=0, old(~ldv_irq_data_1_2~0.base)=0, old(~ldv_irq_data_1_2~0.offset)=0, old(~ldv_irq_data_1_3~0.base)=0, old(~ldv_irq_data_1_3~0.offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3481-L3498] ~module.base, ~module.offset := #in~module.base, #in~module.offset; VAL [#in~module.base=-552, #in~module.offset=-18446744073709551023, #NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0.base)=0, old(~ldv_irq_data_1_0~0.offset)=0, old(~ldv_irq_data_1_1~0.base)=0, old(~ldv_irq_data_1_1~0.offset)=0, old(~ldv_irq_data_1_2~0.base)=0, old(~ldv_irq_data_1_2~0.offset)=0, old(~ldv_irq_data_1_3~0.base)=0, old(~ldv_irq_data_1_3~0.offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~module.base=-552, ~module.offset=-18446744073709551023, ~probed_2~0=0, ~ref_cnt~0=0] [L3486-L3495] assume 0 != (~module.base + ~module.offset) % 18446744073709551616; VAL [#in~module.base=-552, #in~module.offset=-18446744073709551023, #NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0.base)=0, old(~ldv_irq_data_1_0~0.offset)=0, old(~ldv_irq_data_1_1~0.base)=0, old(~ldv_irq_data_1_1~0.offset)=0, old(~ldv_irq_data_1_2~0.base)=0, old(~ldv_irq_data_1_2~0.offset)=0, old(~ldv_irq_data_1_3~0.base)=0, old(~ldv_irq_data_1_3~0.offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~module.base=-552, ~module.offset=-18446744073709551023, ~probed_2~0=0, ~ref_cnt~0=0] [L3487-L3491] assume ~ldv_module_refcounter~0 <= 1; VAL [#in~module.base=-552, #in~module.offset=-18446744073709551023, #NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0.base)=0, old(~ldv_irq_data_1_0~0.offset)=0, old(~ldv_irq_data_1_1~0.base)=0, old(~ldv_irq_data_1_1~0.offset)=0, old(~ldv_irq_data_1_2~0.base)=0, old(~ldv_irq_data_1_2~0.offset)=0, old(~ldv_irq_data_1_3~0.base)=0, old(~ldv_irq_data_1_3~0.offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~module.base=-552, ~module.offset=-18446744073709551023, ~probed_2~0=0, ~ref_cnt~0=0] [L3488] CALL call ldv_error(); VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0.base)=0, old(~ldv_irq_data_1_0~0.offset)=0, old(~ldv_irq_data_1_1~0.base)=0, old(~ldv_irq_data_1_1~0.offset)=0, old(~ldv_irq_data_1_2~0.base)=0, old(~ldv_irq_data_1_2~0.offset)=0, old(~ldv_irq_data_1_3~0.base)=0, old(~ldv_irq_data_1_3~0.offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3402] assert false; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0.base)=0, old(~ldv_irq_data_1_0~0.offset)=0, old(~ldv_irq_data_1_1~0.base)=0, old(~ldv_irq_data_1_1~0.offset)=0, old(~ldv_irq_data_1_2~0.base)=0, old(~ldv_irq_data_1_2~0.offset)=0, old(~ldv_irq_data_1_3~0.base)=0, old(~ldv_irq_data_1_3~0.offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] #NULL.base, #NULL.offset := 0, 0; [?] #valid := #valid[0 := 0]; [L2926] call #t~string52.base, #t~string52.offset := #Ultimate.alloc(10); [L2947] call #t~string56.base, #t~string56.offset := #Ultimate.alloc(22); [L2990] call #t~string61.base, #t~string61.offset := #Ultimate.alloc(22); [L2775] ~ldv_irq_1_2~0 := 0; [L2776] ~LDV_IN_INTERRUPT~0 := 1; [L2777] ~ldv_irq_1_3~0 := 0; [L2778] ~ldv_irq_data_1_1~0.base, ~ldv_irq_data_1_1~0.offset := 0, 0; [L2779] ~ldv_irq_1_1~0 := 0; [L2780] ~ldv_irq_1_0~0 := 0; [L2781] ~probed_2~0 := 0; [L2782] ~ldv_irq_line_1_3~0 := 0; [L2783] ~ldv_irq_data_1_0~0.base, ~ldv_irq_data_1_0~0.offset := 0, 0; [L2784] ~ldv_state_variable_0~0 := 0; [L2785] ~ldv_irq_line_1_0~0 := 0; [L2786] ~ldv_state_variable_2~0 := 0; [L2787] ~ldv_irq_data_1_3~0.base, ~ldv_irq_data_1_3~0.offset := 0, 0; [L2788] ~ref_cnt~0 := 0; [L2789] ~ldv_irq_line_1_1~0 := 0; [L2791] ~ldv_irq_data_1_2~0.base, ~ldv_irq_data_1_2~0.offset := 0, 0; [L2792] ~ldv_state_variable_1~0 := 0; [L2793] ~ldv_irq_line_1_2~0 := 0; [L3018] ~ldv_retval_0~0 := 0; [L3019] ~ldv_retval_1~0 := 0; [L3022] ~ldv_retval_2~0 := 0; [L3448] ~ldv_module_refcounter~0 := 1; [L2790] ~iio_interrupt_trigger_driver_group1~0.base, ~iio_interrupt_trigger_driver_group1~0.offset := 0, 0; [L2905] call ~#iio_interrupt_trigger_ops~0.base, ~#iio_interrupt_trigger_ops~0.offset := #Ultimate.alloc(32); [L2905] call write~init~$Pointer$(~#__this_module~0.base, ~#__this_module~0.offset, ~#iio_interrupt_trigger_ops~0.base, ~#iio_interrupt_trigger_ops~0.offset, 8); [L2905] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_ops~0.base, 8 + ~#iio_interrupt_trigger_ops~0.offset, 8); [L2905] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_ops~0.base, 16 + ~#iio_interrupt_trigger_ops~0.offset, 8); [L2905] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_ops~0.base, 24 + ~#iio_interrupt_trigger_ops~0.offset, 8); [L2989-L2999] call ~#iio_interrupt_trigger_driver~0.base, ~#iio_interrupt_trigger_driver~0.offset := #Ultimate.alloc(166); [L2989-L2999] call write~init~$Pointer$(#funAddr~iio_interrupt_trigger_probe.base, #funAddr~iio_interrupt_trigger_probe.offset, ~#iio_interrupt_trigger_driver~0.base, ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(#funAddr~iio_interrupt_trigger_remove.base, #funAddr~iio_interrupt_trigger_remove.offset, ~#iio_interrupt_trigger_driver~0.base, 8 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 16 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 24 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 32 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(#t~string61.base, #t~string61.offset, ~#iio_interrupt_trigger_driver~0.base, 40 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 48 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 56 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 64 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~int(0, ~#iio_interrupt_trigger_driver~0.base, 72 + ~#iio_interrupt_trigger_driver~0.offset, 1); [L2989-L2999] call write~init~int(0, ~#iio_interrupt_trigger_driver~0.base, 73 + ~#iio_interrupt_trigger_driver~0.offset, 4); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 77 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 85 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 93 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 101 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 109 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 117 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 125 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 133 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 141 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 149 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~$Pointer$(0, 0, ~#iio_interrupt_trigger_driver~0.base, 157 + ~#iio_interrupt_trigger_driver~0.offset, 8); [L2989-L2999] call write~init~int(0, ~#iio_interrupt_trigger_driver~0.base, 165 + ~#iio_interrupt_trigger_driver~0.offset, 1); [?] havoc main_#res; [?] havoc main_#t~nondet76, main_#t~switch77, main_#t~nondet78, main_#t~switch79, main_#t~ret80, main_#t~nondet81, main_#t~switch82, main_#t~ret83, main_#t~ret84, main_#t~ret85, main_~tmp~17, main_~tmp___0~4, main_~tmp___1~0; [L3193] havoc main_~tmp~17; [L3194] havoc main_~tmp___0~4; [L3195] havoc main_~tmp___1~0; [L3198] call ldv_initialize(); [L3199] ~ldv_state_variable_1~0 := 1; [L3200] ~ref_cnt~0 := 0; [L3201] ~ldv_state_variable_0~0 := 1; [L3202] ~ldv_state_variable_2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3204] assume -2147483648 <= main_#t~nondet76 && main_#t~nondet76 <= 2147483647; [L3204] main_~tmp~17 := main_#t~nondet76; [L3204] havoc main_#t~nondet76; [L3206] main_#t~switch77 := 0 == main_~tmp~17; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, main_#t~switch77=false, main_~tmp~17=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3206] assume !main_#t~switch77; [L3213] main_#t~switch77 := main_#t~switch77 || 1 == main_~tmp~17; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, main_#t~switch77=true, main_~tmp~17=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3213] assume main_#t~switch77; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, main_#t~switch77=true, main_~tmp~17=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3214-L3250] assume 0 != ~ldv_state_variable_0~0; [L3215] assume -2147483648 <= main_#t~nondet78 && main_#t~nondet78 <= 2147483647; [L3215] main_~tmp___0~4 := main_#t~nondet78; [L3215] havoc main_#t~nondet78; [L3217] main_#t~switch79 := 0 == main_~tmp___0~4; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, main_#t~switch77=true, main_#t~switch79=false, main_~tmp___0~4=1, main_~tmp~17=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3217] assume !main_#t~switch79; [L3226] main_#t~switch79 := main_#t~switch79 || 1 == main_~tmp___0~4; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3226] assume main_#t~switch79; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3227-L3242] assume 1 == ~ldv_state_variable_0~0; [L3228] havoc iio_interrupt_trigger_driver_init_#res; [L3228] havoc iio_interrupt_trigger_driver_init_#t~ret62, iio_interrupt_trigger_driver_init_~tmp~13; [L3002] havoc iio_interrupt_trigger_driver_init_~tmp~13; [L3005] ldv___platform_driver_register_10_#in~ldv_func_arg1.base, ldv___platform_driver_register_10_#in~ldv_func_arg1.offset, ldv___platform_driver_register_10_#in~ldv_func_arg2.base, ldv___platform_driver_register_10_#in~ldv_func_arg2.offset := ~#iio_interrupt_trigger_driver~0.base, ~#iio_interrupt_trigger_driver~0.offset, ~#__this_module~0.base, ~#__this_module~0.offset; [L3005] havoc ldv___platform_driver_register_10_#res; [L3005] havoc ldv___platform_driver_register_10_#t~ret88, ldv___platform_driver_register_10_~ldv_func_arg1.base, ldv___platform_driver_register_10_~ldv_func_arg1.offset, ldv___platform_driver_register_10_~ldv_func_arg2.base, ldv___platform_driver_register_10_~ldv_func_arg2.offset, ldv___platform_driver_register_10_~ldv_func_res~1, ldv___platform_driver_register_10_~tmp~19; [L3372-L3384] ldv___platform_driver_register_10_~ldv_func_arg1.base, ldv___platform_driver_register_10_~ldv_func_arg1.offset := ldv___platform_driver_register_10_#in~ldv_func_arg1.base, ldv___platform_driver_register_10_#in~ldv_func_arg1.offset; [L3372-L3384] ldv___platform_driver_register_10_~ldv_func_arg2.base, ldv___platform_driver_register_10_~ldv_func_arg2.offset := ldv___platform_driver_register_10_#in~ldv_func_arg2.base, ldv___platform_driver_register_10_#in~ldv_func_arg2.offset; [L3374] havoc ldv___platform_driver_register_10_~ldv_func_res~1; [L3375] havoc ldv___platform_driver_register_10_~tmp~19; [L3378] call ldv___platform_driver_register_10_#t~ret88 := __platform_driver_register(ldv___platform_driver_register_10_~ldv_func_arg1.base, ldv___platform_driver_register_10_~ldv_func_arg1.offset, ldv___platform_driver_register_10_~ldv_func_arg2.base, ldv___platform_driver_register_10_~ldv_func_arg2.offset); [L3378] assume -2147483648 <= ldv___platform_driver_register_10_#t~ret88 && ldv___platform_driver_register_10_#t~ret88 <= 2147483647; [L3378] ldv___platform_driver_register_10_~tmp~19 := ldv___platform_driver_register_10_#t~ret88; [L3378] havoc ldv___platform_driver_register_10_#t~ret88; [L3379] ldv___platform_driver_register_10_~ldv_func_res~1 := ldv___platform_driver_register_10_~tmp~19; [L3380] ~ldv_state_variable_2~0 := 1; [L3381] havoc ldv_platform_driver_init_2_#t~ret75.base, ldv_platform_driver_init_2_#t~ret75.offset, ldv_platform_driver_init_2_~tmp~16.base, ldv_platform_driver_init_2_~tmp~16.offset; [L3151] havoc ldv_platform_driver_init_2_~tmp~16.base, ldv_platform_driver_init_2_~tmp~16.offset; [L3154] ldv_init_zalloc_#in~size := 1472; [L3154] havoc ldv_init_zalloc_#res.base, ldv_init_zalloc_#res.offset; [L3154] havoc ldv_init_zalloc_#t~malloc16.base, ldv_init_zalloc_#t~malloc16.offset, ldv_init_zalloc_~size, ldv_init_zalloc_~p~2.base, ldv_init_zalloc_~p~2.offset, ldv_init_zalloc_~tmp~3.base, ldv_init_zalloc_~tmp~3.offset; [L2718-L2729] ldv_init_zalloc_~size := ldv_init_zalloc_#in~size; [L2720] havoc ldv_init_zalloc_~p~2.base, ldv_init_zalloc_~p~2.offset; [L2721] havoc ldv_init_zalloc_~tmp~3.base, ldv_init_zalloc_~tmp~3.offset; [L2724] call ldv_init_zalloc_#t~malloc16.base, ldv_init_zalloc_#t~malloc16.offset := #Ultimate.alloc((if ldv_init_zalloc_~size % 4294967296 % 4294967296 <= 2147483647 then ldv_init_zalloc_~size % 4294967296 % 4294967296 else ldv_init_zalloc_~size % 4294967296 % 4294967296 - 4294967296)); VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg1.base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2.base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#t~malloc16.base=-18446744073709551617, ldv_init_zalloc_#t~malloc16.offset=0, ldv_init_zalloc_~size=1472, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2724] CALL call #Ultimate.meminit(ldv_init_zalloc_#t~malloc16.base, ldv_init_zalloc_#t~malloc16.offset, 1, (if ldv_init_zalloc_~size % 4294967296 % 4294967296 <= 2147483647 then ldv_init_zalloc_~size % 4294967296 % 4294967296 else ldv_init_zalloc_~size % 4294967296 % 4294967296 - 4294967296), (if ldv_init_zalloc_~size % 4294967296 % 4294967296 <= 2147483647 then ldv_init_zalloc_~size % 4294967296 % 4294967296 else ldv_init_zalloc_~size % 4294967296 % 4294967296 - 4294967296)); VAL [#amountOfFields=1, #NULL.base=0, #NULL.offset=0, #product=1472, #ptr.base=-18446744073709551617, #ptr.offset=0, #sizeOfFields=1472, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr.base); [?] ensures true; VAL [#amountOfFields=1, #NULL.base=0, #NULL.offset=0, #product=1472, #ptr.base=-18446744073709551617, #ptr.offset=0, #sizeOfFields=1472, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2724] RET call #Ultimate.meminit(ldv_init_zalloc_#t~malloc16.base, ldv_init_zalloc_#t~malloc16.offset, 1, (if ldv_init_zalloc_~size % 4294967296 % 4294967296 <= 2147483647 then ldv_init_zalloc_~size % 4294967296 % 4294967296 else ldv_init_zalloc_~size % 4294967296 % 4294967296 - 4294967296), (if ldv_init_zalloc_~size % 4294967296 % 4294967296 <= 2147483647 then ldv_init_zalloc_~size % 4294967296 % 4294967296 else ldv_init_zalloc_~size % 4294967296 % 4294967296 - 4294967296)); VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg1.base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2.base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#t~malloc16.base=-18446744073709551617, ldv_init_zalloc_#t~malloc16.offset=0, ldv_init_zalloc_~size=1472, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=0, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2724] ldv_init_zalloc_~tmp~3.base, ldv_init_zalloc_~tmp~3.offset := ldv_init_zalloc_#t~malloc16.base, ldv_init_zalloc_#t~malloc16.offset; [L2725] ldv_init_zalloc_~p~2.base, ldv_init_zalloc_~p~2.offset := ldv_init_zalloc_~tmp~3.base, ldv_init_zalloc_~tmp~3.offset; [L2726] assume 0 != (if 0 != (ldv_init_zalloc_~p~2.base + ldv_init_zalloc_~p~2.offset) % 18446744073709551616 then 1 else 0); [L2727] ldv_init_zalloc_#res.base, ldv_init_zalloc_#res.offset := ldv_init_zalloc_~p~2.base, ldv_init_zalloc_~p~2.offset; [L3154] ldv_platform_driver_init_2_#t~ret75.base, ldv_platform_driver_init_2_#t~ret75.offset := ldv_init_zalloc_#res.base, ldv_init_zalloc_#res.offset; [L3154] ldv_platform_driver_init_2_~tmp~16.base, ldv_platform_driver_init_2_~tmp~16.offset := ldv_platform_driver_init_2_#t~ret75.base, ldv_platform_driver_init_2_#t~ret75.offset; [L3154] havoc ldv_platform_driver_init_2_#t~ret75.base, ldv_platform_driver_init_2_#t~ret75.offset; [L3155] ~iio_interrupt_trigger_driver_group1~0.base, ~iio_interrupt_trigger_driver_group1~0.offset := ldv_platform_driver_init_2_~tmp~16.base, ldv_platform_driver_init_2_~tmp~16.offset; [L3382] ldv___platform_driver_register_10_#res := ldv___platform_driver_register_10_~ldv_func_res~1; [L3005] iio_interrupt_trigger_driver_init_#t~ret62 := ldv___platform_driver_register_10_#res; [L3005] assume -2147483648 <= iio_interrupt_trigger_driver_init_#t~ret62 && iio_interrupt_trigger_driver_init_#t~ret62 <= 2147483647; [L3005] iio_interrupt_trigger_driver_init_~tmp~13 := iio_interrupt_trigger_driver_init_#t~ret62; [L3005] havoc iio_interrupt_trigger_driver_init_#t~ret62; [L3006] iio_interrupt_trigger_driver_init_#res := iio_interrupt_trigger_driver_init_~tmp~13; [L3228] main_#t~ret80 := iio_interrupt_trigger_driver_init_#res; [L3228] assume -2147483648 <= main_#t~ret80 && main_#t~ret80 <= 2147483647; [L3228] ~ldv_retval_0~0 := main_#t~ret80; [L3228] havoc main_#t~ret80; [L3229-L3233] assume 0 == ~ldv_retval_0~0; [L3230] ~ldv_state_variable_0~0 := 3; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1.base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2.base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res.base=-18446744073709551617, ldv_init_zalloc_#res.offset=0, ldv_init_zalloc_#t~malloc16.base=-18446744073709551617, ldv_init_zalloc_#t~malloc16.offset=0, ldv_init_zalloc_~p~2.base=-18446744073709551617, ldv_init_zalloc_~p~2.offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3.base=-18446744073709551617, ldv_init_zalloc_~tmp~3.offset=0, ldv_platform_driver_init_2_~tmp~16.base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16.offset=0, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3234-L3239] assume !(0 != ~ldv_retval_0~0); VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1.base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2.base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res.base=-18446744073709551617, ldv_init_zalloc_#res.offset=0, ldv_init_zalloc_#t~malloc16.base=-18446744073709551617, ldv_init_zalloc_#t~malloc16.offset=0, ldv_init_zalloc_~p~2.base=-18446744073709551617, ldv_init_zalloc_~p~2.offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3.base=-18446744073709551617, ldv_init_zalloc_~tmp~3.offset=0, ldv_platform_driver_init_2_~tmp~16.base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16.offset=0, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3204] assume -2147483648 <= main_#t~nondet76 && main_#t~nondet76 <= 2147483647; [L3204] main_~tmp~17 := main_#t~nondet76; [L3204] havoc main_#t~nondet76; [L3206] main_#t~switch77 := 0 == main_~tmp~17; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1.base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2.base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res.base=-18446744073709551617, ldv_init_zalloc_#res.offset=0, ldv_init_zalloc_#t~malloc16.base=-18446744073709551617, ldv_init_zalloc_#t~malloc16.offset=0, ldv_init_zalloc_~p~2.base=-18446744073709551617, ldv_init_zalloc_~p~2.offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3.base=-18446744073709551617, ldv_init_zalloc_~tmp~3.offset=0, ldv_platform_driver_init_2_~tmp~16.base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16.offset=0, main_#t~switch77=false, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=2, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3206] assume !main_#t~switch77; [L3213] main_#t~switch77 := main_#t~switch77 || 1 == main_~tmp~17; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1.base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2.base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res.base=-18446744073709551617, ldv_init_zalloc_#res.offset=0, ldv_init_zalloc_#t~malloc16.base=-18446744073709551617, ldv_init_zalloc_#t~malloc16.offset=0, ldv_init_zalloc_~p~2.base=-18446744073709551617, ldv_init_zalloc_~p~2.offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3.base=-18446744073709551617, ldv_init_zalloc_~tmp~3.offset=0, ldv_platform_driver_init_2_~tmp~16.base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16.offset=0, main_#t~switch77=false, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=2, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3213] assume !main_#t~switch77; [L3252] main_#t~switch77 := main_#t~switch77 || 2 == main_~tmp~17; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1.base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2.base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res.base=-18446744073709551617, ldv_init_zalloc_#res.offset=0, ldv_init_zalloc_#t~malloc16.base=-18446744073709551617, ldv_init_zalloc_#t~malloc16.offset=0, ldv_init_zalloc_~p~2.base=-18446744073709551617, ldv_init_zalloc_~p~2.offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3.base=-18446744073709551617, ldv_init_zalloc_~tmp~3.offset=0, ldv_platform_driver_init_2_~tmp~16.base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16.offset=0, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=2, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3252] assume main_#t~switch77; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1.base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2.base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res.base=-18446744073709551617, ldv_init_zalloc_#res.offset=0, ldv_init_zalloc_#t~malloc16.base=-18446744073709551617, ldv_init_zalloc_#t~malloc16.offset=0, ldv_init_zalloc_~p~2.base=-18446744073709551617, ldv_init_zalloc_~p~2.offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3.base=-18446744073709551617, ldv_init_zalloc_~tmp~3.offset=0, ldv_platform_driver_init_2_~tmp~16.base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16.offset=0, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=2, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3253-L3302] assume 0 != ~ldv_state_variable_2~0; [L3254] assume -2147483648 <= main_#t~nondet81 && main_#t~nondet81 <= 2147483647; [L3254] main_~tmp___1~0 := main_#t~nondet81; [L3254] havoc main_#t~nondet81; [L3256] main_#t~switch82 := 0 == main_~tmp___1~0; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1.base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2.base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res.base=-18446744073709551617, ldv_init_zalloc_#res.offset=0, ldv_init_zalloc_#t~malloc16.base=-18446744073709551617, ldv_init_zalloc_#t~malloc16.offset=0, ldv_init_zalloc_~p~2.base=-18446744073709551617, ldv_init_zalloc_~p~2.offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3.base=-18446744073709551617, ldv_init_zalloc_~tmp~3.offset=0, ldv_platform_driver_init_2_~tmp~16.base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16.offset=0, main_#t~switch77=true, main_#t~switch79=true, main_#t~switch82=true, main_~tmp___0~4=1, main_~tmp___1~0=0, main_~tmp~17=2, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3256] assume main_#t~switch82; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1.base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2.base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res.base=-18446744073709551617, ldv_init_zalloc_#res.offset=0, ldv_init_zalloc_#t~malloc16.base=-18446744073709551617, ldv_init_zalloc_#t~malloc16.offset=0, ldv_init_zalloc_~p~2.base=-18446744073709551617, ldv_init_zalloc_~p~2.offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3.base=-18446744073709551617, ldv_init_zalloc_~tmp~3.offset=0, ldv_platform_driver_init_2_~tmp~16.base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16.offset=0, main_#t~switch77=true, main_#t~switch79=true, main_#t~switch82=true, main_~tmp___0~4=1, main_~tmp___1~0=0, main_~tmp~17=2, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3257-L3268] assume 1 == ~ldv_state_variable_2~0; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1.base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2.base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1.base=37, ldv___platform_driver_register_10_~ldv_func_arg1.offset=0, ldv___platform_driver_register_10_~ldv_func_arg2.base=36, ldv___platform_driver_register_10_~ldv_func_arg2.offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res.base=-18446744073709551617, ldv_init_zalloc_#res.offset=0, ldv_init_zalloc_#t~malloc16.base=-18446744073709551617, ldv_init_zalloc_#t~malloc16.offset=0, ldv_init_zalloc_~p~2.base=-18446744073709551617, ldv_init_zalloc_~p~2.offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3.base=-18446744073709551617, ldv_init_zalloc_~tmp~3.offset=0, ldv_platform_driver_init_2_~tmp~16.base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16.offset=0, main_#t~switch77=true, main_#t~switch79=true, main_#t~switch82=true, main_~tmp___0~4=1, main_~tmp___1~0=0, main_~tmp~17=2, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3258] CALL call main_#t~ret83 := iio_interrupt_trigger_probe(~iio_interrupt_trigger_driver_group1~0.base, ~iio_interrupt_trigger_driver_group1~0.offset); VAL [#in~pdev.base=-18446744073709551617, #in~pdev.offset=0, #NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0.base)=0, old(~ldv_irq_data_1_0~0.offset)=0, old(~ldv_irq_data_1_1~0.base)=0, old(~ldv_irq_data_1_1~0.offset)=0, old(~ldv_irq_data_1_2~0.base)=0, old(~ldv_irq_data_1_2~0.offset)=0, old(~ldv_irq_data_1_3~0.base)=0, old(~ldv_irq_data_1_3~0.offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2906-L2969] ~pdev.base, ~pdev.offset := #in~pdev.base, #in~pdev.offset; [L2908] havoc ~trig_info~0.base, ~trig_info~0.offset; [L2909] havoc ~trig~0.base, ~trig~0.offset; [L2910] havoc ~irqflags~0; [L2911] havoc ~irq_res~0.base, ~irq_res~0.offset; [L2912] havoc ~irq~0; [L2913] havoc ~ret~0; [L2914] havoc ~tmp~11.base, ~tmp~11.offset; [L2917] ~ret~0 := 0; [L2918] call #t~ret48.base, #t~ret48.offset := platform_get_resource(~pdev.base, ~pdev.offset, 1024, 0); [L2918] ~irq_res~0.base, ~irq_res~0.offset := #t~ret48.base, #t~ret48.offset; [L2918] havoc #t~ret48.base, #t~ret48.offset; VAL [#in~pdev.base=-18446744073709551617, #in~pdev.offset=0, #NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0.base)=0, old(~ldv_irq_data_1_0~0.offset)=0, old(~ldv_irq_data_1_1~0.base)=0, old(~ldv_irq_data_1_1~0.offset)=0, old(~ldv_irq_data_1_2~0.base)=0, old(~ldv_irq_data_1_2~0.offset)=0, old(~ldv_irq_data_1_3~0.base)=0, old(~ldv_irq_data_1_3~0.offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~pdev.base=-18446744073709551617, ~pdev.offset=0, ~probed_2~0=0, ~ref_cnt~0=0, ~ret~0=0] [L2919-L2923] assume !(0 == (~irq_res~0.base + ~irq_res~0.offset) % 18446744073709551616); [L2924] call #t~mem49 := read~int(~irq_res~0.base, 24 + ~irq_res~0.offset, 8); [L2924] ~irqflags~0 := ~bitwiseOr(~bitwiseAnd(#t~mem49, 15), 128); [L2924] havoc #t~mem49; [L2925] call #t~mem50 := read~int(~irq_res~0.base, ~irq_res~0.offset, 8); [L2925] ~irq~0 := (if #t~mem50 % 18446744073709551616 % 4294967296 <= 2147483647 then #t~mem50 % 18446744073709551616 % 4294967296 else #t~mem50 % 18446744073709551616 % 4294967296 - 4294967296); [L2925] havoc #t~mem50; [L2926] havoc #t~nondet51.base, #t~nondet51.offset; [L2926] ~trig~0.base, ~trig~0.offset := #t~nondet51.base, #t~nondet51.offset; VAL [#in~pdev.base=-18446744073709551617, #in~pdev.offset=0, #NULL.base=0, #NULL.offset=0, #t~nondet51.base=-171646953605867377786880, #t~nondet51.offset=-21693371030682432700415, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0.base)=0, old(~ldv_irq_data_1_0~0.offset)=0, old(~ldv_irq_data_1_1~0.base)=0, old(~ldv_irq_data_1_1~0.offset)=0, old(~ldv_irq_data_1_2~0.base)=0, old(~ldv_irq_data_1_2~0.offset)=0, old(~ldv_irq_data_1_3~0.base)=0, old(~ldv_irq_data_1_3~0.offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~irq_res~0.base=-18446744073709551617, ~irq_res~0.offset=-174432411960997520080894, ~irq~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~pdev.base=-18446744073709551617, ~pdev.offset=0, ~probed_2~0=0, ~ref_cnt~0=0, ~ret~0=0, ~trig~0.base=-171646953605867377786880, ~trig~0.offset=-21693371030682432700415] [L2927-L2932] assume !(0 == (~trig~0.base + ~trig~0.offset) % 18446744073709551616); [L2933] kzalloc_#in~size, kzalloc_#in~flags := 4, 208; [L2933] havoc kzalloc_#res.base, kzalloc_#res.offset; [L2933] havoc kzalloc_#t~ret7.base, kzalloc_#t~ret7.offset, kzalloc_~size, kzalloc_~flags, kzalloc_~tmp~0.base, kzalloc_~tmp~0.offset; [L2667-L2675] kzalloc_~size := kzalloc_#in~size; [L2667-L2675] kzalloc_~flags := kzalloc_#in~flags; [L2669] havoc kzalloc_~tmp~0.base, kzalloc_~tmp~0.offset; [L2672] kmalloc_#in~size, kmalloc_#in~flags := kzalloc_~size, ~bitwiseOr(kzalloc_~flags, 32768); [L2672] havoc kmalloc_#res.base, kmalloc_#res.offset; [L2672] havoc kmalloc_#t~ret6.base, kmalloc_#t~ret6.offset, kmalloc_~size, kmalloc_~flags, kmalloc_~tmp___2~0.base, kmalloc_~tmp___2~0.offset; [L2658-L2666] kmalloc_~size := kmalloc_#in~size; [L2658-L2666] kmalloc_~flags := kmalloc_#in~flags; [L2660] havoc kmalloc_~tmp___2~0.base, kmalloc_~tmp___2~0.offset; [L2663] __kmalloc_#in~size, __kmalloc_#in~t := kmalloc_~size, kmalloc_~flags; [L2663] havoc __kmalloc_#res.base, __kmalloc_#res.offset; [L2663] havoc __kmalloc_#t~ret5.base, __kmalloc_#t~ret5.offset, __kmalloc_~size, __kmalloc_~t; [L2654-L2657] __kmalloc_~size := __kmalloc_#in~size; [L2654-L2657] __kmalloc_~t := __kmalloc_#in~t; [L2656] ldv_malloc_#in~size := __kmalloc_~size; [L2656] havoc ldv_malloc_#res.base, ldv_malloc_#res.offset; [L2656] havoc ldv_malloc_#t~nondet12, ldv_malloc_#t~malloc13.base, ldv_malloc_#t~malloc13.offset, ldv_malloc_~size, ldv_malloc_~p~0.base, ldv_malloc_~p~0.offset, ldv_malloc_~tmp~1.base, ldv_malloc_~tmp~1.offset, ldv_malloc_~tmp___0~0; [L2682-L2699] ldv_malloc_~size := ldv_malloc_#in~size; [L2684] havoc ldv_malloc_~p~0.base, ldv_malloc_~p~0.offset; [L2685] havoc ldv_malloc_~tmp~1.base, ldv_malloc_~tmp~1.offset; [L2686] havoc ldv_malloc_~tmp___0~0; [L2689] assume -2147483648 <= ldv_malloc_#t~nondet12 && ldv_malloc_#t~nondet12 <= 2147483647; [L2689] ldv_malloc_~tmp___0~0 := ldv_malloc_#t~nondet12; [L2689] havoc ldv_malloc_#t~nondet12; [L2690-L2697] assume 0 != ldv_malloc_~tmp___0~0; [L2691] ldv_malloc_#res.base, ldv_malloc_#res.offset := 0, 0; [L2656] __kmalloc_#t~ret5.base, __kmalloc_#t~ret5.offset := ldv_malloc_#res.base, ldv_malloc_#res.offset; [L2656] __kmalloc_#res.base, __kmalloc_#res.offset := __kmalloc_#t~ret5.base, __kmalloc_#t~ret5.offset; [L2656] havoc __kmalloc_#t~ret5.base, __kmalloc_#t~ret5.offset; [L2663] kmalloc_#t~ret6.base, kmalloc_#t~ret6.offset := __kmalloc_#res.base, __kmalloc_#res.offset; [L2663] kmalloc_~tmp___2~0.base, kmalloc_~tmp___2~0.offset := kmalloc_#t~ret6.base, kmalloc_#t~ret6.offset; [L2663] havoc kmalloc_#t~ret6.base, kmalloc_#t~ret6.offset; [L2664] kmalloc_#res.base, kmalloc_#res.offset := kmalloc_~tmp___2~0.base, kmalloc_~tmp___2~0.offset; [L2672] kzalloc_#t~ret7.base, kzalloc_#t~ret7.offset := kmalloc_#res.base, kmalloc_#res.offset; [L2672] kzalloc_~tmp~0.base, kzalloc_~tmp~0.offset := kzalloc_#t~ret7.base, kzalloc_#t~ret7.offset; [L2672] havoc kzalloc_#t~ret7.base, kzalloc_#t~ret7.offset; [L2673] kzalloc_#res.base, kzalloc_#res.offset := kzalloc_~tmp~0.base, kzalloc_~tmp~0.offset; [L2933] #t~ret53.base, #t~ret53.offset := kzalloc_#res.base, kzalloc_#res.offset; [L2933] ~tmp~11.base, ~tmp~11.offset := #t~ret53.base, #t~ret53.offset; [L2933] havoc #t~ret53.base, #t~ret53.offset; [L2934] ~trig_info~0.base, ~trig_info~0.offset := ~tmp~11.base, ~tmp~11.offset; VAL [#in~pdev.base=-18446744073709551617, #in~pdev.offset=0, #NULL.base=0, #NULL.offset=0, #t~nondet51.base=-171646953605867377786880, #t~nondet51.offset=-21693371030682432700415, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, __kmalloc_#in~size=4, __kmalloc_#in~t=57, __kmalloc_#res.base=0, __kmalloc_#res.offset=0, __kmalloc_~size=4, __kmalloc_~t=57, kmalloc_#in~flags=57, kmalloc_#in~size=4, kmalloc_#res.base=0, kmalloc_#res.offset=0, kmalloc_~flags=57, kmalloc_~size=4, kmalloc_~tmp___2~0.base=0, kmalloc_~tmp___2~0.offset=0, kzalloc_#in~flags=208, kzalloc_#in~size=4, kzalloc_#res.base=0, kzalloc_#res.offset=0, kzalloc_~flags=208, kzalloc_~size=4, kzalloc_~tmp~0.base=0, kzalloc_~tmp~0.offset=0, ldv_malloc_#in~size=4, ldv_malloc_#res.base=0, ldv_malloc_#res.offset=0, ldv_malloc_#t~malloc13.base=47, ldv_malloc_#t~malloc13.offset=55, ldv_malloc_~p~0.base=18446744073709551616, ldv_malloc_~p~0.offset=0, ldv_malloc_~size=4, ldv_malloc_~tmp___0~0=-1, ldv_malloc_~tmp~1.base=54, ldv_malloc_~tmp~1.offset=53, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0.base)=0, old(~ldv_irq_data_1_0~0.offset)=0, old(~ldv_irq_data_1_1~0.base)=0, old(~ldv_irq_data_1_1~0.offset)=0, old(~ldv_irq_data_1_2~0.base)=0, old(~ldv_irq_data_1_2~0.offset)=0, old(~ldv_irq_data_1_3~0.base)=0, old(~ldv_irq_data_1_3~0.offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~irq_res~0.base=-18446744073709551617, ~irq_res~0.offset=-174432411960997520080894, ~irq~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~pdev.base=-18446744073709551617, ~pdev.offset=0, ~probed_2~0=0, ~ref_cnt~0=0, ~ret~0=0, ~tmp~11.base=0, ~tmp~11.offset=0, ~trig_info~0.base=0, ~trig_info~0.offset=0, ~trig~0.base=-171646953605867377786880, ~trig~0.offset=-21693371030682432700415] [L2935-L2940] assume 0 == (~trig_info~0.base + ~trig_info~0.offset) % 18446744073709551616; [L2936] ~ret~0 := -12; VAL [#in~pdev.base=-18446744073709551617, #in~pdev.offset=0, #NULL.base=0, #NULL.offset=0, #t~nondet51.base=-171646953605867377786880, #t~nondet51.offset=-21693371030682432700415, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, __kmalloc_#in~size=4, __kmalloc_#in~t=57, __kmalloc_#res.base=0, __kmalloc_#res.offset=0, __kmalloc_~size=4, __kmalloc_~t=57, kmalloc_#in~flags=57, kmalloc_#in~size=4, kmalloc_#res.base=0, kmalloc_#res.offset=0, kmalloc_~flags=57, kmalloc_~size=4, kmalloc_~tmp___2~0.base=0, kmalloc_~tmp___2~0.offset=0, kzalloc_#in~flags=208, kzalloc_#in~size=4, kzalloc_#res.base=0, kzalloc_#res.offset=0, kzalloc_~flags=208, kzalloc_~size=4, kzalloc_~tmp~0.base=0, kzalloc_~tmp~0.offset=0, ldv_malloc_#in~size=4, ldv_malloc_#res.base=0, ldv_malloc_#res.offset=0, ldv_malloc_#t~malloc13.base=47, ldv_malloc_#t~malloc13.offset=55, ldv_malloc_~p~0.base=18446744073709551616, ldv_malloc_~p~0.offset=0, ldv_malloc_~size=4, ldv_malloc_~tmp___0~0=-1, ldv_malloc_~tmp~1.base=54, ldv_malloc_~tmp~1.offset=53, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0.base)=0, old(~ldv_irq_data_1_0~0.offset)=0, old(~ldv_irq_data_1_1~0.base)=0, old(~ldv_irq_data_1_1~0.offset)=0, old(~ldv_irq_data_1_2~0.base)=0, old(~ldv_irq_data_1_2~0.offset)=0, old(~ldv_irq_data_1_3~0.base)=0, old(~ldv_irq_data_1_3~0.offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~irq_res~0.base=-18446744073709551617, ~irq_res~0.offset=-174432411960997520080894, ~irq~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~pdev.base=-18446744073709551617, ~pdev.offset=0, ~probed_2~0=0, ~ref_cnt~0=0, ~ret~0=-12, ~tmp~11.base=0, ~tmp~11.offset=0, ~trig_info~0.base=0, ~trig_info~0.offset=0, ~trig~0.base=-171646953605867377786880, ~trig~0.offset=-21693371030682432700415] [L2965] CALL call iio_trigger_put(~trig~0.base, ~trig~0.offset); VAL [#in~trig.base=-171646953605867377786880, #in~trig.offset=-21693371030682432700415, #NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0.base)=0, old(~ldv_irq_data_1_0~0.offset)=0, old(~ldv_irq_data_1_1~0.base)=0, old(~ldv_irq_data_1_1~0.offset)=0, old(~ldv_irq_data_1_2~0.base)=0, old(~ldv_irq_data_1_2~0.offset)=0, old(~ldv_irq_data_1_3~0.base)=0, old(~ldv_irq_data_1_3~0.offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2864-L2873] ~trig.base, ~trig.offset := #in~trig.base, #in~trig.offset; [L2869] call #t~mem41.base, #t~mem41.offset := read~$Pointer$(~trig.base, ~trig.offset, 8); [L2869] call #t~mem42.base, #t~mem42.offset := read~$Pointer$(#t~mem41.base, #t~mem41.offset, 8); [L2869] ldv_module_put_5_#in~ldv_func_arg1.base, ldv_module_put_5_#in~ldv_func_arg1.offset := #t~mem42.base, #t~mem42.offset; [L2869] havoc ldv_module_put_5_~ldv_func_arg1.base, ldv_module_put_5_~ldv_func_arg1.offset; [L3314-L3322] ldv_module_put_5_~ldv_func_arg1.base, ldv_module_put_5_~ldv_func_arg1.offset := ldv_module_put_5_#in~ldv_func_arg1.base, ldv_module_put_5_#in~ldv_func_arg1.offset; VAL [#in~trig.base=-171646953605867377786880, #in~trig.offset=-21693371030682432700415, #NULL.base=0, #NULL.offset=0, #t~mem41.base=45, #t~mem41.offset=39, #t~mem42.base=-552, #t~mem42.offset=-18446744073709551023, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, ldv_module_put_5_#in~ldv_func_arg1.base=-552, ldv_module_put_5_#in~ldv_func_arg1.offset=-18446744073709551023, ldv_module_put_5_~ldv_func_arg1.base=-552, ldv_module_put_5_~ldv_func_arg1.offset=-18446744073709551023, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0.base)=0, old(~ldv_irq_data_1_0~0.offset)=0, old(~ldv_irq_data_1_1~0.base)=0, old(~ldv_irq_data_1_1~0.offset)=0, old(~ldv_irq_data_1_2~0.base)=0, old(~ldv_irq_data_1_2~0.offset)=0, old(~ldv_irq_data_1_3~0.base)=0, old(~ldv_irq_data_1_3~0.offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0, ~trig.base=-171646953605867377786880, ~trig.offset=-21693371030682432700415] [L3319] CALL call ldv_module_put(ldv_module_put_5_~ldv_func_arg1.base, ldv_module_put_5_~ldv_func_arg1.offset); VAL [#in~module.base=-552, #in~module.offset=-18446744073709551023, #NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0.base)=0, old(~ldv_irq_data_1_0~0.offset)=0, old(~ldv_irq_data_1_1~0.base)=0, old(~ldv_irq_data_1_1~0.offset)=0, old(~ldv_irq_data_1_2~0.base)=0, old(~ldv_irq_data_1_2~0.offset)=0, old(~ldv_irq_data_1_3~0.base)=0, old(~ldv_irq_data_1_3~0.offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3481-L3498] ~module.base, ~module.offset := #in~module.base, #in~module.offset; VAL [#in~module.base=-552, #in~module.offset=-18446744073709551023, #NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0.base)=0, old(~ldv_irq_data_1_0~0.offset)=0, old(~ldv_irq_data_1_1~0.base)=0, old(~ldv_irq_data_1_1~0.offset)=0, old(~ldv_irq_data_1_2~0.base)=0, old(~ldv_irq_data_1_2~0.offset)=0, old(~ldv_irq_data_1_3~0.base)=0, old(~ldv_irq_data_1_3~0.offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~module.base=-552, ~module.offset=-18446744073709551023, ~probed_2~0=0, ~ref_cnt~0=0] [L3486-L3495] assume 0 != (~module.base + ~module.offset) % 18446744073709551616; VAL [#in~module.base=-552, #in~module.offset=-18446744073709551023, #NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0.base)=0, old(~ldv_irq_data_1_0~0.offset)=0, old(~ldv_irq_data_1_1~0.base)=0, old(~ldv_irq_data_1_1~0.offset)=0, old(~ldv_irq_data_1_2~0.base)=0, old(~ldv_irq_data_1_2~0.offset)=0, old(~ldv_irq_data_1_3~0.base)=0, old(~ldv_irq_data_1_3~0.offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~module.base=-552, ~module.offset=-18446744073709551023, ~probed_2~0=0, ~ref_cnt~0=0] [L3487-L3491] assume ~ldv_module_refcounter~0 <= 1; VAL [#in~module.base=-552, #in~module.offset=-18446744073709551023, #NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0.base)=0, old(~ldv_irq_data_1_0~0.offset)=0, old(~ldv_irq_data_1_1~0.base)=0, old(~ldv_irq_data_1_1~0.offset)=0, old(~ldv_irq_data_1_2~0.base)=0, old(~ldv_irq_data_1_2~0.offset)=0, old(~ldv_irq_data_1_3~0.base)=0, old(~ldv_irq_data_1_3~0.offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~module.base=-552, ~module.offset=-18446744073709551023, ~probed_2~0=0, ~ref_cnt~0=0] [L3488] CALL call ldv_error(); VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0.base)=0, old(~ldv_irq_data_1_0~0.offset)=0, old(~ldv_irq_data_1_1~0.base)=0, old(~ldv_irq_data_1_1~0.offset)=0, old(~ldv_irq_data_1_2~0.base)=0, old(~ldv_irq_data_1_2~0.offset)=0, old(~ldv_irq_data_1_3~0.base)=0, old(~ldv_irq_data_1_3~0.offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3402] assert false; VAL [#NULL.base=0, #NULL.offset=0, #t~string52.base=26, #t~string52.offset=0, #t~string56.base=27, #t~string56.offset=0, #t~string61.base=28, #t~string61.offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0.base)=0, old(~ldv_irq_data_1_0~0.offset)=0, old(~ldv_irq_data_1_1~0.base)=0, old(~ldv_irq_data_1_1~0.offset)=0, old(~ldv_irq_data_1_2~0.base)=0, old(~ldv_irq_data_1_2~0.offset)=0, old(~ldv_irq_data_1_3~0.base)=0, old(~ldv_irq_data_1_3~0.offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0.base=36, ~#__this_module~0.offset=35, ~#iio_interrupt_trigger_driver~0.base=37, ~#iio_interrupt_trigger_driver~0.offset=0, ~#iio_interrupt_trigger_ops~0.base=29, ~#iio_interrupt_trigger_ops~0.offset=0, ~iio_interrupt_trigger_driver_group1~0.base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0.offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0.base=0, ~ldv_irq_data_1_0~0.offset=0, ~ldv_irq_data_1_1~0.base=0, ~ldv_irq_data_1_1~0.offset=0, ~ldv_irq_data_1_2~0.base=0, ~ldv_irq_data_1_2~0.offset=0, ~ldv_irq_data_1_3~0.base=0, ~ldv_irq_data_1_3~0.offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] #NULL := { base: 0, offset: 0 }; [?] #valid[0] := 0; [L2926] FCALL call #t~string52 := #Ultimate.alloc(10); [L2947] FCALL call #t~string56 := #Ultimate.alloc(22); [L2990] FCALL call #t~string61 := #Ultimate.alloc(22); [L2775] ~ldv_irq_1_2~0 := 0; [L2776] ~LDV_IN_INTERRUPT~0 := 1; [L2777] ~ldv_irq_1_3~0 := 0; [L2778] ~ldv_irq_data_1_1~0 := { base: 0, offset: 0 }; [L2779] ~ldv_irq_1_1~0 := 0; [L2780] ~ldv_irq_1_0~0 := 0; [L2781] ~probed_2~0 := 0; [L2782] ~ldv_irq_line_1_3~0 := 0; [L2783] ~ldv_irq_data_1_0~0 := { base: 0, offset: 0 }; [L2784] ~ldv_state_variable_0~0 := 0; [L2785] ~ldv_irq_line_1_0~0 := 0; [L2786] ~ldv_state_variable_2~0 := 0; [L2787] ~ldv_irq_data_1_3~0 := { base: 0, offset: 0 }; [L2788] ~ref_cnt~0 := 0; [L2789] ~ldv_irq_line_1_1~0 := 0; [L2791] ~ldv_irq_data_1_2~0 := { base: 0, offset: 0 }; [L2792] ~ldv_state_variable_1~0 := 0; [L2793] ~ldv_irq_line_1_2~0 := 0; [L3018] ~ldv_retval_0~0 := 0; [L3019] ~ldv_retval_1~0 := 0; [L3022] ~ldv_retval_2~0 := 0; [L3448] ~ldv_module_refcounter~0 := 1; [L2790] ~iio_interrupt_trigger_driver_group1~0 := { base: 0, offset: 0 }; [L2905] FCALL call ~#iio_interrupt_trigger_ops~0 := #Ultimate.alloc(32); [L2905] FCALL call write~init~$Pointer$(~#__this_module~0, { base: ~#iio_interrupt_trigger_ops~0!base, offset: ~#iio_interrupt_trigger_ops~0!offset }, 8); [L2905] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_ops~0!base, offset: 8 + ~#iio_interrupt_trigger_ops~0!offset }, 8); [L2905] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_ops~0!base, offset: 16 + ~#iio_interrupt_trigger_ops~0!offset }, 8); [L2905] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_ops~0!base, offset: 24 + ~#iio_interrupt_trigger_ops~0!offset }, 8); [L2989-L2999] FCALL call ~#iio_interrupt_trigger_driver~0 := #Ultimate.alloc(166); [L2989-L2999] FCALL call write~init~$Pointer$(#funAddr~iio_interrupt_trigger_probe, { base: ~#iio_interrupt_trigger_driver~0!base, offset: ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$(#funAddr~iio_interrupt_trigger_remove, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 8 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 16 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 24 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 32 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$(#t~string61, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 40 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 48 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 56 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 64 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~int(0, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 72 + ~#iio_interrupt_trigger_driver~0!offset }, 1); [L2989-L2999] FCALL call write~init~int(0, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 73 + ~#iio_interrupt_trigger_driver~0!offset }, 4); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 77 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 85 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 93 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 101 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 109 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 117 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 125 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 133 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 141 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 149 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 157 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~int(0, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 165 + ~#iio_interrupt_trigger_driver~0!offset }, 1); [?] havoc main_#res; [?] havoc main_#t~nondet76, main_#t~switch77, main_#t~nondet78, main_#t~switch79, main_#t~ret80, main_#t~nondet81, main_#t~switch82, main_#t~ret83, main_#t~ret84, main_#t~ret85, main_~tmp~17, main_~tmp___0~4, main_~tmp___1~0; [L3193] havoc main_~tmp~17; [L3194] havoc main_~tmp___0~4; [L3195] havoc main_~tmp___1~0; [L3198] FCALL call ldv_initialize(); [L3199] ~ldv_state_variable_1~0 := 1; [L3200] ~ref_cnt~0 := 0; [L3201] ~ldv_state_variable_0~0 := 1; [L3202] ~ldv_state_variable_2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3204] assume -2147483648 <= main_#t~nondet76 && main_#t~nondet76 <= 2147483647; [L3204] main_~tmp~17 := main_#t~nondet76; [L3204] havoc main_#t~nondet76; [L3206] main_#t~switch77 := 0 == main_~tmp~17; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, main_#t~switch77=false, main_~tmp~17=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3205-L3306] COND FALSE !(main_#t~switch77) [L3213] main_#t~switch77 := main_#t~switch77 || 1 == main_~tmp~17; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, main_#t~switch77=true, main_~tmp~17=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3205-L3306] COND TRUE main_#t~switch77 VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, main_#t~switch77=true, main_~tmp~17=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3214] COND TRUE 0 != ~ldv_state_variable_0~0 [L3215] assume -2147483648 <= main_#t~nondet78 && main_#t~nondet78 <= 2147483647; [L3215] main_~tmp___0~4 := main_#t~nondet78; [L3215] havoc main_#t~nondet78; [L3217] main_#t~switch79 := 0 == main_~tmp___0~4; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, main_#t~switch77=true, main_#t~switch79=false, main_~tmp___0~4=1, main_~tmp~17=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3216-L3246] COND FALSE !(main_#t~switch79) [L3226] main_#t~switch79 := main_#t~switch79 || 1 == main_~tmp___0~4; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3216-L3246] COND TRUE main_#t~switch79 VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3227] COND TRUE 1 == ~ldv_state_variable_0~0 [L3228] havoc iio_interrupt_trigger_driver_init_#res; [L3228] havoc iio_interrupt_trigger_driver_init_#t~ret62, iio_interrupt_trigger_driver_init_~tmp~13; [L3002] havoc iio_interrupt_trigger_driver_init_~tmp~13; [L3005] ldv___platform_driver_register_10_#in~ldv_func_arg1, ldv___platform_driver_register_10_#in~ldv_func_arg2 := ~#iio_interrupt_trigger_driver~0, ~#__this_module~0; [L3005] havoc ldv___platform_driver_register_10_#res; [L3005] havoc ldv___platform_driver_register_10_#t~ret88, ldv___platform_driver_register_10_~ldv_func_arg1, ldv___platform_driver_register_10_~ldv_func_arg2, ldv___platform_driver_register_10_~ldv_func_res~1, ldv___platform_driver_register_10_~tmp~19; [L3372-L3384] ldv___platform_driver_register_10_~ldv_func_arg1 := ldv___platform_driver_register_10_#in~ldv_func_arg1; [L3372-L3384] ldv___platform_driver_register_10_~ldv_func_arg2 := ldv___platform_driver_register_10_#in~ldv_func_arg2; [L3374] havoc ldv___platform_driver_register_10_~ldv_func_res~1; [L3375] havoc ldv___platform_driver_register_10_~tmp~19; [L3378] FCALL call ldv___platform_driver_register_10_#t~ret88 := __platform_driver_register(ldv___platform_driver_register_10_~ldv_func_arg1, ldv___platform_driver_register_10_~ldv_func_arg2); [L3378] assume -2147483648 <= ldv___platform_driver_register_10_#t~ret88 && ldv___platform_driver_register_10_#t~ret88 <= 2147483647; [L3378] ldv___platform_driver_register_10_~tmp~19 := ldv___platform_driver_register_10_#t~ret88; [L3378] havoc ldv___platform_driver_register_10_#t~ret88; [L3379] ldv___platform_driver_register_10_~ldv_func_res~1 := ldv___platform_driver_register_10_~tmp~19; [L3380] ~ldv_state_variable_2~0 := 1; [L3381] havoc ldv_platform_driver_init_2_#t~ret75, ldv_platform_driver_init_2_~tmp~16; [L3151] havoc ldv_platform_driver_init_2_~tmp~16; [L3154] ldv_init_zalloc_#in~size := 1472; [L3154] havoc ldv_init_zalloc_#res; [L3154] havoc ldv_init_zalloc_#t~malloc16, ldv_init_zalloc_~size, ldv_init_zalloc_~p~2, ldv_init_zalloc_~tmp~3; [L2718-L2729] ldv_init_zalloc_~size := ldv_init_zalloc_#in~size; [L2720] havoc ldv_init_zalloc_~p~2; [L2721] havoc ldv_init_zalloc_~tmp~3; [L2724] FCALL call ldv_init_zalloc_#t~malloc16 := #Ultimate.alloc((if ldv_init_zalloc_~size % 4294967296 % 4294967296 <= 2147483647 then ldv_init_zalloc_~size % 4294967296 % 4294967296 else ldv_init_zalloc_~size % 4294967296 % 4294967296 - 4294967296)); VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg1!base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2!base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_~ldv_func_arg1!base=37, ldv___platform_driver_register_10_~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_~ldv_func_arg2!base=36, ldv___platform_driver_register_10_~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#t~malloc16!base=-18446744073709551617, ldv_init_zalloc_#t~malloc16!offset=0, ldv_init_zalloc_~size=1472, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2724] CALL call #Ultimate.meminit(ldv_init_zalloc_#t~malloc16, 1, (if ldv_init_zalloc_~size % 4294967296 % 4294967296 <= 2147483647 then ldv_init_zalloc_~size % 4294967296 % 4294967296 else ldv_init_zalloc_~size % 4294967296 % 4294967296 - 4294967296), (if ldv_init_zalloc_~size % 4294967296 % 4294967296 <= 2147483647 then ldv_init_zalloc_~size % 4294967296 % 4294967296 else ldv_init_zalloc_~size % 4294967296 % 4294967296 - 4294967296)); VAL [#amountOfFields=1, #NULL!base=0, #NULL!offset=0, #product=1472, #ptr!base=-18446744073709551617, #ptr!offset=0, #sizeOfFields=1472, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr!base); [L2724] RET call #Ultimate.meminit(ldv_init_zalloc_#t~malloc16, 1, (if ldv_init_zalloc_~size % 4294967296 % 4294967296 <= 2147483647 then ldv_init_zalloc_~size % 4294967296 % 4294967296 else ldv_init_zalloc_~size % 4294967296 % 4294967296 - 4294967296), (if ldv_init_zalloc_~size % 4294967296 % 4294967296 <= 2147483647 then ldv_init_zalloc_~size % 4294967296 % 4294967296 else ldv_init_zalloc_~size % 4294967296 % 4294967296 - 4294967296)); VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg1!base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2!base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_~ldv_func_arg1!base=37, ldv___platform_driver_register_10_~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_~ldv_func_arg2!base=36, ldv___platform_driver_register_10_~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#t~malloc16!base=-18446744073709551617, ldv_init_zalloc_#t~malloc16!offset=0, ldv_init_zalloc_~size=1472, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2724] ldv_init_zalloc_~tmp~3 := ldv_init_zalloc_#t~malloc16; [L2725] ldv_init_zalloc_~p~2 := ldv_init_zalloc_~tmp~3; [L2726] assume 0 != (if 0 != (ldv_init_zalloc_~p~2!base + ldv_init_zalloc_~p~2!offset) % 18446744073709551616 then 1 else 0); [L2727] ldv_init_zalloc_#res := ldv_init_zalloc_~p~2; [L3154] ldv_platform_driver_init_2_#t~ret75 := ldv_init_zalloc_#res; [L3154] ldv_platform_driver_init_2_~tmp~16 := ldv_platform_driver_init_2_#t~ret75; [L3154] havoc ldv_platform_driver_init_2_#t~ret75; [L3155] ~iio_interrupt_trigger_driver_group1~0 := ldv_platform_driver_init_2_~tmp~16; [L3382] ldv___platform_driver_register_10_#res := ldv___platform_driver_register_10_~ldv_func_res~1; [L3005] iio_interrupt_trigger_driver_init_#t~ret62 := ldv___platform_driver_register_10_#res; [L3005] assume -2147483648 <= iio_interrupt_trigger_driver_init_#t~ret62 && iio_interrupt_trigger_driver_init_#t~ret62 <= 2147483647; [L3005] iio_interrupt_trigger_driver_init_~tmp~13 := iio_interrupt_trigger_driver_init_#t~ret62; [L3005] havoc iio_interrupt_trigger_driver_init_#t~ret62; [L3006] iio_interrupt_trigger_driver_init_#res := iio_interrupt_trigger_driver_init_~tmp~13; [L3228] main_#t~ret80 := iio_interrupt_trigger_driver_init_#res; [L3228] assume -2147483648 <= main_#t~ret80 && main_#t~ret80 <= 2147483647; [L3228] ~ldv_retval_0~0 := main_#t~ret80; [L3228] havoc main_#t~ret80; [L3229] COND TRUE 0 == ~ldv_retval_0~0 [L3230] ~ldv_state_variable_0~0 := 3; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1!base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2!base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1!base=37, ldv___platform_driver_register_10_~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_~ldv_func_arg2!base=36, ldv___platform_driver_register_10_~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res!base=-18446744073709551617, ldv_init_zalloc_#res!offset=0, ldv_init_zalloc_#t~malloc16!base=-18446744073709551617, ldv_init_zalloc_#t~malloc16!offset=0, ldv_init_zalloc_~p~2!base=-18446744073709551617, ldv_init_zalloc_~p~2!offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3!base=-18446744073709551617, ldv_init_zalloc_~tmp~3!offset=0, ldv_platform_driver_init_2_~tmp~16!base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16!offset=0, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3234] COND FALSE !(0 != ~ldv_retval_0~0) VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1!base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2!base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1!base=37, ldv___platform_driver_register_10_~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_~ldv_func_arg2!base=36, ldv___platform_driver_register_10_~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res!base=-18446744073709551617, ldv_init_zalloc_#res!offset=0, ldv_init_zalloc_#t~malloc16!base=-18446744073709551617, ldv_init_zalloc_#t~malloc16!offset=0, ldv_init_zalloc_~p~2!base=-18446744073709551617, ldv_init_zalloc_~p~2!offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3!base=-18446744073709551617, ldv_init_zalloc_~tmp~3!offset=0, ldv_platform_driver_init_2_~tmp~16!base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16!offset=0, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3204] assume -2147483648 <= main_#t~nondet76 && main_#t~nondet76 <= 2147483647; [L3204] main_~tmp~17 := main_#t~nondet76; [L3204] havoc main_#t~nondet76; [L3206] main_#t~switch77 := 0 == main_~tmp~17; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1!base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2!base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1!base=37, ldv___platform_driver_register_10_~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_~ldv_func_arg2!base=36, ldv___platform_driver_register_10_~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res!base=-18446744073709551617, ldv_init_zalloc_#res!offset=0, ldv_init_zalloc_#t~malloc16!base=-18446744073709551617, ldv_init_zalloc_#t~malloc16!offset=0, ldv_init_zalloc_~p~2!base=-18446744073709551617, ldv_init_zalloc_~p~2!offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3!base=-18446744073709551617, ldv_init_zalloc_~tmp~3!offset=0, ldv_platform_driver_init_2_~tmp~16!base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16!offset=0, main_#t~switch77=false, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=2, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3205-L3306] COND FALSE !(main_#t~switch77) [L3213] main_#t~switch77 := main_#t~switch77 || 1 == main_~tmp~17; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1!base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2!base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1!base=37, ldv___platform_driver_register_10_~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_~ldv_func_arg2!base=36, ldv___platform_driver_register_10_~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res!base=-18446744073709551617, ldv_init_zalloc_#res!offset=0, ldv_init_zalloc_#t~malloc16!base=-18446744073709551617, ldv_init_zalloc_#t~malloc16!offset=0, ldv_init_zalloc_~p~2!base=-18446744073709551617, ldv_init_zalloc_~p~2!offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3!base=-18446744073709551617, ldv_init_zalloc_~tmp~3!offset=0, ldv_platform_driver_init_2_~tmp~16!base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16!offset=0, main_#t~switch77=false, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=2, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3205-L3306] COND FALSE !(main_#t~switch77) [L3252] main_#t~switch77 := main_#t~switch77 || 2 == main_~tmp~17; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1!base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2!base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1!base=37, ldv___platform_driver_register_10_~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_~ldv_func_arg2!base=36, ldv___platform_driver_register_10_~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res!base=-18446744073709551617, ldv_init_zalloc_#res!offset=0, ldv_init_zalloc_#t~malloc16!base=-18446744073709551617, ldv_init_zalloc_#t~malloc16!offset=0, ldv_init_zalloc_~p~2!base=-18446744073709551617, ldv_init_zalloc_~p~2!offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3!base=-18446744073709551617, ldv_init_zalloc_~tmp~3!offset=0, ldv_platform_driver_init_2_~tmp~16!base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16!offset=0, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=2, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3205-L3306] COND TRUE main_#t~switch77 VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1!base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2!base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1!base=37, ldv___platform_driver_register_10_~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_~ldv_func_arg2!base=36, ldv___platform_driver_register_10_~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res!base=-18446744073709551617, ldv_init_zalloc_#res!offset=0, ldv_init_zalloc_#t~malloc16!base=-18446744073709551617, ldv_init_zalloc_#t~malloc16!offset=0, ldv_init_zalloc_~p~2!base=-18446744073709551617, ldv_init_zalloc_~p~2!offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3!base=-18446744073709551617, ldv_init_zalloc_~tmp~3!offset=0, ldv_platform_driver_init_2_~tmp~16!base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16!offset=0, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=2, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3253] COND TRUE 0 != ~ldv_state_variable_2~0 [L3254] assume -2147483648 <= main_#t~nondet81 && main_#t~nondet81 <= 2147483647; [L3254] main_~tmp___1~0 := main_#t~nondet81; [L3254] havoc main_#t~nondet81; [L3256] main_#t~switch82 := 0 == main_~tmp___1~0; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1!base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2!base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1!base=37, ldv___platform_driver_register_10_~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_~ldv_func_arg2!base=36, ldv___platform_driver_register_10_~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res!base=-18446744073709551617, ldv_init_zalloc_#res!offset=0, ldv_init_zalloc_#t~malloc16!base=-18446744073709551617, ldv_init_zalloc_#t~malloc16!offset=0, ldv_init_zalloc_~p~2!base=-18446744073709551617, ldv_init_zalloc_~p~2!offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3!base=-18446744073709551617, ldv_init_zalloc_~tmp~3!offset=0, ldv_platform_driver_init_2_~tmp~16!base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16!offset=0, main_#t~switch77=true, main_#t~switch79=true, main_#t~switch82=true, main_~tmp___0~4=1, main_~tmp___1~0=0, main_~tmp~17=2, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3255-L3298] COND TRUE main_#t~switch82 VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1!base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2!base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1!base=37, ldv___platform_driver_register_10_~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_~ldv_func_arg2!base=36, ldv___platform_driver_register_10_~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res!base=-18446744073709551617, ldv_init_zalloc_#res!offset=0, ldv_init_zalloc_#t~malloc16!base=-18446744073709551617, ldv_init_zalloc_#t~malloc16!offset=0, ldv_init_zalloc_~p~2!base=-18446744073709551617, ldv_init_zalloc_~p~2!offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3!base=-18446744073709551617, ldv_init_zalloc_~tmp~3!offset=0, ldv_platform_driver_init_2_~tmp~16!base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16!offset=0, main_#t~switch77=true, main_#t~switch79=true, main_#t~switch82=true, main_~tmp___0~4=1, main_~tmp___1~0=0, main_~tmp~17=2, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3257] COND TRUE 1 == ~ldv_state_variable_2~0 VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1!base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2!base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1!base=37, ldv___platform_driver_register_10_~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_~ldv_func_arg2!base=36, ldv___platform_driver_register_10_~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res!base=-18446744073709551617, ldv_init_zalloc_#res!offset=0, ldv_init_zalloc_#t~malloc16!base=-18446744073709551617, ldv_init_zalloc_#t~malloc16!offset=0, ldv_init_zalloc_~p~2!base=-18446744073709551617, ldv_init_zalloc_~p~2!offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3!base=-18446744073709551617, ldv_init_zalloc_~tmp~3!offset=0, ldv_platform_driver_init_2_~tmp~16!base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16!offset=0, main_#t~switch77=true, main_#t~switch79=true, main_#t~switch82=true, main_~tmp___0~4=1, main_~tmp___1~0=0, main_~tmp~17=2, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3258] CALL call main_#t~ret83 := iio_interrupt_trigger_probe(~iio_interrupt_trigger_driver_group1~0); VAL [#in~pdev!base=-18446744073709551617, #in~pdev!offset=0, #NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2906-L2969] ~pdev := #in~pdev; [L2908] havoc ~trig_info~0; [L2909] havoc ~trig~0; [L2910] havoc ~irqflags~0; [L2911] havoc ~irq_res~0; [L2912] havoc ~irq~0; [L2913] havoc ~ret~0; [L2914] havoc ~tmp~11; [L2917] ~ret~0 := 0; [L2918] FCALL call #t~ret48 := platform_get_resource(~pdev, 1024, 0); [L2918] ~irq_res~0 := #t~ret48; [L2918] havoc #t~ret48; VAL [#in~pdev!base=-18446744073709551617, #in~pdev!offset=0, #NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~pdev!base=-18446744073709551617, ~pdev!offset=0, ~probed_2~0=0, ~ref_cnt~0=0, ~ret~0=0] [L2919] COND FALSE !(0 == (~irq_res~0!base + ~irq_res~0!offset) % 18446744073709551616) [L2924] FCALL call #t~mem49 := read~int({ base: ~irq_res~0!base, offset: 24 + ~irq_res~0!offset }, 8); [L2924] ~irqflags~0 := ~bitwiseOr(~bitwiseAnd(#t~mem49, 15), 128); [L2924] havoc #t~mem49; [L2925] FCALL call #t~mem50 := read~int({ base: ~irq_res~0!base, offset: ~irq_res~0!offset }, 8); [L2925] ~irq~0 := (if #t~mem50 % 18446744073709551616 % 4294967296 <= 2147483647 then #t~mem50 % 18446744073709551616 % 4294967296 else #t~mem50 % 18446744073709551616 % 4294967296 - 4294967296); [L2925] havoc #t~mem50; [L2926] havoc #t~nondet51; [L2926] ~trig~0 := #t~nondet51; VAL [#in~pdev!base=-18446744073709551617, #in~pdev!offset=0, #NULL!base=0, #NULL!offset=0, #t~nondet51!base=-171646953605867377786880, #t~nondet51!offset=-21693371030682432700415, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~irq_res~0!base=-18446744073709551617, ~irq_res~0!offset=-174432411960997520080894, ~irq~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~pdev!base=-18446744073709551617, ~pdev!offset=0, ~probed_2~0=0, ~ref_cnt~0=0, ~ret~0=0, ~trig~0!base=-171646953605867377786880, ~trig~0!offset=-21693371030682432700415] [L2927] COND FALSE !(0 == (~trig~0!base + ~trig~0!offset) % 18446744073709551616) [L2933] kzalloc_#in~size, kzalloc_#in~flags := 4, 208; [L2933] havoc kzalloc_#res; [L2933] havoc kzalloc_#t~ret7, kzalloc_~size, kzalloc_~flags, kzalloc_~tmp~0; [L2667-L2675] kzalloc_~size := kzalloc_#in~size; [L2667-L2675] kzalloc_~flags := kzalloc_#in~flags; [L2669] havoc kzalloc_~tmp~0; [L2672] kmalloc_#in~size, kmalloc_#in~flags := kzalloc_~size, ~bitwiseOr(kzalloc_~flags, 32768); [L2672] havoc kmalloc_#res; [L2672] havoc kmalloc_#t~ret6, kmalloc_~size, kmalloc_~flags, kmalloc_~tmp___2~0; [L2658-L2666] kmalloc_~size := kmalloc_#in~size; [L2658-L2666] kmalloc_~flags := kmalloc_#in~flags; [L2660] havoc kmalloc_~tmp___2~0; [L2663] __kmalloc_#in~size, __kmalloc_#in~t := kmalloc_~size, kmalloc_~flags; [L2663] havoc __kmalloc_#res; [L2663] havoc __kmalloc_#t~ret5, __kmalloc_~size, __kmalloc_~t; [L2654-L2657] __kmalloc_~size := __kmalloc_#in~size; [L2654-L2657] __kmalloc_~t := __kmalloc_#in~t; [L2656] ldv_malloc_#in~size := __kmalloc_~size; [L2656] havoc ldv_malloc_#res; [L2656] havoc ldv_malloc_#t~nondet12, ldv_malloc_#t~malloc13, ldv_malloc_~size, ldv_malloc_~p~0, ldv_malloc_~tmp~1, ldv_malloc_~tmp___0~0; [L2682-L2699] ldv_malloc_~size := ldv_malloc_#in~size; [L2684] havoc ldv_malloc_~p~0; [L2685] havoc ldv_malloc_~tmp~1; [L2686] havoc ldv_malloc_~tmp___0~0; [L2689] assume -2147483648 <= ldv_malloc_#t~nondet12 && ldv_malloc_#t~nondet12 <= 2147483647; [L2689] ldv_malloc_~tmp___0~0 := ldv_malloc_#t~nondet12; [L2689] havoc ldv_malloc_#t~nondet12; [L2690] COND TRUE 0 != ldv_malloc_~tmp___0~0 [L2691] ldv_malloc_#res := { base: 0, offset: 0 }; [L2656] __kmalloc_#t~ret5 := ldv_malloc_#res; [L2656] __kmalloc_#res := __kmalloc_#t~ret5; [L2656] havoc __kmalloc_#t~ret5; [L2663] kmalloc_#t~ret6 := __kmalloc_#res; [L2663] kmalloc_~tmp___2~0 := kmalloc_#t~ret6; [L2663] havoc kmalloc_#t~ret6; [L2664] kmalloc_#res := kmalloc_~tmp___2~0; [L2672] kzalloc_#t~ret7 := kmalloc_#res; [L2672] kzalloc_~tmp~0 := kzalloc_#t~ret7; [L2672] havoc kzalloc_#t~ret7; [L2673] kzalloc_#res := kzalloc_~tmp~0; [L2933] #t~ret53 := kzalloc_#res; [L2933] ~tmp~11 := #t~ret53; [L2933] havoc #t~ret53; [L2934] ~trig_info~0 := ~tmp~11; VAL [#in~pdev!base=-18446744073709551617, #in~pdev!offset=0, #NULL!base=0, #NULL!offset=0, #t~nondet51!base=-171646953605867377786880, #t~nondet51!offset=-21693371030682432700415, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, __kmalloc_#in~size=4, __kmalloc_#in~t=57, __kmalloc_#res!base=0, __kmalloc_#res!offset=0, __kmalloc_~size=4, __kmalloc_~t=57, kmalloc_#in~flags=57, kmalloc_#in~size=4, kmalloc_#res!base=0, kmalloc_#res!offset=0, kmalloc_~flags=57, kmalloc_~size=4, kmalloc_~tmp___2~0!base=0, kmalloc_~tmp___2~0!offset=0, kzalloc_#in~flags=208, kzalloc_#in~size=4, kzalloc_#res!base=0, kzalloc_#res!offset=0, kzalloc_~flags=208, kzalloc_~size=4, kzalloc_~tmp~0!base=0, kzalloc_~tmp~0!offset=0, ldv_malloc_#in~size=4, ldv_malloc_#res!base=0, ldv_malloc_#res!offset=0, ldv_malloc_#t~malloc13!base=47, ldv_malloc_#t~malloc13!offset=55, ldv_malloc_~p~0!base=18446744073709551616, ldv_malloc_~p~0!offset=0, ldv_malloc_~size=4, ldv_malloc_~tmp___0~0=-1, ldv_malloc_~tmp~1!base=54, ldv_malloc_~tmp~1!offset=53, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~irq_res~0!base=-18446744073709551617, ~irq_res~0!offset=-174432411960997520080894, ~irq~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~pdev!base=-18446744073709551617, ~pdev!offset=0, ~probed_2~0=0, ~ref_cnt~0=0, ~ret~0=0, ~tmp~11!base=0, ~tmp~11!offset=0, ~trig_info~0!base=0, ~trig_info~0!offset=0, ~trig~0!base=-171646953605867377786880, ~trig~0!offset=-21693371030682432700415] [L2935] COND TRUE 0 == (~trig_info~0!base + ~trig_info~0!offset) % 18446744073709551616 [L2936] ~ret~0 := -12; VAL [#in~pdev!base=-18446744073709551617, #in~pdev!offset=0, #NULL!base=0, #NULL!offset=0, #t~nondet51!base=-171646953605867377786880, #t~nondet51!offset=-21693371030682432700415, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, __kmalloc_#in~size=4, __kmalloc_#in~t=57, __kmalloc_#res!base=0, __kmalloc_#res!offset=0, __kmalloc_~size=4, __kmalloc_~t=57, kmalloc_#in~flags=57, kmalloc_#in~size=4, kmalloc_#res!base=0, kmalloc_#res!offset=0, kmalloc_~flags=57, kmalloc_~size=4, kmalloc_~tmp___2~0!base=0, kmalloc_~tmp___2~0!offset=0, kzalloc_#in~flags=208, kzalloc_#in~size=4, kzalloc_#res!base=0, kzalloc_#res!offset=0, kzalloc_~flags=208, kzalloc_~size=4, kzalloc_~tmp~0!base=0, kzalloc_~tmp~0!offset=0, ldv_malloc_#in~size=4, ldv_malloc_#res!base=0, ldv_malloc_#res!offset=0, ldv_malloc_#t~malloc13!base=47, ldv_malloc_#t~malloc13!offset=55, ldv_malloc_~p~0!base=18446744073709551616, ldv_malloc_~p~0!offset=0, ldv_malloc_~size=4, ldv_malloc_~tmp___0~0=-1, ldv_malloc_~tmp~1!base=54, ldv_malloc_~tmp~1!offset=53, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~irq_res~0!base=-18446744073709551617, ~irq_res~0!offset=-174432411960997520080894, ~irq~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~pdev!base=-18446744073709551617, ~pdev!offset=0, ~probed_2~0=0, ~ref_cnt~0=0, ~ret~0=-12, ~tmp~11!base=0, ~tmp~11!offset=0, ~trig_info~0!base=0, ~trig_info~0!offset=0, ~trig~0!base=-171646953605867377786880, ~trig~0!offset=-21693371030682432700415] [L2965] CALL call iio_trigger_put(~trig~0); VAL [#in~trig!base=-171646953605867377786880, #in~trig!offset=-21693371030682432700415, #NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2864-L2873] ~trig := #in~trig; [L2869] FCALL call #t~mem41 := read~$Pointer$({ base: ~trig!base, offset: ~trig!offset }, 8); [L2869] FCALL call #t~mem42 := read~$Pointer$({ base: #t~mem41!base, offset: #t~mem41!offset }, 8); [L2869] ldv_module_put_5_#in~ldv_func_arg1 := #t~mem42; [L2869] havoc ldv_module_put_5_~ldv_func_arg1; [L3314-L3322] ldv_module_put_5_~ldv_func_arg1 := ldv_module_put_5_#in~ldv_func_arg1; VAL [#in~trig!base=-171646953605867377786880, #in~trig!offset=-21693371030682432700415, #NULL!base=0, #NULL!offset=0, #t~mem41!base=45, #t~mem41!offset=39, #t~mem42!base=-552, #t~mem42!offset=-18446744073709551023, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ldv_module_put_5_#in~ldv_func_arg1!base=-552, ldv_module_put_5_#in~ldv_func_arg1!offset=-18446744073709551023, ldv_module_put_5_~ldv_func_arg1!base=-552, ldv_module_put_5_~ldv_func_arg1!offset=-18446744073709551023, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0, ~trig!base=-171646953605867377786880, ~trig!offset=-21693371030682432700415] [L3319] CALL call ldv_module_put(ldv_module_put_5_~ldv_func_arg1); VAL [#in~module!base=-552, #in~module!offset=-18446744073709551023, #NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3481-L3498] ~module := #in~module; VAL [#in~module!base=-552, #in~module!offset=-18446744073709551023, #NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~module!base=-552, ~module!offset=-18446744073709551023, ~probed_2~0=0, ~ref_cnt~0=0] [L3486] COND TRUE 0 != (~module!base + ~module!offset) % 18446744073709551616 VAL [#in~module!base=-552, #in~module!offset=-18446744073709551023, #NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~module!base=-552, ~module!offset=-18446744073709551023, ~probed_2~0=0, ~ref_cnt~0=0] [L3487] COND TRUE ~ldv_module_refcounter~0 <= 1 VAL [#in~module!base=-552, #in~module!offset=-18446744073709551023, #NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~module!base=-552, ~module!offset=-18446744073709551023, ~probed_2~0=0, ~ref_cnt~0=0] [L3488] CALL call ldv_error(); VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3402] assert false; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] #NULL := { base: 0, offset: 0 }; [?] #valid[0] := 0; [L2926] FCALL call #t~string52 := #Ultimate.alloc(10); [L2947] FCALL call #t~string56 := #Ultimate.alloc(22); [L2990] FCALL call #t~string61 := #Ultimate.alloc(22); [L2775] ~ldv_irq_1_2~0 := 0; [L2776] ~LDV_IN_INTERRUPT~0 := 1; [L2777] ~ldv_irq_1_3~0 := 0; [L2778] ~ldv_irq_data_1_1~0 := { base: 0, offset: 0 }; [L2779] ~ldv_irq_1_1~0 := 0; [L2780] ~ldv_irq_1_0~0 := 0; [L2781] ~probed_2~0 := 0; [L2782] ~ldv_irq_line_1_3~0 := 0; [L2783] ~ldv_irq_data_1_0~0 := { base: 0, offset: 0 }; [L2784] ~ldv_state_variable_0~0 := 0; [L2785] ~ldv_irq_line_1_0~0 := 0; [L2786] ~ldv_state_variable_2~0 := 0; [L2787] ~ldv_irq_data_1_3~0 := { base: 0, offset: 0 }; [L2788] ~ref_cnt~0 := 0; [L2789] ~ldv_irq_line_1_1~0 := 0; [L2791] ~ldv_irq_data_1_2~0 := { base: 0, offset: 0 }; [L2792] ~ldv_state_variable_1~0 := 0; [L2793] ~ldv_irq_line_1_2~0 := 0; [L3018] ~ldv_retval_0~0 := 0; [L3019] ~ldv_retval_1~0 := 0; [L3022] ~ldv_retval_2~0 := 0; [L3448] ~ldv_module_refcounter~0 := 1; [L2790] ~iio_interrupt_trigger_driver_group1~0 := { base: 0, offset: 0 }; [L2905] FCALL call ~#iio_interrupt_trigger_ops~0 := #Ultimate.alloc(32); [L2905] FCALL call write~init~$Pointer$(~#__this_module~0, { base: ~#iio_interrupt_trigger_ops~0!base, offset: ~#iio_interrupt_trigger_ops~0!offset }, 8); [L2905] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_ops~0!base, offset: 8 + ~#iio_interrupt_trigger_ops~0!offset }, 8); [L2905] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_ops~0!base, offset: 16 + ~#iio_interrupt_trigger_ops~0!offset }, 8); [L2905] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_ops~0!base, offset: 24 + ~#iio_interrupt_trigger_ops~0!offset }, 8); [L2989-L2999] FCALL call ~#iio_interrupt_trigger_driver~0 := #Ultimate.alloc(166); [L2989-L2999] FCALL call write~init~$Pointer$(#funAddr~iio_interrupt_trigger_probe, { base: ~#iio_interrupt_trigger_driver~0!base, offset: ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$(#funAddr~iio_interrupt_trigger_remove, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 8 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 16 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 24 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 32 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$(#t~string61, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 40 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 48 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 56 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 64 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~int(0, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 72 + ~#iio_interrupt_trigger_driver~0!offset }, 1); [L2989-L2999] FCALL call write~init~int(0, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 73 + ~#iio_interrupt_trigger_driver~0!offset }, 4); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 77 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 85 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 93 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 101 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 109 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 117 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 125 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 133 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 141 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 149 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 157 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~int(0, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 165 + ~#iio_interrupt_trigger_driver~0!offset }, 1); [?] havoc main_#res; [?] havoc main_#t~nondet76, main_#t~switch77, main_#t~nondet78, main_#t~switch79, main_#t~ret80, main_#t~nondet81, main_#t~switch82, main_#t~ret83, main_#t~ret84, main_#t~ret85, main_~tmp~17, main_~tmp___0~4, main_~tmp___1~0; [L3193] havoc main_~tmp~17; [L3194] havoc main_~tmp___0~4; [L3195] havoc main_~tmp___1~0; [L3198] FCALL call ldv_initialize(); [L3199] ~ldv_state_variable_1~0 := 1; [L3200] ~ref_cnt~0 := 0; [L3201] ~ldv_state_variable_0~0 := 1; [L3202] ~ldv_state_variable_2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3204] assume -2147483648 <= main_#t~nondet76 && main_#t~nondet76 <= 2147483647; [L3204] main_~tmp~17 := main_#t~nondet76; [L3204] havoc main_#t~nondet76; [L3206] main_#t~switch77 := 0 == main_~tmp~17; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, main_#t~switch77=false, main_~tmp~17=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3205-L3306] COND FALSE !(main_#t~switch77) [L3213] main_#t~switch77 := main_#t~switch77 || 1 == main_~tmp~17; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, main_#t~switch77=true, main_~tmp~17=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3205-L3306] COND TRUE main_#t~switch77 VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, main_#t~switch77=true, main_~tmp~17=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3214] COND TRUE 0 != ~ldv_state_variable_0~0 [L3215] assume -2147483648 <= main_#t~nondet78 && main_#t~nondet78 <= 2147483647; [L3215] main_~tmp___0~4 := main_#t~nondet78; [L3215] havoc main_#t~nondet78; [L3217] main_#t~switch79 := 0 == main_~tmp___0~4; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, main_#t~switch77=true, main_#t~switch79=false, main_~tmp___0~4=1, main_~tmp~17=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3216-L3246] COND FALSE !(main_#t~switch79) [L3226] main_#t~switch79 := main_#t~switch79 || 1 == main_~tmp___0~4; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3216-L3246] COND TRUE main_#t~switch79 VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3227] COND TRUE 1 == ~ldv_state_variable_0~0 [L3228] havoc iio_interrupt_trigger_driver_init_#res; [L3228] havoc iio_interrupt_trigger_driver_init_#t~ret62, iio_interrupt_trigger_driver_init_~tmp~13; [L3002] havoc iio_interrupt_trigger_driver_init_~tmp~13; [L3005] ldv___platform_driver_register_10_#in~ldv_func_arg1, ldv___platform_driver_register_10_#in~ldv_func_arg2 := ~#iio_interrupt_trigger_driver~0, ~#__this_module~0; [L3005] havoc ldv___platform_driver_register_10_#res; [L3005] havoc ldv___platform_driver_register_10_#t~ret88, ldv___platform_driver_register_10_~ldv_func_arg1, ldv___platform_driver_register_10_~ldv_func_arg2, ldv___platform_driver_register_10_~ldv_func_res~1, ldv___platform_driver_register_10_~tmp~19; [L3372-L3384] ldv___platform_driver_register_10_~ldv_func_arg1 := ldv___platform_driver_register_10_#in~ldv_func_arg1; [L3372-L3384] ldv___platform_driver_register_10_~ldv_func_arg2 := ldv___platform_driver_register_10_#in~ldv_func_arg2; [L3374] havoc ldv___platform_driver_register_10_~ldv_func_res~1; [L3375] havoc ldv___platform_driver_register_10_~tmp~19; [L3378] FCALL call ldv___platform_driver_register_10_#t~ret88 := __platform_driver_register(ldv___platform_driver_register_10_~ldv_func_arg1, ldv___platform_driver_register_10_~ldv_func_arg2); [L3378] assume -2147483648 <= ldv___platform_driver_register_10_#t~ret88 && ldv___platform_driver_register_10_#t~ret88 <= 2147483647; [L3378] ldv___platform_driver_register_10_~tmp~19 := ldv___platform_driver_register_10_#t~ret88; [L3378] havoc ldv___platform_driver_register_10_#t~ret88; [L3379] ldv___platform_driver_register_10_~ldv_func_res~1 := ldv___platform_driver_register_10_~tmp~19; [L3380] ~ldv_state_variable_2~0 := 1; [L3381] havoc ldv_platform_driver_init_2_#t~ret75, ldv_platform_driver_init_2_~tmp~16; [L3151] havoc ldv_platform_driver_init_2_~tmp~16; [L3154] ldv_init_zalloc_#in~size := 1472; [L3154] havoc ldv_init_zalloc_#res; [L3154] havoc ldv_init_zalloc_#t~malloc16, ldv_init_zalloc_~size, ldv_init_zalloc_~p~2, ldv_init_zalloc_~tmp~3; [L2718-L2729] ldv_init_zalloc_~size := ldv_init_zalloc_#in~size; [L2720] havoc ldv_init_zalloc_~p~2; [L2721] havoc ldv_init_zalloc_~tmp~3; [L2724] FCALL call ldv_init_zalloc_#t~malloc16 := #Ultimate.alloc((if ldv_init_zalloc_~size % 4294967296 % 4294967296 <= 2147483647 then ldv_init_zalloc_~size % 4294967296 % 4294967296 else ldv_init_zalloc_~size % 4294967296 % 4294967296 - 4294967296)); VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg1!base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2!base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_~ldv_func_arg1!base=37, ldv___platform_driver_register_10_~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_~ldv_func_arg2!base=36, ldv___platform_driver_register_10_~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#t~malloc16!base=-18446744073709551617, ldv_init_zalloc_#t~malloc16!offset=0, ldv_init_zalloc_~size=1472, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2724] CALL call #Ultimate.meminit(ldv_init_zalloc_#t~malloc16, 1, (if ldv_init_zalloc_~size % 4294967296 % 4294967296 <= 2147483647 then ldv_init_zalloc_~size % 4294967296 % 4294967296 else ldv_init_zalloc_~size % 4294967296 % 4294967296 - 4294967296), (if ldv_init_zalloc_~size % 4294967296 % 4294967296 <= 2147483647 then ldv_init_zalloc_~size % 4294967296 % 4294967296 else ldv_init_zalloc_~size % 4294967296 % 4294967296 - 4294967296)); VAL [#amountOfFields=1, #NULL!base=0, #NULL!offset=0, #product=1472, #ptr!base=-18446744073709551617, #ptr!offset=0, #sizeOfFields=1472, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr!base); [L2724] RET call #Ultimate.meminit(ldv_init_zalloc_#t~malloc16, 1, (if ldv_init_zalloc_~size % 4294967296 % 4294967296 <= 2147483647 then ldv_init_zalloc_~size % 4294967296 % 4294967296 else ldv_init_zalloc_~size % 4294967296 % 4294967296 - 4294967296), (if ldv_init_zalloc_~size % 4294967296 % 4294967296 <= 2147483647 then ldv_init_zalloc_~size % 4294967296 % 4294967296 else ldv_init_zalloc_~size % 4294967296 % 4294967296 - 4294967296)); VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg1!base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2!base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_~ldv_func_arg1!base=37, ldv___platform_driver_register_10_~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_~ldv_func_arg2!base=36, ldv___platform_driver_register_10_~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#t~malloc16!base=-18446744073709551617, ldv_init_zalloc_#t~malloc16!offset=0, ldv_init_zalloc_~size=1472, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2724] ldv_init_zalloc_~tmp~3 := ldv_init_zalloc_#t~malloc16; [L2725] ldv_init_zalloc_~p~2 := ldv_init_zalloc_~tmp~3; [L2726] assume 0 != (if 0 != (ldv_init_zalloc_~p~2!base + ldv_init_zalloc_~p~2!offset) % 18446744073709551616 then 1 else 0); [L2727] ldv_init_zalloc_#res := ldv_init_zalloc_~p~2; [L3154] ldv_platform_driver_init_2_#t~ret75 := ldv_init_zalloc_#res; [L3154] ldv_platform_driver_init_2_~tmp~16 := ldv_platform_driver_init_2_#t~ret75; [L3154] havoc ldv_platform_driver_init_2_#t~ret75; [L3155] ~iio_interrupt_trigger_driver_group1~0 := ldv_platform_driver_init_2_~tmp~16; [L3382] ldv___platform_driver_register_10_#res := ldv___platform_driver_register_10_~ldv_func_res~1; [L3005] iio_interrupt_trigger_driver_init_#t~ret62 := ldv___platform_driver_register_10_#res; [L3005] assume -2147483648 <= iio_interrupt_trigger_driver_init_#t~ret62 && iio_interrupt_trigger_driver_init_#t~ret62 <= 2147483647; [L3005] iio_interrupt_trigger_driver_init_~tmp~13 := iio_interrupt_trigger_driver_init_#t~ret62; [L3005] havoc iio_interrupt_trigger_driver_init_#t~ret62; [L3006] iio_interrupt_trigger_driver_init_#res := iio_interrupt_trigger_driver_init_~tmp~13; [L3228] main_#t~ret80 := iio_interrupt_trigger_driver_init_#res; [L3228] assume -2147483648 <= main_#t~ret80 && main_#t~ret80 <= 2147483647; [L3228] ~ldv_retval_0~0 := main_#t~ret80; [L3228] havoc main_#t~ret80; [L3229] COND TRUE 0 == ~ldv_retval_0~0 [L3230] ~ldv_state_variable_0~0 := 3; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1!base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2!base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1!base=37, ldv___platform_driver_register_10_~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_~ldv_func_arg2!base=36, ldv___platform_driver_register_10_~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res!base=-18446744073709551617, ldv_init_zalloc_#res!offset=0, ldv_init_zalloc_#t~malloc16!base=-18446744073709551617, ldv_init_zalloc_#t~malloc16!offset=0, ldv_init_zalloc_~p~2!base=-18446744073709551617, ldv_init_zalloc_~p~2!offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3!base=-18446744073709551617, ldv_init_zalloc_~tmp~3!offset=0, ldv_platform_driver_init_2_~tmp~16!base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16!offset=0, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3234] COND FALSE !(0 != ~ldv_retval_0~0) VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1!base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2!base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1!base=37, ldv___platform_driver_register_10_~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_~ldv_func_arg2!base=36, ldv___platform_driver_register_10_~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res!base=-18446744073709551617, ldv_init_zalloc_#res!offset=0, ldv_init_zalloc_#t~malloc16!base=-18446744073709551617, ldv_init_zalloc_#t~malloc16!offset=0, ldv_init_zalloc_~p~2!base=-18446744073709551617, ldv_init_zalloc_~p~2!offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3!base=-18446744073709551617, ldv_init_zalloc_~tmp~3!offset=0, ldv_platform_driver_init_2_~tmp~16!base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16!offset=0, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3204] assume -2147483648 <= main_#t~nondet76 && main_#t~nondet76 <= 2147483647; [L3204] main_~tmp~17 := main_#t~nondet76; [L3204] havoc main_#t~nondet76; [L3206] main_#t~switch77 := 0 == main_~tmp~17; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1!base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2!base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1!base=37, ldv___platform_driver_register_10_~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_~ldv_func_arg2!base=36, ldv___platform_driver_register_10_~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res!base=-18446744073709551617, ldv_init_zalloc_#res!offset=0, ldv_init_zalloc_#t~malloc16!base=-18446744073709551617, ldv_init_zalloc_#t~malloc16!offset=0, ldv_init_zalloc_~p~2!base=-18446744073709551617, ldv_init_zalloc_~p~2!offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3!base=-18446744073709551617, ldv_init_zalloc_~tmp~3!offset=0, ldv_platform_driver_init_2_~tmp~16!base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16!offset=0, main_#t~switch77=false, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=2, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3205-L3306] COND FALSE !(main_#t~switch77) [L3213] main_#t~switch77 := main_#t~switch77 || 1 == main_~tmp~17; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1!base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2!base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1!base=37, ldv___platform_driver_register_10_~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_~ldv_func_arg2!base=36, ldv___platform_driver_register_10_~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res!base=-18446744073709551617, ldv_init_zalloc_#res!offset=0, ldv_init_zalloc_#t~malloc16!base=-18446744073709551617, ldv_init_zalloc_#t~malloc16!offset=0, ldv_init_zalloc_~p~2!base=-18446744073709551617, ldv_init_zalloc_~p~2!offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3!base=-18446744073709551617, ldv_init_zalloc_~tmp~3!offset=0, ldv_platform_driver_init_2_~tmp~16!base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16!offset=0, main_#t~switch77=false, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=2, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3205-L3306] COND FALSE !(main_#t~switch77) [L3252] main_#t~switch77 := main_#t~switch77 || 2 == main_~tmp~17; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1!base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2!base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1!base=37, ldv___platform_driver_register_10_~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_~ldv_func_arg2!base=36, ldv___platform_driver_register_10_~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res!base=-18446744073709551617, ldv_init_zalloc_#res!offset=0, ldv_init_zalloc_#t~malloc16!base=-18446744073709551617, ldv_init_zalloc_#t~malloc16!offset=0, ldv_init_zalloc_~p~2!base=-18446744073709551617, ldv_init_zalloc_~p~2!offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3!base=-18446744073709551617, ldv_init_zalloc_~tmp~3!offset=0, ldv_platform_driver_init_2_~tmp~16!base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16!offset=0, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=2, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3205-L3306] COND TRUE main_#t~switch77 VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1!base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2!base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1!base=37, ldv___platform_driver_register_10_~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_~ldv_func_arg2!base=36, ldv___platform_driver_register_10_~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res!base=-18446744073709551617, ldv_init_zalloc_#res!offset=0, ldv_init_zalloc_#t~malloc16!base=-18446744073709551617, ldv_init_zalloc_#t~malloc16!offset=0, ldv_init_zalloc_~p~2!base=-18446744073709551617, ldv_init_zalloc_~p~2!offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3!base=-18446744073709551617, ldv_init_zalloc_~tmp~3!offset=0, ldv_platform_driver_init_2_~tmp~16!base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16!offset=0, main_#t~switch77=true, main_#t~switch79=true, main_~tmp___0~4=1, main_~tmp~17=2, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3253] COND TRUE 0 != ~ldv_state_variable_2~0 [L3254] assume -2147483648 <= main_#t~nondet81 && main_#t~nondet81 <= 2147483647; [L3254] main_~tmp___1~0 := main_#t~nondet81; [L3254] havoc main_#t~nondet81; [L3256] main_#t~switch82 := 0 == main_~tmp___1~0; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1!base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2!base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1!base=37, ldv___platform_driver_register_10_~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_~ldv_func_arg2!base=36, ldv___platform_driver_register_10_~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res!base=-18446744073709551617, ldv_init_zalloc_#res!offset=0, ldv_init_zalloc_#t~malloc16!base=-18446744073709551617, ldv_init_zalloc_#t~malloc16!offset=0, ldv_init_zalloc_~p~2!base=-18446744073709551617, ldv_init_zalloc_~p~2!offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3!base=-18446744073709551617, ldv_init_zalloc_~tmp~3!offset=0, ldv_platform_driver_init_2_~tmp~16!base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16!offset=0, main_#t~switch77=true, main_#t~switch79=true, main_#t~switch82=true, main_~tmp___0~4=1, main_~tmp___1~0=0, main_~tmp~17=2, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3255-L3298] COND TRUE main_#t~switch82 VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1!base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2!base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1!base=37, ldv___platform_driver_register_10_~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_~ldv_func_arg2!base=36, ldv___platform_driver_register_10_~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res!base=-18446744073709551617, ldv_init_zalloc_#res!offset=0, ldv_init_zalloc_#t~malloc16!base=-18446744073709551617, ldv_init_zalloc_#t~malloc16!offset=0, ldv_init_zalloc_~p~2!base=-18446744073709551617, ldv_init_zalloc_~p~2!offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3!base=-18446744073709551617, ldv_init_zalloc_~tmp~3!offset=0, ldv_platform_driver_init_2_~tmp~16!base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16!offset=0, main_#t~switch77=true, main_#t~switch79=true, main_#t~switch82=true, main_~tmp___0~4=1, main_~tmp___1~0=0, main_~tmp~17=2, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3257] COND TRUE 1 == ~ldv_state_variable_2~0 VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, iio_interrupt_trigger_driver_init_#res=0, iio_interrupt_trigger_driver_init_~tmp~13=0, ldv___platform_driver_register_10_#in~ldv_func_arg1!base=37, ldv___platform_driver_register_10_#in~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_#in~ldv_func_arg2!base=36, ldv___platform_driver_register_10_#in~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_#res=0, ldv___platform_driver_register_10_~ldv_func_arg1!base=37, ldv___platform_driver_register_10_~ldv_func_arg1!offset=0, ldv___platform_driver_register_10_~ldv_func_arg2!base=36, ldv___platform_driver_register_10_~ldv_func_arg2!offset=35, ldv___platform_driver_register_10_~ldv_func_res~1=0, ldv___platform_driver_register_10_~tmp~19=0, ldv_init_zalloc_#in~size=1472, ldv_init_zalloc_#res!base=-18446744073709551617, ldv_init_zalloc_#res!offset=0, ldv_init_zalloc_#t~malloc16!base=-18446744073709551617, ldv_init_zalloc_#t~malloc16!offset=0, ldv_init_zalloc_~p~2!base=-18446744073709551617, ldv_init_zalloc_~p~2!offset=0, ldv_init_zalloc_~size=1472, ldv_init_zalloc_~tmp~3!base=-18446744073709551617, ldv_init_zalloc_~tmp~3!offset=0, ldv_platform_driver_init_2_~tmp~16!base=-18446744073709551617, ldv_platform_driver_init_2_~tmp~16!offset=0, main_#t~switch77=true, main_#t~switch79=true, main_#t~switch82=true, main_~tmp___0~4=1, main_~tmp___1~0=0, main_~tmp~17=2, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3258] CALL call main_#t~ret83 := iio_interrupt_trigger_probe(~iio_interrupt_trigger_driver_group1~0); VAL [#in~pdev!base=-18446744073709551617, #in~pdev!offset=0, #NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2906-L2969] ~pdev := #in~pdev; [L2908] havoc ~trig_info~0; [L2909] havoc ~trig~0; [L2910] havoc ~irqflags~0; [L2911] havoc ~irq_res~0; [L2912] havoc ~irq~0; [L2913] havoc ~ret~0; [L2914] havoc ~tmp~11; [L2917] ~ret~0 := 0; [L2918] FCALL call #t~ret48 := platform_get_resource(~pdev, 1024, 0); [L2918] ~irq_res~0 := #t~ret48; [L2918] havoc #t~ret48; VAL [#in~pdev!base=-18446744073709551617, #in~pdev!offset=0, #NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~pdev!base=-18446744073709551617, ~pdev!offset=0, ~probed_2~0=0, ~ref_cnt~0=0, ~ret~0=0] [L2919] COND FALSE !(0 == (~irq_res~0!base + ~irq_res~0!offset) % 18446744073709551616) [L2924] FCALL call #t~mem49 := read~int({ base: ~irq_res~0!base, offset: 24 + ~irq_res~0!offset }, 8); [L2924] ~irqflags~0 := ~bitwiseOr(~bitwiseAnd(#t~mem49, 15), 128); [L2924] havoc #t~mem49; [L2925] FCALL call #t~mem50 := read~int({ base: ~irq_res~0!base, offset: ~irq_res~0!offset }, 8); [L2925] ~irq~0 := (if #t~mem50 % 18446744073709551616 % 4294967296 <= 2147483647 then #t~mem50 % 18446744073709551616 % 4294967296 else #t~mem50 % 18446744073709551616 % 4294967296 - 4294967296); [L2925] havoc #t~mem50; [L2926] havoc #t~nondet51; [L2926] ~trig~0 := #t~nondet51; VAL [#in~pdev!base=-18446744073709551617, #in~pdev!offset=0, #NULL!base=0, #NULL!offset=0, #t~nondet51!base=-171646953605867377786880, #t~nondet51!offset=-21693371030682432700415, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~irq_res~0!base=-18446744073709551617, ~irq_res~0!offset=-174432411960997520080894, ~irq~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~pdev!base=-18446744073709551617, ~pdev!offset=0, ~probed_2~0=0, ~ref_cnt~0=0, ~ret~0=0, ~trig~0!base=-171646953605867377786880, ~trig~0!offset=-21693371030682432700415] [L2927] COND FALSE !(0 == (~trig~0!base + ~trig~0!offset) % 18446744073709551616) [L2933] kzalloc_#in~size, kzalloc_#in~flags := 4, 208; [L2933] havoc kzalloc_#res; [L2933] havoc kzalloc_#t~ret7, kzalloc_~size, kzalloc_~flags, kzalloc_~tmp~0; [L2667-L2675] kzalloc_~size := kzalloc_#in~size; [L2667-L2675] kzalloc_~flags := kzalloc_#in~flags; [L2669] havoc kzalloc_~tmp~0; [L2672] kmalloc_#in~size, kmalloc_#in~flags := kzalloc_~size, ~bitwiseOr(kzalloc_~flags, 32768); [L2672] havoc kmalloc_#res; [L2672] havoc kmalloc_#t~ret6, kmalloc_~size, kmalloc_~flags, kmalloc_~tmp___2~0; [L2658-L2666] kmalloc_~size := kmalloc_#in~size; [L2658-L2666] kmalloc_~flags := kmalloc_#in~flags; [L2660] havoc kmalloc_~tmp___2~0; [L2663] __kmalloc_#in~size, __kmalloc_#in~t := kmalloc_~size, kmalloc_~flags; [L2663] havoc __kmalloc_#res; [L2663] havoc __kmalloc_#t~ret5, __kmalloc_~size, __kmalloc_~t; [L2654-L2657] __kmalloc_~size := __kmalloc_#in~size; [L2654-L2657] __kmalloc_~t := __kmalloc_#in~t; [L2656] ldv_malloc_#in~size := __kmalloc_~size; [L2656] havoc ldv_malloc_#res; [L2656] havoc ldv_malloc_#t~nondet12, ldv_malloc_#t~malloc13, ldv_malloc_~size, ldv_malloc_~p~0, ldv_malloc_~tmp~1, ldv_malloc_~tmp___0~0; [L2682-L2699] ldv_malloc_~size := ldv_malloc_#in~size; [L2684] havoc ldv_malloc_~p~0; [L2685] havoc ldv_malloc_~tmp~1; [L2686] havoc ldv_malloc_~tmp___0~0; [L2689] assume -2147483648 <= ldv_malloc_#t~nondet12 && ldv_malloc_#t~nondet12 <= 2147483647; [L2689] ldv_malloc_~tmp___0~0 := ldv_malloc_#t~nondet12; [L2689] havoc ldv_malloc_#t~nondet12; [L2690] COND TRUE 0 != ldv_malloc_~tmp___0~0 [L2691] ldv_malloc_#res := { base: 0, offset: 0 }; [L2656] __kmalloc_#t~ret5 := ldv_malloc_#res; [L2656] __kmalloc_#res := __kmalloc_#t~ret5; [L2656] havoc __kmalloc_#t~ret5; [L2663] kmalloc_#t~ret6 := __kmalloc_#res; [L2663] kmalloc_~tmp___2~0 := kmalloc_#t~ret6; [L2663] havoc kmalloc_#t~ret6; [L2664] kmalloc_#res := kmalloc_~tmp___2~0; [L2672] kzalloc_#t~ret7 := kmalloc_#res; [L2672] kzalloc_~tmp~0 := kzalloc_#t~ret7; [L2672] havoc kzalloc_#t~ret7; [L2673] kzalloc_#res := kzalloc_~tmp~0; [L2933] #t~ret53 := kzalloc_#res; [L2933] ~tmp~11 := #t~ret53; [L2933] havoc #t~ret53; [L2934] ~trig_info~0 := ~tmp~11; VAL [#in~pdev!base=-18446744073709551617, #in~pdev!offset=0, #NULL!base=0, #NULL!offset=0, #t~nondet51!base=-171646953605867377786880, #t~nondet51!offset=-21693371030682432700415, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, __kmalloc_#in~size=4, __kmalloc_#in~t=57, __kmalloc_#res!base=0, __kmalloc_#res!offset=0, __kmalloc_~size=4, __kmalloc_~t=57, kmalloc_#in~flags=57, kmalloc_#in~size=4, kmalloc_#res!base=0, kmalloc_#res!offset=0, kmalloc_~flags=57, kmalloc_~size=4, kmalloc_~tmp___2~0!base=0, kmalloc_~tmp___2~0!offset=0, kzalloc_#in~flags=208, kzalloc_#in~size=4, kzalloc_#res!base=0, kzalloc_#res!offset=0, kzalloc_~flags=208, kzalloc_~size=4, kzalloc_~tmp~0!base=0, kzalloc_~tmp~0!offset=0, ldv_malloc_#in~size=4, ldv_malloc_#res!base=0, ldv_malloc_#res!offset=0, ldv_malloc_#t~malloc13!base=47, ldv_malloc_#t~malloc13!offset=55, ldv_malloc_~p~0!base=18446744073709551616, ldv_malloc_~p~0!offset=0, ldv_malloc_~size=4, ldv_malloc_~tmp___0~0=-1, ldv_malloc_~tmp~1!base=54, ldv_malloc_~tmp~1!offset=53, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~irq_res~0!base=-18446744073709551617, ~irq_res~0!offset=-174432411960997520080894, ~irq~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~pdev!base=-18446744073709551617, ~pdev!offset=0, ~probed_2~0=0, ~ref_cnt~0=0, ~ret~0=0, ~tmp~11!base=0, ~tmp~11!offset=0, ~trig_info~0!base=0, ~trig_info~0!offset=0, ~trig~0!base=-171646953605867377786880, ~trig~0!offset=-21693371030682432700415] [L2935] COND TRUE 0 == (~trig_info~0!base + ~trig_info~0!offset) % 18446744073709551616 [L2936] ~ret~0 := -12; VAL [#in~pdev!base=-18446744073709551617, #in~pdev!offset=0, #NULL!base=0, #NULL!offset=0, #t~nondet51!base=-171646953605867377786880, #t~nondet51!offset=-21693371030682432700415, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, __kmalloc_#in~size=4, __kmalloc_#in~t=57, __kmalloc_#res!base=0, __kmalloc_#res!offset=0, __kmalloc_~size=4, __kmalloc_~t=57, kmalloc_#in~flags=57, kmalloc_#in~size=4, kmalloc_#res!base=0, kmalloc_#res!offset=0, kmalloc_~flags=57, kmalloc_~size=4, kmalloc_~tmp___2~0!base=0, kmalloc_~tmp___2~0!offset=0, kzalloc_#in~flags=208, kzalloc_#in~size=4, kzalloc_#res!base=0, kzalloc_#res!offset=0, kzalloc_~flags=208, kzalloc_~size=4, kzalloc_~tmp~0!base=0, kzalloc_~tmp~0!offset=0, ldv_malloc_#in~size=4, ldv_malloc_#res!base=0, ldv_malloc_#res!offset=0, ldv_malloc_#t~malloc13!base=47, ldv_malloc_#t~malloc13!offset=55, ldv_malloc_~p~0!base=18446744073709551616, ldv_malloc_~p~0!offset=0, ldv_malloc_~size=4, ldv_malloc_~tmp___0~0=-1, ldv_malloc_~tmp~1!base=54, ldv_malloc_~tmp~1!offset=53, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~irq_res~0!base=-18446744073709551617, ~irq_res~0!offset=-174432411960997520080894, ~irq~0=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~pdev!base=-18446744073709551617, ~pdev!offset=0, ~probed_2~0=0, ~ref_cnt~0=0, ~ret~0=-12, ~tmp~11!base=0, ~tmp~11!offset=0, ~trig_info~0!base=0, ~trig_info~0!offset=0, ~trig~0!base=-171646953605867377786880, ~trig~0!offset=-21693371030682432700415] [L2965] CALL call iio_trigger_put(~trig~0); VAL [#in~trig!base=-171646953605867377786880, #in~trig!offset=-21693371030682432700415, #NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2864-L2873] ~trig := #in~trig; [L2869] FCALL call #t~mem41 := read~$Pointer$({ base: ~trig!base, offset: ~trig!offset }, 8); [L2869] FCALL call #t~mem42 := read~$Pointer$({ base: #t~mem41!base, offset: #t~mem41!offset }, 8); [L2869] ldv_module_put_5_#in~ldv_func_arg1 := #t~mem42; [L2869] havoc ldv_module_put_5_~ldv_func_arg1; [L3314-L3322] ldv_module_put_5_~ldv_func_arg1 := ldv_module_put_5_#in~ldv_func_arg1; VAL [#in~trig!base=-171646953605867377786880, #in~trig!offset=-21693371030682432700415, #NULL!base=0, #NULL!offset=0, #t~mem41!base=45, #t~mem41!offset=39, #t~mem42!base=-552, #t~mem42!offset=-18446744073709551023, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ldv_module_put_5_#in~ldv_func_arg1!base=-552, ldv_module_put_5_#in~ldv_func_arg1!offset=-18446744073709551023, ldv_module_put_5_~ldv_func_arg1!base=-552, ldv_module_put_5_~ldv_func_arg1!offset=-18446744073709551023, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0, ~trig!base=-171646953605867377786880, ~trig!offset=-21693371030682432700415] [L3319] CALL call ldv_module_put(ldv_module_put_5_~ldv_func_arg1); VAL [#in~module!base=-552, #in~module!offset=-18446744073709551023, #NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3481-L3498] ~module := #in~module; VAL [#in~module!base=-552, #in~module!offset=-18446744073709551023, #NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~module!base=-552, ~module!offset=-18446744073709551023, ~probed_2~0=0, ~ref_cnt~0=0] [L3486] COND TRUE 0 != (~module!base + ~module!offset) % 18446744073709551616 VAL [#in~module!base=-552, #in~module!offset=-18446744073709551023, #NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~module!base=-552, ~module!offset=-18446744073709551023, ~probed_2~0=0, ~ref_cnt~0=0] [L3487] COND TRUE ~ldv_module_refcounter~0 <= 1 VAL [#in~module!base=-552, #in~module!offset=-18446744073709551023, #NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~module!base=-552, ~module!offset=-18446744073709551023, ~probed_2~0=0, ~ref_cnt~0=0] [L3488] CALL call ldv_error(); VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3402] assert false; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] #NULL := { base: 0, offset: 0 }; [?] #valid[0] := 0; [L2926] FCALL call #t~string52 := #Ultimate.alloc(10); [L2947] FCALL call #t~string56 := #Ultimate.alloc(22); [L2990] FCALL call #t~string61 := #Ultimate.alloc(22); [L2775] ~ldv_irq_1_2~0 := 0; [L2776] ~LDV_IN_INTERRUPT~0 := 1; [L2777] ~ldv_irq_1_3~0 := 0; [L2778] ~ldv_irq_data_1_1~0 := { base: 0, offset: 0 }; [L2779] ~ldv_irq_1_1~0 := 0; [L2780] ~ldv_irq_1_0~0 := 0; [L2781] ~probed_2~0 := 0; [L2782] ~ldv_irq_line_1_3~0 := 0; [L2783] ~ldv_irq_data_1_0~0 := { base: 0, offset: 0 }; [L2784] ~ldv_state_variable_0~0 := 0; [L2785] ~ldv_irq_line_1_0~0 := 0; [L2786] ~ldv_state_variable_2~0 := 0; [L2787] ~ldv_irq_data_1_3~0 := { base: 0, offset: 0 }; [L2788] ~ref_cnt~0 := 0; [L2789] ~ldv_irq_line_1_1~0 := 0; [L2791] ~ldv_irq_data_1_2~0 := { base: 0, offset: 0 }; [L2792] ~ldv_state_variable_1~0 := 0; [L2793] ~ldv_irq_line_1_2~0 := 0; [L3018] ~ldv_retval_0~0 := 0; [L3019] ~ldv_retval_1~0 := 0; [L3022] ~ldv_retval_2~0 := 0; [L3448] ~ldv_module_refcounter~0 := 1; [L2790] ~iio_interrupt_trigger_driver_group1~0 := { base: 0, offset: 0 }; [L2905] FCALL call ~#iio_interrupt_trigger_ops~0 := #Ultimate.alloc(32); [L2905] FCALL call write~init~$Pointer$(~#__this_module~0, { base: ~#iio_interrupt_trigger_ops~0!base, offset: ~#iio_interrupt_trigger_ops~0!offset }, 8); [L2905] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_ops~0!base, offset: 8 + ~#iio_interrupt_trigger_ops~0!offset }, 8); [L2905] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_ops~0!base, offset: 16 + ~#iio_interrupt_trigger_ops~0!offset }, 8); [L2905] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_ops~0!base, offset: 24 + ~#iio_interrupt_trigger_ops~0!offset }, 8); [L2989-L2999] FCALL call ~#iio_interrupt_trigger_driver~0 := #Ultimate.alloc(166); [L2989-L2999] FCALL call write~init~$Pointer$(#funAddr~iio_interrupt_trigger_probe, { base: ~#iio_interrupt_trigger_driver~0!base, offset: ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$(#funAddr~iio_interrupt_trigger_remove, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 8 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 16 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 24 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 32 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$(#t~string61, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 40 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 48 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 56 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 64 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~int(0, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 72 + ~#iio_interrupt_trigger_driver~0!offset }, 1); [L2989-L2999] FCALL call write~init~int(0, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 73 + ~#iio_interrupt_trigger_driver~0!offset }, 4); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 77 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 85 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 93 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 101 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 109 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 117 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 125 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 133 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 141 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 149 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 157 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~int(0, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 165 + ~#iio_interrupt_trigger_driver~0!offset }, 1); [L3193] havoc ~tmp~17; [L3194] havoc ~tmp___0~4; [L3195] havoc ~tmp___1~0; [L3198] FCALL call ldv_initialize(); [L3199] ~ldv_state_variable_1~0 := 1; [L3200] ~ref_cnt~0 := 0; [L3201] ~ldv_state_variable_0~0 := 1; [L3202] ~ldv_state_variable_2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3204] assume -2147483648 <= #t~nondet76 && #t~nondet76 <= 2147483647; [L3204] ~tmp~17 := #t~nondet76; [L3204] havoc #t~nondet76; [L3206] #t~switch77 := 0 == ~tmp~17; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3205-L3306] COND FALSE !(#t~switch77) [L3213] #t~switch77 := #t~switch77 || 1 == ~tmp~17; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3205-L3306] COND TRUE #t~switch77 VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3214] COND TRUE 0 != ~ldv_state_variable_0~0 [L3215] assume -2147483648 <= #t~nondet78 && #t~nondet78 <= 2147483647; [L3215] ~tmp___0~4 := #t~nondet78; [L3215] havoc #t~nondet78; [L3217] #t~switch79 := 0 == ~tmp___0~4; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3216-L3246] COND FALSE !(#t~switch79) [L3226] #t~switch79 := #t~switch79 || 1 == ~tmp___0~4; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3216-L3246] COND TRUE #t~switch79 VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3227] COND TRUE 1 == ~ldv_state_variable_0~0 [L3002] havoc ~tmp~13; [L3372-L3384] ~ldv_func_arg1 := #in~ldv_func_arg1; [L3372-L3384] ~ldv_func_arg2 := #in~ldv_func_arg2; [L3374] havoc ~ldv_func_res~1; [L3375] havoc ~tmp~19; [L3378] FCALL call #t~ret88 := __platform_driver_register(~ldv_func_arg1, ~ldv_func_arg2); [L3378] assume -2147483648 <= #t~ret88 && #t~ret88 <= 2147483647; [L3378] ~tmp~19 := #t~ret88; [L3378] havoc #t~ret88; [L3379] ~ldv_func_res~1 := ~tmp~19; [L3380] ~ldv_state_variable_2~0 := 1; [L3151] havoc ~tmp~16; [L2718-L2729] ~size := #in~size; [L2720] havoc ~p~2; [L2721] havoc ~tmp~3; [L2724] FCALL call #t~malloc16 := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2724] CALL call #Ultimate.meminit(#t~malloc16, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); VAL [#amountOfFields=1, #NULL!base=0, #NULL!offset=0, #product=1472, #ptr!base=-18446744073709551617, #ptr!offset=0, #sizeOfFields=1472, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr!base); [L2724] RET call #Ultimate.meminit(#t~malloc16, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2724] ~tmp~3 := #t~malloc16; [L2725] ~p~2 := ~tmp~3; [L2726] assume 0 != (if 0 != (~p~2!base + ~p~2!offset) % 18446744073709551616 then 1 else 0); [L2727] #res := ~p~2; [L3154] ~tmp~16 := #t~ret75; [L3154] havoc #t~ret75; [L3155] ~iio_interrupt_trigger_driver_group1~0 := ~tmp~16; [L3382] #res := ~ldv_func_res~1; [L3005] assume -2147483648 <= #t~ret62 && #t~ret62 <= 2147483647; [L3005] ~tmp~13 := #t~ret62; [L3005] havoc #t~ret62; [L3006] #res := ~tmp~13; [L3228] assume -2147483648 <= #t~ret80 && #t~ret80 <= 2147483647; [L3228] ~ldv_retval_0~0 := #t~ret80; [L3228] havoc #t~ret80; [L3229] COND TRUE 0 == ~ldv_retval_0~0 [L3230] ~ldv_state_variable_0~0 := 3; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3234] COND FALSE !(0 != ~ldv_retval_0~0) VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3204] assume -2147483648 <= #t~nondet76 && #t~nondet76 <= 2147483647; [L3204] ~tmp~17 := #t~nondet76; [L3204] havoc #t~nondet76; [L3206] #t~switch77 := 0 == ~tmp~17; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3205-L3306] COND FALSE !(#t~switch77) [L3213] #t~switch77 := #t~switch77 || 1 == ~tmp~17; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3205-L3306] COND FALSE !(#t~switch77) [L3252] #t~switch77 := #t~switch77 || 2 == ~tmp~17; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3205-L3306] COND TRUE #t~switch77 VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3253] COND TRUE 0 != ~ldv_state_variable_2~0 [L3254] assume -2147483648 <= #t~nondet81 && #t~nondet81 <= 2147483647; [L3254] ~tmp___1~0 := #t~nondet81; [L3254] havoc #t~nondet81; [L3256] #t~switch82 := 0 == ~tmp___1~0; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3255-L3298] COND TRUE #t~switch82 VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3257] COND TRUE 1 == ~ldv_state_variable_2~0 VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3258] CALL call #t~ret83 := iio_interrupt_trigger_probe(~iio_interrupt_trigger_driver_group1~0); VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2906-L2969] ~pdev := #in~pdev; [L2908] havoc ~trig_info~0; [L2909] havoc ~trig~0; [L2910] havoc ~irqflags~0; [L2911] havoc ~irq_res~0; [L2912] havoc ~irq~0; [L2913] havoc ~ret~0; [L2914] havoc ~tmp~11; [L2917] ~ret~0 := 0; [L2918] FCALL call #t~ret48 := platform_get_resource(~pdev, 1024, 0); [L2918] ~irq_res~0 := #t~ret48; [L2918] havoc #t~ret48; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2919] COND FALSE !(0 == (~irq_res~0!base + ~irq_res~0!offset) % 18446744073709551616) [L2924] FCALL call #t~mem49 := read~int({ base: ~irq_res~0!base, offset: 24 + ~irq_res~0!offset }, 8); [L2924] ~irqflags~0 := ~bitwiseOr(~bitwiseAnd(#t~mem49, 15), 128); [L2924] havoc #t~mem49; [L2925] FCALL call #t~mem50 := read~int({ base: ~irq_res~0!base, offset: ~irq_res~0!offset }, 8); [L2925] ~irq~0 := (if #t~mem50 % 18446744073709551616 % 4294967296 <= 2147483647 then #t~mem50 % 18446744073709551616 % 4294967296 else #t~mem50 % 18446744073709551616 % 4294967296 - 4294967296); [L2925] havoc #t~mem50; [L2926] havoc #t~nondet51; [L2926] ~trig~0 := #t~nondet51; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2927] COND FALSE !(0 == (~trig~0!base + ~trig~0!offset) % 18446744073709551616) [L2667-L2675] ~size := #in~size; [L2667-L2675] ~flags := #in~flags; [L2669] havoc ~tmp~0; [L2658-L2666] ~size := #in~size; [L2658-L2666] ~flags := #in~flags; [L2660] havoc ~tmp___2~0; [L2654-L2657] ~size := #in~size; [L2654-L2657] ~t := #in~t; [L2682-L2699] ~size := #in~size; [L2684] havoc ~p~0; [L2685] havoc ~tmp~1; [L2686] havoc ~tmp___0~0; [L2689] assume -2147483648 <= #t~nondet12 && #t~nondet12 <= 2147483647; [L2689] ~tmp___0~0 := #t~nondet12; [L2689] havoc #t~nondet12; [L2690] COND TRUE 0 != ~tmp___0~0 [L2691] #res := { base: 0, offset: 0 }; [L2656] #res := #t~ret5; [L2656] havoc #t~ret5; [L2663] ~tmp___2~0 := #t~ret6; [L2663] havoc #t~ret6; [L2664] #res := ~tmp___2~0; [L2672] ~tmp~0 := #t~ret7; [L2672] havoc #t~ret7; [L2673] #res := ~tmp~0; [L2933] ~tmp~11 := #t~ret53; [L2933] havoc #t~ret53; [L2934] ~trig_info~0 := ~tmp~11; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2935] COND TRUE 0 == (~trig_info~0!base + ~trig_info~0!offset) % 18446744073709551616 [L2936] ~ret~0 := -12; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2965] CALL call iio_trigger_put(~trig~0); VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2864-L2873] ~trig := #in~trig; [L2869] FCALL call #t~mem41 := read~$Pointer$({ base: ~trig!base, offset: ~trig!offset }, 8); [L2869] FCALL call #t~mem42 := read~$Pointer$({ base: #t~mem41!base, offset: #t~mem41!offset }, 8); [L3314-L3322] ~ldv_func_arg1 := #in~ldv_func_arg1; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3319] CALL call ldv_module_put(~ldv_func_arg1); VAL [#in~module!base=-552, #in~module!offset=-18446744073709551023, #NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3481-L3498] ~module := #in~module; VAL [#in~module!base=-552, #in~module!offset=-18446744073709551023, #NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~module!base=-552, ~module!offset=-18446744073709551023, ~probed_2~0=0, ~ref_cnt~0=0] [L3486] COND TRUE 0 != (~module!base + ~module!offset) % 18446744073709551616 VAL [#in~module!base=-552, #in~module!offset=-18446744073709551023, #NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~module!base=-552, ~module!offset=-18446744073709551023, ~probed_2~0=0, ~ref_cnt~0=0] [L3487] COND TRUE ~ldv_module_refcounter~0 <= 1 VAL [#in~module!base=-552, #in~module!offset=-18446744073709551023, #NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~module!base=-552, ~module!offset=-18446744073709551023, ~probed_2~0=0, ~ref_cnt~0=0] [L3488] CALL call ldv_error(); VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3402] assert false; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] #NULL := { base: 0, offset: 0 }; [?] #valid[0] := 0; [L2926] FCALL call #t~string52 := #Ultimate.alloc(10); [L2947] FCALL call #t~string56 := #Ultimate.alloc(22); [L2990] FCALL call #t~string61 := #Ultimate.alloc(22); [L2775] ~ldv_irq_1_2~0 := 0; [L2776] ~LDV_IN_INTERRUPT~0 := 1; [L2777] ~ldv_irq_1_3~0 := 0; [L2778] ~ldv_irq_data_1_1~0 := { base: 0, offset: 0 }; [L2779] ~ldv_irq_1_1~0 := 0; [L2780] ~ldv_irq_1_0~0 := 0; [L2781] ~probed_2~0 := 0; [L2782] ~ldv_irq_line_1_3~0 := 0; [L2783] ~ldv_irq_data_1_0~0 := { base: 0, offset: 0 }; [L2784] ~ldv_state_variable_0~0 := 0; [L2785] ~ldv_irq_line_1_0~0 := 0; [L2786] ~ldv_state_variable_2~0 := 0; [L2787] ~ldv_irq_data_1_3~0 := { base: 0, offset: 0 }; [L2788] ~ref_cnt~0 := 0; [L2789] ~ldv_irq_line_1_1~0 := 0; [L2791] ~ldv_irq_data_1_2~0 := { base: 0, offset: 0 }; [L2792] ~ldv_state_variable_1~0 := 0; [L2793] ~ldv_irq_line_1_2~0 := 0; [L3018] ~ldv_retval_0~0 := 0; [L3019] ~ldv_retval_1~0 := 0; [L3022] ~ldv_retval_2~0 := 0; [L3448] ~ldv_module_refcounter~0 := 1; [L2790] ~iio_interrupt_trigger_driver_group1~0 := { base: 0, offset: 0 }; [L2905] FCALL call ~#iio_interrupt_trigger_ops~0 := #Ultimate.alloc(32); [L2905] FCALL call write~init~$Pointer$(~#__this_module~0, { base: ~#iio_interrupt_trigger_ops~0!base, offset: ~#iio_interrupt_trigger_ops~0!offset }, 8); [L2905] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_ops~0!base, offset: 8 + ~#iio_interrupt_trigger_ops~0!offset }, 8); [L2905] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_ops~0!base, offset: 16 + ~#iio_interrupt_trigger_ops~0!offset }, 8); [L2905] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_ops~0!base, offset: 24 + ~#iio_interrupt_trigger_ops~0!offset }, 8); [L2989-L2999] FCALL call ~#iio_interrupt_trigger_driver~0 := #Ultimate.alloc(166); [L2989-L2999] FCALL call write~init~$Pointer$(#funAddr~iio_interrupt_trigger_probe, { base: ~#iio_interrupt_trigger_driver~0!base, offset: ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$(#funAddr~iio_interrupt_trigger_remove, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 8 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 16 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 24 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 32 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$(#t~string61, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 40 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 48 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 56 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 64 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~int(0, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 72 + ~#iio_interrupt_trigger_driver~0!offset }, 1); [L2989-L2999] FCALL call write~init~int(0, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 73 + ~#iio_interrupt_trigger_driver~0!offset }, 4); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 77 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 85 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 93 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 101 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 109 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 117 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 125 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 133 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 141 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 149 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~$Pointer$({ base: 0, offset: 0 }, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 157 + ~#iio_interrupt_trigger_driver~0!offset }, 8); [L2989-L2999] FCALL call write~init~int(0, { base: ~#iio_interrupt_trigger_driver~0!base, offset: 165 + ~#iio_interrupt_trigger_driver~0!offset }, 1); [L3193] havoc ~tmp~17; [L3194] havoc ~tmp___0~4; [L3195] havoc ~tmp___1~0; [L3198] FCALL call ldv_initialize(); [L3199] ~ldv_state_variable_1~0 := 1; [L3200] ~ref_cnt~0 := 0; [L3201] ~ldv_state_variable_0~0 := 1; [L3202] ~ldv_state_variable_2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3204] assume -2147483648 <= #t~nondet76 && #t~nondet76 <= 2147483647; [L3204] ~tmp~17 := #t~nondet76; [L3204] havoc #t~nondet76; [L3206] #t~switch77 := 0 == ~tmp~17; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3205-L3306] COND FALSE !(#t~switch77) [L3213] #t~switch77 := #t~switch77 || 1 == ~tmp~17; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3205-L3306] COND TRUE #t~switch77 VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3214] COND TRUE 0 != ~ldv_state_variable_0~0 [L3215] assume -2147483648 <= #t~nondet78 && #t~nondet78 <= 2147483647; [L3215] ~tmp___0~4 := #t~nondet78; [L3215] havoc #t~nondet78; [L3217] #t~switch79 := 0 == ~tmp___0~4; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3216-L3246] COND FALSE !(#t~switch79) [L3226] #t~switch79 := #t~switch79 || 1 == ~tmp___0~4; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3216-L3246] COND TRUE #t~switch79 VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=0, ~probed_2~0=0, ~ref_cnt~0=0] [L3227] COND TRUE 1 == ~ldv_state_variable_0~0 [L3002] havoc ~tmp~13; [L3372-L3384] ~ldv_func_arg1 := #in~ldv_func_arg1; [L3372-L3384] ~ldv_func_arg2 := #in~ldv_func_arg2; [L3374] havoc ~ldv_func_res~1; [L3375] havoc ~tmp~19; [L3378] FCALL call #t~ret88 := __platform_driver_register(~ldv_func_arg1, ~ldv_func_arg2); [L3378] assume -2147483648 <= #t~ret88 && #t~ret88 <= 2147483647; [L3378] ~tmp~19 := #t~ret88; [L3378] havoc #t~ret88; [L3379] ~ldv_func_res~1 := ~tmp~19; [L3380] ~ldv_state_variable_2~0 := 1; [L3151] havoc ~tmp~16; [L2718-L2729] ~size := #in~size; [L2720] havoc ~p~2; [L2721] havoc ~tmp~3; [L2724] FCALL call #t~malloc16 := #Ultimate.alloc((if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2724] CALL call #Ultimate.meminit(#t~malloc16, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); VAL [#amountOfFields=1, #NULL!base=0, #NULL!offset=0, #product=1472, #ptr!base=-18446744073709551617, #ptr!offset=0, #sizeOfFields=1472, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [?] #memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, #ptr!base); [L2724] RET call #Ultimate.meminit(#t~malloc16, 1, (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296), (if ~size % 4294967296 % 4294967296 <= 2147483647 then ~size % 4294967296 % 4294967296 else ~size % 4294967296 % 4294967296 - 4294967296)); VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=0, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=1, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2724] ~tmp~3 := #t~malloc16; [L2725] ~p~2 := ~tmp~3; [L2726] assume 0 != (if 0 != (~p~2!base + ~p~2!offset) % 18446744073709551616 then 1 else 0); [L2727] #res := ~p~2; [L3154] ~tmp~16 := #t~ret75; [L3154] havoc #t~ret75; [L3155] ~iio_interrupt_trigger_driver_group1~0 := ~tmp~16; [L3382] #res := ~ldv_func_res~1; [L3005] assume -2147483648 <= #t~ret62 && #t~ret62 <= 2147483647; [L3005] ~tmp~13 := #t~ret62; [L3005] havoc #t~ret62; [L3006] #res := ~tmp~13; [L3228] assume -2147483648 <= #t~ret80 && #t~ret80 <= 2147483647; [L3228] ~ldv_retval_0~0 := #t~ret80; [L3228] havoc #t~ret80; [L3229] COND TRUE 0 == ~ldv_retval_0~0 [L3230] ~ldv_state_variable_0~0 := 3; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3234] COND FALSE !(0 != ~ldv_retval_0~0) VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3204] assume -2147483648 <= #t~nondet76 && #t~nondet76 <= 2147483647; [L3204] ~tmp~17 := #t~nondet76; [L3204] havoc #t~nondet76; [L3206] #t~switch77 := 0 == ~tmp~17; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3205-L3306] COND FALSE !(#t~switch77) [L3213] #t~switch77 := #t~switch77 || 1 == ~tmp~17; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3205-L3306] COND FALSE !(#t~switch77) [L3252] #t~switch77 := #t~switch77 || 2 == ~tmp~17; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3205-L3306] COND TRUE #t~switch77 VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3253] COND TRUE 0 != ~ldv_state_variable_2~0 [L3254] assume -2147483648 <= #t~nondet81 && #t~nondet81 <= 2147483647; [L3254] ~tmp___1~0 := #t~nondet81; [L3254] havoc #t~nondet81; [L3256] #t~switch82 := 0 == ~tmp___1~0; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3255-L3298] COND TRUE #t~switch82 VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3257] COND TRUE 1 == ~ldv_state_variable_2~0 VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3258] CALL call #t~ret83 := iio_interrupt_trigger_probe(~iio_interrupt_trigger_driver_group1~0); VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2906-L2969] ~pdev := #in~pdev; [L2908] havoc ~trig_info~0; [L2909] havoc ~trig~0; [L2910] havoc ~irqflags~0; [L2911] havoc ~irq_res~0; [L2912] havoc ~irq~0; [L2913] havoc ~ret~0; [L2914] havoc ~tmp~11; [L2917] ~ret~0 := 0; [L2918] FCALL call #t~ret48 := platform_get_resource(~pdev, 1024, 0); [L2918] ~irq_res~0 := #t~ret48; [L2918] havoc #t~ret48; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2919] COND FALSE !(0 == (~irq_res~0!base + ~irq_res~0!offset) % 18446744073709551616) [L2924] FCALL call #t~mem49 := read~int({ base: ~irq_res~0!base, offset: 24 + ~irq_res~0!offset }, 8); [L2924] ~irqflags~0 := ~bitwiseOr(~bitwiseAnd(#t~mem49, 15), 128); [L2924] havoc #t~mem49; [L2925] FCALL call #t~mem50 := read~int({ base: ~irq_res~0!base, offset: ~irq_res~0!offset }, 8); [L2925] ~irq~0 := (if #t~mem50 % 18446744073709551616 % 4294967296 <= 2147483647 then #t~mem50 % 18446744073709551616 % 4294967296 else #t~mem50 % 18446744073709551616 % 4294967296 - 4294967296); [L2925] havoc #t~mem50; [L2926] havoc #t~nondet51; [L2926] ~trig~0 := #t~nondet51; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2927] COND FALSE !(0 == (~trig~0!base + ~trig~0!offset) % 18446744073709551616) [L2667-L2675] ~size := #in~size; [L2667-L2675] ~flags := #in~flags; [L2669] havoc ~tmp~0; [L2658-L2666] ~size := #in~size; [L2658-L2666] ~flags := #in~flags; [L2660] havoc ~tmp___2~0; [L2654-L2657] ~size := #in~size; [L2654-L2657] ~t := #in~t; [L2682-L2699] ~size := #in~size; [L2684] havoc ~p~0; [L2685] havoc ~tmp~1; [L2686] havoc ~tmp___0~0; [L2689] assume -2147483648 <= #t~nondet12 && #t~nondet12 <= 2147483647; [L2689] ~tmp___0~0 := #t~nondet12; [L2689] havoc #t~nondet12; [L2690] COND TRUE 0 != ~tmp___0~0 [L2691] #res := { base: 0, offset: 0 }; [L2656] #res := #t~ret5; [L2656] havoc #t~ret5; [L2663] ~tmp___2~0 := #t~ret6; [L2663] havoc #t~ret6; [L2664] #res := ~tmp___2~0; [L2672] ~tmp~0 := #t~ret7; [L2672] havoc #t~ret7; [L2673] #res := ~tmp~0; [L2933] ~tmp~11 := #t~ret53; [L2933] havoc #t~ret53; [L2934] ~trig_info~0 := ~tmp~11; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2935] COND TRUE 0 == (~trig_info~0!base + ~trig_info~0!offset) % 18446744073709551616 [L2936] ~ret~0 := -12; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2965] CALL call iio_trigger_put(~trig~0); VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2864-L2873] ~trig := #in~trig; [L2869] FCALL call #t~mem41 := read~$Pointer$({ base: ~trig!base, offset: ~trig!offset }, 8); [L2869] FCALL call #t~mem42 := read~$Pointer$({ base: #t~mem41!base, offset: #t~mem41!offset }, 8); [L3314-L3322] ~ldv_func_arg1 := #in~ldv_func_arg1; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3319] CALL call ldv_module_put(~ldv_func_arg1); VAL [#in~module!base=-552, #in~module!offset=-18446744073709551023, #NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3481-L3498] ~module := #in~module; VAL [#in~module!base=-552, #in~module!offset=-18446744073709551023, #NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~module!base=-552, ~module!offset=-18446744073709551023, ~probed_2~0=0, ~ref_cnt~0=0] [L3486] COND TRUE 0 != (~module!base + ~module!offset) % 18446744073709551616 VAL [#in~module!base=-552, #in~module!offset=-18446744073709551023, #NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~module!base=-552, ~module!offset=-18446744073709551023, ~probed_2~0=0, ~ref_cnt~0=0] [L3487] COND TRUE ~ldv_module_refcounter~0 <= 1 VAL [#in~module!base=-552, #in~module!offset=-18446744073709551023, #NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~module!base=-552, ~module!offset=-18446744073709551023, ~probed_2~0=0, ~ref_cnt~0=0] [L3488] CALL call ldv_error(); VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L3402] assert false; VAL [#NULL!base=0, #NULL!offset=0, #t~string52!base=26, #t~string52!offset=0, #t~string56!base=27, #t~string56!offset=0, #t~string61!base=28, #t~string61!offset=0, old(~ldv_irq_1_0~0)=0, old(~ldv_irq_1_1~0)=0, old(~ldv_irq_1_2~0)=0, old(~ldv_irq_1_3~0)=0, old(~ldv_irq_data_1_0~0!base)=0, old(~ldv_irq_data_1_0~0!offset)=0, old(~ldv_irq_data_1_1~0!base)=0, old(~ldv_irq_data_1_1~0!offset)=0, old(~ldv_irq_data_1_2~0!base)=0, old(~ldv_irq_data_1_2~0!offset)=0, old(~ldv_irq_data_1_3~0!base)=0, old(~ldv_irq_data_1_3~0!offset)=0, old(~ldv_irq_line_1_0~0)=0, old(~ldv_irq_line_1_1~0)=0, old(~ldv_irq_line_1_2~0)=0, old(~ldv_irq_line_1_3~0)=0, old(~ldv_module_refcounter~0)=1, ~#__this_module~0!base=36, ~#__this_module~0!offset=35, ~#iio_interrupt_trigger_driver~0!base=37, ~#iio_interrupt_trigger_driver~0!offset=0, ~#iio_interrupt_trigger_ops~0!base=29, ~#iio_interrupt_trigger_ops~0!offset=0, ~iio_interrupt_trigger_driver_group1~0!base=-18446744073709551617, ~iio_interrupt_trigger_driver_group1~0!offset=0, ~LDV_IN_INTERRUPT~0=1, ~ldv_irq_1_0~0=0, ~ldv_irq_1_1~0=0, ~ldv_irq_1_2~0=0, ~ldv_irq_1_3~0=0, ~ldv_irq_data_1_0~0!base=0, ~ldv_irq_data_1_0~0!offset=0, ~ldv_irq_data_1_1~0!base=0, ~ldv_irq_data_1_1~0!offset=0, ~ldv_irq_data_1_2~0!base=0, ~ldv_irq_data_1_2~0!offset=0, ~ldv_irq_data_1_3~0!base=0, ~ldv_irq_data_1_3~0!offset=0, ~ldv_irq_line_1_0~0=0, ~ldv_irq_line_1_1~0=0, ~ldv_irq_line_1_2~0=0, ~ldv_irq_line_1_3~0=0, ~ldv_module_refcounter~0=1, ~ldv_retval_0~0=0, ~ldv_retval_1~0=0, ~ldv_retval_2~0=0, ~ldv_state_variable_0~0=3, ~ldv_state_variable_1~0=1, ~ldv_state_variable_2~0=1, ~probed_2~0=0, ~ref_cnt~0=0] [L2775] int ldv_irq_1_2 = 0; [L2776] int LDV_IN_INTERRUPT = 1; [L2777] int ldv_irq_1_3 = 0; [L2778] void *ldv_irq_data_1_1 ; [L2779] int ldv_irq_1_1 = 0; [L2780] int ldv_irq_1_0 = 0; [L2781] int probed_2 = 0; [L2782] int ldv_irq_line_1_3 ; [L2783] void *ldv_irq_data_1_0 ; [L2784] int ldv_state_variable_0 ; [L2785] int ldv_irq_line_1_0 ; [L2786] int ldv_state_variable_2 ; [L2787] void *ldv_irq_data_1_3 ; [L2788] int ref_cnt ; [L2789] int ldv_irq_line_1_1 ; [L2791] void *ldv_irq_data_1_2 ; [L2792] int ldv_state_variable_1 ; [L2793] int ldv_irq_line_1_2 ; [L3018] int ldv_retval_0 ; [L3019] int ldv_retval_1 ; [L3022] int ldv_retval_2 ; [L3448] int ldv_module_refcounter = 1; [L2790] struct platform_device *iio_interrupt_trigger_driver_group1 ; [L2905] static struct iio_trigger_ops const iio_interrupt_trigger_ops = {& __this_module, 0, 0, 0}; [L2989-L2999] static struct platform_driver iio_interrupt_trigger_driver = {& iio_interrupt_trigger_probe, & iio_interrupt_trigger_remove, 0, 0, 0, {"iio_interrupt_trigger", 0, 0, 0, (_Bool)0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, 0, (_Bool)0}; [L3193] int tmp ; [L3194] int tmp___0 ; [L3195] int tmp___1 ; [L3199] ldv_state_variable_1 = 1 [L3200] ref_cnt = 0 [L3201] ldv_state_variable_0 = 1 [L3202] ldv_state_variable_2 = 0 VAL [__this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={0:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, probed_2=0, ref_cnt=0] [L3204] tmp = __VERIFIER_nondet_int() [L3206] case 0: [L3213] case 1: VAL [__this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={0:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, probed_2=0, ref_cnt=0] [L3214] COND TRUE ldv_state_variable_0 != 0 [L3215] tmp___0 = __VERIFIER_nondet_int() [L3217] case 0: [L3226] case 1: VAL [__this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={0:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, probed_2=0, ref_cnt=0] [L3227] COND TRUE ldv_state_variable_0 == 1 [L3002] int tmp ; [L3374] ldv_func_ret_type___0 ldv_func_res ; [L3375] int tmp ; [L3378] tmp = __platform_driver_register(ldv_func_arg1, ldv_func_arg2) [L3379] ldv_func_res = tmp [L3380] ldv_state_variable_2 = 1 [L3151] void *tmp ; [L2720] void *p ; [L2721] void *tmp ; [L2724] EXPR, FCALL calloc(1UL, size) VAL [__this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={0:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, probed_2=0, ref_cnt=0] [L2724] tmp = calloc(1UL, size) [L2725] p = tmp [L2727] return (p); [L3154] tmp = ldv_init_zalloc(1472UL) [L3155] iio_interrupt_trigger_driver_group1 = (struct platform_device *)tmp [L3382] return (ldv_func_res); [L3005] tmp = ldv___platform_driver_register_10(& iio_interrupt_trigger_driver, & __this_module) [L3006] return (tmp); [L3228] ldv_retval_0 = iio_interrupt_trigger_driver_init() [L3229] COND TRUE ldv_retval_0 == 0 [L3230] ldv_state_variable_0 = 3 VAL [__this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={-18446744073709551617:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, probed_2=0, ref_cnt=0] [L3234] COND FALSE !(ldv_retval_0 != 0) VAL [__this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={-18446744073709551617:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, probed_2=0, ref_cnt=0] [L3204] tmp = __VERIFIER_nondet_int() [L3206] case 0: [L3213] case 1: [L3252] case 2: VAL [__this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={-18446744073709551617:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, probed_2=0, ref_cnt=0] [L3253] COND TRUE ldv_state_variable_2 != 0 [L3254] tmp___1 = __VERIFIER_nondet_int() [L3256] case 0: VAL [__this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={-18446744073709551617:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, probed_2=0, ref_cnt=0] [L3257] COND TRUE ldv_state_variable_2 == 1 VAL [__this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={-18446744073709551617:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, probed_2=0, ref_cnt=0] [L3258] CALL iio_interrupt_trigger_probe(iio_interrupt_trigger_driver_group1) VAL [\old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_line_1_0)=0, \old(ldv_irq_line_1_1)=0, \old(ldv_irq_line_1_2)=0, \old(ldv_irq_line_1_3)=0, \old(ldv_module_refcounter)=1, __this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={-18446744073709551617:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, probed_2=0, ref_cnt=0] [L2908] struct iio_interrupt_trigger_info *trig_info ; [L2909] struct iio_trigger *trig ; [L2910] unsigned long irqflags ; [L2911] struct resource *irq_res ; [L2912] int irq ; [L2913] int ret ; [L2914] void *tmp ; [L2917] ret = 0 [L2918] irq_res = platform_get_resource(pdev, 1024U, 0U) [L2919] COND FALSE !((unsigned long )irq_res == (unsigned long )((struct resource *)0)) [L2924] EXPR irq_res->flags [L2924] irqflags = (irq_res->flags & 15UL) | 128UL [L2925] EXPR irq_res->start [L2925] irq = (int )irq_res->start [L2926] trig = iio_trigger_alloc("irqtrig%d", irq) VAL [\old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_line_1_0)=0, \old(ldv_irq_line_1_1)=0, \old(ldv_irq_line_1_2)=0, \old(ldv_irq_line_1_3)=0, \old(ldv_module_refcounter)=1, __this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={-18446744073709551617:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, probed_2=0, ref_cnt=0] [L2927] COND FALSE !((unsigned long )trig == (unsigned long )((struct iio_trigger *)0)) [L2669] void *tmp ; [L2660] void *tmp___2 ; [L2684] void *p ; [L2685] void *tmp ; [L2686] int tmp___0 ; [L2689] tmp___0 = __VERIFIER_nondet_int() [L2690] COND TRUE tmp___0 != 0 [L2691] return ((void *)0); [L2656] return ldv_malloc(size); [L2663] tmp___2 = __kmalloc(size, flags) [L2664] return (tmp___2); [L2672] tmp = kmalloc(size, flags | 32768U) [L2673] return (tmp); [L2933] tmp = kzalloc(4UL, 208U) [L2934] trig_info = (struct iio_interrupt_trigger_info *)tmp VAL [\old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_line_1_0)=0, \old(ldv_irq_line_1_1)=0, \old(ldv_irq_line_1_2)=0, \old(ldv_irq_line_1_3)=0, \old(ldv_module_refcounter)=1, __this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={-18446744073709551617:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, probed_2=0, ref_cnt=0] [L2935] COND TRUE (unsigned long )trig_info == (unsigned long )((struct iio_interrupt_trigger_info *)0) [L2936] ret = -12 VAL [\old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_line_1_0)=0, \old(ldv_irq_line_1_1)=0, \old(ldv_irq_line_1_2)=0, \old(ldv_irq_line_1_3)=0, \old(ldv_module_refcounter)=1, __this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={-18446744073709551617:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, probed_2=0, ref_cnt=0] [L2965] CALL iio_trigger_put(trig) VAL [\old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_line_1_0)=0, \old(ldv_irq_line_1_1)=0, \old(ldv_irq_line_1_2)=0, \old(ldv_irq_line_1_3)=0, \old(ldv_module_refcounter)=1, __this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={-18446744073709551617:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, probed_2=0, ref_cnt=0] [L2869] EXPR trig->ops [L2869] (trig->ops)->owner [L3319] CALL ldv_module_put(ldv_func_arg1) VAL [\old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_line_1_0)=0, \old(ldv_irq_line_1_1)=0, \old(ldv_irq_line_1_2)=0, \old(ldv_irq_line_1_3)=0, \old(ldv_module_refcounter)=1, __this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={-18446744073709551617:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, module={-552:-18446744073709551023}, probed_2=0, ref_cnt=0] [L3486] COND TRUE (unsigned long )module != (unsigned long )((struct module *)0) VAL [\old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_line_1_0)=0, \old(ldv_irq_line_1_1)=0, \old(ldv_irq_line_1_2)=0, \old(ldv_irq_line_1_3)=0, \old(ldv_module_refcounter)=1, __this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={-18446744073709551617:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, module={-552:-18446744073709551023}, module={-552:-18446744073709551023}, probed_2=0, ref_cnt=0] [L3487] COND TRUE ldv_module_refcounter <= 1 VAL [\old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_line_1_0)=0, \old(ldv_irq_line_1_1)=0, \old(ldv_irq_line_1_2)=0, \old(ldv_irq_line_1_3)=0, \old(ldv_module_refcounter)=1, __this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={-18446744073709551617:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, module={-552:-18446744073709551023}, module={-552:-18446744073709551023}, probed_2=0, ref_cnt=0] [L3488] CALL ldv_error() VAL [\old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_line_1_0)=0, \old(ldv_irq_line_1_1)=0, \old(ldv_irq_line_1_2)=0, \old(ldv_irq_line_1_3)=0, \old(ldv_module_refcounter)=1, __this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={-18446744073709551617:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, probed_2=0, ref_cnt=0] [L3402] __VERIFIER_error() VAL [\old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_line_1_0)=0, \old(ldv_irq_line_1_1)=0, \old(ldv_irq_line_1_2)=0, \old(ldv_irq_line_1_3)=0, \old(ldv_module_refcounter)=1, __this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={-18446744073709551617:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, probed_2=0, ref_cnt=0] ----- [2018-11-23 09:39:15,447 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck CFG 23.11 09:39:15 ImpRootNode [2018-11-23 09:39:15,447 INFO L132 PluginConnector]: ------------------------ END CodeCheck---------------------------- [2018-11-23 09:39:15,447 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-23 09:39:15,448 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-23 09:39:15,448 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-23 09:39:15,449 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 09:39:07" (3/4) ... [2018-11-23 09:39:15,453 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-11-23 09:39:15,453 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-23 09:39:15,454 INFO L168 Benchmark]: Toolchain (without parser) took 9933.74 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 247.5 MB). Free memory was 952.8 MB in the beginning and 1.0 GB in the end (delta: -60.6 MB). Peak memory consumption was 186.8 MB. Max. memory is 11.5 GB. [2018-11-23 09:39:15,456 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 985.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 09:39:15,456 INFO L168 Benchmark]: CACSL2BoogieTranslator took 797.28 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 137.4 MB). Free memory was 952.8 MB in the beginning and 1.1 GB in the end (delta: -149.5 MB). Peak memory consumption was 61.8 MB. Max. memory is 11.5 GB. [2018-11-23 09:39:15,471 INFO L168 Benchmark]: Boogie Procedure Inliner took 58.83 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2018-11-23 09:39:15,472 INFO L168 Benchmark]: Boogie Preprocessor took 47.78 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2018-11-23 09:39:15,472 INFO L168 Benchmark]: RCFGBuilder took 1215.39 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 942.4 MB in the end (delta: 149.1 MB). Peak memory consumption was 149.1 MB. Max. memory is 11.5 GB. [2018-11-23 09:39:15,473 INFO L168 Benchmark]: CodeCheck took 7805.16 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 110.1 MB). Free memory was 942.4 MB in the beginning and 1.0 GB in the end (delta: -71.0 MB). Peak memory consumption was 39.1 MB. Max. memory is 11.5 GB. [2018-11-23 09:39:15,473 INFO L168 Benchmark]: Witness Printer took 5.76 ms. Allocated memory is still 1.3 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 09:39:15,481 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck: - StatisticsResult: Ultimate CodeCheck benchmark data CFG has 12 procedures, 157 locations, 1 error locations. UNSAFE Result, 6.6s OverallTime, 39 OverallIterations, 0 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: -1028655548 SDtfs, -837086262 SDslu, -2106268334 SDs, 0 SdLazy, 179712744 SolverSat, -1561311484 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 8.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 11287 GetRequests, 11107 SyntacticMatches, 36 SemanticMatches, 144 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9457 ImplicationChecksByTransitivity, 4.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=-1occurred in iteration=-1, traceCheckStatistics: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 0.9s InterpolantComputationTime, 918 NumberOfCodeBlocks, 918 NumberOfCodeBlocksAsserted, 39 NumberOfCheckSat, 847 ConstructedInterpolants, 0 QuantifiedInterpolants, 41069 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 38 InterpolantComputations, 37 PerfectInterpolantSequences, 226/229 InterpolantCoveringCapability, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, ReuseStatistics: No data available - UnprovableResult [Line: 3402]: Unable to prove that call of __VERIFIER_error() unreachable Unable to prove that call of __VERIFIER_error() unreachable Reason: overapproximation of large string literal at line 2990, overapproximation of bitwiseOr at line 2672. Possible FailurePath: [L2775] int ldv_irq_1_2 = 0; [L2776] int LDV_IN_INTERRUPT = 1; [L2777] int ldv_irq_1_3 = 0; [L2778] void *ldv_irq_data_1_1 ; [L2779] int ldv_irq_1_1 = 0; [L2780] int ldv_irq_1_0 = 0; [L2781] int probed_2 = 0; [L2782] int ldv_irq_line_1_3 ; [L2783] void *ldv_irq_data_1_0 ; [L2784] int ldv_state_variable_0 ; [L2785] int ldv_irq_line_1_0 ; [L2786] int ldv_state_variable_2 ; [L2787] void *ldv_irq_data_1_3 ; [L2788] int ref_cnt ; [L2789] int ldv_irq_line_1_1 ; [L2791] void *ldv_irq_data_1_2 ; [L2792] int ldv_state_variable_1 ; [L2793] int ldv_irq_line_1_2 ; [L3018] int ldv_retval_0 ; [L3019] int ldv_retval_1 ; [L3022] int ldv_retval_2 ; [L3448] int ldv_module_refcounter = 1; [L2790] struct platform_device *iio_interrupt_trigger_driver_group1 ; [L2905] static struct iio_trigger_ops const iio_interrupt_trigger_ops = {& __this_module, 0, 0, 0}; [L2989-L2999] static struct platform_driver iio_interrupt_trigger_driver = {& iio_interrupt_trigger_probe, & iio_interrupt_trigger_remove, 0, 0, 0, {"iio_interrupt_trigger", 0, 0, 0, (_Bool)0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, 0, (_Bool)0}; [L3193] int tmp ; [L3194] int tmp___0 ; [L3195] int tmp___1 ; [L3199] ldv_state_variable_1 = 1 [L3200] ref_cnt = 0 [L3201] ldv_state_variable_0 = 1 [L3202] ldv_state_variable_2 = 0 VAL [__this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={0:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, probed_2=0, ref_cnt=0] [L3204] tmp = __VERIFIER_nondet_int() [L3206] case 0: [L3213] case 1: VAL [__this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={0:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, probed_2=0, ref_cnt=0] [L3214] COND TRUE ldv_state_variable_0 != 0 [L3215] tmp___0 = __VERIFIER_nondet_int() [L3217] case 0: [L3226] case 1: VAL [__this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={0:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, probed_2=0, ref_cnt=0] [L3227] COND TRUE ldv_state_variable_0 == 1 [L3002] int tmp ; [L3374] ldv_func_ret_type___0 ldv_func_res ; [L3375] int tmp ; [L3378] tmp = __platform_driver_register(ldv_func_arg1, ldv_func_arg2) [L3379] ldv_func_res = tmp [L3380] ldv_state_variable_2 = 1 [L3151] void *tmp ; [L2720] void *p ; [L2721] void *tmp ; [L2724] EXPR, FCALL calloc(1UL, size) VAL [__this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={0:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, probed_2=0, ref_cnt=0] [L2724] tmp = calloc(1UL, size) [L2725] p = tmp [L2727] return (p); [L3154] tmp = ldv_init_zalloc(1472UL) [L3155] iio_interrupt_trigger_driver_group1 = (struct platform_device *)tmp [L3382] return (ldv_func_res); [L3005] tmp = ldv___platform_driver_register_10(& iio_interrupt_trigger_driver, & __this_module) [L3006] return (tmp); [L3228] ldv_retval_0 = iio_interrupt_trigger_driver_init() [L3229] COND TRUE ldv_retval_0 == 0 [L3230] ldv_state_variable_0 = 3 VAL [__this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={-18446744073709551617:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, probed_2=0, ref_cnt=0] [L3234] COND FALSE !(ldv_retval_0 != 0) VAL [__this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={-18446744073709551617:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, probed_2=0, ref_cnt=0] [L3204] tmp = __VERIFIER_nondet_int() [L3206] case 0: [L3213] case 1: [L3252] case 2: VAL [__this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={-18446744073709551617:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, probed_2=0, ref_cnt=0] [L3253] COND TRUE ldv_state_variable_2 != 0 [L3254] tmp___1 = __VERIFIER_nondet_int() [L3256] case 0: VAL [__this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={-18446744073709551617:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, probed_2=0, ref_cnt=0] [L3257] COND TRUE ldv_state_variable_2 == 1 VAL [__this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={-18446744073709551617:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, probed_2=0, ref_cnt=0] [L3258] CALL iio_interrupt_trigger_probe(iio_interrupt_trigger_driver_group1) VAL [\old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_line_1_0)=0, \old(ldv_irq_line_1_1)=0, \old(ldv_irq_line_1_2)=0, \old(ldv_irq_line_1_3)=0, \old(ldv_module_refcounter)=1, __this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={-18446744073709551617:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, probed_2=0, ref_cnt=0] [L2908] struct iio_interrupt_trigger_info *trig_info ; [L2909] struct iio_trigger *trig ; [L2910] unsigned long irqflags ; [L2911] struct resource *irq_res ; [L2912] int irq ; [L2913] int ret ; [L2914] void *tmp ; [L2917] ret = 0 [L2918] irq_res = platform_get_resource(pdev, 1024U, 0U) [L2919] COND FALSE !((unsigned long )irq_res == (unsigned long )((struct resource *)0)) [L2924] EXPR irq_res->flags [L2924] irqflags = (irq_res->flags & 15UL) | 128UL [L2925] EXPR irq_res->start [L2925] irq = (int )irq_res->start [L2926] trig = iio_trigger_alloc("irqtrig%d", irq) VAL [\old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_line_1_0)=0, \old(ldv_irq_line_1_1)=0, \old(ldv_irq_line_1_2)=0, \old(ldv_irq_line_1_3)=0, \old(ldv_module_refcounter)=1, __this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={-18446744073709551617:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, probed_2=0, ref_cnt=0] [L2927] COND FALSE !((unsigned long )trig == (unsigned long )((struct iio_trigger *)0)) [L2669] void *tmp ; [L2660] void *tmp___2 ; [L2684] void *p ; [L2685] void *tmp ; [L2686] int tmp___0 ; [L2689] tmp___0 = __VERIFIER_nondet_int() [L2690] COND TRUE tmp___0 != 0 [L2691] return ((void *)0); [L2656] return ldv_malloc(size); [L2663] tmp___2 = __kmalloc(size, flags) [L2664] return (tmp___2); [L2672] tmp = kmalloc(size, flags | 32768U) [L2673] return (tmp); [L2933] tmp = kzalloc(4UL, 208U) [L2934] trig_info = (struct iio_interrupt_trigger_info *)tmp VAL [\old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_line_1_0)=0, \old(ldv_irq_line_1_1)=0, \old(ldv_irq_line_1_2)=0, \old(ldv_irq_line_1_3)=0, \old(ldv_module_refcounter)=1, __this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={-18446744073709551617:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, probed_2=0, ref_cnt=0] [L2935] COND TRUE (unsigned long )trig_info == (unsigned long )((struct iio_interrupt_trigger_info *)0) [L2936] ret = -12 VAL [\old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_line_1_0)=0, \old(ldv_irq_line_1_1)=0, \old(ldv_irq_line_1_2)=0, \old(ldv_irq_line_1_3)=0, \old(ldv_module_refcounter)=1, __this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={-18446744073709551617:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, probed_2=0, ref_cnt=0] [L2965] CALL iio_trigger_put(trig) VAL [\old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_line_1_0)=0, \old(ldv_irq_line_1_1)=0, \old(ldv_irq_line_1_2)=0, \old(ldv_irq_line_1_3)=0, \old(ldv_module_refcounter)=1, __this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={-18446744073709551617:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, probed_2=0, ref_cnt=0] [L2869] EXPR trig->ops [L2869] (trig->ops)->owner [L3319] CALL ldv_module_put(ldv_func_arg1) VAL [\old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_line_1_0)=0, \old(ldv_irq_line_1_1)=0, \old(ldv_irq_line_1_2)=0, \old(ldv_irq_line_1_3)=0, \old(ldv_module_refcounter)=1, __this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={-18446744073709551617:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, module={-552:-18446744073709551023}, probed_2=0, ref_cnt=0] [L3486] COND TRUE (unsigned long )module != (unsigned long )((struct module *)0) VAL [\old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_line_1_0)=0, \old(ldv_irq_line_1_1)=0, \old(ldv_irq_line_1_2)=0, \old(ldv_irq_line_1_3)=0, \old(ldv_module_refcounter)=1, __this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={-18446744073709551617:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, module={-552:-18446744073709551023}, module={-552:-18446744073709551023}, probed_2=0, ref_cnt=0] [L3487] COND TRUE ldv_module_refcounter <= 1 VAL [\old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_line_1_0)=0, \old(ldv_irq_line_1_1)=0, \old(ldv_irq_line_1_2)=0, \old(ldv_irq_line_1_3)=0, \old(ldv_module_refcounter)=1, __this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={-18446744073709551617:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, module={-552:-18446744073709551023}, module={-552:-18446744073709551023}, probed_2=0, ref_cnt=0] [L3488] CALL ldv_error() VAL [\old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_line_1_0)=0, \old(ldv_irq_line_1_1)=0, \old(ldv_irq_line_1_2)=0, \old(ldv_irq_line_1_3)=0, \old(ldv_module_refcounter)=1, __this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={-18446744073709551617:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, probed_2=0, ref_cnt=0] [L3402] __VERIFIER_error() VAL [\old(ldv_irq_1_0)=0, \old(ldv_irq_1_1)=0, \old(ldv_irq_1_2)=0, \old(ldv_irq_1_3)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_0)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_1)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_2)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_data_1_3)=0, \old(ldv_irq_line_1_0)=0, \old(ldv_irq_line_1_1)=0, \old(ldv_irq_line_1_2)=0, \old(ldv_irq_line_1_3)=0, \old(ldv_module_refcounter)=1, __this_module={36:35}, iio_interrupt_trigger_driver={37:0}, iio_interrupt_trigger_driver_group1={-18446744073709551617:0}, iio_interrupt_trigger_ops={29:0}, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_module_refcounter=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, probed_2=0, ref_cnt=0] * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 985.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 797.28 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 137.4 MB). Free memory was 952.8 MB in the beginning and 1.1 GB in the end (delta: -149.5 MB). Peak memory consumption was 61.8 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 58.83 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 47.78 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 1215.39 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 942.4 MB in the end (delta: 149.1 MB). Peak memory consumption was 149.1 MB. Max. memory is 11.5 GB. * CodeCheck took 7805.16 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 110.1 MB). Free memory was 942.4 MB in the beginning and 1.0 GB in the end (delta: -71.0 MB). Peak memory consumption was 39.1 MB. Max. memory is 11.5 GB. * Witness Printer took 5.76 ms. Allocated memory is still 1.3 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-aa41828 [2018-11-23 09:39:17,419 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 09:39:17,421 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 09:39:17,431 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 09:39:17,432 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 09:39:17,433 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 09:39:17,434 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 09:39:17,435 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 09:39:17,436 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 09:39:17,437 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 09:39:17,438 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 09:39:17,438 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 09:39:17,439 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 09:39:17,440 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 09:39:17,441 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 09:39:17,442 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 09:39:17,442 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 09:39:17,444 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 09:39:17,446 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 09:39:17,447 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 09:39:17,448 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 09:39:17,449 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 09:39:17,451 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 09:39:17,451 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 09:39:17,451 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 09:39:17,452 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 09:39:17,454 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 09:39:17,454 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 09:39:17,455 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 09:39:17,456 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 09:39:17,456 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 09:39:17,458 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 09:39:17,458 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 09:39:17,458 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 09:39:17,459 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 09:39:17,460 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 09:39:17,460 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_61e1e425-8a20-42d1-b0ad-5933b00438de/bin-2019/ukojak/config/svcomp-Reach-64bit-Kojak_Bitvector.epf [2018-11-23 09:39:17,473 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 09:39:17,473 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 09:39:17,474 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 09:39:17,474 INFO L133 SettingsManager]: * ... to procedures called more than once=ALWAYS [2018-11-23 09:39:17,475 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 09:39:17,475 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 09:39:17,475 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 09:39:17,476 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 09:39:17,476 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 09:39:17,476 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 09:39:17,476 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 09:39:17,476 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-23 09:39:17,477 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-23 09:39:17,477 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 09:39:17,478 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 09:39:17,478 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 09:39:17,478 INFO L131 SettingsManager]: Preferences of CodeCheck differ from their defaults: [2018-11-23 09:39:17,478 INFO L133 SettingsManager]: * Timeout in seconds=1000000 [2018-11-23 09:39:17,478 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 09:39:17,478 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 09:39:17,479 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 [2018-11-23 09:39:17,479 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 09:39:17,479 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 09:39:17,479 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 09:39:17,479 INFO L133 SettingsManager]: * Use separate solver for trace checks=false [2018-11-23 09:39:17,480 INFO L133 SettingsManager]: * Trace refinement strategy=WALRUS [2018-11-23 09:39:17,480 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 09:39:17,480 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-23 09:39:17,480 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-23 09:39:17,480 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 09:39:17,480 INFO L133 SettingsManager]: * To the following directory=dump/ Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_61e1e425-8a20-42d1-b0ad-5933b00438de/bin-2019/ukojak Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Kojak Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 7bd51965801d54a8df6708663b3231e8bf30dd75 [2018-11-23 09:39:17,520 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 09:39:17,531 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 09:39:17,533 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 09:39:17,534 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 09:39:17,535 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 09:39:17,535 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_61e1e425-8a20-42d1-b0ad-5933b00438de/bin-2019/ukojak/../../sv-benchmarks/c/ldv-linux-4.2-rc1/linux-4.2-rc1.tar.xz-08_1a-drivers--iio--trigger--iio-trig-interrupt.ko-entry_point_false-unreach-call.cil.out.c [2018-11-23 09:39:17,580 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_61e1e425-8a20-42d1-b0ad-5933b00438de/bin-2019/ukojak/data/f09ddbb92/59f2dbaa3610455dbce484075b846676/FLAGaa3938408 [2018-11-23 09:39:18,073 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 09:39:18,074 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_61e1e425-8a20-42d1-b0ad-5933b00438de/sv-benchmarks/c/ldv-linux-4.2-rc1/linux-4.2-rc1.tar.xz-08_1a-drivers--iio--trigger--iio-trig-interrupt.ko-entry_point_false-unreach-call.cil.out.c [2018-11-23 09:39:18,093 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_61e1e425-8a20-42d1-b0ad-5933b00438de/bin-2019/ukojak/data/f09ddbb92/59f2dbaa3610455dbce484075b846676/FLAGaa3938408 [2018-11-23 09:39:18,555 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_61e1e425-8a20-42d1-b0ad-5933b00438de/bin-2019/ukojak/data/f09ddbb92/59f2dbaa3610455dbce484075b846676 [2018-11-23 09:39:18,559 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 09:39:18,561 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 09:39:18,561 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 09:39:18,562 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 09:39:18,564 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 09:39:18,565 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 09:39:18" (1/1) ... [2018-11-23 09:39:18,568 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@fefe51f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:39:18, skipping insertion in model container [2018-11-23 09:39:18,568 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 09:39:18" (1/1) ... [2018-11-23 09:39:18,579 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 09:39:18,646 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 09:39:19,218 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 09:39:19,348 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 09:39:19,454 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 09:39:19,506 INFO L195 MainTranslator]: Completed translation [2018-11-23 09:39:19,506 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:39:19 WrapperNode [2018-11-23 09:39:19,507 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 09:39:19,507 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 09:39:19,508 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 09:39:19,508 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 09:39:19,517 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:39:19" (1/1) ... [2018-11-23 09:39:19,539 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:39:19" (1/1) ... [2018-11-23 09:39:19,576 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 09:39:19,576 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 09:39:19,577 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 09:39:19,577 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 09:39:19,587 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:39:19" (1/1) ... [2018-11-23 09:39:19,588 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:39:19" (1/1) ... [2018-11-23 09:39:19,594 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:39:19" (1/1) ... [2018-11-23 09:39:19,595 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:39:19" (1/1) ... [2018-11-23 09:39:19,612 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:39:19" (1/1) ... [2018-11-23 09:39:19,616 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:39:19" (1/1) ... [2018-11-23 09:39:19,621 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:39:19" (1/1) ... [2018-11-23 09:39:19,626 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 09:39:19,627 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 09:39:19,627 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 09:39:19,627 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 09:39:19,628 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 09:39:19" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_61e1e425-8a20-42d1-b0ad-5933b00438de/bin-2019/ukojak/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 [2018-11-23 09:39:19,685 INFO L130 BoogieDeclarations]: Found specification of procedure iio_trigger_unregister [2018-11-23 09:39:19,685 INFO L130 BoogieDeclarations]: Found specification of procedure dev_get_drvdata [2018-11-23 09:39:19,686 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_get_drvdata [2018-11-23 09:39:19,686 INFO L130 BoogieDeclarations]: Found specification of procedure iio_interrupt_trigger_probe [2018-11-23 09:39:19,686 INFO L138 BoogieDeclarations]: Found implementation of procedure iio_interrupt_trigger_probe [2018-11-23 09:39:19,686 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-11-23 09:39:19,686 INFO L130 BoogieDeclarations]: Found specification of procedure platform_driver_unregister [2018-11-23 09:39:19,686 INFO L130 BoogieDeclarations]: Found specification of procedure iio_trigger_register [2018-11-23 09:39:19,686 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE8 [2018-11-23 09:39:19,687 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_irq_1 [2018-11-23 09:39:19,687 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_irq_1 [2018-11-23 09:39:19,687 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 09:39:19,687 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-23 09:39:19,687 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2018-11-23 09:39:19,687 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2018-11-23 09:39:19,687 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize [2018-11-23 09:39:19,687 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-11-23 09:39:19,688 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-11-23 09:39:19,688 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-11-23 09:39:19,688 INFO L130 BoogieDeclarations]: Found specification of procedure iio_trigger_put [2018-11-23 09:39:19,688 INFO L138 BoogieDeclarations]: Found implementation of procedure iio_trigger_put [2018-11-23 09:39:19,688 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_module_put [2018-11-23 09:39:19,688 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_module_put [2018-11-23 09:39:19,688 INFO L130 BoogieDeclarations]: Found specification of procedure platform_get_resource [2018-11-23 09:39:19,690 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-23 09:39:19,690 INFO L130 BoogieDeclarations]: Found specification of procedure dev_set_drvdata [2018-11-23 09:39:19,690 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_set_drvdata [2018-11-23 09:39:19,690 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-11-23 09:39:19,690 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-11-23 09:39:19,691 INFO L130 BoogieDeclarations]: Found specification of procedure free_irq [2018-11-23 09:39:19,691 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1 [2018-11-23 09:39:19,691 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE4 [2018-11-23 09:39:19,691 INFO L130 BoogieDeclarations]: Found specification of procedure put_device [2018-11-23 09:39:19,691 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2018-11-23 09:39:19,691 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2018-11-23 09:39:19,691 INFO L130 BoogieDeclarations]: Found specification of procedure disable_suitable_irq_1 [2018-11-23 09:39:19,691 INFO L138 BoogieDeclarations]: Found implementation of procedure disable_suitable_irq_1 [2018-11-23 09:39:19,691 INFO L130 BoogieDeclarations]: Found specification of procedure __platform_driver_register [2018-11-23 09:39:19,691 INFO L130 BoogieDeclarations]: Found specification of procedure iio_trigger_poll [2018-11-23 09:39:19,692 INFO L130 BoogieDeclarations]: Found specification of procedure request_threaded_irq [2018-11-23 09:39:19,692 INFO L130 BoogieDeclarations]: Found specification of procedure iio_interrupt_trigger_remove [2018-11-23 09:39:19,692 INFO L138 BoogieDeclarations]: Found implementation of procedure iio_interrupt_trigger_remove [2018-11-23 09:39:19,692 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 09:39:19,692 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 09:39:21,756 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 09:39:21,756 INFO L280 CfgBuilder]: Removed 52 assue(true) statements. [2018-11-23 09:39:21,756 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 09:39:21 BoogieIcfgContainer [2018-11-23 09:39:21,757 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 09:39:21,757 INFO L113 PluginConnector]: ------------------------CodeCheck---------------------------- [2018-11-23 09:39:21,757 INFO L271 PluginConnector]: Initializing CodeCheck... [2018-11-23 09:39:21,768 INFO L276 PluginConnector]: CodeCheck initialized [2018-11-23 09:39:21,769 INFO L185 PluginConnector]: Executing the observer CodeCheckObserver from plugin CodeCheck for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 09:39:21" (1/1) ... [2018-11-23 09:39:21,780 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 09:39:21,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2018-11-23 09:39:21,815 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 113 states and 157 transitions. [2018-11-23 09:39:21,816 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 157 transitions. [2018-11-23 09:39:21,820 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2018-11-23 09:39:21,821 INFO L427 CodeCheckObserver]: Error Path is FOUND. [2018-11-23 09:39:21,867 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck has thrown an exception: java.lang.IllegalArgumentException: Indexed Sort BitVec undefined at de.uni_freiburg.informatik.ultimate.logic.SortSymbol.checkArity(SortSymbol.java:153) at de.uni_freiburg.informatik.ultimate.logic.SortSymbol.getSort(SortSymbol.java:177) at de.uni_freiburg.informatik.ultimate.logic.Theory.getSort(Theory.java:1243) at de.uni_freiburg.informatik.ultimate.logic.NoopScript.sort(NoopScript.java:287) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.TermTransferrer.transferSort(TermTransferrer.java:128) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.TermTransferrer.convertApplicationTerm(TermTransferrer.java:162) at de.uni_freiburg.informatik.ultimate.logic.TermTransformer$BuildApplicationTerm.walk(TermTransformer.java:320) at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:122) at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:113) at de.uni_freiburg.informatik.ultimate.logic.TermTransformer.transform(TermTransformer.java:253) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.cfg.SmtSymbols.transferSymbols(SmtSymbols.java:129) at de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck.CodeCheckObserver.process(CodeCheckObserver.java:449) at de.uni_freiburg.informatik.ultimate.core.coreplugin.modelwalker.CFGWalker.runObserver(CFGWalker.java:57) at de.uni_freiburg.informatik.ultimate.core.coreplugin.modelwalker.BaseWalker.runObserver(BaseWalker.java:93) at de.uni_freiburg.informatik.ultimate.core.coreplugin.modelwalker.BaseWalker.run(BaseWalker.java:86) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:316) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-11-23 09:39:21,870 INFO L168 Benchmark]: Toolchain (without parser) took 3310.47 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 161.5 MB). Free memory was 943.8 MB in the beginning and 951.7 MB in the end (delta: -7.9 MB). Peak memory consumption was 153.6 MB. Max. memory is 11.5 GB. [2018-11-23 09:39:21,871 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 09:39:21,872 INFO L168 Benchmark]: CACSL2BoogieTranslator took 945.48 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 161.5 MB). Free memory was 943.8 MB in the beginning and 1.1 GB in the end (delta: -171.4 MB). Peak memory consumption was 76.2 MB. Max. memory is 11.5 GB. [2018-11-23 09:39:21,873 INFO L168 Benchmark]: Boogie Procedure Inliner took 68.74 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 09:39:21,873 INFO L168 Benchmark]: Boogie Preprocessor took 50.26 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.9 MB). Peak memory consumption was 6.9 MB. Max. memory is 11.5 GB. [2018-11-23 09:39:21,875 INFO L168 Benchmark]: RCFGBuilder took 2129.86 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 958.6 MB in the end (delta: 149.8 MB). Peak memory consumption was 149.8 MB. Max. memory is 11.5 GB. [2018-11-23 09:39:21,876 INFO L168 Benchmark]: CodeCheck took 112.31 ms. Allocated memory is still 1.2 GB. Free memory was 958.6 MB in the beginning and 951.7 MB in the end (delta: 6.9 MB). Peak memory consumption was 6.9 MB. Max. memory is 11.5 GB. [2018-11-23 09:39:21,880 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck: - ExceptionOrErrorResult: IllegalArgumentException: Indexed Sort BitVec undefined de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck: IllegalArgumentException: Indexed Sort BitVec undefined: de.uni_freiburg.informatik.ultimate.logic.SortSymbol.checkArity(SortSymbol.java:153) * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 945.48 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 161.5 MB). Free memory was 943.8 MB in the beginning and 1.1 GB in the end (delta: -171.4 MB). Peak memory consumption was 76.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 68.74 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 50.26 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.9 MB). Peak memory consumption was 6.9 MB. Max. memory is 11.5 GB. * RCFGBuilder took 2129.86 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 958.6 MB in the end (delta: 149.8 MB). Peak memory consumption was 149.8 MB. Max. memory is 11.5 GB. * CodeCheck took 112.31 ms. Allocated memory is still 1.2 GB. Free memory was 958.6 MB in the beginning and 951.7 MB in the end (delta: 6.9 MB). Peak memory consumption was 6.9 MB. Max. memory is 11.5 GB. RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request...