./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 35987657 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 68763c9a2179c48c1fc2989bd19031bbd8829c13b9c8eeaf244defd8aef53cfe --- Real Ultimate output --- This is Ultimate 0.2.2-?-3598765 [2022-07-22 01:37:48,538 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-07-22 01:37:48,540 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-07-22 01:37:48,570 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-07-22 01:37:48,570 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-07-22 01:37:48,571 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-07-22 01:37:48,574 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-07-22 01:37:48,576 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-07-22 01:37:48,577 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-07-22 01:37:48,580 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-07-22 01:37:48,581 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-07-22 01:37:48,585 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-07-22 01:37:48,585 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-07-22 01:37:48,586 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-07-22 01:37:48,587 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-07-22 01:37:48,589 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-07-22 01:37:48,590 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-07-22 01:37:48,591 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-07-22 01:37:48,592 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-07-22 01:37:48,596 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-07-22 01:37:48,597 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-07-22 01:37:48,598 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-07-22 01:37:48,599 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-07-22 01:37:48,599 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-07-22 01:37:48,600 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-07-22 01:37:48,605 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-07-22 01:37:48,605 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-07-22 01:37:48,606 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-07-22 01:37:48,606 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-07-22 01:37:48,606 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-07-22 01:37:48,607 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-07-22 01:37:48,607 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-07-22 01:37:48,609 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-07-22 01:37:48,609 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-07-22 01:37:48,610 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-07-22 01:37:48,611 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-07-22 01:37:48,611 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-07-22 01:37:48,612 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-07-22 01:37:48,612 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-07-22 01:37:48,612 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-07-22 01:37:48,614 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-07-22 01:37:48,615 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-07-22 01:37:48,621 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf [2022-07-22 01:37:48,648 INFO L113 SettingsManager]: Loading preferences was successful [2022-07-22 01:37:48,649 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-07-22 01:37:48,649 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-07-22 01:37:48,649 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-07-22 01:37:48,650 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-07-22 01:37:48,650 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-07-22 01:37:48,650 INFO L138 SettingsManager]: * Use SBE=true [2022-07-22 01:37:48,651 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-07-22 01:37:48,651 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-07-22 01:37:48,651 INFO L138 SettingsManager]: * Use old map elimination=false [2022-07-22 01:37:48,651 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-07-22 01:37:48,652 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-07-22 01:37:48,652 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-07-22 01:37:48,652 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-07-22 01:37:48,652 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-07-22 01:37:48,652 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-07-22 01:37:48,652 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-07-22 01:37:48,653 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-07-22 01:37:48,653 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-07-22 01:37:48,653 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-07-22 01:37:48,653 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-07-22 01:37:48,653 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-07-22 01:37:48,653 INFO L138 SettingsManager]: * Use constant arrays=true [2022-07-22 01:37:48,653 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-07-22 01:37:48,654 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-07-22 01:37:48,654 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-07-22 01:37:48,654 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-07-22 01:37:48,654 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-07-22 01:37:48,656 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-07-22 01:37:48,656 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 68763c9a2179c48c1fc2989bd19031bbd8829c13b9c8eeaf244defd8aef53cfe [2022-07-22 01:37:48,911 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-07-22 01:37:48,924 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-07-22 01:37:48,925 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-07-22 01:37:48,926 INFO L271 PluginConnector]: Initializing CDTParser... [2022-07-22 01:37:48,926 INFO L275 PluginConnector]: CDTParser initialized [2022-07-22 01:37:48,927 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i [2022-07-22 01:37:48,968 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/539ae2283/6952df56972940189d63e0311d20167b/FLAG2c2d51fb5 [2022-07-22 01:37:49,283 INFO L306 CDTParser]: Found 1 translation units. [2022-07-22 01:37:49,284 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i [2022-07-22 01:37:49,304 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/539ae2283/6952df56972940189d63e0311d20167b/FLAG2c2d51fb5 [2022-07-22 01:37:49,690 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/539ae2283/6952df56972940189d63e0311d20167b [2022-07-22 01:37:49,692 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-07-22 01:37:49,693 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-07-22 01:37:49,695 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-07-22 01:37:49,695 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-07-22 01:37:49,697 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-07-22 01:37:49,698 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 22.07 01:37:49" (1/1) ... [2022-07-22 01:37:49,699 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@51d3d87c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 01:37:49, skipping insertion in model container [2022-07-22 01:37:49,699 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 22.07 01:37:49" (1/1) ... [2022-07-22 01:37:49,704 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-07-22 01:37:49,737 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-07-22 01:37:49,884 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-22 01:37:49,888 INFO L203 MainTranslator]: Completed pre-run [2022-07-22 01:37:49,941 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-22 01:37:49,974 INFO L208 MainTranslator]: Completed translation [2022-07-22 01:37:49,975 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 01:37:49 WrapperNode [2022-07-22 01:37:49,975 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-07-22 01:37:49,976 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-07-22 01:37:49,976 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-07-22 01:37:49,976 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-07-22 01:37:49,981 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 01:37:49" (1/1) ... [2022-07-22 01:37:50,000 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 01:37:49" (1/1) ... [2022-07-22 01:37:50,014 INFO L137 Inliner]: procedures = 109, calls = 13, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 34 [2022-07-22 01:37:50,015 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-07-22 01:37:50,016 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-07-22 01:37:50,016 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-07-22 01:37:50,016 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-07-22 01:37:50,021 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 01:37:49" (1/1) ... [2022-07-22 01:37:50,021 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 01:37:49" (1/1) ... [2022-07-22 01:37:50,033 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 01:37:49" (1/1) ... [2022-07-22 01:37:50,033 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 01:37:49" (1/1) ... [2022-07-22 01:37:50,040 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 01:37:49" (1/1) ... [2022-07-22 01:37:50,044 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 01:37:49" (1/1) ... [2022-07-22 01:37:50,044 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 01:37:49" (1/1) ... [2022-07-22 01:37:50,046 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-07-22 01:37:50,046 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-07-22 01:37:50,046 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-07-22 01:37:50,046 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-07-22 01:37:50,047 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 01:37:49" (1/1) ... [2022-07-22 01:37:50,052 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-22 01:37:50,059 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-22 01:37:50,073 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-22 01:37:50,078 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-07-22 01:37:50,101 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-07-22 01:37:50,102 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-07-22 01:37:50,102 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-07-22 01:37:50,102 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-07-22 01:37:50,102 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-07-22 01:37:50,102 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-07-22 01:37:50,157 INFO L234 CfgBuilder]: Building ICFG [2022-07-22 01:37:50,158 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-07-22 01:37:50,272 INFO L275 CfgBuilder]: Performing block encoding [2022-07-22 01:37:50,276 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-07-22 01:37:50,277 INFO L299 CfgBuilder]: Removed 2 assume(true) statements. [2022-07-22 01:37:50,278 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.07 01:37:50 BoogieIcfgContainer [2022-07-22 01:37:50,278 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-07-22 01:37:50,279 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-07-22 01:37:50,279 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-07-22 01:37:50,281 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-07-22 01:37:50,281 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-22 01:37:50,281 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 22.07 01:37:49" (1/3) ... [2022-07-22 01:37:50,282 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@10662e17 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 22.07 01:37:50, skipping insertion in model container [2022-07-22 01:37:50,282 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-22 01:37:50,282 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 01:37:49" (2/3) ... [2022-07-22 01:37:50,283 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@10662e17 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 22.07 01:37:50, skipping insertion in model container [2022-07-22 01:37:50,283 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-22 01:37:50,283 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.07 01:37:50" (3/3) ... [2022-07-22 01:37:50,284 INFO L354 chiAutomizerObserver]: Analyzing ICFG Urban-2013WST-Fig2-modified1000-alloca.i [2022-07-22 01:37:50,350 INFO L255 stractBuchiCegarLoop]: Interprodecural is true [2022-07-22 01:37:50,350 INFO L256 stractBuchiCegarLoop]: Hoare is false [2022-07-22 01:37:50,350 INFO L257 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-07-22 01:37:50,350 INFO L258 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-07-22 01:37:50,350 INFO L259 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-07-22 01:37:50,350 INFO L260 stractBuchiCegarLoop]: Difference is false [2022-07-22 01:37:50,350 INFO L261 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-07-22 01:37:50,350 INFO L265 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-07-22 01:37:50,368 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 01:37:50,382 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2022-07-22 01:37:50,383 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 01:37:50,383 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 01:37:50,386 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-22 01:37:50,386 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-07-22 01:37:50,386 INFO L287 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-07-22 01:37:50,387 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 01:37:50,387 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2022-07-22 01:37:50,387 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 01:37:50,388 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 01:37:50,388 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-22 01:37:50,388 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-07-22 01:37:50,392 INFO L752 eck$LassoCheckResult]: Stem: 4#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 10#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem6#1, main_#t~mem5#1, main_#t~mem7#1, main_#t~mem4#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 6#L549-3true [2022-07-22 01:37:50,392 INFO L754 eck$LassoCheckResult]: Loop: 6#L549-3true call main_#t~mem4#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 2#L549-1true assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 7#L551-3true assume !true; 11#L551-4true call main_#t~mem7#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 6#L549-3true [2022-07-22 01:37:50,406 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 01:37:50,407 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2022-07-22 01:37:50,415 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 01:37:50,416 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1960624315] [2022-07-22 01:37:50,416 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 01:37:50,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 01:37:50,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 01:37:50,505 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 01:37:50,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 01:37:50,538 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 01:37:50,541 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 01:37:50,541 INFO L85 PathProgramCache]: Analyzing trace with hash 1144360, now seen corresponding path program 1 times [2022-07-22 01:37:50,541 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 01:37:50,542 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [844703640] [2022-07-22 01:37:50,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 01:37:50,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 01:37:50,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-22 01:37:50,588 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 01:37:50,588 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-22 01:37:50,589 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [844703640] [2022-07-22 01:37:50,589 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [844703640] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-22 01:37:50,589 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-22 01:37:50,590 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-07-22 01:37:50,590 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [495690648] [2022-07-22 01:37:50,590 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-22 01:37:50,594 INFO L769 eck$LassoCheckResult]: loop already infeasible [2022-07-22 01:37:50,595 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-22 01:37:50,619 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2022-07-22 01:37:50,620 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-07-22 01:37:50,621 INFO L87 Difference]: Start difference. First operand has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 2.0) internal successors, (4), 2 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 01:37:50,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-22 01:37:50,624 INFO L93 Difference]: Finished difference Result 11 states and 12 transitions. [2022-07-22 01:37:50,625 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-07-22 01:37:50,628 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11 states and 12 transitions. [2022-07-22 01:37:50,629 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2022-07-22 01:37:50,632 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11 states to 7 states and 8 transitions. [2022-07-22 01:37:50,632 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2022-07-22 01:37:50,632 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2022-07-22 01:37:50,633 INFO L73 IsDeterministic]: Start isDeterministic. Operand 7 states and 8 transitions. [2022-07-22 01:37:50,633 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-22 01:37:50,633 INFO L369 hiAutomatonCegarLoop]: Abstraction has 7 states and 8 transitions. [2022-07-22 01:37:50,642 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7 states and 8 transitions. [2022-07-22 01:37:50,647 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7 to 7. [2022-07-22 01:37:50,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 01:37:50,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 8 transitions. [2022-07-22 01:37:50,648 INFO L392 hiAutomatonCegarLoop]: Abstraction has 7 states and 8 transitions. [2022-07-22 01:37:50,648 INFO L374 stractBuchiCegarLoop]: Abstraction has 7 states and 8 transitions. [2022-07-22 01:37:50,649 INFO L287 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-07-22 01:37:50,649 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 7 states and 8 transitions. [2022-07-22 01:37:50,649 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2022-07-22 01:37:50,650 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 01:37:50,650 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 01:37:50,650 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-22 01:37:50,650 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2022-07-22 01:37:50,651 INFO L752 eck$LassoCheckResult]: Stem: 32#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 33#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem6#1, main_#t~mem5#1, main_#t~mem7#1, main_#t~mem4#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 34#L549-3 [2022-07-22 01:37:50,651 INFO L754 eck$LassoCheckResult]: Loop: 34#L549-3 call main_#t~mem4#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 30#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 31#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 35#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 36#L551-4 call main_#t~mem7#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 34#L549-3 [2022-07-22 01:37:50,652 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 01:37:50,652 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 2 times [2022-07-22 01:37:50,652 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 01:37:50,653 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1400076054] [2022-07-22 01:37:50,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 01:37:50,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 01:37:50,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 01:37:50,676 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 01:37:50,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 01:37:50,688 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 01:37:50,690 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 01:37:50,691 INFO L85 PathProgramCache]: Analyzing trace with hash 35468273, now seen corresponding path program 1 times [2022-07-22 01:37:50,691 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 01:37:50,691 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1379431107] [2022-07-22 01:37:50,691 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 01:37:50,691 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 01:37:50,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-22 01:37:50,755 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 01:37:50,756 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-22 01:37:50,756 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1379431107] [2022-07-22 01:37:50,756 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1379431107] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-22 01:37:50,756 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-22 01:37:50,757 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-07-22 01:37:50,758 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [19649456] [2022-07-22 01:37:50,758 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-22 01:37:50,758 INFO L769 eck$LassoCheckResult]: loop already infeasible [2022-07-22 01:37:50,758 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-22 01:37:50,759 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-07-22 01:37:50,760 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-07-22 01:37:50,760 INFO L87 Difference]: Start difference. First operand 7 states and 8 transitions. cyclomatic complexity: 2 Second operand has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 01:37:50,792 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-22 01:37:50,792 INFO L93 Difference]: Finished difference Result 9 states and 10 transitions. [2022-07-22 01:37:50,792 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-07-22 01:37:50,793 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 9 states and 10 transitions. [2022-07-22 01:37:50,793 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2022-07-22 01:37:50,794 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 9 states to 9 states and 10 transitions. [2022-07-22 01:37:50,794 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2022-07-22 01:37:50,795 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2022-07-22 01:37:50,795 INFO L73 IsDeterministic]: Start isDeterministic. Operand 9 states and 10 transitions. [2022-07-22 01:37:50,795 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-22 01:37:50,795 INFO L369 hiAutomatonCegarLoop]: Abstraction has 9 states and 10 transitions. [2022-07-22 01:37:50,795 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9 states and 10 transitions. [2022-07-22 01:37:50,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 9. [2022-07-22 01:37:50,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.1111111111111112) internal successors, (10), 8 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 01:37:50,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 10 transitions. [2022-07-22 01:37:50,796 INFO L392 hiAutomatonCegarLoop]: Abstraction has 9 states and 10 transitions. [2022-07-22 01:37:50,796 INFO L374 stractBuchiCegarLoop]: Abstraction has 9 states and 10 transitions. [2022-07-22 01:37:50,797 INFO L287 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-07-22 01:37:50,797 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 9 states and 10 transitions. [2022-07-22 01:37:50,797 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2022-07-22 01:37:50,798 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 01:37:50,798 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 01:37:50,798 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-22 01:37:50,798 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 1, 1, 1, 1, 1] [2022-07-22 01:37:50,799 INFO L752 eck$LassoCheckResult]: Stem: 57#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 58#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem6#1, main_#t~mem5#1, main_#t~mem7#1, main_#t~mem4#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 59#L549-3 [2022-07-22 01:37:50,799 INFO L754 eck$LassoCheckResult]: Loop: 59#L549-3 call main_#t~mem4#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 55#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 56#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 60#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 61#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 63#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 62#L551-4 call main_#t~mem7#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 59#L549-3 [2022-07-22 01:37:50,799 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 01:37:50,799 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 3 times [2022-07-22 01:37:50,800 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 01:37:50,800 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [742086870] [2022-07-22 01:37:50,800 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 01:37:50,800 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 01:37:50,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 01:37:50,820 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 01:37:50,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 01:37:50,830 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 01:37:50,830 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 01:37:50,830 INFO L85 PathProgramCache]: Analyzing trace with hash -274676436, now seen corresponding path program 1 times [2022-07-22 01:37:50,831 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 01:37:50,831 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [441999800] [2022-07-22 01:37:50,831 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 01:37:50,832 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 01:37:50,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-22 01:37:50,891 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 01:37:50,891 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-22 01:37:50,892 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [441999800] [2022-07-22 01:37:50,892 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [441999800] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-22 01:37:50,892 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1509225275] [2022-07-22 01:37:50,892 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 01:37:50,892 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-22 01:37:50,893 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-22 01:37:50,894 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-22 01:37:50,895 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-07-22 01:37:50,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-22 01:37:50,935 INFO L263 TraceCheckSpWp]: Trace formula consists of 47 conjuncts, 8 conjunts are in the unsatisfiable core [2022-07-22 01:37:50,937 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-22 01:37:50,972 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-22 01:37:50,994 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:51,013 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-07-22 01:37:51,016 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 01:37:51,017 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-22 01:37:51,043 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 01:37:51,044 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1509225275] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-22 01:37:51,044 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-22 01:37:51,044 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 10 [2022-07-22 01:37:51,044 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [485346012] [2022-07-22 01:37:51,044 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-22 01:37:51,044 INFO L769 eck$LassoCheckResult]: loop already infeasible [2022-07-22 01:37:51,045 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-22 01:37:51,045 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-07-22 01:37:51,046 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=55, Unknown=0, NotChecked=0, Total=90 [2022-07-22 01:37:51,046 INFO L87 Difference]: Start difference. First operand 9 states and 10 transitions. cyclomatic complexity: 2 Second operand has 10 states, 10 states have (on average 1.5) internal successors, (15), 10 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 01:37:51,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-22 01:37:51,104 INFO L93 Difference]: Finished difference Result 15 states and 16 transitions. [2022-07-22 01:37:51,104 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-07-22 01:37:51,105 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 15 states and 16 transitions. [2022-07-22 01:37:51,105 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 13 [2022-07-22 01:37:51,106 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 15 states to 15 states and 16 transitions. [2022-07-22 01:37:51,106 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2022-07-22 01:37:51,106 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2022-07-22 01:37:51,106 INFO L73 IsDeterministic]: Start isDeterministic. Operand 15 states and 16 transitions. [2022-07-22 01:37:51,106 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-22 01:37:51,106 INFO L369 hiAutomatonCegarLoop]: Abstraction has 15 states and 16 transitions. [2022-07-22 01:37:51,107 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states and 16 transitions. [2022-07-22 01:37:51,107 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2022-07-22 01:37:51,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 1.0666666666666667) internal successors, (16), 14 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 01:37:51,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 16 transitions. [2022-07-22 01:37:51,108 INFO L392 hiAutomatonCegarLoop]: Abstraction has 15 states and 16 transitions. [2022-07-22 01:37:51,108 INFO L374 stractBuchiCegarLoop]: Abstraction has 15 states and 16 transitions. [2022-07-22 01:37:51,108 INFO L287 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-07-22 01:37:51,108 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 15 states and 16 transitions. [2022-07-22 01:37:51,109 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 13 [2022-07-22 01:37:51,109 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 01:37:51,109 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 01:37:51,109 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-22 01:37:51,109 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [5, 4, 1, 1, 1, 1] [2022-07-22 01:37:51,110 INFO L752 eck$LassoCheckResult]: Stem: 136#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 137#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem6#1, main_#t~mem5#1, main_#t~mem7#1, main_#t~mem4#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 138#L549-3 [2022-07-22 01:37:51,110 INFO L754 eck$LassoCheckResult]: Loop: 138#L549-3 call main_#t~mem4#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 134#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 135#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 139#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 140#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 141#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 148#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 147#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 146#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 145#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 144#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 143#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 142#L551-4 call main_#t~mem7#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 138#L549-3 [2022-07-22 01:37:51,110 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 01:37:51,110 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 4 times [2022-07-22 01:37:51,110 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 01:37:51,111 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [242455333] [2022-07-22 01:37:51,111 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 01:37:51,111 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 01:37:51,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 01:37:51,116 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 01:37:51,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 01:37:51,120 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 01:37:51,120 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 01:37:51,121 INFO L85 PathProgramCache]: Analyzing trace with hash 351922269, now seen corresponding path program 2 times [2022-07-22 01:37:51,121 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 01:37:51,121 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1596027620] [2022-07-22 01:37:51,121 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 01:37:51,121 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 01:37:51,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-22 01:37:51,240 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 01:37:51,241 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-22 01:37:51,241 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1596027620] [2022-07-22 01:37:51,241 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1596027620] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-22 01:37:51,241 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1226346758] [2022-07-22 01:37:51,241 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-07-22 01:37:51,241 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-22 01:37:51,242 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-22 01:37:51,256 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-22 01:37:51,257 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-07-22 01:37:51,297 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-07-22 01:37:51,297 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-07-22 01:37:51,298 INFO L263 TraceCheckSpWp]: Trace formula consists of 92 conjuncts, 17 conjunts are in the unsatisfiable core [2022-07-22 01:37:51,300 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-22 01:37:51,305 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-22 01:37:51,325 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:51,345 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:51,369 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:51,389 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:51,398 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-07-22 01:37:51,405 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 01:37:51,405 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-22 01:37:51,470 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 01:37:51,470 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1226346758] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-22 01:37:51,470 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-22 01:37:51,471 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 8, 8] total 19 [2022-07-22 01:37:51,471 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [171706710] [2022-07-22 01:37:51,471 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-22 01:37:51,471 INFO L769 eck$LassoCheckResult]: loop already infeasible [2022-07-22 01:37:51,471 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-22 01:37:51,471 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-07-22 01:37:51,472 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=140, Invalid=202, Unknown=0, NotChecked=0, Total=342 [2022-07-22 01:37:51,472 INFO L87 Difference]: Start difference. First operand 15 states and 16 transitions. cyclomatic complexity: 2 Second operand has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 19 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 01:37:51,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-22 01:37:51,577 INFO L93 Difference]: Finished difference Result 27 states and 28 transitions. [2022-07-22 01:37:51,578 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-07-22 01:37:51,578 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 28 transitions. [2022-07-22 01:37:51,579 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 25 [2022-07-22 01:37:51,579 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 27 states and 28 transitions. [2022-07-22 01:37:51,579 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 27 [2022-07-22 01:37:51,580 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 27 [2022-07-22 01:37:51,580 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 28 transitions. [2022-07-22 01:37:51,580 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-22 01:37:51,580 INFO L369 hiAutomatonCegarLoop]: Abstraction has 27 states and 28 transitions. [2022-07-22 01:37:51,580 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 28 transitions. [2022-07-22 01:37:51,581 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2022-07-22 01:37:51,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.037037037037037) internal successors, (28), 26 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 01:37:51,582 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 28 transitions. [2022-07-22 01:37:51,582 INFO L392 hiAutomatonCegarLoop]: Abstraction has 27 states and 28 transitions. [2022-07-22 01:37:51,582 INFO L374 stractBuchiCegarLoop]: Abstraction has 27 states and 28 transitions. [2022-07-22 01:37:51,582 INFO L287 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-07-22 01:37:51,582 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 28 transitions. [2022-07-22 01:37:51,583 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 25 [2022-07-22 01:37:51,583 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 01:37:51,583 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 01:37:51,583 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-22 01:37:51,583 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [11, 10, 1, 1, 1, 1] [2022-07-22 01:37:51,583 INFO L752 eck$LassoCheckResult]: Stem: 284#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 285#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem6#1, main_#t~mem5#1, main_#t~mem7#1, main_#t~mem4#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 286#L549-3 [2022-07-22 01:37:51,584 INFO L754 eck$LassoCheckResult]: Loop: 286#L549-3 call main_#t~mem4#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 282#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 283#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 287#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 288#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 289#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 308#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 307#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 306#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 305#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 304#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 303#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 302#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 301#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 300#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 299#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 298#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 297#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 296#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 295#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 294#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 293#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 292#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 291#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 290#L551-4 call main_#t~mem7#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 286#L549-3 [2022-07-22 01:37:51,584 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 01:37:51,584 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 5 times [2022-07-22 01:37:51,584 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 01:37:51,584 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1725241893] [2022-07-22 01:37:51,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 01:37:51,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 01:37:51,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 01:37:51,589 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 01:37:51,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 01:37:51,592 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 01:37:51,593 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 01:37:51,593 INFO L85 PathProgramCache]: Analyzing trace with hash 646907007, now seen corresponding path program 3 times [2022-07-22 01:37:51,593 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 01:37:51,593 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1428204881] [2022-07-22 01:37:51,593 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 01:37:51,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 01:37:51,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-22 01:37:51,851 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 01:37:51,851 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-22 01:37:51,851 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1428204881] [2022-07-22 01:37:51,851 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1428204881] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-22 01:37:51,851 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1088453987] [2022-07-22 01:37:51,852 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-07-22 01:37:51,852 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-22 01:37:51,852 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-22 01:37:51,853 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-22 01:37:51,854 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-07-22 01:37:51,926 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2022-07-22 01:37:51,927 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-07-22 01:37:51,928 INFO L263 TraceCheckSpWp]: Trace formula consists of 182 conjuncts, 35 conjunts are in the unsatisfiable core [2022-07-22 01:37:51,931 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-22 01:37:51,936 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-22 01:37:51,943 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:51,958 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:51,973 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:51,984 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:51,994 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:52,002 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:52,009 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:52,016 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:52,023 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:52,030 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:52,034 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-07-22 01:37:52,036 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 01:37:52,036 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-22 01:37:52,245 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 01:37:52,246 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1088453987] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-22 01:37:52,246 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-22 01:37:52,246 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 14, 14] total 36 [2022-07-22 01:37:52,246 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [186622923] [2022-07-22 01:37:52,246 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-22 01:37:52,246 INFO L769 eck$LassoCheckResult]: loop already infeasible [2022-07-22 01:37:52,247 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-22 01:37:52,247 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-07-22 01:37:52,247 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=541, Invalid=719, Unknown=0, NotChecked=0, Total=1260 [2022-07-22 01:37:52,248 INFO L87 Difference]: Start difference. First operand 27 states and 28 transitions. cyclomatic complexity: 2 Second operand has 36 states, 36 states have (on average 1.8888888888888888) internal successors, (68), 36 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 01:37:52,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-22 01:37:52,477 INFO L93 Difference]: Finished difference Result 51 states and 52 transitions. [2022-07-22 01:37:52,478 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2022-07-22 01:37:52,478 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 52 transitions. [2022-07-22 01:37:52,479 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 49 [2022-07-22 01:37:52,479 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 52 transitions. [2022-07-22 01:37:52,479 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 51 [2022-07-22 01:37:52,479 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 51 [2022-07-22 01:37:52,480 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 52 transitions. [2022-07-22 01:37:52,480 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-22 01:37:52,480 INFO L369 hiAutomatonCegarLoop]: Abstraction has 51 states and 52 transitions. [2022-07-22 01:37:52,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 52 transitions. [2022-07-22 01:37:52,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2022-07-22 01:37:52,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 51 states have (on average 1.0196078431372548) internal successors, (52), 50 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 01:37:52,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 52 transitions. [2022-07-22 01:37:52,482 INFO L392 hiAutomatonCegarLoop]: Abstraction has 51 states and 52 transitions. [2022-07-22 01:37:52,482 INFO L374 stractBuchiCegarLoop]: Abstraction has 51 states and 52 transitions. [2022-07-22 01:37:52,482 INFO L287 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-07-22 01:37:52,482 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 51 states and 52 transitions. [2022-07-22 01:37:52,483 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 49 [2022-07-22 01:37:52,483 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 01:37:52,483 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 01:37:52,483 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-22 01:37:52,483 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [23, 22, 1, 1, 1, 1] [2022-07-22 01:37:52,483 INFO L752 eck$LassoCheckResult]: Stem: 569#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 570#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem6#1, main_#t~mem5#1, main_#t~mem7#1, main_#t~mem4#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 571#L549-3 [2022-07-22 01:37:52,484 INFO L754 eck$LassoCheckResult]: Loop: 571#L549-3 call main_#t~mem4#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 567#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 568#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 574#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 572#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 573#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 617#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 616#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 615#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 614#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 613#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 612#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 611#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 610#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 609#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 608#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 607#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 606#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 605#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 604#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 603#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 602#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 601#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 600#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 599#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 598#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 597#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 596#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 595#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 594#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 593#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 592#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 591#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 590#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 589#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 588#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 587#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 586#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 585#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 584#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 583#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 582#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 581#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 580#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 579#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 578#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 577#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 576#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 575#L551-4 call main_#t~mem7#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 571#L549-3 [2022-07-22 01:37:52,484 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 01:37:52,484 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 6 times [2022-07-22 01:37:52,485 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 01:37:52,485 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [281098332] [2022-07-22 01:37:52,485 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 01:37:52,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 01:37:52,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 01:37:52,489 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 01:37:52,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 01:37:52,492 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 01:37:52,493 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 01:37:52,493 INFO L85 PathProgramCache]: Analyzing trace with hash 1009537987, now seen corresponding path program 4 times [2022-07-22 01:37:52,493 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 01:37:52,493 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [341180334] [2022-07-22 01:37:52,493 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 01:37:52,493 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 01:37:52,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-22 01:37:53,195 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 01:37:53,195 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-22 01:37:53,195 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [341180334] [2022-07-22 01:37:53,195 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [341180334] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-22 01:37:53,195 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [262657750] [2022-07-22 01:37:53,195 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-07-22 01:37:53,196 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-22 01:37:53,196 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-22 01:37:53,223 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-22 01:37:53,237 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-07-22 01:37:53,451 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-07-22 01:37:53,451 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-07-22 01:37:53,454 INFO L263 TraceCheckSpWp]: Trace formula consists of 362 conjuncts, 71 conjunts are in the unsatisfiable core [2022-07-22 01:37:53,460 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-22 01:37:53,464 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-22 01:37:53,487 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:53,495 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:53,502 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:53,509 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:53,521 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:53,527 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:53,533 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:53,540 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:53,546 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:53,552 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:53,559 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:53,565 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:53,576 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:53,583 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:53,589 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:53,595 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:53,602 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:53,609 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:53,615 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:53,621 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:53,627 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:53,634 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:37:53,638 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-07-22 01:37:53,640 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 01:37:53,640 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-22 01:37:54,266 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 01:37:54,266 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [262657750] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-22 01:37:54,266 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-22 01:37:54,266 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 26, 26] total 73 [2022-07-22 01:37:54,266 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [485534711] [2022-07-22 01:37:54,266 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-22 01:37:54,267 INFO L769 eck$LassoCheckResult]: loop already infeasible [2022-07-22 01:37:54,267 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-22 01:37:54,268 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 73 interpolants. [2022-07-22 01:37:54,269 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2282, Invalid=2974, Unknown=0, NotChecked=0, Total=5256 [2022-07-22 01:37:54,269 INFO L87 Difference]: Start difference. First operand 51 states and 52 transitions. cyclomatic complexity: 2 Second operand has 73 states, 73 states have (on average 1.9315068493150684) internal successors, (141), 73 states have internal predecessors, (141), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 01:37:54,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-22 01:37:54,976 INFO L93 Difference]: Finished difference Result 99 states and 100 transitions. [2022-07-22 01:37:54,977 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 94 states. [2022-07-22 01:37:54,977 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 99 states and 100 transitions. [2022-07-22 01:37:54,978 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 97 [2022-07-22 01:37:54,979 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 99 states to 99 states and 100 transitions. [2022-07-22 01:37:54,979 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 99 [2022-07-22 01:37:54,979 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 99 [2022-07-22 01:37:54,979 INFO L73 IsDeterministic]: Start isDeterministic. Operand 99 states and 100 transitions. [2022-07-22 01:37:54,980 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-22 01:37:54,980 INFO L369 hiAutomatonCegarLoop]: Abstraction has 99 states and 100 transitions. [2022-07-22 01:37:54,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states and 100 transitions. [2022-07-22 01:37:54,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2022-07-22 01:37:54,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 99 states, 99 states have (on average 1.0101010101010102) internal successors, (100), 98 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 01:37:54,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 100 transitions. [2022-07-22 01:37:54,984 INFO L392 hiAutomatonCegarLoop]: Abstraction has 99 states and 100 transitions. [2022-07-22 01:37:54,984 INFO L374 stractBuchiCegarLoop]: Abstraction has 99 states and 100 transitions. [2022-07-22 01:37:54,984 INFO L287 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2022-07-22 01:37:54,984 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 99 states and 100 transitions. [2022-07-22 01:37:54,985 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 97 [2022-07-22 01:37:54,985 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 01:37:54,985 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 01:37:54,985 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-22 01:37:54,985 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [47, 46, 1, 1, 1, 1] [2022-07-22 01:37:54,986 INFO L752 eck$LassoCheckResult]: Stem: 1131#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1132#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem6#1, main_#t~mem5#1, main_#t~mem7#1, main_#t~mem4#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 1133#L549-3 [2022-07-22 01:37:54,986 INFO L754 eck$LassoCheckResult]: Loop: 1133#L549-3 call main_#t~mem4#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 1129#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1130#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1136#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1134#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1135#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1227#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1226#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1225#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1224#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1223#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1222#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1221#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1220#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1219#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1218#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1217#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1216#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1215#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1214#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1213#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1212#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1211#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1210#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1209#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1208#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1207#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1206#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1205#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1204#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1203#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1202#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1201#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1200#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1199#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1198#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1197#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1196#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1195#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1194#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1193#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1192#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1191#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1190#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1189#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1188#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1187#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1186#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1185#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1184#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1183#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1182#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1181#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1180#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1179#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1178#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1177#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1176#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1175#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1174#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1173#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1172#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1171#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1170#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1169#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1168#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1167#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1166#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1165#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1164#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1163#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1162#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1161#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1160#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1159#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1158#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1157#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1156#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1155#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1154#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1153#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1152#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1151#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1150#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1149#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1148#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1147#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1146#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1145#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1144#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1143#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1142#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1141#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1140#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1139#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1138#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 1137#L551-4 call main_#t~mem7#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 1133#L549-3 [2022-07-22 01:37:54,986 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 01:37:54,986 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 7 times [2022-07-22 01:37:54,986 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 01:37:54,986 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [152546302] [2022-07-22 01:37:54,987 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 01:37:54,987 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 01:37:54,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 01:37:54,992 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 01:37:54,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 01:37:54,994 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 01:37:54,995 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 01:37:54,995 INFO L85 PathProgramCache]: Analyzing trace with hash 1846627915, now seen corresponding path program 5 times [2022-07-22 01:37:54,995 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 01:37:54,995 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [897229982] [2022-07-22 01:37:54,995 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 01:37:54,995 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 01:37:55,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-22 01:37:57,037 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 01:37:57,037 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-22 01:37:57,037 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [897229982] [2022-07-22 01:37:57,037 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [897229982] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-22 01:37:57,037 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1574573686] [2022-07-22 01:37:57,037 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-07-22 01:37:57,038 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-22 01:37:57,038 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-22 01:37:57,046 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-22 01:37:57,047 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-07-22 01:38:05,221 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2022-07-22 01:38:05,222 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-07-22 01:38:05,238 INFO L263 TraceCheckSpWp]: Trace formula consists of 722 conjuncts, 143 conjunts are in the unsatisfiable core [2022-07-22 01:38:05,249 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-22 01:38:05,252 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-22 01:38:05,276 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,296 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,303 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,309 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,325 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,332 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,339 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,346 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,354 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,360 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,367 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,373 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,383 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,390 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,398 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,404 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,410 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,417 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,424 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,429 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,435 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,442 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,448 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,453 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,460 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,465 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,470 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,475 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,480 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,486 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,491 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,497 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,504 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,509 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,514 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,524 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,533 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,539 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,545 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,551 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,556 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,561 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,566 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,571 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,576 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,582 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:38:05,587 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-07-22 01:38:05,603 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 01:38:05,604 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-22 01:38:07,827 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 01:38:07,828 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1574573686] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-22 01:38:07,828 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-22 01:38:07,830 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [96, 50, 50] total 145 [2022-07-22 01:38:07,831 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1164768411] [2022-07-22 01:38:07,831 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-22 01:38:07,834 INFO L769 eck$LassoCheckResult]: loop already infeasible [2022-07-22 01:38:07,834 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-22 01:38:07,837 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 145 interpolants. [2022-07-22 01:38:07,850 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9170, Invalid=11710, Unknown=0, NotChecked=0, Total=20880 [2022-07-22 01:38:07,851 INFO L87 Difference]: Start difference. First operand 99 states and 100 transitions. cyclomatic complexity: 2 Second operand has 145 states, 145 states have (on average 1.9655172413793103) internal successors, (285), 145 states have internal predecessors, (285), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 01:38:09,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-22 01:38:09,856 INFO L93 Difference]: Finished difference Result 195 states and 196 transitions. [2022-07-22 01:38:09,856 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 190 states. [2022-07-22 01:38:09,858 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 195 states and 196 transitions. [2022-07-22 01:38:09,863 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 193 [2022-07-22 01:38:09,867 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 195 states to 195 states and 196 transitions. [2022-07-22 01:38:09,891 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 195 [2022-07-22 01:38:09,892 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 195 [2022-07-22 01:38:09,893 INFO L73 IsDeterministic]: Start isDeterministic. Operand 195 states and 196 transitions. [2022-07-22 01:38:09,898 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-22 01:38:09,898 INFO L369 hiAutomatonCegarLoop]: Abstraction has 195 states and 196 transitions. [2022-07-22 01:38:09,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states and 196 transitions. [2022-07-22 01:38:09,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 195. [2022-07-22 01:38:09,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 195 states, 195 states have (on average 1.005128205128205) internal successors, (196), 194 states have internal predecessors, (196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 01:38:09,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 196 transitions. [2022-07-22 01:38:09,907 INFO L392 hiAutomatonCegarLoop]: Abstraction has 195 states and 196 transitions. [2022-07-22 01:38:09,907 INFO L374 stractBuchiCegarLoop]: Abstraction has 195 states and 196 transitions. [2022-07-22 01:38:09,907 INFO L287 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2022-07-22 01:38:09,907 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 195 states and 196 transitions. [2022-07-22 01:38:09,908 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 193 [2022-07-22 01:38:09,908 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 01:38:09,908 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 01:38:09,909 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-22 01:38:09,909 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [95, 94, 1, 1, 1, 1] [2022-07-22 01:38:09,909 INFO L752 eck$LassoCheckResult]: Stem: 2245#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2246#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem6#1, main_#t~mem5#1, main_#t~mem7#1, main_#t~mem4#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 2247#L549-3 [2022-07-22 01:38:09,910 INFO L754 eck$LassoCheckResult]: Loop: 2247#L549-3 call main_#t~mem4#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 2243#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2244#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2250#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2248#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2249#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2437#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2436#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2435#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2434#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2433#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2432#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2431#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2430#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2429#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2428#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2427#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2426#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2425#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2424#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2423#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2422#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2421#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2420#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2419#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2418#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2417#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2416#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2415#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2414#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2413#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2412#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2411#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2410#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2409#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2408#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2407#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2406#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2405#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2404#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2403#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2402#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2401#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2400#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2399#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2398#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2397#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2396#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2395#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2394#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2393#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2392#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2391#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2390#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2389#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2388#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2387#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2386#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2385#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2384#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2383#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2382#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2381#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2380#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2379#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2378#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2377#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2376#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2375#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2374#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2373#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2372#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2371#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2370#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2369#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2368#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2367#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2366#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2365#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2364#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2363#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2362#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2361#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2360#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2359#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2358#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2357#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2356#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2355#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2354#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2353#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2352#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2351#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2350#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2349#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2348#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2347#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2346#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2345#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2344#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2343#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2342#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2341#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2340#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2339#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2338#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2337#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2336#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2335#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2334#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2333#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2332#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2331#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2330#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2329#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2328#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2327#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2326#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2325#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2324#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2323#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2322#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2321#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2320#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2319#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2318#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2317#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2316#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2315#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2314#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2313#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2312#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2311#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2310#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2309#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2308#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2307#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2306#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2305#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2304#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2303#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2302#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2301#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2300#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2299#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2298#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2297#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2296#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2295#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2294#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2293#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2292#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2291#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2290#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2289#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2288#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2287#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2286#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2285#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2284#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2283#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2282#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2281#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2280#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2279#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2278#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2277#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2276#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2275#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2274#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2273#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2272#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2271#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2270#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2269#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2268#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2267#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2266#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2265#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2264#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2263#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2262#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2261#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2260#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2259#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2258#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2257#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2256#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2255#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2254#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2253#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2252#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 2251#L551-4 call main_#t~mem7#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 2247#L549-3 [2022-07-22 01:38:09,910 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 01:38:09,910 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 8 times [2022-07-22 01:38:09,910 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 01:38:09,910 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [238066439] [2022-07-22 01:38:09,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 01:38:09,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 01:38:09,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 01:38:09,924 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 01:38:09,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 01:38:09,933 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 01:38:09,933 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 01:38:09,933 INFO L85 PathProgramCache]: Analyzing trace with hash -1384860837, now seen corresponding path program 6 times [2022-07-22 01:38:09,933 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 01:38:09,933 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1741236873] [2022-07-22 01:38:09,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 01:38:09,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 01:38:10,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-22 01:38:16,758 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 01:38:16,758 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-22 01:38:16,758 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1741236873] [2022-07-22 01:38:16,758 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1741236873] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-22 01:38:16,760 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1112341908] [2022-07-22 01:38:16,760 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-07-22 01:38:16,760 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-22 01:38:16,760 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-22 01:38:16,797 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-22 01:38:16,798 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-07-22 01:42:17,902 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) [2022-07-22 01:42:17,902 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-07-22 01:42:17,976 INFO L263 TraceCheckSpWp]: Trace formula consists of 1442 conjuncts, 287 conjunts are in the unsatisfiable core [2022-07-22 01:42:17,994 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-22 01:42:18,001 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-22 01:42:18,005 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,011 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,017 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,022 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,027 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,032 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,037 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,042 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,048 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,053 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,058 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,063 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,069 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,074 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,080 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,085 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,090 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,095 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,100 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,105 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,109 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,114 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,119 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,125 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,150 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,155 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,165 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,174 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,179 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,185 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,191 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,196 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,202 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,210 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,220 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,225 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,239 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,244 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,249 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,254 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,258 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,265 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,270 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,275 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,279 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,283 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,287 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,291 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,296 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,316 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,320 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,324 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,328 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,332 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,336 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,340 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,344 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,348 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,352 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,357 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,361 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,366 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,370 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,374 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,378 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,382 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,386 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,390 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,394 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,398 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,402 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,406 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,410 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,414 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,418 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,422 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,427 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,431 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,435 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,439 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,448 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,452 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,457 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,463 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,467 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,488 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,493 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,497 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,501 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,506 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,510 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,514 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,518 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,522 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-22 01:42:18,525 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-07-22 01:42:18,529 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 01:42:18,529 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-22 01:42:25,043 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 01:42:25,044 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1112341908] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-22 01:42:25,044 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-22 01:42:25,044 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [192, 98, 98] total 288 [2022-07-22 01:42:25,044 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [769750181] [2022-07-22 01:42:25,044 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-22 01:42:25,045 INFO L769 eck$LassoCheckResult]: loop already infeasible [2022-07-22 01:42:25,045 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-22 01:42:25,050 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 288 interpolants. [2022-07-22 01:42:25,058 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=36577, Invalid=46079, Unknown=0, NotChecked=0, Total=82656 [2022-07-22 01:42:25,059 INFO L87 Difference]: Start difference. First operand 195 states and 196 transitions. cyclomatic complexity: 2 Second operand has 288 states, 288 states have (on average 1.9861111111111112) internal successors, (572), 288 states have internal predecessors, (572), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 01:42:32,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-22 01:42:32,243 INFO L93 Difference]: Finished difference Result 387 states and 388 transitions. [2022-07-22 01:42:32,243 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 382 states. [2022-07-22 01:42:32,246 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 387 states and 388 transitions. [2022-07-22 01:42:32,253 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 385 [2022-07-22 01:42:32,261 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 387 states to 387 states and 388 transitions. [2022-07-22 01:42:32,262 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 387 [2022-07-22 01:42:32,262 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 387 [2022-07-22 01:42:32,262 INFO L73 IsDeterministic]: Start isDeterministic. Operand 387 states and 388 transitions. [2022-07-22 01:42:32,262 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-22 01:42:32,262 INFO L369 hiAutomatonCegarLoop]: Abstraction has 387 states and 388 transitions. [2022-07-22 01:42:32,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 387 states and 388 transitions. [2022-07-22 01:42:32,279 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 387 to 387. [2022-07-22 01:42:32,279 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 387 states, 387 states have (on average 1.0025839793281655) internal successors, (388), 386 states have internal predecessors, (388), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 01:42:32,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 387 states to 387 states and 388 transitions. [2022-07-22 01:42:32,288 INFO L392 hiAutomatonCegarLoop]: Abstraction has 387 states and 388 transitions. [2022-07-22 01:42:32,288 INFO L374 stractBuchiCegarLoop]: Abstraction has 387 states and 388 transitions. [2022-07-22 01:42:32,288 INFO L287 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2022-07-22 01:42:32,288 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 387 states and 388 transitions. [2022-07-22 01:42:32,289 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 385 [2022-07-22 01:42:32,289 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 01:42:32,289 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 01:42:32,304 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-22 01:42:32,304 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [191, 190, 1, 1, 1, 1] [2022-07-22 01:42:32,304 INFO L752 eck$LassoCheckResult]: Stem: 4462#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 4463#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem6#1, main_#t~mem5#1, main_#t~mem7#1, main_#t~mem4#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 4464#L549-3 [2022-07-22 01:42:32,305 INFO L754 eck$LassoCheckResult]: Loop: 4464#L549-3 call main_#t~mem4#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 4460#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4461#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4465#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4466#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4467#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4846#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4845#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4844#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4843#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4842#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4841#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4840#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4839#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4838#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4837#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4836#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4835#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4834#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4833#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4832#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4831#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4830#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4829#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4828#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4827#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4826#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4825#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4824#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4823#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4822#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4821#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4820#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4819#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4818#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4817#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4816#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4815#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4814#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4813#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4812#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4811#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4810#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4809#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4808#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4807#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4806#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4805#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4804#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4803#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4802#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4801#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4800#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4799#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4798#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4797#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4796#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4795#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4794#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4793#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4792#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4791#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4790#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4789#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4788#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4787#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4786#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4785#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4784#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4783#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4782#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4781#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4780#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4779#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4778#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4777#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4776#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4775#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4774#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4773#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4772#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4771#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4770#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4769#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4768#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4767#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4766#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4765#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4764#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4763#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4762#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4761#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4760#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4759#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4758#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4757#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4756#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4755#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4754#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4753#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4752#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4751#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4750#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4749#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4748#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4747#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4746#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4745#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4744#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4743#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4742#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4741#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4740#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4739#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4738#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4737#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4736#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4735#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4734#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4733#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4732#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4731#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4730#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4729#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4728#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4727#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4726#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4725#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4724#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4723#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4722#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4721#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4720#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4719#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4718#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4717#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4716#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4715#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4714#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4713#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4712#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4711#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4710#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4709#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4708#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4707#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4706#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4705#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4704#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4703#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4702#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4701#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4700#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4699#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4698#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4697#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4696#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4695#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4694#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4693#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4692#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4691#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4690#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4689#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4688#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4687#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4686#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4685#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4684#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4683#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4682#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4681#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4680#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4679#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4678#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4677#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4676#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4675#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4674#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4673#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4672#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4671#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4670#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4669#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4668#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4667#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4666#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4665#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4664#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4663#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4662#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4661#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4660#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4659#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4658#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4657#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4656#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4655#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4654#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4653#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4652#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4651#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4650#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4649#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4648#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4647#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4646#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4645#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4644#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4643#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4642#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4641#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4640#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4639#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4638#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4637#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4636#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4635#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4634#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4633#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4632#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4631#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4630#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4629#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4628#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4627#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4626#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4625#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4624#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4623#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4622#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4621#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4620#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4619#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4618#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4617#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4616#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4615#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4614#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4613#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4612#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4611#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4610#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4609#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4608#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4607#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4606#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4605#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4604#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4603#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4602#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4601#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4600#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4599#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4598#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4597#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4596#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4595#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4594#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4593#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4592#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4591#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4590#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4589#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4588#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4587#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4586#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4585#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4584#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4583#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4582#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4581#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4580#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4579#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4578#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4577#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4576#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4575#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4574#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4573#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4572#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4571#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4570#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4569#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4568#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4567#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4566#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4565#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4564#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4563#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4562#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4561#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4560#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4559#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4558#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4557#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4556#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4555#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4554#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4553#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4552#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4551#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4550#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4549#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4548#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4547#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4546#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4545#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4544#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4543#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4542#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4541#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4540#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4539#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4538#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4537#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4536#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4535#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4534#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4533#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4532#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4531#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4530#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4529#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4528#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4527#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4526#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4525#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4524#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4523#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4522#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4521#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4520#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4519#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4518#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4517#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4516#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4515#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4514#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4513#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4512#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4511#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4510#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4509#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4508#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4507#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4506#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4505#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4504#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4503#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4502#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4501#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4500#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4499#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4498#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4497#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4496#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4495#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4494#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4493#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4492#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4491#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4490#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4489#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4488#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4487#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4486#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4485#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4484#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4483#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4482#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4481#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4480#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4479#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4478#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4477#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4476#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4475#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4474#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4473#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4472#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4471#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 4470#L551-3 call main_#t~mem5#1 := read~int(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 4469#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 4468#L551-4 call main_#t~mem7#1 := read~int(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 4464#L549-3 [2022-07-22 01:42:32,305 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 01:42:32,305 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 9 times [2022-07-22 01:42:32,305 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 01:42:32,305 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1477271163] [2022-07-22 01:42:32,305 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 01:42:32,305 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 01:42:32,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 01:42:32,328 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 01:42:32,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 01:42:32,331 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 01:42:32,331 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 01:42:32,331 INFO L85 PathProgramCache]: Analyzing trace with hash 1109474683, now seen corresponding path program 7 times [2022-07-22 01:42:32,331 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 01:42:32,331 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [472730118] [2022-07-22 01:42:32,331 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 01:42:32,331 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 01:42:32,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat