./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test10-2.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 35987657 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test10-2.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 9a343b75818c5d561b79c31bb62e9abdd9bdb0bf3f01f7efa313d9ef0f4204f4 --- Real Ultimate output --- This is Ultimate 0.2.2-?-3598765 [2022-07-22 03:55:19,060 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-07-22 03:55:19,063 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-07-22 03:55:19,105 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-07-22 03:55:19,106 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-07-22 03:55:19,107 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-07-22 03:55:19,111 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-07-22 03:55:19,114 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-07-22 03:55:19,116 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-07-22 03:55:19,120 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-07-22 03:55:19,122 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-07-22 03:55:19,126 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-07-22 03:55:19,126 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-07-22 03:55:19,128 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-07-22 03:55:19,129 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-07-22 03:55:19,132 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-07-22 03:55:19,133 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-07-22 03:55:19,133 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-07-22 03:55:19,135 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-07-22 03:55:19,140 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-07-22 03:55:19,142 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-07-22 03:55:19,144 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-07-22 03:55:19,144 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-07-22 03:55:19,146 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-07-22 03:55:19,148 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-07-22 03:55:19,155 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-07-22 03:55:19,157 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-07-22 03:55:19,157 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-07-22 03:55:19,158 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-07-22 03:55:19,159 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-07-22 03:55:19,160 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-07-22 03:55:19,160 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-07-22 03:55:19,161 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-07-22 03:55:19,162 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-07-22 03:55:19,164 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-07-22 03:55:19,164 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-07-22 03:55:19,165 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-07-22 03:55:19,165 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-07-22 03:55:19,165 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-07-22 03:55:19,166 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-07-22 03:55:19,166 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-07-22 03:55:19,167 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-07-22 03:55:19,168 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-07-22 03:55:19,196 INFO L113 SettingsManager]: Loading preferences was successful [2022-07-22 03:55:19,197 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-07-22 03:55:19,197 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-07-22 03:55:19,197 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-07-22 03:55:19,199 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-07-22 03:55:19,199 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-07-22 03:55:19,199 INFO L138 SettingsManager]: * Use SBE=true [2022-07-22 03:55:19,199 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-07-22 03:55:19,200 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-07-22 03:55:19,200 INFO L138 SettingsManager]: * Use old map elimination=false [2022-07-22 03:55:19,201 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-07-22 03:55:19,201 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-07-22 03:55:19,211 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-07-22 03:55:19,211 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-07-22 03:55:19,211 INFO L138 SettingsManager]: * sizeof long=4 [2022-07-22 03:55:19,211 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-07-22 03:55:19,212 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-07-22 03:55:19,212 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-07-22 03:55:19,212 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-07-22 03:55:19,212 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-07-22 03:55:19,213 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-07-22 03:55:19,213 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-07-22 03:55:19,213 INFO L138 SettingsManager]: * sizeof long double=12 [2022-07-22 03:55:19,213 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-07-22 03:55:19,213 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-07-22 03:55:19,214 INFO L138 SettingsManager]: * Use constant arrays=true [2022-07-22 03:55:19,214 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-07-22 03:55:19,214 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-07-22 03:55:19,214 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-07-22 03:55:19,214 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-07-22 03:55:19,215 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-07-22 03:55:19,217 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-07-22 03:55:19,217 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 9a343b75818c5d561b79c31bb62e9abdd9bdb0bf3f01f7efa313d9ef0f4204f4 [2022-07-22 03:55:19,538 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-07-22 03:55:19,560 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-07-22 03:55:19,562 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-07-22 03:55:19,563 INFO L271 PluginConnector]: Initializing CDTParser... [2022-07-22 03:55:19,563 INFO L275 PluginConnector]: CDTParser initialized [2022-07-22 03:55:19,565 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test10-2.i [2022-07-22 03:55:19,615 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/3a7883d2d/8eeb5acf09044d66ae76d8dbef003553/FLAG92af2c2e8 [2022-07-22 03:55:20,044 INFO L306 CDTParser]: Found 1 translation units. [2022-07-22 03:55:20,047 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test10-2.i [2022-07-22 03:55:20,070 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/3a7883d2d/8eeb5acf09044d66ae76d8dbef003553/FLAG92af2c2e8 [2022-07-22 03:55:20,362 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/3a7883d2d/8eeb5acf09044d66ae76d8dbef003553 [2022-07-22 03:55:20,364 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-07-22 03:55:20,365 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-07-22 03:55:20,367 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-07-22 03:55:20,367 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-07-22 03:55:20,371 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-07-22 03:55:20,372 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 22.07 03:55:20" (1/1) ... [2022-07-22 03:55:20,374 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1d0f2347 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 03:55:20, skipping insertion in model container [2022-07-22 03:55:20,374 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 22.07 03:55:20" (1/1) ... [2022-07-22 03:55:20,379 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-07-22 03:55:20,429 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-07-22 03:55:20,761 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test10-2.i[33022,33035] [2022-07-22 03:55:20,906 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-22 03:55:20,913 INFO L203 MainTranslator]: Completed pre-run [2022-07-22 03:55:20,950 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test10-2.i[33022,33035] [2022-07-22 03:55:21,046 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-22 03:55:21,084 INFO L208 MainTranslator]: Completed translation [2022-07-22 03:55:21,085 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 03:55:21 WrapperNode [2022-07-22 03:55:21,085 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-07-22 03:55:21,086 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-07-22 03:55:21,086 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-07-22 03:55:21,087 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-07-22 03:55:21,102 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 03:55:21" (1/1) ... [2022-07-22 03:55:21,154 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 03:55:21" (1/1) ... [2022-07-22 03:55:21,222 INFO L137 Inliner]: procedures = 177, calls = 575, calls flagged for inlining = 10, calls inlined = 22, statements flattened = 2468 [2022-07-22 03:55:21,223 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-07-22 03:55:21,223 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-07-22 03:55:21,223 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-07-22 03:55:21,224 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-07-22 03:55:21,229 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 03:55:21" (1/1) ... [2022-07-22 03:55:21,232 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 03:55:21" (1/1) ... [2022-07-22 03:55:21,273 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 03:55:21" (1/1) ... [2022-07-22 03:55:21,274 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 03:55:21" (1/1) ... [2022-07-22 03:55:21,318 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 03:55:21" (1/1) ... [2022-07-22 03:55:21,333 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 03:55:21" (1/1) ... [2022-07-22 03:55:21,340 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 03:55:21" (1/1) ... [2022-07-22 03:55:21,353 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-07-22 03:55:21,354 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-07-22 03:55:21,354 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-07-22 03:55:21,354 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-07-22 03:55:21,355 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 03:55:21" (1/1) ... [2022-07-22 03:55:21,359 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-22 03:55:21,368 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-22 03:55:21,378 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-22 03:55:21,418 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-07-22 03:55:21,452 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-07-22 03:55:21,452 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-07-22 03:55:21,452 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2022-07-22 03:55:21,452 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2022-07-22 03:55:21,452 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-07-22 03:55:21,452 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-07-22 03:55:21,453 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-07-22 03:55:21,453 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-07-22 03:55:21,454 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2022-07-22 03:55:21,454 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-07-22 03:55:21,455 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-07-22 03:55:21,455 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-07-22 03:55:21,455 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-07-22 03:55:21,455 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-07-22 03:55:21,727 INFO L234 CfgBuilder]: Building ICFG [2022-07-22 03:55:21,728 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-07-22 03:55:21,731 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-07-22 03:55:23,691 INFO L275 CfgBuilder]: Performing block encoding [2022-07-22 03:55:23,703 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-07-22 03:55:23,703 INFO L299 CfgBuilder]: Removed 160 assume(true) statements. [2022-07-22 03:55:23,705 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.07 03:55:23 BoogieIcfgContainer [2022-07-22 03:55:23,705 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-07-22 03:55:23,706 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-07-22 03:55:23,706 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-07-22 03:55:23,708 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-07-22 03:55:23,708 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-22 03:55:23,709 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 22.07 03:55:20" (1/3) ... [2022-07-22 03:55:23,709 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@3efd28b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 22.07 03:55:23, skipping insertion in model container [2022-07-22 03:55:23,710 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-22 03:55:23,710 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 03:55:21" (2/3) ... [2022-07-22 03:55:23,710 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@3efd28b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 22.07 03:55:23, skipping insertion in model container [2022-07-22 03:55:23,710 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-22 03:55:23,710 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.07 03:55:23" (3/3) ... [2022-07-22 03:55:23,713 INFO L354 chiAutomizerObserver]: Analyzing ICFG uthash_SFH_test10-2.i [2022-07-22 03:55:23,761 INFO L255 stractBuchiCegarLoop]: Interprodecural is true [2022-07-22 03:55:23,761 INFO L256 stractBuchiCegarLoop]: Hoare is false [2022-07-22 03:55:23,761 INFO L257 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-07-22 03:55:23,761 INFO L258 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-07-22 03:55:23,761 INFO L259 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-07-22 03:55:23,761 INFO L260 stractBuchiCegarLoop]: Difference is false [2022-07-22 03:55:23,762 INFO L261 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-07-22 03:55:23,762 INFO L265 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-07-22 03:55:23,768 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 488 states, 480 states have (on average 1.7020833333333334) internal successors, (817), 480 states have internal predecessors, (817), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-07-22 03:55:23,801 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 415 [2022-07-22 03:55:23,802 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 03:55:23,802 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 03:55:23,807 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-22 03:55:23,808 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2022-07-22 03:55:23,808 INFO L287 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-07-22 03:55:23,809 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 488 states, 480 states have (on average 1.7020833333333334) internal successors, (817), 480 states have internal predecessors, (817), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-07-22 03:55:23,820 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 415 [2022-07-22 03:55:23,827 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 03:55:23,827 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 03:55:23,828 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-22 03:55:23,829 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2022-07-22 03:55:23,834 INFO L752 eck$LassoCheckResult]: Stem: 475#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0; 410#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~switch25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc37#1.base, main_#t~malloc37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~memset~res40#1.base, main_#t~memset~res40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~malloc46#1.base, main_#t~malloc46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~post70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem75#1, main_#t~mem74#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~short78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~malloc81#1.base, main_#t~malloc81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~memset~res86#1.base, main_#t~memset~res86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem91#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem95#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~ite96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~pre110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~post115#1, main_#t~mem119#1, main_#t~mem117#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem118#1, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~post98#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem138#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~ite141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem146#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~switch157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc169#1.base, main_#t~malloc169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~memset~res172#1.base, main_#t~memset~res172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~malloc178#1.base, main_#t~malloc178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~memset~res185#1.base, main_#t~memset~res185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1, main_#t~post196#1, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~short210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~malloc213#1.base, main_#t~malloc213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem223#1, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem227#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~ite228#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem239#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~pre242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~post247#1, main_#t~mem251#1, main_#t~mem249#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem250#1, main_#t~mem252#1, main_#t~post253#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~post230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem270#1, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~ite273#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem278#1, main_#t~mem277#1, main_#t~mem279#1, main_#t~mem280#1, main_#t~mem282#1, main_#t~mem281#1, main_#t~mem283#1, main_#t~mem284#1, main_#t~mem286#1, main_#t~mem285#1, main_#t~mem287#1, main_#t~mem288#1, main_#t~switch289#1, main_#t~mem290#1, main_#t~mem291#1, main_#t~mem292#1, main_#t~mem293#1, main_#t~mem294#1, main_#t~mem295#1, main_#t~mem296#1, main_#t~mem297#1, main_#t~mem298#1, main_#t~mem299#1, main_#t~mem300#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1, main_#t~mem311#1, main_#t~mem312#1, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~ret315#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem320#1, main_#t~mem322#1, main_#t~mem321#1, main_#t~mem323#1, main_#t~mem324#1, main_#t~mem326#1, main_#t~mem325#1, main_#t~mem327#1, main_#t~mem328#1, main_#t~mem330#1, main_#t~mem329#1, main_#t~mem331#1, main_#t~mem332#1, main_#t~switch333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~mem344#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~mem355#1, main_#t~mem356#1, main_#t~short357#1, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~ret359#1, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem364#1, main_#t~mem366#1, main_#t~mem365#1, main_#t~mem367#1, main_#t~mem368#1, main_#t~mem370#1, main_#t~mem369#1, main_#t~mem371#1, main_#t~mem372#1, main_#t~mem374#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem376#1, main_#t~switch377#1, main_#t~mem378#1, main_#t~mem379#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem382#1, main_#t~mem383#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~mem386#1, main_#t~mem387#1, main_#t~mem388#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem389#1.base, main_#t~mem389#1.offset, main_#t~mem390#1, main_#t~mem391#1.base, main_#t~mem391#1.offset, main_#t~mem392#1.base, main_#t~mem392#1.offset, main_#t~mem393#1.base, main_#t~mem393#1.offset, main_#t~mem394#1.base, main_#t~mem394#1.offset, main_#t~mem395#1.base, main_#t~mem395#1.offset, main_#t~mem396#1.base, main_#t~mem396#1.offset, main_#t~mem397#1.base, main_#t~mem397#1.offset, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~short401#1, main_#t~mem402#1.base, main_#t~mem402#1.offset, main_#t~ret403#1, main_#t~mem404#1.base, main_#t~mem404#1.offset, main_#t~mem405#1.base, main_#t~mem405#1.offset, main_#t~mem406#1.base, main_#t~mem406#1.offset, main_#t~mem407#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem408#1, main_#t~mem410#1, main_#t~mem409#1, main_#t~mem411#1, main_#t~mem412#1, main_#t~mem414#1, main_#t~mem413#1, main_#t~mem415#1, main_#t~mem416#1, main_#t~mem418#1, main_#t~mem417#1, main_#t~mem419#1, main_#t~mem420#1, main_#t~switch421#1, main_#t~mem422#1, main_#t~mem423#1, main_#t~mem424#1, main_#t~mem425#1, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~mem429#1, main_#t~mem430#1, main_#t~mem431#1, main_#t~mem432#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1, main_#t~mem435#1.base, main_#t~mem435#1.offset, main_#t~mem436#1.base, main_#t~mem436#1.offset, main_#t~mem437#1.base, main_#t~mem437#1.offset, main_#t~mem438#1.base, main_#t~mem438#1.offset, main_#t~mem439#1.base, main_#t~mem439#1.offset, main_#t~mem440#1.base, main_#t~mem440#1.offset, main_#t~mem441#1.base, main_#t~mem441#1.offset, main_#t~mem442#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~short445#1, main_#t~mem446#1.base, main_#t~mem446#1.offset, main_#t~ret447#1, main_#t~mem448#1.base, main_#t~mem448#1.offset, main_#t~mem449#1.base, main_#t~mem449#1.offset, main_#t~mem450#1.base, main_#t~mem450#1.offset, main_#t~mem451#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem452#1, main_#t~ite454#1.base, main_#t~ite454#1.offset, main_#t~mem453#1.base, main_#t~mem453#1.offset, main_#t~mem457#1.base, main_#t~mem457#1.offset, main_#t~mem458#1.base, main_#t~mem458#1.offset, main_#t~short459#1, main_#t~mem460#1.base, main_#t~mem460#1.offset, main_#t~mem461#1.base, main_#t~mem461#1.offset, main_#t~mem462#1.base, main_#t~mem462#1.offset, main_#t~mem463#1.base, main_#t~mem463#1.offset, main_#t~mem464#1.base, main_#t~mem464#1.offset, main_#t~mem465#1.base, main_#t~mem465#1.offset, main_#t~mem466#1.base, main_#t~mem466#1.offset, main_#t~mem467#1.base, main_#t~mem467#1.offset, main_#t~mem468#1, main_#t~mem469#1.base, main_#t~mem469#1.offset, main_#t~mem470#1.base, main_#t~mem470#1.offset, main_#t~mem471#1.base, main_#t~mem471#1.offset, main_#t~mem472#1, main_#t~mem473#1.base, main_#t~mem473#1.offset, main_#t~mem474#1.base, main_#t~mem474#1.offset, main_#t~mem475#1.base, main_#t~mem475#1.offset, main_#t~mem476#1.base, main_#t~mem476#1.offset, main_#t~mem477#1.base, main_#t~mem477#1.offset, main_#t~mem478#1, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem482#1, main_#t~mem480#1.base, main_#t~mem480#1.offset, main_#t~mem481#1, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1, main_#t~post486#1, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1.base, main_#t~mem489#1.offset, main_#t~mem490#1.base, main_#t~mem490#1.offset, main_#t~mem491#1.base, main_#t~mem491#1.offset, main_#t~mem492#1.base, main_#t~mem492#1.offset, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~mem494#1.base, main_#t~mem494#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1, main_#t~post497#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite456#1.base, main_#t~ite456#1.offset, main_#t~mem455#1.base, main_#t~mem455#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 258#L733-4true [2022-07-22 03:55:23,835 INFO L754 eck$LassoCheckResult]: Loop: 258#L733-4true call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2#L733-1true assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 481#L735true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 104#L735-2true call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 416#L740true assume !(main_#t~mem12#1 < 10);havoc main_#t~mem12#1; 61#L743-123true assume !true; 63#L733-3true call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 258#L733-4true [2022-07-22 03:55:23,844 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 03:55:23,845 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 1 times [2022-07-22 03:55:23,851 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 03:55:23,852 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1628720102] [2022-07-22 03:55:23,852 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 03:55:23,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 03:55:23,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 03:55:23,949 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 03:55:23,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 03:55:24,009 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 03:55:24,011 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 03:55:24,011 INFO L85 PathProgramCache]: Analyzing trace with hash -1529483753, now seen corresponding path program 1 times [2022-07-22 03:55:24,011 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 03:55:24,012 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1958816315] [2022-07-22 03:55:24,012 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 03:55:24,012 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 03:55:24,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-22 03:55:24,081 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 03:55:24,084 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-22 03:55:24,085 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1958816315] [2022-07-22 03:55:24,085 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1958816315] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-22 03:55:24,085 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-22 03:55:24,085 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-07-22 03:55:24,086 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [911649102] [2022-07-22 03:55:24,087 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-22 03:55:24,089 INFO L769 eck$LassoCheckResult]: loop already infeasible [2022-07-22 03:55:24,090 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-22 03:55:24,114 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2022-07-22 03:55:24,115 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-07-22 03:55:24,117 INFO L87 Difference]: Start difference. First operand has 488 states, 480 states have (on average 1.7020833333333334) internal successors, (817), 480 states have internal predecessors, (817), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 03:55:24,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-22 03:55:24,151 INFO L93 Difference]: Finished difference Result 488 states and 646 transitions. [2022-07-22 03:55:24,152 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-07-22 03:55:24,159 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 488 states and 646 transitions. [2022-07-22 03:55:24,166 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 247 [2022-07-22 03:55:24,173 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 488 states to 484 states and 642 transitions. [2022-07-22 03:55:24,174 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 484 [2022-07-22 03:55:24,175 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 484 [2022-07-22 03:55:24,176 INFO L73 IsDeterministic]: Start isDeterministic. Operand 484 states and 642 transitions. [2022-07-22 03:55:24,178 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-22 03:55:24,178 INFO L369 hiAutomatonCegarLoop]: Abstraction has 484 states and 642 transitions. [2022-07-22 03:55:24,189 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 484 states and 642 transitions. [2022-07-22 03:55:24,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 484 to 484. [2022-07-22 03:55:24,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 484 states, 477 states have (on average 1.320754716981132) internal successors, (630), 476 states have internal predecessors, (630), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-07-22 03:55:24,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 484 states to 484 states and 642 transitions. [2022-07-22 03:55:24,222 INFO L392 hiAutomatonCegarLoop]: Abstraction has 484 states and 642 transitions. [2022-07-22 03:55:24,223 INFO L374 stractBuchiCegarLoop]: Abstraction has 484 states and 642 transitions. [2022-07-22 03:55:24,223 INFO L287 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-07-22 03:55:24,223 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 484 states and 642 transitions. [2022-07-22 03:55:24,236 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 247 [2022-07-22 03:55:24,237 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 03:55:24,237 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 03:55:24,238 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-22 03:55:24,238 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-22 03:55:24,238 INFO L752 eck$LassoCheckResult]: Stem: 1467#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0; 1456#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~switch25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc37#1.base, main_#t~malloc37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~memset~res40#1.base, main_#t~memset~res40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~malloc46#1.base, main_#t~malloc46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~post70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem75#1, main_#t~mem74#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~short78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~malloc81#1.base, main_#t~malloc81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~memset~res86#1.base, main_#t~memset~res86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem91#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem95#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~ite96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~pre110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~post115#1, main_#t~mem119#1, main_#t~mem117#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem118#1, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~post98#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem138#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~ite141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem146#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~switch157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc169#1.base, main_#t~malloc169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~memset~res172#1.base, main_#t~memset~res172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~malloc178#1.base, main_#t~malloc178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~memset~res185#1.base, main_#t~memset~res185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1, main_#t~post196#1, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~short210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~malloc213#1.base, main_#t~malloc213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem223#1, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem227#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~ite228#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem239#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~pre242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~post247#1, main_#t~mem251#1, main_#t~mem249#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem250#1, main_#t~mem252#1, main_#t~post253#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~post230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem270#1, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~ite273#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem278#1, main_#t~mem277#1, main_#t~mem279#1, main_#t~mem280#1, main_#t~mem282#1, main_#t~mem281#1, main_#t~mem283#1, main_#t~mem284#1, main_#t~mem286#1, main_#t~mem285#1, main_#t~mem287#1, main_#t~mem288#1, main_#t~switch289#1, main_#t~mem290#1, main_#t~mem291#1, main_#t~mem292#1, main_#t~mem293#1, main_#t~mem294#1, main_#t~mem295#1, main_#t~mem296#1, main_#t~mem297#1, main_#t~mem298#1, main_#t~mem299#1, main_#t~mem300#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1, main_#t~mem311#1, main_#t~mem312#1, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~ret315#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem320#1, main_#t~mem322#1, main_#t~mem321#1, main_#t~mem323#1, main_#t~mem324#1, main_#t~mem326#1, main_#t~mem325#1, main_#t~mem327#1, main_#t~mem328#1, main_#t~mem330#1, main_#t~mem329#1, main_#t~mem331#1, main_#t~mem332#1, main_#t~switch333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~mem344#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~mem355#1, main_#t~mem356#1, main_#t~short357#1, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~ret359#1, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem364#1, main_#t~mem366#1, main_#t~mem365#1, main_#t~mem367#1, main_#t~mem368#1, main_#t~mem370#1, main_#t~mem369#1, main_#t~mem371#1, main_#t~mem372#1, main_#t~mem374#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem376#1, main_#t~switch377#1, main_#t~mem378#1, main_#t~mem379#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem382#1, main_#t~mem383#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~mem386#1, main_#t~mem387#1, main_#t~mem388#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem389#1.base, main_#t~mem389#1.offset, main_#t~mem390#1, main_#t~mem391#1.base, main_#t~mem391#1.offset, main_#t~mem392#1.base, main_#t~mem392#1.offset, main_#t~mem393#1.base, main_#t~mem393#1.offset, main_#t~mem394#1.base, main_#t~mem394#1.offset, main_#t~mem395#1.base, main_#t~mem395#1.offset, main_#t~mem396#1.base, main_#t~mem396#1.offset, main_#t~mem397#1.base, main_#t~mem397#1.offset, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~short401#1, main_#t~mem402#1.base, main_#t~mem402#1.offset, main_#t~ret403#1, main_#t~mem404#1.base, main_#t~mem404#1.offset, main_#t~mem405#1.base, main_#t~mem405#1.offset, main_#t~mem406#1.base, main_#t~mem406#1.offset, main_#t~mem407#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem408#1, main_#t~mem410#1, main_#t~mem409#1, main_#t~mem411#1, main_#t~mem412#1, main_#t~mem414#1, main_#t~mem413#1, main_#t~mem415#1, main_#t~mem416#1, main_#t~mem418#1, main_#t~mem417#1, main_#t~mem419#1, main_#t~mem420#1, main_#t~switch421#1, main_#t~mem422#1, main_#t~mem423#1, main_#t~mem424#1, main_#t~mem425#1, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~mem429#1, main_#t~mem430#1, main_#t~mem431#1, main_#t~mem432#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1, main_#t~mem435#1.base, main_#t~mem435#1.offset, main_#t~mem436#1.base, main_#t~mem436#1.offset, main_#t~mem437#1.base, main_#t~mem437#1.offset, main_#t~mem438#1.base, main_#t~mem438#1.offset, main_#t~mem439#1.base, main_#t~mem439#1.offset, main_#t~mem440#1.base, main_#t~mem440#1.offset, main_#t~mem441#1.base, main_#t~mem441#1.offset, main_#t~mem442#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~short445#1, main_#t~mem446#1.base, main_#t~mem446#1.offset, main_#t~ret447#1, main_#t~mem448#1.base, main_#t~mem448#1.offset, main_#t~mem449#1.base, main_#t~mem449#1.offset, main_#t~mem450#1.base, main_#t~mem450#1.offset, main_#t~mem451#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem452#1, main_#t~ite454#1.base, main_#t~ite454#1.offset, main_#t~mem453#1.base, main_#t~mem453#1.offset, main_#t~mem457#1.base, main_#t~mem457#1.offset, main_#t~mem458#1.base, main_#t~mem458#1.offset, main_#t~short459#1, main_#t~mem460#1.base, main_#t~mem460#1.offset, main_#t~mem461#1.base, main_#t~mem461#1.offset, main_#t~mem462#1.base, main_#t~mem462#1.offset, main_#t~mem463#1.base, main_#t~mem463#1.offset, main_#t~mem464#1.base, main_#t~mem464#1.offset, main_#t~mem465#1.base, main_#t~mem465#1.offset, main_#t~mem466#1.base, main_#t~mem466#1.offset, main_#t~mem467#1.base, main_#t~mem467#1.offset, main_#t~mem468#1, main_#t~mem469#1.base, main_#t~mem469#1.offset, main_#t~mem470#1.base, main_#t~mem470#1.offset, main_#t~mem471#1.base, main_#t~mem471#1.offset, main_#t~mem472#1, main_#t~mem473#1.base, main_#t~mem473#1.offset, main_#t~mem474#1.base, main_#t~mem474#1.offset, main_#t~mem475#1.base, main_#t~mem475#1.offset, main_#t~mem476#1.base, main_#t~mem476#1.offset, main_#t~mem477#1.base, main_#t~mem477#1.offset, main_#t~mem478#1, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem482#1, main_#t~mem480#1.base, main_#t~mem480#1.offset, main_#t~mem481#1, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1, main_#t~post486#1, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1.base, main_#t~mem489#1.offset, main_#t~mem490#1.base, main_#t~mem490#1.offset, main_#t~mem491#1.base, main_#t~mem491#1.offset, main_#t~mem492#1.base, main_#t~mem492#1.offset, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~mem494#1.base, main_#t~mem494#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1, main_#t~post497#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite456#1.base, main_#t~ite456#1.offset, main_#t~mem455#1.base, main_#t~mem455#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1116#L733-4 [2022-07-22 03:55:24,239 INFO L754 eck$LassoCheckResult]: Loop: 1116#L733-4 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 984#L733-1 assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 986#L735 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1189#L735-2 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1190#L740 assume !(main_#t~mem12#1 < 10);havoc main_#t~mem12#1; 1112#L743-123 havoc main_~_ha_hashv~1#1; 1113#L743-48 goto; 1034#L743-46 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 1035#L743-7 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 1126#L743-8 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch157#1 := 11 == main_~_hj_k~1#1; 1127#L743-9 assume main_#t~switch157#1;call main_#t~mem158#1 := read~int(main_~_hj_key~1#1.base, 10 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 16777216 * (main_#t~mem158#1 % 256);havoc main_#t~mem158#1; 1439#L743-11 main_#t~switch157#1 := main_#t~switch157#1 || 10 == main_~_hj_k~1#1; 1252#L743-12 assume !main_#t~switch157#1; 1253#L743-14 main_#t~switch157#1 := main_#t~switch157#1 || 9 == main_~_hj_k~1#1; 1302#L743-15 assume main_#t~switch157#1;call main_#t~mem160#1 := read~int(main_~_hj_key~1#1.base, 8 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 256 * (main_#t~mem160#1 % 256);havoc main_#t~mem160#1; 1347#L743-17 main_#t~switch157#1 := main_#t~switch157#1 || 8 == main_~_hj_k~1#1; 1348#L743-18 assume main_#t~switch157#1;call main_#t~mem161#1 := read~int(main_~_hj_key~1#1.base, 7 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 16777216 * (main_#t~mem161#1 % 256);havoc main_#t~mem161#1; 1309#L743-20 main_#t~switch157#1 := main_#t~switch157#1 || 7 == main_~_hj_k~1#1; 1310#L743-21 assume main_#t~switch157#1;call main_#t~mem162#1 := read~int(main_~_hj_key~1#1.base, 6 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 65536 * (main_#t~mem162#1 % 256);havoc main_#t~mem162#1; 1258#L743-23 main_#t~switch157#1 := main_#t~switch157#1 || 6 == main_~_hj_k~1#1; 1259#L743-24 assume main_#t~switch157#1;call main_#t~mem163#1 := read~int(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem163#1 % 256);havoc main_#t~mem163#1; 1386#L743-26 main_#t~switch157#1 := main_#t~switch157#1 || 5 == main_~_hj_k~1#1; 1254#L743-27 assume main_#t~switch157#1;call main_#t~mem164#1 := read~int(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + main_#t~mem164#1 % 256;havoc main_#t~mem164#1; 1255#L743-29 main_#t~switch157#1 := main_#t~switch157#1 || 4 == main_~_hj_k~1#1; 1014#L743-30 assume main_#t~switch157#1;call main_#t~mem165#1 := read~int(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem165#1 % 256);havoc main_#t~mem165#1; 1015#L743-32 main_#t~switch157#1 := main_#t~switch157#1 || 3 == main_~_hj_k~1#1; 1210#L743-33 assume !main_#t~switch157#1; 1423#L743-35 main_#t~switch157#1 := main_#t~switch157#1 || 2 == main_~_hj_k~1#1; 1330#L743-36 assume main_#t~switch157#1;call main_#t~mem167#1 := read~int(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem167#1 % 256);havoc main_#t~mem167#1; 1331#L743-38 main_#t~switch157#1 := main_#t~switch157#1 || 1 == main_~_hj_k~1#1; 1242#L743-39 assume main_#t~switch157#1;call main_#t~mem168#1 := read~int(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + main_#t~mem168#1 % 256;havoc main_#t~mem168#1; 1243#L743-41 havoc main_#t~switch157#1; 1365#L743-44 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8192 || 0 == main_~_ha_hashv~1#1 / 8192) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8192 else (if 0 == main_~_ha_hashv~1#1 / 8192 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8192))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 256 * main_~_hj_i~1#1 || 0 == 256 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 256 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 256 * main_~_hj_i~1#1 else (if 0 == 256 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 256 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 8192 || 0 == main_~_hj_j~1#1 / 8192) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 8192 else (if 0 == main_~_hj_j~1#1 / 8192 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 8192))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 4096 || 0 == main_~_ha_hashv~1#1 / 4096) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 4096 else (if 0 == main_~_ha_hashv~1#1 / 4096 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 4096))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 65536 * main_~_hj_i~1#1 || 0 == 65536 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 65536 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 65536 * main_~_hj_i~1#1 else (if 0 == 65536 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 65536 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32 || 0 == main_~_hj_j~1#1 / 32) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32 else (if 0 == main_~_hj_j~1#1 / 32 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8 || 0 == main_~_ha_hashv~1#1 / 8) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8 else (if 0 == main_~_ha_hashv~1#1 / 8 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 1024 * main_~_hj_i~1#1 || 0 == 1024 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 1024 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 1024 * main_~_hj_i~1#1 else (if 0 == 1024 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 1024 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32768 || 0 == main_~_hj_j~1#1 / 32768) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32768 else (if 0 == main_~_hj_j~1#1 / 32768 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32768)))); 1366#L743-43 goto; 1391#L743-45 goto; 1083#L743-47 goto; 1074#L743-121 call write~int(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 1075#L743-50 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem186#1.base, main_#t~mem186#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_#t~mem186#1.base, main_#t~mem186#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem186#1.base, main_#t~mem186#1.offset; 1313#L743-66 call write~$Pointer$(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem187#1.base, main_#t~mem187#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem188#1.base, main_#t~mem188#1.offset := read~$Pointer$(main_#t~mem187#1.base, 16 + main_#t~mem187#1.offset, 4);call main_#t~mem189#1.base, main_#t~mem189#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem190#1 := read~int(main_#t~mem189#1.base, 20 + main_#t~mem189#1.offset, 4);call write~$Pointer$(main_#t~mem188#1.base, main_#t~mem188#1.offset - main_#t~mem190#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem187#1.base, main_#t~mem187#1.offset;havoc main_#t~mem188#1.base, main_#t~mem188#1.offset;havoc main_#t~mem189#1.base, main_#t~mem189#1.offset;havoc main_#t~mem190#1;call main_#t~mem191#1.base, main_#t~mem191#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem192#1.base, main_#t~mem192#1.offset := read~$Pointer$(main_#t~mem191#1.base, 16 + main_#t~mem191#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem192#1.base, 8 + main_#t~mem192#1.offset, 4);havoc main_#t~mem191#1.base, main_#t~mem191#1.offset;havoc main_#t~mem192#1.base, main_#t~mem192#1.offset;call main_#t~mem193#1.base, main_#t~mem193#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem193#1.base, 16 + main_#t~mem193#1.offset, 4);havoc main_#t~mem193#1.base, main_#t~mem193#1.offset; 1314#L743-65 goto; 1108#L743-119 havoc main_~_ha_bkt~1#1;call main_#t~mem194#1.base, main_#t~mem194#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem195#1 := read~int(main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);main_#t~post196#1 := main_#t~mem195#1;call write~int(1 + main_#t~post196#1, main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);havoc main_#t~mem194#1.base, main_#t~mem194#1.offset;havoc main_#t~mem195#1;havoc main_#t~post196#1; 1109#L743-70 call main_#t~mem197#1.base, main_#t~mem197#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem198#1 := read~int(main_#t~mem197#1.base, 4 + main_#t~mem197#1.offset, 4);main_~_ha_bkt~1#1 := (if 0 == main_~_ha_hashv~1#1 || 0 == main_#t~mem198#1 - 1 then 0 else (if 1 == main_#t~mem198#1 - 1 then (if 1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 >= 0 then main_~_ha_hashv~1#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else (if 1 == main_~_ha_hashv~1#1 then (if 1 == main_#t~mem198#1 - 1 || 0 == main_#t~mem198#1 - 1 then main_#t~mem198#1 - 1 else (if main_#t~mem198#1 - 1 >= 0 then (main_#t~mem198#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))));havoc main_#t~mem197#1.base, main_#t~mem197#1.offset;havoc main_#t~mem198#1; 1070#L743-69 goto; 1071#L743-117 call main_#t~mem199#1.base, main_#t~mem199#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem200#1.base, main_#t~mem200#1.offset := read~$Pointer$(main_#t~mem199#1.base, main_#t~mem199#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem200#1.base, main_#t~mem200#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem199#1.base, main_#t~mem199#1.offset;havoc main_#t~mem200#1.base, main_#t~mem200#1.offset;call main_#t~mem201#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post202#1 := main_#t~mem201#1;call write~int(1 + main_#t~post202#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem201#1;havoc main_#t~post202#1;call main_#t~mem203#1.base, main_#t~mem203#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem203#1.base, main_#t~mem203#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem204#1.base, main_#t~mem204#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 1237#L743-72 assume !(main_#t~mem204#1.base != 0 || main_#t~mem204#1.offset != 0);havoc main_#t~mem204#1.base, main_#t~mem204#1.offset; 1221#L743-74 call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem207#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem206#1 := read~int(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short210#1 := main_#t~mem207#1 % 4294967296 >= 10 * (1 + main_#t~mem206#1) % 4294967296; 1139#L743-75 assume main_#t~short210#1;call main_#t~mem208#1.base, main_#t~mem208#1.offset := read~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem209#1 := read~int(main_#t~mem208#1.base, 36 + main_#t~mem208#1.offset, 4);main_#t~short210#1 := 0 == main_#t~mem209#1 % 4294967296; 1140#L743-77 assume !main_#t~short210#1;havoc main_#t~mem207#1;havoc main_#t~mem206#1;havoc main_#t~mem208#1.base, main_#t~mem208#1.offset;havoc main_#t~mem209#1;havoc main_#t~short210#1; 1134#L743-116 goto; 1135#L743-118 goto; 1250#L743-120 goto; 1438#L743-122 goto; 1115#L733-3 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1116#L733-4 [2022-07-22 03:55:24,240 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 03:55:24,240 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 2 times [2022-07-22 03:55:24,240 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 03:55:24,240 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2110348237] [2022-07-22 03:55:24,240 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 03:55:24,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 03:55:24,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 03:55:24,256 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 03:55:24,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 03:55:24,271 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 03:55:24,272 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 03:55:24,272 INFO L85 PathProgramCache]: Analyzing trace with hash 2000398624, now seen corresponding path program 1 times [2022-07-22 03:55:24,272 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 03:55:24,272 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [978554018] [2022-07-22 03:55:24,272 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 03:55:24,272 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 03:55:24,446 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-07-22 03:55:24,447 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1435653031] [2022-07-22 03:55:24,447 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 03:55:24,448 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-22 03:55:24,448 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-22 03:55:24,486 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-22 03:55:24,493 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-07-22 03:55:25,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-22 03:55:25,102 INFO L263 TraceCheckSpWp]: Trace formula consists of 1830 conjuncts, 3 conjunts are in the unsatisfiable core [2022-07-22 03:55:25,105 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-22 03:55:25,143 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 03:55:25,148 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-07-22 03:55:25,148 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-22 03:55:25,149 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [978554018] [2022-07-22 03:55:25,149 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-07-22 03:55:25,149 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1435653031] [2022-07-22 03:55:25,149 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1435653031] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-22 03:55:25,149 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-22 03:55:25,149 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-07-22 03:55:25,150 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [534573807] [2022-07-22 03:55:25,150 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-22 03:55:25,150 INFO L769 eck$LassoCheckResult]: loop already infeasible [2022-07-22 03:55:25,159 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-22 03:55:25,160 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-07-22 03:55:25,160 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-22 03:55:25,160 INFO L87 Difference]: Start difference. First operand 484 states and 642 transitions. cyclomatic complexity: 169 Second operand has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 03:55:25,242 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-22 03:55:25,243 INFO L93 Difference]: Finished difference Result 505 states and 663 transitions. [2022-07-22 03:55:25,243 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-07-22 03:55:25,244 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 505 states and 663 transitions. [2022-07-22 03:55:25,247 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 268 [2022-07-22 03:55:25,250 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 505 states to 505 states and 663 transitions. [2022-07-22 03:55:25,250 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 505 [2022-07-22 03:55:25,251 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 505 [2022-07-22 03:55:25,251 INFO L73 IsDeterministic]: Start isDeterministic. Operand 505 states and 663 transitions. [2022-07-22 03:55:25,252 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-22 03:55:25,253 INFO L369 hiAutomatonCegarLoop]: Abstraction has 505 states and 663 transitions. [2022-07-22 03:55:25,253 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 505 states and 663 transitions. [2022-07-22 03:55:25,264 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 505 to 504. [2022-07-22 03:55:25,265 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 504 states, 497 states have (on average 1.3078470824949697) internal successors, (650), 496 states have internal predecessors, (650), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-07-22 03:55:25,267 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 504 states to 504 states and 662 transitions. [2022-07-22 03:55:25,267 INFO L392 hiAutomatonCegarLoop]: Abstraction has 504 states and 662 transitions. [2022-07-22 03:55:25,267 INFO L374 stractBuchiCegarLoop]: Abstraction has 504 states and 662 transitions. [2022-07-22 03:55:25,267 INFO L287 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-07-22 03:55:25,267 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 504 states and 662 transitions. [2022-07-22 03:55:25,269 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 267 [2022-07-22 03:55:25,269 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 03:55:25,269 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 03:55:25,270 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-22 03:55:25,270 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-22 03:55:25,270 INFO L752 eck$LassoCheckResult]: Stem: 2619#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0; 2608#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~switch25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc37#1.base, main_#t~malloc37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~memset~res40#1.base, main_#t~memset~res40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~malloc46#1.base, main_#t~malloc46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~post70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem75#1, main_#t~mem74#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~short78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~malloc81#1.base, main_#t~malloc81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~memset~res86#1.base, main_#t~memset~res86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem91#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem95#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~ite96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~pre110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~post115#1, main_#t~mem119#1, main_#t~mem117#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem118#1, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~post98#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem138#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~ite141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem146#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~switch157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc169#1.base, main_#t~malloc169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~memset~res172#1.base, main_#t~memset~res172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~malloc178#1.base, main_#t~malloc178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~memset~res185#1.base, main_#t~memset~res185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1, main_#t~post196#1, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~short210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~malloc213#1.base, main_#t~malloc213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem223#1, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem227#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~ite228#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem239#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~pre242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~post247#1, main_#t~mem251#1, main_#t~mem249#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem250#1, main_#t~mem252#1, main_#t~post253#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~post230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem270#1, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~ite273#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem278#1, main_#t~mem277#1, main_#t~mem279#1, main_#t~mem280#1, main_#t~mem282#1, main_#t~mem281#1, main_#t~mem283#1, main_#t~mem284#1, main_#t~mem286#1, main_#t~mem285#1, main_#t~mem287#1, main_#t~mem288#1, main_#t~switch289#1, main_#t~mem290#1, main_#t~mem291#1, main_#t~mem292#1, main_#t~mem293#1, main_#t~mem294#1, main_#t~mem295#1, main_#t~mem296#1, main_#t~mem297#1, main_#t~mem298#1, main_#t~mem299#1, main_#t~mem300#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1, main_#t~mem311#1, main_#t~mem312#1, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~ret315#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem320#1, main_#t~mem322#1, main_#t~mem321#1, main_#t~mem323#1, main_#t~mem324#1, main_#t~mem326#1, main_#t~mem325#1, main_#t~mem327#1, main_#t~mem328#1, main_#t~mem330#1, main_#t~mem329#1, main_#t~mem331#1, main_#t~mem332#1, main_#t~switch333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~mem344#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~mem355#1, main_#t~mem356#1, main_#t~short357#1, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~ret359#1, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem364#1, main_#t~mem366#1, main_#t~mem365#1, main_#t~mem367#1, main_#t~mem368#1, main_#t~mem370#1, main_#t~mem369#1, main_#t~mem371#1, main_#t~mem372#1, main_#t~mem374#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem376#1, main_#t~switch377#1, main_#t~mem378#1, main_#t~mem379#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem382#1, main_#t~mem383#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~mem386#1, main_#t~mem387#1, main_#t~mem388#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem389#1.base, main_#t~mem389#1.offset, main_#t~mem390#1, main_#t~mem391#1.base, main_#t~mem391#1.offset, main_#t~mem392#1.base, main_#t~mem392#1.offset, main_#t~mem393#1.base, main_#t~mem393#1.offset, main_#t~mem394#1.base, main_#t~mem394#1.offset, main_#t~mem395#1.base, main_#t~mem395#1.offset, main_#t~mem396#1.base, main_#t~mem396#1.offset, main_#t~mem397#1.base, main_#t~mem397#1.offset, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~short401#1, main_#t~mem402#1.base, main_#t~mem402#1.offset, main_#t~ret403#1, main_#t~mem404#1.base, main_#t~mem404#1.offset, main_#t~mem405#1.base, main_#t~mem405#1.offset, main_#t~mem406#1.base, main_#t~mem406#1.offset, main_#t~mem407#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem408#1, main_#t~mem410#1, main_#t~mem409#1, main_#t~mem411#1, main_#t~mem412#1, main_#t~mem414#1, main_#t~mem413#1, main_#t~mem415#1, main_#t~mem416#1, main_#t~mem418#1, main_#t~mem417#1, main_#t~mem419#1, main_#t~mem420#1, main_#t~switch421#1, main_#t~mem422#1, main_#t~mem423#1, main_#t~mem424#1, main_#t~mem425#1, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~mem429#1, main_#t~mem430#1, main_#t~mem431#1, main_#t~mem432#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1, main_#t~mem435#1.base, main_#t~mem435#1.offset, main_#t~mem436#1.base, main_#t~mem436#1.offset, main_#t~mem437#1.base, main_#t~mem437#1.offset, main_#t~mem438#1.base, main_#t~mem438#1.offset, main_#t~mem439#1.base, main_#t~mem439#1.offset, main_#t~mem440#1.base, main_#t~mem440#1.offset, main_#t~mem441#1.base, main_#t~mem441#1.offset, main_#t~mem442#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~short445#1, main_#t~mem446#1.base, main_#t~mem446#1.offset, main_#t~ret447#1, main_#t~mem448#1.base, main_#t~mem448#1.offset, main_#t~mem449#1.base, main_#t~mem449#1.offset, main_#t~mem450#1.base, main_#t~mem450#1.offset, main_#t~mem451#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem452#1, main_#t~ite454#1.base, main_#t~ite454#1.offset, main_#t~mem453#1.base, main_#t~mem453#1.offset, main_#t~mem457#1.base, main_#t~mem457#1.offset, main_#t~mem458#1.base, main_#t~mem458#1.offset, main_#t~short459#1, main_#t~mem460#1.base, main_#t~mem460#1.offset, main_#t~mem461#1.base, main_#t~mem461#1.offset, main_#t~mem462#1.base, main_#t~mem462#1.offset, main_#t~mem463#1.base, main_#t~mem463#1.offset, main_#t~mem464#1.base, main_#t~mem464#1.offset, main_#t~mem465#1.base, main_#t~mem465#1.offset, main_#t~mem466#1.base, main_#t~mem466#1.offset, main_#t~mem467#1.base, main_#t~mem467#1.offset, main_#t~mem468#1, main_#t~mem469#1.base, main_#t~mem469#1.offset, main_#t~mem470#1.base, main_#t~mem470#1.offset, main_#t~mem471#1.base, main_#t~mem471#1.offset, main_#t~mem472#1, main_#t~mem473#1.base, main_#t~mem473#1.offset, main_#t~mem474#1.base, main_#t~mem474#1.offset, main_#t~mem475#1.base, main_#t~mem475#1.offset, main_#t~mem476#1.base, main_#t~mem476#1.offset, main_#t~mem477#1.base, main_#t~mem477#1.offset, main_#t~mem478#1, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem482#1, main_#t~mem480#1.base, main_#t~mem480#1.offset, main_#t~mem481#1, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1, main_#t~post486#1, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1.base, main_#t~mem489#1.offset, main_#t~mem490#1.base, main_#t~mem490#1.offset, main_#t~mem491#1.base, main_#t~mem491#1.offset, main_#t~mem492#1.base, main_#t~mem492#1.offset, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~mem494#1.base, main_#t~mem494#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1, main_#t~post497#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite456#1.base, main_#t~ite456#1.offset, main_#t~mem455#1.base, main_#t~mem455#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2267#L733-4 [2022-07-22 03:55:25,270 INFO L754 eck$LassoCheckResult]: Loop: 2267#L733-4 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2135#L733-1 assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 2137#L735 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2340#L735-2 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2341#L740 assume !(main_#t~mem12#1 < 10);havoc main_#t~mem12#1; 2263#L743-123 havoc main_~_ha_hashv~1#1; 2264#L743-48 goto; 2187#L743-46 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 2188#L743-7 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 2277#L743-8 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch157#1 := 11 == main_~_hj_k~1#1; 2278#L743-9 assume main_#t~switch157#1;call main_#t~mem158#1 := read~int(main_~_hj_key~1#1.base, 10 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 16777216 * (main_#t~mem158#1 % 256);havoc main_#t~mem158#1; 2590#L743-11 main_#t~switch157#1 := main_#t~switch157#1 || 10 == main_~_hj_k~1#1; 2403#L743-12 assume main_#t~switch157#1;call main_#t~mem159#1 := read~int(main_~_hj_key~1#1.base, 9 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 65536 * (main_#t~mem159#1 % 256);havoc main_#t~mem159#1; 2404#L743-14 main_#t~switch157#1 := main_#t~switch157#1 || 9 == main_~_hj_k~1#1; 2453#L743-15 assume main_#t~switch157#1;call main_#t~mem160#1 := read~int(main_~_hj_key~1#1.base, 8 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 256 * (main_#t~mem160#1 % 256);havoc main_#t~mem160#1; 2498#L743-17 main_#t~switch157#1 := main_#t~switch157#1 || 8 == main_~_hj_k~1#1; 2499#L743-18 assume main_#t~switch157#1;call main_#t~mem161#1 := read~int(main_~_hj_key~1#1.base, 7 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 16777216 * (main_#t~mem161#1 % 256);havoc main_#t~mem161#1; 2460#L743-20 main_#t~switch157#1 := main_#t~switch157#1 || 7 == main_~_hj_k~1#1; 2461#L743-21 assume main_#t~switch157#1;call main_#t~mem162#1 := read~int(main_~_hj_key~1#1.base, 6 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 65536 * (main_#t~mem162#1 % 256);havoc main_#t~mem162#1; 2409#L743-23 main_#t~switch157#1 := main_#t~switch157#1 || 6 == main_~_hj_k~1#1; 2410#L743-24 assume main_#t~switch157#1;call main_#t~mem163#1 := read~int(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem163#1 % 256);havoc main_#t~mem163#1; 2537#L743-26 main_#t~switch157#1 := main_#t~switch157#1 || 5 == main_~_hj_k~1#1; 2405#L743-27 assume main_#t~switch157#1;call main_#t~mem164#1 := read~int(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + main_#t~mem164#1 % 256;havoc main_#t~mem164#1; 2406#L743-29 main_#t~switch157#1 := main_#t~switch157#1 || 4 == main_~_hj_k~1#1; 2168#L743-30 assume main_#t~switch157#1;call main_#t~mem165#1 := read~int(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem165#1 % 256);havoc main_#t~mem165#1; 2169#L743-32 main_#t~switch157#1 := main_#t~switch157#1 || 3 == main_~_hj_k~1#1; 2362#L743-33 assume main_#t~switch157#1;call main_#t~mem166#1 := read~int(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem166#1 % 256);havoc main_#t~mem166#1; 2575#L743-35 main_#t~switch157#1 := main_#t~switch157#1 || 2 == main_~_hj_k~1#1; 2481#L743-36 assume main_#t~switch157#1;call main_#t~mem167#1 := read~int(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem167#1 % 256);havoc main_#t~mem167#1; 2482#L743-38 main_#t~switch157#1 := main_#t~switch157#1 || 1 == main_~_hj_k~1#1; 2395#L743-39 assume main_#t~switch157#1;call main_#t~mem168#1 := read~int(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + main_#t~mem168#1 % 256;havoc main_#t~mem168#1; 2396#L743-41 havoc main_#t~switch157#1; 2518#L743-44 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8192 || 0 == main_~_ha_hashv~1#1 / 8192) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8192 else (if 0 == main_~_ha_hashv~1#1 / 8192 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8192))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 256 * main_~_hj_i~1#1 || 0 == 256 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 256 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 256 * main_~_hj_i~1#1 else (if 0 == 256 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 256 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 8192 || 0 == main_~_hj_j~1#1 / 8192) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 8192 else (if 0 == main_~_hj_j~1#1 / 8192 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 8192))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 4096 || 0 == main_~_ha_hashv~1#1 / 4096) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 4096 else (if 0 == main_~_ha_hashv~1#1 / 4096 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 4096))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 65536 * main_~_hj_i~1#1 || 0 == 65536 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 65536 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 65536 * main_~_hj_i~1#1 else (if 0 == 65536 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 65536 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32 || 0 == main_~_hj_j~1#1 / 32) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32 else (if 0 == main_~_hj_j~1#1 / 32 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8 || 0 == main_~_ha_hashv~1#1 / 8) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8 else (if 0 == main_~_ha_hashv~1#1 / 8 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 1024 * main_~_hj_i~1#1 || 0 == 1024 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 1024 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 1024 * main_~_hj_i~1#1 else (if 0 == 1024 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 1024 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32768 || 0 == main_~_hj_j~1#1 / 32768) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32768 else (if 0 == main_~_hj_j~1#1 / 32768 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32768)))); 2519#L743-43 goto; 2542#L743-45 goto; 2234#L743-47 goto; 2225#L743-121 call write~int(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 2226#L743-50 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem186#1.base, main_#t~mem186#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_#t~mem186#1.base, main_#t~mem186#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem186#1.base, main_#t~mem186#1.offset; 2464#L743-66 call write~$Pointer$(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem187#1.base, main_#t~mem187#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem188#1.base, main_#t~mem188#1.offset := read~$Pointer$(main_#t~mem187#1.base, 16 + main_#t~mem187#1.offset, 4);call main_#t~mem189#1.base, main_#t~mem189#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem190#1 := read~int(main_#t~mem189#1.base, 20 + main_#t~mem189#1.offset, 4);call write~$Pointer$(main_#t~mem188#1.base, main_#t~mem188#1.offset - main_#t~mem190#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem187#1.base, main_#t~mem187#1.offset;havoc main_#t~mem188#1.base, main_#t~mem188#1.offset;havoc main_#t~mem189#1.base, main_#t~mem189#1.offset;havoc main_#t~mem190#1;call main_#t~mem191#1.base, main_#t~mem191#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem192#1.base, main_#t~mem192#1.offset := read~$Pointer$(main_#t~mem191#1.base, 16 + main_#t~mem191#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem192#1.base, 8 + main_#t~mem192#1.offset, 4);havoc main_#t~mem191#1.base, main_#t~mem191#1.offset;havoc main_#t~mem192#1.base, main_#t~mem192#1.offset;call main_#t~mem193#1.base, main_#t~mem193#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem193#1.base, 16 + main_#t~mem193#1.offset, 4);havoc main_#t~mem193#1.base, main_#t~mem193#1.offset; 2465#L743-65 goto; 2259#L743-119 havoc main_~_ha_bkt~1#1;call main_#t~mem194#1.base, main_#t~mem194#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem195#1 := read~int(main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);main_#t~post196#1 := main_#t~mem195#1;call write~int(1 + main_#t~post196#1, main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);havoc main_#t~mem194#1.base, main_#t~mem194#1.offset;havoc main_#t~mem195#1;havoc main_#t~post196#1; 2260#L743-70 call main_#t~mem197#1.base, main_#t~mem197#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem198#1 := read~int(main_#t~mem197#1.base, 4 + main_#t~mem197#1.offset, 4);main_~_ha_bkt~1#1 := (if 0 == main_~_ha_hashv~1#1 || 0 == main_#t~mem198#1 - 1 then 0 else (if 1 == main_#t~mem198#1 - 1 then (if 1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 >= 0 then main_~_ha_hashv~1#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else (if 1 == main_~_ha_hashv~1#1 then (if 1 == main_#t~mem198#1 - 1 || 0 == main_#t~mem198#1 - 1 then main_#t~mem198#1 - 1 else (if main_#t~mem198#1 - 1 >= 0 then (main_#t~mem198#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))));havoc main_#t~mem197#1.base, main_#t~mem197#1.offset;havoc main_#t~mem198#1; 2221#L743-69 goto; 2222#L743-117 call main_#t~mem199#1.base, main_#t~mem199#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem200#1.base, main_#t~mem200#1.offset := read~$Pointer$(main_#t~mem199#1.base, main_#t~mem199#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem200#1.base, main_#t~mem200#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem199#1.base, main_#t~mem199#1.offset;havoc main_#t~mem200#1.base, main_#t~mem200#1.offset;call main_#t~mem201#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post202#1 := main_#t~mem201#1;call write~int(1 + main_#t~post202#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem201#1;havoc main_#t~post202#1;call main_#t~mem203#1.base, main_#t~mem203#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem203#1.base, main_#t~mem203#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem204#1.base, main_#t~mem204#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 2388#L743-72 assume !(main_#t~mem204#1.base != 0 || main_#t~mem204#1.offset != 0);havoc main_#t~mem204#1.base, main_#t~mem204#1.offset; 2372#L743-74 call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem207#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem206#1 := read~int(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short210#1 := main_#t~mem207#1 % 4294967296 >= 10 * (1 + main_#t~mem206#1) % 4294967296; 2290#L743-75 assume main_#t~short210#1;call main_#t~mem208#1.base, main_#t~mem208#1.offset := read~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem209#1 := read~int(main_#t~mem208#1.base, 36 + main_#t~mem208#1.offset, 4);main_#t~short210#1 := 0 == main_#t~mem209#1 % 4294967296; 2291#L743-77 assume !main_#t~short210#1;havoc main_#t~mem207#1;havoc main_#t~mem206#1;havoc main_#t~mem208#1.base, main_#t~mem208#1.offset;havoc main_#t~mem209#1;havoc main_#t~short210#1; 2285#L743-116 goto; 2286#L743-118 goto; 2401#L743-120 goto; 2589#L743-122 goto; 2266#L733-3 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 2267#L733-4 [2022-07-22 03:55:25,271 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 03:55:25,271 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 3 times [2022-07-22 03:55:25,271 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 03:55:25,272 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1464074458] [2022-07-22 03:55:25,272 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 03:55:25,272 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 03:55:25,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 03:55:25,296 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 03:55:25,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 03:55:25,337 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 03:55:25,338 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 03:55:25,338 INFO L85 PathProgramCache]: Analyzing trace with hash -346476132, now seen corresponding path program 1 times [2022-07-22 03:55:25,338 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 03:55:25,339 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2068539390] [2022-07-22 03:55:25,339 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 03:55:25,339 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 03:55:25,431 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-07-22 03:55:25,431 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [899740525] [2022-07-22 03:55:25,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 03:55:25,432 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-22 03:55:25,432 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-22 03:55:25,460 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-22 03:55:25,462 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-07-22 03:55:26,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-22 03:55:26,092 INFO L263 TraceCheckSpWp]: Trace formula consists of 1842 conjuncts, 3 conjunts are in the unsatisfiable core [2022-07-22 03:55:26,094 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-22 03:55:26,112 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 03:55:26,127 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-07-22 03:55:26,127 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-22 03:55:26,128 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2068539390] [2022-07-22 03:55:26,128 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-07-22 03:55:26,128 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [899740525] [2022-07-22 03:55:26,128 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [899740525] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-22 03:55:26,128 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-22 03:55:26,128 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-07-22 03:55:26,128 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [816489462] [2022-07-22 03:55:26,129 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-22 03:55:26,129 INFO L769 eck$LassoCheckResult]: loop already infeasible [2022-07-22 03:55:26,129 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-22 03:55:26,129 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-07-22 03:55:26,130 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-07-22 03:55:26,130 INFO L87 Difference]: Start difference. First operand 504 states and 662 transitions. cyclomatic complexity: 169 Second operand has 4 states, 4 states have (on average 13.25) internal successors, (53), 4 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 03:55:26,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-22 03:55:26,210 INFO L93 Difference]: Finished difference Result 887 states and 1169 transitions. [2022-07-22 03:55:26,210 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-07-22 03:55:26,211 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 887 states and 1169 transitions. [2022-07-22 03:55:26,215 INFO L131 ngComponentsAnalysis]: Automaton has 22 accepting balls. 344 [2022-07-22 03:55:26,219 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 887 states to 887 states and 1169 transitions. [2022-07-22 03:55:26,220 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 887 [2022-07-22 03:55:26,221 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 887 [2022-07-22 03:55:26,221 INFO L73 IsDeterministic]: Start isDeterministic. Operand 887 states and 1169 transitions. [2022-07-22 03:55:26,223 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-22 03:55:26,223 INFO L369 hiAutomatonCegarLoop]: Abstraction has 887 states and 1169 transitions. [2022-07-22 03:55:26,224 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 887 states and 1169 transitions. [2022-07-22 03:55:26,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 887 to 490. [2022-07-22 03:55:26,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 490 states, 483 states have (on average 1.3022774327122153) internal successors, (629), 482 states have internal predecessors, (629), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-07-22 03:55:26,236 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 490 states to 490 states and 641 transitions. [2022-07-22 03:55:26,236 INFO L392 hiAutomatonCegarLoop]: Abstraction has 490 states and 641 transitions. [2022-07-22 03:55:26,236 INFO L374 stractBuchiCegarLoop]: Abstraction has 490 states and 641 transitions. [2022-07-22 03:55:26,236 INFO L287 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-07-22 03:55:26,236 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 490 states and 641 transitions. [2022-07-22 03:55:26,238 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 253 [2022-07-22 03:55:26,238 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 03:55:26,238 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 03:55:26,238 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-22 03:55:26,239 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-22 03:55:26,239 INFO L752 eck$LassoCheckResult]: Stem: 4177#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0; 4166#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~switch25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc37#1.base, main_#t~malloc37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~memset~res40#1.base, main_#t~memset~res40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~malloc46#1.base, main_#t~malloc46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~post70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem75#1, main_#t~mem74#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~short78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1, main_#t~malloc81#1.base, main_#t~malloc81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1, main_#t~memset~res86#1.base, main_#t~memset~res86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem91#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem95#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~ite96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1, main_#t~pre110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~post115#1, main_#t~mem119#1, main_#t~mem117#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem118#1, main_#t~mem120#1, main_#t~post121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~post98#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem138#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~ite141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem146#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~switch157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc169#1.base, main_#t~malloc169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~memset~res172#1.base, main_#t~memset~res172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~malloc178#1.base, main_#t~malloc178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~memset~res185#1.base, main_#t~memset~res185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~mem191#1.base, main_#t~mem191#1.offset, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1, main_#t~post196#1, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem207#1, main_#t~mem206#1, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1, main_#t~short210#1, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~malloc213#1.base, main_#t~malloc213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem223#1, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem227#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~ite228#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem239#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~pre242#1, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~post247#1, main_#t~mem251#1, main_#t~mem249#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem250#1, main_#t~mem252#1, main_#t~post253#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~post230#1, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem270#1, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem269#1, main_#t~ite273#1, main_#t~mem271#1.base, main_#t~mem271#1.offset, main_#t~mem272#1, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1, main_#t~mem276#1.base, main_#t~mem276#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~#_he_new_buckets~1#1.base, main_~#_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem278#1, main_#t~mem277#1, main_#t~mem279#1, main_#t~mem280#1, main_#t~mem282#1, main_#t~mem281#1, main_#t~mem283#1, main_#t~mem284#1, main_#t~mem286#1, main_#t~mem285#1, main_#t~mem287#1, main_#t~mem288#1, main_#t~switch289#1, main_#t~mem290#1, main_#t~mem291#1, main_#t~mem292#1, main_#t~mem293#1, main_#t~mem294#1, main_#t~mem295#1, main_#t~mem296#1, main_#t~mem297#1, main_#t~mem298#1, main_#t~mem299#1, main_#t~mem300#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1.base, main_#t~mem304#1.offset, main_#t~mem305#1.base, main_#t~mem305#1.offset, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1, main_#t~mem311#1, main_#t~mem312#1, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~ret315#1, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem320#1, main_#t~mem322#1, main_#t~mem321#1, main_#t~mem323#1, main_#t~mem324#1, main_#t~mem326#1, main_#t~mem325#1, main_#t~mem327#1, main_#t~mem328#1, main_#t~mem330#1, main_#t~mem329#1, main_#t~mem331#1, main_#t~mem332#1, main_#t~switch333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~mem344#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1.base, main_#t~mem351#1.offset, main_#t~mem352#1.base, main_#t~mem352#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~mem355#1, main_#t~mem356#1, main_#t~short357#1, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~ret359#1, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem364#1, main_#t~mem366#1, main_#t~mem365#1, main_#t~mem367#1, main_#t~mem368#1, main_#t~mem370#1, main_#t~mem369#1, main_#t~mem371#1, main_#t~mem372#1, main_#t~mem374#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem376#1, main_#t~switch377#1, main_#t~mem378#1, main_#t~mem379#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem382#1, main_#t~mem383#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~mem386#1, main_#t~mem387#1, main_#t~mem388#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem389#1.base, main_#t~mem389#1.offset, main_#t~mem390#1, main_#t~mem391#1.base, main_#t~mem391#1.offset, main_#t~mem392#1.base, main_#t~mem392#1.offset, main_#t~mem393#1.base, main_#t~mem393#1.offset, main_#t~mem394#1.base, main_#t~mem394#1.offset, main_#t~mem395#1.base, main_#t~mem395#1.offset, main_#t~mem396#1.base, main_#t~mem396#1.offset, main_#t~mem397#1.base, main_#t~mem397#1.offset, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~short401#1, main_#t~mem402#1.base, main_#t~mem402#1.offset, main_#t~ret403#1, main_#t~mem404#1.base, main_#t~mem404#1.offset, main_#t~mem405#1.base, main_#t~mem405#1.offset, main_#t~mem406#1.base, main_#t~mem406#1.offset, main_#t~mem407#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem408#1, main_#t~mem410#1, main_#t~mem409#1, main_#t~mem411#1, main_#t~mem412#1, main_#t~mem414#1, main_#t~mem413#1, main_#t~mem415#1, main_#t~mem416#1, main_#t~mem418#1, main_#t~mem417#1, main_#t~mem419#1, main_#t~mem420#1, main_#t~switch421#1, main_#t~mem422#1, main_#t~mem423#1, main_#t~mem424#1, main_#t~mem425#1, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~mem429#1, main_#t~mem430#1, main_#t~mem431#1, main_#t~mem432#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1, main_#t~mem435#1.base, main_#t~mem435#1.offset, main_#t~mem436#1.base, main_#t~mem436#1.offset, main_#t~mem437#1.base, main_#t~mem437#1.offset, main_#t~mem438#1.base, main_#t~mem438#1.offset, main_#t~mem439#1.base, main_#t~mem439#1.offset, main_#t~mem440#1.base, main_#t~mem440#1.offset, main_#t~mem441#1.base, main_#t~mem441#1.offset, main_#t~mem442#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~short445#1, main_#t~mem446#1.base, main_#t~mem446#1.offset, main_#t~ret447#1, main_#t~mem448#1.base, main_#t~mem448#1.offset, main_#t~mem449#1.base, main_#t~mem449#1.offset, main_#t~mem450#1.base, main_#t~mem450#1.offset, main_#t~mem451#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem452#1, main_#t~ite454#1.base, main_#t~ite454#1.offset, main_#t~mem453#1.base, main_#t~mem453#1.offset, main_#t~mem457#1.base, main_#t~mem457#1.offset, main_#t~mem458#1.base, main_#t~mem458#1.offset, main_#t~short459#1, main_#t~mem460#1.base, main_#t~mem460#1.offset, main_#t~mem461#1.base, main_#t~mem461#1.offset, main_#t~mem462#1.base, main_#t~mem462#1.offset, main_#t~mem463#1.base, main_#t~mem463#1.offset, main_#t~mem464#1.base, main_#t~mem464#1.offset, main_#t~mem465#1.base, main_#t~mem465#1.offset, main_#t~mem466#1.base, main_#t~mem466#1.offset, main_#t~mem467#1.base, main_#t~mem467#1.offset, main_#t~mem468#1, main_#t~mem469#1.base, main_#t~mem469#1.offset, main_#t~mem470#1.base, main_#t~mem470#1.offset, main_#t~mem471#1.base, main_#t~mem471#1.offset, main_#t~mem472#1, main_#t~mem473#1.base, main_#t~mem473#1.offset, main_#t~mem474#1.base, main_#t~mem474#1.offset, main_#t~mem475#1.base, main_#t~mem475#1.offset, main_#t~mem476#1.base, main_#t~mem476#1.offset, main_#t~mem477#1.base, main_#t~mem477#1.offset, main_#t~mem478#1, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem482#1, main_#t~mem480#1.base, main_#t~mem480#1.offset, main_#t~mem481#1, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1, main_#t~post486#1, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1.base, main_#t~mem489#1.offset, main_#t~mem490#1.base, main_#t~mem490#1.offset, main_#t~mem491#1.base, main_#t~mem491#1.offset, main_#t~mem492#1.base, main_#t~mem492#1.offset, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~mem494#1.base, main_#t~mem494#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1, main_#t~post497#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite456#1.base, main_#t~ite456#1.offset, main_#t~mem455#1.base, main_#t~mem455#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3824#L733-4 [2022-07-22 03:55:26,239 INFO L754 eck$LassoCheckResult]: Loop: 3824#L733-4 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3691#L733-1 assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 3693#L735 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 3897#L735-2 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3898#L740 assume !(main_#t~mem12#1 < 10);havoc main_#t~mem12#1; 3820#L743-123 havoc main_~_ha_hashv~1#1; 3821#L743-48 goto; 3742#L743-46 havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4; 3743#L743-7 assume !(main_~_hj_k~1#1 % 4294967296 >= 12); 3834#L743-8 main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch157#1 := 11 == main_~_hj_k~1#1; 3835#L743-9 assume !main_#t~switch157#1; 4149#L743-11 main_#t~switch157#1 := main_#t~switch157#1 || 10 == main_~_hj_k~1#1; 3960#L743-12 assume !main_#t~switch157#1; 3961#L743-14 main_#t~switch157#1 := main_#t~switch157#1 || 9 == main_~_hj_k~1#1; 4010#L743-15 assume !main_#t~switch157#1; 4055#L743-17 main_#t~switch157#1 := main_#t~switch157#1 || 8 == main_~_hj_k~1#1; 4056#L743-18 assume !main_#t~switch157#1; 4017#L743-20 main_#t~switch157#1 := main_#t~switch157#1 || 7 == main_~_hj_k~1#1; 4018#L743-21 assume !main_#t~switch157#1; 3966#L743-23 main_#t~switch157#1 := main_#t~switch157#1 || 6 == main_~_hj_k~1#1; 3967#L743-24 assume !main_#t~switch157#1; 4096#L743-26 main_#t~switch157#1 := main_#t~switch157#1 || 5 == main_~_hj_k~1#1; 3962#L743-27 assume !main_#t~switch157#1; 3963#L743-29 main_#t~switch157#1 := main_#t~switch157#1 || 4 == main_~_hj_k~1#1; 3721#L743-30 assume main_#t~switch157#1;call main_#t~mem165#1 := read~int(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem165#1 % 256);havoc main_#t~mem165#1; 3722#L743-32 main_#t~switch157#1 := main_#t~switch157#1 || 3 == main_~_hj_k~1#1; 3918#L743-33 assume main_#t~switch157#1;call main_#t~mem166#1 := read~int(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem166#1 % 256);havoc main_#t~mem166#1; 4133#L743-35 main_#t~switch157#1 := main_#t~switch157#1 || 2 == main_~_hj_k~1#1; 4038#L743-36 assume main_#t~switch157#1;call main_#t~mem167#1 := read~int(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem167#1 % 256);havoc main_#t~mem167#1; 4039#L743-38 main_#t~switch157#1 := main_#t~switch157#1 || 1 == main_~_hj_k~1#1; 3950#L743-39 assume main_#t~switch157#1;call main_#t~mem168#1 := read~int(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + main_#t~mem168#1 % 256;havoc main_#t~mem168#1; 3951#L743-41 havoc main_#t~switch157#1; 4073#L743-44 main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8192 || 0 == main_~_ha_hashv~1#1 / 8192) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8192 else (if 0 == main_~_ha_hashv~1#1 / 8192 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8192))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 256 * main_~_hj_i~1#1 || 0 == 256 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 256 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 256 * main_~_hj_i~1#1 else (if 0 == 256 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 256 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 8192 || 0 == main_~_hj_j~1#1 / 8192) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 8192 else (if 0 == main_~_hj_j~1#1 / 8192 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 8192))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 4096 || 0 == main_~_ha_hashv~1#1 / 4096) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 4096 else (if 0 == main_~_ha_hashv~1#1 / 4096 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 4096))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 65536 * main_~_hj_i~1#1 || 0 == 65536 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 65536 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 65536 * main_~_hj_i~1#1 else (if 0 == 65536 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 65536 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32 || 0 == main_~_hj_j~1#1 / 32) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32 else (if 0 == main_~_hj_j~1#1 / 32 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32))));main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;main_~_hj_i~1#1 := (if (1 == main_~_hj_i~1#1 || 0 == main_~_hj_i~1#1) && (1 == main_~_ha_hashv~1#1 / 8 || 0 == main_~_ha_hashv~1#1 / 8) then (if main_~_hj_i~1#1 == main_~_ha_hashv~1#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~1#1 then main_~_ha_hashv~1#1 / 8 else (if 0 == main_~_ha_hashv~1#1 / 8 then main_~_hj_i~1#1 else ~bitwiseXOr(main_~_hj_i~1#1, main_~_ha_hashv~1#1 / 8))));main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;main_~_hj_j~1#1 := (if (1 == main_~_hj_j~1#1 || 0 == main_~_hj_j~1#1) && (1 == 1024 * main_~_hj_i~1#1 || 0 == 1024 * main_~_hj_i~1#1) then (if main_~_hj_j~1#1 == 1024 * main_~_hj_i~1#1 then 0 else 1) else (if 0 == main_~_hj_j~1#1 then 1024 * main_~_hj_i~1#1 else (if 0 == 1024 * main_~_hj_i~1#1 then main_~_hj_j~1#1 else ~bitwiseXOr(main_~_hj_j~1#1, 1024 * main_~_hj_i~1#1))));main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;main_~_ha_hashv~1#1 := (if (1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1) && (1 == main_~_hj_j~1#1 / 32768 || 0 == main_~_hj_j~1#1 / 32768) then (if main_~_ha_hashv~1#1 == main_~_hj_j~1#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~1#1 then main_~_hj_j~1#1 / 32768 else (if 0 == main_~_hj_j~1#1 / 32768 then main_~_ha_hashv~1#1 else ~bitwiseXOr(main_~_ha_hashv~1#1, main_~_hj_j~1#1 / 32768)))); 4074#L743-43 goto; 4101#L743-45 goto; 3791#L743-47 goto; 3782#L743-121 call write~int(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4); 3783#L743-50 assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem186#1.base, main_#t~mem186#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_#t~mem186#1.base, main_#t~mem186#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem186#1.base, main_#t~mem186#1.offset; 4021#L743-66 call write~$Pointer$(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem187#1.base, main_#t~mem187#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem188#1.base, main_#t~mem188#1.offset := read~$Pointer$(main_#t~mem187#1.base, 16 + main_#t~mem187#1.offset, 4);call main_#t~mem189#1.base, main_#t~mem189#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem190#1 := read~int(main_#t~mem189#1.base, 20 + main_#t~mem189#1.offset, 4);call write~$Pointer$(main_#t~mem188#1.base, main_#t~mem188#1.offset - main_#t~mem190#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem187#1.base, main_#t~mem187#1.offset;havoc main_#t~mem188#1.base, main_#t~mem188#1.offset;havoc main_#t~mem189#1.base, main_#t~mem189#1.offset;havoc main_#t~mem190#1;call main_#t~mem191#1.base, main_#t~mem191#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem192#1.base, main_#t~mem192#1.offset := read~$Pointer$(main_#t~mem191#1.base, 16 + main_#t~mem191#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem192#1.base, 8 + main_#t~mem192#1.offset, 4);havoc main_#t~mem191#1.base, main_#t~mem191#1.offset;havoc main_#t~mem192#1.base, main_#t~mem192#1.offset;call main_#t~mem193#1.base, main_#t~mem193#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem193#1.base, 16 + main_#t~mem193#1.offset, 4);havoc main_#t~mem193#1.base, main_#t~mem193#1.offset; 4022#L743-65 goto; 3816#L743-119 havoc main_~_ha_bkt~1#1;call main_#t~mem194#1.base, main_#t~mem194#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem195#1 := read~int(main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);main_#t~post196#1 := main_#t~mem195#1;call write~int(1 + main_#t~post196#1, main_#t~mem194#1.base, 12 + main_#t~mem194#1.offset, 4);havoc main_#t~mem194#1.base, main_#t~mem194#1.offset;havoc main_#t~mem195#1;havoc main_#t~post196#1; 3817#L743-70 call main_#t~mem197#1.base, main_#t~mem197#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem198#1 := read~int(main_#t~mem197#1.base, 4 + main_#t~mem197#1.offset, 4);main_~_ha_bkt~1#1 := (if 0 == main_~_ha_hashv~1#1 || 0 == main_#t~mem198#1 - 1 then 0 else (if 1 == main_#t~mem198#1 - 1 then (if 1 == main_~_ha_hashv~1#1 || 0 == main_~_ha_hashv~1#1 then main_~_ha_hashv~1#1 else (if main_~_ha_hashv~1#1 >= 0 then main_~_ha_hashv~1#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else (if 1 == main_~_ha_hashv~1#1 then (if 1 == main_#t~mem198#1 - 1 || 0 == main_#t~mem198#1 - 1 then main_#t~mem198#1 - 1 else (if main_#t~mem198#1 - 1 >= 0 then (main_#t~mem198#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~1#1, main_#t~mem198#1 - 1))));havoc main_#t~mem197#1.base, main_#t~mem197#1.offset;havoc main_#t~mem198#1; 3778#L743-69 goto; 3779#L743-117 call main_#t~mem199#1.base, main_#t~mem199#1.offset := read~$Pointer$(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem200#1.base, main_#t~mem200#1.offset := read~$Pointer$(main_#t~mem199#1.base, main_#t~mem199#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem200#1.base, main_#t~mem200#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem199#1.base, main_#t~mem199#1.offset;havoc main_#t~mem200#1.base, main_#t~mem200#1.offset;call main_#t~mem201#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post202#1 := main_#t~mem201#1;call write~int(1 + main_#t~post202#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem201#1;havoc main_#t~post202#1;call main_#t~mem203#1.base, main_#t~mem203#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$(main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem203#1.base, main_#t~mem203#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem204#1.base, main_#t~mem204#1.offset := read~$Pointer$(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4); 3945#L743-72 assume !(main_#t~mem204#1.base != 0 || main_#t~mem204#1.offset != 0);havoc main_#t~mem204#1.base, main_#t~mem204#1.offset; 3929#L743-74 call write~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem207#1 := read~int(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem206#1 := read~int(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short210#1 := main_#t~mem207#1 % 4294967296 >= 10 * (1 + main_#t~mem206#1) % 4294967296; 3847#L743-75 assume main_#t~short210#1;call main_#t~mem208#1.base, main_#t~mem208#1.offset := read~$Pointer$(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem209#1 := read~int(main_#t~mem208#1.base, 36 + main_#t~mem208#1.offset, 4);main_#t~short210#1 := 0 == main_#t~mem209#1 % 4294967296; 3848#L743-77 assume !main_#t~short210#1;havoc main_#t~mem207#1;havoc main_#t~mem206#1;havoc main_#t~mem208#1.base, main_#t~mem208#1.offset;havoc main_#t~mem209#1;havoc main_#t~short210#1; 3842#L743-116 goto; 3843#L743-118 goto; 3958#L743-120 goto; 4148#L743-122 goto; 3823#L733-3 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 3824#L733-4 [2022-07-22 03:55:26,240 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 03:55:26,240 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 4 times [2022-07-22 03:55:26,240 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 03:55:26,240 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1474933950] [2022-07-22 03:55:26,240 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 03:55:26,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 03:55:26,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 03:55:26,254 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 03:55:26,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 03:55:26,270 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 03:55:26,270 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 03:55:26,270 INFO L85 PathProgramCache]: Analyzing trace with hash 2074116778, now seen corresponding path program 1 times [2022-07-22 03:55:26,271 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 03:55:26,271 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [95217741] [2022-07-22 03:55:26,271 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 03:55:26,271 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 03:55:26,371 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-07-22 03:55:26,372 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1773161153] [2022-07-22 03:55:26,372 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 03:55:26,372 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-22 03:55:26,372 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-22 03:55:26,395 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-22 03:55:26,396 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process