./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/termination-restricted-15/NarrowKonv.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 6c24879c Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/termination-restricted-15/NarrowKonv.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 2c8d79b985e49ac5d6f27b4e25f4e3597dadc4ec57e262caec7782b796e874b7 --- Real Ultimate output --- This is Ultimate 0.2.2-?-6c24879 [2022-07-13 03:11:13,060 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-07-13 03:11:13,062 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-07-13 03:11:13,089 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-07-13 03:11:13,089 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-07-13 03:11:13,090 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-07-13 03:11:13,090 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-07-13 03:11:13,091 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-07-13 03:11:13,092 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-07-13 03:11:13,093 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-07-13 03:11:13,093 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-07-13 03:11:13,107 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-07-13 03:11:13,108 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-07-13 03:11:13,108 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-07-13 03:11:13,109 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-07-13 03:11:13,110 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-07-13 03:11:13,110 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-07-13 03:11:13,111 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-07-13 03:11:13,112 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-07-13 03:11:13,113 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-07-13 03:11:13,114 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-07-13 03:11:13,114 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-07-13 03:11:13,115 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-07-13 03:11:13,116 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-07-13 03:11:13,116 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-07-13 03:11:13,118 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-07-13 03:11:13,118 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-07-13 03:11:13,123 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-07-13 03:11:13,124 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-07-13 03:11:13,124 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-07-13 03:11:13,125 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-07-13 03:11:13,125 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-07-13 03:11:13,126 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-07-13 03:11:13,126 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-07-13 03:11:13,126 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-07-13 03:11:13,127 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-07-13 03:11:13,127 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-07-13 03:11:13,128 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-07-13 03:11:13,128 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-07-13 03:11:13,128 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-07-13 03:11:13,129 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-07-13 03:11:13,130 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-07-13 03:11:13,131 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf [2022-07-13 03:11:13,147 INFO L113 SettingsManager]: Loading preferences was successful [2022-07-13 03:11:13,147 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-07-13 03:11:13,148 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-07-13 03:11:13,148 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-07-13 03:11:13,149 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-07-13 03:11:13,149 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-07-13 03:11:13,149 INFO L138 SettingsManager]: * Use SBE=true [2022-07-13 03:11:13,150 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-07-13 03:11:13,150 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-07-13 03:11:13,150 INFO L138 SettingsManager]: * Use old map elimination=false [2022-07-13 03:11:13,151 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-07-13 03:11:13,151 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-07-13 03:11:13,151 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-07-13 03:11:13,151 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-07-13 03:11:13,151 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-07-13 03:11:13,152 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-07-13 03:11:13,152 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-07-13 03:11:13,152 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-07-13 03:11:13,152 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-07-13 03:11:13,153 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-07-13 03:11:13,153 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-07-13 03:11:13,153 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-07-13 03:11:13,153 INFO L138 SettingsManager]: * Use constant arrays=true [2022-07-13 03:11:13,153 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-07-13 03:11:13,153 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-07-13 03:11:13,153 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-07-13 03:11:13,154 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-07-13 03:11:13,154 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-07-13 03:11:13,154 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-07-13 03:11:13,154 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2c8d79b985e49ac5d6f27b4e25f4e3597dadc4ec57e262caec7782b796e874b7 [2022-07-13 03:11:13,332 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-07-13 03:11:13,346 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-07-13 03:11:13,347 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-07-13 03:11:13,348 INFO L271 PluginConnector]: Initializing CDTParser... [2022-07-13 03:11:13,348 INFO L275 PluginConnector]: CDTParser initialized [2022-07-13 03:11:13,349 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/termination-restricted-15/NarrowKonv.c [2022-07-13 03:11:13,410 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7309f680d/e68e31bd9d2d447889308e053a72fd97/FLAGbee287a48 [2022-07-13 03:11:13,749 INFO L306 CDTParser]: Found 1 translation units. [2022-07-13 03:11:13,750 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-restricted-15/NarrowKonv.c [2022-07-13 03:11:13,755 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7309f680d/e68e31bd9d2d447889308e053a72fd97/FLAGbee287a48 [2022-07-13 03:11:13,768 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7309f680d/e68e31bd9d2d447889308e053a72fd97 [2022-07-13 03:11:13,770 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-07-13 03:11:13,771 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-07-13 03:11:13,773 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-07-13 03:11:13,774 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-07-13 03:11:13,776 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-07-13 03:11:13,776 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.07 03:11:13" (1/1) ... [2022-07-13 03:11:13,777 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6161ad30 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.07 03:11:13, skipping insertion in model container [2022-07-13 03:11:13,777 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.07 03:11:13" (1/1) ... [2022-07-13 03:11:13,781 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-07-13 03:11:13,791 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-07-13 03:11:13,915 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-13 03:11:13,919 INFO L203 MainTranslator]: Completed pre-run [2022-07-13 03:11:13,940 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-13 03:11:13,948 INFO L208 MainTranslator]: Completed translation [2022-07-13 03:11:13,961 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.07 03:11:13 WrapperNode [2022-07-13 03:11:13,962 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-07-13 03:11:13,963 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-07-13 03:11:13,963 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-07-13 03:11:13,963 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-07-13 03:11:13,968 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.07 03:11:13" (1/1) ... [2022-07-13 03:11:13,971 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.07 03:11:13" (1/1) ... [2022-07-13 03:11:13,981 INFO L137 Inliner]: procedures = 4, calls = 2, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 18 [2022-07-13 03:11:13,981 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-07-13 03:11:13,982 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-07-13 03:11:13,983 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-07-13 03:11:13,983 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-07-13 03:11:13,987 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.07 03:11:13" (1/1) ... [2022-07-13 03:11:13,987 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.07 03:11:13" (1/1) ... [2022-07-13 03:11:13,988 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.07 03:11:13" (1/1) ... [2022-07-13 03:11:13,988 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.07 03:11:13" (1/1) ... [2022-07-13 03:11:13,989 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.07 03:11:13" (1/1) ... [2022-07-13 03:11:13,993 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.07 03:11:13" (1/1) ... [2022-07-13 03:11:13,993 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.07 03:11:13" (1/1) ... [2022-07-13 03:11:13,994 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-07-13 03:11:13,995 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-07-13 03:11:13,996 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-07-13 03:11:13,996 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-07-13 03:11:13,997 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.07 03:11:13" (1/1) ... [2022-07-13 03:11:14,001 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:14,008 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:14,017 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:14,033 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-07-13 03:11:14,046 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-07-13 03:11:14,047 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-07-13 03:11:14,080 INFO L234 CfgBuilder]: Building ICFG [2022-07-13 03:11:14,081 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-07-13 03:11:14,145 INFO L275 CfgBuilder]: Performing block encoding [2022-07-13 03:11:14,149 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-07-13 03:11:14,149 INFO L299 CfgBuilder]: Removed 1 assume(true) statements. [2022-07-13 03:11:14,150 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.07 03:11:14 BoogieIcfgContainer [2022-07-13 03:11:14,151 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-07-13 03:11:14,151 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-07-13 03:11:14,151 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-07-13 03:11:14,153 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-07-13 03:11:14,154 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-13 03:11:14,154 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 13.07 03:11:13" (1/3) ... [2022-07-13 03:11:14,155 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@118be1e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.07 03:11:14, skipping insertion in model container [2022-07-13 03:11:14,155 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-13 03:11:14,155 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.07 03:11:13" (2/3) ... [2022-07-13 03:11:14,155 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@118be1e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.07 03:11:14, skipping insertion in model container [2022-07-13 03:11:14,155 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-13 03:11:14,156 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.07 03:11:14" (3/3) ... [2022-07-13 03:11:14,156 INFO L354 chiAutomizerObserver]: Analyzing ICFG NarrowKonv.c [2022-07-13 03:11:14,194 INFO L255 stractBuchiCegarLoop]: Interprodecural is true [2022-07-13 03:11:14,195 INFO L256 stractBuchiCegarLoop]: Hoare is false [2022-07-13 03:11:14,195 INFO L257 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-07-13 03:11:14,195 INFO L258 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-07-13 03:11:14,195 INFO L259 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-07-13 03:11:14,195 INFO L260 stractBuchiCegarLoop]: Difference is false [2022-07-13 03:11:14,195 INFO L261 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-07-13 03:11:14,196 INFO L265 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-07-13 03:11:14,198 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 9 states, 8 states have (on average 1.5) internal successors, (12), 8 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:14,210 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2022-07-13 03:11:14,210 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-13 03:11:14,210 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-13 03:11:14,214 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-13 03:11:14,214 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-07-13 03:11:14,214 INFO L287 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-07-13 03:11:14,215 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 9 states, 8 states have (on average 1.5) internal successors, (12), 8 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:14,215 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2022-07-13 03:11:14,215 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-13 03:11:14,216 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-13 03:11:14,216 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-13 03:11:14,216 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-07-13 03:11:14,220 INFO L752 eck$LassoCheckResult]: Stem: 5#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true; 7#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 3#L12-1true [2022-07-13 03:11:14,220 INFO L754 eck$LassoCheckResult]: Loop: 3#L12-1true assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 9#L12true assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3#L12-1true [2022-07-13 03:11:14,224 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:14,224 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2022-07-13 03:11:14,229 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:14,230 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1581300242] [2022-07-13 03:11:14,230 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:14,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:14,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:14,282 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 03:11:14,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:14,299 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 03:11:14,301 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:14,301 INFO L85 PathProgramCache]: Analyzing trace with hash 1324, now seen corresponding path program 1 times [2022-07-13 03:11:14,302 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:14,303 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [46599590] [2022-07-13 03:11:14,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:14,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:14,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:14,320 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 03:11:14,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:14,326 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 03:11:14,327 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:14,327 INFO L85 PathProgramCache]: Analyzing trace with hash 925806, now seen corresponding path program 1 times [2022-07-13 03:11:14,328 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:14,328 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1121912121] [2022-07-13 03:11:14,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:14,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:14,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:14,385 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-13 03:11:14,386 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-13 03:11:14,386 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1121912121] [2022-07-13 03:11:14,387 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1121912121] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-13 03:11:14,387 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-13 03:11:14,387 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-07-13 03:11:14,387 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [112455582] [2022-07-13 03:11:14,388 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-13 03:11:14,444 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-13 03:11:14,475 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-07-13 03:11:14,488 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-13 03:11:14,489 INFO L87 Difference]: Start difference. First operand has 9 states, 8 states have (on average 1.5) internal successors, (12), 8 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 2 states have (on average 2.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:14,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-13 03:11:14,508 INFO L93 Difference]: Finished difference Result 16 states and 19 transitions. [2022-07-13 03:11:14,509 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-07-13 03:11:14,512 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 16 states and 19 transitions. [2022-07-13 03:11:14,514 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2022-07-13 03:11:14,516 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 16 states to 8 states and 11 transitions. [2022-07-13 03:11:14,518 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2022-07-13 03:11:14,518 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2022-07-13 03:11:14,518 INFO L73 IsDeterministic]: Start isDeterministic. Operand 8 states and 11 transitions. [2022-07-13 03:11:14,518 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-13 03:11:14,519 INFO L369 hiAutomatonCegarLoop]: Abstraction has 8 states and 11 transitions. [2022-07-13 03:11:14,528 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8 states and 11 transitions. [2022-07-13 03:11:14,533 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8 to 8. [2022-07-13 03:11:14,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.375) internal successors, (11), 7 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:14,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 11 transitions. [2022-07-13 03:11:14,535 INFO L392 hiAutomatonCegarLoop]: Abstraction has 8 states and 11 transitions. [2022-07-13 03:11:14,535 INFO L374 stractBuchiCegarLoop]: Abstraction has 8 states and 11 transitions. [2022-07-13 03:11:14,536 INFO L287 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-07-13 03:11:14,536 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8 states and 11 transitions. [2022-07-13 03:11:14,536 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2022-07-13 03:11:14,536 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-13 03:11:14,537 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-13 03:11:14,537 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-13 03:11:14,537 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-07-13 03:11:14,538 INFO L752 eck$LassoCheckResult]: Stem: 39#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 40#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 41#L12-1 [2022-07-13 03:11:14,538 INFO L754 eck$LassoCheckResult]: Loop: 41#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 42#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 43#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 41#L12-1 [2022-07-13 03:11:14,539 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:14,539 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 2 times [2022-07-13 03:11:14,539 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:14,540 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1132779032] [2022-07-13 03:11:14,540 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:14,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:14,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:14,545 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 03:11:14,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:14,549 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 03:11:14,549 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:14,549 INFO L85 PathProgramCache]: Analyzing trace with hash 40815, now seen corresponding path program 1 times [2022-07-13 03:11:14,550 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:14,551 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [664611545] [2022-07-13 03:11:14,552 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:14,552 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:14,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:14,560 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 03:11:14,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:14,570 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 03:11:14,571 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:14,571 INFO L85 PathProgramCache]: Analyzing trace with hash 28699757, now seen corresponding path program 1 times [2022-07-13 03:11:14,574 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:14,575 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [751841840] [2022-07-13 03:11:14,575 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:14,575 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:14,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:14,582 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 03:11:14,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:14,589 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 03:11:14,635 INFO L210 LassoAnalysis]: Preferences: [2022-07-13 03:11:14,637 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-07-13 03:11:14,637 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-07-13 03:11:14,638 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-07-13 03:11:14,638 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2022-07-13 03:11:14,638 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:14,638 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-07-13 03:11:14,638 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-07-13 03:11:14,638 INFO L133 ssoRankerPreferences]: Filename of dumped script: NarrowKonv.c_Iteration2_Loop [2022-07-13 03:11:14,638 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-07-13 03:11:14,638 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-07-13 03:11:14,652 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-13 03:11:14,656 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-13 03:11:14,660 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-13 03:11:14,733 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-07-13 03:11:14,736 INFO L404 LassoAnalysis]: Checking for nontermination... [2022-07-13 03:11:14,738 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:14,738 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:14,757 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:14,758 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2022-07-13 03:11:14,759 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2022-07-13 03:11:14,759 INFO L160 nArgumentSynthesizer]: Using integer mode. [2022-07-13 03:11:14,785 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2022-07-13 03:11:14,785 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {v_rep~unnamed0~0~true_1=1} Honda state: {v_rep~unnamed0~0~true_1=1} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2022-07-13 03:11:14,815 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2022-07-13 03:11:14,816 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:14,816 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:14,817 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:14,831 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2022-07-13 03:11:14,832 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2022-07-13 03:11:14,832 INFO L160 nArgumentSynthesizer]: Using integer mode. [2022-07-13 03:11:14,859 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2022-07-13 03:11:14,859 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {v_rep~unnamed0~0~false_1=0} Honda state: {v_rep~unnamed0~0~false_1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2022-07-13 03:11:14,874 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2022-07-13 03:11:14,875 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:14,875 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:14,880 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:14,881 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2022-07-13 03:11:14,882 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2022-07-13 03:11:14,882 INFO L160 nArgumentSynthesizer]: Using integer mode. [2022-07-13 03:11:14,908 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2022-07-13 03:11:14,908 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:14,909 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:14,910 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:14,910 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2022-07-13 03:11:14,912 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2022-07-13 03:11:14,912 INFO L160 nArgumentSynthesizer]: Using integer mode. [2022-07-13 03:11:14,958 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2022-07-13 03:11:14,962 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2022-07-13 03:11:14,962 INFO L210 LassoAnalysis]: Preferences: [2022-07-13 03:11:14,962 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-07-13 03:11:14,962 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-07-13 03:11:14,962 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-07-13 03:11:14,962 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-07-13 03:11:14,962 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:14,962 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-07-13 03:11:14,962 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-07-13 03:11:14,962 INFO L133 ssoRankerPreferences]: Filename of dumped script: NarrowKonv.c_Iteration2_Loop [2022-07-13 03:11:14,962 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-07-13 03:11:14,962 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-07-13 03:11:14,963 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-13 03:11:14,966 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-13 03:11:14,968 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-13 03:11:15,026 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-07-13 03:11:15,029 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-07-13 03:11:15,030 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:15,030 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:15,031 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:15,032 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2022-07-13 03:11:15,033 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-07-13 03:11:15,039 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-07-13 03:11:15,039 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-07-13 03:11:15,039 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-07-13 03:11:15,039 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-07-13 03:11:15,042 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-07-13 03:11:15,042 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-07-13 03:11:15,059 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-07-13 03:11:15,074 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2022-07-13 03:11:15,074 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:15,075 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:15,078 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:15,079 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2022-07-13 03:11:15,080 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-07-13 03:11:15,088 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-07-13 03:11:15,089 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-07-13 03:11:15,089 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-07-13 03:11:15,089 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-07-13 03:11:15,094 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-07-13 03:11:15,094 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-07-13 03:11:15,111 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-07-13 03:11:15,126 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2022-07-13 03:11:15,126 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:15,126 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:15,127 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:15,128 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2022-07-13 03:11:15,129 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-07-13 03:11:15,134 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-07-13 03:11:15,134 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-07-13 03:11:15,135 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-07-13 03:11:15,135 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-07-13 03:11:15,135 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-07-13 03:11:15,136 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-07-13 03:11:15,136 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-07-13 03:11:15,140 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-07-13 03:11:15,144 INFO L443 ModelExtractionUtils]: Simplification made 4 calls to the SMT solver. [2022-07-13 03:11:15,144 INFO L444 ModelExtractionUtils]: 0 out of 4 variables were initially zero. Simplification set additionally 1 variables to zero. [2022-07-13 03:11:15,145 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:15,145 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:15,146 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:15,147 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2022-07-13 03:11:15,147 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-07-13 03:11:15,147 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2022-07-13 03:11:15,148 INFO L513 LassoAnalysis]: Proved termination. [2022-07-13 03:11:15,148 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~range~0#1, ULTIMATE.start_main_~i~0#1) = 1*ULTIMATE.start_main_~range~0#1 - 1*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2022-07-13 03:11:15,168 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2022-07-13 03:11:15,171 INFO L293 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2022-07-13 03:11:15,192 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:15,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:15,200 INFO L263 TraceCheckSpWp]: Trace formula consists of 5 conjuncts, 2 conjunts are in the unsatisfiable core [2022-07-13 03:11:15,202 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:15,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:15,211 WARN L261 TraceCheckSpWp]: Trace formula consists of 8 conjuncts, 5 conjunts are in the unsatisfiable core [2022-07-13 03:11:15,214 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:15,260 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-13 03:11:15,263 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2022-07-13 03:11:15,264 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 8 states and 11 transitions. cyclomatic complexity: 5 Second operand has 3 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:15,287 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 8 states and 11 transitions. cyclomatic complexity: 5. Second operand has 3 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 11 states and 15 transitions. Complement of second has 5 states. [2022-07-13 03:11:15,287 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2022-07-13 03:11:15,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:15,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 5 transitions. [2022-07-13 03:11:15,289 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 5 transitions. Stem has 2 letters. Loop has 3 letters. [2022-07-13 03:11:15,290 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-07-13 03:11:15,290 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 5 transitions. Stem has 5 letters. Loop has 3 letters. [2022-07-13 03:11:15,290 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-07-13 03:11:15,290 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 5 transitions. Stem has 2 letters. Loop has 6 letters. [2022-07-13 03:11:15,290 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-07-13 03:11:15,290 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11 states and 15 transitions. [2022-07-13 03:11:15,291 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2022-07-13 03:11:15,292 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11 states to 11 states and 15 transitions. [2022-07-13 03:11:15,292 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2022-07-13 03:11:15,293 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2022-07-13 03:11:15,293 INFO L73 IsDeterministic]: Start isDeterministic. Operand 11 states and 15 transitions. [2022-07-13 03:11:15,293 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-07-13 03:11:15,293 INFO L369 hiAutomatonCegarLoop]: Abstraction has 11 states and 15 transitions. [2022-07-13 03:11:15,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11 states and 15 transitions. [2022-07-13 03:11:15,294 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11 to 11. [2022-07-13 03:11:15,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 10 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:15,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 15 transitions. [2022-07-13 03:11:15,295 INFO L392 hiAutomatonCegarLoop]: Abstraction has 11 states and 15 transitions. [2022-07-13 03:11:15,295 INFO L374 stractBuchiCegarLoop]: Abstraction has 11 states and 15 transitions. [2022-07-13 03:11:15,295 INFO L287 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-07-13 03:11:15,295 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 11 states and 15 transitions. [2022-07-13 03:11:15,296 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2022-07-13 03:11:15,296 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-13 03:11:15,297 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-13 03:11:15,297 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2022-07-13 03:11:15,297 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-07-13 03:11:15,297 INFO L752 eck$LassoCheckResult]: Stem: 98#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 99#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 100#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 95#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 96#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 91#L12-1 [2022-07-13 03:11:15,297 INFO L754 eck$LassoCheckResult]: Loop: 91#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 92#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 91#L12-1 [2022-07-13 03:11:15,298 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:15,298 INFO L85 PathProgramCache]: Analyzing trace with hash 28699755, now seen corresponding path program 1 times [2022-07-13 03:11:15,298 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:15,298 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2133063879] [2022-07-13 03:11:15,298 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:15,298 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:15,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:15,321 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 03:11:15,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:15,324 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 03:11:15,326 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:15,326 INFO L85 PathProgramCache]: Analyzing trace with hash 1324, now seen corresponding path program 2 times [2022-07-13 03:11:15,326 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:15,326 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1307205660] [2022-07-13 03:11:15,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:15,327 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:15,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:15,331 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 03:11:15,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:15,332 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 03:11:15,333 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:15,333 INFO L85 PathProgramCache]: Analyzing trace with hash 1810661142, now seen corresponding path program 1 times [2022-07-13 03:11:15,333 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:15,333 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1386547784] [2022-07-13 03:11:15,333 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:15,333 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:15,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:15,348 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-13 03:11:15,348 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-13 03:11:15,348 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1386547784] [2022-07-13 03:11:15,348 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1386547784] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-13 03:11:15,348 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1219119592] [2022-07-13 03:11:15,348 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:15,349 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-13 03:11:15,349 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:15,350 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-13 03:11:15,365 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-07-13 03:11:15,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:15,407 INFO L263 TraceCheckSpWp]: Trace formula consists of 20 conjuncts, 4 conjunts are in the unsatisfiable core [2022-07-13 03:11:15,408 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:15,439 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-13 03:11:15,439 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-13 03:11:15,454 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-13 03:11:15,454 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1219119592] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-13 03:11:15,454 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-13 03:11:15,454 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2022-07-13 03:11:15,454 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [170322096] [2022-07-13 03:11:15,455 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-13 03:11:15,465 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-13 03:11:15,465 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-07-13 03:11:15,465 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2022-07-13 03:11:15,465 INFO L87 Difference]: Start difference. First operand 11 states and 15 transitions. cyclomatic complexity: 6 Second operand has 7 states, 6 states have (on average 2.6666666666666665) internal successors, (16), 7 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:15,499 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-13 03:11:15,499 INFO L93 Difference]: Finished difference Result 23 states and 28 transitions. [2022-07-13 03:11:15,499 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-07-13 03:11:15,500 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 23 states and 28 transitions. [2022-07-13 03:11:15,501 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2022-07-13 03:11:15,501 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 23 states to 23 states and 28 transitions. [2022-07-13 03:11:15,501 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2022-07-13 03:11:15,501 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2022-07-13 03:11:15,502 INFO L73 IsDeterministic]: Start isDeterministic. Operand 23 states and 28 transitions. [2022-07-13 03:11:15,502 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-07-13 03:11:15,502 INFO L369 hiAutomatonCegarLoop]: Abstraction has 23 states and 28 transitions. [2022-07-13 03:11:15,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states and 28 transitions. [2022-07-13 03:11:15,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2022-07-13 03:11:15,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.2173913043478262) internal successors, (28), 22 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:15,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 28 transitions. [2022-07-13 03:11:15,504 INFO L392 hiAutomatonCegarLoop]: Abstraction has 23 states and 28 transitions. [2022-07-13 03:11:15,504 INFO L374 stractBuchiCegarLoop]: Abstraction has 23 states and 28 transitions. [2022-07-13 03:11:15,504 INFO L287 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-07-13 03:11:15,504 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 23 states and 28 transitions. [2022-07-13 03:11:15,505 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2022-07-13 03:11:15,505 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-13 03:11:15,505 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-13 03:11:15,505 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 2, 1, 1, 1] [2022-07-13 03:11:15,505 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-07-13 03:11:15,505 INFO L752 eck$LassoCheckResult]: Stem: 183#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 184#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 185#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 179#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 186#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 175#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 176#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 180#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 181#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 197#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 196#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 189#L12-1 [2022-07-13 03:11:15,505 INFO L754 eck$LassoCheckResult]: Loop: 189#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 194#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 187#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 189#L12-1 [2022-07-13 03:11:15,506 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:15,506 INFO L85 PathProgramCache]: Analyzing trace with hash -1805445589, now seen corresponding path program 1 times [2022-07-13 03:11:15,506 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:15,506 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1169252659] [2022-07-13 03:11:15,506 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:15,507 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:15,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:15,512 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 03:11:15,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:15,532 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 03:11:15,532 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:15,533 INFO L85 PathProgramCache]: Analyzing trace with hash 40815, now seen corresponding path program 2 times [2022-07-13 03:11:15,533 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:15,533 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [557549325] [2022-07-13 03:11:15,533 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:15,533 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:15,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:15,536 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 03:11:15,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:15,538 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 03:11:15,538 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:15,538 INFO L85 PathProgramCache]: Analyzing trace with hash -154083067, now seen corresponding path program 2 times [2022-07-13 03:11:15,538 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:15,538 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1898601200] [2022-07-13 03:11:15,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:15,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:15,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:15,569 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 03:11:15,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:15,577 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 03:11:15,583 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2022-07-13 03:11:15,608 INFO L210 LassoAnalysis]: Preferences: [2022-07-13 03:11:15,608 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-07-13 03:11:15,608 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-07-13 03:11:15,608 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-07-13 03:11:15,608 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2022-07-13 03:11:15,608 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:15,608 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-07-13 03:11:15,608 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-07-13 03:11:15,608 INFO L133 ssoRankerPreferences]: Filename of dumped script: NarrowKonv.c_Iteration4_Loop [2022-07-13 03:11:15,608 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-07-13 03:11:15,608 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-07-13 03:11:15,609 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-13 03:11:15,611 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-13 03:11:15,613 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-13 03:11:15,662 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-07-13 03:11:15,662 INFO L404 LassoAnalysis]: Checking for nontermination... [2022-07-13 03:11:15,662 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:15,662 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:15,676 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:15,691 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2022-07-13 03:11:15,692 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2022-07-13 03:11:15,692 INFO L160 nArgumentSynthesizer]: Using integer mode. [2022-07-13 03:11:15,703 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2022-07-13 03:11:15,703 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {v_rep~unnamed0~0~false_3=0} Honda state: {v_rep~unnamed0~0~false_3=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2022-07-13 03:11:15,718 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2022-07-13 03:11:15,718 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:15,718 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:15,719 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:15,720 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2022-07-13 03:11:15,721 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2022-07-13 03:11:15,721 INFO L160 nArgumentSynthesizer]: Using integer mode. [2022-07-13 03:11:15,742 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2022-07-13 03:11:15,742 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {v_rep~unnamed0~0~true_3=1} Honda state: {v_rep~unnamed0~0~true_3=1} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2022-07-13 03:11:15,760 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2022-07-13 03:11:15,760 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:15,761 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:15,762 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:15,770 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2022-07-13 03:11:15,770 INFO L160 nArgumentSynthesizer]: Using integer mode. [2022-07-13 03:11:15,787 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2022-07-13 03:11:15,804 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2022-07-13 03:11:15,804 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:15,805 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:15,806 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:15,806 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2022-07-13 03:11:15,807 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2022-07-13 03:11:15,807 INFO L160 nArgumentSynthesizer]: Using integer mode. [2022-07-13 03:11:15,881 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2022-07-13 03:11:15,884 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Forceful destruction successful, exit code 0 [2022-07-13 03:11:15,884 INFO L210 LassoAnalysis]: Preferences: [2022-07-13 03:11:15,884 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-07-13 03:11:15,884 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-07-13 03:11:15,884 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-07-13 03:11:15,884 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-07-13 03:11:15,884 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:15,884 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-07-13 03:11:15,885 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-07-13 03:11:15,885 INFO L133 ssoRankerPreferences]: Filename of dumped script: NarrowKonv.c_Iteration4_Loop [2022-07-13 03:11:15,885 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-07-13 03:11:15,885 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-07-13 03:11:15,885 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-13 03:11:15,889 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-13 03:11:15,891 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-13 03:11:15,940 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-07-13 03:11:15,941 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-07-13 03:11:15,941 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:15,941 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:15,942 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:15,960 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2022-07-13 03:11:15,961 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-07-13 03:11:15,968 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-07-13 03:11:15,968 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-07-13 03:11:15,968 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-07-13 03:11:15,968 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-07-13 03:11:15,970 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-07-13 03:11:15,971 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-07-13 03:11:15,987 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-07-13 03:11:16,020 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Ended with exit code 0 [2022-07-13 03:11:16,020 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:16,020 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:16,021 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:16,022 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2022-07-13 03:11:16,024 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-07-13 03:11:16,030 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-07-13 03:11:16,030 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-07-13 03:11:16,030 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-07-13 03:11:16,030 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-07-13 03:11:16,034 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-07-13 03:11:16,034 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-07-13 03:11:16,059 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-07-13 03:11:16,089 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Forceful destruction successful, exit code 0 [2022-07-13 03:11:16,089 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:16,090 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:16,103 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:16,109 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-07-13 03:11:16,115 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-07-13 03:11:16,115 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-07-13 03:11:16,115 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-07-13 03:11:16,115 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-07-13 03:11:16,115 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-07-13 03:11:16,115 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2022-07-13 03:11:16,118 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-07-13 03:11:16,118 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-07-13 03:11:16,119 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-07-13 03:11:16,125 INFO L443 ModelExtractionUtils]: Simplification made 4 calls to the SMT solver. [2022-07-13 03:11:16,125 INFO L444 ModelExtractionUtils]: 0 out of 4 variables were initially zero. Simplification set additionally 1 variables to zero. [2022-07-13 03:11:16,126 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:16,126 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:16,127 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:16,128 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2022-07-13 03:11:16,129 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-07-13 03:11:16,129 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2022-07-13 03:11:16,129 INFO L513 LassoAnalysis]: Proved termination. [2022-07-13 03:11:16,129 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0#1, ULTIMATE.start_main_~range~0#1) = -1*ULTIMATE.start_main_~i~0#1 + 1*ULTIMATE.start_main_~range~0#1 Supporting invariants [] [2022-07-13 03:11:16,144 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Ended with exit code 0 [2022-07-13 03:11:16,145 INFO L293 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2022-07-13 03:11:16,173 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:16,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:16,180 INFO L263 TraceCheckSpWp]: Trace formula consists of 26 conjuncts, 2 conjunts are in the unsatisfiable core [2022-07-13 03:11:16,180 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:16,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:16,202 WARN L261 TraceCheckSpWp]: Trace formula consists of 8 conjuncts, 5 conjunts are in the unsatisfiable core [2022-07-13 03:11:16,203 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:16,222 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-13 03:11:16,222 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2022-07-13 03:11:16,223 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 23 states and 28 transitions. cyclomatic complexity: 8 Second operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 3 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:16,238 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 23 states and 28 transitions. cyclomatic complexity: 8. Second operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 3 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 44 states and 50 transitions. Complement of second has 5 states. [2022-07-13 03:11:16,238 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2022-07-13 03:11:16,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 3 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:16,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 9 transitions. [2022-07-13 03:11:16,239 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 9 transitions. Stem has 11 letters. Loop has 3 letters. [2022-07-13 03:11:16,240 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-07-13 03:11:16,240 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 9 transitions. Stem has 14 letters. Loop has 3 letters. [2022-07-13 03:11:16,240 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-07-13 03:11:16,240 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 9 transitions. Stem has 11 letters. Loop has 6 letters. [2022-07-13 03:11:16,240 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-07-13 03:11:16,240 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 44 states and 50 transitions. [2022-07-13 03:11:16,242 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2022-07-13 03:11:16,242 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 44 states to 38 states and 44 transitions. [2022-07-13 03:11:16,242 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 27 [2022-07-13 03:11:16,243 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 28 [2022-07-13 03:11:16,243 INFO L73 IsDeterministic]: Start isDeterministic. Operand 38 states and 44 transitions. [2022-07-13 03:11:16,243 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-07-13 03:11:16,243 INFO L369 hiAutomatonCegarLoop]: Abstraction has 38 states and 44 transitions. [2022-07-13 03:11:16,243 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states and 44 transitions. [2022-07-13 03:11:16,244 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 34. [2022-07-13 03:11:16,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.1764705882352942) internal successors, (40), 33 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:16,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 40 transitions. [2022-07-13 03:11:16,245 INFO L392 hiAutomatonCegarLoop]: Abstraction has 34 states and 40 transitions. [2022-07-13 03:11:16,245 INFO L374 stractBuchiCegarLoop]: Abstraction has 34 states and 40 transitions. [2022-07-13 03:11:16,246 INFO L287 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-07-13 03:11:16,246 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 34 states and 40 transitions. [2022-07-13 03:11:16,246 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2022-07-13 03:11:16,246 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-13 03:11:16,247 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-13 03:11:16,247 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 3, 1, 1, 1] [2022-07-13 03:11:16,247 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-07-13 03:11:16,247 INFO L752 eck$LassoCheckResult]: Stem: 314#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 315#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 316#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 309#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 338#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 307#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 308#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 317#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 305#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 306#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 310#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 311#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 336#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 334#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 327#L12-1 [2022-07-13 03:11:16,247 INFO L754 eck$LassoCheckResult]: Loop: 327#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 332#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 325#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 327#L12-1 [2022-07-13 03:11:16,248 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:16,248 INFO L85 PathProgramCache]: Analyzing trace with hash 1972849857, now seen corresponding path program 3 times [2022-07-13 03:11:16,248 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:16,248 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [272232495] [2022-07-13 03:11:16,248 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:16,248 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:16,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:16,254 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 03:11:16,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:16,258 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 03:11:16,258 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:16,258 INFO L85 PathProgramCache]: Analyzing trace with hash 40815, now seen corresponding path program 3 times [2022-07-13 03:11:16,259 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:16,259 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1070664764] [2022-07-13 03:11:16,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:16,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:16,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:16,261 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 03:11:16,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:16,263 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 03:11:16,263 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:16,263 INFO L85 PathProgramCache]: Analyzing trace with hash 837622447, now seen corresponding path program 4 times [2022-07-13 03:11:16,263 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:16,263 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2006795142] [2022-07-13 03:11:16,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:16,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:16,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:16,268 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 03:11:16,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:16,273 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 03:11:16,292 INFO L210 LassoAnalysis]: Preferences: [2022-07-13 03:11:16,292 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-07-13 03:11:16,292 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-07-13 03:11:16,292 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-07-13 03:11:16,292 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2022-07-13 03:11:16,292 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:16,292 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-07-13 03:11:16,292 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-07-13 03:11:16,293 INFO L133 ssoRankerPreferences]: Filename of dumped script: NarrowKonv.c_Iteration5_Loop [2022-07-13 03:11:16,293 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-07-13 03:11:16,293 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-07-13 03:11:16,293 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-13 03:11:16,295 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-13 03:11:16,297 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-13 03:11:16,330 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-07-13 03:11:16,330 INFO L404 LassoAnalysis]: Checking for nontermination... [2022-07-13 03:11:16,330 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:16,330 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:16,344 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:16,345 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2022-07-13 03:11:16,346 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2022-07-13 03:11:16,346 INFO L160 nArgumentSynthesizer]: Using integer mode. [2022-07-13 03:11:16,357 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2022-07-13 03:11:16,357 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {v_rep~unnamed0~0~true_5=1} Honda state: {v_rep~unnamed0~0~true_5=1} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2022-07-13 03:11:16,371 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Ended with exit code 0 [2022-07-13 03:11:16,371 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:16,372 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:16,372 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:16,373 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Waiting until timeout for monitored process [2022-07-13 03:11:16,375 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2022-07-13 03:11:16,375 INFO L160 nArgumentSynthesizer]: Using integer mode. [2022-07-13 03:11:16,385 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2022-07-13 03:11:16,385 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {v_rep~unnamed0~0~false_5=0} Honda state: {v_rep~unnamed0~0~false_5=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2022-07-13 03:11:16,400 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Forceful destruction successful, exit code 0 [2022-07-13 03:11:16,400 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:16,400 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:16,401 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:16,402 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Waiting until timeout for monitored process [2022-07-13 03:11:16,404 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2022-07-13 03:11:16,404 INFO L160 nArgumentSynthesizer]: Using integer mode. [2022-07-13 03:11:16,427 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Ended with exit code 0 [2022-07-13 03:11:16,427 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:16,428 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:16,428 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:16,429 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Waiting until timeout for monitored process [2022-07-13 03:11:16,430 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2022-07-13 03:11:16,430 INFO L160 nArgumentSynthesizer]: Using integer mode. [2022-07-13 03:11:16,476 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2022-07-13 03:11:16,479 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Ended with exit code 0 [2022-07-13 03:11:16,479 INFO L210 LassoAnalysis]: Preferences: [2022-07-13 03:11:16,479 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-07-13 03:11:16,479 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-07-13 03:11:16,479 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-07-13 03:11:16,479 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-07-13 03:11:16,479 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:16,479 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-07-13 03:11:16,479 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-07-13 03:11:16,479 INFO L133 ssoRankerPreferences]: Filename of dumped script: NarrowKonv.c_Iteration5_Loop [2022-07-13 03:11:16,479 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-07-13 03:11:16,479 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-07-13 03:11:16,480 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-13 03:11:16,482 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-13 03:11:16,484 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-13 03:11:16,519 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-07-13 03:11:16,519 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-07-13 03:11:16,519 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:16,519 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:16,531 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:16,532 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Waiting until timeout for monitored process [2022-07-13 03:11:16,533 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-07-13 03:11:16,538 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-07-13 03:11:16,538 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-07-13 03:11:16,538 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-07-13 03:11:16,539 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-07-13 03:11:16,540 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-07-13 03:11:16,540 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-07-13 03:11:16,552 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-07-13 03:11:16,568 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Forceful destruction successful, exit code 0 [2022-07-13 03:11:16,568 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:16,569 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:16,570 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:16,570 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Waiting until timeout for monitored process [2022-07-13 03:11:16,573 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-07-13 03:11:16,579 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-07-13 03:11:16,579 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-07-13 03:11:16,579 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-07-13 03:11:16,579 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-07-13 03:11:16,581 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-07-13 03:11:16,581 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-07-13 03:11:16,592 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-07-13 03:11:16,607 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Forceful destruction successful, exit code 0 [2022-07-13 03:11:16,607 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:16,607 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:16,608 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:16,609 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Waiting until timeout for monitored process [2022-07-13 03:11:16,610 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-07-13 03:11:16,626 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-07-13 03:11:16,626 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-07-13 03:11:16,626 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-07-13 03:11:16,626 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-07-13 03:11:16,626 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-07-13 03:11:16,627 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-07-13 03:11:16,627 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-07-13 03:11:16,628 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-07-13 03:11:16,631 INFO L443 ModelExtractionUtils]: Simplification made 4 calls to the SMT solver. [2022-07-13 03:11:16,631 INFO L444 ModelExtractionUtils]: 0 out of 4 variables were initially zero. Simplification set additionally 1 variables to zero. [2022-07-13 03:11:16,632 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:16,632 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:16,633 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:16,634 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Waiting until timeout for monitored process [2022-07-13 03:11:16,634 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-07-13 03:11:16,634 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2022-07-13 03:11:16,635 INFO L513 LassoAnalysis]: Proved termination. [2022-07-13 03:11:16,635 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0#1, ULTIMATE.start_main_~range~0#1) = -1*ULTIMATE.start_main_~i~0#1 + 1*ULTIMATE.start_main_~range~0#1 Supporting invariants [] [2022-07-13 03:11:16,650 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Ended with exit code 0 [2022-07-13 03:11:16,651 INFO L293 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2022-07-13 03:11:16,660 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:16,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:16,666 INFO L263 TraceCheckSpWp]: Trace formula consists of 32 conjuncts, 2 conjunts are in the unsatisfiable core [2022-07-13 03:11:16,666 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:16,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:16,681 WARN L261 TraceCheckSpWp]: Trace formula consists of 8 conjuncts, 5 conjunts are in the unsatisfiable core [2022-07-13 03:11:16,681 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:16,711 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-13 03:11:16,711 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2022-07-13 03:11:16,712 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 34 states and 40 transitions. cyclomatic complexity: 10 Second operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 3 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:16,735 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 34 states and 40 transitions. cyclomatic complexity: 10. Second operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 3 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 44 states and 51 transitions. Complement of second has 5 states. [2022-07-13 03:11:16,736 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2022-07-13 03:11:16,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 3 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:16,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 9 transitions. [2022-07-13 03:11:16,737 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 9 transitions. Stem has 14 letters. Loop has 3 letters. [2022-07-13 03:11:16,737 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-07-13 03:11:16,737 INFO L577 RefineBuchi]: Bad chosen interpolant automaton: word not accepted [2022-07-13 03:11:16,744 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Forceful destruction successful, exit code 0 [2022-07-13 03:11:16,744 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:16,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:16,749 INFO L263 TraceCheckSpWp]: Trace formula consists of 32 conjuncts, 2 conjunts are in the unsatisfiable core [2022-07-13 03:11:16,750 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:16,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:16,762 WARN L261 TraceCheckSpWp]: Trace formula consists of 8 conjuncts, 5 conjunts are in the unsatisfiable core [2022-07-13 03:11:16,762 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:16,773 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-13 03:11:16,773 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and with honda bouncer for loop.1 stem predicates 2 loop predicates [2022-07-13 03:11:16,773 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 34 states and 40 transitions. cyclomatic complexity: 10 Second operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 3 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:16,779 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 34 states and 40 transitions. cyclomatic complexity: 10. Second operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 3 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 44 states and 51 transitions. Complement of second has 5 states. [2022-07-13 03:11:16,782 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Ended with exit code 0 [2022-07-13 03:11:16,782 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2022-07-13 03:11:16,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 3 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:16,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 9 transitions. [2022-07-13 03:11:16,783 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 9 transitions. Stem has 14 letters. Loop has 3 letters. [2022-07-13 03:11:16,783 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-07-13 03:11:16,783 INFO L577 RefineBuchi]: Bad chosen interpolant automaton: word not accepted [2022-07-13 03:11:16,790 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:16,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:16,795 INFO L263 TraceCheckSpWp]: Trace formula consists of 32 conjuncts, 2 conjunts are in the unsatisfiable core [2022-07-13 03:11:16,795 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:16,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:16,807 WARN L261 TraceCheckSpWp]: Trace formula consists of 8 conjuncts, 5 conjunts are in the unsatisfiable core [2022-07-13 03:11:16,808 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:16,818 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-13 03:11:16,818 INFO L152 lantAutomatonBouncer]: Defining Buchi interpolant automaton with scrooge nondeterminism in stemwith honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2022-07-13 03:11:16,818 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 34 states and 40 transitions. cyclomatic complexity: 10 Second operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 3 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:16,828 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 34 states and 40 transitions. cyclomatic complexity: 10. Second operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 3 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 57 states and 69 transitions. Complement of second has 4 states. [2022-07-13 03:11:16,828 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2022-07-13 03:11:16,829 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 3 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:16,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 13 transitions. [2022-07-13 03:11:16,829 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 13 transitions. Stem has 14 letters. Loop has 3 letters. [2022-07-13 03:11:16,829 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-07-13 03:11:16,829 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 13 transitions. Stem has 17 letters. Loop has 3 letters. [2022-07-13 03:11:16,830 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-07-13 03:11:16,830 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 13 transitions. Stem has 14 letters. Loop has 6 letters. [2022-07-13 03:11:16,830 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-07-13 03:11:16,830 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 57 states and 69 transitions. [2022-07-13 03:11:16,831 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2022-07-13 03:11:16,832 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 57 states to 47 states and 58 transitions. [2022-07-13 03:11:16,832 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 27 [2022-07-13 03:11:16,832 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 30 [2022-07-13 03:11:16,832 INFO L73 IsDeterministic]: Start isDeterministic. Operand 47 states and 58 transitions. [2022-07-13 03:11:16,832 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-07-13 03:11:16,832 INFO L369 hiAutomatonCegarLoop]: Abstraction has 47 states and 58 transitions. [2022-07-13 03:11:16,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states and 58 transitions. [2022-07-13 03:11:16,834 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 31. [2022-07-13 03:11:16,834 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 1.2903225806451613) internal successors, (40), 30 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:16,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 40 transitions. [2022-07-13 03:11:16,835 INFO L392 hiAutomatonCegarLoop]: Abstraction has 31 states and 40 transitions. [2022-07-13 03:11:16,835 INFO L374 stractBuchiCegarLoop]: Abstraction has 31 states and 40 transitions. [2022-07-13 03:11:16,835 INFO L287 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-07-13 03:11:16,835 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 31 states and 40 transitions. [2022-07-13 03:11:16,835 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 11 [2022-07-13 03:11:16,835 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-13 03:11:16,836 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-13 03:11:16,836 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 3, 2, 1, 1] [2022-07-13 03:11:16,836 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 2, 1, 1] [2022-07-13 03:11:16,836 INFO L752 eck$LassoCheckResult]: Stem: 678#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 679#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 680#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 673#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 699#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 669#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 670#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 674#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 675#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 681#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 676#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 677#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 697#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 691#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 690#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 689#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 687#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 685#L12-1 [2022-07-13 03:11:16,836 INFO L754 eck$LassoCheckResult]: Loop: 685#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 686#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 695#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 693#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 694#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 692#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 685#L12-1 [2022-07-13 03:11:16,837 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:16,837 INFO L85 PathProgramCache]: Analyzing trace with hash 1031341869, now seen corresponding path program 5 times [2022-07-13 03:11:16,837 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:16,837 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1111392901] [2022-07-13 03:11:16,837 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:16,837 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:16,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:16,863 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-13 03:11:16,863 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-13 03:11:16,863 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1111392901] [2022-07-13 03:11:16,863 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1111392901] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-13 03:11:16,863 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1476513827] [2022-07-13 03:11:16,863 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-07-13 03:11:16,864 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-13 03:11:16,864 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:16,865 INFO L229 MonitoredProcess]: Starting monitored process 27 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-13 03:11:16,866 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2022-07-13 03:11:16,886 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2022-07-13 03:11:16,886 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-07-13 03:11:16,887 INFO L263 TraceCheckSpWp]: Trace formula consists of 41 conjuncts, 6 conjunts are in the unsatisfiable core [2022-07-13 03:11:16,888 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:16,930 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-13 03:11:16,930 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-13 03:11:16,964 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-13 03:11:16,964 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1476513827] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-13 03:11:16,964 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-13 03:11:16,964 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 13 [2022-07-13 03:11:16,964 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [633051259] [2022-07-13 03:11:16,964 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-13 03:11:16,964 INFO L757 eck$LassoCheckResult]: stem already infeasible [2022-07-13 03:11:16,965 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:16,965 INFO L85 PathProgramCache]: Analyzing trace with hash 1215871107, now seen corresponding path program 1 times [2022-07-13 03:11:16,965 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:16,965 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1909702679] [2022-07-13 03:11:16,965 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:16,965 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:16,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:16,968 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 03:11:16,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:16,970 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 03:11:17,006 INFO L210 LassoAnalysis]: Preferences: [2022-07-13 03:11:17,006 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-07-13 03:11:17,007 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-07-13 03:11:17,007 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-07-13 03:11:17,007 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2022-07-13 03:11:17,007 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:17,007 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-07-13 03:11:17,007 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-07-13 03:11:17,007 INFO L133 ssoRankerPreferences]: Filename of dumped script: NarrowKonv.c_Iteration6_Loop [2022-07-13 03:11:17,007 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-07-13 03:11:17,007 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-07-13 03:11:17,008 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-13 03:11:17,016 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-13 03:11:17,018 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-13 03:11:17,060 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-07-13 03:11:17,060 INFO L404 LassoAnalysis]: Checking for nontermination... [2022-07-13 03:11:17,060 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:17,060 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:17,061 INFO L229 MonitoredProcess]: Starting monitored process 28 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:17,062 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Waiting until timeout for monitored process [2022-07-13 03:11:17,063 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2022-07-13 03:11:17,063 INFO L160 nArgumentSynthesizer]: Using integer mode. [2022-07-13 03:11:17,100 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Forceful destruction successful, exit code 0 [2022-07-13 03:11:17,100 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:17,100 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:17,101 INFO L229 MonitoredProcess]: Starting monitored process 29 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:17,103 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Waiting until timeout for monitored process [2022-07-13 03:11:17,103 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2022-07-13 03:11:17,103 INFO L160 nArgumentSynthesizer]: Using integer mode. [2022-07-13 03:11:17,173 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2022-07-13 03:11:17,178 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Forceful destruction successful, exit code 0 [2022-07-13 03:11:17,178 INFO L210 LassoAnalysis]: Preferences: [2022-07-13 03:11:17,178 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-07-13 03:11:17,178 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-07-13 03:11:17,179 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-07-13 03:11:17,179 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-07-13 03:11:17,179 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:17,179 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-07-13 03:11:17,179 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-07-13 03:11:17,179 INFO L133 ssoRankerPreferences]: Filename of dumped script: NarrowKonv.c_Iteration6_Loop [2022-07-13 03:11:17,179 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-07-13 03:11:17,179 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-07-13 03:11:17,180 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-13 03:11:17,193 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-13 03:11:17,195 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-13 03:11:17,236 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-07-13 03:11:17,236 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-07-13 03:11:17,236 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:17,236 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:17,237 INFO L229 MonitoredProcess]: Starting monitored process 30 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:17,238 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Waiting until timeout for monitored process [2022-07-13 03:11:17,239 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-07-13 03:11:17,244 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-07-13 03:11:17,245 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-07-13 03:11:17,245 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-07-13 03:11:17,245 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-07-13 03:11:17,245 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-07-13 03:11:17,246 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-07-13 03:11:17,246 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-07-13 03:11:17,247 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-07-13 03:11:17,252 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2022-07-13 03:11:17,252 INFO L444 ModelExtractionUtils]: 1 out of 4 variables were initially zero. Simplification set additionally 1 variables to zero. [2022-07-13 03:11:17,253 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:17,253 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:17,254 INFO L229 MonitoredProcess]: Starting monitored process 31 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:17,255 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Waiting until timeout for monitored process [2022-07-13 03:11:17,255 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-07-13 03:11:17,255 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2022-07-13 03:11:17,256 INFO L513 LassoAnalysis]: Proved termination. [2022-07-13 03:11:17,256 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0#1) = 1*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2022-07-13 03:11:17,272 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Forceful destruction successful, exit code 0 [2022-07-13 03:11:17,273 INFO L293 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2022-07-13 03:11:17,281 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:17,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:17,297 INFO L263 TraceCheckSpWp]: Trace formula consists of 41 conjuncts, 2 conjunts are in the unsatisfiable core [2022-07-13 03:11:17,298 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:17,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:17,319 INFO L263 TraceCheckSpWp]: Trace formula consists of 17 conjuncts, 8 conjunts are in the unsatisfiable core [2022-07-13 03:11:17,320 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:17,346 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-13 03:11:17,346 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 3 loop predicates [2022-07-13 03:11:17,346 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 31 states and 40 transitions. cyclomatic complexity: 12 Second operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 5 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:17,361 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 31 states and 40 transitions. cyclomatic complexity: 12. Second operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 5 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 57 states and 67 transitions. Complement of second has 7 states. [2022-07-13 03:11:17,362 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2022-07-13 03:11:17,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 5 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:17,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 11 transitions. [2022-07-13 03:11:17,362 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 11 transitions. Stem has 17 letters. Loop has 6 letters. [2022-07-13 03:11:17,362 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-07-13 03:11:17,363 INFO L577 RefineBuchi]: Bad chosen interpolant automaton: word not accepted [2022-07-13 03:11:17,370 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:17,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:17,379 INFO L263 TraceCheckSpWp]: Trace formula consists of 41 conjuncts, 2 conjunts are in the unsatisfiable core [2022-07-13 03:11:17,380 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:17,416 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Ended with exit code 0 [2022-07-13 03:11:17,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:17,433 INFO L263 TraceCheckSpWp]: Trace formula consists of 17 conjuncts, 8 conjunts are in the unsatisfiable core [2022-07-13 03:11:17,433 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:17,465 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-13 03:11:17,466 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and with honda bouncer for loop.1 stem predicates 3 loop predicates [2022-07-13 03:11:17,466 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 31 states and 40 transitions. cyclomatic complexity: 12 Second operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 5 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:17,489 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 31 states and 40 transitions. cyclomatic complexity: 12. Second operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 5 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 59 states and 70 transitions. Complement of second has 9 states. [2022-07-13 03:11:17,489 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 3 non-accepting loop states 1 accepting loop states [2022-07-13 03:11:17,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 5 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:17,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 12 transitions. [2022-07-13 03:11:17,490 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 12 transitions. Stem has 17 letters. Loop has 6 letters. [2022-07-13 03:11:17,490 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-07-13 03:11:17,490 INFO L577 RefineBuchi]: Bad chosen interpolant automaton: word not accepted [2022-07-13 03:11:17,496 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:17,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:17,503 INFO L263 TraceCheckSpWp]: Trace formula consists of 41 conjuncts, 2 conjunts are in the unsatisfiable core [2022-07-13 03:11:17,503 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:17,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:17,519 INFO L263 TraceCheckSpWp]: Trace formula consists of 17 conjuncts, 8 conjunts are in the unsatisfiable core [2022-07-13 03:11:17,519 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:17,545 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-13 03:11:17,545 INFO L152 lantAutomatonBouncer]: Defining Buchi interpolant automaton with scrooge nondeterminism in stemwith honda bouncer for stem and without honda bouncer for loop.1 stem predicates 3 loop predicates [2022-07-13 03:11:17,545 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 31 states and 40 transitions. cyclomatic complexity: 12 Second operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 5 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:17,560 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 31 states and 40 transitions. cyclomatic complexity: 12. Second operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 5 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 73 states and 94 transitions. Complement of second has 6 states. [2022-07-13 03:11:17,561 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2022-07-13 03:11:17,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 5 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:17,561 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 16 transitions. [2022-07-13 03:11:17,561 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 16 transitions. Stem has 17 letters. Loop has 6 letters. [2022-07-13 03:11:17,561 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-07-13 03:11:17,561 INFO L577 RefineBuchi]: Bad chosen interpolant automaton: word not accepted [2022-07-13 03:11:17,570 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:17,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:17,577 INFO L263 TraceCheckSpWp]: Trace formula consists of 41 conjuncts, 2 conjunts are in the unsatisfiable core [2022-07-13 03:11:17,578 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:17,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:17,597 INFO L263 TraceCheckSpWp]: Trace formula consists of 17 conjuncts, 8 conjunts are in the unsatisfiable core [2022-07-13 03:11:17,597 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:17,624 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-13 03:11:17,625 INFO L152 lantAutomatonBouncer]: Defining Buchi interpolant automaton with scrooge nondeterminism in stemwith honda bouncer for stem and with honda bouncer for loop.1 stem predicates 3 loop predicates [2022-07-13 03:11:17,625 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 31 states and 40 transitions. cyclomatic complexity: 12 Second operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 5 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:17,658 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 31 states and 40 transitions. cyclomatic complexity: 12. Second operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 5 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 75 states and 94 transitions. Complement of second has 10 states. [2022-07-13 03:11:17,658 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 6 states 1 stem states 4 non-accepting loop states 1 accepting loop states [2022-07-13 03:11:17,658 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 5 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:17,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 20 transitions. [2022-07-13 03:11:17,658 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 6 states and 20 transitions. Stem has 17 letters. Loop has 6 letters. [2022-07-13 03:11:17,659 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-07-13 03:11:17,659 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 6 states and 20 transitions. Stem has 23 letters. Loop has 6 letters. [2022-07-13 03:11:17,659 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-07-13 03:11:17,659 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 6 states and 20 transitions. Stem has 17 letters. Loop has 12 letters. [2022-07-13 03:11:17,659 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-07-13 03:11:17,659 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 75 states and 94 transitions. [2022-07-13 03:11:17,660 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 21 [2022-07-13 03:11:17,661 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 75 states to 53 states and 69 transitions. [2022-07-13 03:11:17,661 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2022-07-13 03:11:17,661 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 21 [2022-07-13 03:11:17,661 INFO L73 IsDeterministic]: Start isDeterministic. Operand 53 states and 69 transitions. [2022-07-13 03:11:17,661 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-07-13 03:11:17,661 INFO L369 hiAutomatonCegarLoop]: Abstraction has 53 states and 69 transitions. [2022-07-13 03:11:17,661 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states and 69 transitions. [2022-07-13 03:11:17,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 41. [2022-07-13 03:11:17,663 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 41 states have (on average 1.3170731707317074) internal successors, (54), 40 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:17,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 54 transitions. [2022-07-13 03:11:17,663 INFO L392 hiAutomatonCegarLoop]: Abstraction has 41 states and 54 transitions. [2022-07-13 03:11:17,663 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-13 03:11:17,663 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-07-13 03:11:17,663 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=96, Unknown=0, NotChecked=0, Total=156 [2022-07-13 03:11:17,663 INFO L87 Difference]: Start difference. First operand 41 states and 54 transitions. Second operand has 13 states, 13 states have (on average 3.076923076923077) internal successors, (40), 13 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:17,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-13 03:11:17,722 INFO L93 Difference]: Finished difference Result 77 states and 90 transitions. [2022-07-13 03:11:17,723 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-07-13 03:11:17,723 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 77 states and 90 transitions. [2022-07-13 03:11:17,724 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 15 [2022-07-13 03:11:17,724 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 77 states to 61 states and 74 transitions. [2022-07-13 03:11:17,725 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2022-07-13 03:11:17,725 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2022-07-13 03:11:17,725 INFO L73 IsDeterministic]: Start isDeterministic. Operand 61 states and 74 transitions. [2022-07-13 03:11:17,725 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-07-13 03:11:17,725 INFO L369 hiAutomatonCegarLoop]: Abstraction has 61 states and 74 transitions. [2022-07-13 03:11:17,725 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states and 74 transitions. [2022-07-13 03:11:17,726 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 58. [2022-07-13 03:11:17,727 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 58 states, 58 states have (on average 1.2241379310344827) internal successors, (71), 57 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:17,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 71 transitions. [2022-07-13 03:11:17,727 INFO L392 hiAutomatonCegarLoop]: Abstraction has 58 states and 71 transitions. [2022-07-13 03:11:17,727 INFO L374 stractBuchiCegarLoop]: Abstraction has 58 states and 71 transitions. [2022-07-13 03:11:17,727 INFO L287 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2022-07-13 03:11:17,727 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 58 states and 71 transitions. [2022-07-13 03:11:17,728 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 15 [2022-07-13 03:11:17,728 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-13 03:11:17,728 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-13 03:11:17,728 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [12, 11, 9, 2, 1, 1] [2022-07-13 03:11:17,728 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 2, 1] [2022-07-13 03:11:17,728 INFO L752 eck$LassoCheckResult]: Stem: 1535#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 1536#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 1540#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 1544#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 1545#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 1560#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 1557#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 1555#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 1532#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 1533#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 1588#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 1587#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 1586#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 1585#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 1584#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 1583#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 1582#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 1581#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 1580#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 1579#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 1578#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 1551#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 1576#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 1550#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 1552#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 1574#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 1573#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 1572#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 1571#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 1570#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 1569#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 1567#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 1566#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 1565#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 1556#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 1553#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 1554#L12 [2022-07-13 03:11:17,729 INFO L754 eck$LassoCheckResult]: Loop: 1554#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 1562#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 1559#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 1561#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 1558#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 1547#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 1548#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 1556#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 1553#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 1554#L12 [2022-07-13 03:11:17,729 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:17,729 INFO L85 PathProgramCache]: Analyzing trace with hash -566648130, now seen corresponding path program 6 times [2022-07-13 03:11:17,729 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:17,729 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [577242642] [2022-07-13 03:11:17,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:17,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:17,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:17,787 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 80 proven. 84 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-07-13 03:11:17,787 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-13 03:11:17,787 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [577242642] [2022-07-13 03:11:17,787 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [577242642] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-13 03:11:17,787 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [282431360] [2022-07-13 03:11:17,787 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-07-13 03:11:17,787 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-13 03:11:17,788 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:17,796 INFO L229 MonitoredProcess]: Starting monitored process 32 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-13 03:11:17,797 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Waiting until timeout for monitored process [2022-07-13 03:11:17,820 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 12 check-sat command(s) [2022-07-13 03:11:17,820 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-07-13 03:11:17,821 INFO L263 TraceCheckSpWp]: Trace formula consists of 79 conjuncts, 10 conjunts are in the unsatisfiable core [2022-07-13 03:11:17,821 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:17,929 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 80 proven. 84 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-07-13 03:11:17,929 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-13 03:11:18,043 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 80 proven. 84 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-07-13 03:11:18,043 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [282431360] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-13 03:11:18,043 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-13 03:11:18,043 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 25 [2022-07-13 03:11:18,043 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1179014730] [2022-07-13 03:11:18,043 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-13 03:11:18,044 INFO L757 eck$LassoCheckResult]: stem already infeasible [2022-07-13 03:11:18,044 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:18,044 INFO L85 PathProgramCache]: Analyzing trace with hash 1423235079, now seen corresponding path program 2 times [2022-07-13 03:11:18,044 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:18,044 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1214536796] [2022-07-13 03:11:18,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:18,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:18,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:18,048 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 03:11:18,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:18,055 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 03:11:18,106 INFO L210 LassoAnalysis]: Preferences: [2022-07-13 03:11:18,106 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-07-13 03:11:18,106 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-07-13 03:11:18,106 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-07-13 03:11:18,106 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2022-07-13 03:11:18,106 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:18,106 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-07-13 03:11:18,106 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-07-13 03:11:18,106 INFO L133 ssoRankerPreferences]: Filename of dumped script: NarrowKonv.c_Iteration7_Loop [2022-07-13 03:11:18,106 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-07-13 03:11:18,107 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-07-13 03:11:18,107 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-13 03:11:18,112 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-13 03:11:18,114 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-13 03:11:18,155 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-07-13 03:11:18,155 INFO L404 LassoAnalysis]: Checking for nontermination... [2022-07-13 03:11:18,155 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:18,155 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:18,156 INFO L229 MonitoredProcess]: Starting monitored process 33 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:18,157 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Waiting until timeout for monitored process [2022-07-13 03:11:18,158 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2022-07-13 03:11:18,158 INFO L160 nArgumentSynthesizer]: Using integer mode. [2022-07-13 03:11:18,208 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Forceful destruction successful, exit code 0 [2022-07-13 03:11:18,208 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:18,209 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:18,209 INFO L229 MonitoredProcess]: Starting monitored process 34 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:18,210 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Waiting until timeout for monitored process [2022-07-13 03:11:18,211 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2022-07-13 03:11:18,211 INFO L160 nArgumentSynthesizer]: Using integer mode. [2022-07-13 03:11:18,312 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2022-07-13 03:11:18,318 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Forceful destruction successful, exit code 0 [2022-07-13 03:11:18,318 INFO L210 LassoAnalysis]: Preferences: [2022-07-13 03:11:18,318 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-07-13 03:11:18,318 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-07-13 03:11:18,318 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-07-13 03:11:18,318 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-07-13 03:11:18,318 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:18,318 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-07-13 03:11:18,318 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-07-13 03:11:18,318 INFO L133 ssoRankerPreferences]: Filename of dumped script: NarrowKonv.c_Iteration7_Loop [2022-07-13 03:11:18,318 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-07-13 03:11:18,318 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-07-13 03:11:18,319 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-13 03:11:18,326 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-13 03:11:18,328 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-13 03:11:18,376 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-07-13 03:11:18,376 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-07-13 03:11:18,376 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:18,376 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:18,377 INFO L229 MonitoredProcess]: Starting monitored process 35 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:18,378 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Waiting until timeout for monitored process [2022-07-13 03:11:18,379 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-07-13 03:11:18,384 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-07-13 03:11:18,384 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-07-13 03:11:18,385 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-07-13 03:11:18,385 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-07-13 03:11:18,385 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-07-13 03:11:18,386 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-07-13 03:11:18,386 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-07-13 03:11:18,399 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-07-13 03:11:18,401 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2022-07-13 03:11:18,401 INFO L444 ModelExtractionUtils]: 1 out of 4 variables were initially zero. Simplification set additionally 1 variables to zero. [2022-07-13 03:11:18,401 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 03:11:18,401 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:18,403 INFO L229 MonitoredProcess]: Starting monitored process 36 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 03:11:18,416 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-07-13 03:11:18,416 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2022-07-13 03:11:18,417 INFO L513 LassoAnalysis]: Proved termination. [2022-07-13 03:11:18,417 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~range~0#1) = 1*ULTIMATE.start_main_~range~0#1 Supporting invariants [] [2022-07-13 03:11:18,431 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Waiting until timeout for monitored process [2022-07-13 03:11:18,432 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Forceful destruction successful, exit code 0 [2022-07-13 03:11:18,432 INFO L293 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2022-07-13 03:11:18,440 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:18,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:18,455 INFO L263 TraceCheckSpWp]: Trace formula consists of 79 conjuncts, 2 conjunts are in the unsatisfiable core [2022-07-13 03:11:18,455 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:18,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:18,488 INFO L263 TraceCheckSpWp]: Trace formula consists of 23 conjuncts, 7 conjunts are in the unsatisfiable core [2022-07-13 03:11:18,488 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:18,526 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-13 03:11:18,526 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 4 loop predicates [2022-07-13 03:11:18,527 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 58 states and 71 transitions. cyclomatic complexity: 17 Second operand has 6 states, 6 states have (on average 2.6666666666666665) internal successors, (16), 6 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:18,544 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 58 states and 71 transitions. cyclomatic complexity: 17. Second operand has 6 states, 6 states have (on average 2.6666666666666665) internal successors, (16), 6 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 120 states and 152 transitions. Complement of second has 6 states. [2022-07-13 03:11:18,545 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2022-07-13 03:11:18,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.6666666666666665) internal successors, (16), 6 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:18,545 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 11 transitions. [2022-07-13 03:11:18,545 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 11 transitions. Stem has 36 letters. Loop has 9 letters. [2022-07-13 03:11:18,545 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-07-13 03:11:18,545 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 11 transitions. Stem has 45 letters. Loop has 9 letters. [2022-07-13 03:11:18,546 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-07-13 03:11:18,546 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 11 transitions. Stem has 36 letters. Loop has 18 letters. [2022-07-13 03:11:18,546 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-07-13 03:11:18,546 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 120 states and 152 transitions. [2022-07-13 03:11:18,547 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-07-13 03:11:18,547 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 120 states to 82 states and 105 transitions. [2022-07-13 03:11:18,548 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2022-07-13 03:11:18,548 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2022-07-13 03:11:18,548 INFO L73 IsDeterministic]: Start isDeterministic. Operand 82 states and 105 transitions. [2022-07-13 03:11:18,548 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-07-13 03:11:18,548 INFO L369 hiAutomatonCegarLoop]: Abstraction has 82 states and 105 transitions. [2022-07-13 03:11:18,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states and 105 transitions. [2022-07-13 03:11:18,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 66. [2022-07-13 03:11:18,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 66 states, 66 states have (on average 1.2727272727272727) internal successors, (84), 65 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:18,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 84 transitions. [2022-07-13 03:11:18,550 INFO L392 hiAutomatonCegarLoop]: Abstraction has 66 states and 84 transitions. [2022-07-13 03:11:18,550 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-13 03:11:18,551 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-07-13 03:11:18,551 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=244, Invalid=356, Unknown=0, NotChecked=0, Total=600 [2022-07-13 03:11:18,551 INFO L87 Difference]: Start difference. First operand 66 states and 84 transitions. Second operand has 25 states, 25 states have (on average 3.04) internal successors, (76), 25 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:18,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-13 03:11:18,690 INFO L93 Difference]: Finished difference Result 154 states and 172 transitions. [2022-07-13 03:11:18,690 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2022-07-13 03:11:18,690 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 154 states and 172 transitions. [2022-07-13 03:11:18,692 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-07-13 03:11:18,692 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 154 states to 118 states and 136 transitions. [2022-07-13 03:11:18,692 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2022-07-13 03:11:18,693 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2022-07-13 03:11:18,693 INFO L73 IsDeterministic]: Start isDeterministic. Operand 118 states and 136 transitions. [2022-07-13 03:11:18,693 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-07-13 03:11:18,693 INFO L369 hiAutomatonCegarLoop]: Abstraction has 118 states and 136 transitions. [2022-07-13 03:11:18,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118 states and 136 transitions. [2022-07-13 03:11:18,696 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118 to 114. [2022-07-13 03:11:18,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 114 states, 114 states have (on average 1.1578947368421053) internal successors, (132), 113 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:18,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 132 transitions. [2022-07-13 03:11:18,697 INFO L392 hiAutomatonCegarLoop]: Abstraction has 114 states and 132 transitions. [2022-07-13 03:11:18,697 INFO L374 stractBuchiCegarLoop]: Abstraction has 114 states and 132 transitions. [2022-07-13 03:11:18,697 INFO L287 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2022-07-13 03:11:18,697 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 114 states and 132 transitions. [2022-07-13 03:11:18,698 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-07-13 03:11:18,698 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-13 03:11:18,698 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-13 03:11:18,699 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [24, 23, 21, 2, 1, 1] [2022-07-13 03:11:18,699 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-07-13 03:11:18,699 INFO L752 eck$LassoCheckResult]: Stem: 2340#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 2341#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 2342#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2343#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2344#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 2448#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2345#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2339#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2337#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2338#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2447#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2446#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2445#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2444#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2443#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2442#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2441#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2440#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2439#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2438#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2437#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2436#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2435#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2434#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2433#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2432#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2431#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2430#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2429#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2428#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2427#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2426#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2425#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2424#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2423#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2422#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2421#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2420#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2419#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2418#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2417#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2416#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2415#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2414#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2413#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2396#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2397#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2395#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2394#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2393#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 2392#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2390#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2391#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2412#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2411#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2410#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2409#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2408#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2407#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2406#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2405#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2404#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2403#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2402#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2401#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2400#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2399#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2398#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2372#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2359#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2356#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2354#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2336#L12 [2022-07-13 03:11:18,699 INFO L754 eck$LassoCheckResult]: Loop: 2336#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2335#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2336#L12 [2022-07-13 03:11:18,699 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:18,700 INFO L85 PathProgramCache]: Analyzing trace with hash 1262893886, now seen corresponding path program 7 times [2022-07-13 03:11:18,700 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:18,700 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1565810440] [2022-07-13 03:11:18,700 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:18,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:18,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:18,922 INFO L134 CoverageAnalysis]: Checked inductivity of 782 backedges. 352 proven. 360 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2022-07-13 03:11:18,922 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-13 03:11:18,922 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1565810440] [2022-07-13 03:11:18,922 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1565810440] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-13 03:11:18,922 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1055752619] [2022-07-13 03:11:18,922 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-07-13 03:11:18,922 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-13 03:11:18,922 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:18,926 INFO L229 MonitoredProcess]: Starting monitored process 37 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-13 03:11:18,933 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (37)] Waiting until timeout for monitored process [2022-07-13 03:11:18,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:18,961 INFO L263 TraceCheckSpWp]: Trace formula consists of 151 conjuncts, 18 conjunts are in the unsatisfiable core [2022-07-13 03:11:18,962 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:19,195 INFO L134 CoverageAnalysis]: Checked inductivity of 782 backedges. 352 proven. 360 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2022-07-13 03:11:19,196 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-13 03:11:19,200 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Forceful destruction successful, exit code 0 [2022-07-13 03:11:19,326 INFO L134 CoverageAnalysis]: Checked inductivity of 782 backedges. 352 proven. 360 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2022-07-13 03:11:19,326 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1055752619] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-13 03:11:19,326 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-13 03:11:19,326 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18] total 38 [2022-07-13 03:11:19,327 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [659093565] [2022-07-13 03:11:19,327 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-13 03:11:19,327 INFO L757 eck$LassoCheckResult]: stem already infeasible [2022-07-13 03:11:19,327 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:19,327 INFO L85 PathProgramCache]: Analyzing trace with hash 1654, now seen corresponding path program 3 times [2022-07-13 03:11:19,328 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:19,328 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1816178283] [2022-07-13 03:11:19,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:19,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:19,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:19,333 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 03:11:19,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:19,335 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 03:11:19,347 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-13 03:11:19,347 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2022-07-13 03:11:19,348 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=545, Invalid=861, Unknown=0, NotChecked=0, Total=1406 [2022-07-13 03:11:19,348 INFO L87 Difference]: Start difference. First operand 114 states and 132 transitions. cyclomatic complexity: 24 Second operand has 38 states, 38 states have (on average 3.0526315789473686) internal successors, (116), 38 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:19,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-13 03:11:19,500 INFO L93 Difference]: Finished difference Result 231 states and 249 transitions. [2022-07-13 03:11:19,500 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2022-07-13 03:11:19,501 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 231 states and 249 transitions. [2022-07-13 03:11:19,502 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-07-13 03:11:19,503 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 231 states to 181 states and 199 transitions. [2022-07-13 03:11:19,503 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2022-07-13 03:11:19,503 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2022-07-13 03:11:19,504 INFO L73 IsDeterministic]: Start isDeterministic. Operand 181 states and 199 transitions. [2022-07-13 03:11:19,504 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-07-13 03:11:19,504 INFO L369 hiAutomatonCegarLoop]: Abstraction has 181 states and 199 transitions. [2022-07-13 03:11:19,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states and 199 transitions. [2022-07-13 03:11:19,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 177. [2022-07-13 03:11:19,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 177 states, 177 states have (on average 1.1016949152542372) internal successors, (195), 176 states have internal predecessors, (195), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:19,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 195 transitions. [2022-07-13 03:11:19,517 INFO L392 hiAutomatonCegarLoop]: Abstraction has 177 states and 195 transitions. [2022-07-13 03:11:19,518 INFO L374 stractBuchiCegarLoop]: Abstraction has 177 states and 195 transitions. [2022-07-13 03:11:19,518 INFO L287 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2022-07-13 03:11:19,518 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 177 states and 195 transitions. [2022-07-13 03:11:19,518 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-07-13 03:11:19,518 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-13 03:11:19,518 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-13 03:11:19,519 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [37, 36, 34, 2, 1, 1] [2022-07-13 03:11:19,519 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-07-13 03:11:19,520 INFO L752 eck$LassoCheckResult]: Stem: 3160#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 3161#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 3162#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3163#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3164#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 3294#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3293#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3292#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3291#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3290#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3289#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3288#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3287#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3286#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3285#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3284#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3283#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3282#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3281#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3280#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3279#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3278#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3277#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3276#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3275#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3274#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3273#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3272#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3271#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3270#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3269#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3268#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3267#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3266#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3265#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3264#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3263#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3262#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3261#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3260#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3259#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3258#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3257#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3256#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3255#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3254#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3253#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3252#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3251#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3250#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3249#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3248#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3247#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3246#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3245#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3244#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3243#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3242#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3241#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3240#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3237#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3238#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3236#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3235#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3234#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 3233#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3232#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3231#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3230#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3229#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3228#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3227#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3226#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3225#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3224#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3223#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3222#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3221#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3220#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3219#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3218#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3217#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3216#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3215#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3214#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3213#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3212#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3211#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3210#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3209#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3208#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3207#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3206#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3205#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3204#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3203#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3202#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3201#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3200#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3199#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3198#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3197#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3196#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3195#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3194#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3193#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3192#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3180#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3177#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3174#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3171#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3156#L12 [2022-07-13 03:11:19,520 INFO L754 eck$LassoCheckResult]: Loop: 3156#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3155#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3156#L12 [2022-07-13 03:11:19,520 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:19,520 INFO L85 PathProgramCache]: Analyzing trace with hash -1287581916, now seen corresponding path program 8 times [2022-07-13 03:11:19,520 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:19,520 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1970942924] [2022-07-13 03:11:19,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:19,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:19,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:19,548 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 03:11:19,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:19,588 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 03:11:19,588 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:19,588 INFO L85 PathProgramCache]: Analyzing trace with hash 1654, now seen corresponding path program 4 times [2022-07-13 03:11:19,588 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:19,588 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [528515788] [2022-07-13 03:11:19,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:19,588 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:19,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:19,590 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 03:11:19,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:19,591 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 03:11:19,591 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:19,592 INFO L85 PathProgramCache]: Analyzing trace with hash -415639335, now seen corresponding path program 1 times [2022-07-13 03:11:19,592 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:19,592 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1341158545] [2022-07-13 03:11:19,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:19,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:19,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:19,652 INFO L134 CoverageAnalysis]: Checked inductivity of 1999 backedges. 179 proven. 0 refuted. 0 times theorem prover too weak. 1820 trivial. 0 not checked. [2022-07-13 03:11:19,652 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-13 03:11:19,653 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1341158545] [2022-07-13 03:11:19,653 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1341158545] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-13 03:11:19,653 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-13 03:11:19,653 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-07-13 03:11:19,653 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [616152230] [2022-07-13 03:11:19,653 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-13 03:11:19,662 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-13 03:11:19,662 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-07-13 03:11:19,662 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-07-13 03:11:19,662 INFO L87 Difference]: Start difference. First operand 177 states and 195 transitions. cyclomatic complexity: 24 Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:19,671 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-13 03:11:19,671 INFO L93 Difference]: Finished difference Result 184 states and 199 transitions. [2022-07-13 03:11:19,671 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-07-13 03:11:19,672 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 184 states and 199 transitions. [2022-07-13 03:11:19,673 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-07-13 03:11:19,673 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 184 states to 135 states and 146 transitions. [2022-07-13 03:11:19,673 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2022-07-13 03:11:19,673 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2022-07-13 03:11:19,673 INFO L73 IsDeterministic]: Start isDeterministic. Operand 135 states and 146 transitions. [2022-07-13 03:11:19,673 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-07-13 03:11:19,674 INFO L369 hiAutomatonCegarLoop]: Abstraction has 135 states and 146 transitions. [2022-07-13 03:11:19,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states and 146 transitions. [2022-07-13 03:11:19,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 127. [2022-07-13 03:11:19,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 127 states, 127 states have (on average 1.078740157480315) internal successors, (137), 126 states have internal predecessors, (137), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:19,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 137 transitions. [2022-07-13 03:11:19,683 INFO L392 hiAutomatonCegarLoop]: Abstraction has 127 states and 137 transitions. [2022-07-13 03:11:19,683 INFO L374 stractBuchiCegarLoop]: Abstraction has 127 states and 137 transitions. [2022-07-13 03:11:19,683 INFO L287 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2022-07-13 03:11:19,683 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 127 states and 137 transitions. [2022-07-13 03:11:19,684 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-07-13 03:11:19,684 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-13 03:11:19,684 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-13 03:11:19,687 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [38, 37, 34, 3, 1, 1, 1] [2022-07-13 03:11:19,687 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-07-13 03:11:19,688 INFO L752 eck$LassoCheckResult]: Stem: 3530#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 3531#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 3525#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3527#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3532#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 3528#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3529#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3533#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3651#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3650#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3649#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3648#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3647#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3646#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3645#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3644#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3643#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3642#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3641#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3640#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3639#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3638#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3637#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3636#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3635#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3634#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3633#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3632#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3631#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3630#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3629#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3628#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3627#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3626#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3625#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3624#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3623#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3622#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3621#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3620#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3619#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3618#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3617#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3616#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3615#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3614#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3613#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3612#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3611#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3610#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3609#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3608#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3607#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3606#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3605#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3604#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3603#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3602#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3601#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3600#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3598#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3599#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3597#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3596#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3595#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 3594#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3593#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3592#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3591#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3590#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3589#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3588#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3587#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3586#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3585#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3584#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3583#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3582#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3581#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3580#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3579#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3578#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3577#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3576#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3575#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3574#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3573#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3572#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3571#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3570#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3569#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3568#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3567#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3566#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3565#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3564#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3563#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3562#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3561#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3560#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3559#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3558#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3557#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3556#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3555#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3554#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3552#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3553#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3547#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3544#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3545#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3542#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3538#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 3539#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3536#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3535#L12-1 [2022-07-13 03:11:19,688 INFO L754 eck$LassoCheckResult]: Loop: 3535#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3534#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3535#L12-1 [2022-07-13 03:11:19,689 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:19,689 INFO L85 PathProgramCache]: Analyzing trace with hash 2325394, now seen corresponding path program 2 times [2022-07-13 03:11:19,689 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:19,689 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1933741178] [2022-07-13 03:11:19,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:19,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:19,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:19,886 INFO L134 CoverageAnalysis]: Checked inductivity of 2072 backedges. 74 proven. 1428 refuted. 0 times theorem prover too weak. 570 trivial. 0 not checked. [2022-07-13 03:11:19,886 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-13 03:11:19,886 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1933741178] [2022-07-13 03:11:19,886 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1933741178] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-13 03:11:19,886 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1883751426] [2022-07-13 03:11:19,886 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-07-13 03:11:19,887 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-13 03:11:19,887 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:19,896 INFO L229 MonitoredProcess]: Starting monitored process 38 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-13 03:11:19,897 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (38)] Waiting until timeout for monitored process [2022-07-13 03:11:19,933 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-07-13 03:11:19,934 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-07-13 03:11:19,934 INFO L263 TraceCheckSpWp]: Trace formula consists of 242 conjuncts, 20 conjunts are in the unsatisfiable core [2022-07-13 03:11:19,936 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:20,239 INFO L134 CoverageAnalysis]: Checked inductivity of 2072 backedges. 74 proven. 1428 refuted. 0 times theorem prover too weak. 570 trivial. 0 not checked. [2022-07-13 03:11:20,239 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-13 03:11:20,414 INFO L134 CoverageAnalysis]: Checked inductivity of 2072 backedges. 74 proven. 1428 refuted. 0 times theorem prover too weak. 570 trivial. 0 not checked. [2022-07-13 03:11:20,414 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1883751426] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-13 03:11:20,414 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-13 03:11:20,414 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20] total 40 [2022-07-13 03:11:20,414 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1516434874] [2022-07-13 03:11:20,414 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-13 03:11:20,415 INFO L757 eck$LassoCheckResult]: stem already infeasible [2022-07-13 03:11:20,415 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:20,415 INFO L85 PathProgramCache]: Analyzing trace with hash 1324, now seen corresponding path program 5 times [2022-07-13 03:11:20,415 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:20,415 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1895715190] [2022-07-13 03:11:20,415 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:20,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:20,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:20,417 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 03:11:20,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:20,418 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 03:11:20,426 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-13 03:11:20,427 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2022-07-13 03:11:20,427 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=556, Invalid=1004, Unknown=0, NotChecked=0, Total=1560 [2022-07-13 03:11:20,427 INFO L87 Difference]: Start difference. First operand 127 states and 137 transitions. cyclomatic complexity: 15 Second operand has 40 states, 40 states have (on average 3.075) internal successors, (123), 40 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:21,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-13 03:11:21,102 INFO L93 Difference]: Finished difference Result 395 states and 407 transitions. [2022-07-13 03:11:21,102 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 76 states. [2022-07-13 03:11:21,102 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 395 states and 407 transitions. [2022-07-13 03:11:21,104 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-07-13 03:11:21,106 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 395 states to 249 states and 261 transitions. [2022-07-13 03:11:21,106 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2022-07-13 03:11:21,107 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2022-07-13 03:11:21,107 INFO L73 IsDeterministic]: Start isDeterministic. Operand 249 states and 261 transitions. [2022-07-13 03:11:21,107 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-07-13 03:11:21,107 INFO L369 hiAutomatonCegarLoop]: Abstraction has 249 states and 261 transitions. [2022-07-13 03:11:21,107 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 249 states and 261 transitions. [2022-07-13 03:11:21,109 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 249 to 241. [2022-07-13 03:11:21,109 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 241 states, 241 states have (on average 1.049792531120332) internal successors, (253), 240 states have internal predecessors, (253), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:21,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 241 states to 241 states and 253 transitions. [2022-07-13 03:11:21,110 INFO L392 hiAutomatonCegarLoop]: Abstraction has 241 states and 253 transitions. [2022-07-13 03:11:21,110 INFO L374 stractBuchiCegarLoop]: Abstraction has 241 states and 253 transitions. [2022-07-13 03:11:21,110 INFO L287 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2022-07-13 03:11:21,110 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 241 states and 253 transitions. [2022-07-13 03:11:21,111 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-07-13 03:11:21,111 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-13 03:11:21,111 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-13 03:11:21,116 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [76, 75, 70, 5, 1, 1, 1] [2022-07-13 03:11:21,116 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-07-13 03:11:21,117 INFO L752 eck$LassoCheckResult]: Stem: 4855#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 4856#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 4857#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4858#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4859#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 5090#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4860#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4854#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4852#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4853#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5089#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5088#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5087#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5086#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5085#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5084#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5083#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5082#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5081#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5080#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5079#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5078#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5077#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5076#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5075#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5074#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5073#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5072#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5071#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5070#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5069#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5068#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5067#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5066#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5065#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5064#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5063#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5062#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5061#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5060#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5059#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5058#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5057#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5056#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5055#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5054#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5053#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5052#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5051#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5050#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5049#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5048#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5047#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5046#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5045#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5044#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5043#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5042#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5041#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5040#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5038#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5039#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5037#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5036#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5035#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 5034#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5033#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5032#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5031#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5030#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5029#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5028#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5027#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5026#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5025#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5024#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5023#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5022#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5021#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5020#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5019#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5018#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5017#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5016#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5015#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5014#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5013#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5012#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5011#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5010#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5009#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5008#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5007#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5006#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5005#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5004#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5003#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5002#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5001#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5000#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4999#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4998#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4997#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4996#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4995#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4994#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4993#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4992#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4991#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4990#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4989#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4988#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4987#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4986#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4985#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4984#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4983#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4981#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4982#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4980#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4979#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4978#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 4977#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4976#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4975#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4974#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4973#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4972#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4971#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4970#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4969#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4968#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4967#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4966#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4965#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4964#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4963#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4962#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4961#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4960#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4959#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4958#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4957#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4956#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4955#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4954#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4953#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4952#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4951#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4950#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4949#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4948#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4947#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4946#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4945#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4944#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4943#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4942#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4941#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4940#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4939#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4938#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4937#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4936#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4935#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4934#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4933#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4932#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4931#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4930#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4929#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4927#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4928#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4926#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4925#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4924#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 4923#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4922#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4921#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4920#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4919#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4918#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4917#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4916#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4915#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4914#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4913#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4912#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4911#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4910#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4909#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4908#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4907#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4906#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4905#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4904#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4903#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4902#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4901#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4900#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4899#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4898#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4897#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4896#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4895#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4894#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4893#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4892#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4891#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4890#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4889#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4888#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4887#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4886#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4885#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4884#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4883#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4882#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4881#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4880#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4878#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4874#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4873#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4870#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 4871#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4868#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4863#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 4867#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4861#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4850#L12-1 [2022-07-13 03:11:21,117 INFO L754 eck$LassoCheckResult]: Loop: 4850#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 4851#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 4850#L12-1 [2022-07-13 03:11:21,117 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:21,117 INFO L85 PathProgramCache]: Analyzing trace with hash 1383057750, now seen corresponding path program 3 times [2022-07-13 03:11:21,117 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:21,117 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1507345654] [2022-07-13 03:11:21,118 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:21,118 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:21,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:21,218 INFO L134 CoverageAnalysis]: Checked inductivity of 8475 backedges. 0 proven. 6525 refuted. 0 times theorem prover too weak. 1950 trivial. 0 not checked. [2022-07-13 03:11:21,218 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-13 03:11:21,219 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1507345654] [2022-07-13 03:11:21,219 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1507345654] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-13 03:11:21,219 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1472809418] [2022-07-13 03:11:21,219 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-07-13 03:11:21,219 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-13 03:11:21,219 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:21,220 INFO L229 MonitoredProcess]: Starting monitored process 39 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-13 03:11:21,274 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2022-07-13 03:11:21,274 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-07-13 03:11:21,274 INFO L263 TraceCheckSpWp]: Trace formula consists of 47 conjuncts, 7 conjunts are in the unsatisfiable core [2022-07-13 03:11:21,276 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:21,277 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (39)] Waiting until timeout for monitored process [2022-07-13 03:11:21,309 INFO L134 CoverageAnalysis]: Checked inductivity of 8475 backedges. 730 proven. 5 refuted. 0 times theorem prover too weak. 7740 trivial. 0 not checked. [2022-07-13 03:11:21,310 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-13 03:11:21,331 INFO L134 CoverageAnalysis]: Checked inductivity of 8475 backedges. 730 proven. 5 refuted. 0 times theorem prover too weak. 7740 trivial. 0 not checked. [2022-07-13 03:11:21,331 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1472809418] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-13 03:11:21,331 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-13 03:11:21,331 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 5, 5] total 11 [2022-07-13 03:11:21,331 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [898663004] [2022-07-13 03:11:21,332 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-13 03:11:21,332 INFO L757 eck$LassoCheckResult]: stem already infeasible [2022-07-13 03:11:21,333 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:21,333 INFO L85 PathProgramCache]: Analyzing trace with hash 1324, now seen corresponding path program 6 times [2022-07-13 03:11:21,333 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:21,333 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [868781894] [2022-07-13 03:11:21,333 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:21,333 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:21,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:21,335 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 03:11:21,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:21,335 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 03:11:21,344 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-13 03:11:21,344 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-07-13 03:11:21,345 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=93, Unknown=0, NotChecked=0, Total=132 [2022-07-13 03:11:21,345 INFO L87 Difference]: Start difference. First operand 241 states and 253 transitions. cyclomatic complexity: 19 Second operand has 12 states, 11 states have (on average 3.5454545454545454) internal successors, (39), 12 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:21,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-13 03:11:21,532 INFO L93 Difference]: Finished difference Result 278 states and 297 transitions. [2022-07-13 03:11:21,532 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-07-13 03:11:21,533 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 278 states and 297 transitions. [2022-07-13 03:11:21,534 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-07-13 03:11:21,535 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 278 states to 273 states and 292 transitions. [2022-07-13 03:11:21,535 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2022-07-13 03:11:21,535 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2022-07-13 03:11:21,535 INFO L73 IsDeterministic]: Start isDeterministic. Operand 273 states and 292 transitions. [2022-07-13 03:11:21,535 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-07-13 03:11:21,535 INFO L369 hiAutomatonCegarLoop]: Abstraction has 273 states and 292 transitions. [2022-07-13 03:11:21,536 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 273 states and 292 transitions. [2022-07-13 03:11:21,537 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 273 to 257. [2022-07-13 03:11:21,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 257 states, 257 states have (on average 1.0583657587548638) internal successors, (272), 256 states have internal predecessors, (272), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:21,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 257 states to 257 states and 272 transitions. [2022-07-13 03:11:21,538 INFO L392 hiAutomatonCegarLoop]: Abstraction has 257 states and 272 transitions. [2022-07-13 03:11:21,538 INFO L374 stractBuchiCegarLoop]: Abstraction has 257 states and 272 transitions. [2022-07-13 03:11:21,538 INFO L287 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2022-07-13 03:11:21,539 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 257 states and 272 transitions. [2022-07-13 03:11:21,539 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-07-13 03:11:21,539 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-13 03:11:21,540 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-13 03:11:21,547 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [78, 77, 71, 6, 1, 1, 1] [2022-07-13 03:11:21,547 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-07-13 03:11:21,547 INFO L752 eck$LassoCheckResult]: Stem: 6796#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 6797#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 6790#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6792#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6798#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 7046#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6799#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6795#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6793#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6794#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7045#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7044#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7043#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7042#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7041#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7040#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7039#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7038#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7037#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7036#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7035#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7034#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7033#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7032#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7031#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7030#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7029#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7028#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7027#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7026#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7025#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7024#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7023#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7022#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7021#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7020#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7019#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7018#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7017#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7016#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7015#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7014#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7013#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7012#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7011#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7010#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7009#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7008#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7007#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7006#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7005#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7004#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7003#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7002#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7001#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7000#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6999#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6998#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6997#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6996#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6994#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6995#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6993#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6992#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6991#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 6990#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6989#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6988#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6987#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6986#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6985#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6984#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6983#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6982#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6981#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6980#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6979#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6978#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6977#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6976#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6975#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6974#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6973#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6972#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6971#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6970#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6969#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6968#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6967#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6966#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6965#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6964#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6963#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6962#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6961#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6960#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6959#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6958#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6957#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6956#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6955#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6954#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6953#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6952#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6951#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6950#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6949#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6948#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6947#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6946#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6945#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6944#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6943#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6942#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6941#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6940#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6939#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6937#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6938#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6936#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6935#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6934#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 6933#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6932#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6931#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6930#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6929#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6928#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6927#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6926#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6925#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6924#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6923#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6922#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6921#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6920#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6919#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6918#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6917#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6916#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6915#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6914#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6913#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6912#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6911#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6910#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6909#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6908#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6907#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6906#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6905#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6904#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6903#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6902#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6901#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6900#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6899#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6898#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6897#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6896#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6895#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6894#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6893#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6892#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6891#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6890#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6889#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6888#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6887#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6886#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6885#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6883#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6884#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6882#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6881#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6880#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 6879#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6878#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6877#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6876#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6875#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6874#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6873#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6872#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6871#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6870#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6869#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6868#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6867#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6866#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6865#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6864#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6863#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6862#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6861#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6860#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6859#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6858#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6857#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6856#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6855#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6854#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6853#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6852#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6851#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6850#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6849#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6848#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6847#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6846#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6845#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6844#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6843#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6842#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6841#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6840#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6839#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6838#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6837#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6836#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6835#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6834#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6832#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6833#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6831#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6830#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6824#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 6825#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6827#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6811#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 6812#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6808#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6804#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 6805#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6802#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6801#L12-1 [2022-07-13 03:11:21,547 INFO L754 eck$LassoCheckResult]: Loop: 6801#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 6800#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 6801#L12-1 [2022-07-13 03:11:21,548 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:21,548 INFO L85 PathProgramCache]: Analyzing trace with hash -2031563884, now seen corresponding path program 4 times [2022-07-13 03:11:21,548 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:21,548 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [68357627] [2022-07-13 03:11:21,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:21,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:21,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:21,636 INFO L134 CoverageAnalysis]: Checked inductivity of 8932 backedges. 154 proven. 6828 refuted. 0 times theorem prover too weak. 1950 trivial. 0 not checked. [2022-07-13 03:11:21,636 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-13 03:11:21,637 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [68357627] [2022-07-13 03:11:21,637 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [68357627] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-13 03:11:21,637 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2057482579] [2022-07-13 03:11:21,637 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-07-13 03:11:21,637 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-13 03:11:21,637 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:21,639 INFO L229 MonitoredProcess]: Starting monitored process 40 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-13 03:11:21,683 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (40)] Waiting until timeout for monitored process [2022-07-13 03:11:21,716 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-07-13 03:11:21,716 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-07-13 03:11:21,717 INFO L263 TraceCheckSpWp]: Trace formula consists of 489 conjuncts, 28 conjunts are in the unsatisfiable core [2022-07-13 03:11:21,719 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:22,106 INFO L134 CoverageAnalysis]: Checked inductivity of 8932 backedges. 914 proven. 6638 refuted. 0 times theorem prover too weak. 1380 trivial. 0 not checked. [2022-07-13 03:11:22,106 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-13 03:11:22,502 INFO L134 CoverageAnalysis]: Checked inductivity of 8932 backedges. 914 proven. 6638 refuted. 0 times theorem prover too weak. 1380 trivial. 0 not checked. [2022-07-13 03:11:22,503 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2057482579] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-13 03:11:22,503 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-13 03:11:22,503 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 28, 28] total 50 [2022-07-13 03:11:22,503 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [741678728] [2022-07-13 03:11:22,503 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-13 03:11:22,504 INFO L757 eck$LassoCheckResult]: stem already infeasible [2022-07-13 03:11:22,504 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:22,504 INFO L85 PathProgramCache]: Analyzing trace with hash 1324, now seen corresponding path program 7 times [2022-07-13 03:11:22,504 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:22,504 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1278723165] [2022-07-13 03:11:22,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:22,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:22,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:22,507 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 03:11:22,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:22,508 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 03:11:22,517 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-13 03:11:22,517 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2022-07-13 03:11:22,518 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=683, Invalid=1767, Unknown=0, NotChecked=0, Total=2450 [2022-07-13 03:11:22,518 INFO L87 Difference]: Start difference. First operand 257 states and 272 transitions. cyclomatic complexity: 23 Second operand has 50 states, 50 states have (on average 3.18) internal successors, (159), 50 states have internal predecessors, (159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:24,087 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-13 03:11:24,087 INFO L93 Difference]: Finished difference Result 1240 states and 1416 transitions. [2022-07-13 03:11:24,088 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 149 states. [2022-07-13 03:11:24,088 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1240 states and 1416 transitions. [2022-07-13 03:11:24,093 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-07-13 03:11:24,096 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1240 states to 987 states and 1104 transitions. [2022-07-13 03:11:24,096 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 25 [2022-07-13 03:11:24,096 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 25 [2022-07-13 03:11:24,096 INFO L73 IsDeterministic]: Start isDeterministic. Operand 987 states and 1104 transitions. [2022-07-13 03:11:24,096 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-07-13 03:11:24,096 INFO L369 hiAutomatonCegarLoop]: Abstraction has 987 states and 1104 transitions. [2022-07-13 03:11:24,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 987 states and 1104 transitions. [2022-07-13 03:11:24,102 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 987 to 691. [2022-07-13 03:11:24,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 691 states, 691 states have (on average 1.1128798842257597) internal successors, (769), 690 states have internal predecessors, (769), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:24,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 691 states to 691 states and 769 transitions. [2022-07-13 03:11:24,104 INFO L392 hiAutomatonCegarLoop]: Abstraction has 691 states and 769 transitions. [2022-07-13 03:11:24,104 INFO L374 stractBuchiCegarLoop]: Abstraction has 691 states and 769 transitions. [2022-07-13 03:11:24,104 INFO L287 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2022-07-13 03:11:24,104 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 691 states and 769 transitions. [2022-07-13 03:11:24,106 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-07-13 03:11:24,106 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-13 03:11:24,106 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-13 03:11:24,108 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [95, 94, 83, 11, 1, 1, 1] [2022-07-13 03:11:24,108 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-07-13 03:11:24,109 INFO L752 eck$LassoCheckResult]: Stem: 10166#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 10167#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 10162#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10164#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10169#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 10581#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10580#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10579#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10578#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10577#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10576#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10575#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10574#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10573#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10572#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10571#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10570#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10569#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10568#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10567#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10566#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10565#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10564#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10563#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10562#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10561#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10560#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10559#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10558#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10557#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10556#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10555#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10554#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10553#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10552#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10551#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10550#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10549#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10548#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10547#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10546#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10545#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10544#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10543#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10542#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10541#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10540#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10539#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10538#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10537#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10536#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10535#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10534#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10533#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10532#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10531#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10530#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10529#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10528#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10527#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10524#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10525#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10523#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10522#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10521#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 10520#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10519#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10518#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10517#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10516#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10515#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10514#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10513#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10512#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10511#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10510#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10509#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10508#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10507#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10506#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10505#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10504#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10503#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10502#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10501#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10500#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10499#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10498#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10497#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10496#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10495#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10494#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10493#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10492#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10491#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10490#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10489#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10488#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10487#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10486#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10485#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10484#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10483#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10482#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10481#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10480#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10479#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10478#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10477#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10476#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10475#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10474#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10473#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10472#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10471#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10470#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10469#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10468#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10467#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10465#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10464#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10463#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 10462#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10461#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10460#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10459#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10458#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10457#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10456#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10455#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10454#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10453#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10452#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10451#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10450#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10449#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10448#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10447#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10446#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10445#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10444#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10443#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10442#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10441#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10440#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10439#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10438#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10437#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10436#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10435#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10434#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10433#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10432#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10431#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10430#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10429#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10428#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10427#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10426#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10425#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10424#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10423#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10422#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10421#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10420#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10419#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10418#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10417#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10416#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10415#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10414#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10413#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10412#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10410#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10409#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10408#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 10407#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10406#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10405#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10404#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10403#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10402#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10401#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10400#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10399#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10398#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10397#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10396#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10395#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10394#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10393#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10392#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10391#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10390#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10388#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10386#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10384#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10382#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10380#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10378#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10376#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10374#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10372#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10370#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10368#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10366#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10364#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10362#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10360#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10358#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10356#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10354#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10332#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10333#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10350#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10348#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10346#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10326#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10324#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10325#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10320#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10321#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10282#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10336#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10313#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10312#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10311#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 10310#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10309#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10274#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10271#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10268#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10265#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10263#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10261#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10259#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10258#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10257#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10256#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10255#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10243#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10237#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 10236#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10235#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10234#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10232#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10233#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10242#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10231#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10225#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10223#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 10222#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10221#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10220#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10217#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10215#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10216#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10218#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10210#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10209#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 10208#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10207#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10205#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10202#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10203#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10206#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10204#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10198#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10197#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 10196#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10195#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10194#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10193#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10180#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10192#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10190#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10189#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10185#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 10186#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10182#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10178#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 10179#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10176#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10174#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 10175#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10172#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10171#L12-1 [2022-07-13 03:11:24,109 INFO L754 eck$LassoCheckResult]: Loop: 10171#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10170#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 10171#L12-1 [2022-07-13 03:11:24,109 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:24,109 INFO L85 PathProgramCache]: Analyzing trace with hash 2005033964, now seen corresponding path program 5 times [2022-07-13 03:11:24,109 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:24,110 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1365005075] [2022-07-13 03:11:24,110 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:24,110 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:24,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:24,299 INFO L134 CoverageAnalysis]: Checked inductivity of 13301 backedges. 5787 proven. 5686 refuted. 0 times theorem prover too weak. 1828 trivial. 0 not checked. [2022-07-13 03:11:24,299 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-13 03:11:24,299 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1365005075] [2022-07-13 03:11:24,299 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1365005075] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-13 03:11:24,299 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [96714251] [2022-07-13 03:11:24,300 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-07-13 03:11:24,300 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-13 03:11:24,300 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:24,301 INFO L229 MonitoredProcess]: Starting monitored process 41 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-13 03:11:24,302 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (41)] Waiting until timeout for monitored process [2022-07-13 03:11:24,404 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 73 check-sat command(s) [2022-07-13 03:11:24,404 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-07-13 03:11:24,405 INFO L263 TraceCheckSpWp]: Trace formula consists of 455 conjuncts, 25 conjunts are in the unsatisfiable core [2022-07-13 03:11:24,408 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:24,649 INFO L134 CoverageAnalysis]: Checked inductivity of 13301 backedges. 7724 proven. 317 refuted. 0 times theorem prover too weak. 5260 trivial. 0 not checked. [2022-07-13 03:11:24,649 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-13 03:11:24,810 INFO L134 CoverageAnalysis]: Checked inductivity of 13301 backedges. 7724 proven. 317 refuted. 0 times theorem prover too weak. 5260 trivial. 0 not checked. [2022-07-13 03:11:24,810 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [96714251] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-13 03:11:24,811 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-13 03:11:24,811 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 25, 25] total 44 [2022-07-13 03:11:24,811 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1569868619] [2022-07-13 03:11:24,811 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-13 03:11:24,811 INFO L757 eck$LassoCheckResult]: stem already infeasible [2022-07-13 03:11:24,811 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:24,811 INFO L85 PathProgramCache]: Analyzing trace with hash 1324, now seen corresponding path program 8 times [2022-07-13 03:11:24,811 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:24,811 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1954219584] [2022-07-13 03:11:24,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:24,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:24,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:24,814 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 03:11:24,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:24,815 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 03:11:24,825 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-13 03:11:24,825 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2022-07-13 03:11:24,825 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=511, Invalid=1381, Unknown=0, NotChecked=0, Total=1892 [2022-07-13 03:11:24,826 INFO L87 Difference]: Start difference. First operand 691 states and 769 transitions. cyclomatic complexity: 85 Second operand has 44 states, 44 states have (on average 3.25) internal successors, (143), 44 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:25,968 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-13 03:11:25,968 INFO L93 Difference]: Finished difference Result 1294 states and 1395 transitions. [2022-07-13 03:11:25,968 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2022-07-13 03:11:25,969 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1294 states and 1395 transitions. [2022-07-13 03:11:25,973 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-07-13 03:11:25,976 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1294 states to 1184 states and 1285 transitions. [2022-07-13 03:11:25,976 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 22 [2022-07-13 03:11:25,976 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 22 [2022-07-13 03:11:25,976 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1184 states and 1285 transitions. [2022-07-13 03:11:25,976 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-07-13 03:11:25,976 INFO L369 hiAutomatonCegarLoop]: Abstraction has 1184 states and 1285 transitions. [2022-07-13 03:11:25,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1184 states and 1285 transitions. [2022-07-13 03:11:25,982 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1184 to 526. [2022-07-13 03:11:25,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 526 states, 526 states have (on average 1.0874524714828897) internal successors, (572), 525 states have internal predecessors, (572), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:25,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 526 states to 526 states and 572 transitions. [2022-07-13 03:11:25,983 INFO L392 hiAutomatonCegarLoop]: Abstraction has 526 states and 572 transitions. [2022-07-13 03:11:25,983 INFO L374 stractBuchiCegarLoop]: Abstraction has 526 states and 572 transitions. [2022-07-13 03:11:25,983 INFO L287 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2022-07-13 03:11:25,983 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 526 states and 572 transitions. [2022-07-13 03:11:25,985 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-07-13 03:11:25,985 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-13 03:11:25,985 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-13 03:11:25,988 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [131, 130, 115, 15, 1, 1, 1] [2022-07-13 03:11:25,988 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-07-13 03:11:25,988 INFO L752 eck$LassoCheckResult]: Stem: 14080#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 14081#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 14076#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14078#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14083#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 14590#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14589#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14588#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14587#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14586#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14585#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14584#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14583#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14582#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14581#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14580#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14579#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14578#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14577#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14576#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14575#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14574#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14573#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14572#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14571#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14570#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14569#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14568#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14567#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14566#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14565#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14564#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14563#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14562#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14561#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14560#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14559#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14558#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14557#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14556#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14555#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14554#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14553#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14552#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14551#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14550#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14549#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14548#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14547#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14546#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14545#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14544#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14543#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14542#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14541#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14540#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14539#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14538#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14537#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14536#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14534#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14535#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14533#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14532#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14531#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 14530#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14529#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14528#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14527#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14526#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14525#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14524#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14523#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14522#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14521#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14520#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14519#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14518#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14517#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14516#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14515#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14514#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14513#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14512#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14511#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14510#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14509#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14508#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14507#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14506#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14505#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14504#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14503#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14502#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14501#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14500#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14499#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14498#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14497#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14496#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14495#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14494#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14493#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14492#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14491#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14490#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14489#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14488#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14487#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14486#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14485#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14484#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14483#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14482#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14481#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14480#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14479#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14477#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14478#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14476#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14475#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14474#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 14473#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14472#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14471#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14470#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14469#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14468#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14467#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14466#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14465#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14464#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14463#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14462#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14461#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14460#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14459#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14458#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14457#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14456#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14455#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14454#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14453#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14452#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14451#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14450#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14449#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14448#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14447#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14446#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14445#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14444#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14443#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14442#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14441#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14440#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14439#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14438#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14437#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14436#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14435#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14434#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14433#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14432#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14431#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14430#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14429#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14428#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14427#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14426#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14425#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14423#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14424#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14422#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14420#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14421#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 14416#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14417#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14412#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14413#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14408#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14409#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14404#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14405#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14400#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14401#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14396#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14397#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14392#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14393#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14388#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14389#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14384#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14385#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14380#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14381#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14376#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14377#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14372#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14373#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14368#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14369#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14364#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14365#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14600#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14361#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14360#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14358#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14359#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14354#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14355#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14597#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14350#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14349#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14348#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14347#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14346#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14345#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14343#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14344#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14599#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14339#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14279#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14338#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14337#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14331#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14418#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 14419#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14414#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14415#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14410#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14411#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14406#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14407#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14402#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14403#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14398#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14399#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14394#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14395#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14390#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14391#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14386#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14387#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14382#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14383#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14378#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14379#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14374#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14375#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14370#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14371#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14366#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14367#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14363#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14233#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14362#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14594#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14084#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14085#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 14276#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14275#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14274#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14273#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14248#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14247#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14245#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14244#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14243#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14242#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14241#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14239#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14240#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14256#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14234#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14235#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14231#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14230#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 14229#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14228#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14227#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14226#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14225#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14224#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14223#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14222#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14221#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14220#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14214#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14213#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14211#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14209#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14207#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14208#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14204#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14203#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 14202#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14201#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14200#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14199#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14198#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14197#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14196#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14195#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14194#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14193#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14192#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14191#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14186#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14185#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14183#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14184#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14180#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14179#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 14178#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14177#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14176#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14175#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14174#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14173#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14172#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14171#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14170#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14169#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14168#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14167#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14165#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14164#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14162#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14163#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14159#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14158#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 14157#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14156#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14155#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14154#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14153#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14152#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14151#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14150#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14149#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14148#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14147#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14146#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14145#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14128#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14144#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14142#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14141#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14140#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 14139#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14138#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14137#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14136#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14135#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14134#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14133#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14132#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14131#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14130#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14116#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14129#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14127#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14126#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14125#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 14124#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14123#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14122#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14121#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14120#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14119#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14118#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14107#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14117#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14115#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14114#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14113#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 14112#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14111#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14110#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14109#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14096#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14108#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14106#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14105#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14101#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 14102#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14098#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14094#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 14095#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14092#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14089#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 14091#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14086#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14087#L12-1 [2022-07-13 03:11:25,988 INFO L754 eck$LassoCheckResult]: Loop: 14087#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 14090#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 14087#L12-1 [2022-07-13 03:11:25,989 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:25,989 INFO L85 PathProgramCache]: Analyzing trace with hash -1703910940, now seen corresponding path program 6 times [2022-07-13 03:11:25,989 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:25,989 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1698704479] [2022-07-13 03:11:25,989 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:25,989 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:26,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:26,222 INFO L134 CoverageAnalysis]: Checked inductivity of 25415 backedges. 12928 proven. 8663 refuted. 0 times theorem prover too weak. 3824 trivial. 0 not checked. [2022-07-13 03:11:26,222 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-13 03:11:26,222 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1698704479] [2022-07-13 03:11:26,222 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1698704479] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-13 03:11:26,222 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2095084284] [2022-07-13 03:11:26,222 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-07-13 03:11:26,222 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-13 03:11:26,222 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:26,224 INFO L229 MonitoredProcess]: Starting monitored process 42 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-13 03:11:26,226 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (42)] Waiting until timeout for monitored process [2022-07-13 03:11:26,385 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 81 check-sat command(s) [2022-07-13 03:11:26,386 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-07-13 03:11:26,387 INFO L263 TraceCheckSpWp]: Trace formula consists of 521 conjuncts, 15 conjunts are in the unsatisfiable core [2022-07-13 03:11:26,390 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:26,618 INFO L134 CoverageAnalysis]: Checked inductivity of 25415 backedges. 8831 proven. 411 refuted. 0 times theorem prover too weak. 16173 trivial. 0 not checked. [2022-07-13 03:11:26,618 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-13 03:11:26,704 INFO L134 CoverageAnalysis]: Checked inductivity of 25415 backedges. 8831 proven. 411 refuted. 0 times theorem prover too weak. 16173 trivial. 0 not checked. [2022-07-13 03:11:26,704 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2095084284] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-13 03:11:26,704 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-13 03:11:26,704 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 14, 14] total 37 [2022-07-13 03:11:26,704 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1170263388] [2022-07-13 03:11:26,705 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-13 03:11:26,706 INFO L757 eck$LassoCheckResult]: stem already infeasible [2022-07-13 03:11:26,706 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:26,706 INFO L85 PathProgramCache]: Analyzing trace with hash 1324, now seen corresponding path program 9 times [2022-07-13 03:11:26,706 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:26,706 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [985224695] [2022-07-13 03:11:26,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:26,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:26,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:26,708 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 03:11:26,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:26,709 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 03:11:26,717 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-13 03:11:26,718 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2022-07-13 03:11:26,718 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=1140, Unknown=0, NotChecked=0, Total=1332 [2022-07-13 03:11:26,718 INFO L87 Difference]: Start difference. First operand 526 states and 572 transitions. cyclomatic complexity: 53 Second operand has 37 states, 37 states have (on average 3.324324324324324) internal successors, (123), 37 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:28,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-13 03:11:28,279 INFO L93 Difference]: Finished difference Result 686 states and 729 transitions. [2022-07-13 03:11:28,279 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 92 states. [2022-07-13 03:11:28,279 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 686 states and 729 transitions. [2022-07-13 03:11:28,281 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-07-13 03:11:28,283 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 686 states to 635 states and 675 transitions. [2022-07-13 03:11:28,283 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2022-07-13 03:11:28,283 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 63 [2022-07-13 03:11:28,283 INFO L73 IsDeterministic]: Start isDeterministic. Operand 635 states and 675 transitions. [2022-07-13 03:11:28,283 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-07-13 03:11:28,283 INFO L369 hiAutomatonCegarLoop]: Abstraction has 635 states and 675 transitions. [2022-07-13 03:11:28,284 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 635 states and 675 transitions. [2022-07-13 03:11:28,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 635 to 427. [2022-07-13 03:11:28,287 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 427 states, 427 states have (on average 1.0281030444964872) internal successors, (439), 426 states have internal predecessors, (439), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:28,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 427 states to 427 states and 439 transitions. [2022-07-13 03:11:28,288 INFO L392 hiAutomatonCegarLoop]: Abstraction has 427 states and 439 transitions. [2022-07-13 03:11:28,288 INFO L374 stractBuchiCegarLoop]: Abstraction has 427 states and 439 transitions. [2022-07-13 03:11:28,288 INFO L287 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2022-07-13 03:11:28,288 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 427 states and 439 transitions. [2022-07-13 03:11:28,289 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-07-13 03:11:28,289 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-13 03:11:28,290 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-13 03:11:28,293 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [140, 140, 125, 15, 1, 1] [2022-07-13 03:11:28,293 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-07-13 03:11:28,294 INFO L752 eck$LassoCheckResult]: Stem: 17869#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 17870#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 17861#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17863#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17871#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 18287#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17872#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17868#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17864#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17865#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18286#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18285#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18284#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18283#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18282#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18281#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18280#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18279#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18278#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18277#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18276#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18275#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18274#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18273#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18272#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18271#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18270#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18269#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18268#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18267#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18266#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18265#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18264#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18263#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18262#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18261#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18260#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18259#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18258#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18257#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18256#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18255#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18254#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18253#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18252#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18251#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18250#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18249#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18248#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18247#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18246#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18245#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18244#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18243#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18242#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18241#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18240#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18239#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18238#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18237#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18235#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18236#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18234#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18233#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18232#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 18231#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18230#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18229#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18228#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18227#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18226#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18225#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18224#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18223#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18222#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18221#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18220#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18219#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18218#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18217#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18216#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18215#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18214#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18213#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18212#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18211#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18210#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18209#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18208#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18207#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18206#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18205#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18204#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18203#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18202#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18201#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18200#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18199#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18198#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18197#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18196#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18195#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18194#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18193#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18192#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18191#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18190#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18189#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18188#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18187#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18186#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18185#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18184#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18183#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18182#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18181#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18180#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18178#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18179#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18177#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18176#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18175#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 18174#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18173#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18172#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18171#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18170#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18169#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18168#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18167#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18166#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18165#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18164#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18163#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18162#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18161#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18160#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18159#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18158#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18157#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18156#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18155#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18154#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18153#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18152#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18151#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18150#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18149#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18148#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18147#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18146#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18145#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18144#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18143#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18142#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18141#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18140#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18139#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18138#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18137#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18136#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18135#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18134#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18133#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18132#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18131#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18130#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18129#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18128#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18127#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18126#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18124#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18125#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18123#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18122#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18121#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 18120#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18119#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18118#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18117#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18116#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18115#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18114#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18113#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18112#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18111#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18110#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18109#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18108#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18107#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18106#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18105#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18104#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18103#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18102#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18101#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18100#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18099#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18098#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18097#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18096#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18095#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18094#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18093#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18092#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18091#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18090#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18089#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18088#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18087#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18086#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18085#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18084#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18083#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18082#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18081#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18080#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18079#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18078#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18077#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18076#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18075#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17997#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18074#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18071#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18070#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18069#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 18068#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18067#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18066#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18065#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18064#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18063#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18062#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18061#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18060#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18059#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18058#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18057#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18056#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18055#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18054#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18053#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18052#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18051#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18050#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18049#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18048#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18047#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18046#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18045#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18044#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18043#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18042#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18041#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17967#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18040#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17996#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17995#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17994#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 17993#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17992#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17991#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17990#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17989#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17988#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17987#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17986#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17985#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17984#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17983#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17982#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17981#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17980#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17979#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17978#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17977#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17976#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17975#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17974#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17973#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17972#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17971#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17970#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17969#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17940#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17968#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17966#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17965#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17964#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 17963#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17962#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17961#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17960#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17959#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17958#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17957#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17956#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17955#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17954#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17953#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17952#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17951#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17950#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17949#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17948#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17947#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17946#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17945#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17944#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17943#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17942#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17916#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17941#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17939#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17938#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17937#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 17936#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17935#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17934#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17933#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17932#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17931#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17930#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17929#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17928#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17927#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17926#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17925#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17924#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17923#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17922#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17921#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17920#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17919#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17918#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17895#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17917#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17915#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17914#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17913#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 17912#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17911#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17910#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17909#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17908#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17907#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17906#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17905#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17904#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17903#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17902#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17901#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17900#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17899#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17898#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17897#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17876#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17896#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17894#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17893#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17892#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 17891#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17890#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17889#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17888#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17887#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17886#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17885#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17884#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17883#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17882#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17881#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17880#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17879#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17878#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17877#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 17875#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17873#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17866#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 17867#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 17874#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18039#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18038#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18037#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18036#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18035#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18034#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18033#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18032#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18031#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18030#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18029#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18028#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18027#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 18026#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18025#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18024#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18023#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18022#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18021#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18020#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18019#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18018#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18017#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18016#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18015#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 18014#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18013#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18012#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18011#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18010#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18009#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18008#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18007#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18006#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 18005#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18004#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 18003#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 18002#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18001#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17998#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 17999#L12-1 [2022-07-13 03:11:28,294 INFO L754 eck$LassoCheckResult]: Loop: 17999#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 18000#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 17999#L12-1 [2022-07-13 03:11:28,294 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:28,294 INFO L85 PathProgramCache]: Analyzing trace with hash -1848898559, now seen corresponding path program 9 times [2022-07-13 03:11:28,294 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:28,294 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1894450847] [2022-07-13 03:11:28,295 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:28,295 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:28,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:28,508 INFO L134 CoverageAnalysis]: Checked inductivity of 29190 backedges. 13932 proven. 9015 refuted. 0 times theorem prover too weak. 6243 trivial. 0 not checked. [2022-07-13 03:11:28,509 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-13 03:11:28,509 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1894450847] [2022-07-13 03:11:28,509 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1894450847] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-13 03:11:28,509 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [502871273] [2022-07-13 03:11:28,509 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-07-13 03:11:28,510 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-13 03:11:28,510 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:28,511 INFO L229 MonitoredProcess]: Starting monitored process 43 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-13 03:11:28,539 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (43)] Waiting until timeout for monitored process [2022-07-13 03:11:28,754 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 117 check-sat command(s) [2022-07-13 03:11:28,754 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-07-13 03:11:28,757 INFO L263 TraceCheckSpWp]: Trace formula consists of 746 conjuncts, 27 conjunts are in the unsatisfiable core [2022-07-13 03:11:28,762 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:29,246 INFO L134 CoverageAnalysis]: Checked inductivity of 29190 backedges. 14745 proven. 8053 refuted. 0 times theorem prover too weak. 6392 trivial. 0 not checked. [2022-07-13 03:11:29,246 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-13 03:11:29,499 INFO L134 CoverageAnalysis]: Checked inductivity of 29190 backedges. 14745 proven. 8053 refuted. 0 times theorem prover too weak. 6392 trivial. 0 not checked. [2022-07-13 03:11:29,500 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [502871273] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-13 03:11:29,500 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-13 03:11:29,500 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 25, 25] total 44 [2022-07-13 03:11:29,500 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [146971182] [2022-07-13 03:11:29,500 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-13 03:11:29,501 INFO L757 eck$LassoCheckResult]: stem already infeasible [2022-07-13 03:11:29,501 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:29,501 INFO L85 PathProgramCache]: Analyzing trace with hash 1324, now seen corresponding path program 10 times [2022-07-13 03:11:29,501 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:29,501 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1082867498] [2022-07-13 03:11:29,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:29,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:29,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:29,503 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 03:11:29,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:29,504 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 03:11:29,512 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-13 03:11:29,512 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2022-07-13 03:11:29,513 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=336, Invalid=1556, Unknown=0, NotChecked=0, Total=1892 [2022-07-13 03:11:29,513 INFO L87 Difference]: Start difference. First operand 427 states and 439 transitions. cyclomatic complexity: 18 Second operand has 44 states, 44 states have (on average 3.4318181818181817) internal successors, (151), 44 states have internal predecessors, (151), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:33,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-13 03:11:33,128 INFO L93 Difference]: Finished difference Result 741 states and 777 transitions. [2022-07-13 03:11:33,129 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 177 states. [2022-07-13 03:11:33,129 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 741 states and 777 transitions. [2022-07-13 03:11:33,131 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-07-13 03:11:33,133 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 741 states to 706 states and 742 transitions. [2022-07-13 03:11:33,133 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 62 [2022-07-13 03:11:33,133 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 62 [2022-07-13 03:11:33,133 INFO L73 IsDeterministic]: Start isDeterministic. Operand 706 states and 742 transitions. [2022-07-13 03:11:33,133 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-07-13 03:11:33,133 INFO L369 hiAutomatonCegarLoop]: Abstraction has 706 states and 742 transitions. [2022-07-13 03:11:33,133 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 706 states and 742 transitions. [2022-07-13 03:11:33,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 706 to 607. [2022-07-13 03:11:33,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 607 states, 607 states have (on average 1.031301482701812) internal successors, (626), 606 states have internal predecessors, (626), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:33,139 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 607 states to 607 states and 626 transitions. [2022-07-13 03:11:33,139 INFO L392 hiAutomatonCegarLoop]: Abstraction has 607 states and 626 transitions. [2022-07-13 03:11:33,139 INFO L374 stractBuchiCegarLoop]: Abstraction has 607 states and 626 transitions. [2022-07-13 03:11:33,139 INFO L287 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2022-07-13 03:11:33,139 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 607 states and 626 transitions. [2022-07-13 03:11:33,141 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-07-13 03:11:33,141 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-13 03:11:33,141 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-13 03:11:33,143 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [161, 161, 144, 17, 1, 1] [2022-07-13 03:11:33,143 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-07-13 03:11:33,143 INFO L752 eck$LassoCheckResult]: Stem: 21951#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 21952#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 21944#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 21946#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 21953#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 22550#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22549#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22548#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22547#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22546#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22545#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22544#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22543#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22542#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22541#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22540#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22539#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22538#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22537#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22536#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22535#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22534#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22533#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22532#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22531#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22530#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22529#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22528#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22527#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22526#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22525#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22524#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22523#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22522#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22521#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22520#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22519#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22518#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22517#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22516#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22515#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22514#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22513#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22512#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22511#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22510#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22509#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22508#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22507#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22506#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22505#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22504#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22503#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22502#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22501#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22500#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22499#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22498#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22497#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22496#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22494#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22495#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22493#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22492#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22491#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 22490#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22489#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22488#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22487#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22486#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22485#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22484#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22483#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22482#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22481#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22480#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22479#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22478#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22477#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22476#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22475#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22474#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22473#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22472#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22471#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22470#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22469#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22468#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22467#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22466#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22465#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22464#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22463#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22462#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22461#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22460#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22459#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22458#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22457#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22456#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22455#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22454#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22453#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22452#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22451#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22450#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22449#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22448#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22447#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22446#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22445#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22444#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22443#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22442#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22441#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22440#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22439#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22437#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22438#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22436#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22435#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22434#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 22433#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22432#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22431#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22430#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22429#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22428#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22427#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22426#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22425#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22424#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22423#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22422#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22421#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22420#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22419#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22418#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22417#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22416#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22415#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22414#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22413#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22412#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22411#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22410#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22409#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22408#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22407#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22406#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22405#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22404#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22403#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22402#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22401#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22400#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22399#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22398#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22397#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22396#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22395#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22394#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22393#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22392#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22391#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22390#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22389#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22388#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22387#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22386#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22385#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22383#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22384#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22382#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22381#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22380#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 22379#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22378#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22377#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22376#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22375#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22374#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22373#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22372#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22371#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22370#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22369#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22368#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22367#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22366#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22365#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22364#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22363#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22362#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22361#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22360#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22359#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22358#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22357#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22356#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22355#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22354#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22353#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22352#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22351#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22350#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22349#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22348#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22347#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22346#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22345#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22344#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22343#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22342#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22341#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22340#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22339#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22338#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22337#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22336#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22335#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22334#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22332#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22333#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22331#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22330#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22329#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 22328#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22327#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22326#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22325#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22324#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22323#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22322#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22321#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22320#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22319#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22318#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22317#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22316#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22315#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22314#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22313#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22312#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22311#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22310#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22309#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22308#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22307#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22306#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22305#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22304#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22303#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22302#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22301#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22300#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22299#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22298#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22297#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22296#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22295#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22294#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22293#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22292#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22202#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22203#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22201#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22200#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22199#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 22198#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22197#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22196#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22195#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22194#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22193#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22192#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22191#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22190#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22189#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22188#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22187#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22186#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22185#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22184#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22183#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22182#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22181#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22180#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22179#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22178#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22177#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22176#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22175#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22174#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22173#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22172#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22171#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22170#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22169#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22167#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22166#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22165#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 22164#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22163#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22162#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22161#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22160#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22159#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22158#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22157#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22156#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22155#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22154#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22153#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22152#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22151#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22150#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22149#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22148#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22147#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22146#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22145#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22144#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22143#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22142#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22141#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22140#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22139#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22138#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22136#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22135#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22134#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 22133#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22132#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22131#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22130#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22129#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22128#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22127#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22126#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22125#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22124#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22123#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22122#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22121#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22120#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22119#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22118#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22117#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22116#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22115#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22114#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22113#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22112#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22111#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22110#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22109#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22108#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22107#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 22106#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22105#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22104#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22103#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22102#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22101#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22100#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22099#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22098#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22097#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22096#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22095#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22094#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22093#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22092#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22091#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22090#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22089#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22086#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22084#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22082#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22080#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22078#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22076#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 22074#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22072#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22070#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22068#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22066#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22064#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22062#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22060#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22058#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22056#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22054#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22052#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22050#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22048#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22046#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22045#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22044#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22043#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22042#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22037#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22036#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 22035#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22034#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22033#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22032#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22031#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22030#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22029#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22028#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22027#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22026#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22025#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22024#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22023#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22022#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22021#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22020#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 21957#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22019#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 21975#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 21974#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 21973#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 21972#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 21971#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 21970#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 21969#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 21968#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 21967#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 21966#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 21965#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 21964#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 21963#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 21962#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 21961#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 21960#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 21959#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 21958#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 21956#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 21954#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 21948#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 21949#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 21955#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22018#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22017#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22016#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22015#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22014#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22013#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22012#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22011#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22010#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22009#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22008#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22007#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22006#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 22005#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22004#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22003#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 22002#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 22001#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 22000#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 21999#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 21998#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 21997#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 21996#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 21995#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 21994#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 21993#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 21992#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 21991#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 21990#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 21989#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 21988#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 21987#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 21986#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 21985#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 21984#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 21983#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 21982#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 21981#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 21980#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 21977#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 21978#L12-1 [2022-07-13 03:11:33,144 INFO L754 eck$LassoCheckResult]: Loop: 21978#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 21979#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 21978#L12-1 [2022-07-13 03:11:33,144 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:33,145 INFO L85 PathProgramCache]: Analyzing trace with hash 2044987687, now seen corresponding path program 10 times [2022-07-13 03:11:33,145 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:33,145 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2034991724] [2022-07-13 03:11:33,145 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:33,145 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:33,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 03:11:33,383 INFO L134 CoverageAnalysis]: Checked inductivity of 38640 backedges. 18300 proven. 12627 refuted. 0 times theorem prover too weak. 7713 trivial. 0 not checked. [2022-07-13 03:11:33,383 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-13 03:11:33,383 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2034991724] [2022-07-13 03:11:33,383 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2034991724] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-13 03:11:33,383 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [131729714] [2022-07-13 03:11:33,383 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-07-13 03:11:33,383 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-13 03:11:33,384 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 03:11:33,385 INFO L229 MonitoredProcess]: Starting monitored process 44 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-13 03:11:33,386 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (44)] Waiting until timeout for monitored process [2022-07-13 03:11:33,513 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-07-13 03:11:33,514 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-07-13 03:11:33,517 INFO L263 TraceCheckSpWp]: Trace formula consists of 1020 conjuncts, 40 conjunts are in the unsatisfiable core [2022-07-13 03:11:33,522 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 03:11:34,285 INFO L134 CoverageAnalysis]: Checked inductivity of 38640 backedges. 20020 proven. 9572 refuted. 0 times theorem prover too weak. 9048 trivial. 0 not checked. [2022-07-13 03:11:34,286 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-13 03:11:34,586 INFO L134 CoverageAnalysis]: Checked inductivity of 38640 backedges. 20020 proven. 9572 refuted. 0 times theorem prover too weak. 9048 trivial. 0 not checked. [2022-07-13 03:11:34,587 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [131729714] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-13 03:11:34,587 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-13 03:11:34,587 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 40, 40] total 57 [2022-07-13 03:11:34,587 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [549480752] [2022-07-13 03:11:34,587 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-13 03:11:34,588 INFO L757 eck$LassoCheckResult]: stem already infeasible [2022-07-13 03:11:34,588 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:34,588 INFO L85 PathProgramCache]: Analyzing trace with hash 1324, now seen corresponding path program 11 times [2022-07-13 03:11:34,588 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:34,589 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1452716839] [2022-07-13 03:11:34,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:34,589 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:34,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:34,590 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 03:11:34,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:34,591 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 03:11:34,599 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-13 03:11:34,600 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 57 interpolants. [2022-07-13 03:11:34,601 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=650, Invalid=2542, Unknown=0, NotChecked=0, Total=3192 [2022-07-13 03:11:34,601 INFO L87 Difference]: Start difference. First operand 607 states and 626 transitions. cyclomatic complexity: 26 Second operand has 57 states, 57 states have (on average 3.192982456140351) internal successors, (182), 57 states have internal predecessors, (182), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:38,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-13 03:11:38,703 INFO L93 Difference]: Finished difference Result 1362 states and 1418 transitions. [2022-07-13 03:11:38,703 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 238 states. [2022-07-13 03:11:38,703 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1362 states and 1418 transitions. [2022-07-13 03:11:38,729 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-07-13 03:11:38,732 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1362 states to 1282 states and 1338 transitions. [2022-07-13 03:11:38,732 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 69 [2022-07-13 03:11:38,732 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 69 [2022-07-13 03:11:38,733 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1282 states and 1338 transitions. [2022-07-13 03:11:38,733 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-07-13 03:11:38,733 INFO L369 hiAutomatonCegarLoop]: Abstraction has 1282 states and 1338 transitions. [2022-07-13 03:11:38,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1282 states and 1338 transitions. [2022-07-13 03:11:38,749 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1282 to 637. [2022-07-13 03:11:38,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 637 states, 637 states have (on average 1.0266875981161696) internal successors, (654), 636 states have internal predecessors, (654), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 03:11:38,751 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 637 states to 637 states and 654 transitions. [2022-07-13 03:11:38,751 INFO L392 hiAutomatonCegarLoop]: Abstraction has 637 states and 654 transitions. [2022-07-13 03:11:38,751 INFO L374 stractBuchiCegarLoop]: Abstraction has 637 states and 654 transitions. [2022-07-13 03:11:38,751 INFO L287 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2022-07-13 03:11:38,751 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 637 states and 654 transitions. [2022-07-13 03:11:38,753 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-07-13 03:11:38,753 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-13 03:11:38,753 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-13 03:11:38,756 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [210, 210, 190, 20, 1, 1] [2022-07-13 03:11:38,756 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-07-13 03:11:38,756 INFO L752 eck$LassoCheckResult]: Stem: 27536#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 27537#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 27529#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27531#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27538#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 28165#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28164#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28163#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28162#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28161#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28160#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28159#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28158#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28157#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28156#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28155#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28154#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28153#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28152#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28151#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28150#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28149#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28148#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28147#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28146#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28145#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28144#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28143#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28142#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28141#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28140#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28139#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28138#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28137#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28136#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28135#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28134#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28133#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28132#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28131#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28130#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28129#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28128#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28127#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28126#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28125#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28124#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28123#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28122#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28121#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28120#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28119#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28118#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28117#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28116#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28115#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28114#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28113#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28112#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28111#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28053#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28110#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28109#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28108#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28107#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 28106#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28105#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28104#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28103#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28102#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28101#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28100#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28099#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28098#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28097#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28096#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28095#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28094#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28093#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28092#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28091#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28090#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28089#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28088#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28087#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28086#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28085#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28084#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28083#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28082#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28081#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28080#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28079#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28078#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28077#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28076#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28075#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28074#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28073#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28072#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28071#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28070#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28069#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28068#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28067#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28066#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28065#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28064#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28063#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28062#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28061#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28060#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28059#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28058#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28057#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28056#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28055#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27999#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28054#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28052#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28051#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28050#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 28049#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28048#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28047#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28046#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28045#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28044#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28043#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28042#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28041#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28040#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28039#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28038#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28037#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28036#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28035#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28034#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28033#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28032#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28031#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28030#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28029#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28028#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28027#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28026#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28025#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28024#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28023#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28022#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28021#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28020#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28019#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28018#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28017#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28016#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28015#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28014#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28013#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28012#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28011#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28010#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28009#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28008#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28007#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28006#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28005#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28004#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 28003#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28002#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 28001#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27948#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 28000#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27998#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27997#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27996#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 27995#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27994#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27993#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27992#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27991#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27990#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27989#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27988#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27987#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27986#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27985#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27984#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27983#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27982#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27981#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27980#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27979#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27978#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27977#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27976#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27975#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27974#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27973#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27972#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27971#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27970#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27969#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27968#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27967#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27966#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27965#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27964#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27963#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27962#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27961#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27960#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27959#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27958#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27957#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27956#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27955#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27954#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27953#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27952#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27951#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27950#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27900#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27949#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27947#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27946#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27945#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 27944#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27943#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27942#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27941#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27940#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27939#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27938#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27937#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27936#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27935#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27934#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27933#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27932#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27931#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27930#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27929#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27928#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27927#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27926#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27925#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27924#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27923#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27922#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27921#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27920#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27919#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27918#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27917#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27916#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27915#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27914#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27913#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27912#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27911#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27910#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27909#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27908#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27907#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27906#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27905#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27904#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27903#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27902#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27855#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27901#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27899#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27898#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27897#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 27896#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27895#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27894#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27893#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27892#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27891#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27890#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27889#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27888#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27887#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27886#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27885#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27884#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27883#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27882#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27881#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27880#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27879#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27878#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27877#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27876#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27875#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27874#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27873#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27872#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27871#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27870#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27869#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27868#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27867#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27866#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27865#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27864#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27863#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27862#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27861#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27860#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27859#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27858#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27857#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27813#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27856#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27854#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27853#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27852#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 27851#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27850#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27849#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27848#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27847#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27846#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27845#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27844#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27843#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27842#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27841#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27840#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27839#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27838#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27837#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27836#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27835#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27834#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27833#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27832#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27831#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27830#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27829#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27828#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27827#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27826#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27825#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27824#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27823#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27822#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27821#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27820#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27819#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27818#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27817#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27816#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27815#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27774#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27814#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27812#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27811#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27810#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 27809#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27808#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27807#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27806#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27805#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27804#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27803#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27802#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27801#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27800#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27799#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27798#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27797#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27796#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27795#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27794#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27793#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27792#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27791#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27790#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27789#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27788#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27787#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27786#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27785#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27784#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27783#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27782#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27781#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27780#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27779#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27778#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27777#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27776#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27738#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27775#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27773#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27772#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27771#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 27770#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27769#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27768#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27767#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27766#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27765#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27764#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27763#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27762#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27761#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27760#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27759#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27758#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27757#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27756#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27755#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27754#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27753#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27752#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27751#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27750#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27749#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27748#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27747#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27746#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27745#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27744#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27743#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27742#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27741#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27740#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27705#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27739#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27737#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27736#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27735#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 27734#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27733#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27732#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27731#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27730#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27729#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27728#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27727#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27726#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27725#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27724#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27723#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27722#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27721#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27720#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27719#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27718#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27717#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27716#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27715#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27714#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27713#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27712#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27711#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27710#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27709#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27708#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27707#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27675#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27706#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27704#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27703#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27702#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 27701#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27700#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27699#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27698#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27697#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27696#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27695#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27694#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27693#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27692#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27691#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27690#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27689#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27688#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27687#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27686#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27685#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27684#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27683#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27682#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27681#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27680#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27679#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27678#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27677#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27648#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27676#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27674#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27673#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27672#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 27671#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27670#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27669#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27668#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27667#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27666#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27665#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27664#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27663#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27662#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27661#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27660#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27659#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27658#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27657#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27656#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27655#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27654#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27653#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27652#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27651#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27650#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27624#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27649#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27647#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27646#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27645#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 27644#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27643#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27642#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27641#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27640#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27639#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27638#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27637#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27636#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27635#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27634#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27633#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27632#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27631#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27630#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27629#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27628#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27627#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27626#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27561#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27625#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27623#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27622#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27621#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 27620#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27619#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27618#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27617#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27616#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27615#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27614#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27613#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27612#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27611#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27610#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27609#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27608#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27607#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27606#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27605#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27542#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27562#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27560#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27559#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27558#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 27557#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27556#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27555#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27554#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27553#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27552#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27551#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27550#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27549#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27548#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27547#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27546#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27545#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27544#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27543#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27541#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27539#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27533#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 27534#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27540#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27604#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27603#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27602#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27601#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27600#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27599#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27598#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27597#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27596#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27595#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27594#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27593#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27592#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 27591#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27590#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27589#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27588#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27587#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27586#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27585#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27584#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27583#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27582#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27581#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27580#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 27579#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27578#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27577#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27576#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27575#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27574#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27573#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27572#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27571#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 27570#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27569#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27568#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 27567#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27566#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27563#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 27564#L12-1 [2022-07-13 03:11:38,757 INFO L754 eck$LassoCheckResult]: Loop: 27564#L12-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 27565#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 27564#L12-1 [2022-07-13 03:11:38,757 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:38,758 INFO L85 PathProgramCache]: Analyzing trace with hash -686017405, now seen corresponding path program 11 times [2022-07-13 03:11:38,758 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:38,758 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1593770345] [2022-07-13 03:11:38,758 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:38,758 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:38,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:38,864 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 03:11:38,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:38,964 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 03:11:38,965 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:38,965 INFO L85 PathProgramCache]: Analyzing trace with hash 1324, now seen corresponding path program 12 times [2022-07-13 03:11:38,965 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:38,965 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1481924439] [2022-07-13 03:11:38,965 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:38,965 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:38,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:38,967 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 03:11:38,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:38,968 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 03:11:38,968 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 03:11:38,968 INFO L85 PathProgramCache]: Analyzing trace with hash -2132729554, now seen corresponding path program 7 times [2022-07-13 03:11:38,969 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 03:11:38,969 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [351615774] [2022-07-13 03:11:38,969 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 03:11:38,969 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 03:11:39,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:39,069 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 03:11:39,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 03:11:39,196 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 03:12:13,525 WARN L233 SmtUtils]: Spent 34.08s on a formula simplification. DAG size of input: 2129 DAG size of output: 662 (called from [L 279] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2022-07-13 03:12:13,680 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 13.07 03:12:13 BoogieIcfgContainer [2022-07-13 03:12:13,681 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2022-07-13 03:12:13,681 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-07-13 03:12:13,681 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-07-13 03:12:13,681 INFO L275 PluginConnector]: Witness Printer initialized [2022-07-13 03:12:13,682 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.07 03:11:14" (3/4) ... [2022-07-13 03:12:13,683 INFO L134 WitnessPrinter]: Generating witness for non-termination counterexample [2022-07-13 03:12:13,762 INFO L141 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2022-07-13 03:12:13,763 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-07-13 03:12:13,763 INFO L158 Benchmark]: Toolchain (without parser) took 59991.62ms. Allocated memory was 115.3MB in the beginning and 352.3MB in the end (delta: 237.0MB). Free memory was 83.9MB in the beginning and 212.8MB in the end (delta: -128.9MB). Peak memory consumption was 108.1MB. Max. memory is 16.1GB. [2022-07-13 03:12:13,763 INFO L158 Benchmark]: CDTParser took 0.15ms. Allocated memory is still 79.7MB. Free memory was 37.0MB in the beginning and 37.0MB in the end (delta: 40.5kB). There was no memory consumed. Max. memory is 16.1GB. [2022-07-13 03:12:13,764 INFO L158 Benchmark]: CACSL2BoogieTranslator took 188.54ms. Allocated memory is still 115.3MB. Free memory was 83.9MB in the beginning and 91.5MB in the end (delta: -7.6MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2022-07-13 03:12:13,764 INFO L158 Benchmark]: Boogie Procedure Inliner took 18.79ms. Allocated memory is still 115.3MB. Free memory was 91.5MB in the beginning and 90.3MB in the end (delta: 1.2MB). There was no memory consumed. Max. memory is 16.1GB. [2022-07-13 03:12:13,764 INFO L158 Benchmark]: Boogie Preprocessor took 12.32ms. Allocated memory is still 115.3MB. Free memory was 90.3MB in the beginning and 89.4MB in the end (delta: 895.2kB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-07-13 03:12:13,764 INFO L158 Benchmark]: RCFGBuilder took 155.33ms. Allocated memory is still 115.3MB. Free memory was 89.4MB in the beginning and 81.0MB in the end (delta: 8.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2022-07-13 03:12:13,765 INFO L158 Benchmark]: BuchiAutomizer took 59529.45ms. Allocated memory was 115.3MB in the beginning and 352.3MB in the end (delta: 237.0MB). Free memory was 81.0MB in the beginning and 227.5MB in the end (delta: -146.5MB). Peak memory consumption was 224.7MB. Max. memory is 16.1GB. [2022-07-13 03:12:13,765 INFO L158 Benchmark]: Witness Printer took 81.53ms. Allocated memory is still 352.3MB. Free memory was 227.5MB in the beginning and 212.8MB in the end (delta: 14.7MB). Peak memory consumption was 14.7MB. Max. memory is 16.1GB. [2022-07-13 03:12:13,766 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15ms. Allocated memory is still 79.7MB. Free memory was 37.0MB in the beginning and 37.0MB in the end (delta: 40.5kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 188.54ms. Allocated memory is still 115.3MB. Free memory was 83.9MB in the beginning and 91.5MB in the end (delta: -7.6MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 18.79ms. Allocated memory is still 115.3MB. Free memory was 91.5MB in the beginning and 90.3MB in the end (delta: 1.2MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 12.32ms. Allocated memory is still 115.3MB. Free memory was 90.3MB in the beginning and 89.4MB in the end (delta: 895.2kB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * RCFGBuilder took 155.33ms. Allocated memory is still 115.3MB. Free memory was 89.4MB in the beginning and 81.0MB in the end (delta: 8.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * BuchiAutomizer took 59529.45ms. Allocated memory was 115.3MB in the beginning and 352.3MB in the end (delta: 237.0MB). Free memory was 81.0MB in the beginning and 227.5MB in the end (delta: -146.5MB). Peak memory consumption was 224.7MB. Max. memory is 16.1GB. * Witness Printer took 81.53ms. Allocated memory is still 352.3MB. Free memory was 227.5MB in the beginning and 212.8MB in the end (delta: 14.7MB). Peak memory consumption was 14.7MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 18 terminating modules (13 trivial, 3 deterministic, 2 nondeterministic) and one nonterminating remainder module.One deterministic module has affine ranking function -1 * i + range and consists of 3 locations. One deterministic module has affine ranking function -1 * i + range and consists of 3 locations. One deterministic module has affine ranking function range and consists of 4 locations. One nondeterministic module has affine ranking function -1 * i + range and consists of 3 locations. One nondeterministic module has affine ranking function i and consists of 6 locations. 13 modules have a trivial ranking function, the largest among these consists of 57 locations. The remainder module has 637 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 59.4s and 17 iterations. TraceHistogramMax:210. Analysis of lassos took 44.9s. Construction of modules took 2.6s. Büchi inclusion checks took 11.5s. Highest rank in rank-based complementation 3. Minimization of det autom 1. Minimization of nondet autom 17. Automata minimization 0.1s AutomataMinimizationTime, 18 MinimizatonAttempts, 1997 StatesRemovedByMinimization, 15 NontrivialMinimizations. Non-live state removal took 0.0s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [3, 0, 1, 1, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 11/12 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 197 SdHoareTripleChecker+Valid, 3.2s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 187 mSDsluCounter, 169 SdHoareTripleChecker+Invalid, 2.6s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 77 mSDsCounter, 1268 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 6872 IncrementalHoareTripleChecker+Invalid, 8140 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 1268 mSolverCounterUnsat, 92 mSDtfsCounter, 6872 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI0 SFLT3 conc3 concLT0 SILN8 SILU0 SILI0 SILT2 lasso0 LassoPreprocessingBenchmarks: Lassos: inital18 mio100 ax167 hnf100 lsp59 ukn100 mio100 lsp100 div100 bol100 ite100 ukn100 eq171 hnf94 smp76 dnf100 smp100 tf109 neg96 sie107 LassoTerminationAnalysisBenchmarks: ConstraintsSatisfiability: unsat Degree: 0 Time: 29ms VariablesStem: 1 VariablesLoop: 0 DisjunctsStem: 1 DisjunctsLoop: 1 SupportingInvariants: 2 MotzkinApplications: 6 LassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 6 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 5 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.7s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - FixpointNonTerminationResult [Line: 11]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite execution State at position 0 is {} State at position 1 is {i=0, \result=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@5e34f27=0, range=0} - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 11]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L6] int i; [L7] int range; [L8] i = __VERIFIER_nondet_int() [L9] range = 20 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND FALSE !(i == range) [L17] i = i+1 [L11] COND TRUE 0 <= i && i <= range [L12] COND TRUE !(0 == i && i == range) [L13] COND TRUE i == range [L14] i = 0 [L15] range = range-1 Loop: [L11] COND TRUE 0 <= i && i <= range [L12] COND FALSE !(!(0 == i && i == range)) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2022-07-13 03:12:13,818 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (44)] Ended with exit code 0 [2022-07-13 03:12:14,032 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (43)] Forceful destruction successful, exit code 0 [2022-07-13 03:12:14,249 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (42)] Forceful destruction successful, exit code 0 [2022-07-13 03:12:14,448 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (41)] Forceful destruction successful, exit code 0 [2022-07-13 03:12:14,650 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (40)] Forceful destruction successful, exit code 0 [2022-07-13 03:12:14,847 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (39)] Forceful destruction successful, exit code 0 [2022-07-13 03:12:15,049 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (38)] Forceful destruction successful, exit code 0 [2022-07-13 03:12:15,248 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (37)] Forceful destruction successful, exit code 0 [2022-07-13 03:12:15,447 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Forceful destruction successful, exit code 0 [2022-07-13 03:12:15,648 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Forceful destruction successful, exit code 0 [2022-07-13 03:12:15,859 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-07-13 03:12:16,062 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM)