./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test1-2.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 6c24879c Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test1-2.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 7f552e336cb6eb3ea16ba25a84411e1d0c8dcfaa2b088c21df87ffefed1a84a7 --- Real Ultimate output --- This is Ultimate 0.2.2-?-6c24879 [2022-07-13 05:26:04,081 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-07-13 05:26:04,111 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-07-13 05:26:04,160 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-07-13 05:26:04,163 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-07-13 05:26:04,164 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-07-13 05:26:04,168 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-07-13 05:26:04,170 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-07-13 05:26:04,172 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-07-13 05:26:04,176 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-07-13 05:26:04,177 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-07-13 05:26:04,178 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-07-13 05:26:04,178 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-07-13 05:26:04,180 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-07-13 05:26:04,180 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-07-13 05:26:04,181 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-07-13 05:26:04,182 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-07-13 05:26:04,183 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-07-13 05:26:04,185 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-07-13 05:26:04,188 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-07-13 05:26:04,189 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-07-13 05:26:04,192 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-07-13 05:26:04,192 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-07-13 05:26:04,193 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-07-13 05:26:04,193 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-07-13 05:26:04,195 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-07-13 05:26:04,197 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-07-13 05:26:04,197 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-07-13 05:26:04,197 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-07-13 05:26:04,198 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-07-13 05:26:04,199 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-07-13 05:26:04,199 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-07-13 05:26:04,200 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-07-13 05:26:04,200 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-07-13 05:26:04,201 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-07-13 05:26:04,201 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-07-13 05:26:04,202 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-07-13 05:26:04,202 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-07-13 05:26:04,202 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-07-13 05:26:04,202 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-07-13 05:26:04,203 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-07-13 05:26:04,204 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-07-13 05:26:04,205 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-07-13 05:26:04,227 INFO L113 SettingsManager]: Loading preferences was successful [2022-07-13 05:26:04,228 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-07-13 05:26:04,228 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-07-13 05:26:04,228 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-07-13 05:26:04,229 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-07-13 05:26:04,229 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-07-13 05:26:04,229 INFO L138 SettingsManager]: * Use SBE=true [2022-07-13 05:26:04,230 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-07-13 05:26:04,230 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-07-13 05:26:04,230 INFO L138 SettingsManager]: * Use old map elimination=false [2022-07-13 05:26:04,231 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-07-13 05:26:04,231 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-07-13 05:26:04,231 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-07-13 05:26:04,231 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-07-13 05:26:04,231 INFO L138 SettingsManager]: * sizeof long=4 [2022-07-13 05:26:04,231 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-07-13 05:26:04,232 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-07-13 05:26:04,232 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-07-13 05:26:04,232 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-07-13 05:26:04,233 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-07-13 05:26:04,233 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-07-13 05:26:04,233 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-07-13 05:26:04,233 INFO L138 SettingsManager]: * sizeof long double=12 [2022-07-13 05:26:04,233 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-07-13 05:26:04,233 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-07-13 05:26:04,233 INFO L138 SettingsManager]: * Use constant arrays=true [2022-07-13 05:26:04,234 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-07-13 05:26:04,234 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-07-13 05:26:04,234 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-07-13 05:26:04,234 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-07-13 05:26:04,234 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-07-13 05:26:04,235 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-07-13 05:26:04,235 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 7f552e336cb6eb3ea16ba25a84411e1d0c8dcfaa2b088c21df87ffefed1a84a7 [2022-07-13 05:26:04,382 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-07-13 05:26:04,397 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-07-13 05:26:04,398 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-07-13 05:26:04,399 INFO L271 PluginConnector]: Initializing CDTParser... [2022-07-13 05:26:04,400 INFO L275 PluginConnector]: CDTParser initialized [2022-07-13 05:26:04,400 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test1-2.i [2022-07-13 05:26:04,460 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c159275b6/879ef30328c7462d97a396a664a1de3c/FLAG26a9ba7c1 [2022-07-13 05:26:04,885 INFO L306 CDTParser]: Found 1 translation units. [2022-07-13 05:26:04,886 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test1-2.i [2022-07-13 05:26:04,897 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c159275b6/879ef30328c7462d97a396a664a1de3c/FLAG26a9ba7c1 [2022-07-13 05:26:04,921 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c159275b6/879ef30328c7462d97a396a664a1de3c [2022-07-13 05:26:04,923 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-07-13 05:26:04,924 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-07-13 05:26:04,925 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-07-13 05:26:04,925 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-07-13 05:26:04,927 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-07-13 05:26:04,928 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.07 05:26:04" (1/1) ... [2022-07-13 05:26:04,928 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@12514165 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.07 05:26:04, skipping insertion in model container [2022-07-13 05:26:04,928 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.07 05:26:04" (1/1) ... [2022-07-13 05:26:04,933 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-07-13 05:26:04,962 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-07-13 05:26:05,285 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test1-2.i[33021,33034] [2022-07-13 05:26:05,367 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-13 05:26:05,386 INFO L203 MainTranslator]: Completed pre-run [2022-07-13 05:26:05,415 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test1-2.i[33021,33034] [2022-07-13 05:26:05,468 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-13 05:26:05,489 INFO L208 MainTranslator]: Completed translation [2022-07-13 05:26:05,490 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.07 05:26:05 WrapperNode [2022-07-13 05:26:05,490 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-07-13 05:26:05,491 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-07-13 05:26:05,491 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-07-13 05:26:05,491 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-07-13 05:26:05,496 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.07 05:26:05" (1/1) ... [2022-07-13 05:26:05,513 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.07 05:26:05" (1/1) ... [2022-07-13 05:26:05,554 INFO L137 Inliner]: procedures = 177, calls = 237, calls flagged for inlining = 13, calls inlined = 13, statements flattened = 807 [2022-07-13 05:26:05,555 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-07-13 05:26:05,555 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-07-13 05:26:05,555 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-07-13 05:26:05,555 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-07-13 05:26:05,561 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.07 05:26:05" (1/1) ... [2022-07-13 05:26:05,561 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.07 05:26:05" (1/1) ... [2022-07-13 05:26:05,568 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.07 05:26:05" (1/1) ... [2022-07-13 05:26:05,569 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.07 05:26:05" (1/1) ... [2022-07-13 05:26:05,592 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.07 05:26:05" (1/1) ... [2022-07-13 05:26:05,600 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.07 05:26:05" (1/1) ... [2022-07-13 05:26:05,604 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.07 05:26:05" (1/1) ... [2022-07-13 05:26:05,609 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-07-13 05:26:05,610 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-07-13 05:26:05,610 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-07-13 05:26:05,610 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-07-13 05:26:05,611 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.07 05:26:05" (1/1) ... [2022-07-13 05:26:05,615 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-13 05:26:05,624 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 05:26:05,633 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-13 05:26:05,644 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-07-13 05:26:05,681 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-07-13 05:26:05,681 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-07-13 05:26:05,682 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2022-07-13 05:26:05,682 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2022-07-13 05:26:05,682 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-07-13 05:26:05,682 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-07-13 05:26:05,682 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-07-13 05:26:05,682 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-07-13 05:26:05,683 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-07-13 05:26:05,684 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-07-13 05:26:05,684 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-07-13 05:26:05,684 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-07-13 05:26:05,684 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-07-13 05:26:05,841 INFO L234 CfgBuilder]: Building ICFG [2022-07-13 05:26:05,842 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-07-13 05:26:05,844 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-07-13 05:26:06,572 INFO L275 CfgBuilder]: Performing block encoding [2022-07-13 05:26:06,580 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-07-13 05:26:06,581 INFO L299 CfgBuilder]: Removed 40 assume(true) statements. [2022-07-13 05:26:06,583 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.07 05:26:06 BoogieIcfgContainer [2022-07-13 05:26:06,583 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-07-13 05:26:06,584 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-07-13 05:26:06,584 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-07-13 05:26:06,587 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-07-13 05:26:06,587 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-13 05:26:06,587 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 13.07 05:26:04" (1/3) ... [2022-07-13 05:26:06,588 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@36527484 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.07 05:26:06, skipping insertion in model container [2022-07-13 05:26:06,588 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-13 05:26:06,588 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.07 05:26:05" (2/3) ... [2022-07-13 05:26:06,589 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@36527484 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.07 05:26:06, skipping insertion in model container [2022-07-13 05:26:06,589 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-13 05:26:06,589 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.07 05:26:06" (3/3) ... [2022-07-13 05:26:06,590 INFO L354 chiAutomizerObserver]: Analyzing ICFG uthash_SAX_test1-2.i [2022-07-13 05:26:06,643 INFO L255 stractBuchiCegarLoop]: Interprodecural is true [2022-07-13 05:26:06,643 INFO L256 stractBuchiCegarLoop]: Hoare is false [2022-07-13 05:26:06,643 INFO L257 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-07-13 05:26:06,643 INFO L258 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-07-13 05:26:06,644 INFO L259 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-07-13 05:26:06,644 INFO L260 stractBuchiCegarLoop]: Difference is false [2022-07-13 05:26:06,644 INFO L261 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-07-13 05:26:06,644 INFO L265 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-07-13 05:26:06,649 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 162 states, 157 states have (on average 1.6496815286624205) internal successors, (259), 157 states have internal predecessors, (259), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-07-13 05:26:06,669 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 148 [2022-07-13 05:26:06,669 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-13 05:26:06,669 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-13 05:26:06,674 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-13 05:26:06,674 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2022-07-13 05:26:06,674 INFO L287 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-07-13 05:26:06,675 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 162 states, 157 states have (on average 1.6496815286624205) internal successors, (259), 157 states have internal predecessors, (259), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-07-13 05:26:06,681 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 148 [2022-07-13 05:26:06,681 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-13 05:26:06,681 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-13 05:26:06,682 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-13 05:26:06,682 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2022-07-13 05:26:06,686 INFO L752 eck$LassoCheckResult]: Stem: 145#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 52#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~switch19#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc31#1.base, main_#t~malloc31#1.offset, main_#t~mem32#1.base, main_#t~mem32#1.offset, main_#t~mem33#1.base, main_#t~mem33#1.offset, main_#t~memset~res34#1.base, main_#t~memset~res34#1.offset, main_#t~mem35#1.base, main_#t~mem35#1.offset, main_#t~mem36#1.base, main_#t~mem36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~malloc40#1.base, main_#t~malloc40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~memset~res47#1.base, main_#t~memset~res47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~post58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem69#1, main_#t~mem68#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~short72#1, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~malloc75#1.base, main_#t~malloc75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~memset~res80#1.base, main_#t~memset~res80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem85#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem89#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1, main_#t~ite90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~pre104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~post109#1, main_#t~mem113#1, main_#t~mem111#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem112#1, main_#t~mem114#1, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~post92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem132#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ite135#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post5#1, main_#t~mem140#1, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~ite143#1.base, main_#t~ite143#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~short148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem171#1, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1, main_#t~post175#1, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~post186#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite145#1.base, main_#t~ite145#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~i~0#1 := 0; 129#L750-3true [2022-07-13 05:26:06,687 INFO L754 eck$LassoCheckResult]: Loop: 129#L750-3true assume !!(main_~i~0#1 < 10);call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 88#L752true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 90#L752-2true call write~int(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4); 112#L757-124true assume !true; 63#L750-2true main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 129#L750-3true [2022-07-13 05:26:06,690 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 05:26:06,691 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 1 times [2022-07-13 05:26:06,697 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 05:26:06,697 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [284680942] [2022-07-13 05:26:06,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 05:26:06,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 05:26:06,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 05:26:06,777 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 05:26:06,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 05:26:06,823 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 05:26:06,825 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 05:26:06,825 INFO L85 PathProgramCache]: Analyzing trace with hash 46868472, now seen corresponding path program 1 times [2022-07-13 05:26:06,825 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 05:26:06,826 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1008324322] [2022-07-13 05:26:06,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 05:26:06,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 05:26:06,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 05:26:06,865 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-13 05:26:06,865 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-13 05:26:06,865 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1008324322] [2022-07-13 05:26:06,866 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1008324322] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-13 05:26:06,866 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-13 05:26:06,866 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-07-13 05:26:06,867 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [421629550] [2022-07-13 05:26:06,867 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-13 05:26:06,870 INFO L769 eck$LassoCheckResult]: loop already infeasible [2022-07-13 05:26:06,870 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-13 05:26:06,889 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2022-07-13 05:26:06,890 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-07-13 05:26:06,891 INFO L87 Difference]: Start difference. First operand has 162 states, 157 states have (on average 1.6496815286624205) internal successors, (259), 157 states have internal predecessors, (259), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 2.5) internal successors, (5), 2 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 05:26:06,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-13 05:26:06,903 INFO L93 Difference]: Finished difference Result 162 states and 211 transitions. [2022-07-13 05:26:06,903 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-07-13 05:26:06,906 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 162 states and 211 transitions. [2022-07-13 05:26:06,909 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 148 [2022-07-13 05:26:06,913 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 162 states to 158 states and 207 transitions. [2022-07-13 05:26:06,913 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 158 [2022-07-13 05:26:06,914 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 158 [2022-07-13 05:26:06,914 INFO L73 IsDeterministic]: Start isDeterministic. Operand 158 states and 207 transitions. [2022-07-13 05:26:06,916 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-13 05:26:06,916 INFO L369 hiAutomatonCegarLoop]: Abstraction has 158 states and 207 transitions. [2022-07-13 05:26:06,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states and 207 transitions. [2022-07-13 05:26:06,936 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 158. [2022-07-13 05:26:06,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 158 states, 154 states have (on average 1.3051948051948052) internal successors, (201), 153 states have internal predecessors, (201), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-07-13 05:26:06,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 207 transitions. [2022-07-13 05:26:06,939 INFO L392 hiAutomatonCegarLoop]: Abstraction has 158 states and 207 transitions. [2022-07-13 05:26:06,939 INFO L374 stractBuchiCegarLoop]: Abstraction has 158 states and 207 transitions. [2022-07-13 05:26:06,939 INFO L287 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-07-13 05:26:06,939 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 158 states and 207 transitions. [2022-07-13 05:26:06,940 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 148 [2022-07-13 05:26:06,940 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-13 05:26:06,941 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-13 05:26:06,941 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-13 05:26:06,941 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-13 05:26:06,942 INFO L752 eck$LassoCheckResult]: Stem: 487#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 419#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~switch19#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc31#1.base, main_#t~malloc31#1.offset, main_#t~mem32#1.base, main_#t~mem32#1.offset, main_#t~mem33#1.base, main_#t~mem33#1.offset, main_#t~memset~res34#1.base, main_#t~memset~res34#1.offset, main_#t~mem35#1.base, main_#t~mem35#1.offset, main_#t~mem36#1.base, main_#t~mem36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~malloc40#1.base, main_#t~malloc40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~memset~res47#1.base, main_#t~memset~res47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~post58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem69#1, main_#t~mem68#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~short72#1, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~malloc75#1.base, main_#t~malloc75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~memset~res80#1.base, main_#t~memset~res80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem85#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem89#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1, main_#t~ite90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~pre104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~post109#1, main_#t~mem113#1, main_#t~mem111#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem112#1, main_#t~mem114#1, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~post92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem132#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ite135#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post5#1, main_#t~mem140#1, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~ite143#1.base, main_#t~ite143#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~short148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem171#1, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1, main_#t~post175#1, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~post186#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite145#1.base, main_#t~ite145#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~i~0#1 := 0; 420#L750-3 [2022-07-13 05:26:06,943 INFO L754 eck$LassoCheckResult]: Loop: 420#L750-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 459#L752 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 460#L752-2 call write~int(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4); 462#L757-124 havoc main_~_ha_hashv~0#1; 461#L757-49 goto; 445#L757-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 336#L757-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 337#L757-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch19#1 := 11 == main_~_hj_k~0#1; 404#L757-10 assume main_#t~switch19#1;call main_#t~mem20#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem20#1 % 256);havoc main_#t~mem20#1; 485#L757-12 main_#t~switch19#1 := main_#t~switch19#1 || 10 == main_~_hj_k~0#1; 385#L757-13 assume main_#t~switch19#1;call main_#t~mem21#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem21#1 % 256);havoc main_#t~mem21#1; 334#L757-15 main_#t~switch19#1 := main_#t~switch19#1 || 9 == main_~_hj_k~0#1; 335#L757-16 assume main_#t~switch19#1;call main_#t~mem22#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem22#1 % 256);havoc main_#t~mem22#1; 478#L757-18 main_#t~switch19#1 := main_#t~switch19#1 || 8 == main_~_hj_k~0#1; 464#L757-19 assume main_#t~switch19#1;call main_#t~mem23#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem23#1 % 256);havoc main_#t~mem23#1; 371#L757-21 main_#t~switch19#1 := main_#t~switch19#1 || 7 == main_~_hj_k~0#1; 372#L757-22 assume !main_#t~switch19#1; 444#L757-24 main_#t~switch19#1 := main_#t~switch19#1 || 6 == main_~_hj_k~0#1; 408#L757-25 assume main_#t~switch19#1;call main_#t~mem25#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem25#1 % 256);havoc main_#t~mem25#1; 409#L757-27 main_#t~switch19#1 := main_#t~switch19#1 || 5 == main_~_hj_k~0#1; 484#L757-28 assume main_#t~switch19#1;call main_#t~mem26#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + main_#t~mem26#1 % 256;havoc main_#t~mem26#1; 482#L757-30 main_#t~switch19#1 := main_#t~switch19#1 || 4 == main_~_hj_k~0#1; 481#L757-31 assume main_#t~switch19#1;call main_#t~mem27#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem27#1 % 256);havoc main_#t~mem27#1; 349#L757-33 main_#t~switch19#1 := main_#t~switch19#1 || 3 == main_~_hj_k~0#1; 350#L757-34 assume main_#t~switch19#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; 440#L757-36 main_#t~switch19#1 := main_#t~switch19#1 || 2 == main_~_hj_k~0#1; 423#L757-37 assume main_#t~switch19#1;call main_#t~mem29#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem29#1 % 256);havoc main_#t~mem29#1; 424#L757-39 main_#t~switch19#1 := main_#t~switch19#1 || 1 == main_~_hj_k~0#1; 373#L757-40 assume main_#t~switch19#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem30#1 % 256;havoc main_#t~mem30#1; 356#L757-42 havoc main_#t~switch19#1; 357#L757-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8192 || 0 == main_~_ha_hashv~0#1 / 8192) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 256 * main_~_hj_i~0#1 || 0 == 256 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 8192 || 0 == main_~_hj_j~0#1 / 8192) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 4096 || 0 == main_~_ha_hashv~0#1 / 4096) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 65536 * main_~_hj_i~0#1 || 0 == 65536 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32 || 0 == main_~_hj_j~0#1 / 32) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8 || 0 == main_~_ha_hashv~0#1 / 8) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 1024 * main_~_hj_i~0#1 || 0 == 1024 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32768 || 0 == main_~_hj_j~0#1 / 32768) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); 414#L757-44 goto; 467#L757-46 goto; 468#L757-48 goto; 415#L757-122 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 416#L757-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem48#1.base, main_#t~mem48#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem48#1.base, main_#t~mem48#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem48#1.base, main_#t~mem48#1.offset; 473#L757-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem49#1.base, main_#t~mem49#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem50#1.base, main_#t~mem50#1.offset := read~$Pointer$(main_#t~mem49#1.base, 16 + main_#t~mem49#1.offset, 4);call main_#t~mem51#1.base, main_#t~mem51#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem52#1 := read~int(main_#t~mem51#1.base, 20 + main_#t~mem51#1.offset, 4);call write~$Pointer$(main_#t~mem50#1.base, main_#t~mem50#1.offset - main_#t~mem52#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem49#1.base, main_#t~mem49#1.offset;havoc main_#t~mem50#1.base, main_#t~mem50#1.offset;havoc main_#t~mem51#1.base, main_#t~mem51#1.offset;havoc main_#t~mem52#1;call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_#t~mem53#1.base, 16 + main_#t~mem53#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem54#1.base, 8 + main_#t~mem54#1.offset, 4);havoc main_#t~mem53#1.base, main_#t~mem53#1.offset;havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem55#1.base, 16 + main_#t~mem55#1.offset, 4);havoc main_#t~mem55#1.base, main_#t~mem55#1.offset; 474#L757-66 goto; 376#L757-120 havoc main_~_ha_bkt~0#1;call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1 := read~int(main_#t~mem56#1.base, 12 + main_#t~mem56#1.offset, 4);main_#t~post58#1 := main_#t~mem57#1;call write~int(1 + main_#t~post58#1, main_#t~mem56#1.base, 12 + main_#t~mem56#1.offset, 4);havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1;havoc main_#t~post58#1; 442#L757-71 call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem60#1 := read~int(main_#t~mem59#1.base, 4 + main_#t~mem59#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem60#1 - 1 then 0 else (if 1 == main_#t~mem60#1 - 1 then (if 1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 >= 0 then main_~_ha_hashv~0#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1))) else (if 1 == main_~_ha_hashv~0#1 then (if 1 == main_#t~mem60#1 - 1 || 0 == main_#t~mem60#1 - 1 then main_#t~mem60#1 - 1 else (if main_#t~mem60#1 - 1 >= 0 then (main_#t~mem60#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1))));havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;havoc main_#t~mem60#1; 443#L757-70 goto; 456#L757-118 call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem62#1.base, main_#t~mem62#1.offset := read~$Pointer$(main_#t~mem61#1.base, main_#t~mem61#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem62#1.base, main_#t~mem62#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;havoc main_#t~mem62#1.base, main_#t~mem62#1.offset;call main_#t~mem63#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post64#1 := main_#t~mem63#1;call write~int(1 + main_#t~post64#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem63#1;havoc main_#t~post64#1;call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 463#L757-73 assume main_#t~mem66#1.base != 0 || main_#t~mem66#1.offset != 0;havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem67#1.base, 12 + main_#t~mem67#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 397#L757-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem69#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem68#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short72#1 := main_#t~mem69#1 % 4294967296 >= 10 * (1 + main_#t~mem68#1) % 4294967296; 398#L757-76 assume main_#t~short72#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem71#1 := read~int(main_#t~mem70#1.base, 36 + main_#t~mem70#1.offset, 4);main_#t~short72#1 := 0 == main_#t~mem71#1 % 4294967296; 476#L757-78 assume !main_#t~short72#1;havoc main_#t~mem69#1;havoc main_#t~mem68#1;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;havoc main_#t~short72#1; 380#L757-117 goto; 381#L757-119 goto; 394#L757-121 goto; 395#L757-123 goto; 432#L750-2 main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 420#L750-3 [2022-07-13 05:26:06,943 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 05:26:06,943 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 2 times [2022-07-13 05:26:06,944 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 05:26:06,944 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [95803599] [2022-07-13 05:26:06,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 05:26:06,944 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 05:26:06,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 05:26:06,951 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 05:26:06,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 05:26:06,958 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 05:26:06,958 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 05:26:06,958 INFO L85 PathProgramCache]: Analyzing trace with hash 155189657, now seen corresponding path program 1 times [2022-07-13 05:26:06,959 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 05:26:06,959 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2051258717] [2022-07-13 05:26:06,959 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 05:26:06,959 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 05:26:07,064 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-07-13 05:26:07,067 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2129503090] [2022-07-13 05:26:07,067 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 05:26:07,067 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-13 05:26:07,068 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 05:26:07,078 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-13 05:26:07,095 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-07-13 05:26:07,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 05:26:07,600 INFO L263 TraceCheckSpWp]: Trace formula consists of 1823 conjuncts, 3 conjunts are in the unsatisfiable core [2022-07-13 05:26:07,622 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 05:26:07,652 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-13 05:26:07,652 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-07-13 05:26:07,653 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-13 05:26:07,653 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2051258717] [2022-07-13 05:26:07,653 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-07-13 05:26:07,654 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2129503090] [2022-07-13 05:26:07,654 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2129503090] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-13 05:26:07,654 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-13 05:26:07,654 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-07-13 05:26:07,655 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [795938074] [2022-07-13 05:26:07,655 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-13 05:26:07,655 INFO L769 eck$LassoCheckResult]: loop already infeasible [2022-07-13 05:26:07,656 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-13 05:26:07,657 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-07-13 05:26:07,657 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-13 05:26:07,657 INFO L87 Difference]: Start difference. First operand 158 states and 207 transitions. cyclomatic complexity: 53 Second operand has 3 states, 3 states have (on average 17.0) internal successors, (51), 3 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 05:26:07,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-13 05:26:07,729 INFO L93 Difference]: Finished difference Result 179 states and 228 transitions. [2022-07-13 05:26:07,730 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-07-13 05:26:07,730 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 179 states and 228 transitions. [2022-07-13 05:26:07,732 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 169 [2022-07-13 05:26:07,733 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 179 states to 179 states and 228 transitions. [2022-07-13 05:26:07,733 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 179 [2022-07-13 05:26:07,734 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 179 [2022-07-13 05:26:07,734 INFO L73 IsDeterministic]: Start isDeterministic. Operand 179 states and 228 transitions. [2022-07-13 05:26:07,735 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-13 05:26:07,735 INFO L369 hiAutomatonCegarLoop]: Abstraction has 179 states and 228 transitions. [2022-07-13 05:26:07,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states and 228 transitions. [2022-07-13 05:26:07,740 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 178. [2022-07-13 05:26:07,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 178 states, 174 states have (on average 1.2701149425287357) internal successors, (221), 173 states have internal predecessors, (221), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-07-13 05:26:07,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 227 transitions. [2022-07-13 05:26:07,742 INFO L392 hiAutomatonCegarLoop]: Abstraction has 178 states and 227 transitions. [2022-07-13 05:26:07,742 INFO L374 stractBuchiCegarLoop]: Abstraction has 178 states and 227 transitions. [2022-07-13 05:26:07,742 INFO L287 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-07-13 05:26:07,742 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 178 states and 227 transitions. [2022-07-13 05:26:07,743 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 168 [2022-07-13 05:26:07,743 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-13 05:26:07,743 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-13 05:26:07,744 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-13 05:26:07,744 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-13 05:26:07,744 INFO L752 eck$LassoCheckResult]: Stem: 987#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 912#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~switch19#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc31#1.base, main_#t~malloc31#1.offset, main_#t~mem32#1.base, main_#t~mem32#1.offset, main_#t~mem33#1.base, main_#t~mem33#1.offset, main_#t~memset~res34#1.base, main_#t~memset~res34#1.offset, main_#t~mem35#1.base, main_#t~mem35#1.offset, main_#t~mem36#1.base, main_#t~mem36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~malloc40#1.base, main_#t~malloc40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~memset~res47#1.base, main_#t~memset~res47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~post58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem69#1, main_#t~mem68#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~short72#1, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~malloc75#1.base, main_#t~malloc75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~memset~res80#1.base, main_#t~memset~res80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem85#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem89#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1, main_#t~ite90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~pre104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~post109#1, main_#t~mem113#1, main_#t~mem111#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem112#1, main_#t~mem114#1, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~post92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem132#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ite135#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post5#1, main_#t~mem140#1, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~ite143#1.base, main_#t~ite143#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~short148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem171#1, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1, main_#t~post175#1, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~post186#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite145#1.base, main_#t~ite145#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~i~0#1 := 0; 913#L750-3 [2022-07-13 05:26:07,744 INFO L754 eck$LassoCheckResult]: Loop: 913#L750-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 954#L752 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 955#L752-2 call write~int(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4); 957#L757-124 havoc main_~_ha_hashv~0#1; 956#L757-49 goto; 940#L757-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 829#L757-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 830#L757-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch19#1 := 11 == main_~_hj_k~0#1; 897#L757-10 assume main_#t~switch19#1;call main_#t~mem20#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem20#1 % 256);havoc main_#t~mem20#1; 982#L757-12 main_#t~switch19#1 := main_#t~switch19#1 || 10 == main_~_hj_k~0#1; 878#L757-13 assume main_#t~switch19#1;call main_#t~mem21#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem21#1 % 256);havoc main_#t~mem21#1; 827#L757-15 main_#t~switch19#1 := main_#t~switch19#1 || 9 == main_~_hj_k~0#1; 828#L757-16 assume main_#t~switch19#1;call main_#t~mem22#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem22#1 % 256);havoc main_#t~mem22#1; 974#L757-18 main_#t~switch19#1 := main_#t~switch19#1 || 8 == main_~_hj_k~0#1; 959#L757-19 assume main_#t~switch19#1;call main_#t~mem23#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem23#1 % 256);havoc main_#t~mem23#1; 960#L757-21 main_#t~switch19#1 := main_#t~switch19#1 || 7 == main_~_hj_k~0#1; 939#L757-22 assume main_#t~switch19#1;call main_#t~mem24#1 := read~int(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem24#1 % 256);havoc main_#t~mem24#1; 938#L757-24 main_#t~switch19#1 := main_#t~switch19#1 || 6 == main_~_hj_k~0#1; 901#L757-25 assume main_#t~switch19#1;call main_#t~mem25#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem25#1 % 256);havoc main_#t~mem25#1; 902#L757-27 main_#t~switch19#1 := main_#t~switch19#1 || 5 == main_~_hj_k~0#1; 981#L757-28 assume main_#t~switch19#1;call main_#t~mem26#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + main_#t~mem26#1 % 256;havoc main_#t~mem26#1; 979#L757-30 main_#t~switch19#1 := main_#t~switch19#1 || 4 == main_~_hj_k~0#1; 977#L757-31 assume main_#t~switch19#1;call main_#t~mem27#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem27#1 % 256);havoc main_#t~mem27#1; 978#L757-33 main_#t~switch19#1 := main_#t~switch19#1 || 3 == main_~_hj_k~0#1; 933#L757-34 assume main_#t~switch19#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; 934#L757-36 main_#t~switch19#1 := main_#t~switch19#1 || 2 == main_~_hj_k~0#1; 916#L757-37 assume main_#t~switch19#1;call main_#t~mem29#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem29#1 % 256);havoc main_#t~mem29#1; 917#L757-39 main_#t~switch19#1 := main_#t~switch19#1 || 1 == main_~_hj_k~0#1; 868#L757-40 assume main_#t~switch19#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem30#1 % 256;havoc main_#t~mem30#1; 849#L757-42 havoc main_#t~switch19#1; 850#L757-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8192 || 0 == main_~_ha_hashv~0#1 / 8192) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 256 * main_~_hj_i~0#1 || 0 == 256 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 8192 || 0 == main_~_hj_j~0#1 / 8192) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 4096 || 0 == main_~_ha_hashv~0#1 / 4096) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 65536 * main_~_hj_i~0#1 || 0 == 65536 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32 || 0 == main_~_hj_j~0#1 / 32) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8 || 0 == main_~_ha_hashv~0#1 / 8) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 1024 * main_~_hj_i~0#1 || 0 == 1024 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32768 || 0 == main_~_hj_j~0#1 / 32768) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); 911#L757-44 goto; 963#L757-46 goto; 964#L757-48 goto; 907#L757-122 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 908#L757-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem48#1.base, main_#t~mem48#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem48#1.base, main_#t~mem48#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem48#1.base, main_#t~mem48#1.offset; 969#L757-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem49#1.base, main_#t~mem49#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem50#1.base, main_#t~mem50#1.offset := read~$Pointer$(main_#t~mem49#1.base, 16 + main_#t~mem49#1.offset, 4);call main_#t~mem51#1.base, main_#t~mem51#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem52#1 := read~int(main_#t~mem51#1.base, 20 + main_#t~mem51#1.offset, 4);call write~$Pointer$(main_#t~mem50#1.base, main_#t~mem50#1.offset - main_#t~mem52#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem49#1.base, main_#t~mem49#1.offset;havoc main_#t~mem50#1.base, main_#t~mem50#1.offset;havoc main_#t~mem51#1.base, main_#t~mem51#1.offset;havoc main_#t~mem52#1;call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_#t~mem53#1.base, 16 + main_#t~mem53#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem54#1.base, 8 + main_#t~mem54#1.offset, 4);havoc main_#t~mem53#1.base, main_#t~mem53#1.offset;havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem55#1.base, 16 + main_#t~mem55#1.offset, 4);havoc main_#t~mem55#1.base, main_#t~mem55#1.offset; 970#L757-66 goto; 869#L757-120 havoc main_~_ha_bkt~0#1;call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1 := read~int(main_#t~mem56#1.base, 12 + main_#t~mem56#1.offset, 4);main_#t~post58#1 := main_#t~mem57#1;call write~int(1 + main_#t~post58#1, main_#t~mem56#1.base, 12 + main_#t~mem56#1.offset, 4);havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1;havoc main_#t~post58#1; 936#L757-71 call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem60#1 := read~int(main_#t~mem59#1.base, 4 + main_#t~mem59#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem60#1 - 1 then 0 else (if 1 == main_#t~mem60#1 - 1 then (if 1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 >= 0 then main_~_ha_hashv~0#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1))) else (if 1 == main_~_ha_hashv~0#1 then (if 1 == main_#t~mem60#1 - 1 || 0 == main_#t~mem60#1 - 1 then main_#t~mem60#1 - 1 else (if main_#t~mem60#1 - 1 >= 0 then (main_#t~mem60#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1))));havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;havoc main_#t~mem60#1; 937#L757-70 goto; 951#L757-118 call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem62#1.base, main_#t~mem62#1.offset := read~$Pointer$(main_#t~mem61#1.base, main_#t~mem61#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem62#1.base, main_#t~mem62#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;havoc main_#t~mem62#1.base, main_#t~mem62#1.offset;call main_#t~mem63#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post64#1 := main_#t~mem63#1;call write~int(1 + main_#t~post64#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem63#1;havoc main_#t~post64#1;call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 958#L757-73 assume main_#t~mem66#1.base != 0 || main_#t~mem66#1.offset != 0;havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem67#1.base, 12 + main_#t~mem67#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 890#L757-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem69#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem68#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short72#1 := main_#t~mem69#1 % 4294967296 >= 10 * (1 + main_#t~mem68#1) % 4294967296; 891#L757-76 assume main_#t~short72#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem71#1 := read~int(main_#t~mem70#1.base, 36 + main_#t~mem70#1.offset, 4);main_#t~short72#1 := 0 == main_#t~mem71#1 % 4294967296; 972#L757-78 assume !main_#t~short72#1;havoc main_#t~mem69#1;havoc main_#t~mem68#1;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;havoc main_#t~short72#1; 873#L757-117 goto; 874#L757-119 goto; 885#L757-121 goto; 886#L757-123 goto; 925#L750-2 main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 913#L750-3 [2022-07-13 05:26:07,745 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 05:26:07,745 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 3 times [2022-07-13 05:26:07,745 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 05:26:07,745 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1431890184] [2022-07-13 05:26:07,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 05:26:07,746 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 05:26:07,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 05:26:07,753 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 05:26:07,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 05:26:07,762 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 05:26:07,762 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 05:26:07,762 INFO L85 PathProgramCache]: Analyzing trace with hash 999195159, now seen corresponding path program 1 times [2022-07-13 05:26:07,762 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 05:26:07,762 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [551014862] [2022-07-13 05:26:07,763 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 05:26:07,763 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 05:26:07,851 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-07-13 05:26:07,852 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1592366581] [2022-07-13 05:26:07,852 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 05:26:07,852 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-13 05:26:07,852 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 05:26:07,854 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-13 05:26:07,854 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-07-13 05:26:08,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 05:26:08,375 INFO L263 TraceCheckSpWp]: Trace formula consists of 1829 conjuncts, 3 conjunts are in the unsatisfiable core [2022-07-13 05:26:08,378 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 05:26:08,394 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-13 05:26:08,394 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-07-13 05:26:08,394 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-13 05:26:08,394 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [551014862] [2022-07-13 05:26:08,394 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-07-13 05:26:08,395 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1592366581] [2022-07-13 05:26:08,395 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1592366581] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-13 05:26:08,395 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-13 05:26:08,395 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-07-13 05:26:08,395 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1477848741] [2022-07-13 05:26:08,395 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-13 05:26:08,396 INFO L769 eck$LassoCheckResult]: loop already infeasible [2022-07-13 05:26:08,396 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-13 05:26:08,396 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-07-13 05:26:08,396 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-07-13 05:26:08,396 INFO L87 Difference]: Start difference. First operand 178 states and 227 transitions. cyclomatic complexity: 53 Second operand has 4 states, 4 states have (on average 12.75) internal successors, (51), 4 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 05:26:08,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-13 05:26:08,487 INFO L93 Difference]: Finished difference Result 235 states and 299 transitions. [2022-07-13 05:26:08,487 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-07-13 05:26:08,488 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 235 states and 299 transitions. [2022-07-13 05:26:08,489 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 215 [2022-07-13 05:26:08,491 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 235 states to 235 states and 299 transitions. [2022-07-13 05:26:08,491 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 235 [2022-07-13 05:26:08,492 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 235 [2022-07-13 05:26:08,492 INFO L73 IsDeterministic]: Start isDeterministic. Operand 235 states and 299 transitions. [2022-07-13 05:26:08,493 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-13 05:26:08,493 INFO L369 hiAutomatonCegarLoop]: Abstraction has 235 states and 299 transitions. [2022-07-13 05:26:08,493 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 235 states and 299 transitions. [2022-07-13 05:26:08,497 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 235 to 164. [2022-07-13 05:26:08,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 164 states, 160 states have (on average 1.25) internal successors, (200), 159 states have internal predecessors, (200), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-07-13 05:26:08,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 206 transitions. [2022-07-13 05:26:08,498 INFO L392 hiAutomatonCegarLoop]: Abstraction has 164 states and 206 transitions. [2022-07-13 05:26:08,498 INFO L374 stractBuchiCegarLoop]: Abstraction has 164 states and 206 transitions. [2022-07-13 05:26:08,498 INFO L287 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-07-13 05:26:08,499 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 164 states and 206 transitions. [2022-07-13 05:26:08,499 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 154 [2022-07-13 05:26:08,499 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-13 05:26:08,499 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-13 05:26:08,500 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-13 05:26:08,500 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-13 05:26:08,500 INFO L752 eck$LassoCheckResult]: Stem: 1554#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 1484#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~switch19#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc31#1.base, main_#t~malloc31#1.offset, main_#t~mem32#1.base, main_#t~mem32#1.offset, main_#t~mem33#1.base, main_#t~mem33#1.offset, main_#t~memset~res34#1.base, main_#t~memset~res34#1.offset, main_#t~mem35#1.base, main_#t~mem35#1.offset, main_#t~mem36#1.base, main_#t~mem36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~malloc40#1.base, main_#t~malloc40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~memset~res47#1.base, main_#t~memset~res47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~post58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem69#1, main_#t~mem68#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~short72#1, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~malloc75#1.base, main_#t~malloc75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~memset~res80#1.base, main_#t~memset~res80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem85#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem89#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1, main_#t~ite90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~pre104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~post109#1, main_#t~mem113#1, main_#t~mem111#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem112#1, main_#t~mem114#1, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~post92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem132#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ite135#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post5#1, main_#t~mem140#1, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~ite143#1.base, main_#t~ite143#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~short148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem171#1, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1, main_#t~post175#1, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~post186#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite145#1.base, main_#t~ite145#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~i~0#1 := 0; 1485#L750-3 [2022-07-13 05:26:08,501 INFO L754 eck$LassoCheckResult]: Loop: 1485#L750-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 1525#L752 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1526#L752-2 call write~int(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4); 1528#L757-124 havoc main_~_ha_hashv~0#1; 1527#L757-49 goto; 1511#L757-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1401#L757-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1402#L757-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch19#1 := 11 == main_~_hj_k~0#1; 1469#L757-10 assume !main_#t~switch19#1; 1552#L757-12 main_#t~switch19#1 := main_#t~switch19#1 || 10 == main_~_hj_k~0#1; 1450#L757-13 assume !main_#t~switch19#1; 1399#L757-15 main_#t~switch19#1 := main_#t~switch19#1 || 9 == main_~_hj_k~0#1; 1400#L757-16 assume !main_#t~switch19#1; 1542#L757-18 main_#t~switch19#1 := main_#t~switch19#1 || 8 == main_~_hj_k~0#1; 1530#L757-19 assume !main_#t~switch19#1; 1436#L757-21 main_#t~switch19#1 := main_#t~switch19#1 || 7 == main_~_hj_k~0#1; 1437#L757-22 assume !main_#t~switch19#1; 1508#L757-24 main_#t~switch19#1 := main_#t~switch19#1 || 6 == main_~_hj_k~0#1; 1473#L757-25 assume !main_#t~switch19#1; 1474#L757-27 main_#t~switch19#1 := main_#t~switch19#1 || 5 == main_~_hj_k~0#1; 1551#L757-28 assume !main_#t~switch19#1; 1549#L757-30 main_#t~switch19#1 := main_#t~switch19#1 || 4 == main_~_hj_k~0#1; 1547#L757-31 assume !main_#t~switch19#1; 1414#L757-33 main_#t~switch19#1 := main_#t~switch19#1 || 3 == main_~_hj_k~0#1; 1415#L757-34 assume main_#t~switch19#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; 1506#L757-36 main_#t~switch19#1 := main_#t~switch19#1 || 2 == main_~_hj_k~0#1; 1488#L757-37 assume main_#t~switch19#1;call main_#t~mem29#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem29#1 % 256);havoc main_#t~mem29#1; 1489#L757-39 main_#t~switch19#1 := main_#t~switch19#1 || 1 == main_~_hj_k~0#1; 1440#L757-40 assume main_#t~switch19#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem30#1 % 256;havoc main_#t~mem30#1; 1421#L757-42 havoc main_#t~switch19#1; 1422#L757-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8192 || 0 == main_~_ha_hashv~0#1 / 8192) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 256 * main_~_hj_i~0#1 || 0 == 256 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 8192 || 0 == main_~_hj_j~0#1 / 8192) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 4096 || 0 == main_~_ha_hashv~0#1 / 4096) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 65536 * main_~_hj_i~0#1 || 0 == 65536 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32 || 0 == main_~_hj_j~0#1 / 32) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8 || 0 == main_~_ha_hashv~0#1 / 8) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 1024 * main_~_hj_i~0#1 || 0 == 1024 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32768 || 0 == main_~_hj_j~0#1 / 32768) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); 1479#L757-44 goto; 1535#L757-46 goto; 1536#L757-48 goto; 1480#L757-122 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1481#L757-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem48#1.base, main_#t~mem48#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem48#1.base, main_#t~mem48#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem48#1.base, main_#t~mem48#1.offset; 1539#L757-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem49#1.base, main_#t~mem49#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem50#1.base, main_#t~mem50#1.offset := read~$Pointer$(main_#t~mem49#1.base, 16 + main_#t~mem49#1.offset, 4);call main_#t~mem51#1.base, main_#t~mem51#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem52#1 := read~int(main_#t~mem51#1.base, 20 + main_#t~mem51#1.offset, 4);call write~$Pointer$(main_#t~mem50#1.base, main_#t~mem50#1.offset - main_#t~mem52#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem49#1.base, main_#t~mem49#1.offset;havoc main_#t~mem50#1.base, main_#t~mem50#1.offset;havoc main_#t~mem51#1.base, main_#t~mem51#1.offset;havoc main_#t~mem52#1;call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_#t~mem53#1.base, 16 + main_#t~mem53#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem54#1.base, 8 + main_#t~mem54#1.offset, 4);havoc main_#t~mem53#1.base, main_#t~mem53#1.offset;havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem55#1.base, 16 + main_#t~mem55#1.offset, 4);havoc main_#t~mem55#1.base, main_#t~mem55#1.offset; 1540#L757-66 goto; 1443#L757-120 havoc main_~_ha_bkt~0#1;call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1 := read~int(main_#t~mem56#1.base, 12 + main_#t~mem56#1.offset, 4);main_#t~post58#1 := main_#t~mem57#1;call write~int(1 + main_#t~post58#1, main_#t~mem56#1.base, 12 + main_#t~mem56#1.offset, 4);havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1;havoc main_#t~post58#1; 1509#L757-71 call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem60#1 := read~int(main_#t~mem59#1.base, 4 + main_#t~mem59#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem60#1 - 1 then 0 else (if 1 == main_#t~mem60#1 - 1 then (if 1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 >= 0 then main_~_ha_hashv~0#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1))) else (if 1 == main_~_ha_hashv~0#1 then (if 1 == main_#t~mem60#1 - 1 || 0 == main_#t~mem60#1 - 1 then main_#t~mem60#1 - 1 else (if main_#t~mem60#1 - 1 >= 0 then (main_#t~mem60#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1))));havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;havoc main_#t~mem60#1; 1510#L757-70 goto; 1524#L757-118 call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem62#1.base, main_#t~mem62#1.offset := read~$Pointer$(main_#t~mem61#1.base, main_#t~mem61#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem62#1.base, main_#t~mem62#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;havoc main_#t~mem62#1.base, main_#t~mem62#1.offset;call main_#t~mem63#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post64#1 := main_#t~mem63#1;call write~int(1 + main_#t~post64#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem63#1;havoc main_#t~post64#1;call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1529#L757-73 assume main_#t~mem66#1.base != 0 || main_#t~mem66#1.offset != 0;havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem67#1.base, 12 + main_#t~mem67#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 1464#L757-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem69#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem68#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short72#1 := main_#t~mem69#1 % 4294967296 >= 10 * (1 + main_#t~mem68#1) % 4294967296; 1465#L757-76 assume main_#t~short72#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem71#1 := read~int(main_#t~mem70#1.base, 36 + main_#t~mem70#1.offset, 4);main_#t~short72#1 := 0 == main_#t~mem71#1 % 4294967296; 1543#L757-78 assume !main_#t~short72#1;havoc main_#t~mem69#1;havoc main_#t~mem68#1;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;havoc main_#t~short72#1; 1446#L757-117 goto; 1447#L757-119 goto; 1459#L757-121 goto; 1460#L757-123 goto; 1499#L750-2 main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 1485#L750-3 [2022-07-13 05:26:08,501 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 05:26:08,501 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 4 times [2022-07-13 05:26:08,501 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 05:26:08,502 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [151861662] [2022-07-13 05:26:08,502 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 05:26:08,502 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 05:26:08,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 05:26:08,510 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 05:26:08,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 05:26:08,520 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 05:26:08,520 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 05:26:08,521 INFO L85 PathProgramCache]: Analyzing trace with hash 511024167, now seen corresponding path program 1 times [2022-07-13 05:26:08,521 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 05:26:08,521 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [310030865] [2022-07-13 05:26:08,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 05:26:08,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 05:26:08,594 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-07-13 05:26:08,595 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [170191967] [2022-07-13 05:26:08,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 05:26:08,595 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-13 05:26:08,595 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 05:26:08,597 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-13 05:26:08,598 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-07-13 05:26:09,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 05:26:09,147 INFO L263 TraceCheckSpWp]: Trace formula consists of 1781 conjuncts, 4 conjunts are in the unsatisfiable core [2022-07-13 05:26:09,149 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 05:26:09,184 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-13 05:26:09,186 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-07-13 05:26:09,186 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-13 05:26:09,186 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [310030865] [2022-07-13 05:26:09,186 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-07-13 05:26:09,186 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [170191967] [2022-07-13 05:26:09,187 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [170191967] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-13 05:26:09,187 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-13 05:26:09,187 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-07-13 05:26:09,187 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1792493900] [2022-07-13 05:26:09,187 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-13 05:26:09,188 INFO L769 eck$LassoCheckResult]: loop already infeasible [2022-07-13 05:26:09,188 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-13 05:26:09,188 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-07-13 05:26:09,189 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-07-13 05:26:09,189 INFO L87 Difference]: Start difference. First operand 164 states and 206 transitions. cyclomatic complexity: 46 Second operand has 5 states, 5 states have (on average 10.2) internal successors, (51), 5 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 05:26:09,300 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-13 05:26:09,300 INFO L93 Difference]: Finished difference Result 323 states and 404 transitions. [2022-07-13 05:26:09,301 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-07-13 05:26:09,301 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 323 states and 404 transitions. [2022-07-13 05:26:09,303 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 309 [2022-07-13 05:26:09,304 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 323 states to 323 states and 404 transitions. [2022-07-13 05:26:09,304 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 323 [2022-07-13 05:26:09,305 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 323 [2022-07-13 05:26:09,305 INFO L73 IsDeterministic]: Start isDeterministic. Operand 323 states and 404 transitions. [2022-07-13 05:26:09,306 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-13 05:26:09,306 INFO L369 hiAutomatonCegarLoop]: Abstraction has 323 states and 404 transitions. [2022-07-13 05:26:09,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 323 states and 404 transitions. [2022-07-13 05:26:09,313 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 323 to 187. [2022-07-13 05:26:09,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 187 states, 183 states have (on average 1.2295081967213115) internal successors, (225), 182 states have internal predecessors, (225), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-07-13 05:26:09,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 187 states to 187 states and 231 transitions. [2022-07-13 05:26:09,314 INFO L392 hiAutomatonCegarLoop]: Abstraction has 187 states and 231 transitions. [2022-07-13 05:26:09,314 INFO L374 stractBuchiCegarLoop]: Abstraction has 187 states and 231 transitions. [2022-07-13 05:26:09,314 INFO L287 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-07-13 05:26:09,314 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 187 states and 231 transitions. [2022-07-13 05:26:09,315 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 177 [2022-07-13 05:26:09,315 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-13 05:26:09,315 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-13 05:26:09,316 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-13 05:26:09,316 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-13 05:26:09,316 INFO L752 eck$LassoCheckResult]: Stem: 2213#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 2131#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~switch19#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc31#1.base, main_#t~malloc31#1.offset, main_#t~mem32#1.base, main_#t~mem32#1.offset, main_#t~mem33#1.base, main_#t~mem33#1.offset, main_#t~memset~res34#1.base, main_#t~memset~res34#1.offset, main_#t~mem35#1.base, main_#t~mem35#1.offset, main_#t~mem36#1.base, main_#t~mem36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~malloc40#1.base, main_#t~malloc40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~memset~res47#1.base, main_#t~memset~res47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~post58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem69#1, main_#t~mem68#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~short72#1, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~malloc75#1.base, main_#t~malloc75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~memset~res80#1.base, main_#t~memset~res80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem85#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem89#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1, main_#t~ite90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~pre104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~post109#1, main_#t~mem113#1, main_#t~mem111#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem112#1, main_#t~mem114#1, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~post92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem132#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ite135#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post5#1, main_#t~mem140#1, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~ite143#1.base, main_#t~ite143#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~short148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem171#1, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1, main_#t~post175#1, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~post186#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite145#1.base, main_#t~ite145#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~i~0#1 := 0; 2132#L750-3 [2022-07-13 05:26:09,316 INFO L754 eck$LassoCheckResult]: Loop: 2132#L750-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 2175#L752 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2176#L752-2 call write~int(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4); 2178#L757-124 havoc main_~_ha_hashv~0#1; 2177#L757-49 goto; 2160#L757-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2161#L757-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2115#L757-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch19#1 := 11 == main_~_hj_k~0#1; 2116#L757-10 assume !main_#t~switch19#1; 2215#L757-12 main_#t~switch19#1 := main_#t~switch19#1 || 10 == main_~_hj_k~0#1; 2216#L757-13 assume !main_#t~switch19#1; 2044#L757-15 main_#t~switch19#1 := main_#t~switch19#1 || 9 == main_~_hj_k~0#1; 2045#L757-16 assume !main_#t~switch19#1; 2218#L757-18 main_#t~switch19#1 := main_#t~switch19#1 || 8 == main_~_hj_k~0#1; 2219#L757-19 assume !main_#t~switch19#1; 2081#L757-21 main_#t~switch19#1 := main_#t~switch19#1 || 7 == main_~_hj_k~0#1; 2082#L757-22 assume !main_#t~switch19#1; 2154#L757-24 main_#t~switch19#1 := main_#t~switch19#1 || 6 == main_~_hj_k~0#1; 2155#L757-25 assume !main_#t~switch19#1; 2204#L757-27 main_#t~switch19#1 := main_#t~switch19#1 || 5 == main_~_hj_k~0#1; 2205#L757-28 assume !main_#t~switch19#1; 2201#L757-30 main_#t~switch19#1 := main_#t~switch19#1 || 4 == main_~_hj_k~0#1; 2202#L757-31 assume !main_#t~switch19#1; 2227#L757-33 main_#t~switch19#1 := main_#t~switch19#1 || 3 == main_~_hj_k~0#1; 2225#L757-34 assume !main_#t~switch19#1; 2223#L757-36 main_#t~switch19#1 := main_#t~switch19#1 || 2 == main_~_hj_k~0#1; 2135#L757-37 assume !main_#t~switch19#1; 2136#L757-39 main_#t~switch19#1 := main_#t~switch19#1 || 1 == main_~_hj_k~0#1; 2085#L757-40 assume !main_#t~switch19#1; 2066#L757-42 havoc main_#t~switch19#1; 2067#L757-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8192 || 0 == main_~_ha_hashv~0#1 / 8192) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 256 * main_~_hj_i~0#1 || 0 == 256 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 8192 || 0 == main_~_hj_j~0#1 / 8192) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 4096 || 0 == main_~_ha_hashv~0#1 / 4096) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 65536 * main_~_hj_i~0#1 || 0 == 65536 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32 || 0 == main_~_hj_j~0#1 / 32) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8 || 0 == main_~_ha_hashv~0#1 / 8) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 1024 * main_~_hj_i~0#1 || 0 == 1024 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32768 || 0 == main_~_hj_j~0#1 / 32768) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); 2126#L757-44 goto; 2186#L757-46 goto; 2187#L757-48 goto; 2127#L757-122 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2128#L757-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem48#1.base, main_#t~mem48#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem48#1.base, main_#t~mem48#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem48#1.base, main_#t~mem48#1.offset; 2190#L757-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem49#1.base, main_#t~mem49#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem50#1.base, main_#t~mem50#1.offset := read~$Pointer$(main_#t~mem49#1.base, 16 + main_#t~mem49#1.offset, 4);call main_#t~mem51#1.base, main_#t~mem51#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem52#1 := read~int(main_#t~mem51#1.base, 20 + main_#t~mem51#1.offset, 4);call write~$Pointer$(main_#t~mem50#1.base, main_#t~mem50#1.offset - main_#t~mem52#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem49#1.base, main_#t~mem49#1.offset;havoc main_#t~mem50#1.base, main_#t~mem50#1.offset;havoc main_#t~mem51#1.base, main_#t~mem51#1.offset;havoc main_#t~mem52#1;call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_#t~mem53#1.base, 16 + main_#t~mem53#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem54#1.base, 8 + main_#t~mem54#1.offset, 4);havoc main_#t~mem53#1.base, main_#t~mem53#1.offset;havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem55#1.base, 16 + main_#t~mem55#1.offset, 4);havoc main_#t~mem55#1.base, main_#t~mem55#1.offset; 2191#L757-66 goto; 2088#L757-120 havoc main_~_ha_bkt~0#1;call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1 := read~int(main_#t~mem56#1.base, 12 + main_#t~mem56#1.offset, 4);main_#t~post58#1 := main_#t~mem57#1;call write~int(1 + main_#t~post58#1, main_#t~mem56#1.base, 12 + main_#t~mem56#1.offset, 4);havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1;havoc main_#t~post58#1; 2156#L757-71 call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem60#1 := read~int(main_#t~mem59#1.base, 4 + main_#t~mem59#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem60#1 - 1 then 0 else (if 1 == main_#t~mem60#1 - 1 then (if 1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 >= 0 then main_~_ha_hashv~0#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1))) else (if 1 == main_~_ha_hashv~0#1 then (if 1 == main_#t~mem60#1 - 1 || 0 == main_#t~mem60#1 - 1 then main_#t~mem60#1 - 1 else (if main_#t~mem60#1 - 1 >= 0 then (main_#t~mem60#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1))));havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;havoc main_#t~mem60#1; 2157#L757-70 goto; 2174#L757-118 call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem62#1.base, main_#t~mem62#1.offset := read~$Pointer$(main_#t~mem61#1.base, main_#t~mem61#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem62#1.base, main_#t~mem62#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;havoc main_#t~mem62#1.base, main_#t~mem62#1.offset;call main_#t~mem63#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post64#1 := main_#t~mem63#1;call write~int(1 + main_#t~post64#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem63#1;havoc main_#t~post64#1;call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2179#L757-73 assume main_#t~mem66#1.base != 0 || main_#t~mem66#1.offset != 0;havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem67#1.base, 12 + main_#t~mem67#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 2110#L757-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem69#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem68#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short72#1 := main_#t~mem69#1 % 4294967296 >= 10 * (1 + main_#t~mem68#1) % 4294967296; 2111#L757-76 assume main_#t~short72#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem71#1 := read~int(main_#t~mem70#1.base, 36 + main_#t~mem70#1.offset, 4);main_#t~short72#1 := 0 == main_#t~mem71#1 % 4294967296; 2195#L757-78 assume !main_#t~short72#1;havoc main_#t~mem69#1;havoc main_#t~mem68#1;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;havoc main_#t~short72#1; 2091#L757-117 goto; 2092#L757-119 goto; 2105#L757-121 goto; 2106#L757-123 goto; 2146#L750-2 main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 2132#L750-3 [2022-07-13 05:26:09,317 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 05:26:09,317 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 5 times [2022-07-13 05:26:09,317 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 05:26:09,317 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [842188315] [2022-07-13 05:26:09,317 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 05:26:09,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 05:26:09,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 05:26:09,326 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 05:26:09,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 05:26:09,335 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 05:26:09,335 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 05:26:09,335 INFO L85 PathProgramCache]: Analyzing trace with hash 769362477, now seen corresponding path program 1 times [2022-07-13 05:26:09,335 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 05:26:09,335 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [300202251] [2022-07-13 05:26:09,335 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 05:26:09,336 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 05:26:09,401 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-07-13 05:26:09,401 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1008016175] [2022-07-13 05:26:09,401 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 05:26:09,401 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-13 05:26:09,402 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 05:26:09,403 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-13 05:26:09,404 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-07-13 05:26:10,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-13 05:26:10,037 INFO L263 TraceCheckSpWp]: Trace formula consists of 1763 conjuncts, 4 conjunts are in the unsatisfiable core [2022-07-13 05:26:10,068 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-13 05:26:10,092 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-13 05:26:10,093 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-07-13 05:26:10,093 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-13 05:26:10,093 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [300202251] [2022-07-13 05:26:10,093 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-07-13 05:26:10,093 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1008016175] [2022-07-13 05:26:10,093 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1008016175] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-13 05:26:10,093 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-13 05:26:10,094 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-07-13 05:26:10,094 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1182930046] [2022-07-13 05:26:10,094 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-13 05:26:10,094 INFO L769 eck$LassoCheckResult]: loop already infeasible [2022-07-13 05:26:10,094 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-13 05:26:10,094 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-07-13 05:26:10,095 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-07-13 05:26:10,095 INFO L87 Difference]: Start difference. First operand 187 states and 231 transitions. cyclomatic complexity: 48 Second operand has 4 states, 4 states have (on average 12.75) internal successors, (51), 4 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-13 05:26:10,130 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-13 05:26:10,130 INFO L93 Difference]: Finished difference Result 225 states and 284 transitions. [2022-07-13 05:26:10,130 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-07-13 05:26:10,131 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 225 states and 284 transitions. [2022-07-13 05:26:10,132 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 205 [2022-07-13 05:26:10,133 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 225 states to 225 states and 284 transitions. [2022-07-13 05:26:10,133 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 225 [2022-07-13 05:26:10,133 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 225 [2022-07-13 05:26:10,134 INFO L73 IsDeterministic]: Start isDeterministic. Operand 225 states and 284 transitions. [2022-07-13 05:26:10,134 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-13 05:26:10,134 INFO L369 hiAutomatonCegarLoop]: Abstraction has 225 states and 284 transitions. [2022-07-13 05:26:10,134 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225 states and 284 transitions. [2022-07-13 05:26:10,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225 to 155. [2022-07-13 05:26:10,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 155 states, 151 states have (on average 1.2317880794701987) internal successors, (186), 150 states have internal predecessors, (186), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-07-13 05:26:10,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 192 transitions. [2022-07-13 05:26:10,138 INFO L392 hiAutomatonCegarLoop]: Abstraction has 155 states and 192 transitions. [2022-07-13 05:26:10,138 INFO L374 stractBuchiCegarLoop]: Abstraction has 155 states and 192 transitions. [2022-07-13 05:26:10,138 INFO L287 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-07-13 05:26:10,138 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 155 states and 192 transitions. [2022-07-13 05:26:10,139 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 145 [2022-07-13 05:26:10,139 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-13 05:26:10,139 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-13 05:26:10,139 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-13 05:26:10,139 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-13 05:26:10,139 INFO L752 eck$LassoCheckResult]: Stem: 2765#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 2697#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~switch19#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc31#1.base, main_#t~malloc31#1.offset, main_#t~mem32#1.base, main_#t~mem32#1.offset, main_#t~mem33#1.base, main_#t~mem33#1.offset, main_#t~memset~res34#1.base, main_#t~memset~res34#1.offset, main_#t~mem35#1.base, main_#t~mem35#1.offset, main_#t~mem36#1.base, main_#t~mem36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~malloc40#1.base, main_#t~malloc40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~memset~res47#1.base, main_#t~memset~res47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~post58#1, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1, main_#t~post64#1, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem69#1, main_#t~mem68#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~short72#1, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~malloc75#1.base, main_#t~malloc75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~memset~res80#1.base, main_#t~memset~res80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem85#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem89#1, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1, main_#t~ite90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~pre104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem108#1, main_#t~post109#1, main_#t~mem113#1, main_#t~mem111#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem112#1, main_#t~mem114#1, main_#t~post115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~post92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1.base, main_#t~mem129#1.offset, main_#t~mem132#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~ite135#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post5#1, main_#t~mem140#1, main_#t~mem141#1, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~ite143#1.base, main_#t~ite143#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~short148#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1.base, main_#t~mem163#1.offset, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem171#1, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1, main_#t~post175#1, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~post186#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite145#1.base, main_#t~ite145#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~i~0#1 := 0; 2698#L750-3 [2022-07-13 05:26:10,140 INFO L754 eck$LassoCheckResult]: Loop: 2698#L750-3 assume !!(main_~i~0#1 < 10);call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset; 2737#L752 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2738#L752-2 call write~int(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4); 2740#L757-124 havoc main_~_ha_hashv~0#1; 2739#L757-49 goto; 2723#L757-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2615#L757-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2616#L757-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch19#1 := 11 == main_~_hj_k~0#1; 2682#L757-10 assume !main_#t~switch19#1; 2763#L757-12 main_#t~switch19#1 := main_#t~switch19#1 || 10 == main_~_hj_k~0#1; 2663#L757-13 assume !main_#t~switch19#1; 2613#L757-15 main_#t~switch19#1 := main_#t~switch19#1 || 9 == main_~_hj_k~0#1; 2614#L757-16 assume !main_#t~switch19#1; 2754#L757-18 main_#t~switch19#1 := main_#t~switch19#1 || 8 == main_~_hj_k~0#1; 2742#L757-19 assume !main_#t~switch19#1; 2649#L757-21 main_#t~switch19#1 := main_#t~switch19#1 || 7 == main_~_hj_k~0#1; 2650#L757-22 assume !main_#t~switch19#1; 2720#L757-24 main_#t~switch19#1 := main_#t~switch19#1 || 6 == main_~_hj_k~0#1; 2686#L757-25 assume !main_#t~switch19#1; 2687#L757-27 main_#t~switch19#1 := main_#t~switch19#1 || 5 == main_~_hj_k~0#1; 2762#L757-28 assume !main_#t~switch19#1; 2760#L757-30 main_#t~switch19#1 := main_#t~switch19#1 || 4 == main_~_hj_k~0#1; 2759#L757-31 assume main_#t~switch19#1;call main_#t~mem27#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem27#1 % 256);havoc main_#t~mem27#1; 2627#L757-33 main_#t~switch19#1 := main_#t~switch19#1 || 3 == main_~_hj_k~0#1; 2628#L757-34 assume main_#t~switch19#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; 2718#L757-36 main_#t~switch19#1 := main_#t~switch19#1 || 2 == main_~_hj_k~0#1; 2701#L757-37 assume main_#t~switch19#1;call main_#t~mem29#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem29#1 % 256);havoc main_#t~mem29#1; 2702#L757-39 main_#t~switch19#1 := main_#t~switch19#1 || 1 == main_~_hj_k~0#1; 2653#L757-40 assume main_#t~switch19#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem30#1 % 256;havoc main_#t~mem30#1; 2634#L757-42 havoc main_#t~switch19#1; 2635#L757-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8192 || 0 == main_~_ha_hashv~0#1 / 8192) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 256 * main_~_hj_i~0#1 || 0 == 256 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 8192 || 0 == main_~_hj_j~0#1 / 8192) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 4096 || 0 == main_~_ha_hashv~0#1 / 4096) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 65536 * main_~_hj_i~0#1 || 0 == 65536 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32 || 0 == main_~_hj_j~0#1 / 32) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if (1 == main_~_hj_i~0#1 || 0 == main_~_hj_i~0#1) && (1 == main_~_ha_hashv~0#1 / 8 || 0 == main_~_ha_hashv~0#1 / 8) then (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else 1) else (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else ~bitwiseXOr(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if (1 == main_~_hj_j~0#1 || 0 == main_~_hj_j~0#1) && (1 == 1024 * main_~_hj_i~0#1 || 0 == 1024 * main_~_hj_i~0#1) then (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else 1) else (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else ~bitwiseXOr(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if (1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1) && (1 == main_~_hj_j~0#1 / 32768 || 0 == main_~_hj_j~0#1 / 32768) then (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else 1) else (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else ~bitwiseXOr(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); 2694#L757-44 goto; 2747#L757-46 goto; 2748#L757-48 goto; 2695#L757-122 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2696#L757-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem48#1.base, main_#t~mem48#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem48#1.base, main_#t~mem48#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem48#1.base, main_#t~mem48#1.offset; 2751#L757-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem49#1.base, main_#t~mem49#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem50#1.base, main_#t~mem50#1.offset := read~$Pointer$(main_#t~mem49#1.base, 16 + main_#t~mem49#1.offset, 4);call main_#t~mem51#1.base, main_#t~mem51#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem52#1 := read~int(main_#t~mem51#1.base, 20 + main_#t~mem51#1.offset, 4);call write~$Pointer$(main_#t~mem50#1.base, main_#t~mem50#1.offset - main_#t~mem52#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem49#1.base, main_#t~mem49#1.offset;havoc main_#t~mem50#1.base, main_#t~mem50#1.offset;havoc main_#t~mem51#1.base, main_#t~mem51#1.offset;havoc main_#t~mem52#1;call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_#t~mem53#1.base, 16 + main_#t~mem53#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem54#1.base, 8 + main_#t~mem54#1.offset, 4);havoc main_#t~mem53#1.base, main_#t~mem53#1.offset;havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem55#1.base, 16 + main_#t~mem55#1.offset, 4);havoc main_#t~mem55#1.base, main_#t~mem55#1.offset; 2752#L757-66 goto; 2656#L757-120 havoc main_~_ha_bkt~0#1;call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1 := read~int(main_#t~mem56#1.base, 12 + main_#t~mem56#1.offset, 4);main_#t~post58#1 := main_#t~mem57#1;call write~int(1 + main_#t~post58#1, main_#t~mem56#1.base, 12 + main_#t~mem56#1.offset, 4);havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1;havoc main_#t~post58#1; 2721#L757-71 call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem60#1 := read~int(main_#t~mem59#1.base, 4 + main_#t~mem59#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem60#1 - 1 then 0 else (if 1 == main_#t~mem60#1 - 1 then (if 1 == main_~_ha_hashv~0#1 || 0 == main_~_ha_hashv~0#1 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 >= 0 then main_~_ha_hashv~0#1 % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1))) else (if 1 == main_~_ha_hashv~0#1 then (if 1 == main_#t~mem60#1 - 1 || 0 == main_#t~mem60#1 - 1 then main_#t~mem60#1 - 1 else (if main_#t~mem60#1 - 1 >= 0 then (main_#t~mem60#1 - 1) % 2 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1))) else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem60#1 - 1))));havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;havoc main_#t~mem60#1; 2722#L757-70 goto; 2736#L757-118 call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem62#1.base, main_#t~mem62#1.offset := read~$Pointer$(main_#t~mem61#1.base, main_#t~mem61#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem62#1.base, main_#t~mem62#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;havoc main_#t~mem62#1.base, main_#t~mem62#1.offset;call main_#t~mem63#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post64#1 := main_#t~mem63#1;call write~int(1 + main_#t~post64#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem63#1;havoc main_#t~post64#1;call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2741#L757-73 assume main_#t~mem66#1.base != 0 || main_#t~mem66#1.offset != 0;havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem67#1.base, 12 + main_#t~mem67#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 2677#L757-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem69#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem68#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short72#1 := main_#t~mem69#1 % 4294967296 >= 10 * (1 + main_#t~mem68#1) % 4294967296; 2678#L757-76 assume main_#t~short72#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem71#1 := read~int(main_#t~mem70#1.base, 36 + main_#t~mem70#1.offset, 4);main_#t~short72#1 := 0 == main_#t~mem71#1 % 4294967296; 2755#L757-78 assume !main_#t~short72#1;havoc main_#t~mem69#1;havoc main_#t~mem68#1;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;havoc main_#t~short72#1; 2659#L757-117 goto; 2660#L757-119 goto; 2673#L757-121 goto; 2674#L757-123 goto; 2712#L750-2 main_#t~post5#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 2698#L750-3 [2022-07-13 05:26:10,140 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 05:26:10,140 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 6 times [2022-07-13 05:26:10,140 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 05:26:10,140 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1160659141] [2022-07-13 05:26:10,140 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 05:26:10,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 05:26:10,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 05:26:10,151 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-13 05:26:10,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 05:26:10,160 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-13 05:26:10,160 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-13 05:26:10,160 INFO L85 PathProgramCache]: Analyzing trace with hash -875179227, now seen corresponding path program 1 times [2022-07-13 05:26:10,161 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-13 05:26:10,161 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [130932759] [2022-07-13 05:26:10,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 05:26:10,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-13 05:26:10,237 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-07-13 05:26:10,238 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2125451572] [2022-07-13 05:26:10,238 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-13 05:26:10,238 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-13 05:26:10,238 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-13 05:26:10,240 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-13 05:26:10,241 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-07-13 05:26:20,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-13 05:26:20,428 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.