./Ultimate.py --spec ../sv-benchmarks/c/properties/valid-memsafety.prp --file ../sv-benchmarks/c/memsafety-ext/dll_extends_pointer.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 6c24879c Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerMemDerefMemtrack.xml -i ../sv-benchmarks/c/memsafety-ext/dll_extends_pointer.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash b19ed65fc9d9f8e19f4d644b05d37e3da28cb107a90eedb15c652c094a7f23f1 --- Real Ultimate output --- This is Ultimate 0.2.2-?-6c24879 [2022-07-12 18:38:48,179 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-07-12 18:38:48,181 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-07-12 18:38:48,210 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-07-12 18:38:48,212 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-07-12 18:38:48,213 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-07-12 18:38:48,217 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-07-12 18:38:48,221 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-07-12 18:38:48,222 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-07-12 18:38:48,226 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-07-12 18:38:48,227 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-07-12 18:38:48,228 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-07-12 18:38:48,228 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-07-12 18:38:48,230 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-07-12 18:38:48,231 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-07-12 18:38:48,232 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-07-12 18:38:48,233 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-07-12 18:38:48,234 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-07-12 18:38:48,236 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-07-12 18:38:48,240 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-07-12 18:38:48,241 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-07-12 18:38:48,242 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-07-12 18:38:48,243 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-07-12 18:38:48,243 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-07-12 18:38:48,244 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-07-12 18:38:48,247 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-07-12 18:38:48,247 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-07-12 18:38:48,248 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-07-12 18:38:48,248 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-07-12 18:38:48,249 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-07-12 18:38:48,249 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-07-12 18:38:48,249 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-07-12 18:38:48,251 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-07-12 18:38:48,251 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-07-12 18:38:48,251 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-07-12 18:38:48,252 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-07-12 18:38:48,252 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-07-12 18:38:48,253 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-07-12 18:38:48,253 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-07-12 18:38:48,253 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-07-12 18:38:48,253 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-07-12 18:38:48,255 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-07-12 18:38:48,255 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2022-07-12 18:38:48,277 INFO L113 SettingsManager]: Loading preferences was successful [2022-07-12 18:38:48,278 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-07-12 18:38:48,278 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-07-12 18:38:48,278 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-07-12 18:38:48,279 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-07-12 18:38:48,279 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-07-12 18:38:48,279 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-07-12 18:38:48,279 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-07-12 18:38:48,280 INFO L138 SettingsManager]: * Use SBE=true [2022-07-12 18:38:48,280 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-07-12 18:38:48,280 INFO L138 SettingsManager]: * sizeof long=4 [2022-07-12 18:38:48,280 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-07-12 18:38:48,281 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-07-12 18:38:48,281 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-07-12 18:38:48,281 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-07-12 18:38:48,281 INFO L138 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2022-07-12 18:38:48,281 INFO L138 SettingsManager]: * Bitprecise bitfields=true [2022-07-12 18:38:48,281 INFO L138 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2022-07-12 18:38:48,281 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-07-12 18:38:48,282 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-07-12 18:38:48,282 INFO L138 SettingsManager]: * sizeof long double=12 [2022-07-12 18:38:48,282 INFO L138 SettingsManager]: * Use constant arrays=true [2022-07-12 18:38:48,282 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-07-12 18:38:48,282 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-07-12 18:38:48,282 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-07-12 18:38:48,282 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-07-12 18:38:48,283 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-07-12 18:38:48,283 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-07-12 18:38:48,283 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-07-12 18:38:48,283 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-07-12 18:38:48,283 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> b19ed65fc9d9f8e19f4d644b05d37e3da28cb107a90eedb15c652c094a7f23f1 [2022-07-12 18:38:48,489 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-07-12 18:38:48,519 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-07-12 18:38:48,521 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-07-12 18:38:48,522 INFO L271 PluginConnector]: Initializing CDTParser... [2022-07-12 18:38:48,522 INFO L275 PluginConnector]: CDTParser initialized [2022-07-12 18:38:48,523 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/memsafety-ext/dll_extends_pointer.i [2022-07-12 18:38:48,560 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/2d84c5beb/6fb117612d554ca2bcdf88698cf81b20/FLAG90c26236b [2022-07-12 18:38:48,974 INFO L306 CDTParser]: Found 1 translation units. [2022-07-12 18:38:48,974 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/memsafety-ext/dll_extends_pointer.i [2022-07-12 18:38:48,986 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/2d84c5beb/6fb117612d554ca2bcdf88698cf81b20/FLAG90c26236b [2022-07-12 18:38:49,345 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/2d84c5beb/6fb117612d554ca2bcdf88698cf81b20 [2022-07-12 18:38:49,347 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-07-12 18:38:49,348 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-07-12 18:38:49,349 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-07-12 18:38:49,350 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-07-12 18:38:49,352 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-07-12 18:38:49,352 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.07 06:38:49" (1/1) ... [2022-07-12 18:38:49,353 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6c7e6ba4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 06:38:49, skipping insertion in model container [2022-07-12 18:38:49,353 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.07 06:38:49" (1/1) ... [2022-07-12 18:38:49,358 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-07-12 18:38:49,390 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-07-12 18:38:49,624 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-12 18:38:49,633 INFO L203 MainTranslator]: Completed pre-run [2022-07-12 18:38:49,657 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-12 18:38:49,676 INFO L208 MainTranslator]: Completed translation [2022-07-12 18:38:49,676 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 06:38:49 WrapperNode [2022-07-12 18:38:49,676 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-07-12 18:38:49,677 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-07-12 18:38:49,677 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-07-12 18:38:49,678 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-07-12 18:38:49,683 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 06:38:49" (1/1) ... [2022-07-12 18:38:49,702 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 06:38:49" (1/1) ... [2022-07-12 18:38:49,721 INFO L137 Inliner]: procedures = 123, calls = 21, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 63 [2022-07-12 18:38:49,721 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-07-12 18:38:49,722 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-07-12 18:38:49,722 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-07-12 18:38:49,723 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-07-12 18:38:49,728 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 06:38:49" (1/1) ... [2022-07-12 18:38:49,728 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 06:38:49" (1/1) ... [2022-07-12 18:38:49,735 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 06:38:49" (1/1) ... [2022-07-12 18:38:49,736 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 06:38:49" (1/1) ... [2022-07-12 18:38:49,748 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 06:38:49" (1/1) ... [2022-07-12 18:38:49,750 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 06:38:49" (1/1) ... [2022-07-12 18:38:49,756 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 06:38:49" (1/1) ... [2022-07-12 18:38:49,758 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-07-12 18:38:49,760 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-07-12 18:38:49,760 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-07-12 18:38:49,761 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-07-12 18:38:49,761 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 06:38:49" (1/1) ... [2022-07-12 18:38:49,766 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-07-12 18:38:49,779 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-12 18:38:49,796 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-07-12 18:38:49,805 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-07-12 18:38:49,824 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-07-12 18:38:49,824 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-07-12 18:38:49,825 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-07-12 18:38:49,825 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-07-12 18:38:49,825 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-07-12 18:38:49,825 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-07-12 18:38:49,826 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-07-12 18:38:49,826 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-07-12 18:38:49,926 INFO L234 CfgBuilder]: Building ICFG [2022-07-12 18:38:49,927 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-07-12 18:38:50,111 INFO L275 CfgBuilder]: Performing block encoding [2022-07-12 18:38:50,115 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-07-12 18:38:50,115 INFO L299 CfgBuilder]: Removed 2 assume(true) statements. [2022-07-12 18:38:50,116 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.07 06:38:50 BoogieIcfgContainer [2022-07-12 18:38:50,116 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-07-12 18:38:50,117 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-07-12 18:38:50,118 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-07-12 18:38:50,120 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-07-12 18:38:50,120 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 12.07 06:38:49" (1/3) ... [2022-07-12 18:38:50,120 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@28f33650 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.07 06:38:50, skipping insertion in model container [2022-07-12 18:38:50,121 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 06:38:49" (2/3) ... [2022-07-12 18:38:50,121 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@28f33650 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.07 06:38:50, skipping insertion in model container [2022-07-12 18:38:50,121 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.07 06:38:50" (3/3) ... [2022-07-12 18:38:50,122 INFO L111 eAbstractionObserver]: Analyzing ICFG dll_extends_pointer.i [2022-07-12 18:38:50,130 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-07-12 18:38:50,131 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 27 error locations. [2022-07-12 18:38:50,158 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-07-12 18:38:50,162 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@77b9e03d, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@37cd30ce [2022-07-12 18:38:50,162 INFO L358 AbstractCegarLoop]: Starting to check reachability of 27 error locations. [2022-07-12 18:38:50,166 INFO L276 IsEmpty]: Start isEmpty. Operand has 59 states, 31 states have (on average 2.064516129032258) internal successors, (64), 58 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:50,171 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2022-07-12 18:38:50,172 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:38:50,172 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1] [2022-07-12 18:38:50,172 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 24 more)] === [2022-07-12 18:38:50,177 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:38:50,178 INFO L85 PathProgramCache]: Analyzing trace with hash 29857, now seen corresponding path program 1 times [2022-07-12 18:38:50,184 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:38:50,185 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [218393351] [2022-07-12 18:38:50,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:38:50,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:38:50,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:38:50,318 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:38:50,318 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:38:50,325 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [218393351] [2022-07-12 18:38:50,326 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [218393351] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:38:50,326 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:38:50,326 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-07-12 18:38:50,328 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [737821766] [2022-07-12 18:38:50,328 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:38:50,331 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-07-12 18:38:50,332 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:38:50,354 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-07-12 18:38:50,355 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-12 18:38:50,357 INFO L87 Difference]: Start difference. First operand has 59 states, 31 states have (on average 2.064516129032258) internal successors, (64), 58 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:50,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:38:50,460 INFO L93 Difference]: Finished difference Result 63 states and 66 transitions. [2022-07-12 18:38:50,461 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-07-12 18:38:50,462 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 3 [2022-07-12 18:38:50,462 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:38:50,467 INFO L225 Difference]: With dead ends: 63 [2022-07-12 18:38:50,468 INFO L226 Difference]: Without dead ends: 59 [2022-07-12 18:38:50,469 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-12 18:38:50,472 INFO L413 NwaCegarLoop]: 26 mSDtfsCounter, 40 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 40 SdHoareTripleChecker+Valid, 33 SdHoareTripleChecker+Invalid, 52 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-07-12 18:38:50,473 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [40 Valid, 33 Invalid, 52 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-07-12 18:38:50,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2022-07-12 18:38:50,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 53. [2022-07-12 18:38:50,496 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 53 states, 33 states have (on average 1.7575757575757576) internal successors, (58), 52 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:50,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 58 transitions. [2022-07-12 18:38:50,499 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 58 transitions. Word has length 3 [2022-07-12 18:38:50,499 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:38:50,499 INFO L495 AbstractCegarLoop]: Abstraction has 53 states and 58 transitions. [2022-07-12 18:38:50,499 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:50,499 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 58 transitions. [2022-07-12 18:38:50,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2022-07-12 18:38:50,500 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:38:50,500 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1] [2022-07-12 18:38:50,500 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-07-12 18:38:50,501 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 24 more)] === [2022-07-12 18:38:50,502 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:38:50,502 INFO L85 PathProgramCache]: Analyzing trace with hash 29858, now seen corresponding path program 1 times [2022-07-12 18:38:50,502 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:38:50,503 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1447602878] [2022-07-12 18:38:50,503 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:38:50,503 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:38:50,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:38:50,561 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:38:50,561 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:38:50,561 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1447602878] [2022-07-12 18:38:50,561 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1447602878] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:38:50,562 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:38:50,562 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-07-12 18:38:50,562 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1144020334] [2022-07-12 18:38:50,562 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:38:50,563 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-07-12 18:38:50,563 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:38:50,564 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-07-12 18:38:50,564 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-12 18:38:50,564 INFO L87 Difference]: Start difference. First operand 53 states and 58 transitions. Second operand has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:50,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:38:50,602 INFO L93 Difference]: Finished difference Result 55 states and 61 transitions. [2022-07-12 18:38:50,602 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-07-12 18:38:50,602 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 3 [2022-07-12 18:38:50,602 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:38:50,603 INFO L225 Difference]: With dead ends: 55 [2022-07-12 18:38:50,603 INFO L226 Difference]: Without dead ends: 55 [2022-07-12 18:38:50,603 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-12 18:38:50,604 INFO L413 NwaCegarLoop]: 37 mSDtfsCounter, 17 mSDsluCounter, 14 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 17 SdHoareTripleChecker+Valid, 51 SdHoareTripleChecker+Invalid, 38 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-07-12 18:38:50,605 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [17 Valid, 51 Invalid, 38 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-07-12 18:38:50,605 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2022-07-12 18:38:50,608 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 48. [2022-07-12 18:38:50,608 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 48 states, 33 states have (on average 1.606060606060606) internal successors, (53), 47 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:50,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 53 transitions. [2022-07-12 18:38:50,609 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 53 transitions. Word has length 3 [2022-07-12 18:38:50,609 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:38:50,609 INFO L495 AbstractCegarLoop]: Abstraction has 48 states and 53 transitions. [2022-07-12 18:38:50,609 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:50,609 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 53 transitions. [2022-07-12 18:38:50,610 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2022-07-12 18:38:50,610 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:38:50,610 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:38:50,610 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-07-12 18:38:50,610 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr14REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 24 more)] === [2022-07-12 18:38:50,611 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:38:50,611 INFO L85 PathProgramCache]: Analyzing trace with hash 1115897518, now seen corresponding path program 1 times [2022-07-12 18:38:50,611 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:38:50,611 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1195120212] [2022-07-12 18:38:50,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:38:50,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:38:50,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:38:50,657 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:38:50,657 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:38:50,658 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1195120212] [2022-07-12 18:38:50,658 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1195120212] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:38:50,658 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:38:50,658 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-07-12 18:38:50,658 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [391336791] [2022-07-12 18:38:50,658 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:38:50,659 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-07-12 18:38:50,659 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:38:50,659 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-07-12 18:38:50,660 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-07-12 18:38:50,660 INFO L87 Difference]: Start difference. First operand 48 states and 53 transitions. Second operand has 4 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 4 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:50,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:38:50,722 INFO L93 Difference]: Finished difference Result 58 states and 61 transitions. [2022-07-12 18:38:50,722 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-07-12 18:38:50,722 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 4 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 10 [2022-07-12 18:38:50,722 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:38:50,723 INFO L225 Difference]: With dead ends: 58 [2022-07-12 18:38:50,723 INFO L226 Difference]: Without dead ends: 58 [2022-07-12 18:38:50,723 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-07-12 18:38:50,724 INFO L413 NwaCegarLoop]: 18 mSDtfsCounter, 47 mSDsluCounter, 13 mSDsCounter, 0 mSdLazyCounter, 65 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 47 SdHoareTripleChecker+Valid, 31 SdHoareTripleChecker+Invalid, 77 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 65 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-07-12 18:38:50,724 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [47 Valid, 31 Invalid, 77 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 65 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-07-12 18:38:50,725 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2022-07-12 18:38:50,727 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 51. [2022-07-12 18:38:50,727 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 37 states have (on average 1.5945945945945945) internal successors, (59), 50 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:50,728 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 59 transitions. [2022-07-12 18:38:50,728 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 59 transitions. Word has length 10 [2022-07-12 18:38:50,728 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:38:50,728 INFO L495 AbstractCegarLoop]: Abstraction has 51 states and 59 transitions. [2022-07-12 18:38:50,728 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 4 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:50,728 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 59 transitions. [2022-07-12 18:38:50,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2022-07-12 18:38:50,728 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:38:50,729 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:38:50,729 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-07-12 18:38:50,729 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr15REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 24 more)] === [2022-07-12 18:38:50,729 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:38:50,729 INFO L85 PathProgramCache]: Analyzing trace with hash 1115897519, now seen corresponding path program 1 times [2022-07-12 18:38:50,729 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:38:50,729 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1601348877] [2022-07-12 18:38:50,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:38:50,730 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:38:50,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:38:50,774 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:38:50,775 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:38:50,775 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1601348877] [2022-07-12 18:38:50,775 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1601348877] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:38:50,775 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:38:50,775 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-07-12 18:38:50,775 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1300366993] [2022-07-12 18:38:50,776 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:38:50,776 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-07-12 18:38:50,776 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:38:50,776 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-07-12 18:38:50,776 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-07-12 18:38:50,777 INFO L87 Difference]: Start difference. First operand 51 states and 59 transitions. Second operand has 4 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 4 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:50,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:38:50,862 INFO L93 Difference]: Finished difference Result 87 states and 99 transitions. [2022-07-12 18:38:50,862 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-07-12 18:38:50,863 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 4 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 10 [2022-07-12 18:38:50,863 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:38:50,865 INFO L225 Difference]: With dead ends: 87 [2022-07-12 18:38:50,866 INFO L226 Difference]: Without dead ends: 87 [2022-07-12 18:38:50,866 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-07-12 18:38:50,874 INFO L413 NwaCegarLoop]: 24 mSDtfsCounter, 47 mSDsluCounter, 29 mSDsCounter, 0 mSdLazyCounter, 75 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 47 SdHoareTripleChecker+Valid, 53 SdHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 75 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-07-12 18:38:50,875 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [47 Valid, 53 Invalid, 86 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 75 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-07-12 18:38:50,876 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2022-07-12 18:38:50,880 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 67. [2022-07-12 18:38:50,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 67 states, 53 states have (on average 1.528301886792453) internal successors, (81), 66 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:50,883 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 81 transitions. [2022-07-12 18:38:50,884 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 81 transitions. Word has length 10 [2022-07-12 18:38:50,885 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:38:50,885 INFO L495 AbstractCegarLoop]: Abstraction has 67 states and 81 transitions. [2022-07-12 18:38:50,885 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 4 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:50,885 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 81 transitions. [2022-07-12 18:38:50,885 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-07-12 18:38:50,886 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:38:50,886 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:38:50,886 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-07-12 18:38:50,886 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 24 more)] === [2022-07-12 18:38:50,886 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:38:50,887 INFO L85 PathProgramCache]: Analyzing trace with hash 233083786, now seen corresponding path program 1 times [2022-07-12 18:38:50,887 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:38:50,887 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [738818568] [2022-07-12 18:38:50,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:38:50,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:38:50,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:38:50,938 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:38:50,939 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:38:50,939 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [738818568] [2022-07-12 18:38:50,939 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [738818568] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:38:50,939 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:38:50,939 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-07-12 18:38:50,940 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [74306858] [2022-07-12 18:38:50,940 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:38:50,941 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-07-12 18:38:50,941 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:38:50,941 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-07-12 18:38:50,941 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-07-12 18:38:50,942 INFO L87 Difference]: Start difference. First operand 67 states and 81 transitions. Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:50,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:38:50,995 INFO L93 Difference]: Finished difference Result 90 states and 104 transitions. [2022-07-12 18:38:50,995 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-07-12 18:38:51,002 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2022-07-12 18:38:51,003 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:38:51,003 INFO L225 Difference]: With dead ends: 90 [2022-07-12 18:38:51,003 INFO L226 Difference]: Without dead ends: 90 [2022-07-12 18:38:51,004 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-07-12 18:38:51,006 INFO L413 NwaCegarLoop]: 27 mSDtfsCounter, 50 mSDsluCounter, 31 mSDsCounter, 0 mSdLazyCounter, 55 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 50 SdHoareTripleChecker+Valid, 58 SdHoareTripleChecker+Invalid, 61 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 55 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-07-12 18:38:51,006 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [50 Valid, 58 Invalid, 61 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 55 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-07-12 18:38:51,007 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2022-07-12 18:38:51,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 67. [2022-07-12 18:38:51,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 67 states, 53 states have (on average 1.490566037735849) internal successors, (79), 66 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:51,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 79 transitions. [2022-07-12 18:38:51,022 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 79 transitions. Word has length 11 [2022-07-12 18:38:51,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:38:51,022 INFO L495 AbstractCegarLoop]: Abstraction has 67 states and 79 transitions. [2022-07-12 18:38:51,022 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:51,023 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 79 transitions. [2022-07-12 18:38:51,025 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-07-12 18:38:51,025 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:38:51,025 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:38:51,025 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-07-12 18:38:51,026 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr11REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 24 more)] === [2022-07-12 18:38:51,026 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:38:51,026 INFO L85 PathProgramCache]: Analyzing trace with hash 683852015, now seen corresponding path program 1 times [2022-07-12 18:38:51,026 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:38:51,026 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [865287940] [2022-07-12 18:38:51,031 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:38:51,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:38:51,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:38:51,137 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:38:51,138 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:38:51,138 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [865287940] [2022-07-12 18:38:51,138 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [865287940] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:38:51,138 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:38:51,138 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-07-12 18:38:51,138 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1813916522] [2022-07-12 18:38:51,139 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:38:51,139 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-07-12 18:38:51,139 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:38:51,139 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-07-12 18:38:51,139 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-07-12 18:38:51,140 INFO L87 Difference]: Start difference. First operand 67 states and 79 transitions. Second operand has 4 states, 3 states have (on average 4.333333333333333) internal successors, (13), 4 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:51,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:38:51,167 INFO L93 Difference]: Finished difference Result 66 states and 78 transitions. [2022-07-12 18:38:51,167 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-07-12 18:38:51,168 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 4.333333333333333) internal successors, (13), 4 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 13 [2022-07-12 18:38:51,168 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:38:51,168 INFO L225 Difference]: With dead ends: 66 [2022-07-12 18:38:51,168 INFO L226 Difference]: Without dead ends: 66 [2022-07-12 18:38:51,168 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-07-12 18:38:51,169 INFO L413 NwaCegarLoop]: 34 mSDtfsCounter, 27 mSDsluCounter, 11 mSDsCounter, 0 mSdLazyCounter, 29 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 27 SdHoareTripleChecker+Valid, 45 SdHoareTripleChecker+Invalid, 33 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 29 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-07-12 18:38:51,169 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [27 Valid, 45 Invalid, 33 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 29 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-07-12 18:38:51,170 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2022-07-12 18:38:51,171 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 66. [2022-07-12 18:38:51,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 66 states, 53 states have (on average 1.471698113207547) internal successors, (78), 65 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:51,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 78 transitions. [2022-07-12 18:38:51,172 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 78 transitions. Word has length 13 [2022-07-12 18:38:51,172 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:38:51,172 INFO L495 AbstractCegarLoop]: Abstraction has 66 states and 78 transitions. [2022-07-12 18:38:51,172 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 4.333333333333333) internal successors, (13), 4 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:51,172 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 78 transitions. [2022-07-12 18:38:51,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-07-12 18:38:51,173 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:38:51,173 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:38:51,173 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-07-12 18:38:51,173 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 24 more)] === [2022-07-12 18:38:51,173 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:38:51,173 INFO L85 PathProgramCache]: Analyzing trace with hash -833158411, now seen corresponding path program 1 times [2022-07-12 18:38:51,174 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:38:51,174 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [762641401] [2022-07-12 18:38:51,174 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:38:51,174 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:38:51,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:38:51,271 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:38:51,271 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:38:51,271 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [762641401] [2022-07-12 18:38:51,271 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [762641401] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:38:51,272 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:38:51,272 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-07-12 18:38:51,272 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [792578113] [2022-07-12 18:38:51,272 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:38:51,272 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-07-12 18:38:51,272 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:38:51,273 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-07-12 18:38:51,273 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2022-07-12 18:38:51,273 INFO L87 Difference]: Start difference. First operand 66 states and 78 transitions. Second operand has 6 states, 6 states have (on average 2.5) internal successors, (15), 6 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:51,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:38:51,367 INFO L93 Difference]: Finished difference Result 73 states and 82 transitions. [2022-07-12 18:38:51,367 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-07-12 18:38:51,368 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.5) internal successors, (15), 6 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 15 [2022-07-12 18:38:51,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:38:51,368 INFO L225 Difference]: With dead ends: 73 [2022-07-12 18:38:51,368 INFO L226 Difference]: Without dead ends: 73 [2022-07-12 18:38:51,368 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2022-07-12 18:38:51,369 INFO L413 NwaCegarLoop]: 29 mSDtfsCounter, 53 mSDsluCounter, 55 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 20 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 53 SdHoareTripleChecker+Valid, 84 SdHoareTripleChecker+Invalid, 100 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 20 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-07-12 18:38:51,369 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [53 Valid, 84 Invalid, 100 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [20 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-07-12 18:38:51,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2022-07-12 18:38:51,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 61. [2022-07-12 18:38:51,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 61 states, 48 states have (on average 1.4375) internal successors, (69), 60 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:51,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 69 transitions. [2022-07-12 18:38:51,371 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 69 transitions. Word has length 15 [2022-07-12 18:38:51,371 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:38:51,371 INFO L495 AbstractCegarLoop]: Abstraction has 61 states and 69 transitions. [2022-07-12 18:38:51,371 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 2.5) internal successors, (15), 6 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:51,371 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 69 transitions. [2022-07-12 18:38:51,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-07-12 18:38:51,372 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:38:51,372 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:38:51,372 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-07-12 18:38:51,372 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 24 more)] === [2022-07-12 18:38:51,372 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:38:51,372 INFO L85 PathProgramCache]: Analyzing trace with hash -833147426, now seen corresponding path program 1 times [2022-07-12 18:38:51,372 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:38:51,372 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [316952292] [2022-07-12 18:38:51,372 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:38:51,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:38:51,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:38:51,422 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:38:51,422 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:38:51,423 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [316952292] [2022-07-12 18:38:51,423 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [316952292] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:38:51,423 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:38:51,423 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-07-12 18:38:51,423 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1014924076] [2022-07-12 18:38:51,423 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:38:51,423 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-07-12 18:38:51,424 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:38:51,424 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-07-12 18:38:51,424 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-07-12 18:38:51,424 INFO L87 Difference]: Start difference. First operand 61 states and 69 transitions. Second operand has 4 states, 3 states have (on average 5.0) internal successors, (15), 4 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:51,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:38:51,473 INFO L93 Difference]: Finished difference Result 77 states and 85 transitions. [2022-07-12 18:38:51,473 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-07-12 18:38:51,473 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 5.0) internal successors, (15), 4 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 15 [2022-07-12 18:38:51,473 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:38:51,474 INFO L225 Difference]: With dead ends: 77 [2022-07-12 18:38:51,474 INFO L226 Difference]: Without dead ends: 77 [2022-07-12 18:38:51,474 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-07-12 18:38:51,475 INFO L413 NwaCegarLoop]: 32 mSDtfsCounter, 41 mSDsluCounter, 28 mSDsCounter, 0 mSdLazyCounter, 63 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 41 SdHoareTripleChecker+Valid, 60 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 63 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-07-12 18:38:51,475 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [41 Valid, 60 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 63 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-07-12 18:38:51,476 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2022-07-12 18:38:51,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 70. [2022-07-12 18:38:51,479 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 70 states, 57 states have (on average 1.4912280701754386) internal successors, (85), 69 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:51,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 85 transitions. [2022-07-12 18:38:51,481 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 85 transitions. Word has length 15 [2022-07-12 18:38:51,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:38:51,482 INFO L495 AbstractCegarLoop]: Abstraction has 70 states and 85 transitions. [2022-07-12 18:38:51,482 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 5.0) internal successors, (15), 4 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:51,482 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 85 transitions. [2022-07-12 18:38:51,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-07-12 18:38:51,483 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:38:51,483 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:38:51,483 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2022-07-12 18:38:51,484 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr14REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 24 more)] === [2022-07-12 18:38:51,486 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:38:51,486 INFO L85 PathProgramCache]: Analyzing trace with hash 321145941, now seen corresponding path program 1 times [2022-07-12 18:38:51,486 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:38:51,486 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1360960782] [2022-07-12 18:38:51,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:38:51,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:38:51,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:38:51,564 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:38:51,564 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:38:51,564 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1360960782] [2022-07-12 18:38:51,565 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1360960782] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 18:38:51,565 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1810225944] [2022-07-12 18:38:51,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:38:51,565 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 18:38:51,565 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-12 18:38:51,567 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-12 18:38:51,567 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-07-12 18:38:51,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:38:51,626 INFO L263 TraceCheckSpWp]: Trace formula consists of 136 conjuncts, 31 conjunts are in the unsatisfiable core [2022-07-12 18:38:51,639 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 18:38:51,679 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 18:38:51,682 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 18:38:51,702 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:38:51,703 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-07-12 18:38:51,707 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:38:51,708 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-07-12 18:38:51,730 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:38:51,731 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-07-12 18:38:51,740 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:38:51,741 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-07-12 18:38:51,797 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:38:51,798 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-07-12 18:38:51,806 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:38:51,807 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:38:51,807 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 10 [2022-07-12 18:38:51,826 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:38:51,826 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-12 18:38:57,335 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2022-07-12 18:38:57,339 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:38:57,339 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:38:57,341 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2022-07-12 18:38:57,347 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2022-07-12 18:38:57,350 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:38:57,350 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:38:57,351 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:38:57,361 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:38:57,362 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1810225944] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-12 18:38:57,362 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-12 18:38:57,362 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 7, 9] total 14 [2022-07-12 18:38:57,362 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [352875349] [2022-07-12 18:38:57,362 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-12 18:38:57,362 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-07-12 18:38:57,363 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:38:57,363 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-07-12 18:38:57,363 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=142, Unknown=4, NotChecked=0, Total=182 [2022-07-12 18:38:57,363 INFO L87 Difference]: Start difference. First operand 70 states and 85 transitions. Second operand has 14 states, 14 states have (on average 2.5714285714285716) internal successors, (36), 14 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:57,572 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:38:57,572 INFO L93 Difference]: Finished difference Result 85 states and 100 transitions. [2022-07-12 18:38:57,572 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-07-12 18:38:57,572 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.5714285714285716) internal successors, (36), 14 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 18 [2022-07-12 18:38:57,573 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:38:57,574 INFO L225 Difference]: With dead ends: 85 [2022-07-12 18:38:57,574 INFO L226 Difference]: Without dead ends: 85 [2022-07-12 18:38:57,574 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 35 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 48 ImplicationChecksByTransitivity, 5.5s TimeCoverageRelationStatistics Valid=104, Invalid=312, Unknown=4, NotChecked=0, Total=420 [2022-07-12 18:38:57,575 INFO L413 NwaCegarLoop]: 28 mSDtfsCounter, 108 mSDsluCounter, 195 mSDsCounter, 0 mSdLazyCounter, 150 mSolverCounterSat, 26 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 108 SdHoareTripleChecker+Valid, 223 SdHoareTripleChecker+Invalid, 238 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 26 IncrementalHoareTripleChecker+Valid, 150 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 62 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-07-12 18:38:57,575 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [108 Valid, 223 Invalid, 238 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [26 Valid, 150 Invalid, 0 Unknown, 62 Unchecked, 0.1s Time] [2022-07-12 18:38:57,575 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2022-07-12 18:38:57,577 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 81. [2022-07-12 18:38:57,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 81 states, 68 states have (on average 1.4264705882352942) internal successors, (97), 80 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:57,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 97 transitions. [2022-07-12 18:38:57,578 INFO L78 Accepts]: Start accepts. Automaton has 81 states and 97 transitions. Word has length 18 [2022-07-12 18:38:57,578 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:38:57,578 INFO L495 AbstractCegarLoop]: Abstraction has 81 states and 97 transitions. [2022-07-12 18:38:57,578 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 2.5714285714285716) internal successors, (36), 14 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:57,578 INFO L276 IsEmpty]: Start isEmpty. Operand 81 states and 97 transitions. [2022-07-12 18:38:57,578 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-07-12 18:38:57,578 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:38:57,579 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:38:57,595 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2022-07-12 18:38:57,779 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 18:38:57,780 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 24 more)] === [2022-07-12 18:38:57,780 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:38:57,780 INFO L85 PathProgramCache]: Analyzing trace with hash 1365588675, now seen corresponding path program 1 times [2022-07-12 18:38:57,780 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:38:57,780 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [687501444] [2022-07-12 18:38:57,780 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:38:57,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:38:57,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:38:57,814 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:38:57,815 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:38:57,815 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [687501444] [2022-07-12 18:38:57,815 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [687501444] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 18:38:57,815 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1945132050] [2022-07-12 18:38:57,815 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:38:57,815 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 18:38:57,815 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-12 18:38:57,816 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-12 18:38:57,817 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-07-12 18:38:57,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:38:57,867 INFO L263 TraceCheckSpWp]: Trace formula consists of 137 conjuncts, 12 conjunts are in the unsatisfiable core [2022-07-12 18:38:57,868 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 18:38:57,901 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-07-12 18:38:57,919 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:38:57,919 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-12 18:38:57,943 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:38:57,943 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1945132050] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-12 18:38:57,944 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-12 18:38:57,944 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 5 [2022-07-12 18:38:57,944 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2071930561] [2022-07-12 18:38:57,944 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-12 18:38:57,944 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-07-12 18:38:57,944 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:38:57,945 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-07-12 18:38:57,945 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2022-07-12 18:38:57,945 INFO L87 Difference]: Start difference. First operand 81 states and 97 transitions. Second operand has 6 states, 5 states have (on average 4.6) internal successors, (23), 6 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:58,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:38:58,017 INFO L93 Difference]: Finished difference Result 83 states and 98 transitions. [2022-07-12 18:38:58,017 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-07-12 18:38:58,017 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 4.6) internal successors, (23), 6 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 19 [2022-07-12 18:38:58,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:38:58,018 INFO L225 Difference]: With dead ends: 83 [2022-07-12 18:38:58,018 INFO L226 Difference]: Without dead ends: 72 [2022-07-12 18:38:58,018 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 36 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2022-07-12 18:38:58,018 INFO L413 NwaCegarLoop]: 35 mSDtfsCounter, 6 mSDsluCounter, 74 mSDsCounter, 0 mSdLazyCounter, 90 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 109 SdHoareTripleChecker+Invalid, 117 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 90 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 25 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-07-12 18:38:58,019 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 109 Invalid, 117 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 90 Invalid, 0 Unknown, 25 Unchecked, 0.0s Time] [2022-07-12 18:38:58,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states. [2022-07-12 18:38:58,020 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 72. [2022-07-12 18:38:58,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 72 states, 59 states have (on average 1.4745762711864407) internal successors, (87), 71 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:58,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 87 transitions. [2022-07-12 18:38:58,021 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 87 transitions. Word has length 19 [2022-07-12 18:38:58,021 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:38:58,021 INFO L495 AbstractCegarLoop]: Abstraction has 72 states and 87 transitions. [2022-07-12 18:38:58,021 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 4.6) internal successors, (23), 6 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:58,021 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 87 transitions. [2022-07-12 18:38:58,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-07-12 18:38:58,022 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:38:58,022 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:38:58,040 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-07-12 18:38:58,237 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-07-12 18:38:58,237 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr15REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 24 more)] === [2022-07-12 18:38:58,238 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:38:58,238 INFO L85 PathProgramCache]: Analyzing trace with hash -190050214, now seen corresponding path program 1 times [2022-07-12 18:38:58,238 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:38:58,238 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [405562733] [2022-07-12 18:38:58,238 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:38:58,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:38:58,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:38:58,276 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:38:58,276 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:38:58,276 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [405562733] [2022-07-12 18:38:58,277 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [405562733] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:38:58,277 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:38:58,277 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-07-12 18:38:58,277 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1952875759] [2022-07-12 18:38:58,277 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:38:58,277 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-07-12 18:38:58,277 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:38:58,278 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-07-12 18:38:58,279 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-07-12 18:38:58,279 INFO L87 Difference]: Start difference. First operand 72 states and 87 transitions. Second operand has 5 states, 4 states have (on average 4.75) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:58,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:38:58,336 INFO L93 Difference]: Finished difference Result 81 states and 88 transitions. [2022-07-12 18:38:58,336 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-07-12 18:38:58,337 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 4.75) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 19 [2022-07-12 18:38:58,337 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:38:58,337 INFO L225 Difference]: With dead ends: 81 [2022-07-12 18:38:58,337 INFO L226 Difference]: Without dead ends: 81 [2022-07-12 18:38:58,338 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2022-07-12 18:38:58,338 INFO L413 NwaCegarLoop]: 24 mSDtfsCounter, 46 mSDsluCounter, 35 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 46 SdHoareTripleChecker+Valid, 59 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-07-12 18:38:58,338 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [46 Valid, 59 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-07-12 18:38:58,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81 states. [2022-07-12 18:38:58,342 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81 to 68. [2022-07-12 18:38:58,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 68 states, 56 states have (on average 1.3928571428571428) internal successors, (78), 67 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:58,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 78 transitions. [2022-07-12 18:38:58,342 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 78 transitions. Word has length 19 [2022-07-12 18:38:58,343 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:38:58,343 INFO L495 AbstractCegarLoop]: Abstraction has 68 states and 78 transitions. [2022-07-12 18:38:58,344 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 4.75) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:58,344 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 78 transitions. [2022-07-12 18:38:58,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-07-12 18:38:58,346 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:38:58,346 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:38:58,346 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2022-07-12 18:38:58,347 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 24 more)] === [2022-07-12 18:38:58,347 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:38:58,347 INFO L85 PathProgramCache]: Analyzing trace with hash -36338646, now seen corresponding path program 1 times [2022-07-12 18:38:58,347 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:38:58,347 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1288016874] [2022-07-12 18:38:58,347 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:38:58,348 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:38:58,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:38:58,451 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:38:58,451 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:38:58,451 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1288016874] [2022-07-12 18:38:58,451 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1288016874] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:38:58,452 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:38:58,452 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-07-12 18:38:58,452 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1591559687] [2022-07-12 18:38:58,452 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:38:58,452 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-07-12 18:38:58,452 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:38:58,453 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-07-12 18:38:58,453 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-07-12 18:38:58,453 INFO L87 Difference]: Start difference. First operand 68 states and 78 transitions. Second operand has 7 states, 6 states have (on average 4.0) internal successors, (24), 7 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:58,586 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:38:58,586 INFO L93 Difference]: Finished difference Result 87 states and 95 transitions. [2022-07-12 18:38:58,586 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-07-12 18:38:58,586 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 4.0) internal successors, (24), 7 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 24 [2022-07-12 18:38:58,587 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:38:58,587 INFO L225 Difference]: With dead ends: 87 [2022-07-12 18:38:58,587 INFO L226 Difference]: Without dead ends: 87 [2022-07-12 18:38:58,587 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=107, Unknown=0, NotChecked=0, Total=156 [2022-07-12 18:38:58,587 INFO L413 NwaCegarLoop]: 43 mSDtfsCounter, 59 mSDsluCounter, 108 mSDsCounter, 0 mSdLazyCounter, 142 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 59 SdHoareTripleChecker+Valid, 151 SdHoareTripleChecker+Invalid, 149 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 142 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-07-12 18:38:58,588 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [59 Valid, 151 Invalid, 149 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 142 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-07-12 18:38:58,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2022-07-12 18:38:58,589 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 68. [2022-07-12 18:38:58,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 68 states, 56 states have (on average 1.375) internal successors, (77), 67 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:58,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 77 transitions. [2022-07-12 18:38:58,589 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 77 transitions. Word has length 24 [2022-07-12 18:38:58,589 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:38:58,589 INFO L495 AbstractCegarLoop]: Abstraction has 68 states and 77 transitions. [2022-07-12 18:38:58,589 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 4.0) internal successors, (24), 7 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:58,589 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 77 transitions. [2022-07-12 18:38:58,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-07-12 18:38:58,590 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:38:58,590 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:38:58,590 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2022-07-12 18:38:58,590 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr21ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 24 more)] === [2022-07-12 18:38:58,590 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:38:58,590 INFO L85 PathProgramCache]: Analyzing trace with hash -1126497925, now seen corresponding path program 1 times [2022-07-12 18:38:58,590 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:38:58,590 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1813131486] [2022-07-12 18:38:58,590 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:38:58,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:38:58,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:38:58,657 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:38:58,657 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:38:58,657 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1813131486] [2022-07-12 18:38:58,657 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1813131486] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:38:58,657 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:38:58,657 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-07-12 18:38:58,658 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [274908701] [2022-07-12 18:38:58,658 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:38:58,658 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-07-12 18:38:58,658 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:38:58,658 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-07-12 18:38:58,659 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-07-12 18:38:58,659 INFO L87 Difference]: Start difference. First operand 68 states and 77 transitions. Second operand has 7 states, 6 states have (on average 4.166666666666667) internal successors, (25), 7 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:58,796 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:38:58,796 INFO L93 Difference]: Finished difference Result 86 states and 94 transitions. [2022-07-12 18:38:58,797 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-07-12 18:38:58,797 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 4.166666666666667) internal successors, (25), 7 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 25 [2022-07-12 18:38:58,797 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:38:58,797 INFO L225 Difference]: With dead ends: 86 [2022-07-12 18:38:58,797 INFO L226 Difference]: Without dead ends: 86 [2022-07-12 18:38:58,798 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=107, Unknown=0, NotChecked=0, Total=156 [2022-07-12 18:38:58,798 INFO L413 NwaCegarLoop]: 39 mSDtfsCounter, 50 mSDsluCounter, 86 mSDsCounter, 0 mSdLazyCounter, 169 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 50 SdHoareTripleChecker+Valid, 125 SdHoareTripleChecker+Invalid, 179 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 169 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-07-12 18:38:58,798 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [50 Valid, 125 Invalid, 179 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 169 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-07-12 18:38:58,799 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states. [2022-07-12 18:38:58,799 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 68. [2022-07-12 18:38:58,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 68 states, 56 states have (on average 1.3571428571428572) internal successors, (76), 67 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:58,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 76 transitions. [2022-07-12 18:38:58,800 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 76 transitions. Word has length 25 [2022-07-12 18:38:58,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:38:58,800 INFO L495 AbstractCegarLoop]: Abstraction has 68 states and 76 transitions. [2022-07-12 18:38:58,800 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 4.166666666666667) internal successors, (25), 7 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:58,801 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 76 transitions. [2022-07-12 18:38:58,801 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-07-12 18:38:58,801 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:38:58,801 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:38:58,801 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2022-07-12 18:38:58,801 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 24 more)] === [2022-07-12 18:38:58,802 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:38:58,802 INFO L85 PathProgramCache]: Analyzing trace with hash -561697204, now seen corresponding path program 1 times [2022-07-12 18:38:58,802 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:38:58,802 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1070236837] [2022-07-12 18:38:58,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:38:58,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:38:58,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:38:58,877 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:38:58,877 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:38:58,877 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1070236837] [2022-07-12 18:38:58,877 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1070236837] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:38:58,877 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:38:58,877 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-07-12 18:38:58,879 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1497350273] [2022-07-12 18:38:58,879 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:38:58,880 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-07-12 18:38:58,880 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:38:58,880 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-07-12 18:38:58,880 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-07-12 18:38:58,880 INFO L87 Difference]: Start difference. First operand 68 states and 76 transitions. Second operand has 7 states, 6 states have (on average 4.333333333333333) internal successors, (26), 7 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:58,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:38:58,998 INFO L93 Difference]: Finished difference Result 69 states and 76 transitions. [2022-07-12 18:38:58,998 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-07-12 18:38:58,998 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 4.333333333333333) internal successors, (26), 7 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 26 [2022-07-12 18:38:58,998 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:38:58,999 INFO L225 Difference]: With dead ends: 69 [2022-07-12 18:38:58,999 INFO L226 Difference]: Without dead ends: 69 [2022-07-12 18:38:58,999 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=89, Unknown=0, NotChecked=0, Total=132 [2022-07-12 18:38:59,000 INFO L413 NwaCegarLoop]: 23 mSDtfsCounter, 36 mSDsluCounter, 51 mSDsCounter, 0 mSdLazyCounter, 129 mSolverCounterSat, 19 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 36 SdHoareTripleChecker+Valid, 74 SdHoareTripleChecker+Invalid, 148 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 19 IncrementalHoareTripleChecker+Valid, 129 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-07-12 18:38:59,000 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [36 Valid, 74 Invalid, 148 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [19 Valid, 129 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-07-12 18:38:59,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2022-07-12 18:38:59,001 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 68. [2022-07-12 18:38:59,001 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 68 states, 56 states have (on average 1.3392857142857142) internal successors, (75), 67 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:59,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 75 transitions. [2022-07-12 18:38:59,001 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 75 transitions. Word has length 26 [2022-07-12 18:38:59,002 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:38:59,002 INFO L495 AbstractCegarLoop]: Abstraction has 68 states and 75 transitions. [2022-07-12 18:38:59,002 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 4.333333333333333) internal successors, (26), 7 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:38:59,002 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 75 transitions. [2022-07-12 18:38:59,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-07-12 18:38:59,002 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:38:59,002 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:38:59,003 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2022-07-12 18:38:59,003 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr14REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 24 more)] === [2022-07-12 18:38:59,003 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:38:59,003 INFO L85 PathProgramCache]: Analyzing trace with hash 1337846250, now seen corresponding path program 1 times [2022-07-12 18:38:59,003 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:38:59,003 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [821645059] [2022-07-12 18:38:59,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:38:59,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:38:59,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:38:59,101 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:38:59,102 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:38:59,102 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [821645059] [2022-07-12 18:38:59,102 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [821645059] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 18:38:59,102 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [617660140] [2022-07-12 18:38:59,102 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:38:59,102 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 18:38:59,102 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-12 18:38:59,103 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-12 18:38:59,104 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-07-12 18:38:59,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:38:59,178 INFO L263 TraceCheckSpWp]: Trace formula consists of 207 conjuncts, 32 conjunts are in the unsatisfiable core [2022-07-12 18:38:59,180 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 18:38:59,182 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 18:38:59,196 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-07-12 18:38:59,196 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-07-12 18:38:59,210 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 18:38:59,247 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 18:38:59,248 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 29 [2022-07-12 18:38:59,274 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:38:59,275 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 26 [2022-07-12 18:38:59,320 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:38:59,322 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:38:59,322 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 16 [2022-07-12 18:38:59,339 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2022-07-12 18:38:59,342 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:38:59,342 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-12 18:39:01,414 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:39:01,414 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 59 treesize of output 63 [2022-07-12 18:39:01,471 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (forall ((v_ArrVal_494 Int) (v_ArrVal_493 (Array Int Int)) (|v_ULTIMATE.start_main_~list~0#1.offset_20| Int)) (or (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_493) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_ArrVal_494) |v_ULTIMATE.start_main_~list~0#1.offset_20|) |c_ULTIMATE.start_main_~y~0#1.base|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_20| |c_ULTIMATE.start_main_~y~0#1.offset|)) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_20|)))))) (and .cse0 (or (forall ((v_prenex_3 Int) (v_prenex_1 Int) (v_prenex_2 (Array Int Int))) (= |c_ULTIMATE.start_main_~list~0#1.base| (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_2) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_1) v_prenex_3))) .cse0) (forall ((v_prenex_3 Int) (v_prenex_1 Int) (v_prenex_2 (Array Int Int))) (or (not (<= 0 v_prenex_3)) (not (<= v_prenex_3 |c_ULTIMATE.start_main_~y~0#1.offset|)) (= |c_ULTIMATE.start_main_~list~0#1.base| (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_2) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_1) v_prenex_3)))))) is different from false [2022-07-12 18:39:01,481 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:39:01,482 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 25 [2022-07-12 18:39:01,484 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 39 [2022-07-12 18:39:01,486 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:39:01,490 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:39:01,490 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 38 [2022-07-12 18:39:01,492 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:39:01,494 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2022-07-12 18:39:01,511 INFO L356 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-07-12 18:39:01,511 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 1 [2022-07-12 18:39:01,555 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:01,555 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [617660140] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-12 18:39:01,556 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-12 18:39:01,556 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 12] total 23 [2022-07-12 18:39:01,556 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [68572675] [2022-07-12 18:39:01,556 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-12 18:39:01,556 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-07-12 18:39:01,556 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:01,557 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-07-12 18:39:01,557 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=441, Unknown=2, NotChecked=42, Total=552 [2022-07-12 18:39:01,557 INFO L87 Difference]: Start difference. First operand 68 states and 75 transitions. Second operand has 24 states, 23 states have (on average 2.4347826086956523) internal successors, (56), 24 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:02,151 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse1 (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~y~0#1.base|) |c_ULTIMATE.start_main_~y~0#1.offset|)) (.cse0 (forall ((v_ArrVal_494 Int) (v_ArrVal_493 (Array Int Int)) (|v_ULTIMATE.start_main_~list~0#1.offset_20| Int)) (or (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_493) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_ArrVal_494) |v_ULTIMATE.start_main_~list~0#1.offset_20|) |c_ULTIMATE.start_main_~y~0#1.base|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_20| |c_ULTIMATE.start_main_~y~0#1.offset|)) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_20|)))))) (and (= (select |c_#valid| |c_ULTIMATE.start_main_~list~0#1.base|) 1) (= |c_ULTIMATE.start_main_~y~0#1.offset| 0) .cse0 (= (select |c_#valid| .cse1) 1) (= .cse1 |c_ULTIMATE.start_main_~list~0#1.base|) (not (= |c_ULTIMATE.start_main_~list~0#1.base| |c_ULTIMATE.start_main_~y~0#1.base|)) (not (= .cse1 |c_ULTIMATE.start_main_~y~0#1.base|)) (or (forall ((v_prenex_3 Int) (v_prenex_1 Int) (v_prenex_2 (Array Int Int))) (= |c_ULTIMATE.start_main_~list~0#1.base| (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_2) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_1) v_prenex_3))) .cse0) (forall ((v_prenex_3 Int) (v_prenex_1 Int) (v_prenex_2 (Array Int Int))) (or (not (<= 0 v_prenex_3)) (not (<= v_prenex_3 |c_ULTIMATE.start_main_~y~0#1.offset|)) (= |c_ULTIMATE.start_main_~list~0#1.base| (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_2) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_1) v_prenex_3)))) (= (select |c_#valid| |c_ULTIMATE.start_main_~y~0#1.base|) 1))) is different from false [2022-07-12 18:39:02,896 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse4 (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base|))) (let ((.cse3 (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~y~0#1.base|) |c_ULTIMATE.start_main_~y~0#1.offset|)) (.cse2 (forall ((v_ArrVal_494 Int) (v_ArrVal_493 (Array Int Int)) (|v_ULTIMATE.start_main_~list~0#1.offset_20| Int)) (or (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_493) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_ArrVal_494) |v_ULTIMATE.start_main_~list~0#1.offset_20|) |c_ULTIMATE.start_main_~y~0#1.base|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_20| |c_ULTIMATE.start_main_~y~0#1.offset|)) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_20|))))) (.cse1 (select .cse4 0)) (.cse0 (select .cse4 |c_ULTIMATE.start_main_~list~0#1.offset|))) (and (not (= .cse0 |c_ULTIMATE.start_main_~y~0#1.base|)) (= (select |c_#valid| |c_ULTIMATE.start_main_~list~0#1.base|) 1) (= (select |c_#valid| .cse1) 1) (= |c_ULTIMATE.start_main_~y~0#1.offset| 0) .cse2 (= (select |c_#valid| .cse3) 1) (not (= |c_ULTIMATE.start_main_~list~0#1.base| .cse0)) (= .cse3 |c_ULTIMATE.start_main_~list~0#1.base|) (not (= |c_ULTIMATE.start_main_~list~0#1.base| |c_ULTIMATE.start_main_~y~0#1.base|)) (not (= .cse3 |c_ULTIMATE.start_main_~y~0#1.base|)) (<= |c_ULTIMATE.start_main_~list~0#1.offset| 0) (or (forall ((v_prenex_3 Int) (v_prenex_1 Int) (v_prenex_2 (Array Int Int))) (= |c_ULTIMATE.start_main_~list~0#1.base| (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_2) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_1) v_prenex_3))) .cse2) (forall ((v_prenex_3 Int) (v_prenex_1 Int) (v_prenex_2 (Array Int Int))) (or (not (<= 0 v_prenex_3)) (not (<= v_prenex_3 |c_ULTIMATE.start_main_~y~0#1.offset|)) (= |c_ULTIMATE.start_main_~list~0#1.base| (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_2) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_1) v_prenex_3)))) (= (select |c_#valid| |c_ULTIMATE.start_main_~y~0#1.base|) 1) (not (= .cse1 |c_ULTIMATE.start_main_~list~0#1.base|)) (= (select |c_#valid| .cse0) 1)))) is different from false [2022-07-12 18:39:03,456 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse2 (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~y~0#1.base|) |c_ULTIMATE.start_main_~y~0#1.offset|)) (.cse1 (forall ((v_ArrVal_494 Int) (v_ArrVal_493 (Array Int Int)) (|v_ULTIMATE.start_main_~list~0#1.offset_20| Int)) (or (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_493) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_ArrVal_494) |v_ULTIMATE.start_main_~list~0#1.offset_20|) |c_ULTIMATE.start_main_~y~0#1.base|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_20| |c_ULTIMATE.start_main_~y~0#1.offset|)) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_20|))))) (.cse0 (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base|) |c_ULTIMATE.start_main_~list~0#1.offset|))) (and (not (= .cse0 |c_ULTIMATE.start_main_~y~0#1.base|)) (= (select |c_#valid| |c_ULTIMATE.start_main_~list~0#1.base|) 1) (= |c_ULTIMATE.start_main_~y~0#1.offset| 0) .cse1 (= (select |c_#valid| .cse2) 1) (not (= |c_ULTIMATE.start_main_~list~0#1.base| .cse0)) (= .cse2 |c_ULTIMATE.start_main_~list~0#1.base|) (not (= |c_ULTIMATE.start_main_~list~0#1.base| |c_ULTIMATE.start_main_~y~0#1.base|)) (not (= .cse2 |c_ULTIMATE.start_main_~y~0#1.base|)) (or (forall ((v_prenex_3 Int) (v_prenex_1 Int) (v_prenex_2 (Array Int Int))) (= |c_ULTIMATE.start_main_~list~0#1.base| (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_2) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_1) v_prenex_3))) .cse1) (forall ((v_prenex_3 Int) (v_prenex_1 Int) (v_prenex_2 (Array Int Int))) (or (not (<= 0 v_prenex_3)) (not (<= v_prenex_3 |c_ULTIMATE.start_main_~y~0#1.offset|)) (= |c_ULTIMATE.start_main_~list~0#1.base| (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_2) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_1) v_prenex_3)))) (= (select |c_#valid| |c_ULTIMATE.start_main_~y~0#1.base|) 1) (= (select |c_#valid| .cse0) 1))) is different from false [2022-07-12 18:39:03,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:03,648 INFO L93 Difference]: Finished difference Result 90 states and 95 transitions. [2022-07-12 18:39:03,648 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2022-07-12 18:39:03,648 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 23 states have (on average 2.4347826086956523) internal successors, (56), 24 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 26 [2022-07-12 18:39:03,648 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:03,649 INFO L225 Difference]: With dead ends: 90 [2022-07-12 18:39:03,649 INFO L226 Difference]: Without dead ends: 90 [2022-07-12 18:39:03,649 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 42 SyntacticMatches, 1 SemanticMatches, 40 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 220 ImplicationChecksByTransitivity, 4.0s TimeCoverageRelationStatistics Valid=276, Invalid=1141, Unknown=5, NotChecked=300, Total=1722 [2022-07-12 18:39:03,650 INFO L413 NwaCegarLoop]: 16 mSDtfsCounter, 205 mSDsluCounter, 134 mSDsCounter, 0 mSdLazyCounter, 398 mSolverCounterSat, 73 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 205 SdHoareTripleChecker+Valid, 150 SdHoareTripleChecker+Invalid, 581 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 73 IncrementalHoareTripleChecker+Valid, 398 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 110 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:03,650 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [205 Valid, 150 Invalid, 581 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [73 Valid, 398 Invalid, 0 Unknown, 110 Unchecked, 0.2s Time] [2022-07-12 18:39:03,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2022-07-12 18:39:03,651 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 73. [2022-07-12 18:39:03,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73 states, 61 states have (on average 1.360655737704918) internal successors, (83), 72 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:03,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 83 transitions. [2022-07-12 18:39:03,651 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 83 transitions. Word has length 26 [2022-07-12 18:39:03,651 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:03,651 INFO L495 AbstractCegarLoop]: Abstraction has 73 states and 83 transitions. [2022-07-12 18:39:03,652 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 23 states have (on average 2.4347826086956523) internal successors, (56), 24 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:03,652 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 83 transitions. [2022-07-12 18:39:03,652 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-07-12 18:39:03,652 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:03,652 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:03,670 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-07-12 18:39:03,862 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 18:39:03,862 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr15REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 24 more)] === [2022-07-12 18:39:03,863 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:03,863 INFO L85 PathProgramCache]: Analyzing trace with hash 1337846251, now seen corresponding path program 1 times [2022-07-12 18:39:03,863 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:03,863 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1010877810] [2022-07-12 18:39:03,863 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:03,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:03,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:03,994 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:03,995 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:03,995 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1010877810] [2022-07-12 18:39:03,995 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1010877810] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 18:39:03,995 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [551311003] [2022-07-12 18:39:03,995 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:03,995 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 18:39:03,995 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-12 18:39:03,996 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-12 18:39:03,997 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-07-12 18:39:04,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:04,074 INFO L263 TraceCheckSpWp]: Trace formula consists of 207 conjuncts, 43 conjunts are in the unsatisfiable core [2022-07-12 18:39:04,076 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 18:39:04,083 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 18:39:04,085 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 18:39:04,112 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-07-12 18:39:04,112 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-07-12 18:39:04,116 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2022-07-12 18:39:04,133 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 18:39:04,138 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 18:39:04,166 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 18:39:04,166 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 37 [2022-07-12 18:39:04,169 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2022-07-12 18:39:04,201 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:39:04,201 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-07-12 18:39:04,204 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:39:04,205 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 26 [2022-07-12 18:39:04,244 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:39:04,245 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2022-07-12 18:39:04,248 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:39:04,248 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-07-12 18:39:04,265 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:04,265 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-12 18:39:06,699 WARN L833 $PredicateComparison]: unable to prove that (and (forall ((v_ArrVal_588 Int) (v_ArrVal_586 (Array Int Int)) (v_ArrVal_587 (Array Int Int)) (v_ArrVal_589 Int) (|v_ULTIMATE.start_main_~list~0#1.offset_24| Int)) (or (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_24|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_24| |c_ULTIMATE.start_main_~y~0#1.offset|)) (let ((.cse0 (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8))) (<= (+ (select (store (select (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_586) |c_ULTIMATE.start_main_~y~0#1.base|) .cse0 v_ArrVal_588) |v_ULTIMATE.start_main_~list~0#1.offset_24|) 4) (select |c_#length| (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_587) |c_ULTIMATE.start_main_~y~0#1.base|) .cse0 v_ArrVal_589) |v_ULTIMATE.start_main_~list~0#1.offset_24|)))))) (forall ((v_ArrVal_588 Int) (v_ArrVal_586 (Array Int Int)) (|v_ULTIMATE.start_main_~list~0#1.offset_24| Int)) (or (<= 0 (select (store (select (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_586) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_ArrVal_588) |v_ULTIMATE.start_main_~list~0#1.offset_24|)) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_24|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_24| |c_ULTIMATE.start_main_~y~0#1.offset|))))) is different from false [2022-07-12 18:39:06,713 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:39:06,713 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 47 treesize of output 48 [2022-07-12 18:39:06,728 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:39:06,728 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 40 [2022-07-12 18:39:06,731 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 68 [2022-07-12 18:39:06,735 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 126 treesize of output 120 [2022-07-12 18:39:06,737 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:39:06,743 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:39:06,743 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 56 [2022-07-12 18:39:06,751 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:39:06,752 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 42 [2022-07-12 18:39:06,758 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:39:06,762 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:39:06,763 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 82 treesize of output 84 [2022-07-12 18:39:06,766 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:39:06,768 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 58 [2022-07-12 18:39:06,863 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:39:06,863 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 24 [2022-07-12 18:39:06,865 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:39:06,866 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2022-07-12 18:39:06,868 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:39:06,869 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:39:06,869 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 8 [2022-07-12 18:39:13,049 WARN L233 SmtUtils]: Spent 6.09s on a formula simplification. DAG size of input: 25 DAG size of output: 22 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-07-12 18:39:15,136 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:15,137 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [551311003] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-12 18:39:15,137 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-12 18:39:15,137 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 10] total 23 [2022-07-12 18:39:15,137 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2068417686] [2022-07-12 18:39:15,137 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-12 18:39:15,138 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-07-12 18:39:15,138 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:15,138 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-07-12 18:39:15,138 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=438, Unknown=2, NotChecked=42, Total=552 [2022-07-12 18:39:15,138 INFO L87 Difference]: Start difference. First operand 73 states and 83 transitions. Second operand has 24 states, 23 states have (on average 2.782608695652174) internal successors, (64), 24 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:16,044 WARN L833 $PredicateComparison]: unable to prove that (and (= (select |c_#valid| |c_ULTIMATE.start_main_~list~0#1.base|) 1) (= |c_ULTIMATE.start_main_~y~0#1.offset| 0) (<= 13 (select |c_#length| |c_ULTIMATE.start_main_~y~0#1.base|)) (forall ((v_ArrVal_588 Int) (v_ArrVal_586 (Array Int Int)) (v_ArrVal_587 (Array Int Int)) (v_ArrVal_589 Int) (|v_ULTIMATE.start_main_~list~0#1.offset_24| Int)) (or (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_24|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_24| |c_ULTIMATE.start_main_~y~0#1.offset|)) (let ((.cse0 (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8))) (<= (+ (select (store (select (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_586) |c_ULTIMATE.start_main_~y~0#1.base|) .cse0 v_ArrVal_588) |v_ULTIMATE.start_main_~list~0#1.offset_24|) 4) (select |c_#length| (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_587) |c_ULTIMATE.start_main_~y~0#1.base|) .cse0 v_ArrVal_589) |v_ULTIMATE.start_main_~list~0#1.offset_24|)))))) (= |c_ULTIMATE.start_main_~list~0#1.offset| 0) (= (select (select |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_main_~y~0#1.base|) |c_ULTIMATE.start_main_~y~0#1.offset|) 0) (= (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~y~0#1.base|) |c_ULTIMATE.start_main_~y~0#1.offset|) |c_ULTIMATE.start_main_~list~0#1.base|) (not (= |c_ULTIMATE.start_main_~list~0#1.base| |c_ULTIMATE.start_main_~y~0#1.base|)) (<= 13 (select |c_#length| |c_ULTIMATE.start_main_~list~0#1.base|)) (forall ((v_ArrVal_588 Int) (v_ArrVal_586 (Array Int Int)) (|v_ULTIMATE.start_main_~list~0#1.offset_24| Int)) (or (<= 0 (select (store (select (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_586) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_ArrVal_588) |v_ULTIMATE.start_main_~list~0#1.offset_24|)) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_24|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_24| |c_ULTIMATE.start_main_~y~0#1.offset|))))) is different from false [2022-07-12 18:39:16,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:16,769 INFO L93 Difference]: Finished difference Result 154 states and 173 transitions. [2022-07-12 18:39:16,769 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-07-12 18:39:16,770 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 23 states have (on average 2.782608695652174) internal successors, (64), 24 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 26 [2022-07-12 18:39:16,770 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:16,770 INFO L225 Difference]: With dead ends: 154 [2022-07-12 18:39:16,770 INFO L226 Difference]: Without dead ends: 154 [2022-07-12 18:39:16,771 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 39 SyntacticMatches, 6 SemanticMatches, 39 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 317 ImplicationChecksByTransitivity, 11.9s TimeCoverageRelationStatistics Valid=242, Invalid=1245, Unknown=3, NotChecked=150, Total=1640 [2022-07-12 18:39:16,771 INFO L413 NwaCegarLoop]: 45 mSDtfsCounter, 99 mSDsluCounter, 455 mSDsCounter, 0 mSdLazyCounter, 685 mSolverCounterSat, 40 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 99 SdHoareTripleChecker+Valid, 500 SdHoareTripleChecker+Invalid, 1088 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 40 IncrementalHoareTripleChecker+Valid, 685 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 363 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:16,771 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [99 Valid, 500 Invalid, 1088 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [40 Valid, 685 Invalid, 0 Unknown, 363 Unchecked, 0.3s Time] [2022-07-12 18:39:16,772 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2022-07-12 18:39:16,772 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 108. [2022-07-12 18:39:16,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 96 states have (on average 1.3229166666666667) internal successors, (127), 107 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:16,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 127 transitions. [2022-07-12 18:39:16,773 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 127 transitions. Word has length 26 [2022-07-12 18:39:16,773 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:16,773 INFO L495 AbstractCegarLoop]: Abstraction has 108 states and 127 transitions. [2022-07-12 18:39:16,773 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 23 states have (on average 2.782608695652174) internal successors, (64), 24 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:16,773 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 127 transitions. [2022-07-12 18:39:16,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-07-12 18:39:16,774 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:16,774 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:16,824 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-07-12 18:39:16,979 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2022-07-12 18:39:16,979 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr15REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 24 more)] === [2022-07-12 18:39:16,980 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:16,980 INFO L85 PathProgramCache]: Analyzing trace with hash 94520065, now seen corresponding path program 1 times [2022-07-12 18:39:16,980 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:16,980 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2074007111] [2022-07-12 18:39:16,980 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:16,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:16,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:17,106 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:17,106 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:17,106 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2074007111] [2022-07-12 18:39:17,106 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2074007111] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 18:39:17,106 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [510486337] [2022-07-12 18:39:17,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:17,106 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 18:39:17,107 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-12 18:39:17,108 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-12 18:39:17,109 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-07-12 18:39:17,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:17,182 INFO L263 TraceCheckSpWp]: Trace formula consists of 219 conjuncts, 21 conjunts are in the unsatisfiable core [2022-07-12 18:39:17,184 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 18:39:17,187 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 18:39:17,208 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-07-12 18:39:17,209 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-07-12 18:39:17,223 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 18:39:17,255 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:39:17,256 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 18 [2022-07-12 18:39:17,280 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:17,280 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-07-12 18:39:17,280 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [510486337] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:17,280 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-07-12 18:39:17,280 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [11] total 18 [2022-07-12 18:39:17,280 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [25581413] [2022-07-12 18:39:17,280 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:17,281 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-07-12 18:39:17,281 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:17,281 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-07-12 18:39:17,281 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=266, Unknown=0, NotChecked=0, Total=306 [2022-07-12 18:39:17,281 INFO L87 Difference]: Start difference. First operand 108 states and 127 transitions. Second operand has 8 states, 8 states have (on average 3.375) internal successors, (27), 8 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:17,461 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:17,461 INFO L93 Difference]: Finished difference Result 117 states and 135 transitions. [2022-07-12 18:39:17,462 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-07-12 18:39:17,462 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 3.375) internal successors, (27), 8 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 27 [2022-07-12 18:39:17,462 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:17,462 INFO L225 Difference]: With dead ends: 117 [2022-07-12 18:39:17,462 INFO L226 Difference]: Without dead ends: 116 [2022-07-12 18:39:17,462 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 73 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=81, Invalid=569, Unknown=0, NotChecked=0, Total=650 [2022-07-12 18:39:17,463 INFO L413 NwaCegarLoop]: 38 mSDtfsCounter, 28 mSDsluCounter, 105 mSDsCounter, 0 mSdLazyCounter, 181 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 28 SdHoareTripleChecker+Valid, 143 SdHoareTripleChecker+Invalid, 191 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 181 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:17,463 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [28 Valid, 143 Invalid, 191 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 181 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-07-12 18:39:17,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2022-07-12 18:39:17,464 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 108. [2022-07-12 18:39:17,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 96 states have (on average 1.3125) internal successors, (126), 107 states have internal predecessors, (126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:17,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 126 transitions. [2022-07-12 18:39:17,465 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 126 transitions. Word has length 27 [2022-07-12 18:39:17,465 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:17,465 INFO L495 AbstractCegarLoop]: Abstraction has 108 states and 126 transitions. [2022-07-12 18:39:17,465 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 3.375) internal successors, (27), 8 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:17,465 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 126 transitions. [2022-07-12 18:39:17,465 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-07-12 18:39:17,465 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:17,465 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:17,483 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-07-12 18:39:17,665 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-07-12 18:39:17,666 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 24 more)] === [2022-07-12 18:39:17,666 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:17,666 INFO L85 PathProgramCache]: Analyzing trace with hash -1476440114, now seen corresponding path program 1 times [2022-07-12 18:39:17,666 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:17,666 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [857041149] [2022-07-12 18:39:17,666 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:17,666 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:17,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:17,762 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:17,762 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:17,762 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [857041149] [2022-07-12 18:39:17,763 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [857041149] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 18:39:17,763 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1449135355] [2022-07-12 18:39:17,763 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:17,763 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 18:39:17,763 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-12 18:39:17,764 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-12 18:39:17,765 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-07-12 18:39:17,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:17,840 INFO L263 TraceCheckSpWp]: Trace formula consists of 208 conjuncts, 27 conjunts are in the unsatisfiable core [2022-07-12 18:39:17,841 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 18:39:17,844 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 18:39:17,861 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-07-12 18:39:17,861 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-07-12 18:39:17,875 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 18:39:17,898 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 18:39:17,898 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 28 [2022-07-12 18:39:17,925 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:39:17,926 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 25 [2022-07-12 18:39:17,960 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:39:17,961 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:39:17,962 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 15 [2022-07-12 18:39:17,970 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:17,970 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-12 18:39:18,479 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_766 (Array Int Int)) (|v_ULTIMATE.start_main_~list~0#1.offset_28| Int) (v_ArrVal_768 Int)) (or (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_28| |c_ULTIMATE.start_main_~y~0#1.offset|)) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_28|)) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_766) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_ArrVal_768) |v_ULTIMATE.start_main_~list~0#1.offset_28|) 0)))) is different from false [2022-07-12 18:39:18,485 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:39:18,485 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 25 [2022-07-12 18:39:18,491 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 39 [2022-07-12 18:39:18,493 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:39:18,498 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:39:18,498 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 38 [2022-07-12 18:39:18,501 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:39:18,502 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2022-07-12 18:39:18,599 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:18,599 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1449135355] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-12 18:39:18,599 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-12 18:39:18,599 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 11] total 22 [2022-07-12 18:39:18,599 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [704616042] [2022-07-12 18:39:18,599 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-12 18:39:18,600 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-07-12 18:39:18,600 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:18,600 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-07-12 18:39:18,600 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=357, Unknown=2, NotChecked=38, Total=462 [2022-07-12 18:39:18,600 INFO L87 Difference]: Start difference. First operand 108 states and 126 transitions. Second operand has 22 states, 22 states have (on average 2.590909090909091) internal successors, (57), 22 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:18,969 WARN L833 $PredicateComparison]: unable to prove that (and (= (select |c_#valid| |c_ULTIMATE.start_main_~list~0#1.base|) 1) (= |c_ULTIMATE.start_main_~y~0#1.offset| 0) (forall ((v_ArrVal_766 (Array Int Int)) (|v_ULTIMATE.start_main_~list~0#1.offset_28| Int) (v_ArrVal_768 Int)) (or (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_28| |c_ULTIMATE.start_main_~y~0#1.offset|)) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_28|)) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_766) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_ArrVal_768) |v_ULTIMATE.start_main_~list~0#1.offset_28|) 0)))) (= (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~y~0#1.base|) |c_ULTIMATE.start_main_~y~0#1.offset|) |c_ULTIMATE.start_main_~list~0#1.base|) (not (= |c_ULTIMATE.start_main_~list~0#1.base| |c_ULTIMATE.start_main_~y~0#1.base|)) (not (= |c_ULTIMATE.start_main_~list~0#1.base| 0)) (not (= |c_ULTIMATE.start_main_~y~0#1.base| 0)) (= (select |c_#valid| |c_ULTIMATE.start_main_~y~0#1.base|) 1)) is different from false [2022-07-12 18:39:19,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:19,260 INFO L93 Difference]: Finished difference Result 204 states and 235 transitions. [2022-07-12 18:39:19,260 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-07-12 18:39:19,261 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 2.590909090909091) internal successors, (57), 22 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 27 [2022-07-12 18:39:19,261 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:19,261 INFO L225 Difference]: With dead ends: 204 [2022-07-12 18:39:19,261 INFO L226 Difference]: Without dead ends: 204 [2022-07-12 18:39:19,262 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 46 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 168 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=154, Invalid=843, Unknown=3, NotChecked=122, Total=1122 [2022-07-12 18:39:19,262 INFO L413 NwaCegarLoop]: 28 mSDtfsCounter, 135 mSDsluCounter, 258 mSDsCounter, 0 mSdLazyCounter, 501 mSolverCounterSat, 41 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 135 SdHoareTripleChecker+Valid, 286 SdHoareTripleChecker+Invalid, 765 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 41 IncrementalHoareTripleChecker+Valid, 501 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 223 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:19,262 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [135 Valid, 286 Invalid, 765 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [41 Valid, 501 Invalid, 0 Unknown, 223 Unchecked, 0.2s Time] [2022-07-12 18:39:19,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 204 states. [2022-07-12 18:39:19,264 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 204 to 160. [2022-07-12 18:39:19,265 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 160 states, 148 states have (on average 1.2432432432432432) internal successors, (184), 159 states have internal predecessors, (184), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:19,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 184 transitions. [2022-07-12 18:39:19,265 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 184 transitions. Word has length 27 [2022-07-12 18:39:19,265 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:19,265 INFO L495 AbstractCegarLoop]: Abstraction has 160 states and 184 transitions. [2022-07-12 18:39:19,265 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 2.590909090909091) internal successors, (57), 22 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:19,266 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 184 transitions. [2022-07-12 18:39:19,266 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-07-12 18:39:19,266 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:19,266 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:19,282 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-07-12 18:39:19,475 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-07-12 18:39:19,476 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 24 more)] === [2022-07-12 18:39:19,476 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:19,476 INFO L85 PathProgramCache]: Analyzing trace with hash -328711838, now seen corresponding path program 1 times [2022-07-12 18:39:19,476 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:19,476 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [964521044] [2022-07-12 18:39:19,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:19,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:19,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:19,575 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:19,576 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:19,576 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [964521044] [2022-07-12 18:39:19,576 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [964521044] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:19,576 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:19,576 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-07-12 18:39:19,576 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1219750649] [2022-07-12 18:39:19,577 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:19,578 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-07-12 18:39:19,578 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:19,578 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-07-12 18:39:19,578 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2022-07-12 18:39:19,578 INFO L87 Difference]: Start difference. First operand 160 states and 184 transitions. Second operand has 9 states, 8 states have (on average 3.625) internal successors, (29), 9 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:19,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:19,764 INFO L93 Difference]: Finished difference Result 174 states and 196 transitions. [2022-07-12 18:39:19,764 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-07-12 18:39:19,765 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 8 states have (on average 3.625) internal successors, (29), 9 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 29 [2022-07-12 18:39:19,765 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:19,765 INFO L225 Difference]: With dead ends: 174 [2022-07-12 18:39:19,765 INFO L226 Difference]: Without dead ends: 174 [2022-07-12 18:39:19,765 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=159, Unknown=0, NotChecked=0, Total=240 [2022-07-12 18:39:19,766 INFO L413 NwaCegarLoop]: 30 mSDtfsCounter, 56 mSDsluCounter, 79 mSDsCounter, 0 mSdLazyCounter, 226 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 56 SdHoareTripleChecker+Valid, 109 SdHoareTripleChecker+Invalid, 243 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 226 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:19,766 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [56 Valid, 109 Invalid, 243 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 226 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-07-12 18:39:19,767 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2022-07-12 18:39:19,769 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 160. [2022-07-12 18:39:19,769 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 160 states, 148 states have (on average 1.2364864864864864) internal successors, (183), 159 states have internal predecessors, (183), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:19,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 183 transitions. [2022-07-12 18:39:19,769 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 183 transitions. Word has length 29 [2022-07-12 18:39:19,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:19,770 INFO L495 AbstractCegarLoop]: Abstraction has 160 states and 183 transitions. [2022-07-12 18:39:19,770 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 8 states have (on average 3.625) internal successors, (29), 9 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:19,770 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 183 transitions. [2022-07-12 18:39:19,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-07-12 18:39:19,770 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:19,770 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:19,770 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2022-07-12 18:39:19,771 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr14REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 24 more)] === [2022-07-12 18:39:19,771 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:19,771 INFO L85 PathProgramCache]: Analyzing trace with hash 1935506277, now seen corresponding path program 1 times [2022-07-12 18:39:19,771 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:19,771 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1005929630] [2022-07-12 18:39:19,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:19,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:19,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:19,996 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:19,996 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:19,996 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1005929630] [2022-07-12 18:39:19,996 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1005929630] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 18:39:19,996 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1430901529] [2022-07-12 18:39:19,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:19,996 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 18:39:19,996 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-12 18:39:19,997 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-12 18:39:19,998 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-07-12 18:39:20,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:20,079 INFO L263 TraceCheckSpWp]: Trace formula consists of 231 conjuncts, 42 conjunts are in the unsatisfiable core [2022-07-12 18:39:20,081 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 18:39:20,087 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 18:39:20,109 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-07-12 18:39:20,110 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-07-12 18:39:20,117 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 18:39:20,128 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 18:39:20,129 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 29 [2022-07-12 18:39:20,163 INFO L356 Elim1Store]: treesize reduction 30, result has 37.5 percent of original size [2022-07-12 18:39:20,163 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 21 treesize of output 29 [2022-07-12 18:39:20,171 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:39:20,173 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2022-07-12 18:39:20,298 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:39:20,298 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:39:20,312 INFO L356 Elim1Store]: treesize reduction 12, result has 64.7 percent of original size [2022-07-12 18:39:20,313 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 46 treesize of output 41 [2022-07-12 18:39:20,375 INFO L356 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-07-12 18:39:20,376 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 18 [2022-07-12 18:39:20,416 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2022-07-12 18:39:20,419 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:20,419 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-12 18:39:38,099 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:39:38,100 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 415 treesize of output 465 [2022-07-12 18:39:38,779 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (forall ((v_ArrVal_903 (Array Int Int)) (|v_ULTIMATE.start_main_#t~malloc8#1.base_11| Int) (|v_ULTIMATE.start_main_~list~0#1.offset_32| Int)) (or (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_32|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_32| |c_ULTIMATE.start_main_~y~0#1.offset|)) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_903) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) |v_ULTIMATE.start_main_~list~0#1.offset_32|) |c_ULTIMATE.start_main_~y~0#1.base|)))))) (and (or .cse0 (forall ((v_prenex_6 Int) (v_prenex_5 Int) (v_prenex_4 (Array Int Int))) (let ((.cse1 (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6))) (or (= .cse1 v_prenex_5) (= |c_ULTIMATE.start_main_~list~0#1.base| .cse1) (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5))))) (forall ((v_arrayElimCell_72 Int) (v_prenex_5 Int)) (or (and (not (= v_arrayElimCell_72 1)) (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5)) (forall ((v_prenex_6 Int) (v_prenex_4 (Array Int Int))) (or (forall ((|v_ULTIMATE.start_main_#t~malloc8#1.base_11| Int)) (or (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6) |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (= |v_ULTIMATE.start_main_#t~malloc8#1.base_11| v_prenex_5) (forall ((v_ArrVal_903 (Array Int Int)) (|v_ULTIMATE.start_main_~list~0#1.offset_32| Int)) (or (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_32|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_32| |c_ULTIMATE.start_main_~y~0#1.offset|)) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_903) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) |v_ULTIMATE.start_main_~list~0#1.offset_32|) |c_ULTIMATE.start_main_~y~0#1.base|)))))) (= |c_ULTIMATE.start_main_~list~0#1.base| (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6)))))) (forall ((v_prenex_5 Int)) (or (forall ((v_prenex_6 Int)) (or (not (<= v_prenex_6 |c_ULTIMATE.start_main_~y~0#1.offset|)) (not (<= 0 v_prenex_6)) (forall ((v_prenex_4 (Array Int Int))) (let ((.cse2 (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6))) (or (= .cse2 v_prenex_5) (= |c_ULTIMATE.start_main_~list~0#1.base| .cse2)))))) (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5))) (or (forall ((v_prenex_6 Int) (v_prenex_5 Int) (v_prenex_4 (Array Int Int))) (or (= |c_ULTIMATE.start_main_~list~0#1.base| (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6)) (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5))) .cse0) (forall ((v_prenex_6 Int) (v_prenex_5 Int) (v_prenex_4 (Array Int Int))) (or (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6) v_prenex_5) (forall ((v_ArrVal_903 (Array Int Int)) (|v_ULTIMATE.start_main_#t~malloc8#1.base_11| Int) (|v_ULTIMATE.start_main_~list~0#1.offset_32| Int)) (let ((.cse3 (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8))) (or (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) .cse3 v_prenex_5) v_prenex_6) |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_32|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_32| |c_ULTIMATE.start_main_~y~0#1.offset|)) (= |v_ULTIMATE.start_main_#t~malloc8#1.base_11| v_prenex_5) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_903) |c_ULTIMATE.start_main_~y~0#1.base|) .cse3 |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) |v_ULTIMATE.start_main_~list~0#1.offset_32|) |c_ULTIMATE.start_main_~y~0#1.base|))))))) (forall ((v_prenex_6 Int) (v_prenex_5 Int) (v_prenex_4 (Array Int Int))) (let ((.cse4 (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6))) (or (= .cse4 v_prenex_5) (forall ((|v_ULTIMATE.start_main_~list~0#1.offset_32| Int)) (or (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_32|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_32| |c_ULTIMATE.start_main_~y~0#1.offset|)) (forall ((v_ArrVal_903 (Array Int Int)) (|v_ULTIMATE.start_main_#t~malloc8#1.base_11| Int)) (or (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (= |v_ULTIMATE.start_main_#t~malloc8#1.base_11| v_prenex_5) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_903) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) |v_ULTIMATE.start_main_~list~0#1.offset_32|) |c_ULTIMATE.start_main_~y~0#1.base|)))))) (= |c_ULTIMATE.start_main_~list~0#1.base| .cse4) (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5)))) (forall ((v_prenex_6 Int) (v_prenex_5 Int) (v_prenex_4 (Array Int Int))) (or (not (<= v_prenex_6 |c_ULTIMATE.start_main_~y~0#1.offset|)) (not (<= 0 v_prenex_6)) (= |c_ULTIMATE.start_main_~list~0#1.base| (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6)) (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5))) (forall ((v_prenex_5 Int)) (or (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5) (forall ((v_prenex_6 Int) (v_prenex_4 (Array Int Int))) (or (forall ((v_ArrVal_903 (Array Int Int)) (|v_ULTIMATE.start_main_#t~malloc8#1.base_11| Int) (|v_ULTIMATE.start_main_~list~0#1.offset_32| Int)) (let ((.cse5 (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8))) (or (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) .cse5 v_prenex_5) v_prenex_6) |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_32|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_32| |c_ULTIMATE.start_main_~y~0#1.offset|)) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_903) |c_ULTIMATE.start_main_~y~0#1.base|) .cse5 |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) |v_ULTIMATE.start_main_~list~0#1.offset_32|) |c_ULTIMATE.start_main_~y~0#1.base|))))) (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6) v_prenex_5))))) (forall ((v_prenex_5 Int)) (or (forall ((v_prenex_6 Int)) (or (not (<= v_prenex_6 |c_ULTIMATE.start_main_~y~0#1.offset|)) (forall ((v_prenex_4 (Array Int Int))) (let ((.cse6 (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5))) (let ((.cse7 (select .cse6 v_prenex_6))) (or (not (= (select .cse6 8) .cse7)) (= .cse7 v_prenex_5))))) (not (<= 0 v_prenex_6)))) (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5))) (forall ((v_prenex_6 Int) (v_prenex_5 Int) (v_ArrVal_903 (Array Int Int)) (|v_ULTIMATE.start_main_#t~malloc8#1.base_11| Int) (|v_ULTIMATE.start_main_~list~0#1.offset_32| Int) (v_prenex_4 (Array Int Int))) (let ((.cse8 (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8))) (or (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) .cse8 v_prenex_5) v_prenex_6) |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_32|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_32| |c_ULTIMATE.start_main_~y~0#1.offset|)) (= |v_ULTIMATE.start_main_#t~malloc8#1.base_11| v_prenex_5) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_903) |c_ULTIMATE.start_main_~y~0#1.base|) .cse8 |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) |v_ULTIMATE.start_main_~list~0#1.offset_32|) |c_ULTIMATE.start_main_~y~0#1.base|))))) (forall ((v_prenex_6 Int) (v_prenex_5 Int) (v_prenex_4 (Array Int Int))) (let ((.cse9 (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6))) (or (= .cse9 v_prenex_5) (forall ((v_ArrVal_903 (Array Int Int)) (|v_ULTIMATE.start_main_#t~malloc8#1.base_11| Int) (|v_ULTIMATE.start_main_~list~0#1.offset_32| Int)) (or (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_32|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_32| |c_ULTIMATE.start_main_~y~0#1.offset|)) (= |v_ULTIMATE.start_main_#t~malloc8#1.base_11| v_prenex_5) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_903) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) |v_ULTIMATE.start_main_~list~0#1.offset_32|) |c_ULTIMATE.start_main_~y~0#1.base|)))) (= |c_ULTIMATE.start_main_~list~0#1.base| .cse9)))) (forall ((v_prenex_5 Int)) (or (forall ((v_prenex_6 Int) (v_prenex_4 (Array Int Int))) (or (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6) v_prenex_5) (forall ((v_ArrVal_903 (Array Int Int)) (|v_ULTIMATE.start_main_#t~malloc8#1.base_11| Int) (|v_ULTIMATE.start_main_~list~0#1.offset_32| Int)) (let ((.cse10 (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8))) (or (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) .cse10 v_prenex_5) v_prenex_6) |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_32|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_32| |c_ULTIMATE.start_main_~y~0#1.offset|)) (= |v_ULTIMATE.start_main_#t~malloc8#1.base_11| v_prenex_5) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_903) |c_ULTIMATE.start_main_~y~0#1.base|) .cse10 |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) |v_ULTIMATE.start_main_~list~0#1.offset_32|) |c_ULTIMATE.start_main_~y~0#1.base|))))))) (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5))) (forall ((v_prenex_6 Int) (v_prenex_5 Int) (v_prenex_4 (Array Int Int))) (or (forall ((|v_ULTIMATE.start_main_~list~0#1.offset_32| Int)) (or (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_32|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_32| |c_ULTIMATE.start_main_~y~0#1.offset|)) (forall ((v_ArrVal_903 (Array Int Int)) (|v_ULTIMATE.start_main_#t~malloc8#1.base_11| Int)) (or (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (= |v_ULTIMATE.start_main_#t~malloc8#1.base_11| v_prenex_5) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_903) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) |v_ULTIMATE.start_main_~list~0#1.offset_32|) |c_ULTIMATE.start_main_~y~0#1.base|)))))) (= |c_ULTIMATE.start_main_~list~0#1.base| (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6)) (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5))) (forall ((v_prenex_6 Int) (v_prenex_5 Int) (v_ArrVal_903 (Array Int Int)) (|v_ULTIMATE.start_main_#t~malloc8#1.base_11| Int) (|v_ULTIMATE.start_main_~list~0#1.offset_32| Int) (v_prenex_4 (Array Int Int))) (let ((.cse12 (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8))) (let ((.cse11 (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) .cse12 v_prenex_5) v_prenex_6))) (or (= .cse11 |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_32|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_32| |c_ULTIMATE.start_main_~y~0#1.offset|)) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_903) |c_ULTIMATE.start_main_~y~0#1.base|) .cse12 |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) |v_ULTIMATE.start_main_~list~0#1.offset_32|) |c_ULTIMATE.start_main_~y~0#1.base|)) (= |c_ULTIMATE.start_main_~list~0#1.base| .cse11) (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5))))))) is different from false [2022-07-12 18:39:38,880 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:39:38,880 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 71 treesize of output 55 [2022-07-12 18:39:38,884 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 97 [2022-07-12 18:39:38,892 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 49 [2022-07-12 18:39:38,896 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:39:38,911 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:39:38,913 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 88 treesize of output 104 [2022-07-12 18:39:38,918 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:39:38,920 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2022-07-12 18:39:39,036 INFO L356 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-07-12 18:39:39,037 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 71 treesize of output 1 [2022-07-12 18:39:39,042 INFO L356 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-07-12 18:39:39,042 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 48 treesize of output 1 [2022-07-12 18:39:39,048 INFO L356 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-07-12 18:39:39,048 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 71 treesize of output 1 [2022-07-12 18:39:39,054 INFO L356 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-07-12 18:39:39,054 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 71 treesize of output 1 [2022-07-12 18:39:39,060 INFO L356 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-07-12 18:39:39,060 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 71 treesize of output 1 [2022-07-12 18:39:39,068 INFO L356 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-07-12 18:39:39,068 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 71 treesize of output 1 [2022-07-12 18:39:39,075 INFO L356 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-07-12 18:39:39,075 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 71 treesize of output 1 [2022-07-12 18:39:39,080 INFO L356 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-07-12 18:39:39,080 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 47 treesize of output 1 [2022-07-12 18:39:39,085 INFO L356 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-07-12 18:39:39,085 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 68 treesize of output 1 [2022-07-12 18:39:39,091 INFO L356 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-07-12 18:39:39,092 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 71 treesize of output 1 [2022-07-12 18:39:39,097 INFO L356 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-07-12 18:39:39,098 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 48 treesize of output 1 [2022-07-12 18:39:39,102 INFO L356 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-07-12 18:39:39,102 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 1 [2022-07-12 18:39:39,107 INFO L356 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-07-12 18:39:39,108 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 48 treesize of output 1 [2022-07-12 18:39:39,159 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:39,159 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1430901529] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-12 18:39:39,160 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-12 18:39:39,160 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 15, 17] total 37 [2022-07-12 18:39:39,160 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [582625366] [2022-07-12 18:39:39,160 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-12 18:39:39,160 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 38 states [2022-07-12 18:39:39,160 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:39,161 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2022-07-12 18:39:39,161 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=161, Invalid=1168, Unknown=7, NotChecked=70, Total=1406 [2022-07-12 18:39:39,161 INFO L87 Difference]: Start difference. First operand 160 states and 183 transitions. Second operand has 38 states, 37 states have (on average 2.027027027027027) internal successors, (75), 38 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:41,251 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (forall ((v_ArrVal_903 (Array Int Int)) (|v_ULTIMATE.start_main_#t~malloc8#1.base_11| Int) (|v_ULTIMATE.start_main_~list~0#1.offset_32| Int)) (or (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_32|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_32| |c_ULTIMATE.start_main_~y~0#1.offset|)) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_903) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) |v_ULTIMATE.start_main_~list~0#1.offset_32|) |c_ULTIMATE.start_main_~y~0#1.base|))))) (.cse3 (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~y~0#1.base|) |c_ULTIMATE.start_main_~y~0#1.offset|))) (and (or .cse0 (forall ((v_prenex_6 Int) (v_prenex_5 Int) (v_prenex_4 (Array Int Int))) (let ((.cse1 (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6))) (or (= .cse1 v_prenex_5) (= |c_ULTIMATE.start_main_~list~0#1.base| .cse1) (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5))))) (= (select |c_#valid| |c_ULTIMATE.start_main_~list~0#1.base|) 1) (= |c_ULTIMATE.start_main_~y~0#1.offset| 0) (forall ((v_arrayElimCell_72 Int) (v_prenex_5 Int)) (or (and (not (= v_arrayElimCell_72 1)) (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5)) (forall ((v_prenex_6 Int) (v_prenex_4 (Array Int Int))) (or (forall ((|v_ULTIMATE.start_main_#t~malloc8#1.base_11| Int)) (or (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6) |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (= |v_ULTIMATE.start_main_#t~malloc8#1.base_11| v_prenex_5) (forall ((v_ArrVal_903 (Array Int Int)) (|v_ULTIMATE.start_main_~list~0#1.offset_32| Int)) (or (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_32|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_32| |c_ULTIMATE.start_main_~y~0#1.offset|)) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_903) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) |v_ULTIMATE.start_main_~list~0#1.offset_32|) |c_ULTIMATE.start_main_~y~0#1.base|)))))) (= |c_ULTIMATE.start_main_~list~0#1.base| (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6)))))) (forall ((v_prenex_5 Int)) (or (forall ((v_prenex_6 Int)) (or (not (<= v_prenex_6 |c_ULTIMATE.start_main_~y~0#1.offset|)) (not (<= 0 v_prenex_6)) (forall ((v_prenex_4 (Array Int Int))) (let ((.cse2 (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6))) (or (= .cse2 v_prenex_5) (= |c_ULTIMATE.start_main_~list~0#1.base| .cse2)))))) (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5))) (or (forall ((v_prenex_6 Int) (v_prenex_5 Int) (v_prenex_4 (Array Int Int))) (or (= |c_ULTIMATE.start_main_~list~0#1.base| (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6)) (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5))) .cse0) (= (select |c_#valid| .cse3) 1) (forall ((v_prenex_6 Int) (v_prenex_5 Int) (v_prenex_4 (Array Int Int))) (or (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6) v_prenex_5) (forall ((v_ArrVal_903 (Array Int Int)) (|v_ULTIMATE.start_main_#t~malloc8#1.base_11| Int) (|v_ULTIMATE.start_main_~list~0#1.offset_32| Int)) (let ((.cse4 (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8))) (or (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) .cse4 v_prenex_5) v_prenex_6) |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_32|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_32| |c_ULTIMATE.start_main_~y~0#1.offset|)) (= |v_ULTIMATE.start_main_#t~malloc8#1.base_11| v_prenex_5) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_903) |c_ULTIMATE.start_main_~y~0#1.base|) .cse4 |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) |v_ULTIMATE.start_main_~list~0#1.offset_32|) |c_ULTIMATE.start_main_~y~0#1.base|))))))) (= .cse3 |c_ULTIMATE.start_main_~list~0#1.base|) (not (= |c_ULTIMATE.start_main_~list~0#1.base| |c_ULTIMATE.start_main_~y~0#1.base|)) (forall ((v_prenex_6 Int) (v_prenex_5 Int) (v_prenex_4 (Array Int Int))) (let ((.cse5 (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6))) (or (= .cse5 v_prenex_5) (forall ((|v_ULTIMATE.start_main_~list~0#1.offset_32| Int)) (or (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_32|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_32| |c_ULTIMATE.start_main_~y~0#1.offset|)) (forall ((v_ArrVal_903 (Array Int Int)) (|v_ULTIMATE.start_main_#t~malloc8#1.base_11| Int)) (or (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (= |v_ULTIMATE.start_main_#t~malloc8#1.base_11| v_prenex_5) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_903) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) |v_ULTIMATE.start_main_~list~0#1.offset_32|) |c_ULTIMATE.start_main_~y~0#1.base|)))))) (= |c_ULTIMATE.start_main_~list~0#1.base| .cse5) (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5)))) (not (= .cse3 |c_ULTIMATE.start_main_~y~0#1.base|)) (forall ((v_prenex_6 Int) (v_prenex_5 Int) (v_prenex_4 (Array Int Int))) (or (not (<= v_prenex_6 |c_ULTIMATE.start_main_~y~0#1.offset|)) (not (<= 0 v_prenex_6)) (= |c_ULTIMATE.start_main_~list~0#1.base| (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6)) (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5))) (= (select |c_#valid| |c_ULTIMATE.start_main_~y~0#1.base|) 1) (forall ((v_prenex_5 Int)) (or (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5) (forall ((v_prenex_6 Int) (v_prenex_4 (Array Int Int))) (or (forall ((v_ArrVal_903 (Array Int Int)) (|v_ULTIMATE.start_main_#t~malloc8#1.base_11| Int) (|v_ULTIMATE.start_main_~list~0#1.offset_32| Int)) (let ((.cse6 (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8))) (or (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) .cse6 v_prenex_5) v_prenex_6) |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_32|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_32| |c_ULTIMATE.start_main_~y~0#1.offset|)) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_903) |c_ULTIMATE.start_main_~y~0#1.base|) .cse6 |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) |v_ULTIMATE.start_main_~list~0#1.offset_32|) |c_ULTIMATE.start_main_~y~0#1.base|))))) (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6) v_prenex_5))))) (forall ((v_prenex_5 Int)) (or (forall ((v_prenex_6 Int)) (or (not (<= v_prenex_6 |c_ULTIMATE.start_main_~y~0#1.offset|)) (forall ((v_prenex_4 (Array Int Int))) (let ((.cse7 (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5))) (let ((.cse8 (select .cse7 v_prenex_6))) (or (not (= (select .cse7 8) .cse8)) (= .cse8 v_prenex_5))))) (not (<= 0 v_prenex_6)))) (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5))) (forall ((v_prenex_6 Int) (v_prenex_5 Int) (v_ArrVal_903 (Array Int Int)) (|v_ULTIMATE.start_main_#t~malloc8#1.base_11| Int) (|v_ULTIMATE.start_main_~list~0#1.offset_32| Int) (v_prenex_4 (Array Int Int))) (let ((.cse9 (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8))) (or (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) .cse9 v_prenex_5) v_prenex_6) |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_32|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_32| |c_ULTIMATE.start_main_~y~0#1.offset|)) (= |v_ULTIMATE.start_main_#t~malloc8#1.base_11| v_prenex_5) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_903) |c_ULTIMATE.start_main_~y~0#1.base|) .cse9 |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) |v_ULTIMATE.start_main_~list~0#1.offset_32|) |c_ULTIMATE.start_main_~y~0#1.base|))))) (forall ((v_prenex_6 Int) (v_prenex_5 Int) (v_prenex_4 (Array Int Int))) (let ((.cse10 (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6))) (or (= .cse10 v_prenex_5) (forall ((v_ArrVal_903 (Array Int Int)) (|v_ULTIMATE.start_main_#t~malloc8#1.base_11| Int) (|v_ULTIMATE.start_main_~list~0#1.offset_32| Int)) (or (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_32|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_32| |c_ULTIMATE.start_main_~y~0#1.offset|)) (= |v_ULTIMATE.start_main_#t~malloc8#1.base_11| v_prenex_5) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_903) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) |v_ULTIMATE.start_main_~list~0#1.offset_32|) |c_ULTIMATE.start_main_~y~0#1.base|)))) (= |c_ULTIMATE.start_main_~list~0#1.base| .cse10)))) (forall ((v_prenex_5 Int)) (or (forall ((v_prenex_6 Int) (v_prenex_4 (Array Int Int))) (or (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6) v_prenex_5) (forall ((v_ArrVal_903 (Array Int Int)) (|v_ULTIMATE.start_main_#t~malloc8#1.base_11| Int) (|v_ULTIMATE.start_main_~list~0#1.offset_32| Int)) (let ((.cse11 (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8))) (or (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) .cse11 v_prenex_5) v_prenex_6) |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_32|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_32| |c_ULTIMATE.start_main_~y~0#1.offset|)) (= |v_ULTIMATE.start_main_#t~malloc8#1.base_11| v_prenex_5) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_903) |c_ULTIMATE.start_main_~y~0#1.base|) .cse11 |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) |v_ULTIMATE.start_main_~list~0#1.offset_32|) |c_ULTIMATE.start_main_~y~0#1.base|))))))) (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5))) (forall ((v_prenex_6 Int) (v_prenex_5 Int) (v_prenex_4 (Array Int Int))) (or (forall ((|v_ULTIMATE.start_main_~list~0#1.offset_32| Int)) (or (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_32|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_32| |c_ULTIMATE.start_main_~y~0#1.offset|)) (forall ((v_ArrVal_903 (Array Int Int)) (|v_ULTIMATE.start_main_#t~malloc8#1.base_11| Int)) (or (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (= |v_ULTIMATE.start_main_#t~malloc8#1.base_11| v_prenex_5) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_903) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) |v_ULTIMATE.start_main_~list~0#1.offset_32|) |c_ULTIMATE.start_main_~y~0#1.base|)))))) (= |c_ULTIMATE.start_main_~list~0#1.base| (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6)) (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5))) (forall ((v_prenex_6 Int) (v_prenex_5 Int) (v_ArrVal_903 (Array Int Int)) (|v_ULTIMATE.start_main_#t~malloc8#1.base_11| Int) (|v_ULTIMATE.start_main_~list~0#1.offset_32| Int) (v_prenex_4 (Array Int Int))) (let ((.cse13 (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8))) (let ((.cse12 (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) .cse13 v_prenex_5) v_prenex_6))) (or (= .cse12 |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_32|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_32| |c_ULTIMATE.start_main_~y~0#1.offset|)) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_903) |c_ULTIMATE.start_main_~y~0#1.base|) .cse13 |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) |v_ULTIMATE.start_main_~list~0#1.offset_32|) |c_ULTIMATE.start_main_~y~0#1.base|)) (= |c_ULTIMATE.start_main_~list~0#1.base| .cse12) (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5))))))) is different from false [2022-07-12 18:39:43,380 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse3 (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base|))) (let ((.cse0 (forall ((v_ArrVal_903 (Array Int Int)) (|v_ULTIMATE.start_main_#t~malloc8#1.base_11| Int) (|v_ULTIMATE.start_main_~list~0#1.offset_32| Int)) (or (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_32|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_32| |c_ULTIMATE.start_main_~y~0#1.offset|)) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_903) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) |v_ULTIMATE.start_main_~list~0#1.offset_32|) |c_ULTIMATE.start_main_~y~0#1.base|))))) (.cse5 (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~y~0#1.base|) |c_ULTIMATE.start_main_~y~0#1.offset|)) (.cse4 (select .cse3 |c_ULTIMATE.start_main_~list~0#1.offset|))) (and (or .cse0 (forall ((v_prenex_6 Int) (v_prenex_5 Int) (v_prenex_4 (Array Int Int))) (let ((.cse1 (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6))) (or (= .cse1 v_prenex_5) (= |c_ULTIMATE.start_main_~list~0#1.base| .cse1) (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5))))) (= (select |c_#valid| |c_ULTIMATE.start_main_~list~0#1.base|) 1) (= |c_ULTIMATE.start_main_~y~0#1.offset| 0) (forall ((v_arrayElimCell_72 Int) (v_prenex_5 Int)) (or (and (not (= v_arrayElimCell_72 1)) (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5)) (forall ((v_prenex_6 Int) (v_prenex_4 (Array Int Int))) (or (forall ((|v_ULTIMATE.start_main_#t~malloc8#1.base_11| Int)) (or (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6) |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (= |v_ULTIMATE.start_main_#t~malloc8#1.base_11| v_prenex_5) (forall ((v_ArrVal_903 (Array Int Int)) (|v_ULTIMATE.start_main_~list~0#1.offset_32| Int)) (or (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_32|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_32| |c_ULTIMATE.start_main_~y~0#1.offset|)) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_903) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) |v_ULTIMATE.start_main_~list~0#1.offset_32|) |c_ULTIMATE.start_main_~y~0#1.base|)))))) (= |c_ULTIMATE.start_main_~list~0#1.base| (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6)))))) (forall ((v_prenex_5 Int)) (or (forall ((v_prenex_6 Int)) (or (not (<= v_prenex_6 |c_ULTIMATE.start_main_~y~0#1.offset|)) (not (<= 0 v_prenex_6)) (forall ((v_prenex_4 (Array Int Int))) (let ((.cse2 (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6))) (or (= .cse2 v_prenex_5) (= |c_ULTIMATE.start_main_~list~0#1.base| .cse2)))))) (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5))) (not (= (select .cse3 8) .cse4)) (= |c_ULTIMATE.start_main_~list~0#1.offset| 0) (or (forall ((v_prenex_6 Int) (v_prenex_5 Int) (v_prenex_4 (Array Int Int))) (or (= |c_ULTIMATE.start_main_~list~0#1.base| (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6)) (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5))) .cse0) (= (select |c_#valid| .cse5) 1) (not (= |c_ULTIMATE.start_main_~list~0#1.base| .cse4)) (forall ((v_prenex_6 Int) (v_prenex_5 Int) (v_prenex_4 (Array Int Int))) (or (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6) v_prenex_5) (forall ((v_ArrVal_903 (Array Int Int)) (|v_ULTIMATE.start_main_#t~malloc8#1.base_11| Int) (|v_ULTIMATE.start_main_~list~0#1.offset_32| Int)) (let ((.cse6 (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8))) (or (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) .cse6 v_prenex_5) v_prenex_6) |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_32|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_32| |c_ULTIMATE.start_main_~y~0#1.offset|)) (= |v_ULTIMATE.start_main_#t~malloc8#1.base_11| v_prenex_5) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_903) |c_ULTIMATE.start_main_~y~0#1.base|) .cse6 |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) |v_ULTIMATE.start_main_~list~0#1.offset_32|) |c_ULTIMATE.start_main_~y~0#1.base|))))))) (= .cse5 |c_ULTIMATE.start_main_~list~0#1.base|) (not (= |c_ULTIMATE.start_main_~list~0#1.base| |c_ULTIMATE.start_main_~y~0#1.base|)) (forall ((v_prenex_6 Int) (v_prenex_5 Int) (v_prenex_4 (Array Int Int))) (let ((.cse7 (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6))) (or (= .cse7 v_prenex_5) (forall ((|v_ULTIMATE.start_main_~list~0#1.offset_32| Int)) (or (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_32|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_32| |c_ULTIMATE.start_main_~y~0#1.offset|)) (forall ((v_ArrVal_903 (Array Int Int)) (|v_ULTIMATE.start_main_#t~malloc8#1.base_11| Int)) (or (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (= |v_ULTIMATE.start_main_#t~malloc8#1.base_11| v_prenex_5) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_903) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) |v_ULTIMATE.start_main_~list~0#1.offset_32|) |c_ULTIMATE.start_main_~y~0#1.base|)))))) (= |c_ULTIMATE.start_main_~list~0#1.base| .cse7) (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5)))) (not (= .cse5 |c_ULTIMATE.start_main_~y~0#1.base|)) (forall ((v_prenex_6 Int) (v_prenex_5 Int) (v_prenex_4 (Array Int Int))) (or (not (<= v_prenex_6 |c_ULTIMATE.start_main_~y~0#1.offset|)) (not (<= 0 v_prenex_6)) (= |c_ULTIMATE.start_main_~list~0#1.base| (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6)) (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5))) (= (select |c_#valid| |c_ULTIMATE.start_main_~y~0#1.base|) 1) (forall ((v_prenex_5 Int)) (or (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5) (forall ((v_prenex_6 Int) (v_prenex_4 (Array Int Int))) (or (forall ((v_ArrVal_903 (Array Int Int)) (|v_ULTIMATE.start_main_#t~malloc8#1.base_11| Int) (|v_ULTIMATE.start_main_~list~0#1.offset_32| Int)) (let ((.cse8 (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8))) (or (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) .cse8 v_prenex_5) v_prenex_6) |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_32|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_32| |c_ULTIMATE.start_main_~y~0#1.offset|)) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_903) |c_ULTIMATE.start_main_~y~0#1.base|) .cse8 |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) |v_ULTIMATE.start_main_~list~0#1.offset_32|) |c_ULTIMATE.start_main_~y~0#1.base|))))) (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6) v_prenex_5))))) (forall ((v_prenex_5 Int)) (or (forall ((v_prenex_6 Int)) (or (not (<= v_prenex_6 |c_ULTIMATE.start_main_~y~0#1.offset|)) (forall ((v_prenex_4 (Array Int Int))) (let ((.cse9 (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5))) (let ((.cse10 (select .cse9 v_prenex_6))) (or (not (= (select .cse9 8) .cse10)) (= .cse10 v_prenex_5))))) (not (<= 0 v_prenex_6)))) (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5))) (forall ((v_prenex_6 Int) (v_prenex_5 Int) (v_ArrVal_903 (Array Int Int)) (|v_ULTIMATE.start_main_#t~malloc8#1.base_11| Int) (|v_ULTIMATE.start_main_~list~0#1.offset_32| Int) (v_prenex_4 (Array Int Int))) (let ((.cse11 (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8))) (or (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) .cse11 v_prenex_5) v_prenex_6) |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_32|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_32| |c_ULTIMATE.start_main_~y~0#1.offset|)) (= |v_ULTIMATE.start_main_#t~malloc8#1.base_11| v_prenex_5) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_903) |c_ULTIMATE.start_main_~y~0#1.base|) .cse11 |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) |v_ULTIMATE.start_main_~list~0#1.offset_32|) |c_ULTIMATE.start_main_~y~0#1.base|))))) (forall ((v_prenex_6 Int) (v_prenex_5 Int) (v_prenex_4 (Array Int Int))) (let ((.cse12 (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6))) (or (= .cse12 v_prenex_5) (forall ((v_ArrVal_903 (Array Int Int)) (|v_ULTIMATE.start_main_#t~malloc8#1.base_11| Int) (|v_ULTIMATE.start_main_~list~0#1.offset_32| Int)) (or (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_32|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_32| |c_ULTIMATE.start_main_~y~0#1.offset|)) (= |v_ULTIMATE.start_main_#t~malloc8#1.base_11| v_prenex_5) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_903) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) |v_ULTIMATE.start_main_~list~0#1.offset_32|) |c_ULTIMATE.start_main_~y~0#1.base|)))) (= |c_ULTIMATE.start_main_~list~0#1.base| .cse12)))) (forall ((v_prenex_5 Int)) (or (forall ((v_prenex_6 Int) (v_prenex_4 (Array Int Int))) (or (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6) v_prenex_5) (forall ((v_ArrVal_903 (Array Int Int)) (|v_ULTIMATE.start_main_#t~malloc8#1.base_11| Int) (|v_ULTIMATE.start_main_~list~0#1.offset_32| Int)) (let ((.cse13 (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8))) (or (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) .cse13 v_prenex_5) v_prenex_6) |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_32|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_32| |c_ULTIMATE.start_main_~y~0#1.offset|)) (= |v_ULTIMATE.start_main_#t~malloc8#1.base_11| v_prenex_5) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_903) |c_ULTIMATE.start_main_~y~0#1.base|) .cse13 |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) |v_ULTIMATE.start_main_~list~0#1.offset_32|) |c_ULTIMATE.start_main_~y~0#1.base|))))))) (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5))) (= (select |c_#valid| .cse4) 1) (forall ((v_prenex_6 Int) (v_prenex_5 Int) (v_prenex_4 (Array Int Int))) (or (forall ((|v_ULTIMATE.start_main_~list~0#1.offset_32| Int)) (or (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_32|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_32| |c_ULTIMATE.start_main_~y~0#1.offset|)) (forall ((v_ArrVal_903 (Array Int Int)) (|v_ULTIMATE.start_main_#t~malloc8#1.base_11| Int)) (or (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (= |v_ULTIMATE.start_main_#t~malloc8#1.base_11| v_prenex_5) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_903) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) |v_ULTIMATE.start_main_~list~0#1.offset_32|) |c_ULTIMATE.start_main_~y~0#1.base|)))))) (= |c_ULTIMATE.start_main_~list~0#1.base| (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_5) v_prenex_6)) (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5))) (forall ((v_prenex_6 Int) (v_prenex_5 Int) (v_ArrVal_903 (Array Int Int)) (|v_ULTIMATE.start_main_#t~malloc8#1.base_11| Int) (|v_ULTIMATE.start_main_~list~0#1.offset_32| Int) (v_prenex_4 (Array Int Int))) (let ((.cse15 (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8))) (let ((.cse14 (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_4) |c_ULTIMATE.start_main_~y~0#1.base|) .cse15 v_prenex_5) v_prenex_6))) (or (= .cse14 |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_32|)) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_32| |c_ULTIMATE.start_main_~y~0#1.offset|)) (not (= (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_903) |c_ULTIMATE.start_main_~y~0#1.base|) .cse15 |v_ULTIMATE.start_main_#t~malloc8#1.base_11|) |v_ULTIMATE.start_main_~list~0#1.offset_32|) |c_ULTIMATE.start_main_~y~0#1.base|)) (= |c_ULTIMATE.start_main_~list~0#1.base| .cse14) (= |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_5)))))))) is different from false [2022-07-12 18:39:43,568 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:43,568 INFO L93 Difference]: Finished difference Result 168 states and 191 transitions. [2022-07-12 18:39:43,568 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-07-12 18:39:43,568 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 37 states have (on average 2.027027027027027) internal successors, (75), 38 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 31 [2022-07-12 18:39:43,569 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:43,569 INFO L225 Difference]: With dead ends: 168 [2022-07-12 18:39:43,569 INFO L226 Difference]: Without dead ends: 168 [2022-07-12 18:39:43,570 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 43 SyntacticMatches, 1 SemanticMatches, 48 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 663 ImplicationChecksByTransitivity, 22.0s TimeCoverageRelationStatistics Valid=315, Invalid=1850, Unknown=9, NotChecked=276, Total=2450 [2022-07-12 18:39:43,570 INFO L413 NwaCegarLoop]: 26 mSDtfsCounter, 83 mSDsluCounter, 211 mSDsCounter, 0 mSdLazyCounter, 327 mSolverCounterSat, 41 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 83 SdHoareTripleChecker+Valid, 237 SdHoareTripleChecker+Invalid, 666 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 41 IncrementalHoareTripleChecker+Valid, 327 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 298 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:43,570 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [83 Valid, 237 Invalid, 666 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [41 Valid, 327 Invalid, 0 Unknown, 298 Unchecked, 0.2s Time] [2022-07-12 18:39:43,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states. [2022-07-12 18:39:43,573 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 163. [2022-07-12 18:39:43,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 163 states, 151 states have (on average 1.2450331125827814) internal successors, (188), 162 states have internal predecessors, (188), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:43,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 188 transitions. [2022-07-12 18:39:43,573 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 188 transitions. Word has length 31 [2022-07-12 18:39:43,573 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:43,574 INFO L495 AbstractCegarLoop]: Abstraction has 163 states and 188 transitions. [2022-07-12 18:39:43,574 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 38 states, 37 states have (on average 2.027027027027027) internal successors, (75), 38 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:43,574 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 188 transitions. [2022-07-12 18:39:43,574 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-07-12 18:39:43,574 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:43,574 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:43,590 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2022-07-12 18:39:43,793 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 18:39:43,793 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr15REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 24 more)] === [2022-07-12 18:39:43,793 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:43,794 INFO L85 PathProgramCache]: Analyzing trace with hash 1935506278, now seen corresponding path program 1 times [2022-07-12 18:39:43,794 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:43,794 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [219959064] [2022-07-12 18:39:43,794 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:43,794 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:43,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:43,959 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:43,960 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:43,960 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [219959064] [2022-07-12 18:39:43,960 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [219959064] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 18:39:43,960 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1356956989] [2022-07-12 18:39:43,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:43,960 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 18:39:43,960 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-12 18:39:43,961 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-12 18:39:43,961 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-07-12 18:39:44,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:44,044 INFO L263 TraceCheckSpWp]: Trace formula consists of 231 conjuncts, 50 conjunts are in the unsatisfiable core [2022-07-12 18:39:44,047 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 18:39:44,051 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 18:39:44,064 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 18:39:44,090 INFO L356 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-07-12 18:39:44,090 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 18 [2022-07-12 18:39:44,098 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-07-12 18:39:44,099 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-07-12 18:39:44,123 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 18:39:44,126 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 18:39:44,157 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 18:39:44,157 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 47 treesize of output 44 [2022-07-12 18:39:44,160 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2022-07-12 18:39:44,194 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:39:44,195 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-07-12 18:39:44,205 INFO L356 Elim1Store]: treesize reduction 4, result has 66.7 percent of original size [2022-07-12 18:39:44,205 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 15 [2022-07-12 18:39:44,230 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:39:44,231 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 26 [2022-07-12 18:39:44,236 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:39:44,237 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-07-12 18:39:44,282 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:39:44,283 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2022-07-12 18:39:44,288 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:39:44,288 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-07-12 18:39:44,317 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:44,318 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-12 18:39:51,708 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:39:51,709 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 87 treesize of output 105 [2022-07-12 18:39:51,808 WARN L833 $PredicateComparison]: unable to prove that (and (forall ((v_prenex_112 Int) (v_prenex_110 (Array Int Int)) (v_prenex_109 Int)) (or (<= 0 (select (store (select (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_110) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_112) v_prenex_109)) (not (<= v_prenex_109 |c_ULTIMATE.start_main_~y~0#1.offset|)) (not (<= 0 v_prenex_109)))) (forall ((|v_ULTIMATE.start_main_~list~0#1.offset_36| Int) (|v_ULTIMATE.start_main_#t~malloc8#1.base_14| Int) (v_ArrVal_1006 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1008 Int) (v_ArrVal_1007 Int) (v_ArrVal_1009 Int)) (or (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_14|) (let ((.cse0 (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8))) (<= (+ (select (store (select (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_1006) |c_ULTIMATE.start_main_~y~0#1.base|) .cse0 v_ArrVal_1008) |v_ULTIMATE.start_main_~list~0#1.offset_36|) 4) (select (store |c_#length| |v_ULTIMATE.start_main_#t~malloc8#1.base_14| v_ArrVal_1007) (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_1005) |c_ULTIMATE.start_main_~y~0#1.base|) .cse0 v_ArrVal_1009) |v_ULTIMATE.start_main_~list~0#1.offset_36|)))) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_36| |c_ULTIMATE.start_main_~y~0#1.offset|)) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_36|))))) is different from false [2022-07-12 18:39:51,817 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:39:51,817 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 24 [2022-07-12 18:39:51,819 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 36 [2022-07-12 18:39:51,821 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:39:51,826 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:39:51,826 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 21 [2022-07-12 18:39:51,828 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:39:51,830 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2022-07-12 18:39:51,846 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:39:51,847 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 50 treesize of output 51 [2022-07-12 18:39:51,849 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:39:51,850 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 44 [2022-07-12 18:39:51,856 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:39:51,856 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 37 treesize of output 38 [2022-07-12 18:39:51,858 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:39:51,860 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 31 [2022-07-12 18:39:51,862 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:39:51,864 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:39:51,864 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 22 [2022-07-12 18:39:51,866 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:39:51,868 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:39:51,869 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2022-07-12 18:39:59,967 WARN L233 SmtUtils]: Spent 8.02s on a formula simplification. DAG size of input: 30 DAG size of output: 27 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-07-12 18:40:00,063 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:40:00,063 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1356956989] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-12 18:40:00,063 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-12 18:40:00,063 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 11] total 26 [2022-07-12 18:40:00,063 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1186442159] [2022-07-12 18:40:00,064 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-12 18:40:00,064 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-07-12 18:40:00,064 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:40:00,064 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-07-12 18:40:00,064 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=569, Unknown=2, NotChecked=48, Total=702 [2022-07-12 18:40:00,064 INFO L87 Difference]: Start difference. First operand 163 states and 188 transitions. Second operand has 27 states, 26 states have (on average 2.8846153846153846) internal successors, (75), 27 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:40:02,142 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~y~0#1.base|) |c_ULTIMATE.start_main_~y~0#1.offset|))) (and (= (select |c_#valid| |c_ULTIMATE.start_main_~list~0#1.base|) 1) (= |c_ULTIMATE.start_main_~y~0#1.offset| 0) (<= 13 (select |c_#length| .cse0)) (<= 13 (select |c_#length| |c_ULTIMATE.start_main_~y~0#1.base|)) (= |c_ULTIMATE.start_main_~list~0#1.offset| 0) (= (select |c_#valid| .cse0) 1) (= (select (select |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_main_~y~0#1.base|) |c_ULTIMATE.start_main_~y~0#1.offset|) 0) (= .cse0 |c_ULTIMATE.start_main_~list~0#1.base|) (not (= |c_ULTIMATE.start_main_~list~0#1.base| |c_ULTIMATE.start_main_~y~0#1.base|)) (forall ((v_prenex_112 Int) (v_prenex_110 (Array Int Int)) (v_prenex_109 Int)) (or (<= 0 (select (store (select (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_main_~list~0#1.base| v_prenex_110) |c_ULTIMATE.start_main_~y~0#1.base|) (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8) v_prenex_112) v_prenex_109)) (not (<= v_prenex_109 |c_ULTIMATE.start_main_~y~0#1.offset|)) (not (<= 0 v_prenex_109)))) (<= 13 (select |c_#length| |c_ULTIMATE.start_main_~list~0#1.base|)) (not (= .cse0 |c_ULTIMATE.start_main_~y~0#1.base|)) (= (select |c_#valid| |c_ULTIMATE.start_main_~y~0#1.base|) 1) (forall ((|v_ULTIMATE.start_main_~list~0#1.offset_36| Int) (|v_ULTIMATE.start_main_#t~malloc8#1.base_14| Int) (v_ArrVal_1006 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1008 Int) (v_ArrVal_1007 Int) (v_ArrVal_1009 Int)) (or (= |c_ULTIMATE.start_main_~list~0#1.base| |v_ULTIMATE.start_main_#t~malloc8#1.base_14|) (let ((.cse1 (+ |c_ULTIMATE.start_main_~y~0#1.offset| 8))) (<= (+ (select (store (select (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_1006) |c_ULTIMATE.start_main_~y~0#1.base|) .cse1 v_ArrVal_1008) |v_ULTIMATE.start_main_~list~0#1.offset_36|) 4) (select (store |c_#length| |v_ULTIMATE.start_main_#t~malloc8#1.base_14| v_ArrVal_1007) (select (store (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~list~0#1.base| v_ArrVal_1005) |c_ULTIMATE.start_main_~y~0#1.base|) .cse1 v_ArrVal_1009) |v_ULTIMATE.start_main_~list~0#1.offset_36|)))) (not (<= |v_ULTIMATE.start_main_~list~0#1.offset_36| |c_ULTIMATE.start_main_~y~0#1.offset|)) (not (<= 0 |v_ULTIMATE.start_main_~list~0#1.offset_36|)))))) is different from false [2022-07-12 18:40:02,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:40:02,531 INFO L93 Difference]: Finished difference Result 201 states and 231 transitions. [2022-07-12 18:40:02,532 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-07-12 18:40:02,532 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 26 states have (on average 2.8846153846153846) internal successors, (75), 27 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 31 [2022-07-12 18:40:02,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:40:02,532 INFO L225 Difference]: With dead ends: 201 [2022-07-12 18:40:02,533 INFO L226 Difference]: Without dead ends: 201 [2022-07-12 18:40:02,533 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 49 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 227 ImplicationChecksByTransitivity, 17.7s TimeCoverageRelationStatistics Valid=174, Invalid=1091, Unknown=3, NotChecked=138, Total=1406 [2022-07-12 18:40:02,533 INFO L413 NwaCegarLoop]: 29 mSDtfsCounter, 79 mSDsluCounter, 335 mSDsCounter, 0 mSdLazyCounter, 663 mSolverCounterSat, 36 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 79 SdHoareTripleChecker+Valid, 364 SdHoareTripleChecker+Invalid, 1103 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 36 IncrementalHoareTripleChecker+Valid, 663 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 404 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-07-12 18:40:02,534 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [79 Valid, 364 Invalid, 1103 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [36 Valid, 663 Invalid, 0 Unknown, 404 Unchecked, 0.3s Time] [2022-07-12 18:40:02,534 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201 states. [2022-07-12 18:40:02,535 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201 to 149. [2022-07-12 18:40:02,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 149 states, 137 states have (on average 1.2627737226277371) internal successors, (173), 148 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:40:02,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 173 transitions. [2022-07-12 18:40:02,536 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 173 transitions. Word has length 31 [2022-07-12 18:40:02,536 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:40:02,536 INFO L495 AbstractCegarLoop]: Abstraction has 149 states and 173 transitions. [2022-07-12 18:40:02,537 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 26 states have (on average 2.8846153846153846) internal successors, (75), 27 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:40:02,537 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 173 transitions. [2022-07-12 18:40:02,537 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-07-12 18:40:02,537 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:40:02,537 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:40:02,554 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-07-12 18:40:02,754 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable20 [2022-07-12 18:40:02,754 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 24 more)] === [2022-07-12 18:40:02,754 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:40:02,754 INFO L85 PathProgramCache]: Analyzing trace with hash 678559033, now seen corresponding path program 1 times [2022-07-12 18:40:02,755 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:40:02,755 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1299949667] [2022-07-12 18:40:02,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:40:02,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:40:02,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:40:02,982 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:40:02,982 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:40:02,982 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1299949667] [2022-07-12 18:40:02,982 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1299949667] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 18:40:02,982 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1476476742] [2022-07-12 18:40:02,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:40:02,983 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 18:40:02,983 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-12 18:40:02,984 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-12 18:40:02,985 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-07-12 18:40:03,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:40:03,072 INFO L263 TraceCheckSpWp]: Trace formula consists of 236 conjuncts, 64 conjunts are in the unsatisfiable core [2022-07-12 18:40:03,078 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 18:40:03,081 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 18:40:03,089 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-07-12 18:40:03,097 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-07-12 18:40:03,117 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-07-12 18:40:03,119 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-07-12 18:40:03,150 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 18 [2022-07-12 18:40:03,155 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 18 [2022-07-12 18:40:03,183 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:03,184 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:03,186 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:40:03,186 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 85 treesize of output 62 [2022-07-12 18:40:03,194 INFO L356 Elim1Store]: treesize reduction 21, result has 34.4 percent of original size [2022-07-12 18:40:03,194 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 41 [2022-07-12 18:40:03,252 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:03,254 INFO L356 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-07-12 18:40:03,255 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 1 case distinctions, treesize of input 49 treesize of output 53 [2022-07-12 18:40:03,258 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:03,259 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:03,265 INFO L356 Elim1Store]: treesize reduction 17, result has 29.2 percent of original size [2022-07-12 18:40:03,265 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 65 treesize of output 54 [2022-07-12 18:40:03,584 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:03,585 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:03,586 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:03,590 INFO L356 Elim1Store]: treesize reduction 5, result has 37.5 percent of original size [2022-07-12 18:40:03,590 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 68 treesize of output 40 [2022-07-12 18:40:03,643 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:40:03,643 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-12 18:40:43,807 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:43,810 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:43,853 INFO L356 Elim1Store]: treesize reduction 22, result has 62.1 percent of original size [2022-07-12 18:40:43,853 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 722 treesize of output 625 [2022-07-12 18:40:43,862 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:43,862 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:43,927 INFO L356 Elim1Store]: treesize reduction 239, result has 21.4 percent of original size [2022-07-12 18:40:43,928 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 503720 treesize of output 117843 [2022-07-12 18:40:45,843 INFO L356 Elim1Store]: treesize reduction 19, result has 51.3 percent of original size [2022-07-12 18:40:45,844 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 97136 treesize of output 88470 [2022-07-12 18:40:46,137 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-07-12 18:40:46,138 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 88419 treesize of output 81513 [2022-07-12 18:40:46,425 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:46,429 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:46,429 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:46,430 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:46,432 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 71150 treesize of output 64238 [2022-07-12 18:40:46,741 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4