./Ultimate.py --spec ../sv-benchmarks/c/properties/valid-memsafety.prp --file ../sv-benchmarks/c/memsafety-ext/skiplist_2lvl.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 6c24879c Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerMemDerefMemtrack.xml -i ../sv-benchmarks/c/memsafety-ext/skiplist_2lvl.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 0d6c543285e4316d7bccce7ec33cf3dc3eeb4c474821e85404caf1203b5dfc7e --- Real Ultimate output --- This is Ultimate 0.2.2-?-6c24879 [2022-07-12 18:39:36,475 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-07-12 18:39:36,478 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-07-12 18:39:36,519 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-07-12 18:39:36,522 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-07-12 18:39:36,523 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-07-12 18:39:36,527 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-07-12 18:39:36,531 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-07-12 18:39:36,533 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-07-12 18:39:36,534 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-07-12 18:39:36,535 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-07-12 18:39:36,537 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-07-12 18:39:36,538 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-07-12 18:39:36,541 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-07-12 18:39:36,542 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-07-12 18:39:36,544 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-07-12 18:39:36,545 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-07-12 18:39:36,549 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-07-12 18:39:36,551 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-07-12 18:39:36,554 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-07-12 18:39:36,557 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-07-12 18:39:36,558 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-07-12 18:39:36,559 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-07-12 18:39:36,560 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-07-12 18:39:36,560 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-07-12 18:39:36,563 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-07-12 18:39:36,564 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-07-12 18:39:36,565 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-07-12 18:39:36,565 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-07-12 18:39:36,566 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-07-12 18:39:36,567 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-07-12 18:39:36,567 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-07-12 18:39:36,568 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-07-12 18:39:36,569 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-07-12 18:39:36,570 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-07-12 18:39:36,570 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-07-12 18:39:36,570 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-07-12 18:39:36,571 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-07-12 18:39:36,571 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-07-12 18:39:36,571 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-07-12 18:39:36,573 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-07-12 18:39:36,574 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-07-12 18:39:36,575 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2022-07-12 18:39:36,603 INFO L113 SettingsManager]: Loading preferences was successful [2022-07-12 18:39:36,604 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-07-12 18:39:36,604 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-07-12 18:39:36,604 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-07-12 18:39:36,605 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-07-12 18:39:36,605 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-07-12 18:39:36,605 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-07-12 18:39:36,605 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-07-12 18:39:36,606 INFO L138 SettingsManager]: * Use SBE=true [2022-07-12 18:39:36,607 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-07-12 18:39:36,607 INFO L138 SettingsManager]: * sizeof long=4 [2022-07-12 18:39:36,607 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-07-12 18:39:36,607 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-07-12 18:39:36,607 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-07-12 18:39:36,607 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-07-12 18:39:36,608 INFO L138 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2022-07-12 18:39:36,608 INFO L138 SettingsManager]: * Bitprecise bitfields=true [2022-07-12 18:39:36,608 INFO L138 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2022-07-12 18:39:36,608 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-07-12 18:39:36,608 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-07-12 18:39:36,609 INFO L138 SettingsManager]: * sizeof long double=12 [2022-07-12 18:39:36,609 INFO L138 SettingsManager]: * Use constant arrays=true [2022-07-12 18:39:36,609 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-07-12 18:39:36,609 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-07-12 18:39:36,609 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-07-12 18:39:36,609 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-07-12 18:39:36,610 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-07-12 18:39:36,610 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-07-12 18:39:36,610 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-07-12 18:39:36,610 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-07-12 18:39:36,611 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 0d6c543285e4316d7bccce7ec33cf3dc3eeb4c474821e85404caf1203b5dfc7e [2022-07-12 18:39:36,837 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-07-12 18:39:36,868 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-07-12 18:39:36,870 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-07-12 18:39:36,871 INFO L271 PluginConnector]: Initializing CDTParser... [2022-07-12 18:39:36,872 INFO L275 PluginConnector]: CDTParser initialized [2022-07-12 18:39:36,873 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/memsafety-ext/skiplist_2lvl.i [2022-07-12 18:39:36,937 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/38475f756/dc68bd789680425095a28904ec63a071/FLAGa2617181c [2022-07-12 18:39:37,352 INFO L306 CDTParser]: Found 1 translation units. [2022-07-12 18:39:37,353 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/memsafety-ext/skiplist_2lvl.i [2022-07-12 18:39:37,362 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/38475f756/dc68bd789680425095a28904ec63a071/FLAGa2617181c [2022-07-12 18:39:37,375 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/38475f756/dc68bd789680425095a28904ec63a071 [2022-07-12 18:39:37,381 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-07-12 18:39:37,382 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-07-12 18:39:37,386 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-07-12 18:39:37,386 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-07-12 18:39:37,389 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-07-12 18:39:37,390 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.07 06:39:37" (1/1) ... [2022-07-12 18:39:37,391 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@61422afb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 06:39:37, skipping insertion in model container [2022-07-12 18:39:37,391 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.07 06:39:37" (1/1) ... [2022-07-12 18:39:37,398 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-07-12 18:39:37,444 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-07-12 18:39:37,690 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-12 18:39:37,697 INFO L203 MainTranslator]: Completed pre-run [2022-07-12 18:39:37,730 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-12 18:39:37,758 INFO L208 MainTranslator]: Completed translation [2022-07-12 18:39:37,758 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 06:39:37 WrapperNode [2022-07-12 18:39:37,758 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-07-12 18:39:37,759 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-07-12 18:39:37,760 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-07-12 18:39:37,760 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-07-12 18:39:37,765 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 06:39:37" (1/1) ... [2022-07-12 18:39:37,776 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 06:39:37" (1/1) ... [2022-07-12 18:39:37,798 INFO L137 Inliner]: procedures = 127, calls = 45, calls flagged for inlining = 5, calls inlined = 5, statements flattened = 138 [2022-07-12 18:39:37,798 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-07-12 18:39:37,799 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-07-12 18:39:37,799 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-07-12 18:39:37,799 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-07-12 18:39:37,806 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 06:39:37" (1/1) ... [2022-07-12 18:39:37,806 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 06:39:37" (1/1) ... [2022-07-12 18:39:37,810 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 06:39:37" (1/1) ... [2022-07-12 18:39:37,810 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 06:39:37" (1/1) ... [2022-07-12 18:39:37,822 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 06:39:37" (1/1) ... [2022-07-12 18:39:37,838 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 06:39:37" (1/1) ... [2022-07-12 18:39:37,839 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 06:39:37" (1/1) ... [2022-07-12 18:39:37,847 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-07-12 18:39:37,848 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-07-12 18:39:37,848 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-07-12 18:39:37,848 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-07-12 18:39:37,849 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 06:39:37" (1/1) ... [2022-07-12 18:39:37,864 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-07-12 18:39:37,875 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-12 18:39:37,893 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-07-12 18:39:37,915 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-07-12 18:39:37,936 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-07-12 18:39:37,936 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-07-12 18:39:37,937 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-07-12 18:39:37,937 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-07-12 18:39:37,937 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-07-12 18:39:37,937 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-07-12 18:39:37,938 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-07-12 18:39:37,938 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-07-12 18:39:38,059 INFO L234 CfgBuilder]: Building ICFG [2022-07-12 18:39:38,061 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-07-12 18:39:38,352 INFO L275 CfgBuilder]: Performing block encoding [2022-07-12 18:39:38,359 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-07-12 18:39:38,359 INFO L299 CfgBuilder]: Removed 4 assume(true) statements. [2022-07-12 18:39:38,361 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.07 06:39:38 BoogieIcfgContainer [2022-07-12 18:39:38,361 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-07-12 18:39:38,363 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-07-12 18:39:38,363 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-07-12 18:39:38,366 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-07-12 18:39:38,366 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 12.07 06:39:37" (1/3) ... [2022-07-12 18:39:38,367 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@68a6dfe9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.07 06:39:38, skipping insertion in model container [2022-07-12 18:39:38,367 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 06:39:37" (2/3) ... [2022-07-12 18:39:38,368 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@68a6dfe9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.07 06:39:38, skipping insertion in model container [2022-07-12 18:39:38,368 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.07 06:39:38" (3/3) ... [2022-07-12 18:39:38,369 INFO L111 eAbstractionObserver]: Analyzing ICFG skiplist_2lvl.i [2022-07-12 18:39:38,381 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-07-12 18:39:38,382 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 65 error locations. [2022-07-12 18:39:38,487 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-07-12 18:39:38,493 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@10049f0a, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@5f8c175f [2022-07-12 18:39:38,493 INFO L358 AbstractCegarLoop]: Starting to check reachability of 65 error locations. [2022-07-12 18:39:38,497 INFO L276 IsEmpty]: Start isEmpty. Operand has 133 states, 67 states have (on average 2.1343283582089554) internal successors, (143), 132 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:38,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2022-07-12 18:39:38,514 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:38,515 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1] [2022-07-12 18:39:38,515 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:38,520 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:38,521 INFO L85 PathProgramCache]: Analyzing trace with hash 29857, now seen corresponding path program 1 times [2022-07-12 18:39:38,528 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:38,539 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1495969172] [2022-07-12 18:39:38,540 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:38,541 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:38,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:38,740 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:38,741 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:38,742 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1495969172] [2022-07-12 18:39:38,743 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1495969172] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:38,743 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:38,744 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-07-12 18:39:38,745 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [785805145] [2022-07-12 18:39:38,746 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:38,749 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-07-12 18:39:38,750 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:38,780 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-07-12 18:39:38,781 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-12 18:39:38,784 INFO L87 Difference]: Start difference. First operand has 133 states, 67 states have (on average 2.1343283582089554) internal successors, (143), 132 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:38,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:38,970 INFO L93 Difference]: Finished difference Result 156 states and 163 transitions. [2022-07-12 18:39:38,971 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-07-12 18:39:38,973 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 3 [2022-07-12 18:39:38,973 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:38,983 INFO L225 Difference]: With dead ends: 156 [2022-07-12 18:39:38,983 INFO L226 Difference]: Without dead ends: 154 [2022-07-12 18:39:38,986 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-12 18:39:38,991 INFO L413 NwaCegarLoop]: 67 mSDtfsCounter, 122 mSDsluCounter, 19 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 122 SdHoareTripleChecker+Valid, 86 SdHoareTripleChecker+Invalid, 90 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:38,992 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [122 Valid, 86 Invalid, 90 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-07-12 18:39:39,008 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2022-07-12 18:39:39,030 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 124. [2022-07-12 18:39:39,032 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 124 states, 66 states have (on average 1.9696969696969697) internal successors, (130), 123 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:39,041 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 130 transitions. [2022-07-12 18:39:39,043 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 130 transitions. Word has length 3 [2022-07-12 18:39:39,043 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:39,043 INFO L495 AbstractCegarLoop]: Abstraction has 124 states and 130 transitions. [2022-07-12 18:39:39,044 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:39,044 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 130 transitions. [2022-07-12 18:39:39,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2022-07-12 18:39:39,044 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:39,044 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1] [2022-07-12 18:39:39,045 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-07-12 18:39:39,046 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:39,048 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:39,049 INFO L85 PathProgramCache]: Analyzing trace with hash 29858, now seen corresponding path program 1 times [2022-07-12 18:39:39,049 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:39,049 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1820760794] [2022-07-12 18:39:39,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:39,050 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:39,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:39,120 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:39,121 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:39,121 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1820760794] [2022-07-12 18:39:39,122 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1820760794] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:39,122 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:39,122 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-07-12 18:39:39,122 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2054013755] [2022-07-12 18:39:39,122 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:39,128 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-07-12 18:39:39,128 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:39,129 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-07-12 18:39:39,129 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-12 18:39:39,130 INFO L87 Difference]: Start difference. First operand 124 states and 130 transitions. Second operand has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:39,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:39,230 INFO L93 Difference]: Finished difference Result 117 states and 123 transitions. [2022-07-12 18:39:39,230 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-07-12 18:39:39,230 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 3 [2022-07-12 18:39:39,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:39,234 INFO L225 Difference]: With dead ends: 117 [2022-07-12 18:39:39,234 INFO L226 Difference]: Without dead ends: 117 [2022-07-12 18:39:39,242 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-12 18:39:39,244 INFO L413 NwaCegarLoop]: 69 mSDtfsCounter, 119 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 55 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 119 SdHoareTripleChecker+Valid, 69 SdHoareTripleChecker+Invalid, 63 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 55 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:39,245 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [119 Valid, 69 Invalid, 63 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 55 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-07-12 18:39:39,248 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2022-07-12 18:39:39,259 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 117. [2022-07-12 18:39:39,261 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 117 states, 66 states have (on average 1.8636363636363635) internal successors, (123), 116 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:39,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 123 transitions. [2022-07-12 18:39:39,262 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 123 transitions. Word has length 3 [2022-07-12 18:39:39,262 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:39,263 INFO L495 AbstractCegarLoop]: Abstraction has 117 states and 123 transitions. [2022-07-12 18:39:39,263 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:39,263 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 123 transitions. [2022-07-12 18:39:39,263 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2022-07-12 18:39:39,264 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:39,264 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:39,265 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-07-12 18:39:39,267 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr10REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:39,268 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:39,269 INFO L85 PathProgramCache]: Analyzing trace with hash 1056606480, now seen corresponding path program 1 times [2022-07-12 18:39:39,269 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:39,269 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [610107756] [2022-07-12 18:39:39,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:39,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:39,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:39,395 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:39,401 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:39,401 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [610107756] [2022-07-12 18:39:39,401 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [610107756] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:39,401 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:39,401 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-07-12 18:39:39,402 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [120118918] [2022-07-12 18:39:39,402 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:39,403 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-07-12 18:39:39,403 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:39,404 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-07-12 18:39:39,404 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-07-12 18:39:39,404 INFO L87 Difference]: Start difference. First operand 117 states and 123 transitions. Second operand has 5 states, 4 states have (on average 2.5) internal successors, (10), 5 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:39,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:39,574 INFO L93 Difference]: Finished difference Result 116 states and 122 transitions. [2022-07-12 18:39:39,575 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-07-12 18:39:39,575 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 2.5) internal successors, (10), 5 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 10 [2022-07-12 18:39:39,575 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:39,576 INFO L225 Difference]: With dead ends: 116 [2022-07-12 18:39:39,576 INFO L226 Difference]: Without dead ends: 116 [2022-07-12 18:39:39,577 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-07-12 18:39:39,578 INFO L413 NwaCegarLoop]: 112 mSDtfsCounter, 8 mSDsluCounter, 182 mSDsCounter, 0 mSdLazyCounter, 177 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 294 SdHoareTripleChecker+Invalid, 178 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 177 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:39,578 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [8 Valid, 294 Invalid, 178 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 177 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-07-12 18:39:39,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2022-07-12 18:39:39,582 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116. [2022-07-12 18:39:39,582 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 116 states, 66 states have (on average 1.8484848484848484) internal successors, (122), 115 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:39,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 122 transitions. [2022-07-12 18:39:39,583 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 122 transitions. Word has length 10 [2022-07-12 18:39:39,583 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:39,583 INFO L495 AbstractCegarLoop]: Abstraction has 116 states and 122 transitions. [2022-07-12 18:39:39,583 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 2.5) internal successors, (10), 5 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:39,584 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 122 transitions. [2022-07-12 18:39:39,584 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2022-07-12 18:39:39,584 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:39,584 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:39,585 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-07-12 18:39:39,585 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr11REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:39,585 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:39,586 INFO L85 PathProgramCache]: Analyzing trace with hash 1056606481, now seen corresponding path program 1 times [2022-07-12 18:39:39,586 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:39,586 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [48540250] [2022-07-12 18:39:39,586 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:39,586 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:39,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:39,694 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:39,694 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:39,695 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [48540250] [2022-07-12 18:39:39,695 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [48540250] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:39,695 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:39,695 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-07-12 18:39:39,695 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [673661956] [2022-07-12 18:39:39,696 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:39,696 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-07-12 18:39:39,696 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:39,697 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-07-12 18:39:39,697 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2022-07-12 18:39:39,697 INFO L87 Difference]: Start difference. First operand 116 states and 122 transitions. Second operand has 6 states, 5 states have (on average 2.0) internal successors, (10), 6 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:39,879 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:39,879 INFO L93 Difference]: Finished difference Result 115 states and 121 transitions. [2022-07-12 18:39:39,880 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-07-12 18:39:39,881 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 2.0) internal successors, (10), 6 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 10 [2022-07-12 18:39:39,881 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:39,881 INFO L225 Difference]: With dead ends: 115 [2022-07-12 18:39:39,882 INFO L226 Difference]: Without dead ends: 115 [2022-07-12 18:39:39,882 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2022-07-12 18:39:39,889 INFO L413 NwaCegarLoop]: 112 mSDtfsCounter, 10 mSDsluCounter, 171 mSDsCounter, 0 mSdLazyCounter, 186 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 283 SdHoareTripleChecker+Invalid, 190 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 186 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:39,890 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [10 Valid, 283 Invalid, 190 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 186 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-07-12 18:39:39,892 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2022-07-12 18:39:39,897 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 115. [2022-07-12 18:39:39,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 115 states, 66 states have (on average 1.8333333333333333) internal successors, (121), 114 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:39,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 121 transitions. [2022-07-12 18:39:39,900 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 121 transitions. Word has length 10 [2022-07-12 18:39:39,900 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:39,900 INFO L495 AbstractCegarLoop]: Abstraction has 115 states and 121 transitions. [2022-07-12 18:39:39,900 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 2.0) internal successors, (10), 6 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:39,901 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 121 transitions. [2022-07-12 18:39:39,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-07-12 18:39:39,901 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:39,901 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:39,901 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-07-12 18:39:39,902 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr12REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:39,902 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:39,903 INFO L85 PathProgramCache]: Analyzing trace with hash -1604937495, now seen corresponding path program 1 times [2022-07-12 18:39:39,903 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:39,903 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1439959724] [2022-07-12 18:39:39,903 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:39,903 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:39,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:39,972 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:39,973 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:39,973 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1439959724] [2022-07-12 18:39:39,973 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1439959724] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:39,973 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:39,974 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-07-12 18:39:39,974 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1833807007] [2022-07-12 18:39:39,974 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:39,975 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-07-12 18:39:39,975 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:39,975 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-07-12 18:39:39,975 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-07-12 18:39:39,976 INFO L87 Difference]: Start difference. First operand 115 states and 121 transitions. Second operand has 5 states, 4 states have (on average 2.75) internal successors, (11), 5 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:40,077 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:40,077 INFO L93 Difference]: Finished difference Result 114 states and 120 transitions. [2022-07-12 18:39:40,078 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-07-12 18:39:40,078 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 2.75) internal successors, (11), 5 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2022-07-12 18:39:40,078 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:40,079 INFO L225 Difference]: With dead ends: 114 [2022-07-12 18:39:40,079 INFO L226 Difference]: Without dead ends: 114 [2022-07-12 18:39:40,079 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-07-12 18:39:40,080 INFO L413 NwaCegarLoop]: 115 mSDtfsCounter, 6 mSDsluCounter, 259 mSDsCounter, 0 mSdLazyCounter, 95 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 374 SdHoareTripleChecker+Invalid, 96 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 95 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:40,080 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 374 Invalid, 96 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 95 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-07-12 18:39:40,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2022-07-12 18:39:40,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 114. [2022-07-12 18:39:40,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 114 states, 66 states have (on average 1.8181818181818181) internal successors, (120), 113 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:40,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 120 transitions. [2022-07-12 18:39:40,084 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 120 transitions. Word has length 11 [2022-07-12 18:39:40,084 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:40,084 INFO L495 AbstractCegarLoop]: Abstraction has 114 states and 120 transitions. [2022-07-12 18:39:40,084 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 2.75) internal successors, (11), 5 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:40,085 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 120 transitions. [2022-07-12 18:39:40,085 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-07-12 18:39:40,085 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:40,085 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:40,085 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-07-12 18:39:40,086 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr13REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:40,086 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:40,086 INFO L85 PathProgramCache]: Analyzing trace with hash -1604937494, now seen corresponding path program 1 times [2022-07-12 18:39:40,086 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:40,087 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [298567102] [2022-07-12 18:39:40,087 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:40,087 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:40,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:40,230 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:40,230 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:40,230 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [298567102] [2022-07-12 18:39:40,230 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [298567102] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:40,230 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:40,231 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-07-12 18:39:40,231 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1937841961] [2022-07-12 18:39:40,231 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:40,231 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-07-12 18:39:40,231 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:40,232 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-07-12 18:39:40,232 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2022-07-12 18:39:40,232 INFO L87 Difference]: Start difference. First operand 114 states and 120 transitions. Second operand has 8 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 8 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:40,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:40,467 INFO L93 Difference]: Finished difference Result 113 states and 119 transitions. [2022-07-12 18:39:40,468 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-07-12 18:39:40,468 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 8 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2022-07-12 18:39:40,468 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:40,469 INFO L225 Difference]: With dead ends: 113 [2022-07-12 18:39:40,469 INFO L226 Difference]: Without dead ends: 113 [2022-07-12 18:39:40,469 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2022-07-12 18:39:40,469 INFO L413 NwaCegarLoop]: 111 mSDtfsCounter, 11 mSDsluCounter, 299 mSDsCounter, 0 mSdLazyCounter, 283 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 11 SdHoareTripleChecker+Valid, 410 SdHoareTripleChecker+Invalid, 288 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 283 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:40,470 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [11 Valid, 410 Invalid, 288 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 283 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-07-12 18:39:40,470 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2022-07-12 18:39:40,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2022-07-12 18:39:40,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 113 states, 66 states have (on average 1.803030303030303) internal successors, (119), 112 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:40,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 119 transitions. [2022-07-12 18:39:40,473 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 119 transitions. Word has length 11 [2022-07-12 18:39:40,473 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:40,474 INFO L495 AbstractCegarLoop]: Abstraction has 113 states and 119 transitions. [2022-07-12 18:39:40,474 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 8 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:40,474 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 119 transitions. [2022-07-12 18:39:40,474 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-07-12 18:39:40,474 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:40,475 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:40,475 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-07-12 18:39:40,475 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr18REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:40,476 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:40,476 INFO L85 PathProgramCache]: Analyzing trace with hash -266592339, now seen corresponding path program 1 times [2022-07-12 18:39:40,476 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:40,476 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1023920860] [2022-07-12 18:39:40,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:40,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:40,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:40,639 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:40,639 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:40,639 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1023920860] [2022-07-12 18:39:40,639 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1023920860] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:40,640 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:40,640 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2022-07-12 18:39:40,640 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [975361412] [2022-07-12 18:39:40,640 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:40,640 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-07-12 18:39:40,641 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:40,641 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-07-12 18:39:40,641 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=81, Unknown=0, NotChecked=0, Total=110 [2022-07-12 18:39:40,641 INFO L87 Difference]: Start difference. First operand 113 states and 119 transitions. Second operand has 11 states, 10 states have (on average 1.5) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:40,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:40,869 INFO L93 Difference]: Finished difference Result 112 states and 118 transitions. [2022-07-12 18:39:40,870 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-07-12 18:39:40,870 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 10 states have (on average 1.5) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 15 [2022-07-12 18:39:40,870 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:40,871 INFO L225 Difference]: With dead ends: 112 [2022-07-12 18:39:40,871 INFO L226 Difference]: Without dead ends: 112 [2022-07-12 18:39:40,871 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2022-07-12 18:39:40,871 INFO L413 NwaCegarLoop]: 105 mSDtfsCounter, 24 mSDsluCounter, 473 mSDsCounter, 0 mSdLazyCounter, 323 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 24 SdHoareTripleChecker+Valid, 578 SdHoareTripleChecker+Invalid, 331 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 323 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:40,872 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [24 Valid, 578 Invalid, 331 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 323 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-07-12 18:39:40,872 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2022-07-12 18:39:40,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112. [2022-07-12 18:39:40,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 112 states, 66 states have (on average 1.7878787878787878) internal successors, (118), 111 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:40,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 118 transitions. [2022-07-12 18:39:40,874 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 118 transitions. Word has length 15 [2022-07-12 18:39:40,874 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:40,874 INFO L495 AbstractCegarLoop]: Abstraction has 112 states and 118 transitions. [2022-07-12 18:39:40,874 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 10 states have (on average 1.5) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:40,874 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 118 transitions. [2022-07-12 18:39:40,875 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-07-12 18:39:40,875 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:40,875 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:40,878 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-07-12 18:39:40,878 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr19REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:40,878 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:40,879 INFO L85 PathProgramCache]: Analyzing trace with hash -266592338, now seen corresponding path program 1 times [2022-07-12 18:39:40,879 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:40,879 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [235844900] [2022-07-12 18:39:40,879 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:40,880 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:40,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:41,046 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:41,047 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:41,047 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [235844900] [2022-07-12 18:39:41,047 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [235844900] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:41,047 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:41,047 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2022-07-12 18:39:41,047 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [777406892] [2022-07-12 18:39:41,047 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:41,048 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-07-12 18:39:41,048 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:41,048 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-07-12 18:39:41,048 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=81, Unknown=0, NotChecked=0, Total=110 [2022-07-12 18:39:41,048 INFO L87 Difference]: Start difference. First operand 112 states and 118 transitions. Second operand has 11 states, 10 states have (on average 1.5) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:41,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:41,241 INFO L93 Difference]: Finished difference Result 111 states and 117 transitions. [2022-07-12 18:39:41,242 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-07-12 18:39:41,242 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 10 states have (on average 1.5) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 15 [2022-07-12 18:39:41,242 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:41,242 INFO L225 Difference]: With dead ends: 111 [2022-07-12 18:39:41,242 INFO L226 Difference]: Without dead ends: 111 [2022-07-12 18:39:41,243 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2022-07-12 18:39:41,243 INFO L413 NwaCegarLoop]: 105 mSDtfsCounter, 20 mSDsluCounter, 374 mSDsCounter, 0 mSdLazyCounter, 207 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 479 SdHoareTripleChecker+Invalid, 218 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 207 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:41,243 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [20 Valid, 479 Invalid, 218 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 207 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-07-12 18:39:41,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2022-07-12 18:39:41,245 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 111. [2022-07-12 18:39:41,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 111 states, 66 states have (on average 1.7727272727272727) internal successors, (117), 110 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:41,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 117 transitions. [2022-07-12 18:39:41,246 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 117 transitions. Word has length 15 [2022-07-12 18:39:41,246 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:41,246 INFO L495 AbstractCegarLoop]: Abstraction has 111 states and 117 transitions. [2022-07-12 18:39:41,246 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 10 states have (on average 1.5) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:41,246 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 117 transitions. [2022-07-12 18:39:41,246 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-07-12 18:39:41,246 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:41,246 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:41,247 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2022-07-12 18:39:41,247 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr20REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:41,247 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:41,247 INFO L85 PathProgramCache]: Analyzing trace with hash 325572089, now seen corresponding path program 1 times [2022-07-12 18:39:41,247 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:41,247 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1711396456] [2022-07-12 18:39:41,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:41,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:41,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:41,290 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:41,290 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:41,290 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1711396456] [2022-07-12 18:39:41,290 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1711396456] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:41,291 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:41,291 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-07-12 18:39:41,291 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1978541720] [2022-07-12 18:39:41,291 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:41,291 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-07-12 18:39:41,292 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:41,292 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-07-12 18:39:41,293 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-07-12 18:39:41,293 INFO L87 Difference]: Start difference. First operand 111 states and 117 transitions. Second operand has 5 states, 4 states have (on average 4.0) internal successors, (16), 5 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:41,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:41,369 INFO L93 Difference]: Finished difference Result 110 states and 116 transitions. [2022-07-12 18:39:41,370 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-07-12 18:39:41,370 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 4.0) internal successors, (16), 5 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2022-07-12 18:39:41,370 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:41,371 INFO L225 Difference]: With dead ends: 110 [2022-07-12 18:39:41,371 INFO L226 Difference]: Without dead ends: 110 [2022-07-12 18:39:41,371 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-07-12 18:39:41,373 INFO L413 NwaCegarLoop]: 112 mSDtfsCounter, 5 mSDsluCounter, 251 mSDsCounter, 0 mSdLazyCounter, 92 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 363 SdHoareTripleChecker+Invalid, 93 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 92 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:41,373 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 363 Invalid, 93 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 92 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-07-12 18:39:41,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2022-07-12 18:39:41,375 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 110. [2022-07-12 18:39:41,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 110 states, 66 states have (on average 1.7575757575757576) internal successors, (116), 109 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:41,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 116 transitions. [2022-07-12 18:39:41,376 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 116 transitions. Word has length 16 [2022-07-12 18:39:41,377 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:41,377 INFO L495 AbstractCegarLoop]: Abstraction has 110 states and 116 transitions. [2022-07-12 18:39:41,377 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 4.0) internal successors, (16), 5 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:41,377 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 116 transitions. [2022-07-12 18:39:41,377 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-07-12 18:39:41,377 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:41,378 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:41,378 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2022-07-12 18:39:41,378 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr21REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:41,379 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:41,379 INFO L85 PathProgramCache]: Analyzing trace with hash 325572090, now seen corresponding path program 1 times [2022-07-12 18:39:41,379 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:41,379 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [83159808] [2022-07-12 18:39:41,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:41,380 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:41,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:41,546 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:41,546 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:41,547 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [83159808] [2022-07-12 18:39:41,547 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [83159808] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:41,547 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:41,547 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2022-07-12 18:39:41,547 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [248373233] [2022-07-12 18:39:41,547 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:41,548 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-07-12 18:39:41,548 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:41,548 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-07-12 18:39:41,548 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=81, Unknown=0, NotChecked=0, Total=110 [2022-07-12 18:39:41,549 INFO L87 Difference]: Start difference. First operand 110 states and 116 transitions. Second operand has 11 states, 10 states have (on average 1.6) internal successors, (16), 11 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:41,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:41,722 INFO L93 Difference]: Finished difference Result 109 states and 115 transitions. [2022-07-12 18:39:41,722 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-07-12 18:39:41,722 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 10 states have (on average 1.6) internal successors, (16), 11 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2022-07-12 18:39:41,722 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:41,723 INFO L225 Difference]: With dead ends: 109 [2022-07-12 18:39:41,723 INFO L226 Difference]: Without dead ends: 109 [2022-07-12 18:39:41,723 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2022-07-12 18:39:41,733 INFO L413 NwaCegarLoop]: 104 mSDtfsCounter, 15 mSDsluCounter, 369 mSDsCounter, 0 mSdLazyCounter, 195 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 473 SdHoareTripleChecker+Invalid, 206 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 195 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:41,734 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [15 Valid, 473 Invalid, 206 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 195 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-07-12 18:39:41,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states. [2022-07-12 18:39:41,735 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 109. [2022-07-12 18:39:41,735 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 109 states, 66 states have (on average 1.7424242424242424) internal successors, (115), 108 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:41,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109 states to 109 states and 115 transitions. [2022-07-12 18:39:41,736 INFO L78 Accepts]: Start accepts. Automaton has 109 states and 115 transitions. Word has length 16 [2022-07-12 18:39:41,736 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:41,736 INFO L495 AbstractCegarLoop]: Abstraction has 109 states and 115 transitions. [2022-07-12 18:39:41,736 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 10 states have (on average 1.6) internal successors, (16), 11 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:41,736 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 115 transitions. [2022-07-12 18:39:41,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-07-12 18:39:41,736 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:41,736 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:41,737 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2022-07-12 18:39:41,737 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr22REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:41,737 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:41,737 INFO L85 PathProgramCache]: Analyzing trace with hash 379588598, now seen corresponding path program 1 times [2022-07-12 18:39:41,737 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:41,737 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1953541512] [2022-07-12 18:39:41,737 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:41,737 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:41,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:41,783 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:41,784 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:41,784 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1953541512] [2022-07-12 18:39:41,784 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1953541512] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:41,784 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:41,784 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-07-12 18:39:41,784 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [869383032] [2022-07-12 18:39:41,785 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:41,785 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-07-12 18:39:41,785 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:41,785 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-07-12 18:39:41,786 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-07-12 18:39:41,786 INFO L87 Difference]: Start difference. First operand 109 states and 115 transitions. Second operand has 6 states, 5 states have (on average 4.2) internal successors, (21), 6 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:41,915 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:41,916 INFO L93 Difference]: Finished difference Result 170 states and 179 transitions. [2022-07-12 18:39:41,916 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-07-12 18:39:41,916 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 4.2) internal successors, (21), 6 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 21 [2022-07-12 18:39:41,917 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:41,917 INFO L225 Difference]: With dead ends: 170 [2022-07-12 18:39:41,917 INFO L226 Difference]: Without dead ends: 170 [2022-07-12 18:39:41,918 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2022-07-12 18:39:41,918 INFO L413 NwaCegarLoop]: 75 mSDtfsCounter, 362 mSDsluCounter, 80 mSDsCounter, 0 mSdLazyCounter, 188 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 362 SdHoareTripleChecker+Valid, 155 SdHoareTripleChecker+Invalid, 195 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 188 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:41,919 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [362 Valid, 155 Invalid, 195 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 188 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-07-12 18:39:41,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states. [2022-07-12 18:39:41,920 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 107. [2022-07-12 18:39:41,921 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 107 states, 66 states have (on average 1.7121212121212122) internal successors, (113), 106 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:41,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 113 transitions. [2022-07-12 18:39:41,921 INFO L78 Accepts]: Start accepts. Automaton has 107 states and 113 transitions. Word has length 21 [2022-07-12 18:39:41,921 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:41,921 INFO L495 AbstractCegarLoop]: Abstraction has 107 states and 113 transitions. [2022-07-12 18:39:41,922 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 4.2) internal successors, (21), 6 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:41,922 INFO L276 IsEmpty]: Start isEmpty. Operand 107 states and 113 transitions. [2022-07-12 18:39:41,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-07-12 18:39:41,922 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:41,922 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:41,923 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2022-07-12 18:39:41,923 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr23REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:41,923 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:41,923 INFO L85 PathProgramCache]: Analyzing trace with hash 379588599, now seen corresponding path program 1 times [2022-07-12 18:39:41,923 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:41,924 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [763127865] [2022-07-12 18:39:41,924 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:41,924 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:41,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:41,990 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:41,990 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:41,990 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [763127865] [2022-07-12 18:39:41,990 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [763127865] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:41,991 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:41,991 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-07-12 18:39:41,991 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1605838604] [2022-07-12 18:39:41,991 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:41,991 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-07-12 18:39:41,992 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:41,992 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-07-12 18:39:41,992 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2022-07-12 18:39:41,992 INFO L87 Difference]: Start difference. First operand 107 states and 113 transitions. Second operand has 7 states, 6 states have (on average 3.5) internal successors, (21), 7 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:42,134 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:42,134 INFO L93 Difference]: Finished difference Result 141 states and 148 transitions. [2022-07-12 18:39:42,134 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-07-12 18:39:42,135 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 3.5) internal successors, (21), 7 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 21 [2022-07-12 18:39:42,135 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:42,136 INFO L225 Difference]: With dead ends: 141 [2022-07-12 18:39:42,136 INFO L226 Difference]: Without dead ends: 141 [2022-07-12 18:39:42,136 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2022-07-12 18:39:42,137 INFO L413 NwaCegarLoop]: 85 mSDtfsCounter, 382 mSDsluCounter, 32 mSDsCounter, 0 mSdLazyCounter, 120 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 382 SdHoareTripleChecker+Valid, 117 SdHoareTripleChecker+Invalid, 127 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 120 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:42,137 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [382 Valid, 117 Invalid, 127 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 120 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-07-12 18:39:42,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2022-07-12 18:39:42,144 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 105. [2022-07-12 18:39:42,144 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 105 states, 66 states have (on average 1.6818181818181819) internal successors, (111), 104 states have internal predecessors, (111), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:42,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 111 transitions. [2022-07-12 18:39:42,145 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 111 transitions. Word has length 21 [2022-07-12 18:39:42,145 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:42,145 INFO L495 AbstractCegarLoop]: Abstraction has 105 states and 111 transitions. [2022-07-12 18:39:42,145 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 3.5) internal successors, (21), 7 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:42,146 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 111 transitions. [2022-07-12 18:39:42,146 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-07-12 18:39:42,149 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:42,149 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:42,150 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2022-07-12 18:39:42,150 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr48REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:42,150 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:42,151 INFO L85 PathProgramCache]: Analyzing trace with hash -1117654205, now seen corresponding path program 1 times [2022-07-12 18:39:42,151 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:42,151 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1516727286] [2022-07-12 18:39:42,151 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:42,151 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:42,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:42,199 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:42,199 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:42,200 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1516727286] [2022-07-12 18:39:42,200 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1516727286] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:42,200 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:42,200 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-07-12 18:39:42,200 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1201872354] [2022-07-12 18:39:42,200 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:42,201 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-07-12 18:39:42,201 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:42,201 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-07-12 18:39:42,201 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-07-12 18:39:42,202 INFO L87 Difference]: Start difference. First operand 105 states and 111 transitions. Second operand has 6 states, 5 states have (on average 4.4) internal successors, (22), 6 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:42,330 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:42,331 INFO L93 Difference]: Finished difference Result 126 states and 133 transitions. [2022-07-12 18:39:42,331 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-07-12 18:39:42,331 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 4.4) internal successors, (22), 6 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 22 [2022-07-12 18:39:42,331 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:42,332 INFO L225 Difference]: With dead ends: 126 [2022-07-12 18:39:42,332 INFO L226 Difference]: Without dead ends: 126 [2022-07-12 18:39:42,332 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2022-07-12 18:39:42,333 INFO L413 NwaCegarLoop]: 51 mSDtfsCounter, 297 mSDsluCounter, 79 mSDsCounter, 0 mSdLazyCounter, 181 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 297 SdHoareTripleChecker+Valid, 130 SdHoareTripleChecker+Invalid, 195 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 181 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:42,333 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [297 Valid, 130 Invalid, 195 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 181 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-07-12 18:39:42,333 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2022-07-12 18:39:42,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 102. [2022-07-12 18:39:42,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 102 states, 67 states have (on average 1.626865671641791) internal successors, (109), 101 states have internal predecessors, (109), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:42,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 109 transitions. [2022-07-12 18:39:42,335 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 109 transitions. Word has length 22 [2022-07-12 18:39:42,336 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:42,336 INFO L495 AbstractCegarLoop]: Abstraction has 102 states and 109 transitions. [2022-07-12 18:39:42,336 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 4.4) internal successors, (22), 6 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:42,336 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 109 transitions. [2022-07-12 18:39:42,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-07-12 18:39:42,336 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:42,336 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:42,336 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2022-07-12 18:39:42,336 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr49REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:42,337 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:42,337 INFO L85 PathProgramCache]: Analyzing trace with hash -1117654204, now seen corresponding path program 1 times [2022-07-12 18:39:42,337 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:42,337 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [953995779] [2022-07-12 18:39:42,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:42,337 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:42,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:42,437 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:42,437 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:42,437 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [953995779] [2022-07-12 18:39:42,438 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [953995779] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:42,438 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:42,438 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-07-12 18:39:42,438 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1124084762] [2022-07-12 18:39:42,438 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:42,439 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-07-12 18:39:42,439 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:42,439 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-07-12 18:39:42,439 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2022-07-12 18:39:42,439 INFO L87 Difference]: Start difference. First operand 102 states and 109 transitions. Second operand has 7 states, 6 states have (on average 3.6666666666666665) internal successors, (22), 7 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:42,581 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:42,581 INFO L93 Difference]: Finished difference Result 97 states and 103 transitions. [2022-07-12 18:39:42,582 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-07-12 18:39:42,582 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 3.6666666666666665) internal successors, (22), 7 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 22 [2022-07-12 18:39:42,582 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:42,582 INFO L225 Difference]: With dead ends: 97 [2022-07-12 18:39:42,582 INFO L226 Difference]: Without dead ends: 97 [2022-07-12 18:39:42,582 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2022-07-12 18:39:42,583 INFO L413 NwaCegarLoop]: 50 mSDtfsCounter, 372 mSDsluCounter, 40 mSDsCounter, 0 mSdLazyCounter, 123 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 372 SdHoareTripleChecker+Valid, 90 SdHoareTripleChecker+Invalid, 133 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 123 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:42,583 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [372 Valid, 90 Invalid, 133 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 123 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-07-12 18:39:42,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2022-07-12 18:39:42,585 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 97. [2022-07-12 18:39:42,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 97 states, 67 states have (on average 1.537313432835821) internal successors, (103), 96 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:42,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 103 transitions. [2022-07-12 18:39:42,586 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 103 transitions. Word has length 22 [2022-07-12 18:39:42,586 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:42,586 INFO L495 AbstractCegarLoop]: Abstraction has 97 states and 103 transitions. [2022-07-12 18:39:42,586 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 3.6666666666666665) internal successors, (22), 7 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:42,586 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 103 transitions. [2022-07-12 18:39:42,587 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-07-12 18:39:42,587 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:42,587 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:42,587 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2022-07-12 18:39:42,588 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr24REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:42,588 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:42,588 INFO L85 PathProgramCache]: Analyzing trace with hash -287576677, now seen corresponding path program 1 times [2022-07-12 18:39:42,588 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:42,588 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1507740929] [2022-07-12 18:39:42,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:42,589 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:42,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:42,826 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:42,826 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:42,826 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1507740929] [2022-07-12 18:39:42,826 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1507740929] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:42,826 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:42,826 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2022-07-12 18:39:42,826 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1555435020] [2022-07-12 18:39:42,826 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:42,827 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-07-12 18:39:42,827 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:42,827 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-07-12 18:39:42,827 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=263, Unknown=0, NotChecked=0, Total=306 [2022-07-12 18:39:42,828 INFO L87 Difference]: Start difference. First operand 97 states and 103 transitions. Second operand has 18 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 18 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:43,502 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:43,502 INFO L93 Difference]: Finished difference Result 165 states and 177 transitions. [2022-07-12 18:39:43,503 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-07-12 18:39:43,503 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 18 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 23 [2022-07-12 18:39:43,503 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:43,504 INFO L225 Difference]: With dead ends: 165 [2022-07-12 18:39:43,504 INFO L226 Difference]: Without dead ends: 165 [2022-07-12 18:39:43,504 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 132 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=180, Invalid=876, Unknown=0, NotChecked=0, Total=1056 [2022-07-12 18:39:43,505 INFO L413 NwaCegarLoop]: 63 mSDtfsCounter, 413 mSDsluCounter, 711 mSDsCounter, 0 mSdLazyCounter, 793 mSolverCounterSat, 47 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 413 SdHoareTripleChecker+Valid, 774 SdHoareTripleChecker+Invalid, 840 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 47 IncrementalHoareTripleChecker+Valid, 793 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:43,505 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [413 Valid, 774 Invalid, 840 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [47 Valid, 793 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-07-12 18:39:43,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2022-07-12 18:39:43,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 98. [2022-07-12 18:39:43,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 72 states have (on average 1.4722222222222223) internal successors, (106), 97 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:43,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 106 transitions. [2022-07-12 18:39:43,508 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 106 transitions. Word has length 23 [2022-07-12 18:39:43,508 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:43,508 INFO L495 AbstractCegarLoop]: Abstraction has 98 states and 106 transitions. [2022-07-12 18:39:43,508 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 18 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:43,508 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 106 transitions. [2022-07-12 18:39:43,509 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-07-12 18:39:43,509 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:43,509 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:43,509 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2022-07-12 18:39:43,509 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr25REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:43,510 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:43,510 INFO L85 PathProgramCache]: Analyzing trace with hash -287576676, now seen corresponding path program 1 times [2022-07-12 18:39:43,510 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:43,510 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1804604320] [2022-07-12 18:39:43,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:43,511 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:43,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:43,872 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:43,872 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:43,872 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1804604320] [2022-07-12 18:39:43,872 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1804604320] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:43,872 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:43,872 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2022-07-12 18:39:43,873 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1377085619] [2022-07-12 18:39:43,873 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:43,873 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-07-12 18:39:43,873 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:43,873 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-07-12 18:39:43,873 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=296, Unknown=0, NotChecked=0, Total=342 [2022-07-12 18:39:43,874 INFO L87 Difference]: Start difference. First operand 98 states and 106 transitions. Second operand has 19 states, 18 states have (on average 1.2777777777777777) internal successors, (23), 19 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:44,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:44,709 INFO L93 Difference]: Finished difference Result 211 states and 228 transitions. [2022-07-12 18:39:44,709 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-07-12 18:39:44,709 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 18 states have (on average 1.2777777777777777) internal successors, (23), 19 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 23 [2022-07-12 18:39:44,709 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:44,712 INFO L225 Difference]: With dead ends: 211 [2022-07-12 18:39:44,712 INFO L226 Difference]: Without dead ends: 211 [2022-07-12 18:39:44,712 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 152 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=197, Invalid=993, Unknown=0, NotChecked=0, Total=1190 [2022-07-12 18:39:44,713 INFO L413 NwaCegarLoop]: 66 mSDtfsCounter, 628 mSDsluCounter, 745 mSDsCounter, 0 mSdLazyCounter, 721 mSolverCounterSat, 60 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 628 SdHoareTripleChecker+Valid, 811 SdHoareTripleChecker+Invalid, 781 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 60 IncrementalHoareTripleChecker+Valid, 721 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:44,713 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [628 Valid, 811 Invalid, 781 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [60 Valid, 721 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-07-12 18:39:44,714 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 211 states. [2022-07-12 18:39:44,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 211 to 122. [2022-07-12 18:39:44,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 122 states, 96 states have (on average 1.5208333333333333) internal successors, (146), 121 states have internal predecessors, (146), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:44,716 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 146 transitions. [2022-07-12 18:39:44,717 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 146 transitions. Word has length 23 [2022-07-12 18:39:44,717 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:44,717 INFO L495 AbstractCegarLoop]: Abstraction has 122 states and 146 transitions. [2022-07-12 18:39:44,717 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 18 states have (on average 1.2777777777777777) internal successors, (23), 19 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:44,717 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 146 transitions. [2022-07-12 18:39:44,718 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-07-12 18:39:44,718 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:44,718 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:44,718 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2022-07-12 18:39:44,718 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:44,719 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:44,719 INFO L85 PathProgramCache]: Analyzing trace with hash -1449815588, now seen corresponding path program 1 times [2022-07-12 18:39:44,719 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:44,719 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1327196070] [2022-07-12 18:39:44,719 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:44,719 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:44,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:44,768 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:44,769 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:44,769 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1327196070] [2022-07-12 18:39:44,769 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1327196070] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:44,769 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:44,769 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-07-12 18:39:44,769 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1133438574] [2022-07-12 18:39:44,770 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:44,770 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-07-12 18:39:44,770 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:44,770 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-07-12 18:39:44,771 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-07-12 18:39:44,771 INFO L87 Difference]: Start difference. First operand 122 states and 146 transitions. Second operand has 6 states, 5 states have (on average 5.0) internal successors, (25), 6 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:44,831 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:44,831 INFO L93 Difference]: Finished difference Result 121 states and 145 transitions. [2022-07-12 18:39:44,832 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-07-12 18:39:44,832 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 5.0) internal successors, (25), 6 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 25 [2022-07-12 18:39:44,832 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:44,834 INFO L225 Difference]: With dead ends: 121 [2022-07-12 18:39:44,834 INFO L226 Difference]: Without dead ends: 121 [2022-07-12 18:39:44,834 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2022-07-12 18:39:44,835 INFO L413 NwaCegarLoop]: 75 mSDtfsCounter, 258 mSDsluCounter, 71 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 258 SdHoareTripleChecker+Valid, 146 SdHoareTripleChecker+Invalid, 58 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:44,835 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [258 Valid, 146 Invalid, 58 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-07-12 18:39:44,836 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2022-07-12 18:39:44,838 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 121. [2022-07-12 18:39:44,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 121 states, 96 states have (on average 1.5104166666666667) internal successors, (145), 120 states have internal predecessors, (145), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:44,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 145 transitions. [2022-07-12 18:39:44,839 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 145 transitions. Word has length 25 [2022-07-12 18:39:44,839 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:44,839 INFO L495 AbstractCegarLoop]: Abstraction has 121 states and 145 transitions. [2022-07-12 18:39:44,839 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 5.0) internal successors, (25), 6 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:44,839 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 145 transitions. [2022-07-12 18:39:44,840 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-07-12 18:39:44,840 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:44,840 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:44,840 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2022-07-12 18:39:44,841 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr54REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:44,841 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:44,841 INFO L85 PathProgramCache]: Analyzing trace with hash -1702259996, now seen corresponding path program 1 times [2022-07-12 18:39:44,841 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:44,841 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1107945878] [2022-07-12 18:39:44,841 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:44,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:44,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:45,050 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:45,050 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:45,050 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1107945878] [2022-07-12 18:39:45,050 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1107945878] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:45,050 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:45,050 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2022-07-12 18:39:45,050 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [698122487] [2022-07-12 18:39:45,050 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:45,051 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-07-12 18:39:45,051 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:45,051 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-07-12 18:39:45,051 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=231, Unknown=0, NotChecked=0, Total=272 [2022-07-12 18:39:45,051 INFO L87 Difference]: Start difference. First operand 121 states and 145 transitions. Second operand has 17 states, 16 states have (on average 1.6875) internal successors, (27), 17 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:45,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:45,589 INFO L93 Difference]: Finished difference Result 166 states and 194 transitions. [2022-07-12 18:39:45,590 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-07-12 18:39:45,590 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 16 states have (on average 1.6875) internal successors, (27), 17 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 27 [2022-07-12 18:39:45,590 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:45,591 INFO L225 Difference]: With dead ends: 166 [2022-07-12 18:39:45,591 INFO L226 Difference]: Without dead ends: 166 [2022-07-12 18:39:45,591 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 117 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=163, Invalid=767, Unknown=0, NotChecked=0, Total=930 [2022-07-12 18:39:45,592 INFO L413 NwaCegarLoop]: 57 mSDtfsCounter, 320 mSDsluCounter, 648 mSDsCounter, 0 mSdLazyCounter, 603 mSolverCounterSat, 30 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 320 SdHoareTripleChecker+Valid, 705 SdHoareTripleChecker+Invalid, 633 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 30 IncrementalHoareTripleChecker+Valid, 603 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:45,592 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [320 Valid, 705 Invalid, 633 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [30 Valid, 603 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-07-12 18:39:45,592 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states. [2022-07-12 18:39:45,594 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 128. [2022-07-12 18:39:45,594 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 128 states, 103 states have (on average 1.4951456310679612) internal successors, (154), 127 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:45,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 154 transitions. [2022-07-12 18:39:45,595 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 154 transitions. Word has length 27 [2022-07-12 18:39:45,595 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:45,595 INFO L495 AbstractCegarLoop]: Abstraction has 128 states and 154 transitions. [2022-07-12 18:39:45,595 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 16 states have (on average 1.6875) internal successors, (27), 17 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:45,596 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 154 transitions. [2022-07-12 18:39:45,596 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-07-12 18:39:45,596 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:45,596 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:45,596 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2022-07-12 18:39:45,596 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr55REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:45,597 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:45,597 INFO L85 PathProgramCache]: Analyzing trace with hash -1702259995, now seen corresponding path program 1 times [2022-07-12 18:39:45,597 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:45,597 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [306036049] [2022-07-12 18:39:45,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:45,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:45,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:45,965 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:45,965 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:45,965 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [306036049] [2022-07-12 18:39:45,965 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [306036049] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:45,965 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:45,966 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2022-07-12 18:39:45,966 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1342428781] [2022-07-12 18:39:45,966 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:45,966 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-07-12 18:39:45,966 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:45,967 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-07-12 18:39:45,967 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=262, Unknown=0, NotChecked=0, Total=306 [2022-07-12 18:39:45,967 INFO L87 Difference]: Start difference. First operand 128 states and 154 transitions. Second operand has 18 states, 17 states have (on average 1.588235294117647) internal successors, (27), 18 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:46,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:46,614 INFO L93 Difference]: Finished difference Result 166 states and 194 transitions. [2022-07-12 18:39:46,615 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-07-12 18:39:46,615 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 17 states have (on average 1.588235294117647) internal successors, (27), 18 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 27 [2022-07-12 18:39:46,615 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:46,615 INFO L225 Difference]: With dead ends: 166 [2022-07-12 18:39:46,615 INFO L226 Difference]: Without dead ends: 166 [2022-07-12 18:39:46,616 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 133 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=179, Invalid=877, Unknown=0, NotChecked=0, Total=1056 [2022-07-12 18:39:46,616 INFO L413 NwaCegarLoop]: 51 mSDtfsCounter, 272 mSDsluCounter, 578 mSDsCounter, 0 mSdLazyCounter, 627 mSolverCounterSat, 35 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 272 SdHoareTripleChecker+Valid, 629 SdHoareTripleChecker+Invalid, 662 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 35 IncrementalHoareTripleChecker+Valid, 627 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:46,617 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [272 Valid, 629 Invalid, 662 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [35 Valid, 627 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-07-12 18:39:46,617 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states. [2022-07-12 18:39:46,619 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 128. [2022-07-12 18:39:46,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 128 states, 103 states have (on average 1.4854368932038835) internal successors, (153), 127 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:46,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 153 transitions. [2022-07-12 18:39:46,620 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 153 transitions. Word has length 27 [2022-07-12 18:39:46,620 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:46,620 INFO L495 AbstractCegarLoop]: Abstraction has 128 states and 153 transitions. [2022-07-12 18:39:46,621 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 17 states have (on average 1.588235294117647) internal successors, (27), 18 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:46,621 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 153 transitions. [2022-07-12 18:39:46,621 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-07-12 18:39:46,621 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:46,621 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:46,622 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2022-07-12 18:39:46,622 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:46,622 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:46,622 INFO L85 PathProgramCache]: Analyzing trace with hash -1264836991, now seen corresponding path program 1 times [2022-07-12 18:39:46,622 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:46,623 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [242254171] [2022-07-12 18:39:46,623 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:46,623 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:46,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:46,828 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:46,828 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:46,828 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [242254171] [2022-07-12 18:39:46,828 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [242254171] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:46,828 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:46,828 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2022-07-12 18:39:46,828 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1341056858] [2022-07-12 18:39:46,828 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:46,828 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-07-12 18:39:46,829 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:46,829 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-07-12 18:39:46,831 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=253, Unknown=0, NotChecked=0, Total=306 [2022-07-12 18:39:46,831 INFO L87 Difference]: Start difference. First operand 128 states and 153 transitions. Second operand has 18 states, 18 states have (on average 1.5555555555555556) internal successors, (28), 18 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:47,233 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:47,233 INFO L93 Difference]: Finished difference Result 159 states and 187 transitions. [2022-07-12 18:39:47,234 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-07-12 18:39:47,234 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.5555555555555556) internal successors, (28), 18 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 28 [2022-07-12 18:39:47,234 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:47,235 INFO L225 Difference]: With dead ends: 159 [2022-07-12 18:39:47,235 INFO L226 Difference]: Without dead ends: 159 [2022-07-12 18:39:47,235 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=162, Invalid=708, Unknown=0, NotChecked=0, Total=870 [2022-07-12 18:39:47,236 INFO L413 NwaCegarLoop]: 60 mSDtfsCounter, 195 mSDsluCounter, 714 mSDsCounter, 0 mSdLazyCounter, 485 mSolverCounterSat, 33 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 195 SdHoareTripleChecker+Valid, 774 SdHoareTripleChecker+Invalid, 518 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 33 IncrementalHoareTripleChecker+Valid, 485 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:47,236 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [195 Valid, 774 Invalid, 518 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [33 Valid, 485 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-07-12 18:39:47,237 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2022-07-12 18:39:47,238 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 128. [2022-07-12 18:39:47,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 128 states, 103 states have (on average 1.4757281553398058) internal successors, (152), 127 states have internal predecessors, (152), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:47,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 152 transitions. [2022-07-12 18:39:47,239 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 152 transitions. Word has length 28 [2022-07-12 18:39:47,240 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:47,240 INFO L495 AbstractCegarLoop]: Abstraction has 128 states and 152 transitions. [2022-07-12 18:39:47,240 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 1.5555555555555556) internal successors, (28), 18 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:47,240 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 152 transitions. [2022-07-12 18:39:47,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-07-12 18:39:47,241 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:47,241 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:47,241 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2022-07-12 18:39:47,241 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr30REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:47,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:47,241 INFO L85 PathProgramCache]: Analyzing trace with hash -2059816375, now seen corresponding path program 1 times [2022-07-12 18:39:47,242 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:47,242 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1293108865] [2022-07-12 18:39:47,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:47,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:47,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:47,279 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:47,280 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:47,280 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1293108865] [2022-07-12 18:39:47,280 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1293108865] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:47,280 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:47,280 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-07-12 18:39:47,280 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [856491856] [2022-07-12 18:39:47,280 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:47,281 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-07-12 18:39:47,281 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:47,281 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-07-12 18:39:47,281 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-07-12 18:39:47,282 INFO L87 Difference]: Start difference. First operand 128 states and 152 transitions. Second operand has 4 states, 3 states have (on average 9.666666666666666) internal successors, (29), 4 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:47,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:47,350 INFO L93 Difference]: Finished difference Result 146 states and 169 transitions. [2022-07-12 18:39:47,350 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-07-12 18:39:47,351 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 9.666666666666666) internal successors, (29), 4 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 29 [2022-07-12 18:39:47,351 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:47,351 INFO L225 Difference]: With dead ends: 146 [2022-07-12 18:39:47,351 INFO L226 Difference]: Without dead ends: 146 [2022-07-12 18:39:47,352 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-07-12 18:39:47,359 INFO L413 NwaCegarLoop]: 85 mSDtfsCounter, 113 mSDsluCounter, 46 mSDsCounter, 0 mSdLazyCounter, 105 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 113 SdHoareTripleChecker+Valid, 131 SdHoareTripleChecker+Invalid, 111 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 105 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:47,359 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [113 Valid, 131 Invalid, 111 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 105 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-07-12 18:39:47,360 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2022-07-12 18:39:47,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 127. [2022-07-12 18:39:47,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 127 states, 105 states have (on average 1.4285714285714286) internal successors, (150), 126 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:47,363 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 150 transitions. [2022-07-12 18:39:47,363 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 150 transitions. Word has length 29 [2022-07-12 18:39:47,363 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:47,363 INFO L495 AbstractCegarLoop]: Abstraction has 127 states and 150 transitions. [2022-07-12 18:39:47,363 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 9.666666666666666) internal successors, (29), 4 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:47,363 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 150 transitions. [2022-07-12 18:39:47,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-07-12 18:39:47,364 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:47,364 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:47,364 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2022-07-12 18:39:47,365 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr31REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:47,365 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:47,365 INFO L85 PathProgramCache]: Analyzing trace with hash -2059816374, now seen corresponding path program 1 times [2022-07-12 18:39:47,365 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:47,365 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [129851502] [2022-07-12 18:39:47,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:47,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:47,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:47,662 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:47,662 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:47,662 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [129851502] [2022-07-12 18:39:47,663 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [129851502] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:47,663 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:47,663 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2022-07-12 18:39:47,663 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [410309501] [2022-07-12 18:39:47,663 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:47,663 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-07-12 18:39:47,664 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:47,664 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-07-12 18:39:47,664 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=360, Unknown=0, NotChecked=0, Total=420 [2022-07-12 18:39:47,664 INFO L87 Difference]: Start difference. First operand 127 states and 150 transitions. Second operand has 21 states, 20 states have (on average 1.45) internal successors, (29), 21 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:48,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:48,311 INFO L93 Difference]: Finished difference Result 202 states and 223 transitions. [2022-07-12 18:39:48,311 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-07-12 18:39:48,312 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 20 states have (on average 1.45) internal successors, (29), 21 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 29 [2022-07-12 18:39:48,312 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:48,312 INFO L225 Difference]: With dead ends: 202 [2022-07-12 18:39:48,313 INFO L226 Difference]: Without dead ends: 202 [2022-07-12 18:39:48,313 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 151 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=217, Invalid=1043, Unknown=0, NotChecked=0, Total=1260 [2022-07-12 18:39:48,314 INFO L413 NwaCegarLoop]: 69 mSDtfsCounter, 473 mSDsluCounter, 1127 mSDsCounter, 0 mSdLazyCounter, 822 mSolverCounterSat, 49 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 473 SdHoareTripleChecker+Valid, 1196 SdHoareTripleChecker+Invalid, 871 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 49 IncrementalHoareTripleChecker+Valid, 822 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:48,314 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [473 Valid, 1196 Invalid, 871 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [49 Valid, 822 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-07-12 18:39:48,314 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202 states. [2022-07-12 18:39:48,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202 to 132. [2022-07-12 18:39:48,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 132 states, 110 states have (on average 1.4181818181818182) internal successors, (156), 131 states have internal predecessors, (156), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:48,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 156 transitions. [2022-07-12 18:39:48,317 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 156 transitions. Word has length 29 [2022-07-12 18:39:48,317 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:48,317 INFO L495 AbstractCegarLoop]: Abstraction has 132 states and 156 transitions. [2022-07-12 18:39:48,317 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 20 states have (on average 1.45) internal successors, (29), 21 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:48,317 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 156 transitions. [2022-07-12 18:39:48,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-07-12 18:39:48,318 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:48,318 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:48,318 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2022-07-12 18:39:48,318 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:48,318 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:48,319 INFO L85 PathProgramCache]: Analyzing trace with hash -1348537848, now seen corresponding path program 1 times [2022-07-12 18:39:48,319 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:48,319 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1047214030] [2022-07-12 18:39:48,319 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:48,319 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:48,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:48,597 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:48,597 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:48,597 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1047214030] [2022-07-12 18:39:48,597 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1047214030] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:48,597 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:48,597 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2022-07-12 18:39:48,597 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [600340111] [2022-07-12 18:39:48,597 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:48,598 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-07-12 18:39:48,598 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:48,598 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-07-12 18:39:48,598 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=287, Unknown=0, NotChecked=0, Total=342 [2022-07-12 18:39:48,598 INFO L87 Difference]: Start difference. First operand 132 states and 156 transitions. Second operand has 19 states, 18 states have (on average 1.6666666666666667) internal successors, (30), 19 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:49,074 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:49,074 INFO L93 Difference]: Finished difference Result 173 states and 202 transitions. [2022-07-12 18:39:49,075 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-07-12 18:39:49,075 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 18 states have (on average 1.6666666666666667) internal successors, (30), 19 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 30 [2022-07-12 18:39:49,075 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:49,076 INFO L225 Difference]: With dead ends: 173 [2022-07-12 18:39:49,076 INFO L226 Difference]: Without dead ends: 173 [2022-07-12 18:39:49,077 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 110 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=178, Invalid=814, Unknown=0, NotChecked=0, Total=992 [2022-07-12 18:39:49,077 INFO L413 NwaCegarLoop]: 62 mSDtfsCounter, 246 mSDsluCounter, 685 mSDsCounter, 0 mSdLazyCounter, 525 mSolverCounterSat, 39 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 246 SdHoareTripleChecker+Valid, 747 SdHoareTripleChecker+Invalid, 564 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 39 IncrementalHoareTripleChecker+Valid, 525 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:49,078 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [246 Valid, 747 Invalid, 564 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [39 Valid, 525 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-07-12 18:39:49,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2022-07-12 18:39:49,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 135. [2022-07-12 18:39:49,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 135 states, 113 states have (on average 1.407079646017699) internal successors, (159), 134 states have internal predecessors, (159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:49,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 159 transitions. [2022-07-12 18:39:49,081 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 159 transitions. Word has length 30 [2022-07-12 18:39:49,081 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:49,081 INFO L495 AbstractCegarLoop]: Abstraction has 135 states and 159 transitions. [2022-07-12 18:39:49,081 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 18 states have (on average 1.6666666666666667) internal successors, (30), 19 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:49,082 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 159 transitions. [2022-07-12 18:39:49,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-07-12 18:39:49,082 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:49,082 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:49,082 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2022-07-12 18:39:49,082 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr24REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:49,083 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:49,083 INFO L85 PathProgramCache]: Analyzing trace with hash 570254421, now seen corresponding path program 1 times [2022-07-12 18:39:49,083 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:49,083 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [854325229] [2022-07-12 18:39:49,083 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:49,084 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:49,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:49,722 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:49,722 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:49,722 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [854325229] [2022-07-12 18:39:49,723 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [854325229] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:49,723 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:49,723 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2022-07-12 18:39:49,723 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1777043827] [2022-07-12 18:39:49,723 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:49,724 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-07-12 18:39:49,724 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:49,724 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-07-12 18:39:49,724 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=447, Unknown=0, NotChecked=0, Total=506 [2022-07-12 18:39:49,725 INFO L87 Difference]: Start difference. First operand 135 states and 159 transitions. Second operand has 23 states, 23 states have (on average 1.3043478260869565) internal successors, (30), 23 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:50,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:50,912 INFO L93 Difference]: Finished difference Result 140 states and 156 transitions. [2022-07-12 18:39:50,914 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-07-12 18:39:50,914 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 1.3043478260869565) internal successors, (30), 23 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 30 [2022-07-12 18:39:50,914 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:50,914 INFO L225 Difference]: With dead ends: 140 [2022-07-12 18:39:50,914 INFO L226 Difference]: Without dead ends: 140 [2022-07-12 18:39:50,915 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 263 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=267, Invalid=1455, Unknown=0, NotChecked=0, Total=1722 [2022-07-12 18:39:50,916 INFO L413 NwaCegarLoop]: 57 mSDtfsCounter, 232 mSDsluCounter, 857 mSDsCounter, 0 mSdLazyCounter, 670 mSolverCounterSat, 50 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 232 SdHoareTripleChecker+Valid, 914 SdHoareTripleChecker+Invalid, 720 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 50 IncrementalHoareTripleChecker+Valid, 670 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:50,916 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [232 Valid, 914 Invalid, 720 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [50 Valid, 670 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-07-12 18:39:50,916 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2022-07-12 18:39:50,918 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 134. [2022-07-12 18:39:50,918 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 134 states, 112 states have (on average 1.3928571428571428) internal successors, (156), 133 states have internal predecessors, (156), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:50,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 156 transitions. [2022-07-12 18:39:50,919 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 156 transitions. Word has length 30 [2022-07-12 18:39:50,919 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:50,919 INFO L495 AbstractCegarLoop]: Abstraction has 134 states and 156 transitions. [2022-07-12 18:39:50,919 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 1.3043478260869565) internal successors, (30), 23 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:50,920 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 156 transitions. [2022-07-12 18:39:50,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-07-12 18:39:50,920 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:50,920 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:50,920 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2022-07-12 18:39:50,921 INFO L420 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:50,921 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:50,921 INFO L85 PathProgramCache]: Analyzing trace with hash 1144999879, now seen corresponding path program 1 times [2022-07-12 18:39:50,921 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:50,921 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1133279126] [2022-07-12 18:39:50,921 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:50,922 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:50,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:51,184 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:51,184 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:51,185 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1133279126] [2022-07-12 18:39:51,185 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1133279126] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:51,185 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:51,185 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2022-07-12 18:39:51,185 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [746076100] [2022-07-12 18:39:51,185 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:51,186 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-07-12 18:39:51,186 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:51,186 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-07-12 18:39:51,186 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=287, Unknown=0, NotChecked=0, Total=342 [2022-07-12 18:39:51,186 INFO L87 Difference]: Start difference. First operand 134 states and 156 transitions. Second operand has 19 states, 18 states have (on average 1.7222222222222223) internal successors, (31), 19 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:51,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:51,680 INFO L93 Difference]: Finished difference Result 150 states and 166 transitions. [2022-07-12 18:39:51,680 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-07-12 18:39:51,680 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 18 states have (on average 1.7222222222222223) internal successors, (31), 19 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 31 [2022-07-12 18:39:51,680 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:51,681 INFO L225 Difference]: With dead ends: 150 [2022-07-12 18:39:51,681 INFO L226 Difference]: Without dead ends: 150 [2022-07-12 18:39:51,681 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 110 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=178, Invalid=814, Unknown=0, NotChecked=0, Total=992 [2022-07-12 18:39:51,682 INFO L413 NwaCegarLoop]: 61 mSDtfsCounter, 206 mSDsluCounter, 526 mSDsCounter, 0 mSdLazyCounter, 440 mSolverCounterSat, 42 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 206 SdHoareTripleChecker+Valid, 587 SdHoareTripleChecker+Invalid, 482 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 42 IncrementalHoareTripleChecker+Valid, 440 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:51,682 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [206 Valid, 587 Invalid, 482 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [42 Valid, 440 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-07-12 18:39:51,683 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2022-07-12 18:39:51,684 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 135. [2022-07-12 18:39:51,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 135 states, 113 states have (on average 1.3893805309734513) internal successors, (157), 134 states have internal predecessors, (157), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:51,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 157 transitions. [2022-07-12 18:39:51,685 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 157 transitions. Word has length 31 [2022-07-12 18:39:51,686 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:51,686 INFO L495 AbstractCegarLoop]: Abstraction has 135 states and 157 transitions. [2022-07-12 18:39:51,686 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 18 states have (on average 1.7222222222222223) internal successors, (31), 19 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:51,686 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 157 transitions. [2022-07-12 18:39:51,686 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-07-12 18:39:51,686 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:51,687 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:51,687 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2022-07-12 18:39:51,687 INFO L420 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr60ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:51,687 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:51,687 INFO L85 PathProgramCache]: Analyzing trace with hash 1135258090, now seen corresponding path program 1 times [2022-07-12 18:39:51,688 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:51,688 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [612658641] [2022-07-12 18:39:51,688 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:51,688 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:51,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:51,728 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:51,728 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:51,728 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [612658641] [2022-07-12 18:39:51,728 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [612658641] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:51,728 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:51,729 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-07-12 18:39:51,729 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [395611499] [2022-07-12 18:39:51,729 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:51,729 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-07-12 18:39:51,729 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:51,730 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-07-12 18:39:51,730 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-07-12 18:39:51,730 INFO L87 Difference]: Start difference. First operand 135 states and 157 transitions. Second operand has 6 states, 5 states have (on average 6.4) internal successors, (32), 6 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:51,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:51,825 INFO L93 Difference]: Finished difference Result 134 states and 156 transitions. [2022-07-12 18:39:51,825 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-07-12 18:39:51,825 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 6.4) internal successors, (32), 6 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 32 [2022-07-12 18:39:51,825 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:51,826 INFO L225 Difference]: With dead ends: 134 [2022-07-12 18:39:51,826 INFO L226 Difference]: Without dead ends: 134 [2022-07-12 18:39:51,826 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2022-07-12 18:39:51,827 INFO L413 NwaCegarLoop]: 84 mSDtfsCounter, 9 mSDsluCounter, 231 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 9 SdHoareTripleChecker+Valid, 315 SdHoareTripleChecker+Invalid, 133 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:51,828 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [9 Valid, 315 Invalid, 133 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-07-12 18:39:51,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2022-07-12 18:39:51,830 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2022-07-12 18:39:51,834 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 134 states, 113 states have (on average 1.3805309734513274) internal successors, (156), 133 states have internal predecessors, (156), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:51,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 156 transitions. [2022-07-12 18:39:51,835 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 156 transitions. Word has length 32 [2022-07-12 18:39:51,835 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:51,835 INFO L495 AbstractCegarLoop]: Abstraction has 134 states and 156 transitions. [2022-07-12 18:39:51,836 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 6.4) internal successors, (32), 6 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:51,836 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 156 transitions. [2022-07-12 18:39:51,837 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-07-12 18:39:51,837 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:51,837 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:51,837 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2022-07-12 18:39:51,837 INFO L420 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr48REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:51,837 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:51,838 INFO L85 PathProgramCache]: Analyzing trace with hash 833262606, now seen corresponding path program 1 times [2022-07-12 18:39:51,838 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:51,838 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [822650815] [2022-07-12 18:39:51,838 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:51,838 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:51,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:52,106 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:52,107 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:52,107 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [822650815] [2022-07-12 18:39:52,107 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [822650815] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 18:39:52,107 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [50588963] [2022-07-12 18:39:52,107 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:52,107 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 18:39:52,107 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-12 18:39:52,115 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-12 18:39:52,120 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-07-12 18:39:52,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:52,269 INFO L263 TraceCheckSpWp]: Trace formula consists of 278 conjuncts, 58 conjunts are in the unsatisfiable core [2022-07-12 18:39:52,275 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 18:39:52,336 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-07-12 18:39:52,392 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 18:39:52,424 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-07-12 18:39:52,425 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-07-12 18:39:52,460 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:39:52,461 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2022-07-12 18:39:52,579 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 18:39:52,579 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 35 [2022-07-12 18:39:52,598 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 18:39:52,599 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 29 treesize of output 30 [2022-07-12 18:39:52,676 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 18:39:52,676 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 39 [2022-07-12 18:39:52,694 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 18:39:52,694 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 32 [2022-07-12 18:39:52,908 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 12 [2022-07-12 18:39:52,932 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2022-07-12 18:39:52,935 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:52,935 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-12 18:39:53,005 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2022-07-12 18:39:53,093 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1051 (Array Int Int))) (not (= (select (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem10#1.base| v_ArrVal_1051) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) is different from false [2022-07-12 18:39:53,102 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1051 (Array Int Int)) (v_ArrVal_1050 (Array Int Int))) (not (= (select (select (store (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem11#1.base| v_ArrVal_1050) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem10#1.base| v_ArrVal_1051) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) is different from false [2022-07-12 18:39:53,109 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1051 (Array Int Int)) (v_ArrVal_1050 (Array Int Int))) (not (= (select (select (store (store |c_#memory_$Pointer$.base| (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) v_ArrVal_1050) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem10#1.base| v_ArrVal_1051) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) is different from false [2022-07-12 18:39:53,114 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1051 (Array Int Int))) (not (= (select (select (store |c_#memory_$Pointer$.base| (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) v_ArrVal_1051) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) is different from false [2022-07-12 18:39:53,121 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1049 (Array Int Int)) (v_ArrVal_1051 (Array Int Int))) (not (= (select (select (let ((.cse0 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| v_ArrVal_1049))) (store .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) v_ArrVal_1051)) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) is different from false [2022-07-12 18:39:53,129 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1049 (Array Int Int)) (v_ArrVal_1048 (Array Int Int)) (v_ArrVal_1051 (Array Int Int))) (not (= (select (select (let ((.cse0 (store (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.base| v_ArrVal_1048) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| v_ArrVal_1049))) (store .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) v_ArrVal_1051)) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) is different from false [2022-07-12 18:39:53,150 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1049 (Array Int Int)) (v_ArrVal_1048 (Array Int Int)) (v_ArrVal_1051 (Array Int Int))) (not (= (select (select (let ((.cse0 (store (store |c_#memory_$Pointer$.base| (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|) v_ArrVal_1048) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| v_ArrVal_1049))) (store .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) v_ArrVal_1051)) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) is different from false [2022-07-12 18:39:53,157 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1049 (Array Int Int)) (v_ArrVal_1051 (Array Int Int))) (not (= (select (select (let ((.cse0 (store |c_#memory_$Pointer$.base| (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|) v_ArrVal_1049))) (store .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) v_ArrVal_1051)) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) is different from false [2022-07-12 18:39:53,172 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1049 (Array Int Int)) (v_ArrVal_1051 (Array Int Int))) (not (= (select (select (let ((.cse1 (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4))) (let ((.cse0 (let ((.cse2 (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) (store (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base| (store .cse2 .cse1 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~malloc6#1.base|)) (select .cse2 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|) v_ArrVal_1049)))) (store .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse1) v_ArrVal_1051))) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) is different from false [2022-07-12 18:39:53,241 INFO L356 Elim1Store]: treesize reduction 21, result has 47.5 percent of original size [2022-07-12 18:39:53,242 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 49 treesize of output 42 [2022-07-12 18:39:53,249 INFO L356 Elim1Store]: treesize reduction 9, result has 10.0 percent of original size [2022-07-12 18:39:53,250 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 281 treesize of output 227 [2022-07-12 18:39:53,262 INFO L356 Elim1Store]: treesize reduction 9, result has 10.0 percent of original size [2022-07-12 18:39:53,262 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 184 treesize of output 156 [2022-07-12 18:39:53,266 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 156 treesize of output 148 [2022-07-12 18:39:53,276 INFO L356 Elim1Store]: treesize reduction 5, result has 37.5 percent of original size [2022-07-12 18:39:53,276 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 12 [2022-07-12 18:39:53,292 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:53,293 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [50588963] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-12 18:39:53,293 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-12 18:39:53,293 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 17, 20] total 44 [2022-07-12 18:39:53,293 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [211670451] [2022-07-12 18:39:53,293 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-12 18:39:53,294 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 45 states [2022-07-12 18:39:53,294 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:53,294 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2022-07-12 18:39:53,295 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=156, Invalid=1131, Unknown=9, NotChecked=684, Total=1980 [2022-07-12 18:39:53,295 INFO L87 Difference]: Start difference. First operand 134 states and 156 transitions. Second operand has 45 states, 44 states have (on average 1.7727272727272727) internal successors, (78), 45 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:54,343 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:54,343 INFO L93 Difference]: Finished difference Result 148 states and 165 transitions. [2022-07-12 18:39:54,344 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-07-12 18:39:54,344 INFO L78 Accepts]: Start accepts. Automaton has has 45 states, 44 states have (on average 1.7727272727272727) internal successors, (78), 45 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2022-07-12 18:39:54,344 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:54,345 INFO L225 Difference]: With dead ends: 148 [2022-07-12 18:39:54,345 INFO L226 Difference]: Without dead ends: 148 [2022-07-12 18:39:54,346 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 39 SyntacticMatches, 7 SemanticMatches, 55 ConstructedPredicates, 9 IntricatePredicates, 0 DeprecatedPredicates, 593 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=310, Invalid=1973, Unknown=9, NotChecked=900, Total=3192 [2022-07-12 18:39:54,346 INFO L413 NwaCegarLoop]: 57 mSDtfsCounter, 233 mSDsluCounter, 1154 mSDsCounter, 0 mSdLazyCounter, 821 mSolverCounterSat, 27 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 233 SdHoareTripleChecker+Valid, 1211 SdHoareTripleChecker+Invalid, 1689 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 27 IncrementalHoareTripleChecker+Valid, 821 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 841 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:54,346 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [233 Valid, 1211 Invalid, 1689 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [27 Valid, 821 Invalid, 0 Unknown, 841 Unchecked, 0.4s Time] [2022-07-12 18:39:54,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2022-07-12 18:39:54,348 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 135. [2022-07-12 18:39:54,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 135 states, 114 states have (on average 1.3771929824561404) internal successors, (157), 134 states have internal predecessors, (157), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:54,349 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 157 transitions. [2022-07-12 18:39:54,349 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 157 transitions. Word has length 33 [2022-07-12 18:39:54,349 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:54,349 INFO L495 AbstractCegarLoop]: Abstraction has 135 states and 157 transitions. [2022-07-12 18:39:54,349 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 45 states, 44 states have (on average 1.7727272727272727) internal successors, (78), 45 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:54,349 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 157 transitions. [2022-07-12 18:39:54,350 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-07-12 18:39:54,350 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:54,350 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:54,369 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2022-07-12 18:39:54,550 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26 [2022-07-12 18:39:54,551 INFO L420 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr37REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:54,551 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:54,551 INFO L85 PathProgramCache]: Analyzing trace with hash 2032785906, now seen corresponding path program 1 times [2022-07-12 18:39:54,551 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:54,551 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [939928416] [2022-07-12 18:39:54,551 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:54,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:54,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:54,651 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:54,652 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:54,652 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [939928416] [2022-07-12 18:39:54,652 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [939928416] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:54,652 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:54,652 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-07-12 18:39:54,652 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [703337970] [2022-07-12 18:39:54,652 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:54,653 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-07-12 18:39:54,653 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:54,654 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-07-12 18:39:54,654 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-07-12 18:39:54,654 INFO L87 Difference]: Start difference. First operand 135 states and 157 transitions. Second operand has 7 states, 6 states have (on average 5.833333333333333) internal successors, (35), 7 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:54,834 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:54,834 INFO L93 Difference]: Finished difference Result 231 states and 263 transitions. [2022-07-12 18:39:54,835 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-07-12 18:39:54,835 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 5.833333333333333) internal successors, (35), 7 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2022-07-12 18:39:54,835 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:54,836 INFO L225 Difference]: With dead ends: 231 [2022-07-12 18:39:54,836 INFO L226 Difference]: Without dead ends: 231 [2022-07-12 18:39:54,836 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-07-12 18:39:54,837 INFO L413 NwaCegarLoop]: 84 mSDtfsCounter, 212 mSDsluCounter, 153 mSDsCounter, 0 mSdLazyCounter, 229 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 212 SdHoareTripleChecker+Valid, 237 SdHoareTripleChecker+Invalid, 241 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 229 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:54,837 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [212 Valid, 237 Invalid, 241 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 229 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-07-12 18:39:54,837 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 231 states. [2022-07-12 18:39:54,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 231 to 145. [2022-07-12 18:39:54,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 145 states, 124 states have (on average 1.3790322580645162) internal successors, (171), 144 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:54,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 171 transitions. [2022-07-12 18:39:54,840 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 171 transitions. Word has length 35 [2022-07-12 18:39:54,840 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:54,840 INFO L495 AbstractCegarLoop]: Abstraction has 145 states and 171 transitions. [2022-07-12 18:39:54,840 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 5.833333333333333) internal successors, (35), 7 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:54,840 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 171 transitions. [2022-07-12 18:39:54,840 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-07-12 18:39:54,840 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:54,841 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:54,841 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2022-07-12 18:39:54,841 INFO L420 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr38REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:54,841 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:54,841 INFO L85 PathProgramCache]: Analyzing trace with hash -1408146296, now seen corresponding path program 1 times [2022-07-12 18:39:54,841 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:54,841 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1499302600] [2022-07-12 18:39:54,841 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:54,841 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:54,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:54,874 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:54,874 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:54,875 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1499302600] [2022-07-12 18:39:54,875 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1499302600] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:54,875 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:54,875 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-07-12 18:39:54,875 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1793984017] [2022-07-12 18:39:54,875 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:54,876 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-07-12 18:39:54,876 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:54,876 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-07-12 18:39:54,876 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-12 18:39:54,877 INFO L87 Difference]: Start difference. First operand 145 states and 171 transitions. Second operand has 3 states, 2 states have (on average 18.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:54,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:54,929 INFO L93 Difference]: Finished difference Result 161 states and 185 transitions. [2022-07-12 18:39:54,929 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-07-12 18:39:54,929 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 18.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 36 [2022-07-12 18:39:54,930 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:54,930 INFO L225 Difference]: With dead ends: 161 [2022-07-12 18:39:54,930 INFO L226 Difference]: Without dead ends: 161 [2022-07-12 18:39:54,931 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-12 18:39:54,934 INFO L413 NwaCegarLoop]: 98 mSDtfsCounter, 37 mSDsluCounter, 38 mSDsCounter, 0 mSdLazyCounter, 53 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 37 SdHoareTripleChecker+Valid, 136 SdHoareTripleChecker+Invalid, 54 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 53 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:54,934 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [37 Valid, 136 Invalid, 54 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 53 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-07-12 18:39:54,935 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2022-07-12 18:39:54,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 143. [2022-07-12 18:39:54,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 143 states, 124 states have (on average 1.3387096774193548) internal successors, (166), 142 states have internal predecessors, (166), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:54,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 166 transitions. [2022-07-12 18:39:54,938 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 166 transitions. Word has length 36 [2022-07-12 18:39:54,938 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:54,938 INFO L495 AbstractCegarLoop]: Abstraction has 143 states and 166 transitions. [2022-07-12 18:39:54,938 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 18.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:54,938 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 166 transitions. [2022-07-12 18:39:54,939 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-07-12 18:39:54,939 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:54,939 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:54,939 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2022-07-12 18:39:54,939 INFO L420 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr39REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:54,940 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:54,940 INFO L85 PathProgramCache]: Analyzing trace with hash -1408146295, now seen corresponding path program 1 times [2022-07-12 18:39:54,940 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:54,940 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1253206737] [2022-07-12 18:39:54,941 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:54,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:54,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:54,976 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:54,977 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:54,977 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1253206737] [2022-07-12 18:39:54,977 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1253206737] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:54,977 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:54,977 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-07-12 18:39:54,977 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [237437230] [2022-07-12 18:39:54,977 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:54,978 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-07-12 18:39:54,978 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:54,978 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-07-12 18:39:54,978 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-12 18:39:54,978 INFO L87 Difference]: Start difference. First operand 143 states and 166 transitions. Second operand has 3 states, 2 states have (on average 18.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:55,026 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:55,027 INFO L93 Difference]: Finished difference Result 164 states and 184 transitions. [2022-07-12 18:39:55,027 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-07-12 18:39:55,027 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 18.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 36 [2022-07-12 18:39:55,027 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:55,028 INFO L225 Difference]: With dead ends: 164 [2022-07-12 18:39:55,028 INFO L226 Difference]: Without dead ends: 164 [2022-07-12 18:39:55,028 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-12 18:39:55,029 INFO L413 NwaCegarLoop]: 99 mSDtfsCounter, 40 mSDsluCounter, 39 mSDsCounter, 0 mSdLazyCounter, 50 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 40 SdHoareTripleChecker+Valid, 138 SdHoareTripleChecker+Invalid, 51 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 50 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:55,029 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [40 Valid, 138 Invalid, 51 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 50 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-07-12 18:39:55,030 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2022-07-12 18:39:55,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 141. [2022-07-12 18:39:55,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 141 states, 124 states have (on average 1.2983870967741935) internal successors, (161), 140 states have internal predecessors, (161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:55,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 161 transitions. [2022-07-12 18:39:55,032 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 161 transitions. Word has length 36 [2022-07-12 18:39:55,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:55,032 INFO L495 AbstractCegarLoop]: Abstraction has 141 states and 161 transitions. [2022-07-12 18:39:55,032 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 18.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:55,033 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 161 transitions. [2022-07-12 18:39:55,033 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-07-12 18:39:55,033 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:55,033 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:55,033 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2022-07-12 18:39:55,034 INFO L420 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr30REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:55,034 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:55,034 INFO L85 PathProgramCache]: Analyzing trace with hash -1408093625, now seen corresponding path program 1 times [2022-07-12 18:39:55,034 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:55,034 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [849114195] [2022-07-12 18:39:55,034 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:55,035 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:55,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:55,784 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:55,784 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:55,784 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [849114195] [2022-07-12 18:39:55,784 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [849114195] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 18:39:55,784 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [720527875] [2022-07-12 18:39:55,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:55,784 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 18:39:55,785 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-12 18:39:55,787 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-12 18:39:55,788 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-07-12 18:39:55,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:55,919 INFO L263 TraceCheckSpWp]: Trace formula consists of 285 conjuncts, 103 conjunts are in the unsatisfiable core [2022-07-12 18:39:55,925 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 18:39:55,936 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 18:39:55,937 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 18 [2022-07-12 18:39:56,002 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 18:39:56,053 INFO L356 Elim1Store]: treesize reduction 8, result has 61.9 percent of original size [2022-07-12 18:39:56,053 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 20 treesize of output 22 [2022-07-12 18:39:56,091 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:39:56,092 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 25 [2022-07-12 18:39:56,316 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:39:56,334 INFO L356 Elim1Store]: treesize reduction 70, result has 19.5 percent of original size [2022-07-12 18:39:56,334 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 95 treesize of output 64 [2022-07-12 18:39:56,340 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 28 [2022-07-12 18:39:56,425 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:39:56,451 INFO L356 Elim1Store]: treesize reduction 152, result has 15.6 percent of original size [2022-07-12 18:39:56,451 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 128 treesize of output 84 [2022-07-12 18:39:56,462 INFO L356 Elim1Store]: treesize reduction 21, result has 34.4 percent of original size [2022-07-12 18:39:56,463 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 1 case distinctions, treesize of input 90 treesize of output 78 [2022-07-12 18:39:56,704 INFO L356 Elim1Store]: treesize reduction 36, result has 23.4 percent of original size [2022-07-12 18:39:56,705 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 147 treesize of output 126 [2022-07-12 18:39:56,713 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 94 treesize of output 85 [2022-07-12 18:39:56,752 INFO L356 Elim1Store]: treesize reduction 36, result has 23.4 percent of original size [2022-07-12 18:39:56,753 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 138 treesize of output 119 [2022-07-12 18:39:56,767 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 94 treesize of output 85 [2022-07-12 18:39:57,364 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:39:57,376 INFO L356 Elim1Store]: treesize reduction 38, result has 15.6 percent of original size [2022-07-12 18:39:57,376 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 5 select indices, 5 select index equivalence classes, 3 disjoint index pairs (out of 10 index pairs), introduced 7 new quantified variables, introduced 5 case distinctions, treesize of input 103 treesize of output 65 [2022-07-12 18:39:57,571 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:57,572 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-07-12 18:39:57,572 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [720527875] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:57,572 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-07-12 18:39:57,572 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [22] imperfect sequences [25] total 46 [2022-07-12 18:39:57,572 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1111614897] [2022-07-12 18:39:57,572 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:57,573 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-07-12 18:39:57,573 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:57,573 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-07-12 18:39:57,573 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=119, Invalid=1951, Unknown=0, NotChecked=0, Total=2070 [2022-07-12 18:39:57,574 INFO L87 Difference]: Start difference. First operand 141 states and 161 transitions. Second operand has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 22 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:58,613 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:58,614 INFO L93 Difference]: Finished difference Result 141 states and 160 transitions. [2022-07-12 18:39:58,614 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-07-12 18:39:58,614 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 22 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 36 [2022-07-12 18:39:58,614 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:58,615 INFO L225 Difference]: With dead ends: 141 [2022-07-12 18:39:58,615 INFO L226 Difference]: Without dead ends: 141 [2022-07-12 18:39:58,616 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 557 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=257, Invalid=3525, Unknown=0, NotChecked=0, Total=3782 [2022-07-12 18:39:58,616 INFO L413 NwaCegarLoop]: 59 mSDtfsCounter, 63 mSDsluCounter, 672 mSDsCounter, 0 mSdLazyCounter, 310 mSolverCounterSat, 18 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 63 SdHoareTripleChecker+Valid, 731 SdHoareTripleChecker+Invalid, 480 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 18 IncrementalHoareTripleChecker+Valid, 310 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 152 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:58,616 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [63 Valid, 731 Invalid, 480 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [18 Valid, 310 Invalid, 0 Unknown, 152 Unchecked, 0.2s Time] [2022-07-12 18:39:58,617 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2022-07-12 18:39:58,618 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 141. [2022-07-12 18:39:58,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 141 states, 124 states have (on average 1.2903225806451613) internal successors, (160), 140 states have internal predecessors, (160), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:58,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 160 transitions. [2022-07-12 18:39:58,619 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 160 transitions. Word has length 36 [2022-07-12 18:39:58,619 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:58,619 INFO L495 AbstractCegarLoop]: Abstraction has 141 states and 160 transitions. [2022-07-12 18:39:58,619 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 22 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:58,619 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 160 transitions. [2022-07-12 18:39:58,619 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-07-12 18:39:58,619 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:58,620 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:58,639 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-07-12 18:39:58,831 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable30 [2022-07-12 18:39:58,832 INFO L420 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr30REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:58,832 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:58,832 INFO L85 PathProgramCache]: Analyzing trace with hash -1406246583, now seen corresponding path program 1 times [2022-07-12 18:39:58,832 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:58,832 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [323318278] [2022-07-12 18:39:58,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:58,833 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:58,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:58,868 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:58,868 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:58,868 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [323318278] [2022-07-12 18:39:58,868 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [323318278] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 18:39:58,868 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 18:39:58,868 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-07-12 18:39:58,869 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1214539575] [2022-07-12 18:39:58,869 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 18:39:58,869 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-07-12 18:39:58,869 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:39:58,870 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-07-12 18:39:58,870 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-12 18:39:58,870 INFO L87 Difference]: Start difference. First operand 141 states and 160 transitions. Second operand has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:58,875 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:39:58,875 INFO L93 Difference]: Finished difference Result 130 states and 141 transitions. [2022-07-12 18:39:58,876 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-07-12 18:39:58,876 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 36 [2022-07-12 18:39:58,876 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:39:58,877 INFO L225 Difference]: With dead ends: 130 [2022-07-12 18:39:58,877 INFO L226 Difference]: Without dead ends: 130 [2022-07-12 18:39:58,878 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-12 18:39:58,878 INFO L413 NwaCegarLoop]: 88 mSDtfsCounter, 0 mSDsluCounter, 83 mSDsCounter, 0 mSdLazyCounter, 6 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 171 SdHoareTripleChecker+Invalid, 6 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 6 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-07-12 18:39:58,879 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 171 Invalid, 6 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 6 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-07-12 18:39:58,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2022-07-12 18:39:58,881 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 129. [2022-07-12 18:39:58,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 129 states, 112 states have (on average 1.25) internal successors, (140), 128 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:58,882 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 140 transitions. [2022-07-12 18:39:58,882 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 140 transitions. Word has length 36 [2022-07-12 18:39:58,883 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:39:58,883 INFO L495 AbstractCegarLoop]: Abstraction has 129 states and 140 transitions. [2022-07-12 18:39:58,883 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:39:58,884 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 140 transitions. [2022-07-12 18:39:58,884 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-07-12 18:39:58,884 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:39:58,884 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:39:58,884 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2022-07-12 18:39:58,884 INFO L420 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr54REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:39:58,885 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:39:58,885 INFO L85 PathProgramCache]: Analyzing trace with hash -183715591, now seen corresponding path program 1 times [2022-07-12 18:39:58,885 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:39:58,885 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1967356332] [2022-07-12 18:39:58,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:58,886 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:39:58,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:59,531 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:39:59,531 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:39:59,531 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1967356332] [2022-07-12 18:39:59,531 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1967356332] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 18:39:59,531 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [591439375] [2022-07-12 18:39:59,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:39:59,532 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 18:39:59,532 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-12 18:39:59,533 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-12 18:39:59,534 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-07-12 18:39:59,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:39:59,686 INFO L263 TraceCheckSpWp]: Trace formula consists of 307 conjuncts, 98 conjunts are in the unsatisfiable core [2022-07-12 18:39:59,691 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 18:39:59,702 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 18:39:59,702 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 18 [2022-07-12 18:39:59,739 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 18:39:59,746 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 18:39:59,807 INFO L356 Elim1Store]: treesize reduction 48, result has 36.0 percent of original size [2022-07-12 18:39:59,808 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 26 treesize of output 41 [2022-07-12 18:39:59,864 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:39:59,865 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-07-12 18:39:59,870 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:39:59,871 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2022-07-12 18:40:00,020 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 10 [2022-07-12 18:40:00,153 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:00,160 INFO L356 Elim1Store]: treesize reduction 17, result has 29.2 percent of original size [2022-07-12 18:40:00,160 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 88 treesize of output 55 [2022-07-12 18:40:00,228 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:00,229 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:00,236 INFO L356 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2022-07-12 18:40:00,236 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 87 treesize of output 55 [2022-07-12 18:40:00,440 INFO L356 Elim1Store]: treesize reduction 36, result has 23.4 percent of original size [2022-07-12 18:40:00,441 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 100 treesize of output 87 [2022-07-12 18:40:00,474 INFO L356 Elim1Store]: treesize reduction 36, result has 23.4 percent of original size [2022-07-12 18:40:00,474 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 91 treesize of output 80 [2022-07-12 18:40:00,834 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-07-12 18:40:00,976 INFO L356 Elim1Store]: treesize reduction 100, result has 16.0 percent of original size [2022-07-12 18:40:00,976 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 6 select indices, 6 select index equivalence classes, 1 disjoint index pairs (out of 15 index pairs), introduced 7 new quantified variables, introduced 14 case distinctions, treesize of input 95 treesize of output 73 [2022-07-12 18:40:01,146 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 29 [2022-07-12 18:40:01,307 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 2 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 26 [2022-07-12 18:40:01,359 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:40:01,359 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-12 18:40:01,509 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 35 [2022-07-12 18:40:01,534 WARN L833 $PredicateComparison]: unable to prove that (and (forall ((v_ArrVal_1453 (Array Int Int))) (= (select |c_#valid| (select (let ((.cse0 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem10#1.base| v_ArrVal_1453))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) 0)) 1)) (forall ((v_ArrVal_1453 (Array Int Int))) (not (let ((.cse1 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem10#1.base| v_ArrVal_1453))) (let ((.cse2 (select (select .cse1 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (= (select (select .cse1 .cse2) 0) .cse2)))))) is different from false [2022-07-12 18:40:01,542 WARN L833 $PredicateComparison]: unable to prove that (and (forall ((v_ArrVal_1453 (Array Int Int)) (v_ArrVal_1452 (Array Int Int))) (= (select |c_#valid| (select (let ((.cse0 (store (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem11#1.base| v_ArrVal_1452) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem10#1.base| v_ArrVal_1453))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) 0)) 1)) (forall ((v_ArrVal_1453 (Array Int Int)) (v_ArrVal_1452 (Array Int Int))) (not (let ((.cse2 (store (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem11#1.base| v_ArrVal_1452) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem10#1.base| v_ArrVal_1453))) (let ((.cse1 (select (select .cse2 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (= .cse1 (select (select .cse2 .cse1) 0))))))) is different from false [2022-07-12 18:40:01,549 WARN L833 $PredicateComparison]: unable to prove that (and (forall ((v_ArrVal_1453 (Array Int Int)) (v_ArrVal_1452 (Array Int Int))) (= (select |c_#valid| (select (let ((.cse0 (store (store |c_#memory_$Pointer$.base| (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) v_ArrVal_1452) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem10#1.base| v_ArrVal_1453))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) 0)) 1)) (forall ((v_ArrVal_1453 (Array Int Int)) (v_ArrVal_1452 (Array Int Int))) (not (let ((.cse2 (store (store |c_#memory_$Pointer$.base| (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) v_ArrVal_1452) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem10#1.base| v_ArrVal_1453))) (let ((.cse1 (select (select .cse2 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (= .cse1 (select (select .cse2 .cse1) 0))))))) is different from false [2022-07-12 18:40:01,555 WARN L833 $PredicateComparison]: unable to prove that (and (forall ((v_ArrVal_1453 (Array Int Int))) (= (select |c_#valid| (select (let ((.cse0 (store |c_#memory_$Pointer$.base| (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) v_ArrVal_1453))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) 0)) 1)) (forall ((v_ArrVal_1453 (Array Int Int))) (not (let ((.cse2 (store |c_#memory_$Pointer$.base| (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) v_ArrVal_1453))) (let ((.cse1 (select (select .cse2 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (= .cse1 (select (select .cse2 .cse1) 0))))))) is different from false [2022-07-12 18:40:01,569 WARN L833 $PredicateComparison]: unable to prove that (and (forall ((v_ArrVal_1453 (Array Int Int))) (not (let ((.cse0 (let ((.cse2 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| (store (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.offset| 4) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base|)))) (store .cse2 (select (select .cse2 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) v_ArrVal_1453)))) (let ((.cse1 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (= (select (select .cse0 .cse1) 0) .cse1))))) (forall ((v_ArrVal_1453 (Array Int Int))) (= (select |c_#valid| (select (let ((.cse3 (let ((.cse4 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| (store (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.offset| 4) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base|)))) (store .cse4 (select (select .cse4 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) v_ArrVal_1453)))) (select .cse3 (select (select .cse3 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) 0)) 1))) is different from false [2022-07-12 18:40:01,577 WARN L833 $PredicateComparison]: unable to prove that (and (forall ((v_ArrVal_1453 (Array Int Int))) (= (select |c_#valid| (select (let ((.cse0 (let ((.cse1 (let ((.cse2 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.base| (store (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.offset| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base|)))) (store .cse2 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| (store (select .cse2 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.offset| 4) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base|))))) (store .cse1 (select (select .cse1 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) v_ArrVal_1453)))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) 0)) 1)) (forall ((v_ArrVal_1453 (Array Int Int))) (not (let ((.cse4 (let ((.cse5 (let ((.cse6 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.base| (store (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.offset| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base|)))) (store .cse6 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| (store (select .cse6 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.offset| 4) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base|))))) (store .cse5 (select (select .cse5 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) v_ArrVal_1453)))) (let ((.cse3 (select (select .cse4 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (= .cse3 (select (select .cse4 .cse3) 0))))))) is different from false [2022-07-12 18:40:01,587 WARN L833 $PredicateComparison]: unable to prove that (and (forall ((v_ArrVal_1453 (Array Int Int))) (not (let ((.cse1 (let ((.cse3 (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4))) (let ((.cse2 (let ((.cse5 (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse3))) (let ((.cse4 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.base| (store (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.offset| .cse5)))) (store .cse4 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| (store (select .cse4 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.offset| 4) .cse5)))))) (store .cse2 (select (select .cse2 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse3) v_ArrVal_1453))))) (let ((.cse0 (select (select .cse1 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (= .cse0 (select (select .cse1 .cse0) 0)))))) (forall ((v_ArrVal_1453 (Array Int Int))) (= (select |c_#valid| (select (let ((.cse6 (let ((.cse8 (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4))) (let ((.cse7 (let ((.cse10 (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse8))) (let ((.cse9 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.base| (store (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.offset| .cse10)))) (store .cse9 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| (store (select .cse9 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.offset| 4) .cse10)))))) (store .cse7 (select (select .cse7 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse8) v_ArrVal_1453))))) (select .cse6 (select (select .cse6 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) 0)) 1))) is different from false [2022-07-12 18:40:01,599 WARN L833 $PredicateComparison]: unable to prove that (and (forall ((v_ArrVal_1453 (Array Int Int))) (= (select |c_#valid| (select (let ((.cse0 (let ((.cse2 (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4))) (let ((.cse1 (let ((.cse6 (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) (let ((.cse4 (select .cse6 .cse2))) (let ((.cse3 (let ((.cse5 (select .cse6 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (store |c_#memory_$Pointer$.base| .cse5 (store (select |c_#memory_$Pointer$.base| .cse5) (select (select |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|) .cse4))))) (store .cse3 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| (store (select .cse3 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.offset| 4) .cse4))))))) (store .cse1 (select (select .cse1 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse2) v_ArrVal_1453))))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) 0)) 1)) (forall ((v_ArrVal_1453 (Array Int Int))) (not (let ((.cse7 (let ((.cse10 (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4))) (let ((.cse9 (let ((.cse14 (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) (let ((.cse12 (select .cse14 .cse10))) (let ((.cse11 (let ((.cse13 (select .cse14 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (store |c_#memory_$Pointer$.base| .cse13 (store (select |c_#memory_$Pointer$.base| .cse13) (select (select |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|) .cse12))))) (store .cse11 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| (store (select .cse11 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.offset| 4) .cse12))))))) (store .cse9 (select (select .cse9 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse10) v_ArrVal_1453))))) (let ((.cse8 (select (select .cse7 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (= (select (select .cse7 .cse8) 0) .cse8)))))) is different from false [2022-07-12 18:40:01,745 WARN L833 $PredicateComparison]: unable to prove that (and (forall ((v_ArrVal_1453 (Array Int Int))) (not (let ((.cse0 (let ((.cse3 (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4))) (let ((.cse2 (let ((.cse7 (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) (let ((.cse4 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base| (store .cse7 .cse3 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~malloc6#1.base|))) (.cse5 (select .cse7 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (store .cse4 .cse5 (let ((.cse6 (select (select |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (store (store (select .cse4 .cse5) .cse6 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~malloc6#1.base|) (+ .cse6 4) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~malloc6#1.base|))))))) (store .cse2 (select (select .cse2 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse3) v_ArrVal_1453))))) (let ((.cse1 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (= (select (select .cse0 .cse1) 0) .cse1))))) (forall ((v_ArrVal_1453 (Array Int Int))) (= (select |c_#valid| (select (let ((.cse8 (let ((.cse10 (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4))) (let ((.cse9 (let ((.cse14 (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) (let ((.cse11 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base| (store .cse14 .cse10 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~malloc6#1.base|))) (.cse12 (select .cse14 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (store .cse11 .cse12 (let ((.cse13 (select (select |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (store (store (select .cse11 .cse12) .cse13 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~malloc6#1.base|) (+ .cse13 4) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~malloc6#1.base|))))))) (store .cse9 (select (select .cse9 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse10) v_ArrVal_1453))))) (select .cse8 (select (select .cse8 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) 0)) 1))) is different from false [2022-07-12 18:40:01,937 INFO L356 Elim1Store]: treesize reduction 182, result has 24.2 percent of original size [2022-07-12 18:40:01,938 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 4 case distinctions, treesize of input 100 treesize of output 80 [2022-07-12 18:40:02,038 INFO L356 Elim1Store]: treesize reduction 71, result has 62.0 percent of original size [2022-07-12 18:40:02,039 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 6 select indices, 6 select index equivalence classes, 0 disjoint index pairs (out of 15 index pairs), introduced 7 new quantified variables, introduced 15 case distinctions, treesize of input 247 treesize of output 234 [2022-07-12 18:40:02,052 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:40:02,052 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 127 treesize of output 121 [2022-07-12 18:40:03,124 INFO L356 Elim1Store]: treesize reduction 182, result has 24.2 percent of original size [2022-07-12 18:40:03,125 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 4 case distinctions, treesize of input 142 treesize of output 83 [2022-07-12 18:40:03,214 INFO L356 Elim1Store]: treesize reduction 78, result has 58.3 percent of original size [2022-07-12 18:40:03,214 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 6 select indices, 6 select index equivalence classes, 0 disjoint index pairs (out of 15 index pairs), introduced 7 new quantified variables, introduced 15 case distinctions, treesize of input 196 treesize of output 210 [2022-07-12 18:40:03,225 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:40:03,226 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 110 treesize of output 98 [2022-07-12 18:40:16,377 WARN L233 SmtUtils]: Spent 12.79s on a formula simplification. DAG size of input: 111 DAG size of output: 36 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-07-12 18:40:16,380 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:40:16,380 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [591439375] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-12 18:40:16,380 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-12 18:40:16,380 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 23, 25] total 61 [2022-07-12 18:40:16,380 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1363007839] [2022-07-12 18:40:16,380 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-12 18:40:16,380 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 62 states [2022-07-12 18:40:16,381 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:40:16,381 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2022-07-12 18:40:16,382 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=219, Invalid=2540, Unknown=33, NotChecked=990, Total=3782 [2022-07-12 18:40:16,382 INFO L87 Difference]: Start difference. First operand 129 states and 140 transitions. Second operand has 62 states, 61 states have (on average 1.5245901639344261) internal successors, (93), 62 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:40:18,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:40:18,268 INFO L93 Difference]: Finished difference Result 142 states and 155 transitions. [2022-07-12 18:40:18,268 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2022-07-12 18:40:18,269 INFO L78 Accepts]: Start accepts. Automaton has has 62 states, 61 states have (on average 1.5245901639344261) internal successors, (93), 62 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 38 [2022-07-12 18:40:18,269 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:40:18,269 INFO L225 Difference]: With dead ends: 142 [2022-07-12 18:40:18,269 INFO L226 Difference]: Without dead ends: 142 [2022-07-12 18:40:18,271 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 123 GetRequests, 39 SyntacticMatches, 8 SemanticMatches, 76 ConstructedPredicates, 9 IntricatePredicates, 0 DeprecatedPredicates, 1267 ImplicationChecksByTransitivity, 15.9s TimeCoverageRelationStatistics Valid=407, Invalid=4287, Unknown=34, NotChecked=1278, Total=6006 [2022-07-12 18:40:18,271 INFO L413 NwaCegarLoop]: 56 mSDtfsCounter, 141 mSDsluCounter, 1445 mSDsCounter, 0 mSdLazyCounter, 1203 mSolverCounterSat, 32 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 141 SdHoareTripleChecker+Valid, 1501 SdHoareTripleChecker+Invalid, 2050 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 32 IncrementalHoareTripleChecker+Valid, 1203 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 815 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-07-12 18:40:18,271 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [141 Valid, 1501 Invalid, 2050 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [32 Valid, 1203 Invalid, 0 Unknown, 815 Unchecked, 0.6s Time] [2022-07-12 18:40:18,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2022-07-12 18:40:18,273 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 135. [2022-07-12 18:40:18,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 135 states, 118 states have (on average 1.2542372881355932) internal successors, (148), 134 states have internal predecessors, (148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:40:18,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 148 transitions. [2022-07-12 18:40:18,274 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 148 transitions. Word has length 38 [2022-07-12 18:40:18,274 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:40:18,275 INFO L495 AbstractCegarLoop]: Abstraction has 135 states and 148 transitions. [2022-07-12 18:40:18,275 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 62 states, 61 states have (on average 1.5245901639344261) internal successors, (93), 62 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:40:18,275 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 148 transitions. [2022-07-12 18:40:18,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-07-12 18:40:18,275 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:40:18,275 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:40:18,292 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2022-07-12 18:40:18,479 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 18:40:18,480 INFO L420 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr55REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:40:18,480 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:40:18,480 INFO L85 PathProgramCache]: Analyzing trace with hash -183715590, now seen corresponding path program 1 times [2022-07-12 18:40:18,480 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:40:18,480 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1588238497] [2022-07-12 18:40:18,481 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:40:18,481 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:40:18,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:40:19,055 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:40:19,056 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:40:19,056 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1588238497] [2022-07-12 18:40:19,056 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1588238497] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 18:40:19,056 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1610294592] [2022-07-12 18:40:19,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:40:19,056 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 18:40:19,056 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-12 18:40:19,057 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-12 18:40:19,059 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-07-12 18:40:19,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:40:19,192 INFO L263 TraceCheckSpWp]: Trace formula consists of 307 conjuncts, 119 conjunts are in the unsatisfiable core [2022-07-12 18:40:19,197 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 18:40:19,210 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 18:40:19,210 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 18 [2022-07-12 18:40:19,248 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 18:40:19,255 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 18:40:19,307 INFO L356 Elim1Store]: treesize reduction 8, result has 61.9 percent of original size [2022-07-12 18:40:19,307 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 20 treesize of output 22 [2022-07-12 18:40:19,316 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 18:40:19,353 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:19,353 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-07-12 18:40:19,362 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:19,362 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 25 [2022-07-12 18:40:19,636 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:19,643 INFO L356 Elim1Store]: treesize reduction 17, result has 29.2 percent of original size [2022-07-12 18:40:19,643 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 64 [2022-07-12 18:40:19,648 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:19,648 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 46 [2022-07-12 18:40:19,733 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:19,734 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:19,742 INFO L356 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2022-07-12 18:40:19,743 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 109 treesize of output 75 [2022-07-12 18:40:19,747 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:19,747 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:19,748 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 48 [2022-07-12 18:40:20,012 INFO L356 Elim1Store]: treesize reduction 36, result has 23.4 percent of original size [2022-07-12 18:40:20,013 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 114 treesize of output 99 [2022-07-12 18:40:20,017 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:20,018 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 48 [2022-07-12 18:40:20,061 INFO L356 Elim1Store]: treesize reduction 36, result has 23.4 percent of original size [2022-07-12 18:40:20,061 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 116 treesize of output 101 [2022-07-12 18:40:20,066 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:20,067 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 48 [2022-07-12 18:40:20,734 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:20,751 INFO L356 Elim1Store]: treesize reduction 72, result has 17.2 percent of original size [2022-07-12 18:40:20,751 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 6 select indices, 6 select index equivalence classes, 1 disjoint index pairs (out of 15 index pairs), introduced 7 new quantified variables, introduced 14 case distinctions, treesize of input 128 treesize of output 94 [2022-07-12 18:40:20,767 INFO L356 Elim1Store]: treesize reduction 16, result has 5.9 percent of original size [2022-07-12 18:40:20,767 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 6 select indices, 6 select index equivalence classes, 3 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 2 case distinctions, treesize of input 55 treesize of output 54 [2022-07-12 18:40:21,150 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 2 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 26 [2022-07-12 18:40:21,154 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 4 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 16 [2022-07-12 18:40:21,199 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:40:21,199 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-12 18:40:23,962 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:40:23,963 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2438 treesize of output 2442 [2022-07-12 18:40:26,667 INFO L356 Elim1Store]: treesize reduction 182, result has 24.2 percent of original size [2022-07-12 18:40:26,668 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 4 case distinctions, treesize of input 192 treesize of output 210 [2022-07-12 18:40:26,672 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:26,673 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:26,715 INFO L356 Elim1Store]: treesize reduction 121, result has 32.4 percent of original size [2022-07-12 18:40:26,715 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 4 case distinctions, treesize of input 177 treesize of output 117 [2022-07-12 18:40:26,719 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:26,720 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:26,734 INFO L356 Elim1Store]: treesize reduction 49, result has 7.5 percent of original size [2022-07-12 18:40:26,735 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 2 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 4 case distinctions, treesize of input 174 treesize of output 100 [2022-07-12 18:40:26,738 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:26,749 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:26,750 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:26,806 INFO L356 Elim1Store]: treesize reduction 67, result has 38.5 percent of original size [2022-07-12 18:40:26,806 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 5 select indices, 5 select index equivalence classes, 2 disjoint index pairs (out of 10 index pairs), introduced 6 new quantified variables, introduced 8 case distinctions, treesize of input 120 treesize of output 123 [2022-07-12 18:40:26,812 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 58 [2022-07-12 18:40:26,817 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2022-07-12 18:40:26,882 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:26,982 INFO L356 Elim1Store]: treesize reduction 171, result has 21.9 percent of original size [2022-07-12 18:40:26,982 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 4 case distinctions, treesize of input 192 treesize of output 200 [2022-07-12 18:40:26,987 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:26,988 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:26,990 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:26,991 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:27,013 INFO L356 Elim1Store]: treesize reduction 88, result has 17.8 percent of original size [2022-07-12 18:40:27,014 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 4 case distinctions, treesize of input 169 treesize of output 70 [2022-07-12 18:40:27,019 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:27,019 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:27,020 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:27,024 INFO L356 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-07-12 18:40:27,024 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 112 treesize of output 66 [2022-07-12 18:40:27,028 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:27,030 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:27,031 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:27,032 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:27,060 INFO L356 Elim1Store]: treesize reduction 8, result has 84.0 percent of original size [2022-07-12 18:40:27,060 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 2 disjoint index pairs (out of 6 index pairs), introduced 5 new quantified variables, introduced 4 case distinctions, treesize of input 81 treesize of output 94 [2022-07-12 18:40:27,065 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 58 [2022-07-12 18:40:27,068 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2022-07-12 18:40:27,085 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:27,152 INFO L356 Elim1Store]: treesize reduction 169, result has 22.8 percent of original size [2022-07-12 18:40:27,152 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 4 case distinctions, treesize of input 192 treesize of output 163 [2022-07-12 18:40:27,159 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:27,160 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:27,161 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:27,162 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:27,180 INFO L356 Elim1Store]: treesize reduction 88, result has 17.8 percent of original size [2022-07-12 18:40:27,180 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 4 case distinctions, treesize of input 144 treesize of output 84 [2022-07-12 18:40:27,191 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:27,192 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:27,193 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:27,195 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:27,259 INFO L356 Elim1Store]: treesize reduction 89, result has 38.6 percent of original size [2022-07-12 18:40:27,260 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 6 select indices, 6 select index equivalence classes, 3 disjoint index pairs (out of 15 index pairs), introduced 8 new quantified variables, introduced 12 case distinctions, treesize of input 259 treesize of output 163 [2022-07-12 18:40:27,267 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:27,270 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:27,271 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:27,272 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:27,275 INFO L356 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-07-12 18:40:27,276 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 100 treesize of output 70 [2022-07-12 18:40:27,286 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:40:27,287 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 94 treesize of output 88 [2022-07-12 18:40:27,519 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:40:27,519 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1610294592] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-12 18:40:27,519 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-12 18:40:27,519 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 23, 24] total 69 [2022-07-12 18:40:27,519 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1299393712] [2022-07-12 18:40:27,519 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-12 18:40:27,520 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 70 states [2022-07-12 18:40:27,520 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:40:27,520 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 70 interpolants. [2022-07-12 18:40:27,521 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=270, Invalid=4547, Unknown=13, NotChecked=0, Total=4830 [2022-07-12 18:40:27,521 INFO L87 Difference]: Start difference. First operand 135 states and 148 transitions. Second operand has 70 states, 69 states have (on average 1.6231884057971016) internal successors, (112), 70 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:40:31,526 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:40:31,526 INFO L93 Difference]: Finished difference Result 142 states and 154 transitions. [2022-07-12 18:40:31,526 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2022-07-12 18:40:31,526 INFO L78 Accepts]: Start accepts. Automaton has has 70 states, 69 states have (on average 1.6231884057971016) internal successors, (112), 70 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 38 [2022-07-12 18:40:31,526 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:40:31,527 INFO L225 Difference]: With dead ends: 142 [2022-07-12 18:40:31,527 INFO L226 Difference]: Without dead ends: 142 [2022-07-12 18:40:31,528 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 122 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 91 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1711 ImplicationChecksByTransitivity, 9.2s TimeCoverageRelationStatistics Valid=732, Invalid=7811, Unknown=13, NotChecked=0, Total=8556 [2022-07-12 18:40:31,528 INFO L413 NwaCegarLoop]: 60 mSDtfsCounter, 354 mSDsluCounter, 1688 mSDsCounter, 0 mSdLazyCounter, 1404 mSolverCounterSat, 91 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 354 SdHoareTripleChecker+Valid, 1748 SdHoareTripleChecker+Invalid, 2102 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 91 IncrementalHoareTripleChecker+Valid, 1404 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 607 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-07-12 18:40:31,529 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [354 Valid, 1748 Invalid, 2102 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [91 Valid, 1404 Invalid, 0 Unknown, 607 Unchecked, 0.7s Time] [2022-07-12 18:40:31,529 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2022-07-12 18:40:31,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 135. [2022-07-12 18:40:31,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 135 states, 118 states have (on average 1.2457627118644068) internal successors, (147), 134 states have internal predecessors, (147), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:40:31,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 147 transitions. [2022-07-12 18:40:31,538 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 147 transitions. Word has length 38 [2022-07-12 18:40:31,538 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:40:31,538 INFO L495 AbstractCegarLoop]: Abstraction has 135 states and 147 transitions. [2022-07-12 18:40:31,538 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 70 states, 69 states have (on average 1.6231884057971016) internal successors, (112), 70 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:40:31,538 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 147 transitions. [2022-07-12 18:40:31,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-07-12 18:40:31,539 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:40:31,539 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:40:31,558 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-07-12 18:40:31,747 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 18:40:31,747 INFO L420 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:40:31,748 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:40:31,748 INFO L85 PathProgramCache]: Analyzing trace with hash -1434600692, now seen corresponding path program 1 times [2022-07-12 18:40:31,748 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:40:31,748 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1932335411] [2022-07-12 18:40:31,748 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:40:31,748 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:40:31,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:40:32,188 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:40:32,188 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:40:32,188 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1932335411] [2022-07-12 18:40:32,188 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1932335411] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 18:40:32,188 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1892813115] [2022-07-12 18:40:32,188 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:40:32,188 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 18:40:32,189 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-12 18:40:32,190 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-12 18:40:32,190 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-07-12 18:40:32,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:40:32,335 INFO L263 TraceCheckSpWp]: Trace formula consists of 299 conjuncts, 84 conjunts are in the unsatisfiable core [2022-07-12 18:40:32,340 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 18:40:32,360 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 18:40:32,360 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 18 [2022-07-12 18:40:32,394 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 18:40:32,400 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 18:40:32,446 INFO L356 Elim1Store]: treesize reduction 8, result has 61.9 percent of original size [2022-07-12 18:40:32,447 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 20 treesize of output 22 [2022-07-12 18:40:32,492 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:32,493 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-07-12 18:40:32,496 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:32,497 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 25 [2022-07-12 18:40:32,606 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 10 [2022-07-12 18:40:32,728 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:32,735 INFO L356 Elim1Store]: treesize reduction 17, result has 29.2 percent of original size [2022-07-12 18:40:32,735 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 78 treesize of output 49 [2022-07-12 18:40:32,796 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:32,804 INFO L356 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2022-07-12 18:40:32,804 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 4 case distinctions, treesize of input 85 treesize of output 49 [2022-07-12 18:40:32,985 INFO L356 Elim1Store]: treesize reduction 36, result has 23.4 percent of original size [2022-07-12 18:40:32,985 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 92 treesize of output 65 [2022-07-12 18:40:33,041 INFO L356 Elim1Store]: treesize reduction 36, result has 23.4 percent of original size [2022-07-12 18:40:33,042 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 85 treesize of output 60 [2022-07-12 18:40:33,375 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-07-12 18:40:33,547 INFO L356 Elim1Store]: treesize reduction 180, result has 29.7 percent of original size [2022-07-12 18:40:33,547 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 6 select indices, 6 select index equivalence classes, 1 disjoint index pairs (out of 15 index pairs), introduced 8 new quantified variables, introduced 20 case distinctions, treesize of input 94 treesize of output 107 [2022-07-12 18:40:34,169 INFO L356 Elim1Store]: treesize reduction 84, result has 56.5 percent of original size [2022-07-12 18:40:34,169 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 9 select indices, 9 select index equivalence classes, 1 disjoint index pairs (out of 36 index pairs), introduced 11 new quantified variables, introduced 36 case distinctions, treesize of input 193 treesize of output 187 [2022-07-12 18:40:34,754 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:40:34,754 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-12 18:40:35,121 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 17 [2022-07-12 18:40:35,321 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1703 (Array Int Int))) (not (= (select (let ((.cse0 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem10#1.base| v_ArrVal_1703))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) 0))) 0) 0))) is different from false [2022-07-12 18:40:35,324 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1703 (Array Int Int)) (v_ArrVal_1702 (Array Int Int))) (not (= (select (let ((.cse0 (store (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem11#1.base| v_ArrVal_1702) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem10#1.base| v_ArrVal_1703))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) 0))) 0) 0))) is different from false [2022-07-12 18:40:35,328 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1703 (Array Int Int)) (v_ArrVal_1702 (Array Int Int))) (not (= (select (let ((.cse0 (store (store |c_#memory_$Pointer$.base| (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) v_ArrVal_1702) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem10#1.base| v_ArrVal_1703))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) 0))) 0) 0))) is different from false [2022-07-12 18:40:35,331 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1703 (Array Int Int))) (not (= (select (let ((.cse0 (store |c_#memory_$Pointer$.base| (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) v_ArrVal_1703))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) 0))) 0) 0))) is different from false [2022-07-12 18:40:35,336 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1703 (Array Int Int))) (not (= (select (let ((.cse0 (let ((.cse1 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| (store (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.offset| 4) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base|)))) (store .cse1 (select (select .cse1 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) v_ArrVal_1703)))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) 0))) 0) 0))) is different from false [2022-07-12 18:40:35,341 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1703 (Array Int Int))) (not (= (select (let ((.cse0 (let ((.cse1 (let ((.cse2 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.base| (store (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.offset| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base|)))) (store .cse2 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| (store (select .cse2 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.offset| 4) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base|))))) (store .cse1 (select (select .cse1 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) v_ArrVal_1703)))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) 0))) 0) 0))) is different from false [2022-07-12 18:40:35,890 INFO L356 Elim1Store]: treesize reduction 182, result has 24.2 percent of original size [2022-07-12 18:40:35,891 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 4 case distinctions, treesize of input 96 treesize of output 76 [2022-07-12 18:40:36,017 INFO L356 Elim1Store]: treesize reduction 100, result has 59.5 percent of original size [2022-07-12 18:40:36,017 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 7 select indices, 7 select index equivalence classes, 0 disjoint index pairs (out of 21 index pairs), introduced 8 new quantified variables, introduced 21 case distinctions, treesize of input 201 treesize of output 257 [2022-07-12 18:40:36,026 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 113 treesize of output 99 [2022-07-12 18:40:36,568 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:40:36,569 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1892813115] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-12 18:40:36,569 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-12 18:40:36,569 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 27, 27] total 74 [2022-07-12 18:40:36,569 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1719303426] [2022-07-12 18:40:36,569 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-12 18:40:36,569 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 74 states [2022-07-12 18:40:36,569 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:40:36,570 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 74 interpolants. [2022-07-12 18:40:36,570 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=254, Invalid=4314, Unknown=12, NotChecked=822, Total=5402 [2022-07-12 18:40:36,571 INFO L87 Difference]: Start difference. First operand 135 states and 147 transitions. Second operand has 74 states, 74 states have (on average 1.4324324324324325) internal successors, (106), 74 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:40:38,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:40:38,825 INFO L93 Difference]: Finished difference Result 139 states and 150 transitions. [2022-07-12 18:40:38,826 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2022-07-12 18:40:38,826 INFO L78 Accepts]: Start accepts. Automaton has has 74 states, 74 states have (on average 1.4324324324324325) internal successors, (106), 74 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-07-12 18:40:38,826 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:40:38,827 INFO L225 Difference]: With dead ends: 139 [2022-07-12 18:40:38,827 INFO L226 Difference]: Without dead ends: 139 [2022-07-12 18:40:38,828 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 129 GetRequests, 29 SyntacticMatches, 6 SemanticMatches, 94 ConstructedPredicates, 6 IntricatePredicates, 0 DeprecatedPredicates, 1861 ImplicationChecksByTransitivity, 4.1s TimeCoverageRelationStatistics Valid=583, Invalid=7439, Unknown=12, NotChecked=1086, Total=9120 [2022-07-12 18:40:38,829 INFO L413 NwaCegarLoop]: 59 mSDtfsCounter, 266 mSDsluCounter, 2294 mSDsCounter, 0 mSdLazyCounter, 1194 mSolverCounterSat, 46 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 266 SdHoareTripleChecker+Valid, 2353 SdHoareTripleChecker+Invalid, 1875 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 46 IncrementalHoareTripleChecker+Valid, 1194 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 635 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-07-12 18:40:38,829 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [266 Valid, 2353 Invalid, 1875 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [46 Valid, 1194 Invalid, 0 Unknown, 635 Unchecked, 0.6s Time] [2022-07-12 18:40:38,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2022-07-12 18:40:38,830 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 135. [2022-07-12 18:40:38,830 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 135 states, 118 states have (on average 1.2372881355932204) internal successors, (146), 134 states have internal predecessors, (146), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:40:38,831 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 146 transitions. [2022-07-12 18:40:38,831 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 146 transitions. Word has length 39 [2022-07-12 18:40:38,831 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:40:38,831 INFO L495 AbstractCegarLoop]: Abstraction has 135 states and 146 transitions. [2022-07-12 18:40:38,832 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 74 states, 74 states have (on average 1.4324324324324325) internal successors, (106), 74 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:40:38,832 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 146 transitions. [2022-07-12 18:40:38,832 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2022-07-12 18:40:38,832 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:40:38,832 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:40:38,859 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2022-07-12 18:40:39,055 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable34 [2022-07-12 18:40:39,056 INFO L420 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:40:39,056 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:40:39,056 INFO L85 PathProgramCache]: Analyzing trace with hash -1282697261, now seen corresponding path program 1 times [2022-07-12 18:40:39,056 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:40:39,056 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1645234221] [2022-07-12 18:40:39,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:40:39,057 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:40:39,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:40:39,527 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:40:39,528 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:40:39,528 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1645234221] [2022-07-12 18:40:39,528 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1645234221] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 18:40:39,528 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1101633116] [2022-07-12 18:40:39,528 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:40:39,528 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 18:40:39,528 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-12 18:40:39,532 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-12 18:40:39,540 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-07-12 18:40:39,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:40:39,701 INFO L263 TraceCheckSpWp]: Trace formula consists of 332 conjuncts, 102 conjunts are in the unsatisfiable core [2022-07-12 18:40:39,704 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 18:40:39,720 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 18:40:39,720 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 18 [2022-07-12 18:40:39,752 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 18:40:39,756 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 18:40:39,796 INFO L356 Elim1Store]: treesize reduction 8, result has 61.9 percent of original size [2022-07-12 18:40:39,796 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 20 treesize of output 22 [2022-07-12 18:40:39,836 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:39,836 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-07-12 18:40:39,841 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:39,843 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 25 [2022-07-12 18:40:40,055 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 18:40:40,055 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 64 [2022-07-12 18:40:40,058 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:40,059 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 43 [2022-07-12 18:40:40,131 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 18:40:40,132 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 116 treesize of output 103 [2022-07-12 18:40:40,136 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:40,144 INFO L356 Elim1Store]: treesize reduction 21, result has 34.4 percent of original size [2022-07-12 18:40:40,145 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 5 new quantified variables, introduced 1 case distinctions, treesize of input 81 treesize of output 56 [2022-07-12 18:40:40,347 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 18:40:40,347 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 113 treesize of output 98 [2022-07-12 18:40:40,350 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 52 [2022-07-12 18:40:40,373 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 18:40:40,373 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 104 treesize of output 91 [2022-07-12 18:40:40,376 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 52 [2022-07-12 18:40:40,685 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 45 [2022-07-12 18:40:40,822 INFO L356 Elim1Store]: treesize reduction 16, result has 5.9 percent of original size [2022-07-12 18:40:40,822 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 6 select indices, 6 select index equivalence classes, 2 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 2 case distinctions, treesize of input 63 treesize of output 54 [2022-07-12 18:40:41,001 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 2 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 16 [2022-07-12 18:40:41,011 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:40:41,012 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-12 18:40:41,241 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1838 (Array Int Int)) (v_ArrVal_1837 (Array Int Int))) (let ((.cse1 (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem10#1.base| v_ArrVal_1837))) (let ((.cse0 (select (select .cse1 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (or (not (= .cse0 0)) (= (select (select .cse1 (select (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem10#1.base| v_ArrVal_1838) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|)) .cse0) 0))))) is different from false [2022-07-12 18:40:41,250 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1835 (Array Int Int)) (v_ArrVal_1838 (Array Int Int)) (v_ArrVal_1837 (Array Int Int)) (v_ArrVal_1836 (Array Int Int))) (let ((.cse0 (store (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem11#1.base| v_ArrVal_1836) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem10#1.base| v_ArrVal_1837))) (let ((.cse1 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (or (= (select (select .cse0 (select (select (store (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem11#1.base| v_ArrVal_1835) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem10#1.base| v_ArrVal_1838) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|)) .cse1) 0) (not (= .cse1 0)))))) is different from false [2022-07-12 18:40:41,256 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1835 (Array Int Int)) (v_ArrVal_1838 (Array Int Int)) (v_ArrVal_1837 (Array Int Int)) (v_ArrVal_1836 (Array Int Int))) (let ((.cse2 (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)))) (let ((.cse1 (store (store |c_#memory_$Pointer$.offset| .cse2 v_ArrVal_1836) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem10#1.base| v_ArrVal_1837))) (let ((.cse0 (select (select .cse1 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (or (not (= .cse0 0)) (= (select (select .cse1 (select (select (store (store |c_#memory_$Pointer$.base| .cse2 v_ArrVal_1835) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem10#1.base| v_ArrVal_1838) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|)) .cse0) 0)))))) is different from false [2022-07-12 18:40:41,262 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1838 (Array Int Int)) (v_ArrVal_1837 (Array Int Int))) (let ((.cse2 (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)))) (let ((.cse1 (store |c_#memory_$Pointer$.offset| .cse2 v_ArrVal_1837))) (let ((.cse0 (select (select .cse1 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (or (not (= .cse0 0)) (= 0 (select (select .cse1 (select (select (store |c_#memory_$Pointer$.base| .cse2 v_ArrVal_1838) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|)) .cse0))))))) is different from false [2022-07-12 18:40:41,336 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1832 (Array Int Int)) (v_ArrVal_1831 (Array Int Int)) (v_ArrVal_1838 (Array Int Int)) (v_ArrVal_1837 (Array Int Int))) (let ((.cse1 (store (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.base| v_ArrVal_1831) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| v_ArrVal_1832))) (let ((.cse2 (select (select .cse1 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)))) (let ((.cse0 (store (let ((.cse4 (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.base| (store (select |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.offset| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.offset|)))) (store .cse4 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| (store (select .cse4 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.offset| 4) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.offset|))) .cse2 v_ArrVal_1837))) (let ((.cse3 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (or (= (select (select .cse0 (select (select (store .cse1 .cse2 v_ArrVal_1838) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|)) .cse3) 0) (not (= .cse3 0)))))))) is different from false [2022-07-12 18:40:41,426 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1832 (Array Int Int)) (v_ArrVal_1831 (Array Int Int)) (v_ArrVal_1838 (Array Int Int)) (v_ArrVal_1837 (Array Int Int))) (let ((.cse6 (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (let ((.cse2 (store (store |c_#memory_$Pointer$.base| .cse6 v_ArrVal_1831) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| v_ArrVal_1832)) (.cse8 (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4))) (let ((.cse3 (select (select .cse2 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse8))) (let ((.cse1 (store (let ((.cse7 (select |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) (let ((.cse5 (select .cse7 .cse8))) (let ((.cse4 (store |c_#memory_$Pointer$.offset| .cse6 (store (select |c_#memory_$Pointer$.offset| .cse6) (select .cse7 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|) .cse5)))) (store .cse4 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| (store (select .cse4 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.offset| 4) .cse5))))) .cse3 v_ArrVal_1837))) (let ((.cse0 (select (select .cse1 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (or (not (= .cse0 0)) (= (select (select .cse1 (select (select (store .cse2 .cse3 v_ArrVal_1838) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|)) .cse0) 0)))))))) is different from false [2022-07-12 18:40:41,660 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_create_sl_with_head_and_tail_#t~malloc6#1.base_18| Int) (v_ArrVal_1832 (Array Int Int)) (v_ArrVal_1838 (Array Int Int)) (v_ArrVal_1837 (Array Int Int))) (let ((.cse9 (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) (let ((.cse8 (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) (.cse5 (select .cse9 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (let ((.cse1 (store (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base| (store .cse9 .cse8 |v_ULTIMATE.start_create_sl_with_head_and_tail_#t~malloc6#1.base_18|)) .cse5 v_ArrVal_1832))) (let ((.cse2 (select (select .cse1 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse8))) (let ((.cse0 (store (let ((.cse7 (select |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) (let ((.cse4 (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base| (store .cse7 .cse8 0)))) (store .cse4 .cse5 (let ((.cse6 (select .cse7 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (store (store (select .cse4 .cse5) .cse6 0) (+ .cse6 4) 0))))) .cse2 v_ArrVal_1837))) (let ((.cse3 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (or (not (= (select |c_#valid| |v_ULTIMATE.start_create_sl_with_head_and_tail_#t~malloc6#1.base_18|) 0)) (= (select (select .cse0 (select (select (store .cse1 .cse2 v_ArrVal_1838) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|)) .cse3) 0) (not (= .cse3 0)))))))))) is different from false [2022-07-12 18:40:41,685 INFO L356 Elim1Store]: treesize reduction 21, result has 47.5 percent of original size [2022-07-12 18:40:41,685 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 257 treesize of output 210 [2022-07-12 18:40:41,691 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:41,744 INFO L356 Elim1Store]: treesize reduction 142, result has 29.0 percent of original size [2022-07-12 18:40:41,744 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 4 case distinctions, treesize of input 192 treesize of output 132 [2022-07-12 18:40:41,749 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:41,749 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 408 treesize of output 312 [2022-07-12 18:40:41,753 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:42,101 INFO L356 Elim1Store]: treesize reduction 282, result has 52.4 percent of original size [2022-07-12 18:40:42,102 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 10 select indices, 10 select index equivalence classes, 0 disjoint index pairs (out of 45 index pairs), introduced 11 new quantified variables, introduced 45 case distinctions, treesize of input 727 treesize of output 875 [2022-07-12 18:40:42,136 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:42,138 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 628 treesize of output 480 [2022-07-12 18:40:42,155 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 458 treesize of output 418 [2022-07-12 18:40:42,190 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:40:42,191 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 504 treesize of output 476 [2022-07-12 18:40:47,836 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:40:47,836 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1101633116] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-12 18:40:47,836 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-12 18:40:47,836 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 23, 25] total 63 [2022-07-12 18:40:47,836 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1827935574] [2022-07-12 18:40:47,836 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-12 18:40:47,837 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 64 states [2022-07-12 18:40:47,837 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:40:47,837 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2022-07-12 18:40:47,837 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=272, Invalid=2917, Unknown=31, NotChecked=812, Total=4032 [2022-07-12 18:40:47,838 INFO L87 Difference]: Start difference. First operand 135 states and 146 transitions. Second operand has 64 states, 63 states have (on average 1.5873015873015872) internal successors, (100), 64 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:40:49,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:40:49,530 INFO L93 Difference]: Finished difference Result 142 states and 153 transitions. [2022-07-12 18:40:49,531 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2022-07-12 18:40:49,531 INFO L78 Accepts]: Start accepts. Automaton has has 64 states, 63 states have (on average 1.5873015873015872) internal successors, (100), 64 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 41 [2022-07-12 18:40:49,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:40:49,531 INFO L225 Difference]: With dead ends: 142 [2022-07-12 18:40:49,532 INFO L226 Difference]: Without dead ends: 142 [2022-07-12 18:40:49,532 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 44 SyntacticMatches, 5 SemanticMatches, 79 ConstructedPredicates, 7 IntricatePredicates, 0 DeprecatedPredicates, 1442 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=526, Invalid=4873, Unknown=31, NotChecked=1050, Total=6480 [2022-07-12 18:40:49,532 INFO L413 NwaCegarLoop]: 59 mSDtfsCounter, 169 mSDsluCounter, 1733 mSDsCounter, 0 mSdLazyCounter, 774 mSolverCounterSat, 35 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 169 SdHoareTripleChecker+Valid, 1792 SdHoareTripleChecker+Invalid, 1508 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 35 IncrementalHoareTripleChecker+Valid, 774 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 699 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-07-12 18:40:49,533 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [169 Valid, 1792 Invalid, 1508 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [35 Valid, 774 Invalid, 0 Unknown, 699 Unchecked, 0.4s Time] [2022-07-12 18:40:49,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2022-07-12 18:40:49,535 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 138. [2022-07-12 18:40:49,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 138 states, 121 states have (on average 1.2314049586776858) internal successors, (149), 137 states have internal predecessors, (149), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:40:49,535 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 149 transitions. [2022-07-12 18:40:49,536 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 149 transitions. Word has length 41 [2022-07-12 18:40:49,536 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:40:49,536 INFO L495 AbstractCegarLoop]: Abstraction has 138 states and 149 transitions. [2022-07-12 18:40:49,536 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 64 states, 63 states have (on average 1.5873015873015872) internal successors, (100), 64 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:40:49,536 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 149 transitions. [2022-07-12 18:40:49,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2022-07-12 18:40:49,537 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:40:49,537 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:40:49,558 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-07-12 18:40:49,751 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 18:40:49,752 INFO L420 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr59ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:40:49,752 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:40:49,752 INFO L85 PathProgramCache]: Analyzing trace with hash -1108909220, now seen corresponding path program 1 times [2022-07-12 18:40:49,752 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:40:49,752 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [844293028] [2022-07-12 18:40:49,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:40:49,752 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:40:49,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:40:50,266 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:40:50,267 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:40:50,267 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [844293028] [2022-07-12 18:40:50,267 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [844293028] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 18:40:50,267 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [701048946] [2022-07-12 18:40:50,267 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:40:50,267 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 18:40:50,267 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-12 18:40:50,268 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-12 18:40:50,269 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-07-12 18:40:50,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:40:50,436 INFO L263 TraceCheckSpWp]: Trace formula consists of 334 conjuncts, 88 conjunts are in the unsatisfiable core [2022-07-12 18:40:50,445 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 18:40:50,467 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 18:40:50,468 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 18 [2022-07-12 18:40:50,504 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 18:40:50,507 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 18:40:50,553 INFO L356 Elim1Store]: treesize reduction 8, result has 61.9 percent of original size [2022-07-12 18:40:50,553 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 20 treesize of output 22 [2022-07-12 18:40:50,593 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:50,594 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-07-12 18:40:50,598 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:50,599 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 25 [2022-07-12 18:40:50,706 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 10 [2022-07-12 18:40:50,823 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:50,829 INFO L356 Elim1Store]: treesize reduction 17, result has 29.2 percent of original size [2022-07-12 18:40:50,829 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 77 treesize of output 48 [2022-07-12 18:40:50,889 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:50,897 INFO L356 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2022-07-12 18:40:50,897 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 4 case distinctions, treesize of input 86 treesize of output 52 [2022-07-12 18:40:51,107 INFO L356 Elim1Store]: treesize reduction 36, result has 23.4 percent of original size [2022-07-12 18:40:51,107 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 91 treesize of output 76 [2022-07-12 18:40:51,140 INFO L356 Elim1Store]: treesize reduction 36, result has 23.4 percent of original size [2022-07-12 18:40:51,140 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 82 treesize of output 69 [2022-07-12 18:40:51,448 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-07-12 18:40:51,587 INFO L356 Elim1Store]: treesize reduction 120, result has 15.5 percent of original size [2022-07-12 18:40:51,588 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 6 select indices, 6 select index equivalence classes, 1 disjoint index pairs (out of 15 index pairs), introduced 8 new quantified variables, introduced 17 case distinctions, treesize of input 84 treesize of output 76 [2022-07-12 18:40:51,783 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 2 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 24 [2022-07-12 18:40:51,817 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:40:51,818 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-12 18:40:51,956 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2022-07-12 18:40:51,971 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1969 (Array Int Int))) (<= (+ (select (let ((.cse0 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem10#1.base| v_ArrVal_1969))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) 0) 1) |c_#StackHeapBarrier|)) is different from false [2022-07-12 18:40:51,975 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1969 (Array Int Int)) (v_ArrVal_1968 (Array Int Int))) (<= (+ (select (let ((.cse0 (store (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem11#1.base| v_ArrVal_1968) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem10#1.base| v_ArrVal_1969))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) 0) 1) |c_#StackHeapBarrier|)) is different from false [2022-07-12 18:40:51,979 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1969 (Array Int Int)) (v_ArrVal_1968 (Array Int Int))) (<= (+ (select (let ((.cse0 (store (store |c_#memory_$Pointer$.base| (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) v_ArrVal_1968) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem10#1.base| v_ArrVal_1969))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) 0) 1) |c_#StackHeapBarrier|)) is different from false [2022-07-12 18:40:51,985 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1969 (Array Int Int))) (<= (+ (select (let ((.cse0 (store |c_#memory_$Pointer$.base| (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) v_ArrVal_1969))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) 0) 1) |c_#StackHeapBarrier|)) is different from false [2022-07-12 18:40:51,993 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1969 (Array Int Int))) (<= (+ (select (let ((.cse0 (let ((.cse1 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| (store (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.offset| 4) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base|)))) (store .cse1 (select (select .cse1 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) v_ArrVal_1969)))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) 0) 1) |c_#StackHeapBarrier|)) is different from false [2022-07-12 18:40:51,998 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1969 (Array Int Int))) (<= (+ (select (let ((.cse0 (let ((.cse1 (let ((.cse2 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.base| (store (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.offset| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base|)))) (store .cse2 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| (store (select .cse2 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.offset| 4) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base|))))) (store .cse1 (select (select .cse1 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) v_ArrVal_1969)))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) 0) 1) |c_#StackHeapBarrier|)) is different from false [2022-07-12 18:40:52,009 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base_22| Int)) (or (forall ((v_ArrVal_1969 (Array Int Int))) (<= (+ (select (let ((.cse0 (let ((.cse1 (let ((.cse2 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.base| (store (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.offset| |v_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base_22|)))) (store .cse2 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| (store (select .cse2 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.offset| 4) |v_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base_22|))))) (store .cse1 (select (select .cse1 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) v_ArrVal_1969)))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) 0) 1) |c_#StackHeapBarrier|)) (not (<= |v_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base_22| (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)))))) is different from false [2022-07-12 18:40:52,017 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base_22| Int) (v_ArrVal_1969 (Array Int Int))) (let ((.cse1 (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) (.cse0 (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) (or (not (<= |v_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base_22| (select .cse0 .cse1))) (<= (+ (select (let ((.cse2 (let ((.cse3 (let ((.cse4 (let ((.cse5 (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (store |c_#memory_$Pointer$.base| .cse5 (store (select |c_#memory_$Pointer$.base| .cse5) (select (select |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|) |v_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base_22|))))) (store .cse4 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| (store (select .cse4 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.offset| 4) |v_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base_22|))))) (store .cse3 (select (select .cse3 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse1) v_ArrVal_1969)))) (select .cse2 (select (select .cse2 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) 0) 1) |c_#StackHeapBarrier|)))) is different from false [2022-07-12 18:40:52,026 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base_22| Int) (v_ArrVal_1969 (Array Int Int))) (let ((.cse1 (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) (.cse0 (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) (or (not (<= |v_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base_22| (select .cse0 .cse1))) (<= (+ (select (let ((.cse2 (let ((.cse3 (let ((.cse4 (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (store |c_#memory_$Pointer$.base| .cse4 (let ((.cse5 (select (select |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (store (store (select |c_#memory_$Pointer$.base| .cse4) .cse5 |v_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base_22|) (+ .cse5 4) |v_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base_22|)))))) (store .cse3 (select (select .cse3 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse1) v_ArrVal_1969)))) (select .cse2 (select (select .cse2 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) 0) 1) |c_#StackHeapBarrier|)))) is different from false [2022-07-12 18:40:52,042 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base_22| Int) (v_ArrVal_1969 (Array Int Int))) (or (<= (+ (select (let ((.cse0 (let ((.cse2 (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4))) (let ((.cse1 (let ((.cse6 (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) (let ((.cse3 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base| (store .cse6 .cse2 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~malloc6#1.base|))) (.cse4 (select .cse6 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (store .cse3 .cse4 (let ((.cse5 (select (select |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (store (store (select .cse3 .cse4) .cse5 |v_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base_22|) (+ .cse5 4) |v_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base_22|))))))) (store .cse1 (select (select .cse1 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse2) v_ArrVal_1969))))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) 0) 1) |c_#StackHeapBarrier|) (not (<= |v_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base_22| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~malloc6#1.base|)))) is different from false [2022-07-12 18:40:52,238 INFO L356 Elim1Store]: treesize reduction 161, result has 32.9 percent of original size [2022-07-12 18:40:52,238 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 4 case distinctions, treesize of input 454 treesize of output 220 [2022-07-12 18:40:52,247 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:40:52,372 INFO L356 Elim1Store]: treesize reduction 39, result has 79.1 percent of original size [2022-07-12 18:40:52,373 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 6 select indices, 6 select index equivalence classes, 0 disjoint index pairs (out of 15 index pairs), introduced 7 new quantified variables, introduced 15 case distinctions, treesize of input 621 treesize of output 484 [2022-07-12 18:40:52,390 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:40:52,391 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 326 treesize of output 306 [2022-07-12 18:40:56,744 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:40:56,745 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [701048946] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-12 18:40:56,745 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-12 18:40:56,745 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 23, 25] total 59 [2022-07-12 18:40:56,745 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [587493331] [2022-07-12 18:40:56,745 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-12 18:40:56,745 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 60 states [2022-07-12 18:40:56,746 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:40:56,746 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2022-07-12 18:40:56,746 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=184, Invalid=2292, Unknown=14, NotChecked=1050, Total=3540 [2022-07-12 18:40:56,747 INFO L87 Difference]: Start difference. First operand 138 states and 149 transitions. Second operand has 60 states, 59 states have (on average 1.5932203389830508) internal successors, (94), 60 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:40:58,905 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:40:58,905 INFO L93 Difference]: Finished difference Result 152 states and 163 transitions. [2022-07-12 18:40:58,905 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2022-07-12 18:40:58,905 INFO L78 Accepts]: Start accepts. Automaton has has 60 states, 59 states have (on average 1.5932203389830508) internal successors, (94), 60 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 42 [2022-07-12 18:40:58,905 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:40:58,906 INFO L225 Difference]: With dead ends: 152 [2022-07-12 18:40:58,906 INFO L226 Difference]: Without dead ends: 152 [2022-07-12 18:40:58,906 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 129 GetRequests, 47 SyntacticMatches, 6 SemanticMatches, 76 ConstructedPredicates, 10 IntricatePredicates, 0 DeprecatedPredicates, 1146 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=425, Invalid=4157, Unknown=14, NotChecked=1410, Total=6006 [2022-07-12 18:40:58,907 INFO L413 NwaCegarLoop]: 66 mSDtfsCounter, 184 mSDsluCounter, 1926 mSDsCounter, 0 mSdLazyCounter, 1188 mSolverCounterSat, 44 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 184 SdHoareTripleChecker+Valid, 1992 SdHoareTripleChecker+Invalid, 2230 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 44 IncrementalHoareTripleChecker+Valid, 1188 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 998 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-07-12 18:40:58,907 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [184 Valid, 1992 Invalid, 2230 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [44 Valid, 1188 Invalid, 0 Unknown, 998 Unchecked, 0.6s Time] [2022-07-12 18:40:58,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2022-07-12 18:40:58,909 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 139. [2022-07-12 18:40:58,909 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 139 states, 122 states have (on average 1.2295081967213115) internal successors, (150), 138 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:40:58,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 150 transitions. [2022-07-12 18:40:58,909 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 150 transitions. Word has length 42 [2022-07-12 18:40:58,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:40:58,910 INFO L495 AbstractCegarLoop]: Abstraction has 139 states and 150 transitions. [2022-07-12 18:40:58,910 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 60 states, 59 states have (on average 1.5932203389830508) internal successors, (94), 60 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:40:58,910 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 150 transitions. [2022-07-12 18:40:58,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-07-12 18:40:58,910 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:40:58,911 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:40:58,935 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-07-12 18:40:59,131 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 18:40:59,132 INFO L420 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr48REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:40:59,132 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:40:59,132 INFO L85 PathProgramCache]: Analyzing trace with hash -509864349, now seen corresponding path program 2 times [2022-07-12 18:40:59,132 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:40:59,132 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [834899014] [2022-07-12 18:40:59,132 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:40:59,132 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:40:59,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:40:59,624 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:40:59,625 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:40:59,625 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [834899014] [2022-07-12 18:40:59,625 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [834899014] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 18:40:59,625 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [873228462] [2022-07-12 18:40:59,625 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-07-12 18:40:59,625 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 18:40:59,625 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-12 18:40:59,626 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-12 18:40:59,628 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-07-12 18:40:59,841 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-07-12 18:40:59,841 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-07-12 18:40:59,844 INFO L263 TraceCheckSpWp]: Trace formula consists of 339 conjuncts, 105 conjunts are in the unsatisfiable core [2022-07-12 18:40:59,848 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 18:40:59,857 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 18:40:59,858 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 18 [2022-07-12 18:40:59,887 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 18:40:59,891 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 18:40:59,934 INFO L356 Elim1Store]: treesize reduction 8, result has 61.9 percent of original size [2022-07-12 18:40:59,934 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 20 treesize of output 22 [2022-07-12 18:40:59,967 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:59,968 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 25 [2022-07-12 18:40:59,974 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:40:59,975 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-07-12 18:41:00,065 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 10 [2022-07-12 18:41:00,159 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:41:00,164 INFO L356 Elim1Store]: treesize reduction 17, result has 29.2 percent of original size [2022-07-12 18:41:00,165 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 65 treesize of output 42 [2022-07-12 18:41:00,209 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:41:00,215 INFO L356 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2022-07-12 18:41:00,216 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 4 case distinctions, treesize of input 61 treesize of output 45 [2022-07-12 18:41:00,347 INFO L356 Elim1Store]: treesize reduction 36, result has 23.4 percent of original size [2022-07-12 18:41:00,347 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 67 treesize of output 58 [2022-07-12 18:41:00,367 INFO L356 Elim1Store]: treesize reduction 36, result has 23.4 percent of original size [2022-07-12 18:41:00,367 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 58 treesize of output 51 [2022-07-12 18:41:00,587 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-07-12 18:41:00,697 INFO L356 Elim1Store]: treesize reduction 100, result has 18.0 percent of original size [2022-07-12 18:41:00,697 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 5 select indices, 5 select index equivalence classes, 1 disjoint index pairs (out of 10 index pairs), introduced 7 new quantified variables, introduced 12 case distinctions, treesize of input 63 treesize of output 60 [2022-07-12 18:41:01,024 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2022-07-12 18:41:01,027 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 18 [2022-07-12 18:41:01,043 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2022-07-12 18:41:01,045 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:41:01,045 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-12 18:41:01,216 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2022-07-12 18:41:01,219 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2022-07-12 18:41:01,344 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 17 [2022-07-12 18:41:01,354 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2102 (Array Int Int))) (not (= |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base| (select (let ((.cse0 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem10#1.base| v_ArrVal_2102))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) 0)))) is different from false [2022-07-12 18:41:01,358 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2102 (Array Int Int)) (v_ArrVal_2101 (Array Int Int))) (not (= (select (let ((.cse0 (store (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem11#1.base| v_ArrVal_2101) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem10#1.base| v_ArrVal_2102))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) 0) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) is different from false [2022-07-12 18:41:01,363 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2102 (Array Int Int)) (v_ArrVal_2101 (Array Int Int))) (not (= (select (let ((.cse0 (store (store |c_#memory_$Pointer$.base| (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) v_ArrVal_2101) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem10#1.base| v_ArrVal_2102))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) 0) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) is different from false [2022-07-12 18:41:01,366 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2102 (Array Int Int))) (not (= (select (let ((.cse0 (store |c_#memory_$Pointer$.base| (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) v_ArrVal_2102))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) 0) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) is different from false [2022-07-12 18:41:01,372 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2099 Int) (v_ArrVal_2102 (Array Int Int))) (not (= (select (let ((.cse0 (let ((.cse1 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| (store (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.offset| 4) v_ArrVal_2099)))) (store .cse1 (select (select .cse1 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) v_ArrVal_2102)))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) 0) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) is different from false [2022-07-12 18:41:01,377 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2099 Int) (v_ArrVal_2102 (Array Int Int))) (not (= |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base| (select (let ((.cse0 (let ((.cse1 (let ((.cse2 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.base| (store (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.offset| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base|)))) (store .cse2 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| (store (select .cse2 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.offset| 4) v_ArrVal_2099))))) (store .cse1 (select (select .cse1 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) v_ArrVal_2102)))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) 0)))) is different from false [2022-07-12 18:41:01,795 INFO L356 Elim1Store]: treesize reduction 172, result has 28.3 percent of original size [2022-07-12 18:41:01,795 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 4 case distinctions, treesize of input 218 treesize of output 130 [2022-07-12 18:41:01,899 INFO L356 Elim1Store]: treesize reduction 67, result has 64.2 percent of original size [2022-07-12 18:41:01,899 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 6 select indices, 6 select index equivalence classes, 0 disjoint index pairs (out of 15 index pairs), introduced 7 new quantified variables, introduced 15 case distinctions, treesize of input 362 treesize of output 323 [2022-07-12 18:41:01,913 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:41:01,913 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 206 treesize of output 194 [2022-07-12 18:41:03,350 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:41:03,350 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [873228462] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-12 18:41:03,351 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-12 18:41:03,351 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 26, 29] total 68 [2022-07-12 18:41:03,351 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1975498762] [2022-07-12 18:41:03,351 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-12 18:41:03,351 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 69 states [2022-07-12 18:41:03,351 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:41:03,352 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 69 interpolants. [2022-07-12 18:41:03,352 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=268, Invalid=3646, Unknown=16, NotChecked=762, Total=4692 [2022-07-12 18:41:03,352 INFO L87 Difference]: Start difference. First operand 139 states and 150 transitions. Second operand has 69 states, 68 states have (on average 1.6029411764705883) internal successors, (109), 69 states have internal predecessors, (109), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:41:05,197 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:41:05,197 INFO L93 Difference]: Finished difference Result 145 states and 156 transitions. [2022-07-12 18:41:05,197 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2022-07-12 18:41:05,198 INFO L78 Accepts]: Start accepts. Automaton has has 69 states, 68 states have (on average 1.6029411764705883) internal successors, (109), 69 states have internal predecessors, (109), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2022-07-12 18:41:05,198 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:41:05,198 INFO L225 Difference]: With dead ends: 145 [2022-07-12 18:41:05,198 INFO L226 Difference]: Without dead ends: 145 [2022-07-12 18:41:05,199 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 47 SyntacticMatches, 4 SemanticMatches, 90 ConstructedPredicates, 6 IntricatePredicates, 0 DeprecatedPredicates, 1937 ImplicationChecksByTransitivity, 3.2s TimeCoverageRelationStatistics Valid=693, Invalid=6625, Unknown=16, NotChecked=1038, Total=8372 [2022-07-12 18:41:05,199 INFO L413 NwaCegarLoop]: 56 mSDtfsCounter, 248 mSDsluCounter, 1717 mSDsCounter, 0 mSdLazyCounter, 831 mSolverCounterSat, 70 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 248 SdHoareTripleChecker+Valid, 1773 SdHoareTripleChecker+Invalid, 1587 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 70 IncrementalHoareTripleChecker+Valid, 831 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 686 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-07-12 18:41:05,199 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [248 Valid, 1773 Invalid, 1587 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [70 Valid, 831 Invalid, 0 Unknown, 686 Unchecked, 0.4s Time] [2022-07-12 18:41:05,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2022-07-12 18:41:05,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 140. [2022-07-12 18:41:05,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 140 states, 123 states have (on average 1.2276422764227641) internal successors, (151), 139 states have internal predecessors, (151), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:41:05,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 151 transitions. [2022-07-12 18:41:05,202 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 151 transitions. Word has length 44 [2022-07-12 18:41:05,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:41:05,202 INFO L495 AbstractCegarLoop]: Abstraction has 140 states and 151 transitions. [2022-07-12 18:41:05,202 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 69 states, 68 states have (on average 1.6029411764705883) internal successors, (109), 69 states have internal predecessors, (109), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:41:05,203 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 151 transitions. [2022-07-12 18:41:05,203 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2022-07-12 18:41:05,203 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:41:05,203 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:41:05,228 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-07-12 18:41:05,419 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable37 [2022-07-12 18:41:05,419 INFO L420 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr24REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:41:05,420 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:41:05,420 INFO L85 PathProgramCache]: Analyzing trace with hash -81877473, now seen corresponding path program 1 times [2022-07-12 18:41:05,420 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:41:05,420 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [636065551] [2022-07-12 18:41:05,420 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:41:05,420 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:41:05,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:41:05,867 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:41:05,867 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:41:05,868 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [636065551] [2022-07-12 18:41:05,868 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [636065551] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 18:41:05,868 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1511263171] [2022-07-12 18:41:05,868 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:41:05,868 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 18:41:05,869 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-12 18:41:05,870 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-12 18:41:05,870 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-07-12 18:41:06,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:41:06,048 INFO L263 TraceCheckSpWp]: Trace formula consists of 351 conjuncts, 75 conjunts are in the unsatisfiable core [2022-07-12 18:41:06,050 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 18:41:06,052 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-07-12 18:41:06,073 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 18:41:06,100 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-07-12 18:41:06,100 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-07-12 18:41:06,123 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:41:06,124 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2022-07-12 18:41:06,240 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 18:41:06,240 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 35 [2022-07-12 18:41:06,254 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 18:41:06,255 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 29 treesize of output 30 [2022-07-12 18:41:06,361 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 18:41:06,361 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 39 [2022-07-12 18:41:06,380 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 18:41:06,380 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 32 [2022-07-12 18:41:06,731 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-07-12 18:41:06,731 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-07-12 18:41:06,838 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 28 [2022-07-12 18:41:06,898 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 18:41:06,898 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 35 [2022-07-12 18:41:07,000 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:41:07,001 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 17 [2022-07-12 18:41:07,005 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:41:07,005 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-12 18:41:07,020 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2231 (Array Int Int))) (= (select |c_#valid| (select (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sl_random_insert_~a1~0#1.base| v_ArrVal_2231) |c_ULTIMATE.start_main_~sl~1#1.base|) |c_ULTIMATE.start_main_~sl~1#1.offset|)) 1)) is different from false [2022-07-12 18:41:07,125 INFO L356 Elim1Store]: treesize reduction 5, result has 72.2 percent of original size [2022-07-12 18:41:07,125 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 21 [2022-07-12 18:41:07,130 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2231 (Array Int Int)) (v_ArrVal_2230 (Array Int Int))) (= (select (select (store (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sl_random_insert_~new~0#1.base| v_ArrVal_2230) |c_ULTIMATE.start_sl_random_insert_~a1~0#1.base| v_ArrVal_2231) |c_ULTIMATE.start_main_~sl~1#1.base|) |c_ULTIMATE.start_main_~sl~1#1.offset|) |c_ULTIMATE.start_sl_random_insert_~a1~0#1.base|)) is different from false [2022-07-12 18:41:07,202 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13| Int) (v_ArrVal_2231 (Array Int Int)) (v_ArrVal_2230 (Array Int Int))) (or (= (select (select (store (store |c_#memory_$Pointer$.base| |v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13| v_ArrVal_2230) |c_ULTIMATE.start_sl_random_insert_~a2~0#1.base| v_ArrVal_2231) |c_ULTIMATE.start_main_~sl~1#1.base|) |c_ULTIMATE.start_main_~sl~1#1.offset|) |c_ULTIMATE.start_sl_random_insert_~a2~0#1.base|) (not (= (select |c_#valid| |v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13|) 0)))) is different from false [2022-07-12 18:41:07,229 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13| Int) (v_ArrVal_2231 (Array Int Int)) (v_ArrVal_2230 (Array Int Int))) (or (= |c_ULTIMATE.start_sl_random_insert_#t~mem12#1.base| (select (select (store (store |c_#memory_$Pointer$.base| |v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13| v_ArrVal_2230) |c_ULTIMATE.start_sl_random_insert_#t~mem12#1.base| v_ArrVal_2231) |c_ULTIMATE.start_main_~sl~1#1.base|) |c_ULTIMATE.start_main_~sl~1#1.offset|)) (not (= (select |c_#valid| |v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13|) 0)))) is different from false [2022-07-12 18:41:07,236 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13| Int) (v_ArrVal_2231 (Array Int Int)) (v_ArrVal_2230 (Array Int Int))) (or (let ((.cse0 (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sl_random_insert_~sl#1.base|) |c_ULTIMATE.start_sl_random_insert_~sl#1.offset|))) (= (select (select (store (store |c_#memory_$Pointer$.base| |v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13| v_ArrVal_2230) .cse0 v_ArrVal_2231) |c_ULTIMATE.start_main_~sl~1#1.base|) |c_ULTIMATE.start_main_~sl~1#1.offset|) .cse0)) (not (= (select |c_#valid| |v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13|) 0)))) is different from false [2022-07-12 18:41:07,243 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13| Int) (v_ArrVal_2231 (Array Int Int)) (v_ArrVal_2230 (Array Int Int))) (or (let ((.cse0 (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~sl~1#1.base|) |c_ULTIMATE.start_main_~sl~1#1.offset|))) (= (select (select (store (store |c_#memory_$Pointer$.base| |v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13| v_ArrVal_2230) .cse0 v_ArrVal_2231) |c_ULTIMATE.start_main_~sl~1#1.base|) |c_ULTIMATE.start_main_~sl~1#1.offset|) .cse0)) (not (= (select |c_#valid| |v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13|) 0)))) is different from false [2022-07-12 18:41:07,254 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13| Int) (v_ArrVal_2231 (Array Int Int)) (v_ArrVal_2230 (Array Int Int))) (or (let ((.cse0 (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#res#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_#res#1.offset|))) (= .cse0 (select (select (store (store |c_#memory_$Pointer$.base| |v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13| v_ArrVal_2230) .cse0 v_ArrVal_2231) |c_ULTIMATE.start_create_sl_with_head_and_tail_#res#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_#res#1.offset|))) (not (= (select |c_#valid| |v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13|) 0)))) is different from false [2022-07-12 18:41:07,262 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13| Int) (v_ArrVal_2231 (Array Int Int)) (v_ArrVal_2230 (Array Int Int))) (or (let ((.cse0 (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (= (select (select (store (store |c_#memory_$Pointer$.base| |v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13| v_ArrVal_2230) .cse0 v_ArrVal_2231) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|) .cse0)) (not (= (select |c_#valid| |v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13|) 0)))) is different from false [2022-07-12 18:41:07,269 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2229 (Array Int Int)) (|v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13| Int) (v_ArrVal_2231 (Array Int Int)) (v_ArrVal_2230 (Array Int Int))) (or (let ((.cse0 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem10#1.base| v_ArrVal_2229))) (let ((.cse1 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (= (select (select (store (store .cse0 |v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13| v_ArrVal_2230) .cse1 v_ArrVal_2231) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|) .cse1))) (not (= (select |c_#valid| |v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13|) 0)))) is different from false [2022-07-12 18:41:07,278 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2229 (Array Int Int)) (v_ArrVal_2228 (Array Int Int)) (|v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13| Int) (v_ArrVal_2231 (Array Int Int)) (v_ArrVal_2230 (Array Int Int))) (or (let ((.cse1 (store (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem11#1.base| v_ArrVal_2228) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem10#1.base| v_ArrVal_2229))) (let ((.cse0 (select (select .cse1 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (= .cse0 (select (select (store (store .cse1 |v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13| v_ArrVal_2230) .cse0 v_ArrVal_2231) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|)))) (not (= (select |c_#valid| |v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13|) 0)))) is different from false [2022-07-12 18:41:07,402 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2229 (Array Int Int)) (v_ArrVal_2227 (Array Int Int)) (v_ArrVal_2226 (Array Int Int)) (|v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13| Int) (v_ArrVal_2231 (Array Int Int)) (v_ArrVal_2230 (Array Int Int))) (or (let ((.cse0 (let ((.cse2 (store (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.base| v_ArrVal_2226) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| v_ArrVal_2227))) (store .cse2 (select (select .cse2 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) v_ArrVal_2229)))) (let ((.cse1 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (= (select (select (store (store .cse0 |v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13| v_ArrVal_2230) .cse1 v_ArrVal_2231) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|) .cse1))) (not (= (select |c_#valid| |v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13|) 0)))) is different from false [2022-07-12 18:41:07,414 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2229 (Array Int Int)) (v_ArrVal_2227 (Array Int Int)) (v_ArrVal_2226 (Array Int Int)) (|v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13| Int) (v_ArrVal_2231 (Array Int Int)) (v_ArrVal_2230 (Array Int Int))) (or (let ((.cse1 (let ((.cse2 (store (store |c_#memory_$Pointer$.base| (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|) v_ArrVal_2226) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| v_ArrVal_2227))) (store .cse2 (select (select .cse2 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) v_ArrVal_2229)))) (let ((.cse0 (select (select .cse1 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (= .cse0 (select (select (store (store .cse1 |v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13| v_ArrVal_2230) .cse0 v_ArrVal_2231) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|)))) (not (= (select |c_#valid| |v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13|) 0)))) is different from false [2022-07-12 18:41:07,472 INFO L356 Elim1Store]: treesize reduction 5, result has 37.5 percent of original size [2022-07-12 18:41:07,472 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 12 [2022-07-12 18:41:07,480 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2229 (Array Int Int)) (v_ArrVal_2227 (Array Int Int)) (|v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13| Int) (v_ArrVal_2231 (Array Int Int)) (v_ArrVal_2230 (Array Int Int))) (or (= |v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (let ((.cse1 (let ((.cse3 (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4))) (let ((.cse2 (let ((.cse4 (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) (store (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base| (store .cse4 .cse3 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~malloc6#1.base|)) (select .cse4 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|) v_ArrVal_2227)))) (store .cse2 (select (select .cse2 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse3) v_ArrVal_2229))))) (let ((.cse0 (select (select .cse1 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (= .cse0 (select (select (store (store .cse1 |v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13| v_ArrVal_2230) .cse0 v_ArrVal_2231) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|)))))) is different from false [2022-07-12 18:41:07,554 INFO L356 Elim1Store]: treesize reduction 21, result has 47.5 percent of original size [2022-07-12 18:41:07,554 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 144 treesize of output 85 [2022-07-12 18:41:07,557 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-12 18:41:07,564 INFO L356 Elim1Store]: treesize reduction 9, result has 10.0 percent of original size [2022-07-12 18:41:07,565 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 4582 treesize of output 3676 [2022-07-12 18:41:07,735 INFO L356 Elim1Store]: treesize reduction 9, result has 10.0 percent of original size [2022-07-12 18:41:07,736 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 3256 treesize of output 2728 [2022-07-12 18:41:07,747 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 2728 treesize of output 2664 [2022-07-12 18:41:07,772 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 2664 treesize of output 2552 [2022-07-12 18:41:07,797 INFO L356 Elim1Store]: treesize reduction 5, result has 37.5 percent of original size [2022-07-12 18:41:07,797 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 12 [2022-07-12 18:41:27,024 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 5 not checked. [2022-07-12 18:41:27,024 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1511263171] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-12 18:41:27,024 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-12 18:41:27,025 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 22, 26] total 63 [2022-07-12 18:41:27,025 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2059551966] [2022-07-12 18:41:27,025 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-12 18:41:27,026 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 64 states [2022-07-12 18:41:27,026 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 18:41:27,026 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2022-07-12 18:41:27,026 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=249, Invalid=2292, Unknown=61, NotChecked=1430, Total=4032 [2022-07-12 18:41:27,026 INFO L87 Difference]: Start difference. First operand 140 states and 151 transitions. Second operand has 64 states, 63 states have (on average 1.9841269841269842) internal successors, (125), 64 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:41:27,512 WARN L833 $PredicateComparison]: unable to prove that (and (not (= |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~malloc6#1.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|)) (forall ((v_ArrVal_2229 (Array Int Int)) (v_ArrVal_2227 (Array Int Int)) (|v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13| Int) (v_ArrVal_2231 (Array Int Int)) (v_ArrVal_2230 (Array Int Int))) (or (= |v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (let ((.cse1 (let ((.cse3 (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4))) (let ((.cse2 (let ((.cse4 (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) (store (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base| (store .cse4 .cse3 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~malloc6#1.base|)) (select .cse4 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|) v_ArrVal_2227)))) (store .cse2 (select (select .cse2 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse3) v_ArrVal_2229))))) (let ((.cse0 (select (select .cse1 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (= .cse0 (select (select (store (store .cse1 |v_ULTIMATE.start_sl_random_insert_~new~0#1.base_13| v_ArrVal_2230) .cse0 v_ArrVal_2231) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|)))))) (= |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 0) (not (= (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) is different from false [2022-07-12 18:41:28,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 18:41:28,839 INFO L93 Difference]: Finished difference Result 232 states and 254 transitions. [2022-07-12 18:41:28,839 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2022-07-12 18:41:28,840 INFO L78 Accepts]: Start accepts. Automaton has has 64 states, 63 states have (on average 1.9841269841269842) internal successors, (125), 64 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 46 [2022-07-12 18:41:28,840 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 18:41:28,840 INFO L225 Difference]: With dead ends: 232 [2022-07-12 18:41:28,840 INFO L226 Difference]: Without dead ends: 232 [2022-07-12 18:41:28,841 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 56 SyntacticMatches, 5 SemanticMatches, 77 ConstructedPredicates, 14 IntricatePredicates, 0 DeprecatedPredicates, 1401 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=444, Invalid=3673, Unknown=99, NotChecked=1946, Total=6162 [2022-07-12 18:41:28,842 INFO L413 NwaCegarLoop]: 73 mSDtfsCounter, 294 mSDsluCounter, 2063 mSDsCounter, 0 mSdLazyCounter, 1506 mSolverCounterSat, 43 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 294 SdHoareTripleChecker+Valid, 2136 SdHoareTripleChecker+Invalid, 4187 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 43 IncrementalHoareTripleChecker+Valid, 1506 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 2638 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-07-12 18:41:28,842 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [294 Valid, 2136 Invalid, 4187 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [43 Valid, 1506 Invalid, 0 Unknown, 2638 Unchecked, 0.7s Time] [2022-07-12 18:41:28,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 232 states. [2022-07-12 18:41:28,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 232 to 154. [2022-07-12 18:41:28,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 154 states, 137 states have (on average 1.2262773722627738) internal successors, (168), 153 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:41:28,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 168 transitions. [2022-07-12 18:41:28,845 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 168 transitions. Word has length 46 [2022-07-12 18:41:28,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 18:41:28,845 INFO L495 AbstractCegarLoop]: Abstraction has 154 states and 168 transitions. [2022-07-12 18:41:28,845 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 64 states, 63 states have (on average 1.9841269841269842) internal successors, (125), 64 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 18:41:28,846 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 168 transitions. [2022-07-12 18:41:28,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2022-07-12 18:41:28,846 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 18:41:28,846 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 18:41:28,869 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-07-12 18:41:29,060 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable38 [2022-07-12 18:41:29,061 INFO L420 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr25REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-07-12 18:41:29,061 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 18:41:29,061 INFO L85 PathProgramCache]: Analyzing trace with hash -81877472, now seen corresponding path program 1 times [2022-07-12 18:41:29,061 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 18:41:29,061 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [674118848] [2022-07-12 18:41:29,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:41:29,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 18:41:29,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:41:29,778 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:41:29,778 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 18:41:29,778 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [674118848] [2022-07-12 18:41:29,778 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [674118848] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 18:41:29,778 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [426299026] [2022-07-12 18:41:29,778 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 18:41:29,779 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 18:41:29,779 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-12 18:41:29,780 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-12 18:41:29,780 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-07-12 18:41:29,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 18:41:29,948 INFO L263 TraceCheckSpWp]: Trace formula consists of 351 conjuncts, 97 conjunts are in the unsatisfiable core [2022-07-12 18:41:29,951 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 18:41:29,958 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-07-12 18:41:29,983 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 18:41:29,991 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 18:41:30,025 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-07-12 18:41:30,025 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-07-12 18:41:30,054 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:41:30,055 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-07-12 18:41:30,060 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:41:30,061 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2022-07-12 18:41:30,241 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 18:41:30,241 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 43 [2022-07-12 18:41:30,245 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2022-07-12 18:41:30,265 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 18:41:30,265 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 38 [2022-07-12 18:41:30,269 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2022-07-12 18:41:30,396 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 18:41:30,396 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 49 [2022-07-12 18:41:30,399 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 22 [2022-07-12 18:41:30,417 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 18:41:30,417 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 42 [2022-07-12 18:41:30,420 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 22 [2022-07-12 18:41:30,887 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:41:30,894 INFO L356 Elim1Store]: treesize reduction 8, result has 52.9 percent of original size [2022-07-12 18:41:30,894 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 18 [2022-07-12 18:41:30,900 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2022-07-12 18:41:30,960 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 28 [2022-07-12 18:41:30,963 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 16 [2022-07-12 18:41:31,022 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 18:41:31,023 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 43 [2022-07-12 18:41:31,025 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 18:41:31,026 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2022-07-12 18:41:31,136 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 17 [2022-07-12 18:41:31,138 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-07-12 18:41:31,144 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 18:41:31,144 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-12 18:41:31,286 WARN L833 $PredicateComparison]: unable to prove that (and (forall ((v_ArrVal_2367 (Array Int Int))) (<= 0 (+ (select (select (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_sl_random_insert_~a1~0#1.base| v_ArrVal_2367) |c_ULTIMATE.start_main_~sl~1#1.base|) |c_ULTIMATE.start_main_~sl~1#1.offset|) 4))) (forall ((v_ArrVal_2368 (Array Int Int)) (v_ArrVal_2367 (Array Int Int))) (<= (+ 8 (select (select (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_sl_random_insert_~a1~0#1.base| v_ArrVal_2367) |c_ULTIMATE.start_main_~sl~1#1.base|) |c_ULTIMATE.start_main_~sl~1#1.offset|)) (select |c_#length| (select (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sl_random_insert_~a1~0#1.base| v_ArrVal_2368) |c_ULTIMATE.start_main_~sl~1#1.base|) |c_ULTIMATE.start_main_~sl~1#1.offset|))))) is different from false [2022-07-12 18:41:31,296 WARN L833 $PredicateComparison]: unable to prove that (and (forall ((v_ArrVal_2367 (Array Int Int)) (v_ArrVal_2365 (Array Int Int))) (<= 0 (+ (select (select (store (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_sl_random_insert_~new~0#1.base| v_ArrVal_2365) |c_ULTIMATE.start_sl_random_insert_~a1~0#1.base| v_ArrVal_2367) |c_ULTIMATE.start_main_~sl~1#1.base|) |c_ULTIMATE.start_main_~sl~1#1.offset|) 4))) (forall ((v_ArrVal_2368 (Array Int Int)) (v_ArrVal_2367 (Array Int Int)) (v_ArrVal_2366 (Array Int Int)) (v_ArrVal_2365 (Array Int Int))) (<= (+ (select (select (store (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_sl_random_insert_~new~0#1.base| v_ArrVal_2365) |c_ULTIMATE.start_sl_random_insert_~a1~0#1.base| v_ArrVal_2367) |c_ULTIMATE.start_main_~sl~1#1.base|) |c_ULTIMATE.start_main_~sl~1#1.offset|) 8) (select |c_#length| (select (select (store (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sl_random_insert_~new~0#1.base| v_ArrVal_2366) |c_ULTIMATE.start_sl_random_insert_~a1~0#1.base| v_ArrVal_2368) |c_ULTIMATE.start_main_~sl~1#1.base|) |c_ULTIMATE.start_main_~sl~1#1.offset|))))) is different from false [2022-07-12 18:41:31,623 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:41:31,623 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 107 treesize of output 111 [2022-07-12 18:41:36,051 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 18:41:36,052 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 7 select indices, 7 select index equivalence classes, 0 disjoint index pairs (out of 21 index pairs), introduced 7 new quantified variables, introduced 21 case distinctions, treesize of input 546 treesize of output 1405