./Ultimate.py --spec ../sv-benchmarks/c/properties/valid-memsafety.prp --file ../sv-benchmarks/c/list-simple/sll2c_remove_all_reverse.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 6c24879c Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerMemDerefMemtrack.xml -i ../sv-benchmarks/c/list-simple/sll2c_remove_all_reverse.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 3340815bef7e21ae2d4803d7059577c1761bb3b7b4bb24b2b34d5d0d0054fd10 --- Real Ultimate output --- This is Ultimate 0.2.2-?-6c24879 [2022-07-12 19:18:04,613 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-07-12 19:18:04,615 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-07-12 19:18:04,659 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-07-12 19:18:04,662 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-07-12 19:18:04,663 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-07-12 19:18:04,663 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-07-12 19:18:04,665 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-07-12 19:18:04,666 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-07-12 19:18:04,667 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-07-12 19:18:04,676 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-07-12 19:18:04,677 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-07-12 19:18:04,677 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-07-12 19:18:04,678 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-07-12 19:18:04,679 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-07-12 19:18:04,679 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-07-12 19:18:04,680 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-07-12 19:18:04,681 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-07-12 19:18:04,682 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-07-12 19:18:04,683 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-07-12 19:18:04,684 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-07-12 19:18:04,684 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-07-12 19:18:04,685 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-07-12 19:18:04,686 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-07-12 19:18:04,687 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-07-12 19:18:04,689 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-07-12 19:18:04,689 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-07-12 19:18:04,689 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-07-12 19:18:04,690 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-07-12 19:18:04,690 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-07-12 19:18:04,691 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-07-12 19:18:04,691 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-07-12 19:18:04,692 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-07-12 19:18:04,692 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-07-12 19:18:04,693 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-07-12 19:18:04,693 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-07-12 19:18:04,694 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-07-12 19:18:04,694 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-07-12 19:18:04,694 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-07-12 19:18:04,694 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-07-12 19:18:04,695 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-07-12 19:18:04,696 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-07-12 19:18:04,696 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2022-07-12 19:18:04,724 INFO L113 SettingsManager]: Loading preferences was successful [2022-07-12 19:18:04,725 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-07-12 19:18:04,725 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-07-12 19:18:04,725 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-07-12 19:18:04,726 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-07-12 19:18:04,726 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-07-12 19:18:04,727 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-07-12 19:18:04,727 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-07-12 19:18:04,727 INFO L138 SettingsManager]: * Use SBE=true [2022-07-12 19:18:04,727 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-07-12 19:18:04,728 INFO L138 SettingsManager]: * sizeof long=4 [2022-07-12 19:18:04,728 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-07-12 19:18:04,728 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-07-12 19:18:04,728 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-07-12 19:18:04,728 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-07-12 19:18:04,728 INFO L138 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2022-07-12 19:18:04,728 INFO L138 SettingsManager]: * Bitprecise bitfields=true [2022-07-12 19:18:04,729 INFO L138 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2022-07-12 19:18:04,729 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-07-12 19:18:04,729 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-07-12 19:18:04,729 INFO L138 SettingsManager]: * sizeof long double=12 [2022-07-12 19:18:04,729 INFO L138 SettingsManager]: * Use constant arrays=true [2022-07-12 19:18:04,729 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-07-12 19:18:04,729 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-07-12 19:18:04,730 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-07-12 19:18:04,730 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-07-12 19:18:04,730 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-07-12 19:18:04,730 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-07-12 19:18:04,730 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-07-12 19:18:04,730 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-07-12 19:18:04,731 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 3340815bef7e21ae2d4803d7059577c1761bb3b7b4bb24b2b34d5d0d0054fd10 [2022-07-12 19:18:04,951 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-07-12 19:18:04,970 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-07-12 19:18:04,972 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-07-12 19:18:04,973 INFO L271 PluginConnector]: Initializing CDTParser... [2022-07-12 19:18:04,974 INFO L275 PluginConnector]: CDTParser initialized [2022-07-12 19:18:04,975 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/list-simple/sll2c_remove_all_reverse.i [2022-07-12 19:18:05,028 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f82ef090b/c7f975bbf760441c91122cd5090f8cec/FLAG66d41cc40 [2022-07-12 19:18:05,471 INFO L306 CDTParser]: Found 1 translation units. [2022-07-12 19:18:05,474 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/list-simple/sll2c_remove_all_reverse.i [2022-07-12 19:18:05,486 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f82ef090b/c7f975bbf760441c91122cd5090f8cec/FLAG66d41cc40 [2022-07-12 19:18:05,839 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f82ef090b/c7f975bbf760441c91122cd5090f8cec [2022-07-12 19:18:05,841 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-07-12 19:18:05,841 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-07-12 19:18:05,842 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-07-12 19:18:05,843 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-07-12 19:18:05,845 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-07-12 19:18:05,845 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.07 07:18:05" (1/1) ... [2022-07-12 19:18:05,847 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1fae8283 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 07:18:05, skipping insertion in model container [2022-07-12 19:18:05,847 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.07 07:18:05" (1/1) ... [2022-07-12 19:18:05,851 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-07-12 19:18:05,881 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-07-12 19:18:06,060 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/list-simple/sll2c_remove_all_reverse.i[24151,24164] [2022-07-12 19:18:06,062 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-12 19:18:06,066 INFO L203 MainTranslator]: Completed pre-run [2022-07-12 19:18:06,098 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/list-simple/sll2c_remove_all_reverse.i[24151,24164] [2022-07-12 19:18:06,098 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-12 19:18:06,120 INFO L208 MainTranslator]: Completed translation [2022-07-12 19:18:06,120 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 07:18:06 WrapperNode [2022-07-12 19:18:06,121 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-07-12 19:18:06,121 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-07-12 19:18:06,121 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-07-12 19:18:06,122 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-07-12 19:18:06,127 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 07:18:06" (1/1) ... [2022-07-12 19:18:06,139 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 07:18:06" (1/1) ... [2022-07-12 19:18:06,154 INFO L137 Inliner]: procedures = 126, calls = 36, calls flagged for inlining = 5, calls inlined = 5, statements flattened = 125 [2022-07-12 19:18:06,155 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-07-12 19:18:06,155 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-07-12 19:18:06,155 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-07-12 19:18:06,156 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-07-12 19:18:06,160 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 07:18:06" (1/1) ... [2022-07-12 19:18:06,161 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 07:18:06" (1/1) ... [2022-07-12 19:18:06,163 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 07:18:06" (1/1) ... [2022-07-12 19:18:06,163 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 07:18:06" (1/1) ... [2022-07-12 19:18:06,169 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 07:18:06" (1/1) ... [2022-07-12 19:18:06,171 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 07:18:06" (1/1) ... [2022-07-12 19:18:06,172 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 07:18:06" (1/1) ... [2022-07-12 19:18:06,174 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-07-12 19:18:06,175 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-07-12 19:18:06,175 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-07-12 19:18:06,175 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-07-12 19:18:06,176 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 07:18:06" (1/1) ... [2022-07-12 19:18:06,193 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-07-12 19:18:06,201 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-12 19:18:06,222 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-07-12 19:18:06,228 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-07-12 19:18:06,253 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-07-12 19:18:06,253 INFO L130 BoogieDeclarations]: Found specification of procedure node_create [2022-07-12 19:18:06,253 INFO L138 BoogieDeclarations]: Found implementation of procedure node_create [2022-07-12 19:18:06,253 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-07-12 19:18:06,254 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-07-12 19:18:06,254 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-07-12 19:18:06,254 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-07-12 19:18:06,254 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-07-12 19:18:06,254 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-07-12 19:18:06,254 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-07-12 19:18:06,254 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-07-12 19:18:06,254 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-07-12 19:18:06,255 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-07-12 19:18:06,367 INFO L234 CfgBuilder]: Building ICFG [2022-07-12 19:18:06,384 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-07-12 19:18:06,666 INFO L275 CfgBuilder]: Performing block encoding [2022-07-12 19:18:06,672 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-07-12 19:18:06,672 INFO L299 CfgBuilder]: Removed 4 assume(true) statements. [2022-07-12 19:18:06,673 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.07 07:18:06 BoogieIcfgContainer [2022-07-12 19:18:06,674 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-07-12 19:18:06,686 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-07-12 19:18:06,687 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-07-12 19:18:06,690 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-07-12 19:18:06,690 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 12.07 07:18:05" (1/3) ... [2022-07-12 19:18:06,691 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@60eac05e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.07 07:18:06, skipping insertion in model container [2022-07-12 19:18:06,691 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 07:18:06" (2/3) ... [2022-07-12 19:18:06,691 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@60eac05e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.07 07:18:06, skipping insertion in model container [2022-07-12 19:18:06,691 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.07 07:18:06" (3/3) ... [2022-07-12 19:18:06,692 INFO L111 eAbstractionObserver]: Analyzing ICFG sll2c_remove_all_reverse.i [2022-07-12 19:18:06,707 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-07-12 19:18:06,708 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 42 error locations. [2022-07-12 19:18:06,739 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-07-12 19:18:06,744 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@689a37b9, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@437a04db [2022-07-12 19:18:06,744 INFO L358 AbstractCegarLoop]: Starting to check reachability of 42 error locations. [2022-07-12 19:18:06,747 INFO L276 IsEmpty]: Start isEmpty. Operand has 97 states, 51 states have (on average 2.0392156862745097) internal successors, (104), 93 states have internal predecessors, (104), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-07-12 19:18:06,760 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2022-07-12 19:18:06,760 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 19:18:06,761 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2022-07-12 19:18:06,761 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting node_createErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 39 more)] === [2022-07-12 19:18:06,764 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 19:18:06,765 INFO L85 PathProgramCache]: Analyzing trace with hash 894197909, now seen corresponding path program 1 times [2022-07-12 19:18:06,770 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 19:18:06,771 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [270522992] [2022-07-12 19:18:06,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:06,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 19:18:06,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:06,939 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 19:18:06,940 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 19:18:06,940 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [270522992] [2022-07-12 19:18:06,940 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [270522992] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 19:18:06,941 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 19:18:06,941 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-07-12 19:18:06,942 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [38664234] [2022-07-12 19:18:06,942 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 19:18:06,945 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-07-12 19:18:06,946 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 19:18:06,965 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-07-12 19:18:06,966 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-12 19:18:06,968 INFO L87 Difference]: Start difference. First operand has 97 states, 51 states have (on average 2.0392156862745097) internal successors, (104), 93 states have internal predecessors, (104), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand has 3 states, 2 states have (on average 2.5) internal successors, (5), 3 states have internal predecessors, (5), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 19:18:07,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 19:18:07,066 INFO L93 Difference]: Finished difference Result 95 states and 101 transitions. [2022-07-12 19:18:07,067 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-07-12 19:18:07,068 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 2.5) internal successors, (5), 3 states have internal predecessors, (5), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 6 [2022-07-12 19:18:07,068 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 19:18:07,073 INFO L225 Difference]: With dead ends: 95 [2022-07-12 19:18:07,074 INFO L226 Difference]: Without dead ends: 92 [2022-07-12 19:18:07,077 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-12 19:18:07,082 INFO L413 NwaCegarLoop]: 94 mSDtfsCounter, 8 mSDsluCounter, 50 mSDsCounter, 0 mSdLazyCounter, 48 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 144 SdHoareTripleChecker+Invalid, 49 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 48 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-07-12 19:18:07,082 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [8 Valid, 144 Invalid, 49 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 48 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-07-12 19:18:07,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states. [2022-07-12 19:18:07,109 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 92. [2022-07-12 19:18:07,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 92 states, 49 states have (on average 1.8979591836734695) internal successors, (93), 88 states have internal predecessors, (93), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-07-12 19:18:07,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 97 transitions. [2022-07-12 19:18:07,114 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 97 transitions. Word has length 6 [2022-07-12 19:18:07,114 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 19:18:07,114 INFO L495 AbstractCegarLoop]: Abstraction has 92 states and 97 transitions. [2022-07-12 19:18:07,115 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 2.5) internal successors, (5), 3 states have internal predecessors, (5), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 19:18:07,115 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 97 transitions. [2022-07-12 19:18:07,115 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2022-07-12 19:18:07,115 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 19:18:07,115 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2022-07-12 19:18:07,116 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-07-12 19:18:07,116 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting node_createErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 39 more)] === [2022-07-12 19:18:07,116 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 19:18:07,117 INFO L85 PathProgramCache]: Analyzing trace with hash 894197910, now seen corresponding path program 1 times [2022-07-12 19:18:07,117 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 19:18:07,117 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [184091331] [2022-07-12 19:18:07,117 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:07,117 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 19:18:07,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:07,190 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 19:18:07,190 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 19:18:07,190 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [184091331] [2022-07-12 19:18:07,191 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [184091331] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 19:18:07,191 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 19:18:07,191 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-07-12 19:18:07,191 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1464503580] [2022-07-12 19:18:07,191 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 19:18:07,192 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-07-12 19:18:07,194 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 19:18:07,195 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-07-12 19:18:07,195 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-12 19:18:07,196 INFO L87 Difference]: Start difference. First operand 92 states and 97 transitions. Second operand has 3 states, 2 states have (on average 2.5) internal successors, (5), 3 states have internal predecessors, (5), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 19:18:07,247 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 19:18:07,247 INFO L93 Difference]: Finished difference Result 90 states and 95 transitions. [2022-07-12 19:18:07,247 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-07-12 19:18:07,247 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 2.5) internal successors, (5), 3 states have internal predecessors, (5), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 6 [2022-07-12 19:18:07,248 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 19:18:07,248 INFO L225 Difference]: With dead ends: 90 [2022-07-12 19:18:07,248 INFO L226 Difference]: Without dead ends: 90 [2022-07-12 19:18:07,249 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-12 19:18:07,249 INFO L413 NwaCegarLoop]: 91 mSDtfsCounter, 4 mSDsluCounter, 55 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 146 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-07-12 19:18:07,250 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 146 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-07-12 19:18:07,250 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2022-07-12 19:18:07,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 90. [2022-07-12 19:18:07,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 90 states, 49 states have (on average 1.8571428571428572) internal successors, (91), 86 states have internal predecessors, (91), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-07-12 19:18:07,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 95 transitions. [2022-07-12 19:18:07,255 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 95 transitions. Word has length 6 [2022-07-12 19:18:07,255 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 19:18:07,255 INFO L495 AbstractCegarLoop]: Abstraction has 90 states and 95 transitions. [2022-07-12 19:18:07,255 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 2.5) internal successors, (5), 3 states have internal predecessors, (5), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 19:18:07,256 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 95 transitions. [2022-07-12 19:18:07,256 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-07-12 19:18:07,256 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 19:18:07,256 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 19:18:07,256 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-07-12 19:18:07,257 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 39 more)] === [2022-07-12 19:18:07,257 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 19:18:07,257 INFO L85 PathProgramCache]: Analyzing trace with hash 1984336343, now seen corresponding path program 1 times [2022-07-12 19:18:07,257 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 19:18:07,258 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [821584231] [2022-07-12 19:18:07,258 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:07,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 19:18:07,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:07,295 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-07-12 19:18:07,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:07,313 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 19:18:07,313 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 19:18:07,313 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [821584231] [2022-07-12 19:18:07,313 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [821584231] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 19:18:07,314 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 19:18:07,314 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-07-12 19:18:07,314 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2042988563] [2022-07-12 19:18:07,314 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 19:18:07,314 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-07-12 19:18:07,315 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 19:18:07,315 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-07-12 19:18:07,315 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-07-12 19:18:07,315 INFO L87 Difference]: Start difference. First operand 90 states and 95 transitions. Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-07-12 19:18:07,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 19:18:07,382 INFO L93 Difference]: Finished difference Result 97 states and 103 transitions. [2022-07-12 19:18:07,383 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-07-12 19:18:07,383 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-07-12 19:18:07,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 19:18:07,384 INFO L225 Difference]: With dead ends: 97 [2022-07-12 19:18:07,384 INFO L226 Difference]: Without dead ends: 97 [2022-07-12 19:18:07,384 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-07-12 19:18:07,385 INFO L413 NwaCegarLoop]: 93 mSDtfsCounter, 5 mSDsluCounter, 123 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 216 SdHoareTripleChecker+Invalid, 68 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-07-12 19:18:07,386 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 216 Invalid, 68 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-07-12 19:18:07,386 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2022-07-12 19:18:07,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 91. [2022-07-12 19:18:07,391 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 50 states have (on average 1.84) internal successors, (92), 87 states have internal predecessors, (92), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-07-12 19:18:07,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 96 transitions. [2022-07-12 19:18:07,392 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 96 transitions. Word has length 13 [2022-07-12 19:18:07,392 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 19:18:07,392 INFO L495 AbstractCegarLoop]: Abstraction has 91 states and 96 transitions. [2022-07-12 19:18:07,392 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-07-12 19:18:07,392 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 96 transitions. [2022-07-12 19:18:07,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-07-12 19:18:07,393 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 19:18:07,393 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 19:18:07,393 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-07-12 19:18:07,393 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 39 more)] === [2022-07-12 19:18:07,394 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 19:18:07,394 INFO L85 PathProgramCache]: Analyzing trace with hash 305697820, now seen corresponding path program 1 times [2022-07-12 19:18:07,394 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 19:18:07,394 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1271177747] [2022-07-12 19:18:07,394 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:07,395 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 19:18:07,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:07,490 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-07-12 19:18:07,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:07,508 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-07-12 19:18:07,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:07,541 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-07-12 19:18:07,542 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 19:18:07,542 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1271177747] [2022-07-12 19:18:07,542 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1271177747] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 19:18:07,542 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 19:18:07,542 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-07-12 19:18:07,543 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1171511975] [2022-07-12 19:18:07,543 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 19:18:07,543 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-07-12 19:18:07,543 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 19:18:07,544 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-07-12 19:18:07,544 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2022-07-12 19:18:07,544 INFO L87 Difference]: Start difference. First operand 91 states and 96 transitions. Second operand has 7 states, 6 states have (on average 2.6666666666666665) internal successors, (16), 5 states have internal predecessors, (16), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-07-12 19:18:07,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 19:18:07,720 INFO L93 Difference]: Finished difference Result 144 states and 154 transitions. [2022-07-12 19:18:07,720 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-07-12 19:18:07,720 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 2.6666666666666665) internal successors, (16), 5 states have internal predecessors, (16), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 22 [2022-07-12 19:18:07,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 19:18:07,722 INFO L225 Difference]: With dead ends: 144 [2022-07-12 19:18:07,722 INFO L226 Difference]: Without dead ends: 144 [2022-07-12 19:18:07,723 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-07-12 19:18:07,723 INFO L413 NwaCegarLoop]: 61 mSDtfsCounter, 67 mSDsluCounter, 216 mSDsCounter, 0 mSdLazyCounter, 281 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 67 SdHoareTripleChecker+Valid, 277 SdHoareTripleChecker+Invalid, 282 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 281 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-07-12 19:18:07,724 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [67 Valid, 277 Invalid, 282 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 281 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-07-12 19:18:07,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2022-07-12 19:18:07,727 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 90. [2022-07-12 19:18:07,727 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 90 states, 50 states have (on average 1.82) internal successors, (91), 86 states have internal predecessors, (91), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-07-12 19:18:07,728 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 95 transitions. [2022-07-12 19:18:07,728 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 95 transitions. Word has length 22 [2022-07-12 19:18:07,728 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 19:18:07,729 INFO L495 AbstractCegarLoop]: Abstraction has 90 states and 95 transitions. [2022-07-12 19:18:07,729 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 2.6666666666666665) internal successors, (16), 5 states have internal predecessors, (16), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-07-12 19:18:07,729 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 95 transitions. [2022-07-12 19:18:07,729 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-07-12 19:18:07,729 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 19:18:07,730 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 19:18:07,730 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-07-12 19:18:07,730 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 39 more)] === [2022-07-12 19:18:07,730 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 19:18:07,730 INFO L85 PathProgramCache]: Analyzing trace with hash 305697821, now seen corresponding path program 1 times [2022-07-12 19:18:07,731 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 19:18:07,731 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [691011104] [2022-07-12 19:18:07,731 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:07,731 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 19:18:07,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:07,776 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-07-12 19:18:07,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:07,783 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-07-12 19:18:07,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:07,814 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-07-12 19:18:07,814 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 19:18:07,815 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [691011104] [2022-07-12 19:18:07,815 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [691011104] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 19:18:07,815 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 19:18:07,815 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-07-12 19:18:07,815 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [602777351] [2022-07-12 19:18:07,815 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 19:18:07,816 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-07-12 19:18:07,816 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 19:18:07,816 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-07-12 19:18:07,816 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2022-07-12 19:18:07,817 INFO L87 Difference]: Start difference. First operand 90 states and 95 transitions. Second operand has 7 states, 6 states have (on average 3.0) internal successors, (18), 5 states have internal predecessors, (18), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-07-12 19:18:07,949 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 19:18:07,949 INFO L93 Difference]: Finished difference Result 90 states and 96 transitions. [2022-07-12 19:18:07,950 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-07-12 19:18:07,950 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 3.0) internal successors, (18), 5 states have internal predecessors, (18), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 22 [2022-07-12 19:18:07,950 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 19:18:07,951 INFO L225 Difference]: With dead ends: 90 [2022-07-12 19:18:07,951 INFO L226 Difference]: Without dead ends: 90 [2022-07-12 19:18:07,951 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-07-12 19:18:07,952 INFO L413 NwaCegarLoop]: 60 mSDtfsCounter, 81 mSDsluCounter, 196 mSDsCounter, 0 mSdLazyCounter, 227 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 81 SdHoareTripleChecker+Valid, 256 SdHoareTripleChecker+Invalid, 227 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 227 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-07-12 19:18:07,952 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [81 Valid, 256 Invalid, 227 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 227 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-07-12 19:18:07,953 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2022-07-12 19:18:07,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 89. [2022-07-12 19:18:07,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 89 states, 50 states have (on average 1.8) internal successors, (90), 85 states have internal predecessors, (90), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-07-12 19:18:07,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 94 transitions. [2022-07-12 19:18:07,956 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 94 transitions. Word has length 22 [2022-07-12 19:18:07,956 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 19:18:07,956 INFO L495 AbstractCegarLoop]: Abstraction has 89 states and 94 transitions. [2022-07-12 19:18:07,957 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 3.0) internal successors, (18), 5 states have internal predecessors, (18), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-07-12 19:18:07,957 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 94 transitions. [2022-07-12 19:18:07,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-07-12 19:18:07,957 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 19:18:07,957 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 19:18:07,958 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-07-12 19:18:07,958 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 39 more)] === [2022-07-12 19:18:07,958 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 19:18:07,958 INFO L85 PathProgramCache]: Analyzing trace with hash 1713076933, now seen corresponding path program 1 times [2022-07-12 19:18:07,958 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 19:18:07,959 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [87796169] [2022-07-12 19:18:07,959 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:07,959 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 19:18:07,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:08,002 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-07-12 19:18:08,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:08,021 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-07-12 19:18:08,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:08,061 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-07-12 19:18:08,062 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 19:18:08,062 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [87796169] [2022-07-12 19:18:08,062 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [87796169] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 19:18:08,062 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1081586224] [2022-07-12 19:18:08,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:08,063 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 19:18:08,063 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-12 19:18:08,080 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-12 19:18:08,104 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-07-12 19:18:08,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:08,190 INFO L263 TraceCheckSpWp]: Trace formula consists of 219 conjuncts, 17 conjunts are in the unsatisfiable core [2022-07-12 19:18:08,194 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 19:18:08,223 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 19:18:08,344 INFO L356 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2022-07-12 19:18:08,345 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 21 [2022-07-12 19:18:08,354 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-07-12 19:18:08,355 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-12 19:18:08,411 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1081586224] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 19:18:08,412 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-07-12 19:18:08,412 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 10 [2022-07-12 19:18:08,412 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1017759162] [2022-07-12 19:18:08,412 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-07-12 19:18:08,413 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-07-12 19:18:08,413 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 19:18:08,413 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-07-12 19:18:08,413 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=104, Unknown=0, NotChecked=0, Total=132 [2022-07-12 19:18:08,414 INFO L87 Difference]: Start difference. First operand 89 states and 94 transitions. Second operand has 11 states, 10 states have (on average 3.0) internal successors, (30), 8 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-07-12 19:18:08,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 19:18:08,598 INFO L93 Difference]: Finished difference Result 141 states and 150 transitions. [2022-07-12 19:18:08,598 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-07-12 19:18:08,599 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 10 states have (on average 3.0) internal successors, (30), 8 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 25 [2022-07-12 19:18:08,599 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 19:18:08,600 INFO L225 Difference]: With dead ends: 141 [2022-07-12 19:18:08,600 INFO L226 Difference]: Without dead ends: 141 [2022-07-12 19:18:08,600 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 32 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=42, Invalid=140, Unknown=0, NotChecked=0, Total=182 [2022-07-12 19:18:08,601 INFO L413 NwaCegarLoop]: 57 mSDtfsCounter, 65 mSDsluCounter, 296 mSDsCounter, 0 mSdLazyCounter, 271 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 65 SdHoareTripleChecker+Valid, 353 SdHoareTripleChecker+Invalid, 314 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 271 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 42 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-07-12 19:18:08,601 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [65 Valid, 353 Invalid, 314 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 271 Invalid, 0 Unknown, 42 Unchecked, 0.2s Time] [2022-07-12 19:18:08,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2022-07-12 19:18:08,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 88. [2022-07-12 19:18:08,606 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 88 states, 50 states have (on average 1.78) internal successors, (89), 84 states have internal predecessors, (89), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-07-12 19:18:08,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 93 transitions. [2022-07-12 19:18:08,606 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 93 transitions. Word has length 25 [2022-07-12 19:18:08,607 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 19:18:08,607 INFO L495 AbstractCegarLoop]: Abstraction has 88 states and 93 transitions. [2022-07-12 19:18:08,607 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 10 states have (on average 3.0) internal successors, (30), 8 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-07-12 19:18:08,607 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 93 transitions. [2022-07-12 19:18:08,608 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-07-12 19:18:08,608 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 19:18:08,608 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 19:18:08,644 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-07-12 19:18:08,823 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable5 [2022-07-12 19:18:08,824 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 39 more)] === [2022-07-12 19:18:08,824 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 19:18:08,824 INFO L85 PathProgramCache]: Analyzing trace with hash 1713076934, now seen corresponding path program 1 times [2022-07-12 19:18:08,824 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 19:18:08,824 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [85095302] [2022-07-12 19:18:08,824 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:08,825 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 19:18:08,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:08,899 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-07-12 19:18:08,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:08,943 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-07-12 19:18:08,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:08,981 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-07-12 19:18:08,981 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 19:18:08,981 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [85095302] [2022-07-12 19:18:08,982 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [85095302] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 19:18:08,982 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [512420007] [2022-07-12 19:18:08,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:08,982 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 19:18:08,982 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-12 19:18:08,983 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-12 19:18:08,984 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-07-12 19:18:09,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:09,064 INFO L263 TraceCheckSpWp]: Trace formula consists of 219 conjuncts, 29 conjunts are in the unsatisfiable core [2022-07-12 19:18:09,067 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 19:18:09,073 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 19:18:09,249 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 19:18:09,250 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 16 [2022-07-12 19:18:09,256 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-07-12 19:18:09,257 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-07-12 19:18:09,285 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 19:18:09,285 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-12 19:18:11,394 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [512420007] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 19:18:11,394 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-07-12 19:18:11,394 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 18 [2022-07-12 19:18:11,394 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1012802966] [2022-07-12 19:18:11,394 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-07-12 19:18:11,394 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-07-12 19:18:11,394 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 19:18:11,395 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-07-12 19:18:11,395 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=358, Unknown=0, NotChecked=0, Total=420 [2022-07-12 19:18:11,395 INFO L87 Difference]: Start difference. First operand 88 states and 93 transitions. Second operand has 19 states, 18 states have (on average 2.2222222222222223) internal successors, (40), 15 states have internal predecessors, (40), 3 states have call successors, (4), 3 states have call predecessors, (4), 4 states have return successors, (4), 4 states have call predecessors, (4), 3 states have call successors, (4) [2022-07-12 19:18:11,875 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 19:18:11,876 INFO L93 Difference]: Finished difference Result 141 states and 151 transitions. [2022-07-12 19:18:11,878 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-07-12 19:18:11,878 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 18 states have (on average 2.2222222222222223) internal successors, (40), 15 states have internal predecessors, (40), 3 states have call successors, (4), 3 states have call predecessors, (4), 4 states have return successors, (4), 4 states have call predecessors, (4), 3 states have call successors, (4) Word has length 25 [2022-07-12 19:18:11,878 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 19:18:11,878 INFO L225 Difference]: With dead ends: 141 [2022-07-12 19:18:11,879 INFO L226 Difference]: Without dead ends: 141 [2022-07-12 19:18:11,879 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 89 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=83, Invalid=423, Unknown=0, NotChecked=0, Total=506 [2022-07-12 19:18:11,879 INFO L413 NwaCegarLoop]: 41 mSDtfsCounter, 140 mSDsluCounter, 400 mSDsCounter, 0 mSdLazyCounter, 673 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 140 SdHoareTripleChecker+Valid, 441 SdHoareTripleChecker+Invalid, 736 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 673 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 52 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-07-12 19:18:11,879 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [140 Valid, 441 Invalid, 736 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 673 Invalid, 0 Unknown, 52 Unchecked, 0.4s Time] [2022-07-12 19:18:11,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2022-07-12 19:18:11,882 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 87. [2022-07-12 19:18:11,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 87 states, 50 states have (on average 1.76) internal successors, (88), 83 states have internal predecessors, (88), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-07-12 19:18:11,883 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 92 transitions. [2022-07-12 19:18:11,883 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 92 transitions. Word has length 25 [2022-07-12 19:18:11,883 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 19:18:11,883 INFO L495 AbstractCegarLoop]: Abstraction has 87 states and 92 transitions. [2022-07-12 19:18:11,883 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 18 states have (on average 2.2222222222222223) internal successors, (40), 15 states have internal predecessors, (40), 3 states have call successors, (4), 3 states have call predecessors, (4), 4 states have return successors, (4), 4 states have call predecessors, (4), 3 states have call successors, (4) [2022-07-12 19:18:11,884 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 92 transitions. [2022-07-12 19:18:11,884 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-07-12 19:18:11,884 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 19:18:11,884 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 19:18:11,901 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2022-07-12 19:18:12,101 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable6 [2022-07-12 19:18:12,101 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr35REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 39 more)] === [2022-07-12 19:18:12,102 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 19:18:12,102 INFO L85 PathProgramCache]: Analyzing trace with hash -1566263260, now seen corresponding path program 1 times [2022-07-12 19:18:12,102 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 19:18:12,102 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2106437467] [2022-07-12 19:18:12,102 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:12,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 19:18:12,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:12,170 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-07-12 19:18:12,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:12,178 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-07-12 19:18:12,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:12,189 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-07-12 19:18:12,189 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 19:18:12,189 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2106437467] [2022-07-12 19:18:12,189 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2106437467] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 19:18:12,190 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1457269493] [2022-07-12 19:18:12,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:12,190 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 19:18:12,190 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-12 19:18:12,204 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-12 19:18:12,224 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-07-12 19:18:12,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:12,303 INFO L263 TraceCheckSpWp]: Trace formula consists of 246 conjuncts, 3 conjunts are in the unsatisfiable core [2022-07-12 19:18:12,304 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 19:18:12,324 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2022-07-12 19:18:12,324 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-07-12 19:18:12,325 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1457269493] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 19:18:12,325 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-07-12 19:18:12,325 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [6] total 7 [2022-07-12 19:18:12,325 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [220487477] [2022-07-12 19:18:12,325 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 19:18:12,325 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-07-12 19:18:12,326 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 19:18:12,326 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-07-12 19:18:12,326 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-07-12 19:18:12,326 INFO L87 Difference]: Start difference. First operand 87 states and 92 transitions. Second operand has 4 states, 4 states have (on average 4.75) internal successors, (19), 4 states have internal predecessors, (19), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-07-12 19:18:12,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 19:18:12,336 INFO L93 Difference]: Finished difference Result 146 states and 154 transitions. [2022-07-12 19:18:12,336 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-07-12 19:18:12,336 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 4.75) internal successors, (19), 4 states have internal predecessors, (19), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 29 [2022-07-12 19:18:12,336 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 19:18:12,337 INFO L225 Difference]: With dead ends: 146 [2022-07-12 19:18:12,337 INFO L226 Difference]: Without dead ends: 146 [2022-07-12 19:18:12,337 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 32 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-07-12 19:18:12,338 INFO L413 NwaCegarLoop]: 88 mSDtfsCounter, 132 mSDsluCounter, 93 mSDsCounter, 0 mSdLazyCounter, 9 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 132 SdHoareTripleChecker+Valid, 181 SdHoareTripleChecker+Invalid, 10 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 9 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-07-12 19:18:12,338 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [132 Valid, 181 Invalid, 10 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 9 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-07-12 19:18:12,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2022-07-12 19:18:12,340 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 88. [2022-07-12 19:18:12,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 88 states, 51 states have (on average 1.7450980392156863) internal successors, (89), 84 states have internal predecessors, (89), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-07-12 19:18:12,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 93 transitions. [2022-07-12 19:18:12,340 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 93 transitions. Word has length 29 [2022-07-12 19:18:12,341 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 19:18:12,341 INFO L495 AbstractCegarLoop]: Abstraction has 88 states and 93 transitions. [2022-07-12 19:18:12,341 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 4.75) internal successors, (19), 4 states have internal predecessors, (19), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-07-12 19:18:12,341 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 93 transitions. [2022-07-12 19:18:12,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-07-12 19:18:12,341 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 19:18:12,342 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 19:18:12,358 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-07-12 19:18:12,558 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 19:18:12,558 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr4REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 39 more)] === [2022-07-12 19:18:12,559 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 19:18:12,559 INFO L85 PathProgramCache]: Analyzing trace with hash -1566263288, now seen corresponding path program 1 times [2022-07-12 19:18:12,559 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 19:18:12,559 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [872460429] [2022-07-12 19:18:12,559 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:12,559 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 19:18:12,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:12,612 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-07-12 19:18:12,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:12,639 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-07-12 19:18:12,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:12,674 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-07-12 19:18:12,674 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 19:18:12,674 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [872460429] [2022-07-12 19:18:12,674 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [872460429] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 19:18:12,675 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2025712500] [2022-07-12 19:18:12,675 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:12,675 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 19:18:12,675 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-12 19:18:12,676 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-12 19:18:12,677 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-07-12 19:18:12,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:12,768 INFO L263 TraceCheckSpWp]: Trace formula consists of 254 conjuncts, 26 conjunts are in the unsatisfiable core [2022-07-12 19:18:12,770 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 19:18:12,773 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 19:18:12,786 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-07-12 19:18:12,837 INFO L356 Elim1Store]: treesize reduction 20, result has 33.3 percent of original size [2022-07-12 19:18:12,837 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 16 [2022-07-12 19:18:12,873 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-07-12 19:18:12,973 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 19:18:12,973 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2022-07-12 19:18:12,985 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-07-12 19:18:12,985 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-12 19:18:13,034 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2025712500] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 19:18:13,034 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-07-12 19:18:13,034 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 15 [2022-07-12 19:18:13,034 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1539603976] [2022-07-12 19:18:13,034 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-07-12 19:18:13,035 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-07-12 19:18:13,035 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-12 19:18:13,035 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-07-12 19:18:13,035 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=214, Unknown=0, NotChecked=0, Total=272 [2022-07-12 19:18:13,036 INFO L87 Difference]: Start difference. First operand 88 states and 93 transitions. Second operand has 16 states, 15 states have (on average 2.8) internal successors, (42), 12 states have internal predecessors, (42), 3 states have call successors, (4), 2 states have call predecessors, (4), 4 states have return successors, (4), 4 states have call predecessors, (4), 3 states have call successors, (4) [2022-07-12 19:18:13,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 19:18:13,230 INFO L93 Difference]: Finished difference Result 132 states and 143 transitions. [2022-07-12 19:18:13,230 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-07-12 19:18:13,230 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 15 states have (on average 2.8) internal successors, (42), 12 states have internal predecessors, (42), 3 states have call successors, (4), 2 states have call predecessors, (4), 4 states have return successors, (4), 4 states have call predecessors, (4), 3 states have call successors, (4) Word has length 29 [2022-07-12 19:18:13,230 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 19:18:13,231 INFO L225 Difference]: With dead ends: 132 [2022-07-12 19:18:13,231 INFO L226 Difference]: Without dead ends: 132 [2022-07-12 19:18:13,231 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 36 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 95 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=76, Invalid=304, Unknown=0, NotChecked=0, Total=380 [2022-07-12 19:18:13,231 INFO L413 NwaCegarLoop]: 49 mSDtfsCounter, 244 mSDsluCounter, 249 mSDsCounter, 0 mSdLazyCounter, 285 mSolverCounterSat, 34 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 244 SdHoareTripleChecker+Valid, 298 SdHoareTripleChecker+Invalid, 375 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 34 IncrementalHoareTripleChecker+Valid, 285 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 56 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-07-12 19:18:13,232 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [244 Valid, 298 Invalid, 375 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [34 Valid, 285 Invalid, 0 Unknown, 56 Unchecked, 0.2s Time] [2022-07-12 19:18:13,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2022-07-12 19:18:13,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 85. [2022-07-12 19:18:13,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 85 states, 52 states have (on average 1.6730769230769231) internal successors, (87), 81 states have internal predecessors, (87), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-07-12 19:18:13,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 91 transitions. [2022-07-12 19:18:13,234 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 91 transitions. Word has length 29 [2022-07-12 19:18:13,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 19:18:13,235 INFO L495 AbstractCegarLoop]: Abstraction has 85 states and 91 transitions. [2022-07-12 19:18:13,235 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 15 states have (on average 2.8) internal successors, (42), 12 states have internal predecessors, (42), 3 states have call successors, (4), 2 states have call predecessors, (4), 4 states have return successors, (4), 4 states have call predecessors, (4), 3 states have call successors, (4) [2022-07-12 19:18:13,235 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 91 transitions. [2022-07-12 19:18:13,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-07-12 19:18:13,235 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 19:18:13,235 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 19:18:13,267 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-07-12 19:18:13,447 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 19:18:13,447 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 39 more)] === [2022-07-12 19:18:13,448 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 19:18:13,448 INFO L85 PathProgramCache]: Analyzing trace with hash -1566263287, now seen corresponding path program 1 times [2022-07-12 19:18:13,448 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-12 19:18:13,448 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1457432023] [2022-07-12 19:18:13,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:13,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-12 19:18:13,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:13,518 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-07-12 19:18:13,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:13,554 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-07-12 19:18:13,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:13,569 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-07-12 19:18:13,569 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-12 19:18:13,569 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1457432023] [2022-07-12 19:18:13,569 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1457432023] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 19:18:13,569 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [948925822] [2022-07-12 19:18:13,570 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:13,570 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-12 19:18:13,570 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-12 19:18:13,584 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-12 19:18:13,626 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-07-12 19:18:13,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:13,718 INFO L263 TraceCheckSpWp]: Trace formula consists of 254 conjuncts, 22 conjunts are in the unsatisfiable core [2022-07-12 19:18:13,720 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 19:18:13,725 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 19:18:13,740 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-07-12 19:18:13,832 WARN L319 FreeRefinementEngine]: Global settings require throwing the following exception [2022-07-12 19:18:13,859 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-07-12 19:18:14,032 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-07-12 19:18:14,033 FATAL L? ?]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: line 55283 column 46: unknown constant v_#length_BEFORE_CALL_4 at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser$Action$.CUP$do_action(Parser.java:1458) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser.do_action(Parser.java:658) at com.github.jhoenicke.javacup.runtime.LRParser.parse(LRParser.java:383) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:239) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parseSuccess(Executor.java:258) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.assertTerm(Scriptor.java:147) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.arrays.DiffWrapperScript$DiffTransformer.checkOrAddAxiom(DiffWrapperScript.java:161) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.arrays.DiffWrapperScript$DiffTransformer.convertApplicationTerm(DiffWrapperScript.java:171) at de.uni_freiburg.informatik.ultimate.logic.TermTransformer$BuildApplicationTerm.walk(TermTransformer.java:352) at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:115) at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:106) at de.uni_freiburg.informatik.ultimate.logic.TermTransformer.transform(TermTransformer.java:285) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.arrays.DiffWrapperScript.assertTerm(DiffWrapperScript.java:109) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.assertTerm(WrapperScript.java:158) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.ManagedScript.assertTerm(ManagedScript.java:134) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.MonolithicImplicationChecker.checkImplication(MonolithicImplicationChecker.java:83) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.compare(PredicateUnifier.java:824) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.(PredicateUnifier.java:768) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:345) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:305) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp$UnifyPostprocessor.postprocess(TraceCheckSpWp.java:582) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:420) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeStrongestPostconditionSequence(IterativePredicateTransformer.java:199) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:299) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:185) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:163) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:108) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:1) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:77) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:266) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:147) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:137) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:85) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:82) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:248) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:431) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:366) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:409) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:300) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseSequentialProgram(TraceAbstractionStarter.java:260) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:173) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:152) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2022-07-12 19:18:14,036 INFO L158 Benchmark]: Toolchain (without parser) took 8194.93ms. Allocated memory was 104.9MB in the beginning and 192.9MB in the end (delta: 88.1MB). Free memory was 63.3MB in the beginning and 83.8MB in the end (delta: -20.5MB). Peak memory consumption was 69.2MB. Max. memory is 16.1GB. [2022-07-12 19:18:14,037 INFO L158 Benchmark]: CDTParser took 0.17ms. Allocated memory is still 104.9MB. Free memory was 81.6MB in the beginning and 81.6MB in the end (delta: 76.3kB). There was no memory consumed. Max. memory is 16.1GB. [2022-07-12 19:18:14,037 INFO L158 Benchmark]: CACSL2BoogieTranslator took 278.34ms. Allocated memory was 104.9MB in the beginning and 159.4MB in the end (delta: 54.5MB). Free memory was 63.1MB in the beginning and 133.2MB in the end (delta: -70.2MB). Peak memory consumption was 24.1MB. Max. memory is 16.1GB. [2022-07-12 19:18:14,037 INFO L158 Benchmark]: Boogie Procedure Inliner took 33.56ms. Allocated memory is still 159.4MB. Free memory was 133.2MB in the beginning and 131.1MB in the end (delta: 2.1MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-07-12 19:18:14,037 INFO L158 Benchmark]: Boogie Preprocessor took 18.83ms. Allocated memory is still 159.4MB. Free memory was 131.1MB in the beginning and 129.0MB in the end (delta: 2.1MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-07-12 19:18:14,037 INFO L158 Benchmark]: RCFGBuilder took 499.08ms. Allocated memory is still 159.4MB. Free memory was 129.0MB in the beginning and 110.8MB in the end (delta: 18.2MB). Peak memory consumption was 18.9MB. Max. memory is 16.1GB. [2022-07-12 19:18:14,038 INFO L158 Benchmark]: TraceAbstraction took 7349.76ms. Allocated memory was 159.4MB in the beginning and 192.9MB in the end (delta: 33.6MB). Free memory was 110.8MB in the beginning and 83.8MB in the end (delta: 27.0MB). Peak memory consumption was 59.8MB. Max. memory is 16.1GB. [2022-07-12 19:18:14,039 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17ms. Allocated memory is still 104.9MB. Free memory was 81.6MB in the beginning and 81.6MB in the end (delta: 76.3kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 278.34ms. Allocated memory was 104.9MB in the beginning and 159.4MB in the end (delta: 54.5MB). Free memory was 63.1MB in the beginning and 133.2MB in the end (delta: -70.2MB). Peak memory consumption was 24.1MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 33.56ms. Allocated memory is still 159.4MB. Free memory was 133.2MB in the beginning and 131.1MB in the end (delta: 2.1MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Boogie Preprocessor took 18.83ms. Allocated memory is still 159.4MB. Free memory was 131.1MB in the beginning and 129.0MB in the end (delta: 2.1MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * RCFGBuilder took 499.08ms. Allocated memory is still 159.4MB. Free memory was 129.0MB in the beginning and 110.8MB in the end (delta: 18.2MB). Peak memory consumption was 18.9MB. Max. memory is 16.1GB. * TraceAbstraction took 7349.76ms. Allocated memory was 159.4MB in the beginning and 192.9MB in the end (delta: 33.6MB). Free memory was 110.8MB in the beginning and 83.8MB in the end (delta: 27.0MB). Peak memory consumption was 59.8MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: SMTLIBException: line 55283 column 46: unknown constant v_#length_BEFORE_CALL_4 de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: line 55283 column 46: unknown constant v_#length_BEFORE_CALL_4: de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser$Action$.CUP$do_action(Parser.java:1458) RESULT: Ultimate could not prove your program: Toolchain returned no result. [2022-07-12 19:18:14,054 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 1 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerMemDerefMemtrack.xml -i ../sv-benchmarks/c/list-simple/sll2c_remove_all_reverse.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 3340815bef7e21ae2d4803d7059577c1761bb3b7b4bb24b2b34d5d0d0054fd10 --- Real Ultimate output --- This is Ultimate 0.2.2-?-6c24879 [2022-07-12 19:18:15,716 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-07-12 19:18:15,718 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-07-12 19:18:15,752 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-07-12 19:18:15,752 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-07-12 19:18:15,753 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-07-12 19:18:15,756 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-07-12 19:18:15,759 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-07-12 19:18:15,760 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-07-12 19:18:15,763 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-07-12 19:18:15,764 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-07-12 19:18:15,768 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-07-12 19:18:15,768 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-07-12 19:18:15,770 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-07-12 19:18:15,770 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-07-12 19:18:15,773 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-07-12 19:18:15,774 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-07-12 19:18:15,775 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-07-12 19:18:15,776 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-07-12 19:18:15,778 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-07-12 19:18:15,779 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-07-12 19:18:15,780 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-07-12 19:18:15,781 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-07-12 19:18:15,782 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-07-12 19:18:15,783 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-07-12 19:18:15,791 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-07-12 19:18:15,791 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-07-12 19:18:15,791 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-07-12 19:18:15,792 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-07-12 19:18:15,792 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-07-12 19:18:15,793 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-07-12 19:18:15,793 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-07-12 19:18:15,793 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-07-12 19:18:15,794 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-07-12 19:18:15,794 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-07-12 19:18:15,795 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-07-12 19:18:15,798 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-07-12 19:18:15,800 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-07-12 19:18:15,800 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-07-12 19:18:15,801 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-07-12 19:18:15,801 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-07-12 19:18:15,802 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-07-12 19:18:15,808 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Bitvector.epf [2022-07-12 19:18:15,832 INFO L113 SettingsManager]: Loading preferences was successful [2022-07-12 19:18:15,832 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-07-12 19:18:15,832 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-07-12 19:18:15,833 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-07-12 19:18:15,833 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-07-12 19:18:15,833 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-07-12 19:18:15,834 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-07-12 19:18:15,834 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-07-12 19:18:15,834 INFO L138 SettingsManager]: * Use SBE=true [2022-07-12 19:18:15,835 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-07-12 19:18:15,835 INFO L138 SettingsManager]: * sizeof long=4 [2022-07-12 19:18:15,835 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-07-12 19:18:15,835 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-07-12 19:18:15,835 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-07-12 19:18:15,835 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-07-12 19:18:15,836 INFO L138 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2022-07-12 19:18:15,836 INFO L138 SettingsManager]: * Bitprecise bitfields=true [2022-07-12 19:18:15,836 INFO L138 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2022-07-12 19:18:15,836 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-07-12 19:18:15,836 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-07-12 19:18:15,836 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2022-07-12 19:18:15,836 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2022-07-12 19:18:15,837 INFO L138 SettingsManager]: * sizeof long double=12 [2022-07-12 19:18:15,837 INFO L138 SettingsManager]: * Use constant arrays=true [2022-07-12 19:18:15,837 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-07-12 19:18:15,837 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-07-12 19:18:15,837 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-07-12 19:18:15,837 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-07-12 19:18:15,837 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-07-12 19:18:15,838 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-07-12 19:18:15,838 INFO L138 SettingsManager]: * Trace refinement strategy=WOLF [2022-07-12 19:18:15,838 INFO L138 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2022-07-12 19:18:15,838 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-07-12 19:18:15,838 INFO L138 SettingsManager]: * Logic for external solver=AUFBV WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 3340815bef7e21ae2d4803d7059577c1761bb3b7b4bb24b2b34d5d0d0054fd10 [2022-07-12 19:18:16,110 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-07-12 19:18:16,123 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-07-12 19:18:16,125 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-07-12 19:18:16,126 INFO L271 PluginConnector]: Initializing CDTParser... [2022-07-12 19:18:16,126 INFO L275 PluginConnector]: CDTParser initialized [2022-07-12 19:18:16,127 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/list-simple/sll2c_remove_all_reverse.i [2022-07-12 19:18:16,176 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/00d70d2da/3918bb96720741ed8bbc21e6263b3af5/FLAG8af696974 [2022-07-12 19:18:16,541 INFO L306 CDTParser]: Found 1 translation units. [2022-07-12 19:18:16,542 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/list-simple/sll2c_remove_all_reverse.i [2022-07-12 19:18:16,556 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/00d70d2da/3918bb96720741ed8bbc21e6263b3af5/FLAG8af696974 [2022-07-12 19:18:16,581 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/00d70d2da/3918bb96720741ed8bbc21e6263b3af5 [2022-07-12 19:18:16,583 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-07-12 19:18:16,584 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-07-12 19:18:16,584 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-07-12 19:18:16,585 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-07-12 19:18:16,587 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-07-12 19:18:16,588 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.07 07:18:16" (1/1) ... [2022-07-12 19:18:16,588 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@991cc3a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 07:18:16, skipping insertion in model container [2022-07-12 19:18:16,588 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.07 07:18:16" (1/1) ... [2022-07-12 19:18:16,593 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-07-12 19:18:16,628 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-07-12 19:18:16,875 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/list-simple/sll2c_remove_all_reverse.i[24151,24164] [2022-07-12 19:18:16,877 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-12 19:18:16,890 INFO L203 MainTranslator]: Completed pre-run [2022-07-12 19:18:16,923 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/list-simple/sll2c_remove_all_reverse.i[24151,24164] [2022-07-12 19:18:16,930 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-12 19:18:16,959 INFO L208 MainTranslator]: Completed translation [2022-07-12 19:18:16,960 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 07:18:16 WrapperNode [2022-07-12 19:18:16,960 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-07-12 19:18:16,961 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-07-12 19:18:16,961 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-07-12 19:18:16,961 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-07-12 19:18:16,966 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 07:18:16" (1/1) ... [2022-07-12 19:18:16,993 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 07:18:16" (1/1) ... [2022-07-12 19:18:17,016 INFO L137 Inliner]: procedures = 129, calls = 36, calls flagged for inlining = 5, calls inlined = 5, statements flattened = 126 [2022-07-12 19:18:17,016 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-07-12 19:18:17,017 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-07-12 19:18:17,017 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-07-12 19:18:17,017 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-07-12 19:18:17,023 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 07:18:16" (1/1) ... [2022-07-12 19:18:17,023 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 07:18:16" (1/1) ... [2022-07-12 19:18:17,034 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 07:18:16" (1/1) ... [2022-07-12 19:18:17,034 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 07:18:16" (1/1) ... [2022-07-12 19:18:17,039 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 07:18:16" (1/1) ... [2022-07-12 19:18:17,050 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 07:18:16" (1/1) ... [2022-07-12 19:18:17,053 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 07:18:16" (1/1) ... [2022-07-12 19:18:17,062 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-07-12 19:18:17,063 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-07-12 19:18:17,063 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-07-12 19:18:17,063 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-07-12 19:18:17,064 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 07:18:16" (1/1) ... [2022-07-12 19:18:17,071 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-07-12 19:18:17,079 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-12 19:18:17,090 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-07-12 19:18:17,094 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-07-12 19:18:17,126 INFO L130 BoogieDeclarations]: Found specification of procedure node_create [2022-07-12 19:18:17,126 INFO L138 BoogieDeclarations]: Found implementation of procedure node_create [2022-07-12 19:18:17,126 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-07-12 19:18:17,126 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-07-12 19:18:17,126 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-07-12 19:18:17,126 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-07-12 19:18:17,127 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-07-12 19:18:17,127 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-07-12 19:18:17,127 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2022-07-12 19:18:17,127 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-07-12 19:18:17,127 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1 [2022-07-12 19:18:17,127 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-07-12 19:18:17,127 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-07-12 19:18:17,200 INFO L234 CfgBuilder]: Building ICFG [2022-07-12 19:18:17,201 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-07-12 19:18:17,552 INFO L275 CfgBuilder]: Performing block encoding [2022-07-12 19:18:17,557 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-07-12 19:18:17,557 INFO L299 CfgBuilder]: Removed 4 assume(true) statements. [2022-07-12 19:18:17,558 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.07 07:18:17 BoogieIcfgContainer [2022-07-12 19:18:17,558 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-07-12 19:18:17,560 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-07-12 19:18:17,560 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-07-12 19:18:17,562 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-07-12 19:18:17,562 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 12.07 07:18:16" (1/3) ... [2022-07-12 19:18:17,562 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7e992677 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.07 07:18:17, skipping insertion in model container [2022-07-12 19:18:17,563 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.07 07:18:16" (2/3) ... [2022-07-12 19:18:17,563 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7e992677 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.07 07:18:17, skipping insertion in model container [2022-07-12 19:18:17,564 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.07 07:18:17" (3/3) ... [2022-07-12 19:18:17,565 INFO L111 eAbstractionObserver]: Analyzing ICFG sll2c_remove_all_reverse.i [2022-07-12 19:18:17,574 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-07-12 19:18:17,574 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 42 error locations. [2022-07-12 19:18:17,619 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-07-12 19:18:17,624 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@40e56946, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@4520d4fd [2022-07-12 19:18:17,624 INFO L358 AbstractCegarLoop]: Starting to check reachability of 42 error locations. [2022-07-12 19:18:17,627 INFO L276 IsEmpty]: Start isEmpty. Operand has 97 states, 51 states have (on average 2.0392156862745097) internal successors, (104), 93 states have internal predecessors, (104), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-07-12 19:18:17,632 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2022-07-12 19:18:17,633 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 19:18:17,633 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2022-07-12 19:18:17,634 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting node_createErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 39 more)] === [2022-07-12 19:18:17,638 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 19:18:17,638 INFO L85 PathProgramCache]: Analyzing trace with hash 894197909, now seen corresponding path program 1 times [2022-07-12 19:18:17,646 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-07-12 19:18:17,646 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [183811787] [2022-07-12 19:18:17,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:17,647 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-07-12 19:18:17,647 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat [2022-07-12 19:18:17,663 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-07-12 19:18:17,664 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2022-07-12 19:18:17,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:17,762 INFO L263 TraceCheckSpWp]: Trace formula consists of 50 conjuncts, 3 conjunts are in the unsatisfiable core [2022-07-12 19:18:17,766 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 19:18:17,812 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 19:18:17,833 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 19:18:17,834 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-07-12 19:18:17,835 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-07-12 19:18:17,835 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [183811787] [2022-07-12 19:18:17,836 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [183811787] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 19:18:17,837 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 19:18:17,837 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-07-12 19:18:17,838 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [475187880] [2022-07-12 19:18:17,838 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 19:18:17,841 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-07-12 19:18:17,841 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-07-12 19:18:17,865 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-07-12 19:18:17,866 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-12 19:18:17,868 INFO L87 Difference]: Start difference. First operand has 97 states, 51 states have (on average 2.0392156862745097) internal successors, (104), 93 states have internal predecessors, (104), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand has 3 states, 2 states have (on average 2.5) internal successors, (5), 3 states have internal predecessors, (5), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 19:18:18,002 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 19:18:18,003 INFO L93 Difference]: Finished difference Result 95 states and 101 transitions. [2022-07-12 19:18:18,004 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-07-12 19:18:18,005 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 2.5) internal successors, (5), 3 states have internal predecessors, (5), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 6 [2022-07-12 19:18:18,005 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 19:18:18,010 INFO L225 Difference]: With dead ends: 95 [2022-07-12 19:18:18,010 INFO L226 Difference]: Without dead ends: 92 [2022-07-12 19:18:18,011 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-12 19:18:18,015 INFO L413 NwaCegarLoop]: 94 mSDtfsCounter, 8 mSDsluCounter, 50 mSDsCounter, 0 mSdLazyCounter, 48 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 144 SdHoareTripleChecker+Invalid, 49 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 48 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-07-12 19:18:18,016 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [8 Valid, 144 Invalid, 49 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 48 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-07-12 19:18:18,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states. [2022-07-12 19:18:18,042 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 92. [2022-07-12 19:18:18,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 92 states, 49 states have (on average 1.8979591836734695) internal successors, (93), 88 states have internal predecessors, (93), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-07-12 19:18:18,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 97 transitions. [2022-07-12 19:18:18,052 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 97 transitions. Word has length 6 [2022-07-12 19:18:18,052 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 19:18:18,052 INFO L495 AbstractCegarLoop]: Abstraction has 92 states and 97 transitions. [2022-07-12 19:18:18,052 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 2.5) internal successors, (5), 3 states have internal predecessors, (5), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 19:18:18,052 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 97 transitions. [2022-07-12 19:18:18,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2022-07-12 19:18:18,053 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 19:18:18,053 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2022-07-12 19:18:18,068 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (2)] Forceful destruction successful, exit code 0 [2022-07-12 19:18:18,259 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 [2022-07-12 19:18:18,260 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting node_createErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 39 more)] === [2022-07-12 19:18:18,260 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 19:18:18,261 INFO L85 PathProgramCache]: Analyzing trace with hash 894197910, now seen corresponding path program 1 times [2022-07-12 19:18:18,261 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-07-12 19:18:18,263 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1964575008] [2022-07-12 19:18:18,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:18,264 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-07-12 19:18:18,264 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat [2022-07-12 19:18:18,269 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-07-12 19:18:18,277 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2022-07-12 19:18:18,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:18,317 INFO L263 TraceCheckSpWp]: Trace formula consists of 50 conjuncts, 4 conjunts are in the unsatisfiable core [2022-07-12 19:18:18,318 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 19:18:18,325 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 19:18:18,336 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 19:18:18,337 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-07-12 19:18:18,337 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-07-12 19:18:18,337 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1964575008] [2022-07-12 19:18:18,337 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1964575008] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 19:18:18,337 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 19:18:18,337 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-07-12 19:18:18,338 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [977380813] [2022-07-12 19:18:18,338 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 19:18:18,338 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-07-12 19:18:18,339 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-07-12 19:18:18,339 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-07-12 19:18:18,339 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-12 19:18:18,339 INFO L87 Difference]: Start difference. First operand 92 states and 97 transitions. Second operand has 3 states, 2 states have (on average 2.5) internal successors, (5), 3 states have internal predecessors, (5), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 19:18:18,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 19:18:18,437 INFO L93 Difference]: Finished difference Result 90 states and 95 transitions. [2022-07-12 19:18:18,438 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-07-12 19:18:18,438 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 2.5) internal successors, (5), 3 states have internal predecessors, (5), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 6 [2022-07-12 19:18:18,438 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 19:18:18,439 INFO L225 Difference]: With dead ends: 90 [2022-07-12 19:18:18,439 INFO L226 Difference]: Without dead ends: 90 [2022-07-12 19:18:18,439 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-12 19:18:18,440 INFO L413 NwaCegarLoop]: 91 mSDtfsCounter, 4 mSDsluCounter, 55 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 146 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-07-12 19:18:18,441 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 146 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-07-12 19:18:18,441 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2022-07-12 19:18:18,444 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 90. [2022-07-12 19:18:18,444 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 90 states, 49 states have (on average 1.8571428571428572) internal successors, (91), 86 states have internal predecessors, (91), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-07-12 19:18:18,445 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 95 transitions. [2022-07-12 19:18:18,445 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 95 transitions. Word has length 6 [2022-07-12 19:18:18,446 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 19:18:18,446 INFO L495 AbstractCegarLoop]: Abstraction has 90 states and 95 transitions. [2022-07-12 19:18:18,446 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 2.5) internal successors, (5), 3 states have internal predecessors, (5), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-12 19:18:18,446 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 95 transitions. [2022-07-12 19:18:18,446 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-07-12 19:18:18,446 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 19:18:18,447 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 19:18:18,457 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (3)] Forceful destruction successful, exit code 0 [2022-07-12 19:18:18,657 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 [2022-07-12 19:18:18,657 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 39 more)] === [2022-07-12 19:18:18,658 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 19:18:18,658 INFO L85 PathProgramCache]: Analyzing trace with hash 1984336343, now seen corresponding path program 1 times [2022-07-12 19:18:18,659 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-07-12 19:18:18,659 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1109499058] [2022-07-12 19:18:18,659 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:18,659 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-07-12 19:18:18,659 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat [2022-07-12 19:18:18,663 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-07-12 19:18:18,675 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (4)] Waiting until timeout for monitored process [2022-07-12 19:18:18,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:18,748 INFO L263 TraceCheckSpWp]: Trace formula consists of 86 conjuncts, 4 conjunts are in the unsatisfiable core [2022-07-12 19:18:18,749 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 19:18:18,767 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 19:18:18,767 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-07-12 19:18:18,769 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-07-12 19:18:18,770 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1109499058] [2022-07-12 19:18:18,770 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1109499058] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 19:18:18,770 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 19:18:18,770 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-07-12 19:18:18,770 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1947220959] [2022-07-12 19:18:18,771 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 19:18:18,771 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-07-12 19:18:18,771 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-07-12 19:18:18,771 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-07-12 19:18:18,772 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-12 19:18:18,772 INFO L87 Difference]: Start difference. First operand 90 states and 95 transitions. Second operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 3 states have internal predecessors, (11), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-07-12 19:18:18,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 19:18:18,779 INFO L93 Difference]: Finished difference Result 97 states and 103 transitions. [2022-07-12 19:18:18,780 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-07-12 19:18:18,780 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 3 states have internal predecessors, (11), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-07-12 19:18:18,780 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 19:18:18,780 INFO L225 Difference]: With dead ends: 97 [2022-07-12 19:18:18,781 INFO L226 Difference]: Without dead ends: 97 [2022-07-12 19:18:18,781 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-12 19:18:18,782 INFO L413 NwaCegarLoop]: 94 mSDtfsCounter, 5 mSDsluCounter, 89 mSDsCounter, 0 mSdLazyCounter, 5 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 183 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 5 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-07-12 19:18:18,782 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 183 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 5 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-07-12 19:18:18,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2022-07-12 19:18:18,786 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 91. [2022-07-12 19:18:18,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 50 states have (on average 1.84) internal successors, (92), 87 states have internal predecessors, (92), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-07-12 19:18:18,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 96 transitions. [2022-07-12 19:18:18,787 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 96 transitions. Word has length 13 [2022-07-12 19:18:18,788 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 19:18:18,788 INFO L495 AbstractCegarLoop]: Abstraction has 91 states and 96 transitions. [2022-07-12 19:18:18,788 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 3 states have internal predecessors, (11), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-07-12 19:18:18,788 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 96 transitions. [2022-07-12 19:18:18,788 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-07-12 19:18:18,789 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 19:18:18,789 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 19:18:18,815 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (4)] Forceful destruction successful, exit code 0 [2022-07-12 19:18:18,995 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 [2022-07-12 19:18:18,996 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 39 more)] === [2022-07-12 19:18:18,996 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 19:18:18,996 INFO L85 PathProgramCache]: Analyzing trace with hash 305697820, now seen corresponding path program 1 times [2022-07-12 19:18:18,997 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-07-12 19:18:18,997 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [155332668] [2022-07-12 19:18:18,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:18,997 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-07-12 19:18:18,997 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat [2022-07-12 19:18:19,005 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-07-12 19:18:19,012 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (5)] Waiting until timeout for monitored process [2022-07-12 19:18:19,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:19,080 INFO L263 TraceCheckSpWp]: Trace formula consists of 140 conjuncts, 6 conjunts are in the unsatisfiable core [2022-07-12 19:18:19,081 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 19:18:19,086 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 19:18:19,110 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-07-12 19:18:19,111 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-07-12 19:18:19,111 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-07-12 19:18:19,111 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [155332668] [2022-07-12 19:18:19,111 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [155332668] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 19:18:19,111 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 19:18:19,111 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-07-12 19:18:19,111 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [531450700] [2022-07-12 19:18:19,111 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 19:18:19,112 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-07-12 19:18:19,112 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-07-12 19:18:19,112 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-07-12 19:18:19,112 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-07-12 19:18:19,112 INFO L87 Difference]: Start difference. First operand 91 states and 96 transitions. Second operand has 6 states, 5 states have (on average 3.6) internal successors, (18), 5 states have internal predecessors, (18), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-07-12 19:18:19,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 19:18:19,344 INFO L93 Difference]: Finished difference Result 144 states and 154 transitions. [2022-07-12 19:18:19,344 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-07-12 19:18:19,345 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 3.6) internal successors, (18), 5 states have internal predecessors, (18), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 22 [2022-07-12 19:18:19,345 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 19:18:19,346 INFO L225 Difference]: With dead ends: 144 [2022-07-12 19:18:19,346 INFO L226 Difference]: Without dead ends: 144 [2022-07-12 19:18:19,346 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-07-12 19:18:19,347 INFO L413 NwaCegarLoop]: 62 mSDtfsCounter, 66 mSDsluCounter, 185 mSDsCounter, 0 mSdLazyCounter, 217 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 66 SdHoareTripleChecker+Valid, 247 SdHoareTripleChecker+Invalid, 217 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 217 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-07-12 19:18:19,347 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [66 Valid, 247 Invalid, 217 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 217 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-07-12 19:18:19,348 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2022-07-12 19:18:19,350 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 90. [2022-07-12 19:18:19,350 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 90 states, 50 states have (on average 1.82) internal successors, (91), 86 states have internal predecessors, (91), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-07-12 19:18:19,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 95 transitions. [2022-07-12 19:18:19,353 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 95 transitions. Word has length 22 [2022-07-12 19:18:19,354 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 19:18:19,354 INFO L495 AbstractCegarLoop]: Abstraction has 90 states and 95 transitions. [2022-07-12 19:18:19,354 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 3.6) internal successors, (18), 5 states have internal predecessors, (18), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-07-12 19:18:19,354 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 95 transitions. [2022-07-12 19:18:19,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-07-12 19:18:19,355 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 19:18:19,355 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 19:18:19,379 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (5)] Forceful destruction successful, exit code 0 [2022-07-12 19:18:19,562 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 [2022-07-12 19:18:19,563 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 39 more)] === [2022-07-12 19:18:19,563 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 19:18:19,563 INFO L85 PathProgramCache]: Analyzing trace with hash 305697821, now seen corresponding path program 1 times [2022-07-12 19:18:19,564 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-07-12 19:18:19,564 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1537287936] [2022-07-12 19:18:19,564 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:19,564 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-07-12 19:18:19,564 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat [2022-07-12 19:18:19,569 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-07-12 19:18:19,571 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (6)] Waiting until timeout for monitored process [2022-07-12 19:18:19,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:19,644 INFO L263 TraceCheckSpWp]: Trace formula consists of 140 conjuncts, 10 conjunts are in the unsatisfiable core [2022-07-12 19:18:19,646 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 19:18:19,652 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 19:18:19,707 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-07-12 19:18:19,707 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-07-12 19:18:19,707 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-07-12 19:18:19,708 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1537287936] [2022-07-12 19:18:19,708 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1537287936] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 19:18:19,708 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 19:18:19,708 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-07-12 19:18:19,708 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [383389425] [2022-07-12 19:18:19,708 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 19:18:19,709 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-07-12 19:18:19,709 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-07-12 19:18:19,709 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-07-12 19:18:19,709 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-07-12 19:18:19,709 INFO L87 Difference]: Start difference. First operand 90 states and 95 transitions. Second operand has 6 states, 5 states have (on average 3.6) internal successors, (18), 5 states have internal predecessors, (18), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-07-12 19:18:19,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 19:18:19,933 INFO L93 Difference]: Finished difference Result 90 states and 96 transitions. [2022-07-12 19:18:19,933 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-07-12 19:18:19,933 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 3.6) internal successors, (18), 5 states have internal predecessors, (18), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 22 [2022-07-12 19:18:19,934 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 19:18:19,934 INFO L225 Difference]: With dead ends: 90 [2022-07-12 19:18:19,934 INFO L226 Difference]: Without dead ends: 90 [2022-07-12 19:18:19,935 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-07-12 19:18:19,935 INFO L413 NwaCegarLoop]: 61 mSDtfsCounter, 81 mSDsluCounter, 165 mSDsCounter, 0 mSdLazyCounter, 164 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 81 SdHoareTripleChecker+Valid, 226 SdHoareTripleChecker+Invalid, 164 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 164 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-07-12 19:18:19,935 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [81 Valid, 226 Invalid, 164 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 164 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-07-12 19:18:19,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2022-07-12 19:18:19,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 89. [2022-07-12 19:18:19,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 89 states, 50 states have (on average 1.8) internal successors, (90), 85 states have internal predecessors, (90), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-07-12 19:18:19,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 94 transitions. [2022-07-12 19:18:19,939 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 94 transitions. Word has length 22 [2022-07-12 19:18:19,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 19:18:19,939 INFO L495 AbstractCegarLoop]: Abstraction has 89 states and 94 transitions. [2022-07-12 19:18:19,939 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 3.6) internal successors, (18), 5 states have internal predecessors, (18), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-07-12 19:18:19,939 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 94 transitions. [2022-07-12 19:18:19,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-07-12 19:18:19,940 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 19:18:19,940 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 19:18:19,950 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (6)] Forceful destruction successful, exit code 0 [2022-07-12 19:18:20,147 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 [2022-07-12 19:18:20,147 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 39 more)] === [2022-07-12 19:18:20,148 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 19:18:20,148 INFO L85 PathProgramCache]: Analyzing trace with hash 1713076933, now seen corresponding path program 1 times [2022-07-12 19:18:20,148 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-07-12 19:18:20,148 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2060034218] [2022-07-12 19:18:20,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:20,148 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-07-12 19:18:20,149 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat [2022-07-12 19:18:20,150 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-07-12 19:18:20,151 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (7)] Waiting until timeout for monitored process [2022-07-12 19:18:20,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:20,229 INFO L263 TraceCheckSpWp]: Trace formula consists of 157 conjuncts, 11 conjunts are in the unsatisfiable core [2022-07-12 19:18:20,231 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 19:18:20,234 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 19:18:20,367 INFO L356 Elim1Store]: treesize reduction 15, result has 46.4 percent of original size [2022-07-12 19:18:20,368 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 24 [2022-07-12 19:18:20,387 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-07-12 19:18:20,387 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-12 19:18:20,519 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-07-12 19:18:20,519 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-07-12 19:18:20,519 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2060034218] [2022-07-12 19:18:20,519 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2060034218] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-12 19:18:20,519 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-07-12 19:18:20,520 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6] total 8 [2022-07-12 19:18:20,520 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1672365910] [2022-07-12 19:18:20,520 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-07-12 19:18:20,520 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-07-12 19:18:20,520 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-07-12 19:18:20,521 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-07-12 19:18:20,521 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2022-07-12 19:18:20,521 INFO L87 Difference]: Start difference. First operand 89 states and 94 transitions. Second operand has 9 states, 8 states have (on average 3.375) internal successors, (27), 7 states have internal predecessors, (27), 2 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-07-12 19:18:20,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 19:18:20,753 INFO L93 Difference]: Finished difference Result 148 states and 156 transitions. [2022-07-12 19:18:20,754 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-07-12 19:18:20,754 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 8 states have (on average 3.375) internal successors, (27), 7 states have internal predecessors, (27), 2 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 25 [2022-07-12 19:18:20,754 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 19:18:20,754 INFO L225 Difference]: With dead ends: 148 [2022-07-12 19:18:20,754 INFO L226 Difference]: Without dead ends: 148 [2022-07-12 19:18:20,755 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 38 SyntacticMatches, 3 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=34, Invalid=98, Unknown=0, NotChecked=0, Total=132 [2022-07-12 19:18:20,755 INFO L413 NwaCegarLoop]: 59 mSDtfsCounter, 60 mSDsluCounter, 269 mSDsCounter, 0 mSdLazyCounter, 207 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 60 SdHoareTripleChecker+Valid, 328 SdHoareTripleChecker+Invalid, 303 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 207 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 96 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-07-12 19:18:20,755 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [60 Valid, 328 Invalid, 303 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 207 Invalid, 0 Unknown, 96 Unchecked, 0.2s Time] [2022-07-12 19:18:20,756 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2022-07-12 19:18:20,759 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 95. [2022-07-12 19:18:20,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 95 states, 56 states have (on average 1.6964285714285714) internal successors, (95), 90 states have internal predecessors, (95), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-07-12 19:18:20,759 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 99 transitions. [2022-07-12 19:18:20,759 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 99 transitions. Word has length 25 [2022-07-12 19:18:20,759 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 19:18:20,759 INFO L495 AbstractCegarLoop]: Abstraction has 95 states and 99 transitions. [2022-07-12 19:18:20,760 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 8 states have (on average 3.375) internal successors, (27), 7 states have internal predecessors, (27), 2 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-07-12 19:18:20,760 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 99 transitions. [2022-07-12 19:18:20,760 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-07-12 19:18:20,760 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 19:18:20,760 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 19:18:20,767 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (7)] Ended with exit code 0 [2022-07-12 19:18:20,967 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 [2022-07-12 19:18:20,967 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 39 more)] === [2022-07-12 19:18:20,968 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 19:18:20,968 INFO L85 PathProgramCache]: Analyzing trace with hash 1713076934, now seen corresponding path program 1 times [2022-07-12 19:18:20,968 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-07-12 19:18:20,968 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [936391004] [2022-07-12 19:18:20,968 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:20,969 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-07-12 19:18:20,969 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat [2022-07-12 19:18:20,970 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-07-12 19:18:20,971 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (8)] Waiting until timeout for monitored process [2022-07-12 19:18:21,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:21,053 INFO L263 TraceCheckSpWp]: Trace formula consists of 157 conjuncts, 20 conjunts are in the unsatisfiable core [2022-07-12 19:18:21,055 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 19:18:21,059 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 19:18:21,063 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 19:18:23,223 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 19:18:23,225 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2022-07-12 19:18:23,232 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-07-12 19:18:23,233 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-07-12 19:18:23,291 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 19:18:23,292 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-12 19:18:27,615 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-07-12 19:18:27,616 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [936391004] [2022-07-12 19:18:27,616 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [936391004] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 19:18:27,616 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1193474767] [2022-07-12 19:18:27,616 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:27,616 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-07-12 19:18:27,616 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 [2022-07-12 19:18:27,618 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-07-12 19:18:27,621 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (9)] Waiting until timeout for monitored process [2022-07-12 19:18:27,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:27,763 INFO L263 TraceCheckSpWp]: Trace formula consists of 157 conjuncts, 20 conjunts are in the unsatisfiable core [2022-07-12 19:18:27,765 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 19:18:27,770 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 19:18:27,775 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 19:18:27,901 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 19:18:27,902 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2022-07-12 19:18:27,910 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-07-12 19:18:27,911 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-07-12 19:18:27,927 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 19:18:27,927 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-12 19:18:28,304 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1193474767] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 19:18:28,304 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-07-12 19:18:28,304 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 8 [2022-07-12 19:18:28,304 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1171374746] [2022-07-12 19:18:28,304 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-07-12 19:18:28,305 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-07-12 19:18:28,305 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-07-12 19:18:28,305 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-07-12 19:18:28,305 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=86, Unknown=1, NotChecked=0, Total=110 [2022-07-12 19:18:28,305 INFO L87 Difference]: Start difference. First operand 95 states and 99 transitions. Second operand has 9 states, 8 states have (on average 2.625) internal successors, (21), 7 states have internal predecessors, (21), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-07-12 19:18:28,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 19:18:28,784 INFO L93 Difference]: Finished difference Result 224 states and 238 transitions. [2022-07-12 19:18:28,785 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-07-12 19:18:28,785 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 8 states have (on average 2.625) internal successors, (21), 7 states have internal predecessors, (21), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 25 [2022-07-12 19:18:28,785 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 19:18:28,786 INFO L225 Difference]: With dead ends: 224 [2022-07-12 19:18:28,786 INFO L226 Difference]: Without dead ends: 224 [2022-07-12 19:18:28,786 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 49 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 6.7s TimeCoverageRelationStatistics Valid=31, Invalid=124, Unknown=1, NotChecked=0, Total=156 [2022-07-12 19:18:28,786 INFO L413 NwaCegarLoop]: 43 mSDtfsCounter, 128 mSDsluCounter, 265 mSDsCounter, 0 mSdLazyCounter, 340 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 128 SdHoareTripleChecker+Valid, 308 SdHoareTripleChecker+Invalid, 464 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 340 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 116 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-07-12 19:18:28,786 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [128 Valid, 308 Invalid, 464 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 340 Invalid, 0 Unknown, 116 Unchecked, 0.4s Time] [2022-07-12 19:18:28,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2022-07-12 19:18:28,790 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 101. [2022-07-12 19:18:28,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 61 states have (on average 1.6557377049180328) internal successors, (101), 95 states have internal predecessors, (101), 3 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-07-12 19:18:28,791 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 107 transitions. [2022-07-12 19:18:28,791 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 107 transitions. Word has length 25 [2022-07-12 19:18:28,792 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 19:18:28,792 INFO L495 AbstractCegarLoop]: Abstraction has 101 states and 107 transitions. [2022-07-12 19:18:28,792 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 8 states have (on average 2.625) internal successors, (21), 7 states have internal predecessors, (21), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-07-12 19:18:28,792 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 107 transitions. [2022-07-12 19:18:28,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-07-12 19:18:28,793 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 19:18:28,793 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 19:18:28,800 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (9)] Ended with exit code 0 [2022-07-12 19:18:29,000 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (8)] Forceful destruction successful, exit code 0 [2022-07-12 19:18:29,193 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 [2022-07-12 19:18:29,194 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr35REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 39 more)] === [2022-07-12 19:18:29,195 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 19:18:29,195 INFO L85 PathProgramCache]: Analyzing trace with hash -1566263260, now seen corresponding path program 1 times [2022-07-12 19:18:29,195 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-07-12 19:18:29,195 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [888868552] [2022-07-12 19:18:29,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:29,195 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-07-12 19:18:29,195 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat [2022-07-12 19:18:29,196 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-07-12 19:18:29,197 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (10)] Waiting until timeout for monitored process [2022-07-12 19:18:29,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:29,319 INFO L263 TraceCheckSpWp]: Trace formula consists of 176 conjuncts, 3 conjunts are in the unsatisfiable core [2022-07-12 19:18:29,320 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 19:18:29,345 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2022-07-12 19:18:29,345 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-07-12 19:18:29,345 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-07-12 19:18:29,346 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [888868552] [2022-07-12 19:18:29,346 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [888868552] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 19:18:29,346 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 19:18:29,346 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-07-12 19:18:29,346 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [104953996] [2022-07-12 19:18:29,346 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 19:18:29,346 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-07-12 19:18:29,347 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-07-12 19:18:29,347 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-07-12 19:18:29,349 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-07-12 19:18:29,349 INFO L87 Difference]: Start difference. First operand 101 states and 107 transitions. Second operand has 4 states, 4 states have (on average 4.75) internal successors, (19), 4 states have internal predecessors, (19), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-07-12 19:18:29,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 19:18:29,374 INFO L93 Difference]: Finished difference Result 160 states and 169 transitions. [2022-07-12 19:18:29,375 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-07-12 19:18:29,375 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 4.75) internal successors, (19), 4 states have internal predecessors, (19), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 29 [2022-07-12 19:18:29,375 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 19:18:29,376 INFO L225 Difference]: With dead ends: 160 [2022-07-12 19:18:29,376 INFO L226 Difference]: Without dead ends: 160 [2022-07-12 19:18:29,376 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-07-12 19:18:29,376 INFO L413 NwaCegarLoop]: 89 mSDtfsCounter, 133 mSDsluCounter, 94 mSDsCounter, 0 mSdLazyCounter, 9 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 133 SdHoareTripleChecker+Valid, 183 SdHoareTripleChecker+Invalid, 10 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 9 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-07-12 19:18:29,377 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [133 Valid, 183 Invalid, 10 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 9 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-07-12 19:18:29,377 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2022-07-12 19:18:29,385 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 102. [2022-07-12 19:18:29,386 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 102 states, 62 states have (on average 1.6451612903225807) internal successors, (102), 96 states have internal predecessors, (102), 3 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-07-12 19:18:29,387 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 108 transitions. [2022-07-12 19:18:29,387 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 108 transitions. Word has length 29 [2022-07-12 19:18:29,387 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 19:18:29,387 INFO L495 AbstractCegarLoop]: Abstraction has 102 states and 108 transitions. [2022-07-12 19:18:29,387 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 4.75) internal successors, (19), 4 states have internal predecessors, (19), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-07-12 19:18:29,388 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 108 transitions. [2022-07-12 19:18:29,388 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-07-12 19:18:29,388 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 19:18:29,388 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 19:18:29,395 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (10)] Forceful destruction successful, exit code 0 [2022-07-12 19:18:29,595 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 [2022-07-12 19:18:29,596 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr4REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 39 more)] === [2022-07-12 19:18:29,596 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 19:18:29,596 INFO L85 PathProgramCache]: Analyzing trace with hash -1566263288, now seen corresponding path program 1 times [2022-07-12 19:18:29,596 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-07-12 19:18:29,596 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [375676851] [2022-07-12 19:18:29,596 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:29,596 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-07-12 19:18:29,597 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat [2022-07-12 19:18:29,598 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-07-12 19:18:29,599 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (11)] Waiting until timeout for monitored process [2022-07-12 19:18:29,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:29,714 INFO L263 TraceCheckSpWp]: Trace formula consists of 180 conjuncts, 17 conjunts are in the unsatisfiable core [2022-07-12 19:18:29,716 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 19:18:29,720 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 19:18:29,798 INFO L356 Elim1Store]: treesize reduction 8, result has 60.0 percent of original size [2022-07-12 19:18:29,799 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 21 [2022-07-12 19:18:29,905 INFO L356 Elim1Store]: treesize reduction 8, result has 60.0 percent of original size [2022-07-12 19:18:29,905 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 27 [2022-07-12 19:18:30,054 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-07-12 19:18:30,054 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-12 19:18:30,385 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-07-12 19:18:30,386 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-07-12 19:18:30,386 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [375676851] [2022-07-12 19:18:30,386 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [375676851] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-12 19:18:30,386 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-07-12 19:18:30,386 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 15 [2022-07-12 19:18:30,386 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [758034255] [2022-07-12 19:18:30,386 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-07-12 19:18:30,386 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-07-12 19:18:30,386 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-07-12 19:18:30,387 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-07-12 19:18:30,387 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=189, Unknown=0, NotChecked=0, Total=240 [2022-07-12 19:18:30,387 INFO L87 Difference]: Start difference. First operand 102 states and 108 transitions. Second operand has 16 states, 15 states have (on average 2.8) internal successors, (42), 13 states have internal predecessors, (42), 2 states have call successors, (4), 2 states have call predecessors, (4), 4 states have return successors, (4), 3 states have call predecessors, (4), 2 states have call successors, (4) [2022-07-12 19:18:30,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 19:18:30,641 INFO L93 Difference]: Finished difference Result 139 states and 148 transitions. [2022-07-12 19:18:30,641 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-07-12 19:18:30,641 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 15 states have (on average 2.8) internal successors, (42), 13 states have internal predecessors, (42), 2 states have call successors, (4), 2 states have call predecessors, (4), 4 states have return successors, (4), 3 states have call predecessors, (4), 2 states have call successors, (4) Word has length 29 [2022-07-12 19:18:30,641 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 19:18:30,642 INFO L225 Difference]: With dead ends: 139 [2022-07-12 19:18:30,643 INFO L226 Difference]: Without dead ends: 139 [2022-07-12 19:18:30,643 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 39 SyntacticMatches, 4 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 74 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=80, Invalid=300, Unknown=0, NotChecked=0, Total=380 [2022-07-12 19:18:30,647 INFO L413 NwaCegarLoop]: 51 mSDtfsCounter, 235 mSDsluCounter, 344 mSDsCounter, 0 mSdLazyCounter, 163 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 235 SdHoareTripleChecker+Valid, 395 SdHoareTripleChecker+Invalid, 296 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 163 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 119 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-07-12 19:18:30,647 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [235 Valid, 395 Invalid, 296 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 163 Invalid, 0 Unknown, 119 Unchecked, 0.2s Time] [2022-07-12 19:18:30,648 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2022-07-12 19:18:30,650 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 99. [2022-07-12 19:18:30,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 99 states, 63 states have (on average 1.5873015873015872) internal successors, (100), 93 states have internal predecessors, (100), 3 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-07-12 19:18:30,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 106 transitions. [2022-07-12 19:18:30,651 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 106 transitions. Word has length 29 [2022-07-12 19:18:30,651 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 19:18:30,651 INFO L495 AbstractCegarLoop]: Abstraction has 99 states and 106 transitions. [2022-07-12 19:18:30,651 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 15 states have (on average 2.8) internal successors, (42), 13 states have internal predecessors, (42), 2 states have call successors, (4), 2 states have call predecessors, (4), 4 states have return successors, (4), 3 states have call predecessors, (4), 2 states have call successors, (4) [2022-07-12 19:18:30,651 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 106 transitions. [2022-07-12 19:18:30,653 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-07-12 19:18:30,653 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 19:18:30,653 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 19:18:30,663 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (11)] Forceful destruction successful, exit code 0 [2022-07-12 19:18:30,861 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 [2022-07-12 19:18:30,861 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 39 more)] === [2022-07-12 19:18:30,862 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 19:18:30,862 INFO L85 PathProgramCache]: Analyzing trace with hash -1566263287, now seen corresponding path program 1 times [2022-07-12 19:18:30,862 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-07-12 19:18:30,862 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1627708659] [2022-07-12 19:18:30,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:30,862 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-07-12 19:18:30,862 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat [2022-07-12 19:18:30,864 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-07-12 19:18:30,865 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (12)] Waiting until timeout for monitored process [2022-07-12 19:18:30,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:30,979 INFO L263 TraceCheckSpWp]: Trace formula consists of 180 conjuncts, 20 conjunts are in the unsatisfiable core [2022-07-12 19:18:30,981 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 19:18:30,987 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 19:18:30,990 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 19:18:31,059 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 19:18:31,060 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2022-07-12 19:18:31,067 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-07-12 19:18:31,067 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-07-12 19:18:31,126 INFO L356 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-07-12 19:18:31,127 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 18 [2022-07-12 19:18:31,243 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 19:18:31,243 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-12 19:18:31,516 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-07-12 19:18:31,516 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1627708659] [2022-07-12 19:18:31,516 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1627708659] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 19:18:31,516 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [2070944632] [2022-07-12 19:18:31,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:31,517 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-07-12 19:18:31,517 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 [2022-07-12 19:18:31,518 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-07-12 19:18:31,519 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (13)] Waiting until timeout for monitored process [2022-07-12 19:18:31,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:31,678 INFO L263 TraceCheckSpWp]: Trace formula consists of 180 conjuncts, 17 conjunts are in the unsatisfiable core [2022-07-12 19:18:31,680 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 19:18:31,687 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 19:18:31,714 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-07-12 19:18:33,840 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 19:18:33,841 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2022-07-12 19:18:33,899 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-07-12 19:18:34,013 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-12 19:18:34,014 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2022-07-12 19:18:34,141 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-07-12 19:18:34,142 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-12 19:18:34,968 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [2070944632] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 19:18:34,968 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-07-12 19:18:34,969 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8] total 16 [2022-07-12 19:18:34,969 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1325008696] [2022-07-12 19:18:34,969 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-07-12 19:18:34,969 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-07-12 19:18:34,969 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-07-12 19:18:34,969 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-07-12 19:18:34,970 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=352, Unknown=1, NotChecked=0, Total=420 [2022-07-12 19:18:34,970 INFO L87 Difference]: Start difference. First operand 99 states and 106 transitions. Second operand has 17 states, 14 states have (on average 3.142857142857143) internal successors, (44), 13 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-07-12 19:18:39,354 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 19:18:39,354 INFO L93 Difference]: Finished difference Result 128 states and 137 transitions. [2022-07-12 19:18:39,354 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-07-12 19:18:39,354 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 14 states have (on average 3.142857142857143) internal successors, (44), 13 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Word has length 29 [2022-07-12 19:18:39,355 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 19:18:39,356 INFO L225 Difference]: With dead ends: 128 [2022-07-12 19:18:39,356 INFO L226 Difference]: Without dead ends: 128 [2022-07-12 19:18:39,356 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 57 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 142 ImplicationChecksByTransitivity, 7.5s TimeCoverageRelationStatistics Valid=105, Invalid=594, Unknown=3, NotChecked=0, Total=702 [2022-07-12 19:18:39,356 INFO L413 NwaCegarLoop]: 81 mSDtfsCounter, 11 mSDsluCounter, 429 mSDsCounter, 0 mSdLazyCounter, 110 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 11 SdHoareTripleChecker+Valid, 510 SdHoareTripleChecker+Invalid, 343 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 110 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 229 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-07-12 19:18:39,357 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [11 Valid, 510 Invalid, 343 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 110 Invalid, 0 Unknown, 229 Unchecked, 0.2s Time] [2022-07-12 19:18:39,357 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2022-07-12 19:18:39,360 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 123. [2022-07-12 19:18:39,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 123 states, 84 states have (on average 1.4642857142857142) internal successors, (123), 114 states have internal predecessors, (123), 4 states have call successors, (4), 4 states have call predecessors, (4), 4 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-07-12 19:18:39,363 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 131 transitions. [2022-07-12 19:18:39,364 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 131 transitions. Word has length 29 [2022-07-12 19:18:39,364 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 19:18:39,364 INFO L495 AbstractCegarLoop]: Abstraction has 123 states and 131 transitions. [2022-07-12 19:18:39,364 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 14 states have (on average 3.142857142857143) internal successors, (44), 13 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-07-12 19:18:39,364 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 131 transitions. [2022-07-12 19:18:39,367 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-07-12 19:18:39,368 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 19:18:39,368 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 19:18:39,372 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (13)] Forceful destruction successful, exit code 0 [2022-07-12 19:18:39,580 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (12)] Ended with exit code 0 [2022-07-12 19:18:39,771 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt,12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 [2022-07-12 19:18:39,771 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr6REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 39 more)] === [2022-07-12 19:18:39,772 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 19:18:39,772 INFO L85 PathProgramCache]: Analyzing trace with hash -1940465843, now seen corresponding path program 1 times [2022-07-12 19:18:39,772 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-07-12 19:18:39,772 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [691595400] [2022-07-12 19:18:39,772 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:39,772 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-07-12 19:18:39,772 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat [2022-07-12 19:18:39,774 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-07-12 19:18:39,775 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (14)] Waiting until timeout for monitored process [2022-07-12 19:18:39,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:39,886 INFO L263 TraceCheckSpWp]: Trace formula consists of 188 conjuncts, 15 conjunts are in the unsatisfiable core [2022-07-12 19:18:39,888 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 19:18:39,891 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 19:18:39,970 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2022-07-12 19:18:39,996 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-07-12 19:18:39,996 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-07-12 19:18:39,996 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-07-12 19:18:39,996 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [691595400] [2022-07-12 19:18:39,996 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [691595400] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 19:18:39,996 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 19:18:39,996 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2022-07-12 19:18:39,996 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1584080447] [2022-07-12 19:18:39,997 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 19:18:39,997 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-07-12 19:18:39,997 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-07-12 19:18:39,997 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-07-12 19:18:39,997 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2022-07-12 19:18:39,997 INFO L87 Difference]: Start difference. First operand 123 states and 131 transitions. Second operand has 12 states, 11 states have (on average 2.4545454545454546) internal successors, (27), 11 states have internal predecessors, (27), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-07-12 19:18:40,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 19:18:40,758 INFO L93 Difference]: Finished difference Result 161 states and 171 transitions. [2022-07-12 19:18:40,758 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-07-12 19:18:40,759 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 11 states have (on average 2.4545454545454546) internal successors, (27), 11 states have internal predecessors, (27), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 31 [2022-07-12 19:18:40,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 19:18:40,759 INFO L225 Difference]: With dead ends: 161 [2022-07-12 19:18:40,759 INFO L226 Difference]: Without dead ends: 161 [2022-07-12 19:18:40,760 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=77, Invalid=265, Unknown=0, NotChecked=0, Total=342 [2022-07-12 19:18:40,760 INFO L413 NwaCegarLoop]: 50 mSDtfsCounter, 291 mSDsluCounter, 323 mSDsCounter, 0 mSdLazyCounter, 549 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 291 SdHoareTripleChecker+Valid, 373 SdHoareTripleChecker+Invalid, 560 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 549 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-07-12 19:18:40,760 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [291 Valid, 373 Invalid, 560 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 549 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-07-12 19:18:40,761 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2022-07-12 19:18:40,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 123. [2022-07-12 19:18:40,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 123 states, 86 states have (on average 1.441860465116279) internal successors, (124), 114 states have internal predecessors, (124), 4 states have call successors, (4), 4 states have call predecessors, (4), 4 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-07-12 19:18:40,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 132 transitions. [2022-07-12 19:18:40,764 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 132 transitions. Word has length 31 [2022-07-12 19:18:40,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 19:18:40,764 INFO L495 AbstractCegarLoop]: Abstraction has 123 states and 132 transitions. [2022-07-12 19:18:40,764 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 11 states have (on average 2.4545454545454546) internal successors, (27), 11 states have internal predecessors, (27), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-07-12 19:18:40,764 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 132 transitions. [2022-07-12 19:18:40,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-07-12 19:18:40,765 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 19:18:40,765 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 19:18:40,775 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (14)] Forceful destruction successful, exit code 0 [2022-07-12 19:18:40,978 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 [2022-07-12 19:18:40,979 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr7REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 39 more)] === [2022-07-12 19:18:40,979 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 19:18:40,979 INFO L85 PathProgramCache]: Analyzing trace with hash -1940465842, now seen corresponding path program 1 times [2022-07-12 19:18:40,979 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-07-12 19:18:40,979 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [663050419] [2022-07-12 19:18:40,979 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:40,979 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-07-12 19:18:40,979 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat [2022-07-12 19:18:40,980 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-07-12 19:18:40,982 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (15)] Waiting until timeout for monitored process [2022-07-12 19:18:41,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:41,103 INFO L263 TraceCheckSpWp]: Trace formula consists of 188 conjuncts, 24 conjunts are in the unsatisfiable core [2022-07-12 19:18:41,105 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 19:18:41,110 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 19:18:41,260 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2022-07-12 19:18:41,263 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-07-12 19:18:41,297 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-07-12 19:18:41,297 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-07-12 19:18:41,297 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-07-12 19:18:41,297 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [663050419] [2022-07-12 19:18:41,298 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [663050419] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 19:18:41,298 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 19:18:41,298 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2022-07-12 19:18:41,298 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1366115902] [2022-07-12 19:18:41,298 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 19:18:41,298 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-07-12 19:18:41,298 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-07-12 19:18:41,299 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-07-12 19:18:41,299 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2022-07-12 19:18:41,299 INFO L87 Difference]: Start difference. First operand 123 states and 132 transitions. Second operand has 12 states, 11 states have (on average 2.4545454545454546) internal successors, (27), 11 states have internal predecessors, (27), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-07-12 19:18:42,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 19:18:42,195 INFO L93 Difference]: Finished difference Result 221 states and 234 transitions. [2022-07-12 19:18:42,195 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-07-12 19:18:42,195 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 11 states have (on average 2.4545454545454546) internal successors, (27), 11 states have internal predecessors, (27), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 31 [2022-07-12 19:18:42,195 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 19:18:42,196 INFO L225 Difference]: With dead ends: 221 [2022-07-12 19:18:42,196 INFO L226 Difference]: Without dead ends: 221 [2022-07-12 19:18:42,196 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=86, Invalid=294, Unknown=0, NotChecked=0, Total=380 [2022-07-12 19:18:42,197 INFO L413 NwaCegarLoop]: 41 mSDtfsCounter, 745 mSDsluCounter, 262 mSDsCounter, 0 mSdLazyCounter, 467 mSolverCounterSat, 21 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 745 SdHoareTripleChecker+Valid, 303 SdHoareTripleChecker+Invalid, 488 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 21 IncrementalHoareTripleChecker+Valid, 467 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-07-12 19:18:42,197 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [745 Valid, 303 Invalid, 488 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [21 Valid, 467 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-07-12 19:18:42,198 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states. [2022-07-12 19:18:42,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 135. [2022-07-12 19:18:42,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 135 states, 98 states have (on average 1.4795918367346939) internal successors, (145), 126 states have internal predecessors, (145), 4 states have call successors, (4), 4 states have call predecessors, (4), 4 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-07-12 19:18:42,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 153 transitions. [2022-07-12 19:18:42,201 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 153 transitions. Word has length 31 [2022-07-12 19:18:42,201 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 19:18:42,201 INFO L495 AbstractCegarLoop]: Abstraction has 135 states and 153 transitions. [2022-07-12 19:18:42,201 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 11 states have (on average 2.4545454545454546) internal successors, (27), 11 states have internal predecessors, (27), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-07-12 19:18:42,201 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 153 transitions. [2022-07-12 19:18:42,202 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-07-12 19:18:42,202 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 19:18:42,202 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 19:18:42,213 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (15)] Ended with exit code 0 [2022-07-12 19:18:42,411 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 [2022-07-12 19:18:42,412 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr9REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 39 more)] === [2022-07-12 19:18:42,412 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 19:18:42,412 INFO L85 PathProgramCache]: Analyzing trace with hash -24898970, now seen corresponding path program 1 times [2022-07-12 19:18:42,412 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-07-12 19:18:42,412 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [494162507] [2022-07-12 19:18:42,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:42,413 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-07-12 19:18:42,413 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat [2022-07-12 19:18:42,416 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-07-12 19:18:42,418 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (16)] Waiting until timeout for monitored process [2022-07-12 19:18:42,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:42,517 INFO L263 TraceCheckSpWp]: Trace formula consists of 194 conjuncts, 5 conjunts are in the unsatisfiable core [2022-07-12 19:18:42,518 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 19:18:42,583 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2022-07-12 19:18:42,584 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-07-12 19:18:42,584 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-07-12 19:18:42,584 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [494162507] [2022-07-12 19:18:42,586 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [494162507] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-12 19:18:42,586 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-12 19:18:42,586 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-07-12 19:18:42,586 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1914773917] [2022-07-12 19:18:42,587 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-12 19:18:42,587 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-07-12 19:18:42,587 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-07-12 19:18:42,588 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-07-12 19:18:42,588 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-07-12 19:18:42,588 INFO L87 Difference]: Start difference. First operand 135 states and 153 transitions. Second operand has 5 states, 4 states have (on average 5.5) internal successors, (22), 5 states have internal predecessors, (22), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-07-12 19:18:42,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 19:18:42,664 INFO L93 Difference]: Finished difference Result 129 states and 144 transitions. [2022-07-12 19:18:42,665 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-07-12 19:18:42,665 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 5.5) internal successors, (22), 5 states have internal predecessors, (22), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 32 [2022-07-12 19:18:42,665 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 19:18:42,665 INFO L225 Difference]: With dead ends: 129 [2022-07-12 19:18:42,665 INFO L226 Difference]: Without dead ends: 129 [2022-07-12 19:18:42,666 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2022-07-12 19:18:42,667 INFO L413 NwaCegarLoop]: 56 mSDtfsCounter, 166 mSDsluCounter, 31 mSDsCounter, 0 mSdLazyCounter, 31 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 166 SdHoareTripleChecker+Valid, 87 SdHoareTripleChecker+Invalid, 36 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 31 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-07-12 19:18:42,667 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [166 Valid, 87 Invalid, 36 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 31 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-07-12 19:18:42,668 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2022-07-12 19:18:42,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 129. [2022-07-12 19:18:42,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 129 states, 98 states have (on average 1.3877551020408163) internal successors, (136), 120 states have internal predecessors, (136), 4 states have call successors, (4), 4 states have call predecessors, (4), 4 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-07-12 19:18:42,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 144 transitions. [2022-07-12 19:18:42,672 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 144 transitions. Word has length 32 [2022-07-12 19:18:42,672 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 19:18:42,672 INFO L495 AbstractCegarLoop]: Abstraction has 129 states and 144 transitions. [2022-07-12 19:18:42,672 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 5.5) internal successors, (22), 5 states have internal predecessors, (22), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-07-12 19:18:42,672 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 144 transitions. [2022-07-12 19:18:42,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-07-12 19:18:42,674 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 19:18:42,674 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 19:18:42,685 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (16)] Forceful destruction successful, exit code 0 [2022-07-12 19:18:42,881 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 [2022-07-12 19:18:42,882 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr6REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 39 more)] === [2022-07-12 19:18:42,882 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 19:18:42,882 INFO L85 PathProgramCache]: Analyzing trace with hash 533076568, now seen corresponding path program 1 times [2022-07-12 19:18:42,882 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-07-12 19:18:42,882 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1347282484] [2022-07-12 19:18:42,883 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:42,883 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-07-12 19:18:42,883 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat [2022-07-12 19:18:42,885 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-07-12 19:18:42,887 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (17)] Waiting until timeout for monitored process [2022-07-12 19:18:43,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:43,044 INFO L263 TraceCheckSpWp]: Trace formula consists of 209 conjuncts, 34 conjunts are in the unsatisfiable core [2022-07-12 19:18:43,047 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 19:18:43,050 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 19:18:43,161 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-07-12 19:18:43,162 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-07-12 19:18:43,197 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 19:18:43,298 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 19:18:43,299 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 29 [2022-07-12 19:18:43,495 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 33 [2022-07-12 19:18:43,634 INFO L356 Elim1Store]: treesize reduction 3, result has 75.0 percent of original size [2022-07-12 19:18:43,635 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 41 treesize of output 25 [2022-07-12 19:18:43,709 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 1 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 19:18:43,709 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-12 19:18:43,888 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 21 [2022-07-12 19:18:44,010 INFO L356 Elim1Store]: treesize reduction 5, result has 77.3 percent of original size [2022-07-12 19:18:44,010 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 29 treesize of output 28 [2022-07-12 19:18:44,021 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_574 (Array (_ BitVec 32) (_ BitVec 32))) (|ULTIMATE.start_main_~#s~0#1.offset| (_ BitVec 32)) (|ULTIMATE.start_main_~#s~0#1.base| (_ BitVec 32))) (let ((.cse1 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_circular_create_~last~0#1.base| v_ArrVal_574))) (let ((.cse0 (select (select .cse1 |ULTIMATE.start_main_~#s~0#1.base|) |ULTIMATE.start_main_~#s~0#1.offset|))) (or (not (= |c_ULTIMATE.start_sll_circular_create_~head~0#1.base| .cse0)) (= (select (select .cse1 .cse0) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) |c_ULTIMATE.start_sll_circular_create_~last~0#1.base|))))) is different from false [2022-07-12 19:18:44,035 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_574 (Array (_ BitVec 32) (_ BitVec 32))) (|ULTIMATE.start_main_~#s~0#1.offset| (_ BitVec 32)) (|ULTIMATE.start_main_~#s~0#1.base| (_ BitVec 32))) (let ((.cse1 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_circular_create_~last~0#1.base| v_ArrVal_574))) (let ((.cse0 (select (select .cse1 |ULTIMATE.start_main_~#s~0#1.base|) |ULTIMATE.start_main_~#s~0#1.offset|))) (or (not (= .cse0 |c_ULTIMATE.start_sll_circular_create_~new_head~0#1.base|)) (= |c_ULTIMATE.start_sll_circular_create_~last~0#1.base| (select (select .cse1 .cse0) |c_ULTIMATE.start_sll_circular_create_~new_head~0#1.offset|)))))) is different from false [2022-07-12 19:18:44,046 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 19:18:44,047 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 53 treesize of output 37 [2022-07-12 19:18:44,117 INFO L356 Elim1Store]: treesize reduction 21, result has 67.2 percent of original size [2022-07-12 19:18:44,118 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 5 new quantified variables, introduced 6 case distinctions, treesize of input 104 treesize of output 120 [2022-07-12 19:18:44,132 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 19:18:44,132 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 87 [2022-07-12 19:18:44,404 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-07-12 19:18:44,404 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1347282484] [2022-07-12 19:18:44,404 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1347282484] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 19:18:44,404 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [195778845] [2022-07-12 19:18:44,404 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:18:44,404 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-07-12 19:18:44,404 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 [2022-07-12 19:18:44,405 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-07-12 19:18:44,423 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (18)] Waiting until timeout for monitored process [2022-07-12 19:18:44,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:18:44,583 INFO L263 TraceCheckSpWp]: Trace formula consists of 209 conjuncts, 41 conjunts are in the unsatisfiable core [2022-07-12 19:18:44,585 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 19:18:44,618 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 19:18:44,834 INFO L356 Elim1Store]: treesize reduction 15, result has 46.4 percent of original size [2022-07-12 19:18:44,834 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 24 [2022-07-12 19:18:44,958 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 19:18:45,100 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 19:18:45,100 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 32 [2022-07-12 19:18:45,359 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 39 [2022-07-12 19:18:45,533 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-07-12 19:18:45,533 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 53 treesize of output 28 [2022-07-12 19:18:45,649 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 7 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 19:18:45,649 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-12 19:18:45,688 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 21 [2022-07-12 19:18:45,853 WARN L833 $PredicateComparison]: unable to prove that (forall ((|ULTIMATE.start_main_~#s~0#1.base| (_ BitVec 32)) (v_ArrVal_621 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse1 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_circular_create_~last~0#1.base| v_ArrVal_621))) (let ((.cse0 (select (select .cse1 |ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (not (= |c_ULTIMATE.start_sll_circular_create_~head~0#1.base| .cse0)) (= (bvadd (bvneg (select |c_#valid| (select (select .cse1 .cse0) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|))) (_ bv1 1)) (_ bv0 1)))))) is different from false [2022-07-12 19:18:45,869 WARN L833 $PredicateComparison]: unable to prove that (forall ((|ULTIMATE.start_main_~#s~0#1.base| (_ BitVec 32)) (v_ArrVal_621 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse0 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_circular_create_~last~0#1.base| v_ArrVal_621))) (let ((.cse1 (select (select .cse0 |ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (= (bvadd (bvneg (select |c_#valid| (select (select .cse0 .cse1) |c_ULTIMATE.start_sll_circular_create_~new_head~0#1.offset|))) (_ bv1 1)) (_ bv0 1)) (not (= .cse1 |c_ULTIMATE.start_sll_circular_create_~new_head~0#1.base|)))))) is different from false [2022-07-12 19:18:45,877 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 19:18:45,878 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 58 treesize of output 42 [2022-07-12 19:18:45,950 INFO L356 Elim1Store]: treesize reduction 21, result has 67.2 percent of original size [2022-07-12 19:18:45,950 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 5 new quantified variables, introduced 6 case distinctions, treesize of input 130 treesize of output 146 [2022-07-12 19:18:45,963 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 19:18:45,963 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 119 treesize of output 115 [2022-07-12 19:19:09,951 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [195778845] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 19:19:09,951 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-07-12 19:19:09,951 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 21] total 37 [2022-07-12 19:19:09,951 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [185776801] [2022-07-12 19:19:09,951 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-07-12 19:19:09,951 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 38 states [2022-07-12 19:19:09,951 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-07-12 19:19:09,952 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2022-07-12 19:19:09,952 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=172, Invalid=2281, Unknown=13, NotChecked=396, Total=2862 [2022-07-12 19:19:09,953 INFO L87 Difference]: Start difference. First operand 129 states and 144 transitions. Second operand has 38 states, 36 states have (on average 1.5833333333333333) internal successors, (57), 33 states have internal predecessors, (57), 4 states have call successors, (4), 2 states have call predecessors, (4), 3 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-07-12 19:19:11,523 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-12 19:19:11,523 INFO L93 Difference]: Finished difference Result 142 states and 158 transitions. [2022-07-12 19:19:11,524 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-07-12 19:19:11,524 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 36 states have (on average 1.5833333333333333) internal successors, (57), 33 states have internal predecessors, (57), 4 states have call successors, (4), 2 states have call predecessors, (4), 3 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Word has length 36 [2022-07-12 19:19:11,524 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-07-12 19:19:11,525 INFO L225 Difference]: With dead ends: 142 [2022-07-12 19:19:11,525 INFO L226 Difference]: Without dead ends: 142 [2022-07-12 19:19:11,526 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 49 SyntacticMatches, 3 SemanticMatches, 59 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 526 ImplicationChecksByTransitivity, 25.4s TimeCoverageRelationStatistics Valid=301, Invalid=2894, Unknown=13, NotChecked=452, Total=3660 [2022-07-12 19:19:11,526 INFO L413 NwaCegarLoop]: 62 mSDtfsCounter, 61 mSDsluCounter, 1034 mSDsCounter, 0 mSdLazyCounter, 801 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 63 SdHoareTripleChecker+Valid, 1096 SdHoareTripleChecker+Invalid, 1018 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 801 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 201 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-07-12 19:19:11,526 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [63 Valid, 1096 Invalid, 1018 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 801 Invalid, 0 Unknown, 201 Unchecked, 0.9s Time] [2022-07-12 19:19:11,526 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2022-07-12 19:19:11,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 140. [2022-07-12 19:19:11,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 140 states, 109 states have (on average 1.3669724770642202) internal successors, (149), 131 states have internal predecessors, (149), 4 states have call successors, (4), 4 states have call predecessors, (4), 4 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-07-12 19:19:11,529 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 157 transitions. [2022-07-12 19:19:11,529 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 157 transitions. Word has length 36 [2022-07-12 19:19:11,529 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-07-12 19:19:11,529 INFO L495 AbstractCegarLoop]: Abstraction has 140 states and 157 transitions. [2022-07-12 19:19:11,529 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 38 states, 36 states have (on average 1.5833333333333333) internal successors, (57), 33 states have internal predecessors, (57), 4 states have call successors, (4), 2 states have call predecessors, (4), 3 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-07-12 19:19:11,529 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 157 transitions. [2022-07-12 19:19:11,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-07-12 19:19:11,529 INFO L187 NwaCegarLoop]: Found error trace [2022-07-12 19:19:11,529 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-12 19:19:11,537 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (17)] Forceful destruction successful, exit code 0 [2022-07-12 19:19:11,732 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (18)] Ended with exit code 0 [2022-07-12 19:19:11,930 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3,18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt [2022-07-12 19:19:11,930 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr7REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 39 more)] === [2022-07-12 19:19:11,930 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-12 19:19:11,931 INFO L85 PathProgramCache]: Analyzing trace with hash 533076569, now seen corresponding path program 1 times [2022-07-12 19:19:11,931 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-07-12 19:19:11,931 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [963039287] [2022-07-12 19:19:11,931 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:19:11,931 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-07-12 19:19:11,931 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat [2022-07-12 19:19:11,932 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-07-12 19:19:11,934 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -unsat_core_generation=3 (19)] Waiting until timeout for monitored process [2022-07-12 19:19:12,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:19:12,071 INFO L263 TraceCheckSpWp]: Trace formula consists of 209 conjuncts, 48 conjunts are in the unsatisfiable core [2022-07-12 19:19:12,073 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 19:19:12,078 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 19:19:12,081 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 19:19:12,309 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-07-12 19:19:12,309 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-07-12 19:19:12,318 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2022-07-12 19:19:12,373 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 19:19:12,381 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 19:19:12,462 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 19:19:12,463 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 37 [2022-07-12 19:19:12,468 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2022-07-12 19:19:12,791 INFO L356 Elim1Store]: treesize reduction 3, result has 81.3 percent of original size [2022-07-12 19:19:12,792 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 83 treesize of output 51 [2022-07-12 19:19:12,798 INFO L356 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-07-12 19:19:12,798 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 19 [2022-07-12 19:19:12,869 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 1 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 19:19:12,870 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-12 19:19:14,446 WARN L833 $PredicateComparison]: unable to prove that (and (forall ((v_ArrVal_673 (Array (_ BitVec 32) (_ BitVec 32))) (|ULTIMATE.start_main_~#s~0#1.offset| (_ BitVec 32)) (|ULTIMATE.start_main_~#s~0#1.base| (_ BitVec 32)) (v_ArrVal_672 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse2 (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_sll_circular_create_~last~0#1.base| v_ArrVal_672)) (.cse3 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_circular_create_~last~0#1.base| v_ArrVal_673))) (let ((.cse1 (select (select .cse3 |ULTIMATE.start_main_~#s~0#1.base|) |ULTIMATE.start_main_~#s~0#1.offset|)) (.cse0 (select (select .cse2 |ULTIMATE.start_main_~#s~0#1.base|) |ULTIMATE.start_main_~#s~0#1.offset|))) (or (not (= .cse0 |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|)) (not (= |c_ULTIMATE.start_sll_circular_create_~head~0#1.base| .cse1)) (bvule (bvadd (_ bv4 32) (select (select .cse2 .cse1) .cse0)) (select |c_#length| (select (select .cse3 .cse1) .cse0))))))) (forall ((v_ArrVal_673 (Array (_ BitVec 32) (_ BitVec 32))) (|ULTIMATE.start_main_~#s~0#1.offset| (_ BitVec 32)) (|ULTIMATE.start_main_~#s~0#1.base| (_ BitVec 32)) (v_ArrVal_672 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse6 (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_sll_circular_create_~last~0#1.base| v_ArrVal_672))) (let ((.cse4 (select (select .cse6 |ULTIMATE.start_main_~#s~0#1.base|) |ULTIMATE.start_main_~#s~0#1.offset|)) (.cse7 (select (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_circular_create_~last~0#1.base| v_ArrVal_673) |ULTIMATE.start_main_~#s~0#1.base|) |ULTIMATE.start_main_~#s~0#1.offset|))) (or (not (= .cse4 |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|)) (let ((.cse5 (select (select .cse6 .cse7) .cse4))) (bvule .cse5 (bvadd (_ bv4 32) .cse5))) (not (= |c_ULTIMATE.start_sll_circular_create_~head~0#1.base| .cse7))))))) is different from false [2022-07-12 19:19:14,533 WARN L833 $PredicateComparison]: unable to prove that (and (forall ((v_ArrVal_673 (Array (_ BitVec 32) (_ BitVec 32))) (|ULTIMATE.start_main_~#s~0#1.offset| (_ BitVec 32)) (|ULTIMATE.start_main_~#s~0#1.base| (_ BitVec 32)) (v_ArrVal_672 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse1 (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_sll_circular_create_~last~0#1.base| v_ArrVal_672))) (let ((.cse3 (select (select .cse1 |ULTIMATE.start_main_~#s~0#1.base|) |ULTIMATE.start_main_~#s~0#1.offset|)) (.cse2 (select (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_circular_create_~last~0#1.base| v_ArrVal_673) |ULTIMATE.start_main_~#s~0#1.base|) |ULTIMATE.start_main_~#s~0#1.offset|))) (or (let ((.cse0 (select (select .cse1 .cse2) .cse3))) (bvule .cse0 (bvadd (_ bv4 32) .cse0))) (not (= .cse3 |c_ULTIMATE.start_sll_circular_create_~new_head~0#1.offset|)) (not (= .cse2 |c_ULTIMATE.start_sll_circular_create_~new_head~0#1.base|)))))) (forall ((v_ArrVal_673 (Array (_ BitVec 32) (_ BitVec 32))) (|ULTIMATE.start_main_~#s~0#1.offset| (_ BitVec 32)) (|ULTIMATE.start_main_~#s~0#1.base| (_ BitVec 32)) (v_ArrVal_672 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse7 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_circular_create_~last~0#1.base| v_ArrVal_673)) (.cse5 (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_sll_circular_create_~last~0#1.base| v_ArrVal_672))) (let ((.cse4 (select (select .cse5 |ULTIMATE.start_main_~#s~0#1.base|) |ULTIMATE.start_main_~#s~0#1.offset|)) (.cse6 (select (select .cse7 |ULTIMATE.start_main_~#s~0#1.base|) |ULTIMATE.start_main_~#s~0#1.offset|))) (or (not (= .cse4 |c_ULTIMATE.start_sll_circular_create_~new_head~0#1.offset|)) (bvule (bvadd (_ bv4 32) (select (select .cse5 .cse6) .cse4)) (select |c_#length| (select (select .cse7 .cse6) .cse4))) (not (= .cse6 |c_ULTIMATE.start_sll_circular_create_~new_head~0#1.base|))))))) is different from false [2022-07-12 19:19:14,554 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 19:19:14,554 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 117 treesize of output 93 [2022-07-12 19:19:14,563 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 19:19:14,563 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 69 [2022-07-12 19:19:14,675 INFO L356 Elim1Store]: treesize reduction 28, result has 67.1 percent of original size [2022-07-12 19:19:14,676 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 5 new quantified variables, introduced 6 case distinctions, treesize of input 249 treesize of output 250 [2022-07-12 19:19:15,120 INFO L356 Elim1Store]: treesize reduction 140, result has 43.8 percent of original size [2022-07-12 19:19:15,121 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 7 select indices, 7 select index equivalence classes, 0 disjoint index pairs (out of 21 index pairs), introduced 8 new quantified variables, introduced 21 case distinctions, treesize of input 546 treesize of output 540 [2022-07-12 19:19:15,211 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 19:19:15,211 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 458 treesize of output 442 [2022-07-12 19:19:15,310 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 19:19:15,311 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 426 treesize of output 400 [2022-07-12 19:20:35,250 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 19:20:35,251 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 115 treesize of output 99 [2022-07-12 19:20:35,265 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 19:20:35,266 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 99 treesize of output 67 [2022-07-12 19:20:35,434 INFO L356 Elim1Store]: treesize reduction 61, result has 45.0 percent of original size [2022-07-12 19:20:35,434 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 6 new quantified variables, introduced 10 case distinctions, treesize of input 218 treesize of output 189 [2022-07-12 19:20:35,556 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 19:20:35,556 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 222 treesize of output 222 [2022-07-12 19:20:35,567 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 170 treesize of output 158 [2022-07-12 19:20:35,650 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 19:20:35,650 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 173 treesize of output 181 [2022-07-12 19:20:41,337 WARN L855 $PredicateComparison]: unable to prove that (let ((.cse65 (forall ((v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse409 (bvadd (_ bv4 32) v_arrayElimCell_71)) (.cse410 (select |c_#length| v_arrayElimCell_75))) (or (bvule .cse409 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse410) (bvule .cse409 .cse410))))) (.cse66 (forall ((v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse408 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse408 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse408 (select |c_#length| v_arrayElimCell_75))))))) (let ((.cse202 (forall ((v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| v_arrayElimCell_75)))) (.cse204 (forall ((v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse407 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse407) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse407))))) (.cse80 (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse406 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse406 (select |c_#length| v_arrayElimCell_74)) (bvule .cse406 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)))))) (.cse326 (forall ((v_arrayElimCell_68 (_ BitVec 32))) (or (forall ((v_arrayElimCell_71 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_75 (_ BitVec 32))) (let ((.cse405 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse405) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse405)))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|))))) (.cse329 (forall ((v_arrayElimCell_68 (_ BitVec 32))) (or (forall ((v_arrayElimCell_71 (_ BitVec 32))) (or (forall ((v_arrayElimCell_75 (_ BitVec 32))) (let ((.cse404 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse404) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse404) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse404)))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|))))) (.cse5 (forall ((v_arrayElimCell_62 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) (select |c_#length| v_arrayElimCell_62)) (forall ((v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse403 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse403 (select |c_#length| v_arrayElimCell_62)) (bvule .cse403 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse403 (select |c_#length| v_arrayElimCell_75)))))))) (.cse6 (forall ((v_arrayElimCell_62 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) (select |c_#length| v_arrayElimCell_62)) (forall ((v_arrayElimCell_75 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) (select |c_#length| v_arrayElimCell_75)) (forall ((v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse402 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse402 (select |c_#length| v_arrayElimCell_62)) (bvule .cse402 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse402 (select |c_#length| v_arrayElimCell_75)))))))))) (.cse108 (forall ((v_arrayElimCell_71 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_75 (_ BitVec 32))) (let ((.cse401 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse401) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse401))))))) (.cse7 (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse400 (select |c_#length| v_arrayElimCell_74))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_72) .cse400) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) .cse400))))) (.cse4 (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_72) (select |c_#length| v_arrayElimCell_74)))) (.cse63 (and .cse65 .cse66)) (.cse86 (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse398 (bvadd (_ bv4 32) v_arrayElimCell_72)) (.cse399 (select |c_#length| v_arrayElimCell_74))) (or (bvule .cse398 .cse399) (bvule .cse398 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse399))))) (.cse315 (forall ((v_arrayElimCell_74 (_ BitVec 32))) (or (forall ((v_arrayElimCell_72 (_ BitVec 32))) (let ((.cse397 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse397 (select |c_#length| v_arrayElimCell_74)) (bvule .cse397 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|))))) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) (select |c_#length| v_arrayElimCell_74))))) (.cse184 (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|)) (.cse252 (forall ((v_arrayElimCell_75 (_ BitVec 32))) (or (forall ((v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse396 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse396 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse396 (select |c_#length| v_arrayElimCell_75))))) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) (select |c_#length| v_arrayElimCell_75)))))) (let ((.cse348 (= |c_ULTIMATE.start_sll_circular_create_~last~0#1.base| |c_ULTIMATE.start_sll_circular_create_~new_head~0#1.base|)) (.cse350 (forall ((v_arrayElimCell_71 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_75 (_ BitVec 32))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| v_arrayElimCell_75)))))) (.cse221 (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) (select |c_#length| v_arrayElimCell_74)) (forall ((v_arrayElimCell_72 (_ BitVec 32))) (let ((.cse395 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse395 (select |c_#length| v_arrayElimCell_74)) (bvule .cse395 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)))))))) (.cse287 (and .cse252 .cse66)) (.cse257 (bvule .cse184 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|))) (.cse209 (forall ((v_arrayElimCell_69 (_ BitVec 32))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_69) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)))) (.cse313 (and .cse86 .cse315)) (.cse101 (or .cse4 .cse63)) (.cse104 (or .cse7 .cse63)) (.cse109 (or .cse108 .cse4)) (.cse351 (and .cse5 .cse6)) (.cse354 (forall ((v_arrayElimCell_69 (_ BitVec 32)) (v_arrayElimCell_59 (_ BitVec 32)) (v_arrayElimCell_65 (_ BitVec 32))) (let ((.cse394 (select |c_#length| v_arrayElimCell_59))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) .cse394) (bvule (bvadd (_ bv4 32) v_arrayElimCell_69) .cse394))))) (.cse353 (forall ((v_arrayElimCell_59 (_ BitVec 32)) (v_arrayElimCell_65 (_ BitVec 32))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) (select |c_#length| v_arrayElimCell_59)))) (.cse286 (forall ((v_arrayElimCell_68 (_ BitVec 32))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)))) (.cse218 (and .cse65 .cse66 .cse108)) (.cse327 (and .cse326 .cse329)) (.cse214 (forall ((v_arrayElimCell_65 (_ BitVec 32))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)))) (.cse215 (and .cse86 .cse315 .cse80)) (.cse186 (forall ((v_arrayElimCell_71 (_ BitVec 32))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)))) (.cse208 (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse391 (select |c_#length| v_arrayElimCell_74)) (.cse392 (bvadd (_ bv4 32) v_arrayElimCell_65)) (.cse390 (bvadd (_ bv4 32) v_arrayElimCell_72)) (.cse393 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|))) (or (bvule .cse390 .cse391) (bvule .cse392 .cse391) (bvule .cse392 .cse393) (bvule .cse390 .cse393))))) (.cse374 (and .cse202 .cse204)) (.cse249 (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse389 (select |c_#length| v_arrayElimCell_74)) (.cse388 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse388 .cse389) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) .cse389) (bvule .cse388 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)))))) (.cse382 (forall ((v_arrayElimCell_59 (_ BitVec 32))) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) (select |c_#length| v_arrayElimCell_59)))) (.cse375 (forall ((v_arrayElimCell_69 (_ BitVec 32)) (v_arrayElimCell_59 (_ BitVec 32))) (let ((.cse387 (select |c_#length| v_arrayElimCell_59))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse387) (bvule (bvadd (_ bv4 32) v_arrayElimCell_69) .cse387)))))) (let ((.cse81 (or .cse80 .cse375)) (.cse95 (forall ((v_arrayElimCell_69 (_ BitVec 32)) (v_arrayElimCell_59 (_ BitVec 32))) (let ((.cse385 (select |c_#length| v_arrayElimCell_59))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse385) (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse386 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse386 (select |c_#length| v_arrayElimCell_74)) (bvule .cse386 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse386 (select |c_#length| v_arrayElimCell_59))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_69) .cse385))))) (.cse87 (forall ((v_arrayElimCell_59 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) (select |c_#length| v_arrayElimCell_59)) (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse384 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse384 (select |c_#length| v_arrayElimCell_74)) (bvule .cse384 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse384 (select |c_#length| v_arrayElimCell_59)))))))) (.cse89 (forall ((v_arrayElimCell_59 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) (select |c_#length| v_arrayElimCell_59)) (forall ((v_arrayElimCell_74 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) (select |c_#length| v_arrayElimCell_74)) (forall ((v_arrayElimCell_72 (_ BitVec 32))) (let ((.cse383 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse383 (select |c_#length| v_arrayElimCell_74)) (bvule .cse383 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse383 (select |c_#length| v_arrayElimCell_59)))))))))) (.cse97 (or .cse80 .cse382)) (.cse78 (or .cse86 .cse382)) (.cse88 (forall ((v_arrayElimCell_59 (_ BitVec 32)) (v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse378 (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|)) (.cse381 (select |c_#length| v_arrayElimCell_74)) (.cse380 (bvadd (_ bv4 32) v_arrayElimCell_72)) (.cse379 (select |c_#length| v_arrayElimCell_59))) (or (bvule .cse378 .cse379) (bvule .cse380 .cse381) (bvule .cse380 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse378 .cse381) (bvule .cse380 .cse379))))) (.cse92 (forall ((v_arrayElimCell_69 (_ BitVec 32)) (v_arrayElimCell_59 (_ BitVec 32))) (let ((.cse376 (select |c_#length| v_arrayElimCell_59))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse376) (forall ((v_arrayElimCell_74 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) (select |c_#length| v_arrayElimCell_74)) (forall ((v_arrayElimCell_72 (_ BitVec 32))) (let ((.cse377 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse377 (select |c_#length| v_arrayElimCell_74)) (bvule .cse377 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse377 (select |c_#length| v_arrayElimCell_59))))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_69) .cse376))))) (.cse96 (or .cse86 .cse375)) (.cse1 (and .cse249 .cse86 .cse80)) (.cse200 (or .cse7 .cse374)) (.cse203 (or .cse374 .cse4)) (.cse220 (forall ((v_arrayElimCell_72 (_ BitVec 32))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_72) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)))) (.cse210 (forall ((v_arrayElimCell_65 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_74 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) (select |c_#length| v_arrayElimCell_74)) (forall ((v_arrayElimCell_72 (_ BitVec 32))) (let ((.cse373 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse373 (select |c_#length| v_arrayElimCell_74)) (bvule .cse373 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)))))))))) (.cse213 (forall ((v_arrayElimCell_65 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse372 (select |c_#length| v_arrayElimCell_74)) (.cse371 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse371 .cse372) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) .cse372) (bvule .cse371 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)))))))) (.cse211 (or .cse186 .cse208)) (.cse212 (or .cse214 .cse215 .cse186)) (.cse185 (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse370 (select |c_#length| v_arrayElimCell_74))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_72) .cse370) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse370))))) (.cse288 (or .cse327 .cse4)) (.cse294 (or .cse7 .cse327)) (.cse254 (or .cse218 .cse4)) (.cse255 (or .cse7 .cse218)) (.cse289 (or .cse286 .cse65)) (.cse293 (or .cse286 .cse66)) (.cse276 (or .cse353 .cse80)) (.cse280 (forall ((v_arrayElimCell_69 (_ BitVec 32)) (v_arrayElimCell_59 (_ BitVec 32))) (or (forall ((v_arrayElimCell_65 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) (select |c_#length| v_arrayElimCell_59)) (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse369 (select |c_#length| v_arrayElimCell_74)) (.cse368 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse368 .cse369) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) .cse369) (bvule .cse368 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|))))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_69) (select |c_#length| v_arrayElimCell_59))))) (.cse272 (or .cse354 .cse80)) (.cse268 (forall ((v_arrayElimCell_59 (_ BitVec 32)) (v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse365 (select |c_#length| v_arrayElimCell_74)) (.cse366 (bvadd (_ bv4 32) v_arrayElimCell_65)) (.cse364 (bvadd (_ bv4 32) v_arrayElimCell_72)) (.cse367 (select |c_#length| v_arrayElimCell_59))) (or (bvule .cse364 .cse365) (bvule .cse366 .cse365) (bvule .cse364 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse366 .cse367) (bvule .cse364 .cse367))))) (.cse269 (forall ((v_arrayElimCell_59 (_ BitVec 32)) (v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse362 (select |c_#length| v_arrayElimCell_74)) (.cse361 (bvadd (_ bv4 32) v_arrayElimCell_72)) (.cse363 (bvadd (_ bv4 32) v_arrayElimCell_65))) (or (bvule .cse361 .cse362) (bvule .cse363 .cse362) (bvule .cse361 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse363 (select |c_#length| v_arrayElimCell_59)))))) (.cse281 (forall ((v_arrayElimCell_69 (_ BitVec 32)) (v_arrayElimCell_59 (_ BitVec 32))) (or (forall ((v_arrayElimCell_65 (_ BitVec 32))) (or (forall ((v_arrayElimCell_74 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) (select |c_#length| v_arrayElimCell_74)) (forall ((v_arrayElimCell_72 (_ BitVec 32))) (let ((.cse360 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse360 (select |c_#length| v_arrayElimCell_74)) (bvule .cse360 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse360 (select |c_#length| v_arrayElimCell_59))))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) (select |c_#length| v_arrayElimCell_59)))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_69) (select |c_#length| v_arrayElimCell_59))))) (.cse273 (forall ((v_arrayElimCell_69 (_ BitVec 32)) (v_arrayElimCell_59 (_ BitVec 32)) (v_arrayElimCell_65 (_ BitVec 32))) (let ((.cse359 (select |c_#length| v_arrayElimCell_59))) (or (forall ((v_arrayElimCell_74 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) (select |c_#length| v_arrayElimCell_74)) (forall ((v_arrayElimCell_72 (_ BitVec 32))) (let ((.cse358 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse358 (select |c_#length| v_arrayElimCell_74)) (bvule .cse358 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse358 (select |c_#length| v_arrayElimCell_59))))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) .cse359) (bvule (bvadd (_ bv4 32) v_arrayElimCell_69) .cse359))))) (.cse274 (forall ((v_arrayElimCell_69 (_ BitVec 32)) (v_arrayElimCell_59 (_ BitVec 32)) (v_arrayElimCell_65 (_ BitVec 32))) (let ((.cse357 (select |c_#length| v_arrayElimCell_59))) (or (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse356 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse356 (select |c_#length| v_arrayElimCell_74)) (bvule .cse356 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse356 (select |c_#length| v_arrayElimCell_59))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) .cse357) (bvule (bvadd (_ bv4 32) v_arrayElimCell_69) .cse357))))) (.cse277 (forall ((v_arrayElimCell_59 (_ BitVec 32)) (v_arrayElimCell_65 (_ BitVec 32))) (or (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse355 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse355 (select |c_#length| v_arrayElimCell_74)) (bvule .cse355 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse355 (select |c_#length| v_arrayElimCell_59))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) (select |c_#length| v_arrayElimCell_59))))) (.cse275 (or .cse86 .cse354)) (.cse278 (or .cse86 .cse353)) (.cse279 (forall ((v_arrayElimCell_59 (_ BitVec 32)) (v_arrayElimCell_65 (_ BitVec 32))) (or (forall ((v_arrayElimCell_74 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) (select |c_#length| v_arrayElimCell_74)) (forall ((v_arrayElimCell_72 (_ BitVec 32))) (let ((.cse352 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse352 (select |c_#length| v_arrayElimCell_74)) (bvule .cse352 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse352 (select |c_#length| v_arrayElimCell_59))))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) (select |c_#length| v_arrayElimCell_59))))) (.cse2 (or .cse351 .cse4)) (.cse8 (or .cse7 .cse351)) (.cse217 (and .cse101 .cse104 .cse65 .cse66 .cse109)) (.cse314 (or (and (or .cse257 (and .cse315 (or .cse209 .cse313))) .cse315) .cse186)) (.cse317 (or (and .cse315 .cse80 (or (and .cse315 .cse80 (or .cse209 .cse215)) .cse257)) .cse186)) (.cse318 (or .cse257 .cse313)) (.cse316 (or .cse257 .cse215)) (.cse247 (or .cse287 .cse4)) (.cse328 (and .cse7 .cse221)) (.cse325 (forall ((v_arrayElimCell_66 (_ BitVec 32))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)))) (.cse256 (or .cse7 .cse287)) (.cse71 (and .cse108 .cse350)) (.cse253 (and .cse80 .cse4)) (.cse216 (and .cse86 .cse80)) (.cse0 (not .cse348))) (and (or .cse0 .cse1) (or .cse0 (let ((.cse3 (forall ((v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse10 (select |c_#length| v_arrayElimCell_62)) (.cse11 (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|)) (.cse9 (bvadd (_ bv4 32) v_arrayElimCell_71)) (.cse12 (select |c_#length| v_arrayElimCell_75))) (or (bvule .cse9 .cse10) (bvule .cse11 .cse10) (bvule .cse9 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse11 .cse12) (bvule .cse9 .cse12)))))) (and .cse2 (or .cse3 .cse4) .cse5 .cse6 (or .cse7 .cse3) .cse8))) (or .cse0 (let ((.cse17 (forall ((v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) (select |c_#length| v_arrayElimCell_62)) (forall ((v_arrayElimCell_68 (_ BitVec 32))) (or (forall ((v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse58 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse58 (select |c_#length| v_arrayElimCell_62)) (bvule .cse58 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_75 (_ BitVec 32))) (let ((.cse59 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse59) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse59))))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| v_arrayElimCell_62))))))) (.cse13 (forall ((v_arrayElimCell_68 (_ BitVec 32)) (v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse55 (select |c_#length| v_arrayElimCell_62)) (.cse56 (bvadd (_ bv4 32) v_arrayElimCell_71)) (.cse57 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse55) (bvule .cse56 .cse55) (bvule .cse56 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse57) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse55) (bvule .cse56 .cse57))))) (.cse26 (forall ((v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) (select |c_#length| v_arrayElimCell_62)) (forall ((v_arrayElimCell_68 (_ BitVec 32))) (or (forall ((v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse53 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse53 (select |c_#length| v_arrayElimCell_62)) (forall ((v_arrayElimCell_75 (_ BitVec 32))) (let ((.cse54 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse54) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse54) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse54)))) (bvule .cse53 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| v_arrayElimCell_62))))))) (.cse38 (forall ((v_arrayElimCell_68 (_ BitVec 32)) (v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse51 (select |c_#length| v_arrayElimCell_62)) (.cse52 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse51) (bvule .cse52 .cse51) (bvule .cse52 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse51) (bvule .cse52 (select |c_#length| v_arrayElimCell_75))))))) (and (or .cse13 .cse4) (forall ((v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse14 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse14 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_68 (_ BitVec 32)) (v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse15 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse15) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse15) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse15) (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse16 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse16 (select |c_#length| v_arrayElimCell_74)) (bvule .cse16 (select |c_#length| v_arrayElimCell_62)))))))) (bvule .cse14 (select |c_#length| v_arrayElimCell_75))))) .cse17 (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_72) (select |c_#length| v_arrayElimCell_74)) (forall ((v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse18 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse18) (forall ((v_arrayElimCell_68 (_ BitVec 32))) (or (forall ((v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse19 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse19 (select |c_#length| v_arrayElimCell_62)) (bvule .cse19 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_75 (_ BitVec 32))) (let ((.cse20 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse20) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse20))))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| v_arrayElimCell_62)))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_72) .cse18)))))) (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_72) (select |c_#length| v_arrayElimCell_74)) (forall ((v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse21 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse21) (forall ((v_arrayElimCell_68 (_ BitVec 32))) (or (forall ((v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse22 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse22 (select |c_#length| v_arrayElimCell_62)) (forall ((v_arrayElimCell_75 (_ BitVec 32))) (let ((.cse23 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse23) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse23) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse23)))) (bvule .cse22 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| v_arrayElimCell_62)))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_72) .cse21)))))) (forall ((v_arrayElimCell_71 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_75 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| v_arrayElimCell_75)) (forall ((v_arrayElimCell_68 (_ BitVec 32))) (or (forall ((v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse24 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse24) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse24) (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) (select |c_#length| v_arrayElimCell_74)) (forall ((v_arrayElimCell_72 (_ BitVec 32))) (let ((.cse25 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse25 (select |c_#length| v_arrayElimCell_74)) (bvule .cse25 (select |c_#length| v_arrayElimCell_62))))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse24)))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| v_arrayElimCell_75)))))))) (or (and .cse17 .cse26) .cse4) (forall ((v_arrayElimCell_71 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_75 (_ BitVec 32))) (let ((.cse27 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse27) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse27) (forall ((v_arrayElimCell_68 (_ BitVec 32))) (or (forall ((v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse28 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse28) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse28) (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) (select |c_#length| v_arrayElimCell_74)) (forall ((v_arrayElimCell_72 (_ BitVec 32))) (let ((.cse29 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse29 (select |c_#length| v_arrayElimCell_74)) (bvule .cse29 (select |c_#length| v_arrayElimCell_62))))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse28)))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| v_arrayElimCell_75))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse30 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse30 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_68 (_ BitVec 32)) (v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse31 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse31) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse31) (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) (select |c_#length| v_arrayElimCell_74)) (forall ((v_arrayElimCell_72 (_ BitVec 32))) (let ((.cse32 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse32 (select |c_#length| v_arrayElimCell_74)) (bvule .cse32 (select |c_#length| v_arrayElimCell_62))))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse31)))) (bvule .cse30 (select |c_#length| v_arrayElimCell_75))))) (forall ((v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) (select |c_#length| v_arrayElimCell_62)) (forall ((v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse33 (bvadd (_ bv4 32) v_arrayElimCell_71)) (.cse34 (select |c_#length| v_arrayElimCell_75))) (or (bvule .cse33 (select |c_#length| v_arrayElimCell_62)) (bvule .cse33 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse34) (bvule .cse33 .cse34)))) (forall ((v_arrayElimCell_68 (_ BitVec 32))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| v_arrayElimCell_62))))) (forall ((v_arrayElimCell_75 (_ BitVec 32))) (or (forall ((v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse35 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse35 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_68 (_ BitVec 32)) (v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse36 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse36) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse36) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse36) (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse37 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse37 (select |c_#length| v_arrayElimCell_74)) (bvule .cse37 (select |c_#length| v_arrayElimCell_62)))))))) (bvule .cse35 (select |c_#length| v_arrayElimCell_75))))) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) (select |c_#length| v_arrayElimCell_75)))) (or .cse7 .cse38) (or .cse7 (forall ((v_arrayElimCell_68 (_ BitVec 32)) (v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse41 (bvadd (_ bv4 32) v_arrayElimCell_68)) (.cse39 (select |c_#length| v_arrayElimCell_62)) (.cse40 (bvadd (_ bv4 32) v_arrayElimCell_71)) (.cse42 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse39) (bvule .cse40 .cse39) (bvule .cse40 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse41 .cse42) (bvule .cse41 .cse39) (bvule .cse40 .cse42))))) (forall ((v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) (select |c_#length| v_arrayElimCell_62)) (forall ((v_arrayElimCell_68 (_ BitVec 32))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| v_arrayElimCell_62))) (forall ((v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse43 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse43 (select |c_#length| v_arrayElimCell_62)) (bvule .cse43 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse43 (select |c_#length| v_arrayElimCell_75))))))) (or .cse7 .cse13) (or .cse7 (forall ((v_arrayElimCell_68 (_ BitVec 32)) (v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse47 (bvadd (_ bv4 32) v_arrayElimCell_68)) (.cse44 (select |c_#length| v_arrayElimCell_62)) (.cse45 (bvadd (_ bv4 32) v_arrayElimCell_71)) (.cse46 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse44) (bvule .cse45 .cse44) (bvule .cse45 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse46) (bvule .cse47 .cse46) (bvule .cse47 .cse44) (bvule .cse45 .cse46))))) .cse26 (forall ((v_arrayElimCell_75 (_ BitVec 32))) (or (forall ((v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse48 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse48 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_68 (_ BitVec 32)) (v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse49 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse49) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse49) (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) (select |c_#length| v_arrayElimCell_74)) (forall ((v_arrayElimCell_72 (_ BitVec 32))) (let ((.cse50 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse50 (select |c_#length| v_arrayElimCell_74)) (bvule .cse50 (select |c_#length| v_arrayElimCell_62))))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse49)))) (bvule .cse48 (select |c_#length| v_arrayElimCell_75))))) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) (select |c_#length| v_arrayElimCell_75)))) (or .cse4 .cse38)))) (or .cse0 (let ((.cse64 (and (forall ((v_arrayElimCell_68 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| v_arrayElimCell_62)) (forall ((v_arrayElimCell_71 (_ BitVec 32))) (or (forall ((v_arrayElimCell_75 (_ BitVec 32))) (let ((.cse69 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse69) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse69) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse69)))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)))))) (forall ((v_arrayElimCell_68 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (or (forall ((v_arrayElimCell_71 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_75 (_ BitVec 32))) (let ((.cse70 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse70) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse70)))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| v_arrayElimCell_62)))))) (.cse62 (forall ((v_arrayElimCell_68 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| v_arrayElimCell_62))))) (and (forall ((v_arrayElimCell_68 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (or (forall ((v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse60 (bvadd (_ bv4 32) v_arrayElimCell_71)) (.cse61 (select |c_#length| v_arrayElimCell_75))) (or (bvule .cse60 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse61) (bvule .cse60 .cse61)))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| v_arrayElimCell_62)))) (or .cse62 .cse4 .cse63) (or .cse7 .cse64) (or .cse62 .cse7 .cse63) (or .cse4 .cse64) (or .cse62 .cse65) (or .cse62 .cse66) (forall ((v_arrayElimCell_68 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (or (forall ((v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse67 (bvadd (_ bv4 32) v_arrayElimCell_71)) (.cse68 (select |c_#length| v_arrayElimCell_75))) (or (bvule .cse67 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse68) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse68) (bvule .cse67 .cse68)))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| v_arrayElimCell_62))))))) (or (let ((.cse74 (forall ((v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse77 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse77) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse77)))))) (and (or .cse71 (and (forall ((v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse72 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse72) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse72) (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse73 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse73 (select |c_#length| v_arrayElimCell_74)) (bvule .cse73 (select |c_#length| v_arrayElimCell_62)))))))) (or .cse4 .cse74))) (or .cse65 .cse74) (or .cse66 .cse74) (or .cse71 (and (forall ((v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse75 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse75) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse75) (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) (select |c_#length| v_arrayElimCell_74)) (forall ((v_arrayElimCell_72 (_ BitVec 32))) (let ((.cse76 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse76 (select |c_#length| v_arrayElimCell_74)) (bvule .cse76 (select |c_#length| v_arrayElimCell_62)))))))))) (or .cse7 .cse74))))) .cse0) (or (let ((.cse79 (forall ((v_arrayElimCell_69 (_ BitVec 32)) (v_arrayElimCell_59 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse98 (select |c_#length| v_arrayElimCell_59))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse98) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse98) (bvule (bvadd (_ bv4 32) v_arrayElimCell_69) .cse98)))))) (and .cse78 (or .cse79 .cse80) .cse81 (forall ((v_arrayElimCell_69 (_ BitVec 32)) (v_arrayElimCell_59 (_ BitVec 32)) (v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse82 (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|)) (.cse85 (select |c_#length| v_arrayElimCell_74)) (.cse84 (bvadd (_ bv4 32) v_arrayElimCell_72)) (.cse83 (select |c_#length| v_arrayElimCell_59))) (or (bvule .cse82 .cse83) (bvule .cse84 .cse85) (bvule .cse84 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse83) (bvule (bvadd (_ bv4 32) v_arrayElimCell_69) .cse83) (bvule .cse82 .cse85) (bvule .cse84 .cse83)))) (or .cse86 .cse79) .cse87 .cse88 .cse89 (forall ((v_arrayElimCell_69 (_ BitVec 32)) (v_arrayElimCell_59 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse90 (select |c_#length| v_arrayElimCell_59))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse90) (forall ((v_arrayElimCell_74 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) (select |c_#length| v_arrayElimCell_74)) (forall ((v_arrayElimCell_72 (_ BitVec 32))) (let ((.cse91 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse91 (select |c_#length| v_arrayElimCell_74)) (bvule .cse91 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse91 (select |c_#length| v_arrayElimCell_59))))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse90) (bvule (bvadd (_ bv4 32) v_arrayElimCell_69) .cse90)))) .cse92 (forall ((v_arrayElimCell_69 (_ BitVec 32)) (v_arrayElimCell_59 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse93 (select |c_#length| v_arrayElimCell_59))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse93) (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse94 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse94 (select |c_#length| v_arrayElimCell_74)) (bvule .cse94 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse94 (select |c_#length| v_arrayElimCell_59))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse93) (bvule (bvadd (_ bv4 32) v_arrayElimCell_69) .cse93)))) .cse95 .cse96 .cse97)) .cse0) (or (let ((.cse105 (and (forall ((v_arrayElimCell_68 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (or (forall ((v_arrayElimCell_75 (_ BitVec 32))) (let ((.cse106 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse106) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse106) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse106)))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)))) (forall ((v_arrayElimCell_68 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_75 (_ BitVec 32))) (let ((.cse107 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse107) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse107))))))))) (and (forall ((v_arrayElimCell_68 (_ BitVec 32)) (v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse99 (bvadd (_ bv4 32) v_arrayElimCell_71)) (.cse100 (select |c_#length| v_arrayElimCell_75))) (or (bvule .cse99 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse100) (bvule .cse99 .cse100)))) .cse101 (forall ((v_arrayElimCell_68 (_ BitVec 32)) (v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse102 (bvadd (_ bv4 32) v_arrayElimCell_71)) (.cse103 (select |c_#length| v_arrayElimCell_75))) (or (bvule .cse102 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse103) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse103) (bvule .cse102 .cse103)))) .cse104 .cse65 .cse66 (or .cse7 .cse105) (or .cse4 .cse105))) .cse0) (or (and .cse101 .cse104 .cse65 .cse66 (or .cse7 .cse108) .cse109) .cse0) (or (and (or (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse111 (select |c_#length| v_arrayElimCell_62)) (.cse110 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse110 .cse111) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse111) (bvule .cse110 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) .cse111) (bvule .cse110 (select |c_#length| v_arrayElimCell_75))))) .cse4) (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse113 (select |c_#length| v_arrayElimCell_62)) (.cse112 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse112 .cse113) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse113) (bvule .cse112 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule (bvadd (_ bv4 32) v_arrayElimCell_72) .cse113) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) .cse113) (bvule .cse112 (select |c_#length| v_arrayElimCell_75))))) (forall ((v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse114 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse114 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse115 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse115) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse115) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) .cse115) (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse116 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse116 (select |c_#length| v_arrayElimCell_74)) (bvule .cse116 (select |c_#length| v_arrayElimCell_62)))))))) (bvule .cse114 (select |c_#length| v_arrayElimCell_75))))) (or (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse119 (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|)) (.cse118 (select |c_#length| v_arrayElimCell_62)) (.cse117 (bvadd (_ bv4 32) v_arrayElimCell_71)) (.cse120 (select |c_#length| v_arrayElimCell_75))) (or (bvule .cse117 .cse118) (bvule .cse119 .cse118) (bvule .cse117 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse119 .cse120) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) .cse118) (bvule .cse117 .cse120)))) .cse4) (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_72) (select |c_#length| v_arrayElimCell_74)) (forall ((v_arrayElimCell_65 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) (select |c_#length| v_arrayElimCell_74)) (forall ((v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse122 (select |c_#length| v_arrayElimCell_62)) (.cse121 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse121 .cse122) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse122) (bvule .cse121 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule (bvadd (_ bv4 32) v_arrayElimCell_72) .cse122) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) .cse122) (bvule .cse121 (select |c_#length| v_arrayElimCell_75))))))))) (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_72) (select |c_#length| v_arrayElimCell_74)) (forall ((v_arrayElimCell_65 (_ BitVec 32))) (or (forall ((v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse123 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse123) (forall ((v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse124 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse124 (select |c_#length| v_arrayElimCell_62)) (bvule .cse124 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_75 (_ BitVec 32))) (let ((.cse125 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse125) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse125))))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) .cse123)))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) (select |c_#length| v_arrayElimCell_74)))))) (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse126 (select |c_#length| v_arrayElimCell_74)) (.cse128 (bvadd (_ bv4 32) v_arrayElimCell_65)) (.cse127 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_72) .cse126) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse127) (bvule .cse128 .cse126) (forall ((v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse129 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse129 (select |c_#length| v_arrayElimCell_62)) (bvule .cse129 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_75 (_ BitVec 32))) (let ((.cse130 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse130) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse130))))))) (bvule .cse128 .cse127)))) (forall ((v_arrayElimCell_75 (_ BitVec 32))) (or (forall ((v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse131 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse131 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse132 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse132) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse132) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) .cse132) (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse133 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse133 (select |c_#length| v_arrayElimCell_74)) (bvule .cse133 (select |c_#length| v_arrayElimCell_62)))))))) (bvule .cse131 (select |c_#length| v_arrayElimCell_75))))) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) (select |c_#length| v_arrayElimCell_75)))) (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse134 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse134) (forall ((v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse135 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse135 (select |c_#length| v_arrayElimCell_62)) (bvule .cse135 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_75 (_ BitVec 32))) (let ((.cse136 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse136) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse136))))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) .cse134)))) (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse137 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse137) (forall ((v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse138 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse138 (select |c_#length| v_arrayElimCell_62)) (bvule .cse138 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_75 (_ BitVec 32))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| v_arrayElimCell_75)))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) .cse137)))) (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse140 (select |c_#length| v_arrayElimCell_74)) (.cse139 (bvadd (_ bv4 32) v_arrayElimCell_72)) (.cse143 (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|)) (.cse144 (bvadd (_ bv4 32) v_arrayElimCell_65)) (.cse142 (select |c_#length| v_arrayElimCell_62)) (.cse141 (bvadd (_ bv4 32) v_arrayElimCell_71)) (.cse145 (select |c_#length| v_arrayElimCell_75))) (or (bvule .cse139 .cse140) (bvule .cse141 .cse142) (bvule .cse143 .cse142) (bvule .cse144 .cse140) (bvule .cse141 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse139 .cse142) (bvule .cse143 .cse145) (bvule .cse144 .cse142) (bvule .cse141 .cse145)))) (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_72) (select |c_#length| v_arrayElimCell_74)) (forall ((v_arrayElimCell_65 (_ BitVec 32))) (or (forall ((v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse148 (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|)) (.cse147 (select |c_#length| v_arrayElimCell_62)) (.cse146 (bvadd (_ bv4 32) v_arrayElimCell_71)) (.cse149 (select |c_#length| v_arrayElimCell_75))) (or (bvule .cse146 .cse147) (bvule .cse148 .cse147) (bvule .cse146 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule (bvadd (_ bv4 32) v_arrayElimCell_72) .cse147) (bvule .cse148 .cse149) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) .cse147) (bvule .cse146 .cse149)))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) (select |c_#length| v_arrayElimCell_74)))))) (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_72) (select |c_#length| v_arrayElimCell_74)) (forall ((v_arrayElimCell_65 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) (select |c_#length| v_arrayElimCell_74)) (forall ((v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse150 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse150) (forall ((v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse151 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse151 (select |c_#length| v_arrayElimCell_62)) (bvule .cse151 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_75 (_ BitVec 32))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| v_arrayElimCell_75)))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) .cse150)))))))) (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse154 (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|)) (.cse153 (select |c_#length| v_arrayElimCell_62)) (.cse152 (bvadd (_ bv4 32) v_arrayElimCell_71)) (.cse155 (select |c_#length| v_arrayElimCell_75))) (or (bvule .cse152 .cse153) (bvule .cse154 .cse153) (bvule .cse152 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule (bvadd (_ bv4 32) v_arrayElimCell_72) .cse153) (bvule .cse154 .cse155) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) .cse153) (bvule .cse152 .cse155))))) .cse0) (or .cse0 (let ((.cse164 (forall ((v_arrayElimCell_68 (_ BitVec 32)) (v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse183 (bvadd (_ bv4 32) v_arrayElimCell_68)) (.cse180 (select |c_#length| v_arrayElimCell_62)) (.cse181 (bvadd (_ bv4 32) v_arrayElimCell_71)) (.cse182 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse180) (bvule .cse181 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse182) (bvule .cse183 .cse182) (bvule .cse183 .cse180) (bvule .cse181 .cse182))))) (.cse170 (forall ((v_arrayElimCell_68 (_ BitVec 32)) (v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse178 (bvadd (_ bv4 32) v_arrayElimCell_68)) (.cse176 (select |c_#length| v_arrayElimCell_62)) (.cse177 (bvadd (_ bv4 32) v_arrayElimCell_71)) (.cse179 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse176) (bvule .cse177 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse178 .cse179) (bvule .cse178 .cse176) (bvule .cse177 .cse179))))) (.cse158 (forall ((v_arrayElimCell_68 (_ BitVec 32)) (v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse175 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse175) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse175)))))) (and (or .cse71 (and (forall ((v_arrayElimCell_68 (_ BitVec 32)) (v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse156 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse156) (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) (select |c_#length| v_arrayElimCell_74)) (forall ((v_arrayElimCell_72 (_ BitVec 32))) (let ((.cse157 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse157 (select |c_#length| v_arrayElimCell_74)) (bvule .cse157 (select |c_#length| v_arrayElimCell_62))))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse156)))) (or .cse7 .cse158))) (forall ((v_arrayElimCell_71 (_ BitVec 32))) (or (forall ((v_arrayElimCell_75 (_ BitVec 32))) (or (forall ((v_arrayElimCell_68 (_ BitVec 32))) (or (forall ((v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse159 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse159) (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) (select |c_#length| v_arrayElimCell_74)) (forall ((v_arrayElimCell_72 (_ BitVec 32))) (let ((.cse160 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse160 (select |c_#length| v_arrayElimCell_74)) (bvule .cse160 (select |c_#length| v_arrayElimCell_62))))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse159)))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| v_arrayElimCell_75)))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| v_arrayElimCell_75)))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)))) (forall ((v_arrayElimCell_71 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_75 (_ BitVec 32))) (let ((.cse163 (select |c_#length| v_arrayElimCell_75))) (or (forall ((v_arrayElimCell_68 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| v_arrayElimCell_75)) (forall ((v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse161 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse161) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse161) (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse162 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse162 (select |c_#length| v_arrayElimCell_74)) (bvule .cse162 (select |c_#length| v_arrayElimCell_62)))))))))) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse163) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse163)))))) (or .cse65 .cse158) (or .cse164 .cse4) (forall ((v_arrayElimCell_71 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_75 (_ BitVec 32))) (let ((.cse165 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse165) (forall ((v_arrayElimCell_68 (_ BitVec 32))) (or (forall ((v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse166 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse166) (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) (select |c_#length| v_arrayElimCell_74)) (forall ((v_arrayElimCell_72 (_ BitVec 32))) (let ((.cse167 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse167 (select |c_#length| v_arrayElimCell_74)) (bvule .cse167 (select |c_#length| v_arrayElimCell_62))))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse166)))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| v_arrayElimCell_75)))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse165)))))) (forall ((v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) (select |c_#length| v_arrayElimCell_62)) (forall ((v_arrayElimCell_68 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| v_arrayElimCell_62)) (forall ((v_arrayElimCell_71 (_ BitVec 32))) (or (forall ((v_arrayElimCell_75 (_ BitVec 32))) (let ((.cse168 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse168) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse168) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse168)))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)))))))) (forall ((v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) (select |c_#length| v_arrayElimCell_62)) (forall ((v_arrayElimCell_68 (_ BitVec 32))) (or (forall ((v_arrayElimCell_71 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_75 (_ BitVec 32))) (let ((.cse169 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse169) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse169)))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| v_arrayElimCell_62)))))) (or .cse7 .cse170) (or .cse7 .cse164) (or .cse170 .cse4) (forall ((v_arrayElimCell_71 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_75 (_ BitVec 32))) (or (forall ((v_arrayElimCell_68 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| v_arrayElimCell_75)) (forall ((v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse171 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse171) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse171) (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse172 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse172 (select |c_#length| v_arrayElimCell_74)) (bvule .cse172 (select |c_#length| v_arrayElimCell_62)))))))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| v_arrayElimCell_75)))))) (or .cse66 .cse158) (or (and (or .cse4 .cse158) (forall ((v_arrayElimCell_68 (_ BitVec 32)) (v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse173 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse173) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse173) (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse174 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse174 (select |c_#length| v_arrayElimCell_74)) (bvule .cse174 (select |c_#length| v_arrayElimCell_62))))))))) .cse71)))) (bvule |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset| .cse184) .cse0 (or .cse0 (and .cse185 .cse4)) (or .cse0 (let ((.cse189 (forall ((v_arrayElimCell_69 (_ BitVec 32)) (v_arrayElimCell_59 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse197 (bvadd (_ bv4 32) v_arrayElimCell_71)) (.cse196 (select |c_#length| v_arrayElimCell_59))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse196) (bvule .cse197 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse197 .cse196) (bvule (bvadd (_ bv4 32) v_arrayElimCell_69) .cse196)))))) (and (or .cse186 (and .cse81 .cse92 .cse95 .cse96)) (forall ((v_arrayElimCell_71 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_69 (_ BitVec 32)) (v_arrayElimCell_59 (_ BitVec 32))) (let ((.cse187 (select |c_#length| v_arrayElimCell_59))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse187) (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse188 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse188 (select |c_#length| v_arrayElimCell_74)) (bvule .cse188 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse188 (select |c_#length| v_arrayElimCell_59))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse187) (bvule (bvadd (_ bv4 32) v_arrayElimCell_69) .cse187)))))) (or .cse86 .cse189) (or .cse189 .cse80) (or (and .cse78 .cse87 .cse89 .cse97) .cse186) (forall ((v_arrayElimCell_71 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_69 (_ BitVec 32)) (v_arrayElimCell_59 (_ BitVec 32)) (v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse190 (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|)) (.cse193 (select |c_#length| v_arrayElimCell_74)) (.cse192 (bvadd (_ bv4 32) v_arrayElimCell_72)) (.cse191 (select |c_#length| v_arrayElimCell_59))) (or (bvule .cse190 .cse191) (bvule .cse192 .cse193) (bvule .cse192 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse191) (bvule (bvadd (_ bv4 32) v_arrayElimCell_69) .cse191) (bvule .cse190 .cse193) (bvule .cse192 .cse191)))))) (or (and .cse78 .cse88) .cse186) (or .cse186 (and .cse92 .cse96)) (forall ((v_arrayElimCell_71 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_69 (_ BitVec 32)) (v_arrayElimCell_59 (_ BitVec 32))) (let ((.cse194 (select |c_#length| v_arrayElimCell_59))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse194) (forall ((v_arrayElimCell_74 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) (select |c_#length| v_arrayElimCell_74)) (forall ((v_arrayElimCell_72 (_ BitVec 32))) (let ((.cse195 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse195 (select |c_#length| v_arrayElimCell_74)) (bvule .cse195 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse195 (select |c_#length| v_arrayElimCell_59))))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse194) (bvule (bvadd (_ bv4 32) v_arrayElimCell_69) .cse194))))))))) (or .cse0 (let ((.cse199 (forall ((v_arrayElimCell_68 (_ BitVec 32)) (v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse206 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse206) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse206) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse206))))) (.cse201 (forall ((v_arrayElimCell_68 (_ BitVec 32)) (v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse205 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse205) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse205)))))) (let ((.cse198 (and .cse199 .cse201))) (and (or .cse7 .cse198) .cse199 .cse200 .cse201 .cse202 .cse203 .cse204 (or .cse198 .cse4))))) (or .cse0 (let ((.cse207 (or .cse214 .cse215))) (and .cse207 .cse208 (or .cse209 (and .cse210 .cse207 .cse211 .cse212 .cse213))))) (or .cse0 .cse1 .cse186) (or .cse0 (and .cse200 .cse202 .cse203 .cse204)) (or .cse216 .cse0 .cse186) (or .cse0 .cse217 (forall ((v_arrayElimCell_62 (_ BitVec 32))) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) (select |c_#length| v_arrayElimCell_62)))) (or .cse0 (let ((.cse219 (and .cse210 .cse221))) (and (or .cse71 .cse80) (or .cse80 .cse218) (or .cse218 .cse219) (or .cse71 .cse220) (or .cse71 .cse219)))) (or .cse0 (let ((.cse222 (forall ((v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse243 (select |c_#length| v_arrayElimCell_62)) (.cse245 (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|)) (.cse244 (bvadd (_ bv4 32) v_arrayElimCell_71)) (.cse246 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse243) (bvule .cse244 .cse243) (bvule .cse245 .cse243) (bvule .cse244 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse245 .cse246) (bvule .cse244 .cse246))))) (.cse223 (forall ((v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse241 (select |c_#length| v_arrayElimCell_62)) (.cse242 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse241) (bvule .cse242 .cse241) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse241) (bvule .cse242 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse242 (select |c_#length| v_arrayElimCell_75))))))) (and (or .cse4 .cse222) (or .cse4 .cse223) (or .cse7 .cse222) (or .cse7 .cse223) (forall ((v_arrayElimCell_75 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) (select |c_#length| v_arrayElimCell_75)) (forall ((v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse224 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse224 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse225 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse225) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse225) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse225) (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) (select |c_#length| v_arrayElimCell_74)) (forall ((v_arrayElimCell_72 (_ BitVec 32))) (let ((.cse226 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse226 (select |c_#length| v_arrayElimCell_74)) (bvule .cse226 (select |c_#length| v_arrayElimCell_62)))))))))) (bvule .cse224 (select |c_#length| v_arrayElimCell_75))))))) (forall ((v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse227 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse227) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse227) (forall ((v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse228 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse228 (select |c_#length| v_arrayElimCell_62)) (bvule .cse228 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_75 (_ BitVec 32))) (let ((.cse229 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse229) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse229)))))))))) (forall ((v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse230 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse230 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse231 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse231) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse231) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse231) (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) (select |c_#length| v_arrayElimCell_74)) (forall ((v_arrayElimCell_72 (_ BitVec 32))) (let ((.cse232 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse232 (select |c_#length| v_arrayElimCell_74)) (bvule .cse232 (select |c_#length| v_arrayElimCell_62)))))))))) (bvule .cse230 (select |c_#length| v_arrayElimCell_75))))) (forall ((v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse235 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (forall ((v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse233 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse233) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse233) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse233) (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse234 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse234 (select |c_#length| v_arrayElimCell_74)) (bvule .cse234 (select |c_#length| v_arrayElimCell_62)))))))) (bvule .cse235 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse235 (select |c_#length| v_arrayElimCell_75))))) (forall ((v_arrayElimCell_75 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) (select |c_#length| v_arrayElimCell_75)) (forall ((v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse238 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (forall ((v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse236 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse236) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse236) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse236) (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse237 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse237 (select |c_#length| v_arrayElimCell_74)) (bvule .cse237 (select |c_#length| v_arrayElimCell_62)))))))) (bvule .cse238 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse238 (select |c_#length| v_arrayElimCell_75))))))) (forall ((v_arrayElimCell_66 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse239 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_66) .cse239) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse239) (forall ((v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse240 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse240 (select |c_#length| v_arrayElimCell_62)) (bvule .cse240 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_75 (_ BitVec 32))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| v_arrayElimCell_75)))))))))))) (or (and (or .cse71 (and .cse214 .cse220)) .cse247 (or .cse71 (and .cse210 (forall ((v_arrayElimCell_65 (_ BitVec 32))) (or (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse248 (select |c_#length| v_arrayElimCell_74))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_72) .cse248) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) .cse248)))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)))))) .cse101 (or .cse71 (and .cse249 .cse210 (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse250 (select |c_#length| v_arrayElimCell_74)) (.cse251 (bvadd (_ bv4 32) v_arrayElimCell_65))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_72) .cse250) (bvule .cse251 .cse250) (bvule .cse251 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|))))))) .cse252 (or .cse71 (and .cse80 (or .cse214 .cse253))) .cse104 .cse254 .cse65 .cse66 .cse255 .cse109 (or .cse214 .cse71 .cse253) .cse256) .cse257) (or .cse0 (and (or .cse209 (and (or (and .cse210 .cse213) .cse186) .cse211 .cse212)) .cse211 .cse212)) (or (let ((.cse262 (forall ((v_arrayElimCell_69 (_ BitVec 32)) (v_arrayElimCell_59 (_ BitVec 32)) (v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse284 (bvadd (_ bv4 32) v_arrayElimCell_71)) (.cse285 (select |c_#length| v_arrayElimCell_59))) (or (bvule .cse284 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse284 .cse285) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) .cse285) (bvule (bvadd (_ bv4 32) v_arrayElimCell_69) .cse285)))))) (and (forall ((v_arrayElimCell_71 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_69 (_ BitVec 32)) (v_arrayElimCell_59 (_ BitVec 32))) (let ((.cse258 (select |c_#length| v_arrayElimCell_59))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse258) (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse260 (select |c_#length| v_arrayElimCell_74)) (.cse259 (bvadd (_ bv4 32) v_arrayElimCell_72)) (.cse261 (bvadd (_ bv4 32) v_arrayElimCell_65))) (or (bvule .cse259 .cse260) (bvule .cse261 .cse260) (bvule .cse259 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse261 (select |c_#length| v_arrayElimCell_59))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_69) .cse258)))))) (or .cse80 .cse262) (forall ((v_arrayElimCell_71 (_ BitVec 32))) (or (forall ((v_arrayElimCell_69 (_ BitVec 32)) (v_arrayElimCell_59 (_ BitVec 32))) (let ((.cse267 (select |c_#length| v_arrayElimCell_59))) (or (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse264 (select |c_#length| v_arrayElimCell_74)) (.cse265 (bvadd (_ bv4 32) v_arrayElimCell_65)) (.cse263 (bvadd (_ bv4 32) v_arrayElimCell_72)) (.cse266 (select |c_#length| v_arrayElimCell_59))) (or (bvule .cse263 .cse264) (bvule .cse265 .cse264) (bvule .cse263 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse265 .cse266) (bvule .cse263 .cse266)))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse267) (bvule (bvadd (_ bv4 32) v_arrayElimCell_69) .cse267)))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)))) (or (and .cse268 .cse269) .cse186) (forall ((v_arrayElimCell_71 (_ BitVec 32))) (or (forall ((v_arrayElimCell_69 (_ BitVec 32)) (v_arrayElimCell_59 (_ BitVec 32)) (v_arrayElimCell_65 (_ BitVec 32))) (let ((.cse271 (select |c_#length| v_arrayElimCell_59))) (or (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse270 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse270 (select |c_#length| v_arrayElimCell_74)) (bvule .cse270 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse270 (select |c_#length| v_arrayElimCell_59))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse271) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) .cse271) (bvule (bvadd (_ bv4 32) v_arrayElimCell_69) .cse271)))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)))) (or (and .cse272 .cse273 .cse274 .cse275) .cse186) (or (and .cse276 .cse277 .cse278 .cse279) .cse186) (or (and .cse280 .cse281) .cse186) (forall ((v_arrayElimCell_71 (_ BitVec 32))) (or (forall ((v_arrayElimCell_69 (_ BitVec 32)) (v_arrayElimCell_59 (_ BitVec 32)) (v_arrayElimCell_65 (_ BitVec 32))) (let ((.cse283 (select |c_#length| v_arrayElimCell_59))) (or (forall ((v_arrayElimCell_74 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) (select |c_#length| v_arrayElimCell_74)) (forall ((v_arrayElimCell_72 (_ BitVec 32))) (let ((.cse282 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse282 (select |c_#length| v_arrayElimCell_74)) (bvule .cse282 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse282 (select |c_#length| v_arrayElimCell_59))))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse283) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) .cse283) (bvule (bvadd (_ bv4 32) v_arrayElimCell_69) .cse283)))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)))) (or .cse86 .cse262))) .cse0) (or .cse0 (and (or .cse286 .cse7 .cse287) (or .cse286 .cse287 .cse4) .cse288 .cse289 (forall ((v_arrayElimCell_68 (_ BitVec 32))) (or (forall ((v_arrayElimCell_75 (_ BitVec 32))) (or (forall ((v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse290 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse290 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse290 (select |c_#length| v_arrayElimCell_75))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| v_arrayElimCell_75)))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)))) (forall ((v_arrayElimCell_68 (_ BitVec 32))) (or (forall ((v_arrayElimCell_75 (_ BitVec 32))) (let ((.cse292 (select |c_#length| v_arrayElimCell_75))) (or (forall ((v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse291 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse291 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse291 (select |c_#length| v_arrayElimCell_75))))) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse292) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse292)))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)))) .cse293 .cse294)) (or .cse0 (and .cse101 .cse104 .cse254 .cse65 .cse66 .cse255)) (or (and .cse7 .cse185 .cse4) .cse0) (or (let ((.cse298 (and (forall ((v_arrayElimCell_68 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (or (forall ((v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse305 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse305 (select |c_#length| v_arrayElimCell_62)) (forall ((v_arrayElimCell_75 (_ BitVec 32))) (let ((.cse306 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse306) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse306) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse306)))) (bvule .cse305 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| v_arrayElimCell_62)))) (forall ((v_arrayElimCell_68 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (or (forall ((v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse307 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse307 (select |c_#length| v_arrayElimCell_62)) (bvule .cse307 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_75 (_ BitVec 32))) (let ((.cse308 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse308) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse308))))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| v_arrayElimCell_62)))))) (.cse295 (and (forall ((v_arrayElimCell_68 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (or (forall ((v_arrayElimCell_75 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) (select |c_#length| v_arrayElimCell_75)) (forall ((v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse303 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse303 (select |c_#length| v_arrayElimCell_62)) (bvule .cse303 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse303 (select |c_#length| v_arrayElimCell_75))))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| v_arrayElimCell_62)))) (forall ((v_arrayElimCell_68 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (or (forall ((v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse304 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse304 (select |c_#length| v_arrayElimCell_62)) (bvule .cse304 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse304 (select |c_#length| v_arrayElimCell_75))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| v_arrayElimCell_62))))))) (and (or .cse7 .cse295) (forall ((v_arrayElimCell_68 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (or (forall ((v_arrayElimCell_75 (_ BitVec 32))) (let ((.cse296 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse296) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse296) (forall ((v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse297 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse297 (select |c_#length| v_arrayElimCell_62)) (bvule .cse297 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse297 (select |c_#length| v_arrayElimCell_75)))))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| v_arrayElimCell_62)))) (or .cse298 .cse4) (or .cse7 .cse298) (forall ((v_arrayElimCell_68 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (or (forall ((v_arrayElimCell_75 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| v_arrayElimCell_75)) (forall ((v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse299 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse299 (select |c_#length| v_arrayElimCell_62)) (bvule .cse299 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse299 (select |c_#length| v_arrayElimCell_75))))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| v_arrayElimCell_62)))) (or .cse295 .cse4) (forall ((v_arrayElimCell_62 (_ BitVec 32))) (or (forall ((v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse300 (bvadd (_ bv4 32) v_arrayElimCell_71)) (.cse301 (select |c_#length| v_arrayElimCell_75))) (or (bvule .cse300 (select |c_#length| v_arrayElimCell_62)) (bvule .cse300 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse301) (bvule .cse300 .cse301)))) (forall ((v_arrayElimCell_68 (_ BitVec 32))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| v_arrayElimCell_62))))) (forall ((v_arrayElimCell_62 (_ BitVec 32))) (or (forall ((v_arrayElimCell_68 (_ BitVec 32))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| v_arrayElimCell_62))) (forall ((v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse302 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse302 (select |c_#length| v_arrayElimCell_62)) (bvule .cse302 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse302 (select |c_#length| v_arrayElimCell_75))))))))) .cse0) (or (and (forall ((v_arrayElimCell_68 (_ BitVec 32))) (or (forall ((v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse309 (bvadd (_ bv4 32) v_arrayElimCell_71)) (.cse310 (select |c_#length| v_arrayElimCell_75))) (or (bvule .cse309 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse310) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse310) (bvule .cse309 .cse310)))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)))) .cse288 (or .cse286 .cse7 .cse63) .cse289 .cse293 (forall ((v_arrayElimCell_68 (_ BitVec 32))) (or (forall ((v_arrayElimCell_75 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse311 (bvadd (_ bv4 32) v_arrayElimCell_71)) (.cse312 (select |c_#length| v_arrayElimCell_75))) (or (bvule .cse311 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) .cse312) (bvule .cse311 .cse312)))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_68) (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)))) (or .cse286 .cse4 .cse63) .cse294) .cse0) (or .cse0 (and (or .cse209 (and (or .cse257 .cse215 .cse186) (or .cse257 .cse313 .cse186))) .cse314 (or .cse186 (and .cse315 .cse80 .cse316)) .cse317 (or (and .cse318 .cse315) .cse186) (or .cse80 .cse186))) (or .cse0 (and .cse247 .cse252 .cse254 .cse66 .cse255 .cse256)) (or .cse0 (let ((.cse319 (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse324 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse324) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) .cse324)))))) (and (or .cse65 .cse319) (or .cse71 (and (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_62 (_ BitVec 32))) (let ((.cse320 (select |c_#length| v_arrayElimCell_62))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse320) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) .cse320) (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse321 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse321 (select |c_#length| v_arrayElimCell_74)) (bvule .cse321 (select |c_#length| v_arrayElimCell_62)))))))) (or .cse4 .cse319))) (or .cse66 .cse319) (or .cse71 (and (forall ((v_arrayElimCell_62 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) (select |c_#length| v_arrayElimCell_62)) (forall ((v_arrayElimCell_65 (_ BitVec 32))) (or (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse322 (select |c_#length| v_arrayElimCell_74))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_72) .cse322) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) .cse322)))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) (select |c_#length| v_arrayElimCell_62)))))) (forall ((v_arrayElimCell_62 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) (select |c_#length| v_arrayElimCell_62)) (forall ((v_arrayElimCell_65 (_ BitVec 32))) (or (forall ((v_arrayElimCell_74 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) (select |c_#length| v_arrayElimCell_74)) (forall ((v_arrayElimCell_72 (_ BitVec 32))) (let ((.cse323 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse323 (select |c_#length| v_arrayElimCell_74)) (bvule .cse323 (select |c_#length| v_arrayElimCell_62))))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) (select |c_#length| v_arrayElimCell_62))))))))))) (or .cse0 .cse325 (and .cse326 .cse289 (or .cse327 .cse253) (or .cse286 .cse71 .cse328) (or .cse327 .cse328) .cse293 (or .cse286 .cse71 .cse253) .cse329)) (or .cse0 (let ((.cse341 (forall ((v_arrayElimCell_69 (_ BitVec 32)) (v_arrayElimCell_59 (_ BitVec 32)) (v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse344 (select |c_#length| v_arrayElimCell_59))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse344) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) .cse344) (bvule (bvadd (_ bv4 32) v_arrayElimCell_69) .cse344)))))) (and (forall ((v_arrayElimCell_69 (_ BitVec 32)) (v_arrayElimCell_59 (_ BitVec 32)) (v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse331 (select |c_#length| v_arrayElimCell_59))) (or (forall ((v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse330 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse330 (select |c_#length| v_arrayElimCell_74)) (bvule .cse330 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse330 (select |c_#length| v_arrayElimCell_59))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse331) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) .cse331) (bvule (bvadd (_ bv4 32) v_arrayElimCell_69) .cse331)))) .cse276 .cse280 .cse272 .cse268 .cse269 .cse281 (forall ((v_arrayElimCell_69 (_ BitVec 32)) (v_arrayElimCell_59 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse332 (select |c_#length| v_arrayElimCell_59))) (or (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse332) (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse334 (select |c_#length| v_arrayElimCell_74)) (.cse333 (bvadd (_ bv4 32) v_arrayElimCell_72)) (.cse335 (bvadd (_ bv4 32) v_arrayElimCell_65))) (or (bvule .cse333 .cse334) (bvule .cse335 .cse334) (bvule .cse333 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse335 (select |c_#length| v_arrayElimCell_59))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_69) .cse332)))) .cse273 (forall ((v_arrayElimCell_69 (_ BitVec 32)) (v_arrayElimCell_59 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse340 (select |c_#length| v_arrayElimCell_59))) (or (forall ((v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_72 (_ BitVec 32)) (v_arrayElimCell_74 (_ BitVec 32))) (let ((.cse337 (select |c_#length| v_arrayElimCell_74)) (.cse338 (bvadd (_ bv4 32) v_arrayElimCell_65)) (.cse336 (bvadd (_ bv4 32) v_arrayElimCell_72)) (.cse339 (select |c_#length| v_arrayElimCell_59))) (or (bvule .cse336 .cse337) (bvule .cse338 .cse337) (bvule .cse336 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse338 .cse339) (bvule .cse336 .cse339)))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse340) (bvule (bvadd (_ bv4 32) v_arrayElimCell_69) .cse340)))) .cse274 (or .cse80 .cse341) .cse277 (forall ((v_arrayElimCell_69 (_ BitVec 32)) (v_arrayElimCell_59 (_ BitVec 32)) (v_arrayElimCell_65 (_ BitVec 32)) (v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse343 (select |c_#length| v_arrayElimCell_59))) (or (forall ((v_arrayElimCell_74 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) (select |c_#length| v_arrayElimCell_74)) (forall ((v_arrayElimCell_72 (_ BitVec 32))) (let ((.cse342 (bvadd (_ bv4 32) v_arrayElimCell_72))) (or (bvule .cse342 (select |c_#length| v_arrayElimCell_74)) (bvule .cse342 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule .cse342 (select |c_#length| v_arrayElimCell_59))))))) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse343) (bvule (bvadd (_ bv4 32) v_arrayElimCell_65) .cse343) (bvule (bvadd (_ bv4 32) v_arrayElimCell_69) .cse343)))) .cse275 .cse278 (or .cse86 .cse341) .cse279))) (or .cse0 (let ((.cse345 (forall ((v_arrayElimCell_62 (_ BitVec 32))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) (select |c_#length| v_arrayElimCell_62)) (forall ((v_arrayElimCell_71 (_ BitVec 32))) (let ((.cse346 (bvadd (_ bv4 32) v_arrayElimCell_71))) (or (bvule .cse346 (select |c_#length| v_arrayElimCell_62)) (bvule .cse346 (select |c_#length| |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (forall ((v_arrayElimCell_75 (_ BitVec 32))) (let ((.cse347 (select |c_#length| v_arrayElimCell_75))) (or (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|) .cse347) (bvule (bvadd (_ bv4 32) v_arrayElimCell_71) .cse347))))))))))) (and (or .cse345 .cse4) .cse2 (or .cse7 .cse345) .cse5 .cse6 .cse8))) (or .cse0 .cse217) (or (and .cse318 .cse314 .cse315 .cse80 .cse316 .cse317 (or .cse209 (and .cse318 .cse316))) .cse0) (or (and .cse86 .cse80 .cse348) (and .cse257 .cse0)) (or .cse257 (let ((.cse349 (or .cse71 .cse253))) (and (or (and .cse349 (or .cse108 .cse253)) .cse325) .cse247 .cse101 .cse252 .cse104 .cse65 .cse66 (or .cse71 .cse325) (or .cse71 .cse325 .cse328) .cse109 (or (and (or .cse71 .cse328) .cse349 .cse108 .cse350) .cse325) .cse256))) (or .cse216 .cse0)))))) is different from true [2022-07-12 19:20:46,395 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-07-12 19:20:46,395 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [963039287] [2022-07-12 19:20:46,395 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [963039287] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 19:20:46,395 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1557555725] [2022-07-12 19:20:46,395 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-12 19:20:46,396 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-07-12 19:20:46,396 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 [2022-07-12 19:20:46,398 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-07-12 19:20:46,407 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (20)] Waiting until timeout for monitored process [2022-07-12 19:20:46,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-12 19:20:46,617 INFO L263 TraceCheckSpWp]: Trace formula consists of 209 conjuncts, 53 conjunts are in the unsatisfiable core [2022-07-12 19:20:46,620 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-12 19:20:46,870 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 19:20:46,887 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-07-12 19:20:48,422 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-07-12 19:20:48,422 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-07-12 19:20:48,463 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2022-07-12 19:20:49,122 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 19:20:49,140 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-12 19:20:49,959 INFO L356 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-07-12 19:20:49,960 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 37 [2022-07-12 19:20:49,971 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2022-07-12 19:20:52,515 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-07-12 19:20:52,515 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 83 treesize of output 42 [2022-07-12 19:20:52,525 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 13 [2022-07-12 19:20:52,559 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 1 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-12 19:20:52,559 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-12 19:20:55,803 WARN L833 $PredicateComparison]: unable to prove that (and (forall ((|ULTIMATE.start_main_~#s~0#1.base| (_ BitVec 32)) (v_ArrVal_726 (Array (_ BitVec 32) (_ BitVec 32))) (v_ArrVal_727 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse2 (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_sll_circular_create_~last~0#1.base| v_ArrVal_726)) (.cse3 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_circular_create_~last~0#1.base| v_ArrVal_727))) (let ((.cse1 (select (select .cse3 |ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse0 (select (select .cse2 |ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (not (= .cse0 |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|)) (not (= .cse1 |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|)) (bvule (bvadd (_ bv4 32) (select (select .cse2 .cse1) .cse0)) (select |c_#length| (select (select .cse3 .cse1) .cse0))))))) (forall ((|ULTIMATE.start_main_~#s~0#1.base| (_ BitVec 32)) (v_ArrVal_726 (Array (_ BitVec 32) (_ BitVec 32))) (v_ArrVal_727 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse5 (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_sll_circular_create_~last~0#1.base| v_ArrVal_726))) (let ((.cse7 (select (select .cse5 |ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse6 (select (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_circular_create_~last~0#1.base| v_ArrVal_727) |ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (let ((.cse4 (select (select .cse5 .cse6) .cse7))) (bvule .cse4 (bvadd (_ bv4 32) .cse4))) (not (= .cse7 |c_ULTIMATE.start_sll_circular_create_~head~0#1.offset|)) (not (= .cse6 |c_ULTIMATE.start_sll_circular_create_~head~0#1.base|))))))) is different from false [2022-07-12 19:20:55,990 WARN L833 $PredicateComparison]: unable to prove that (and (forall ((|ULTIMATE.start_main_~#s~0#1.base| (_ BitVec 32)) (v_ArrVal_726 (Array (_ BitVec 32) (_ BitVec 32))) (v_ArrVal_727 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse1 (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_sll_circular_create_~last~0#1.base| v_ArrVal_726)) (.cse3 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_circular_create_~last~0#1.base| v_ArrVal_727))) (let ((.cse0 (select (select .cse3 |ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse2 (select (select .cse1 |ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (not (= .cse0 |c_ULTIMATE.start_sll_circular_create_~new_head~0#1.base|)) (bvule (bvadd (_ bv4 32) (select (select .cse1 .cse0) .cse2)) (select |c_#length| (select (select .cse3 .cse0) .cse2))) (not (= .cse2 |c_ULTIMATE.start_sll_circular_create_~new_head~0#1.offset|)))))) (forall ((|ULTIMATE.start_main_~#s~0#1.base| (_ BitVec 32)) (v_ArrVal_726 (Array (_ BitVec 32) (_ BitVec 32))) (v_ArrVal_727 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse5 (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_sll_circular_create_~last~0#1.base| v_ArrVal_726))) (let ((.cse6 (select (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_circular_create_~last~0#1.base| v_ArrVal_727) |ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse7 (select (select .cse5 |ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (or (let ((.cse4 (select (select .cse5 .cse6) .cse7))) (bvule .cse4 (bvadd (_ bv4 32) .cse4))) (not (= .cse6 |c_ULTIMATE.start_sll_circular_create_~new_head~0#1.base|)) (not (= .cse7 |c_ULTIMATE.start_sll_circular_create_~new_head~0#1.offset|))))))) is different from false [2022-07-12 19:20:56,027 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 19:20:56,027 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 117 treesize of output 93 [2022-07-12 19:20:56,056 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 19:20:56,056 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 69 [2022-07-12 19:20:56,423 INFO L356 Elim1Store]: treesize reduction 21, result has 73.1 percent of original size [2022-07-12 19:20:56,424 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 5 new quantified variables, introduced 6 case distinctions, treesize of input 242 treesize of output 250 [2022-07-12 19:20:57,791 INFO L356 Elim1Store]: treesize reduction 67, result has 64.0 percent of original size [2022-07-12 19:20:57,792 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 6 select indices, 6 select index equivalence classes, 0 disjoint index pairs (out of 15 index pairs), introduced 7 new quantified variables, introduced 15 case distinctions, treesize of input 546 treesize of output 556 [2022-07-12 19:20:57,957 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 19:20:57,958 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 493 treesize of output 473 [2022-07-12 19:20:58,138 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 19:20:58,139 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 439 treesize of output 411 [2022-07-12 19:21:44,747 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 19:21:44,747 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 115 treesize of output 99 [2022-07-12 19:21:44,777 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 19:21:44,777 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 99 treesize of output 67 [2022-07-12 19:21:44,876 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 19:21:44,876 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 120 treesize of output 115 [2022-07-12 19:21:46,505 INFO L356 Elim1Store]: treesize reduction 67, result has 64.0 percent of original size [2022-07-12 19:21:46,505 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 6 select indices, 6 select index equivalence classes, 0 disjoint index pairs (out of 15 index pairs), introduced 7 new quantified variables, introduced 15 case distinctions, treesize of input 254 treesize of output 288 [2022-07-12 19:21:46,548 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 158 treesize of output 138 [2022-07-12 19:21:46,747 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-12 19:21:46,747 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 213 treesize of output 205 [2022-07-12 19:22:33,508 WARN L233 SmtUtils]: Spent 26.55s on a formula simplification. DAG size of input: 188 DAG size of output: 13 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-07-12 19:22:34,334 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1557555725] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-12 19:22:34,334 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-07-12 19:22:34,334 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 21] total 35 [2022-07-12 19:22:34,334 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1700639848] [2022-07-12 19:22:34,334 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-07-12 19:22:34,335 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2022-07-12 19:22:34,335 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-07-12 19:22:34,335 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-07-12 19:22:34,336 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=161, Invalid=2206, Unknown=5, NotChecked=490, Total=2862 [2022-07-12 19:22:34,336 INFO L87 Difference]: Start difference. First operand 140 states and 157 transitions. Second operand has 36 states, 34 states have (on average 1.6176470588235294) internal successors, (55), 31 states have internal predecessors, (55), 4 states have call successors, (4), 2 states have call predecessors, (4), 3 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4)