./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/termination-memory-alloca/java_Nested-alloca.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 791161d1 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/termination-memory-alloca/java_Nested-alloca.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash e23f623e36810418f8259db464ff0229ef2650c877ad54b7024836b278c00de1 --- Real Ultimate output --- This is Ultimate 0.2.2-?-791161d [2022-07-23 14:28:59,224 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-07-23 14:28:59,226 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-07-23 14:28:59,278 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-07-23 14:28:59,279 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-07-23 14:28:59,280 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-07-23 14:28:59,284 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-07-23 14:28:59,286 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-07-23 14:28:59,288 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-07-23 14:28:59,292 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-07-23 14:28:59,293 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-07-23 14:28:59,295 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-07-23 14:28:59,295 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-07-23 14:28:59,300 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-07-23 14:28:59,301 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-07-23 14:28:59,303 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-07-23 14:28:59,304 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-07-23 14:28:59,306 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-07-23 14:28:59,311 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-07-23 14:28:59,312 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-07-23 14:28:59,313 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-07-23 14:28:59,315 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-07-23 14:28:59,316 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-07-23 14:28:59,317 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-07-23 14:28:59,318 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-07-23 14:28:59,321 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-07-23 14:28:59,321 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-07-23 14:28:59,323 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-07-23 14:28:59,324 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-07-23 14:28:59,324 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-07-23 14:28:59,325 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-07-23 14:28:59,325 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-07-23 14:28:59,326 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-07-23 14:28:59,326 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-07-23 14:28:59,327 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-07-23 14:28:59,328 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-07-23 14:28:59,328 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-07-23 14:28:59,329 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-07-23 14:28:59,329 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-07-23 14:28:59,329 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-07-23 14:28:59,330 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-07-23 14:28:59,333 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-07-23 14:28:59,334 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf [2022-07-23 14:28:59,356 INFO L113 SettingsManager]: Loading preferences was successful [2022-07-23 14:28:59,357 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-07-23 14:28:59,357 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-07-23 14:28:59,357 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-07-23 14:28:59,359 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-07-23 14:28:59,359 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-07-23 14:28:59,359 INFO L138 SettingsManager]: * Use SBE=true [2022-07-23 14:28:59,359 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-07-23 14:28:59,360 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-07-23 14:28:59,360 INFO L138 SettingsManager]: * Use old map elimination=false [2022-07-23 14:28:59,361 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-07-23 14:28:59,361 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-07-23 14:28:59,361 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-07-23 14:28:59,361 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-07-23 14:28:59,361 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-07-23 14:28:59,361 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-07-23 14:28:59,362 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-07-23 14:28:59,362 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-07-23 14:28:59,362 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-07-23 14:28:59,362 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-07-23 14:28:59,362 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-07-23 14:28:59,362 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-07-23 14:28:59,363 INFO L138 SettingsManager]: * Use constant arrays=true [2022-07-23 14:28:59,363 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-07-23 14:28:59,363 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-07-23 14:28:59,363 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-07-23 14:28:59,363 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-07-23 14:28:59,364 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-07-23 14:28:59,365 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-07-23 14:28:59,365 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e23f623e36810418f8259db464ff0229ef2650c877ad54b7024836b278c00de1 [2022-07-23 14:28:59,627 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-07-23 14:28:59,649 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-07-23 14:28:59,653 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-07-23 14:28:59,654 INFO L271 PluginConnector]: Initializing CDTParser... [2022-07-23 14:28:59,654 INFO L275 PluginConnector]: CDTParser initialized [2022-07-23 14:28:59,656 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/termination-memory-alloca/java_Nested-alloca.i [2022-07-23 14:28:59,729 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/5df9bf7a4/21ad56c8cc174e6684b069e65880891d/FLAGbc03fe682 [2022-07-23 14:29:00,233 INFO L306 CDTParser]: Found 1 translation units. [2022-07-23 14:29:00,237 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-memory-alloca/java_Nested-alloca.i [2022-07-23 14:29:00,255 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/5df9bf7a4/21ad56c8cc174e6684b069e65880891d/FLAGbc03fe682 [2022-07-23 14:29:00,711 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/5df9bf7a4/21ad56c8cc174e6684b069e65880891d [2022-07-23 14:29:00,713 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-07-23 14:29:00,715 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-07-23 14:29:00,716 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-07-23 14:29:00,716 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-07-23 14:29:00,719 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-07-23 14:29:00,720 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.07 02:29:00" (1/1) ... [2022-07-23 14:29:00,721 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@dd33ce7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.07 02:29:00, skipping insertion in model container [2022-07-23 14:29:00,721 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.07 02:29:00" (1/1) ... [2022-07-23 14:29:00,728 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-07-23 14:29:00,765 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-07-23 14:29:00,985 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-23 14:29:00,994 INFO L203 MainTranslator]: Completed pre-run [2022-07-23 14:29:01,038 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-23 14:29:01,058 INFO L208 MainTranslator]: Completed translation [2022-07-23 14:29:01,058 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.07 02:29:01 WrapperNode [2022-07-23 14:29:01,058 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-07-23 14:29:01,060 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-07-23 14:29:01,060 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-07-23 14:29:01,060 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-07-23 14:29:01,066 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.07 02:29:01" (1/1) ... [2022-07-23 14:29:01,085 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.07 02:29:01" (1/1) ... [2022-07-23 14:29:01,105 INFO L137 Inliner]: procedures = 109, calls = 25, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 58 [2022-07-23 14:29:01,106 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-07-23 14:29:01,107 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-07-23 14:29:01,108 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-07-23 14:29:01,108 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-07-23 14:29:01,114 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.07 02:29:01" (1/1) ... [2022-07-23 14:29:01,115 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.07 02:29:01" (1/1) ... [2022-07-23 14:29:01,128 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.07 02:29:01" (1/1) ... [2022-07-23 14:29:01,129 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.07 02:29:01" (1/1) ... [2022-07-23 14:29:01,138 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.07 02:29:01" (1/1) ... [2022-07-23 14:29:01,142 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.07 02:29:01" (1/1) ... [2022-07-23 14:29:01,145 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.07 02:29:01" (1/1) ... [2022-07-23 14:29:01,152 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-07-23 14:29:01,154 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-07-23 14:29:01,155 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-07-23 14:29:01,155 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-07-23 14:29:01,156 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.07 02:29:01" (1/1) ... [2022-07-23 14:29:01,163 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-23 14:29:01,172 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-23 14:29:01,193 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-23 14:29:01,203 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-07-23 14:29:01,233 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-07-23 14:29:01,234 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-07-23 14:29:01,234 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-07-23 14:29:01,236 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-07-23 14:29:01,236 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-07-23 14:29:01,236 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-07-23 14:29:01,340 INFO L234 CfgBuilder]: Building ICFG [2022-07-23 14:29:01,341 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-07-23 14:29:01,508 INFO L275 CfgBuilder]: Performing block encoding [2022-07-23 14:29:01,513 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-07-23 14:29:01,526 INFO L299 CfgBuilder]: Removed 2 assume(true) statements. [2022-07-23 14:29:01,529 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.07 02:29:01 BoogieIcfgContainer [2022-07-23 14:29:01,529 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-07-23 14:29:01,530 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-07-23 14:29:01,530 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-07-23 14:29:01,546 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-07-23 14:29:01,547 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-23 14:29:01,547 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 23.07 02:29:00" (1/3) ... [2022-07-23 14:29:01,548 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@1726dd7c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 23.07 02:29:01, skipping insertion in model container [2022-07-23 14:29:01,548 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-23 14:29:01,548 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.07 02:29:01" (2/3) ... [2022-07-23 14:29:01,548 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@1726dd7c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 23.07 02:29:01, skipping insertion in model container [2022-07-23 14:29:01,548 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-23 14:29:01,548 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.07 02:29:01" (3/3) ... [2022-07-23 14:29:01,550 INFO L354 chiAutomizerObserver]: Analyzing ICFG java_Nested-alloca.i [2022-07-23 14:29:01,622 INFO L255 stractBuchiCegarLoop]: Interprodecural is true [2022-07-23 14:29:01,622 INFO L256 stractBuchiCegarLoop]: Hoare is false [2022-07-23 14:29:01,622 INFO L257 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-07-23 14:29:01,623 INFO L258 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-07-23 14:29:01,623 INFO L259 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-07-23 14:29:01,623 INFO L260 stractBuchiCegarLoop]: Difference is false [2022-07-23 14:29:01,623 INFO L261 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-07-23 14:29:01,623 INFO L265 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-07-23 14:29:01,627 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 12 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-23 14:29:01,649 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 6 [2022-07-23 14:29:01,650 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-23 14:29:01,650 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-23 14:29:01,656 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-23 14:29:01,656 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-07-23 14:29:01,656 INFO L287 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-07-23 14:29:01,657 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 12 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-23 14:29:01,660 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 6 [2022-07-23 14:29:01,660 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-23 14:29:01,660 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-23 14:29:01,661 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-23 14:29:01,661 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-07-23 14:29:01,668 INFO L752 eck$LassoCheckResult]: Stem: 3#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 9#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem12#1, main_~i~0#1.base, main_~i~0#1.offset, main_~j~0#1.base, main_~j~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~i~0#1.base, main_~i~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~j~0#1.base, main_~j~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnStack(4);main_~c~0#1.base, main_~c~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;call write~int(0, main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int(0, main_~i~0#1.base, main_~i~0#1.offset, 4); 5#L552-4true [2022-07-23 14:29:01,669 INFO L754 eck$LassoCheckResult]: Loop: 5#L552-4true call main_#t~mem7#1 := read~int(main_~i~0#1.base, main_~i~0#1.offset, 4); 12#L552-1true assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call write~int(3, main_~j~0#1.base, main_~j~0#1.offset, 4); 11#L553-4true assume !true; 4#L552-3true call main_#t~mem5#1 := read~int(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 5#L552-4true [2022-07-23 14:29:01,678 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-23 14:29:01,679 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2022-07-23 14:29:01,694 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-23 14:29:01,695 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1359301888] [2022-07-23 14:29:01,695 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-23 14:29:01,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-23 14:29:01,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-23 14:29:01,873 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-23 14:29:01,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-23 14:29:01,926 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-23 14:29:01,929 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-23 14:29:01,930 INFO L85 PathProgramCache]: Analyzing trace with hash 1113608, now seen corresponding path program 1 times [2022-07-23 14:29:01,931 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-23 14:29:01,931 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1722280087] [2022-07-23 14:29:01,932 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-23 14:29:01,932 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-23 14:29:01,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-23 14:29:02,001 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-23 14:29:02,001 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-23 14:29:02,002 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1722280087] [2022-07-23 14:29:02,002 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1722280087] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-23 14:29:02,003 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-23 14:29:02,003 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-07-23 14:29:02,003 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1063439357] [2022-07-23 14:29:02,004 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-23 14:29:02,008 INFO L769 eck$LassoCheckResult]: loop already infeasible [2022-07-23 14:29:02,010 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-23 14:29:02,038 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2022-07-23 14:29:02,039 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-07-23 14:29:02,041 INFO L87 Difference]: Start difference. First operand has 12 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 2.0) internal successors, (4), 2 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-23 14:29:02,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-23 14:29:02,047 INFO L93 Difference]: Finished difference Result 12 states and 13 transitions. [2022-07-23 14:29:02,047 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-07-23 14:29:02,052 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 12 states and 13 transitions. [2022-07-23 14:29:02,054 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 6 [2022-07-23 14:29:02,057 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 12 states to 8 states and 9 transitions. [2022-07-23 14:29:02,058 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2022-07-23 14:29:02,059 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2022-07-23 14:29:02,059 INFO L73 IsDeterministic]: Start isDeterministic. Operand 8 states and 9 transitions. [2022-07-23 14:29:02,060 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-23 14:29:02,061 INFO L369 hiAutomatonCegarLoop]: Abstraction has 8 states and 9 transitions. [2022-07-23 14:29:02,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8 states and 9 transitions. [2022-07-23 14:29:02,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8 to 8. [2022-07-23 14:29:02,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.125) internal successors, (9), 7 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-23 14:29:02,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 9 transitions. [2022-07-23 14:29:02,084 INFO L392 hiAutomatonCegarLoop]: Abstraction has 8 states and 9 transitions. [2022-07-23 14:29:02,084 INFO L374 stractBuchiCegarLoop]: Abstraction has 8 states and 9 transitions. [2022-07-23 14:29:02,084 INFO L287 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-07-23 14:29:02,085 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8 states and 9 transitions. [2022-07-23 14:29:02,086 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 6 [2022-07-23 14:29:02,086 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-23 14:29:02,086 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-23 14:29:02,086 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-23 14:29:02,087 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2022-07-23 14:29:02,087 INFO L752 eck$LassoCheckResult]: Stem: 32#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 33#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem12#1, main_~i~0#1.base, main_~i~0#1.offset, main_~j~0#1.base, main_~j~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~i~0#1.base, main_~i~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~j~0#1.base, main_~j~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnStack(4);main_~c~0#1.base, main_~c~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;call write~int(0, main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int(0, main_~i~0#1.base, main_~i~0#1.offset, 4); 35#L552-4 [2022-07-23 14:29:02,087 INFO L754 eck$LassoCheckResult]: Loop: 35#L552-4 call main_#t~mem7#1 := read~int(main_~i~0#1.base, main_~i~0#1.offset, 4); 36#L552-1 assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call write~int(3, main_~j~0#1.base, main_~j~0#1.offset, 4); 38#L553-4 call main_#t~mem9#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4); 39#L553-1 assume !(main_#t~mem9#1 < 12);havoc main_#t~mem9#1; 34#L552-3 call main_#t~mem5#1 := read~int(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 35#L552-4 [2022-07-23 14:29:02,089 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-23 14:29:02,089 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 2 times [2022-07-23 14:29:02,089 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-23 14:29:02,090 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1999959290] [2022-07-23 14:29:02,090 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-23 14:29:02,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-23 14:29:02,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-23 14:29:02,122 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-23 14:29:02,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-23 14:29:02,137 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-23 14:29:02,138 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-23 14:29:02,138 INFO L85 PathProgramCache]: Analyzing trace with hash 34512977, now seen corresponding path program 1 times [2022-07-23 14:29:02,138 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-23 14:29:02,138 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1742923190] [2022-07-23 14:29:02,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-23 14:29:02,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-23 14:29:02,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-23 14:29:02,179 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-23 14:29:02,180 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-23 14:29:02,180 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1742923190] [2022-07-23 14:29:02,180 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1742923190] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-23 14:29:02,181 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-23 14:29:02,181 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-07-23 14:29:02,183 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1831804793] [2022-07-23 14:29:02,183 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-23 14:29:02,183 INFO L769 eck$LassoCheckResult]: loop already infeasible [2022-07-23 14:29:02,184 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-23 14:29:02,188 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-07-23 14:29:02,188 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-07-23 14:29:02,188 INFO L87 Difference]: Start difference. First operand 8 states and 9 transitions. cyclomatic complexity: 2 Second operand has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-23 14:29:02,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-23 14:29:02,229 INFO L93 Difference]: Finished difference Result 11 states and 12 transitions. [2022-07-23 14:29:02,230 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-07-23 14:29:02,230 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11 states and 12 transitions. [2022-07-23 14:29:02,231 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 [2022-07-23 14:29:02,231 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11 states to 11 states and 12 transitions. [2022-07-23 14:29:02,232 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2022-07-23 14:29:02,232 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2022-07-23 14:29:02,232 INFO L73 IsDeterministic]: Start isDeterministic. Operand 11 states and 12 transitions. [2022-07-23 14:29:02,232 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-23 14:29:02,232 INFO L369 hiAutomatonCegarLoop]: Abstraction has 11 states and 12 transitions. [2022-07-23 14:29:02,233 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11 states and 12 transitions. [2022-07-23 14:29:02,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11 to 10. [2022-07-23 14:29:02,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.1) internal successors, (11), 9 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-23 14:29:02,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 11 transitions. [2022-07-23 14:29:02,234 INFO L392 hiAutomatonCegarLoop]: Abstraction has 10 states and 11 transitions. [2022-07-23 14:29:02,234 INFO L374 stractBuchiCegarLoop]: Abstraction has 10 states and 11 transitions. [2022-07-23 14:29:02,235 INFO L287 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-07-23 14:29:02,235 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 11 transitions. [2022-07-23 14:29:02,235 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 8 [2022-07-23 14:29:02,235 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-23 14:29:02,236 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-23 14:29:02,236 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-23 14:29:02,236 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 1, 1, 1, 1, 1, 1] [2022-07-23 14:29:02,236 INFO L752 eck$LassoCheckResult]: Stem: 62#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 63#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem12#1, main_~i~0#1.base, main_~i~0#1.offset, main_~j~0#1.base, main_~j~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~i~0#1.base, main_~i~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~j~0#1.base, main_~j~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnStack(4);main_~c~0#1.base, main_~c~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;call write~int(0, main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int(0, main_~i~0#1.base, main_~i~0#1.offset, 4); 61#L552-4 [2022-07-23 14:29:02,237 INFO L754 eck$LassoCheckResult]: Loop: 61#L552-4 call main_#t~mem7#1 := read~int(main_~i~0#1.base, main_~i~0#1.offset, 4); 64#L552-1 assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call write~int(3, main_~j~0#1.base, main_~j~0#1.offset, 4); 68#L553-4 call main_#t~mem9#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4); 67#L553-1 assume !!(main_#t~mem9#1 < 12);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(main_#t~mem10#1 - 1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem10#1;call main_#t~mem11#1 := read~int(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem11#1; 65#L553-3 call main_#t~mem8#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(2 + main_#t~mem8#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem8#1; 66#L553-4 call main_#t~mem9#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4); 69#L553-1 assume !(main_#t~mem9#1 < 12);havoc main_#t~mem9#1; 60#L552-3 call main_#t~mem5#1 := read~int(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 61#L552-4 [2022-07-23 14:29:02,237 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-23 14:29:02,237 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 3 times [2022-07-23 14:29:02,237 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-23 14:29:02,238 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [902801590] [2022-07-23 14:29:02,238 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-23 14:29:02,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-23 14:29:02,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-23 14:29:02,258 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-23 14:29:02,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-23 14:29:02,272 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-23 14:29:02,274 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-23 14:29:02,274 INFO L85 PathProgramCache]: Analyzing trace with hash 1680656940, now seen corresponding path program 1 times [2022-07-23 14:29:02,275 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-23 14:29:02,275 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [224227492] [2022-07-23 14:29:02,275 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-23 14:29:02,275 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-23 14:29:02,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-23 14:29:02,375 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-23 14:29:02,376 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-23 14:29:02,376 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [224227492] [2022-07-23 14:29:02,376 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [224227492] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-23 14:29:02,376 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [901978069] [2022-07-23 14:29:02,377 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-23 14:29:02,377 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-23 14:29:02,377 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-23 14:29:02,379 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-23 14:29:02,380 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-07-23 14:29:02,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-23 14:29:02,457 INFO L263 TraceCheckSpWp]: Trace formula consists of 68 conjuncts, 20 conjunts are in the unsatisfiable core [2022-07-23 14:29:02,462 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-23 14:29:02,526 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-23 14:29:02,609 INFO L356 Elim1Store]: treesize reduction 16, result has 65.2 percent of original size [2022-07-23 14:29:02,610 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 81 treesize of output 66 [2022-07-23 14:29:02,672 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-23 14:29:02,696 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-07-23 14:29:02,708 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-23 14:29:02,708 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-23 14:29:02,765 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-23 14:29:02,767 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [901978069] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-23 14:29:02,767 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-23 14:29:02,767 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 5, 5] total 10 [2022-07-23 14:29:02,767 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [917415343] [2022-07-23 14:29:02,768 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-23 14:29:02,768 INFO L769 eck$LassoCheckResult]: loop already infeasible [2022-07-23 14:29:02,769 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-23 14:29:02,770 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-07-23 14:29:02,770 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=55, Unknown=0, NotChecked=0, Total=90 [2022-07-23 14:29:02,770 INFO L87 Difference]: Start difference. First operand 10 states and 11 transitions. cyclomatic complexity: 2 Second operand has 10 states, 10 states have (on average 1.7) internal successors, (17), 10 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-23 14:29:02,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-23 14:29:02,861 INFO L93 Difference]: Finished difference Result 20 states and 21 transitions. [2022-07-23 14:29:02,862 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-07-23 14:29:02,864 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 20 states and 21 transitions. [2022-07-23 14:29:02,866 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 18 [2022-07-23 14:29:02,868 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 20 states to 20 states and 21 transitions. [2022-07-23 14:29:02,868 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2022-07-23 14:29:02,869 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2022-07-23 14:29:02,869 INFO L73 IsDeterministic]: Start isDeterministic. Operand 20 states and 21 transitions. [2022-07-23 14:29:02,870 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-23 14:29:02,870 INFO L369 hiAutomatonCegarLoop]: Abstraction has 20 states and 21 transitions. [2022-07-23 14:29:02,870 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states and 21 transitions. [2022-07-23 14:29:02,871 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 19. [2022-07-23 14:29:02,872 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.0526315789473684) internal successors, (20), 18 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-23 14:29:02,873 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 20 transitions. [2022-07-23 14:29:02,873 INFO L392 hiAutomatonCegarLoop]: Abstraction has 19 states and 20 transitions. [2022-07-23 14:29:02,874 INFO L374 stractBuchiCegarLoop]: Abstraction has 19 states and 20 transitions. [2022-07-23 14:29:02,874 INFO L287 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-07-23 14:29:02,874 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 20 transitions. [2022-07-23 14:29:02,877 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 17 [2022-07-23 14:29:02,877 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-23 14:29:02,877 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-23 14:29:02,878 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-23 14:29:02,878 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [5, 4, 4, 1, 1, 1, 1] [2022-07-23 14:29:02,878 INFO L752 eck$LassoCheckResult]: Stem: 153#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 154#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem12#1, main_~i~0#1.base, main_~i~0#1.offset, main_~j~0#1.base, main_~j~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~i~0#1.base, main_~i~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~j~0#1.base, main_~j~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnStack(4);main_~c~0#1.base, main_~c~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;call write~int(0, main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int(0, main_~i~0#1.base, main_~i~0#1.offset, 4); 152#L552-4 [2022-07-23 14:29:02,878 INFO L754 eck$LassoCheckResult]: Loop: 152#L552-4 call main_#t~mem7#1 := read~int(main_~i~0#1.base, main_~i~0#1.offset, 4); 155#L552-1 assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call write~int(3, main_~j~0#1.base, main_~j~0#1.offset, 4); 160#L553-4 call main_#t~mem9#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4); 169#L553-1 assume !!(main_#t~mem9#1 < 12);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(main_#t~mem10#1 - 1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem10#1;call main_#t~mem11#1 := read~int(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem11#1; 156#L553-3 call main_#t~mem8#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(2 + main_#t~mem8#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem8#1; 157#L553-4 call main_#t~mem9#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4); 158#L553-1 assume !!(main_#t~mem9#1 < 12);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(main_#t~mem10#1 - 1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem10#1;call main_#t~mem11#1 := read~int(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem11#1; 159#L553-3 call main_#t~mem8#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(2 + main_#t~mem8#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem8#1; 168#L553-4 call main_#t~mem9#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4); 167#L553-1 assume !!(main_#t~mem9#1 < 12);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(main_#t~mem10#1 - 1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem10#1;call main_#t~mem11#1 := read~int(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem11#1; 166#L553-3 call main_#t~mem8#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(2 + main_#t~mem8#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem8#1; 165#L553-4 call main_#t~mem9#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4); 164#L553-1 assume !!(main_#t~mem9#1 < 12);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(main_#t~mem10#1 - 1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem10#1;call main_#t~mem11#1 := read~int(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem11#1; 162#L553-3 call main_#t~mem8#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(2 + main_#t~mem8#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem8#1; 163#L553-4 call main_#t~mem9#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4); 161#L553-1 assume !(main_#t~mem9#1 < 12);havoc main_#t~mem9#1; 151#L552-3 call main_#t~mem5#1 := read~int(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 152#L552-4 [2022-07-23 14:29:02,879 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-23 14:29:02,880 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 4 times [2022-07-23 14:29:02,880 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-23 14:29:02,880 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [688534132] [2022-07-23 14:29:02,880 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-23 14:29:02,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-23 14:29:02,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-23 14:29:02,905 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-23 14:29:02,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-23 14:29:02,918 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-23 14:29:02,918 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-23 14:29:02,919 INFO L85 PathProgramCache]: Analyzing trace with hash 1241080977, now seen corresponding path program 2 times [2022-07-23 14:29:02,919 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-23 14:29:02,919 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [589071781] [2022-07-23 14:29:02,919 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-23 14:29:02,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-23 14:29:02,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-23 14:29:03,417 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-23 14:29:03,418 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-23 14:29:03,418 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [589071781] [2022-07-23 14:29:03,418 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [589071781] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-23 14:29:03,418 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2070337809] [2022-07-23 14:29:03,418 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-07-23 14:29:03,419 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-23 14:29:03,419 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-23 14:29:03,420 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-23 14:29:03,424 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-07-23 14:29:03,507 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-07-23 14:29:03,508 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-07-23 14:29:03,510 INFO L263 TraceCheckSpWp]: Trace formula consists of 176 conjuncts, 65 conjunts are in the unsatisfiable core [2022-07-23 14:29:03,519 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-23 14:29:03,531 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-23 14:29:03,578 INFO L356 Elim1Store]: treesize reduction 16, result has 65.2 percent of original size [2022-07-23 14:29:03,578 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 81 treesize of output 66 [2022-07-23 14:29:03,654 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 30 [2022-07-23 14:29:03,737 INFO L356 Elim1Store]: treesize reduction 16, result has 65.2 percent of original size [2022-07-23 14:29:03,737 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 103 treesize of output 80 [2022-07-23 14:29:03,813 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 30 [2022-07-23 14:29:03,910 INFO L356 Elim1Store]: treesize reduction 16, result has 65.2 percent of original size [2022-07-23 14:29:03,911 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 103 treesize of output 80 [2022-07-23 14:29:03,980 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 30 [2022-07-23 14:29:04,055 INFO L356 Elim1Store]: treesize reduction 16, result has 65.2 percent of original size [2022-07-23 14:29:04,055 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 103 treesize of output 80 [2022-07-23 14:29:04,131 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-23 14:29:04,138 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-07-23 14:29:04,141 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-23 14:29:04,141 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-23 14:33:18,153 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-23 14:33:18,154 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2070337809] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-23 14:33:18,154 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-23 14:33:18,154 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 12, 12] total 22 [2022-07-23 14:33:18,154 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1334008766] [2022-07-23 14:33:18,154 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-23 14:33:18,155 INFO L769 eck$LassoCheckResult]: loop already infeasible [2022-07-23 14:33:18,155 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-23 14:33:18,155 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-07-23 14:33:18,156 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=164, Invalid=281, Unknown=17, NotChecked=0, Total=462 [2022-07-23 14:33:18,156 INFO L87 Difference]: Start difference. First operand 19 states and 20 transitions. cyclomatic complexity: 2 Second operand has 22 states, 22 states have (on average 1.5909090909090908) internal successors, (35), 22 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-23 14:33:18,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-23 14:33:18,344 INFO L93 Difference]: Finished difference Result 23 states and 24 transitions. [2022-07-23 14:33:18,344 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-07-23 14:33:18,345 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 23 states and 24 transitions. [2022-07-23 14:33:18,345 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 21 [2022-07-23 14:33:18,346 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 23 states to 23 states and 24 transitions. [2022-07-23 14:33:18,346 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 23 [2022-07-23 14:33:18,346 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 23 [2022-07-23 14:33:18,346 INFO L73 IsDeterministic]: Start isDeterministic. Operand 23 states and 24 transitions. [2022-07-23 14:33:18,346 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-23 14:33:18,346 INFO L369 hiAutomatonCegarLoop]: Abstraction has 23 states and 24 transitions. [2022-07-23 14:33:18,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states and 24 transitions. [2022-07-23 14:33:18,348 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 22. [2022-07-23 14:33:18,348 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.0454545454545454) internal successors, (23), 21 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-23 14:33:18,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 23 transitions. [2022-07-23 14:33:18,348 INFO L392 hiAutomatonCegarLoop]: Abstraction has 22 states and 23 transitions. [2022-07-23 14:33:18,348 INFO L374 stractBuchiCegarLoop]: Abstraction has 22 states and 23 transitions. [2022-07-23 14:33:18,349 INFO L287 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-07-23 14:33:18,349 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 22 states and 23 transitions. [2022-07-23 14:33:18,349 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 20 [2022-07-23 14:33:18,349 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-23 14:33:18,349 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-23 14:33:18,350 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-23 14:33:18,350 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [6, 5, 5, 1, 1, 1, 1] [2022-07-23 14:33:18,350 INFO L752 eck$LassoCheckResult]: Stem: 316#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 317#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem12#1, main_~i~0#1.base, main_~i~0#1.offset, main_~j~0#1.base, main_~j~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~i~0#1.base, main_~i~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~j~0#1.base, main_~j~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnStack(4);main_~c~0#1.base, main_~c~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;call write~int(0, main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int(0, main_~i~0#1.base, main_~i~0#1.offset, 4); 319#L552-4 [2022-07-23 14:33:18,350 INFO L754 eck$LassoCheckResult]: Loop: 319#L552-4 call main_#t~mem7#1 := read~int(main_~i~0#1.base, main_~i~0#1.offset, 4); 320#L552-1 assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call write~int(3, main_~j~0#1.base, main_~j~0#1.offset, 4); 325#L553-4 call main_#t~mem9#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4); 337#L553-1 assume !!(main_#t~mem9#1 < 12);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(main_#t~mem10#1 - 1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem10#1;call main_#t~mem11#1 := read~int(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem11#1; 321#L553-3 call main_#t~mem8#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(2 + main_#t~mem8#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem8#1; 322#L553-4 call main_#t~mem9#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4); 323#L553-1 assume !!(main_#t~mem9#1 < 12);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(main_#t~mem10#1 - 1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem10#1;call main_#t~mem11#1 := read~int(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem11#1; 324#L553-3 call main_#t~mem8#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(2 + main_#t~mem8#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem8#1; 336#L553-4 call main_#t~mem9#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4); 335#L553-1 assume !!(main_#t~mem9#1 < 12);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(main_#t~mem10#1 - 1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem10#1;call main_#t~mem11#1 := read~int(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem11#1; 334#L553-3 call main_#t~mem8#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(2 + main_#t~mem8#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem8#1; 333#L553-4 call main_#t~mem9#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4); 332#L553-1 assume !!(main_#t~mem9#1 < 12);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(main_#t~mem10#1 - 1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem10#1;call main_#t~mem11#1 := read~int(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem11#1; 331#L553-3 call main_#t~mem8#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(2 + main_#t~mem8#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem8#1; 330#L553-4 call main_#t~mem9#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4); 329#L553-1 assume !!(main_#t~mem9#1 < 12);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(main_#t~mem10#1 - 1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem10#1;call main_#t~mem11#1 := read~int(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem11#1; 327#L553-3 call main_#t~mem8#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(2 + main_#t~mem8#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem8#1; 328#L553-4 call main_#t~mem9#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4); 326#L553-1 assume !(main_#t~mem9#1 < 12);havoc main_#t~mem9#1; 318#L552-3 call main_#t~mem5#1 := read~int(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 319#L552-4 [2022-07-23 14:33:18,350 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-23 14:33:18,351 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 5 times [2022-07-23 14:33:18,351 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-23 14:33:18,351 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1554012516] [2022-07-23 14:33:18,351 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-23 14:33:18,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-23 14:33:18,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-23 14:33:18,365 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-23 14:33:18,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-23 14:33:18,376 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-23 14:33:18,376 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-23 14:33:18,376 INFO L85 PathProgramCache]: Analyzing trace with hash 1966644716, now seen corresponding path program 3 times [2022-07-23 14:33:18,377 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-23 14:33:18,377 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [482762343] [2022-07-23 14:33:18,377 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-23 14:33:18,377 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-23 14:33:18,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-23 14:33:18,445 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-23 14:33:18,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-23 14:33:18,479 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-23 14:33:18,480 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-23 14:33:18,480 INFO L85 PathProgramCache]: Analyzing trace with hash -872207186, now seen corresponding path program 1 times [2022-07-23 14:33:18,480 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-23 14:33:18,480 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2016103339] [2022-07-23 14:33:18,481 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-23 14:33:18,481 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-23 14:33:18,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-23 14:33:19,311 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-23 14:33:19,311 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-23 14:33:19,312 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2016103339] [2022-07-23 14:33:19,312 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2016103339] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-23 14:33:19,312 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [148324192] [2022-07-23 14:33:19,312 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-23 14:33:19,312 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-23 14:33:19,312 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-23 14:33:19,360 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-23 14:33:19,361 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-07-23 14:33:19,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-23 14:33:19,472 INFO L263 TraceCheckSpWp]: Trace formula consists of 287 conjuncts, 57 conjunts are in the unsatisfiable core [2022-07-23 14:33:19,478 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-23 14:33:19,501 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 42 [2022-07-23 14:33:19,560 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-07-23 14:33:19,612 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 22 [2022-07-23 14:33:19,623 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 16 [2022-07-23 14:33:19,641 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-23 14:33:19,682 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 19 [2022-07-23 14:33:19,691 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 16 [2022-07-23 14:33:19,726 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-23 14:33:19,759 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 19 [2022-07-23 14:33:19,768 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 16 [2022-07-23 14:33:19,799 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-23 14:33:19,838 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 19 [2022-07-23 14:33:19,847 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 16 [2022-07-23 14:33:19,871 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-23 14:33:19,899 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 19 [2022-07-23 14:33:19,908 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 16 [2022-07-23 14:33:19,925 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2022-07-23 14:33:19,942 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-07-23 14:33:19,950 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-23 14:33:19,950 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-23 14:33:20,206 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_473 Int) (v_ArrVal_477 (Array Int Int))) (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_main_~j~0#1.base|))) (or (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~j~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~j~0#1.offset| (+ v_ArrVal_473 (- 1)))) |c_ULTIMATE.start_main_~c~0#1.base| v_ArrVal_477) |c_ULTIMATE.start_main_~j~0#1.base|) |c_ULTIMATE.start_main_~j~0#1.offset|) 10) (not (<= v_ArrVal_473 (+ (select .cse0 |c_ULTIMATE.start_main_~j~0#1.offset|) 2)))))) is different from false [2022-07-23 14:33:20,429 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_466 Int) (v_ArrVal_473 Int) (v_ArrVal_471 (Array Int Int)) (v_ArrVal_477 (Array Int Int))) (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_main_~j~0#1.base|))) (let ((.cse0 (store (store |c_#memory_int| |c_ULTIMATE.start_main_~j~0#1.base| (store .cse2 |c_ULTIMATE.start_main_~j~0#1.offset| (+ v_ArrVal_466 (- 1)))) |c_ULTIMATE.start_main_~c~0#1.base| v_ArrVal_471))) (let ((.cse1 (select .cse0 |c_ULTIMATE.start_main_~j~0#1.base|))) (or (< (select (select (store (store .cse0 |c_ULTIMATE.start_main_~j~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~j~0#1.offset| (+ v_ArrVal_473 (- 1)))) |c_ULTIMATE.start_main_~c~0#1.base| v_ArrVal_477) |c_ULTIMATE.start_main_~j~0#1.base|) |c_ULTIMATE.start_main_~j~0#1.offset|) 10) (not (<= v_ArrVal_473 (+ (select .cse1 |c_ULTIMATE.start_main_~j~0#1.offset|) 2))) (not (<= v_ArrVal_466 (+ (select .cse2 |c_ULTIMATE.start_main_~j~0#1.offset|) 2)))))))) is different from false [2022-07-23 14:33:20,473 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_466 Int) (v_ArrVal_473 Int) (v_ArrVal_471 (Array Int Int)) (v_ArrVal_464 (Array Int Int)) (v_ArrVal_477 (Array Int Int))) (let ((.cse3 (store (store |c_#memory_int| |c_ULTIMATE.start_main_~j~0#1.base| (let ((.cse4 (select |c_#memory_int| |c_ULTIMATE.start_main_~j~0#1.base|))) (store .cse4 |c_ULTIMATE.start_main_~j~0#1.offset| (+ (- 1) (select .cse4 |c_ULTIMATE.start_main_~j~0#1.offset|))))) |c_ULTIMATE.start_main_~c~0#1.base| v_ArrVal_464))) (let ((.cse2 (select .cse3 |c_ULTIMATE.start_main_~j~0#1.base|))) (let ((.cse1 (store (store .cse3 |c_ULTIMATE.start_main_~j~0#1.base| (store .cse2 |c_ULTIMATE.start_main_~j~0#1.offset| (+ v_ArrVal_466 (- 1)))) |c_ULTIMATE.start_main_~c~0#1.base| v_ArrVal_471))) (let ((.cse0 (select .cse1 |c_ULTIMATE.start_main_~j~0#1.base|))) (or (not (<= v_ArrVal_473 (+ (select .cse0 |c_ULTIMATE.start_main_~j~0#1.offset|) 2))) (< (select (select (store (store .cse1 |c_ULTIMATE.start_main_~j~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~j~0#1.offset| (+ v_ArrVal_473 (- 1)))) |c_ULTIMATE.start_main_~c~0#1.base| v_ArrVal_477) |c_ULTIMATE.start_main_~j~0#1.base|) |c_ULTIMATE.start_main_~j~0#1.offset|) 10) (not (<= v_ArrVal_466 (+ (select .cse2 |c_ULTIMATE.start_main_~j~0#1.offset|) 2))))))))) is different from false [2022-07-23 14:33:20,551 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_466 Int) (v_ArrVal_473 Int) (v_ArrVal_471 (Array Int Int)) (v_ArrVal_459 Int) (v_ArrVal_464 (Array Int Int)) (v_ArrVal_477 (Array Int Int))) (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_main_~j~0#1.base|))) (let ((.cse4 (store (store |c_#memory_int| |c_ULTIMATE.start_main_~j~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~j~0#1.offset| (+ v_ArrVal_459 (- 1)))) |c_ULTIMATE.start_main_~c~0#1.base| v_ArrVal_464))) (let ((.cse2 (select .cse4 |c_ULTIMATE.start_main_~j~0#1.base|))) (let ((.cse3 (store (store .cse4 |c_ULTIMATE.start_main_~j~0#1.base| (store .cse2 |c_ULTIMATE.start_main_~j~0#1.offset| (+ v_ArrVal_466 (- 1)))) |c_ULTIMATE.start_main_~c~0#1.base| v_ArrVal_471))) (let ((.cse1 (select .cse3 |c_ULTIMATE.start_main_~j~0#1.base|))) (or (not (<= v_ArrVal_459 (+ (select .cse0 |c_ULTIMATE.start_main_~j~0#1.offset|) 2))) (not (<= v_ArrVal_473 (+ 2 (select .cse1 |c_ULTIMATE.start_main_~j~0#1.offset|)))) (not (<= v_ArrVal_466 (+ 2 (select .cse2 |c_ULTIMATE.start_main_~j~0#1.offset|)))) (< (select (select (store (store .cse3 |c_ULTIMATE.start_main_~j~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~j~0#1.offset| (+ v_ArrVal_473 (- 1)))) |c_ULTIMATE.start_main_~c~0#1.base| v_ArrVal_477) |c_ULTIMATE.start_main_~j~0#1.base|) |c_ULTIMATE.start_main_~j~0#1.offset|) 10)))))))) is different from false [2022-07-23 14:33:20,923 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_458 (Array Int Int)) (v_ArrVal_466 Int) (v_ArrVal_454 Int) (v_ArrVal_473 Int) (v_ArrVal_471 (Array Int Int)) (v_ArrVal_459 Int) (v_ArrVal_464 (Array Int Int)) (v_ArrVal_477 (Array Int Int))) (let ((.cse1 (select |c_#memory_int| |c_ULTIMATE.start_main_~j~0#1.base|))) (let ((.cse6 (store (store |c_#memory_int| |c_ULTIMATE.start_main_~j~0#1.base| (store .cse1 |c_ULTIMATE.start_main_~j~0#1.offset| (+ v_ArrVal_454 (- 1)))) |c_ULTIMATE.start_main_~c~0#1.base| v_ArrVal_458))) (let ((.cse0 (select .cse6 |c_ULTIMATE.start_main_~j~0#1.base|))) (let ((.cse5 (store (store .cse6 |c_ULTIMATE.start_main_~j~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~j~0#1.offset| (+ v_ArrVal_459 (- 1)))) |c_ULTIMATE.start_main_~c~0#1.base| v_ArrVal_464))) (let ((.cse4 (select .cse5 |c_ULTIMATE.start_main_~j~0#1.base|))) (let ((.cse3 (store (store .cse5 |c_ULTIMATE.start_main_~j~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~j~0#1.offset| (+ v_ArrVal_466 (- 1)))) |c_ULTIMATE.start_main_~c~0#1.base| v_ArrVal_471))) (let ((.cse2 (select .cse3 |c_ULTIMATE.start_main_~j~0#1.base|))) (or (not (<= v_ArrVal_459 (+ (select .cse0 |c_ULTIMATE.start_main_~j~0#1.offset|) 2))) (not (<= v_ArrVal_454 (+ (select .cse1 |c_ULTIMATE.start_main_~j~0#1.offset|) 2))) (not (<= v_ArrVal_473 (+ 2 (select .cse2 |c_ULTIMATE.start_main_~j~0#1.offset|)))) (< (select (select (store (store .cse3 |c_ULTIMATE.start_main_~j~0#1.base| (store .cse2 |c_ULTIMATE.start_main_~j~0#1.offset| (+ v_ArrVal_473 (- 1)))) |c_ULTIMATE.start_main_~c~0#1.base| v_ArrVal_477) |c_ULTIMATE.start_main_~j~0#1.base|) |c_ULTIMATE.start_main_~j~0#1.offset|) 10) (not (<= v_ArrVal_466 (+ 2 (select .cse4 |c_ULTIMATE.start_main_~j~0#1.offset|))))))))))))) is different from false [2022-07-23 14:33:21,003 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_458 (Array Int Int)) (v_ArrVal_466 Int) (v_ArrVal_454 Int) (v_ArrVal_473 Int) (v_ArrVal_450 Int) (v_ArrVal_471 (Array Int Int)) (v_ArrVal_452 (Array Int Int)) (v_ArrVal_459 Int) (v_ArrVal_464 (Array Int Int)) (v_ArrVal_477 (Array Int Int))) (let ((.cse3 (select |c_#memory_int| |c_ULTIMATE.start_main_~j~0#1.base|))) (let ((.cse8 (store (store |c_#memory_int| |c_ULTIMATE.start_main_~j~0#1.base| (store .cse3 |c_ULTIMATE.start_main_~j~0#1.offset| v_ArrVal_450)) |c_ULTIMATE.start_main_~c~0#1.base| v_ArrVal_452))) (let ((.cse4 (select .cse8 |c_ULTIMATE.start_main_~j~0#1.base|))) (let ((.cse7 (store (store .cse8 |c_ULTIMATE.start_main_~j~0#1.base| (store .cse4 |c_ULTIMATE.start_main_~j~0#1.offset| (+ v_ArrVal_454 (- 1)))) |c_ULTIMATE.start_main_~c~0#1.base| v_ArrVal_458))) (let ((.cse5 (select .cse7 |c_ULTIMATE.start_main_~j~0#1.base|))) (let ((.cse6 (store (store .cse7 |c_ULTIMATE.start_main_~j~0#1.base| (store .cse5 |c_ULTIMATE.start_main_~j~0#1.offset| (+ v_ArrVal_459 (- 1)))) |c_ULTIMATE.start_main_~c~0#1.base| v_ArrVal_464))) (let ((.cse0 (select .cse6 |c_ULTIMATE.start_main_~j~0#1.base|))) (let ((.cse1 (store (store .cse6 |c_ULTIMATE.start_main_~j~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~j~0#1.offset| (+ v_ArrVal_466 (- 1)))) |c_ULTIMATE.start_main_~c~0#1.base| v_ArrVal_471))) (let ((.cse2 (select .cse1 |c_ULTIMATE.start_main_~j~0#1.base|))) (or (not (<= v_ArrVal_466 (+ 2 (select .cse0 |c_ULTIMATE.start_main_~j~0#1.offset|)))) (< (select (select (store (store .cse1 |c_ULTIMATE.start_main_~j~0#1.base| (store .cse2 |c_ULTIMATE.start_main_~j~0#1.offset| (+ v_ArrVal_473 (- 1)))) |c_ULTIMATE.start_main_~c~0#1.base| v_ArrVal_477) |c_ULTIMATE.start_main_~j~0#1.base|) |c_ULTIMATE.start_main_~j~0#1.offset|) 10) (not (<= (+ v_ArrVal_450 1) (select .cse3 |c_ULTIMATE.start_main_~j~0#1.offset|))) (not (<= v_ArrVal_473 (+ 2 (select .cse2 |c_ULTIMATE.start_main_~j~0#1.offset|)))) (not (<= v_ArrVal_454 (+ 2 (select .cse4 |c_ULTIMATE.start_main_~j~0#1.offset|)))) (not (<= v_ArrVal_459 (+ 2 (select .cse5 |c_ULTIMATE.start_main_~j~0#1.offset|))))))))))))))) is different from false [2022-07-23 14:33:21,126 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-23 14:33:21,127 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 727 treesize of output 487 [2022-07-23 14:33:21,200 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 919 treesize of output 911 [2022-07-23 14:33:21,224 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 22 [2022-07-23 14:33:21,242 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 54 [2022-07-23 14:33:21,260 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 126 treesize of output 118 [2022-07-23 14:33:21,278 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 262 treesize of output 246 [2022-07-23 14:33:21,295 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 438 treesize of output 406 [2022-07-23 14:33:21,388 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 10 refuted. 2 times theorem prover too weak. 0 trivial. 28 not checked. [2022-07-23 14:33:21,389 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [148324192] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-23 14:33:21,389 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-23 14:33:21,389 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 12, 15] total 29 [2022-07-23 14:33:21,390 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1968904108] [2022-07-23 14:33:21,390 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-23 14:33:32,965 WARN L233 SmtUtils]: Spent 11.57s on a formula simplification. DAG size of input: 169 DAG size of output: 158 (called from [L 279] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2022-07-23 14:33:35,244 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-23 14:33:35,245 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-07-23 14:33:35,245 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=202, Invalid=309, Unknown=19, NotChecked=282, Total=812 [2022-07-23 14:33:35,245 INFO L87 Difference]: Start difference. First operand 22 states and 23 transitions. cyclomatic complexity: 2 Second operand has 29 states, 29 states have (on average 1.7241379310344827) internal successors, (50), 29 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-23 14:33:35,766 WARN L833 $PredicateComparison]: unable to prove that (and (forall ((v_ArrVal_466 Int) (v_ArrVal_473 Int) (v_ArrVal_471 (Array Int Int)) (v_ArrVal_464 (Array Int Int)) (v_ArrVal_477 (Array Int Int))) (let ((.cse3 (store (store |c_#memory_int| |c_ULTIMATE.start_main_~j~0#1.base| (let ((.cse4 (select |c_#memory_int| |c_ULTIMATE.start_main_~j~0#1.base|))) (store .cse4 |c_ULTIMATE.start_main_~j~0#1.offset| (+ (- 1) (select .cse4 |c_ULTIMATE.start_main_~j~0#1.offset|))))) |c_ULTIMATE.start_main_~c~0#1.base| v_ArrVal_464))) (let ((.cse2 (select .cse3 |c_ULTIMATE.start_main_~j~0#1.base|))) (let ((.cse1 (store (store .cse3 |c_ULTIMATE.start_main_~j~0#1.base| (store .cse2 |c_ULTIMATE.start_main_~j~0#1.offset| (+ v_ArrVal_466 (- 1)))) |c_ULTIMATE.start_main_~c~0#1.base| v_ArrVal_471))) (let ((.cse0 (select .cse1 |c_ULTIMATE.start_main_~j~0#1.base|))) (or (not (<= v_ArrVal_473 (+ (select .cse0 |c_ULTIMATE.start_main_~j~0#1.offset|) 2))) (< (select (select (store (store .cse1 |c_ULTIMATE.start_main_~j~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~j~0#1.offset| (+ v_ArrVal_473 (- 1)))) |c_ULTIMATE.start_main_~c~0#1.base| v_ArrVal_477) |c_ULTIMATE.start_main_~j~0#1.base|) |c_ULTIMATE.start_main_~j~0#1.offset|) 10) (not (<= v_ArrVal_466 (+ (select .cse2 |c_ULTIMATE.start_main_~j~0#1.offset|) 2))))))))) (<= (select (select |c_#memory_int| |c_ULTIMATE.start_main_~j~0#1.base|) |c_ULTIMATE.start_main_~j~0#1.offset|) 8) (forall ((v_ArrVal_473 Int) (v_ArrVal_471 (Array Int Int)) (v_ArrVal_477 (Array Int Int))) (let ((.cse5 (store (store |c_#memory_int| |c_ULTIMATE.start_main_~j~0#1.base| (let ((.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~j~0#1.base|))) (store .cse7 |c_ULTIMATE.start_main_~j~0#1.offset| (+ (- 1) (select .cse7 |c_ULTIMATE.start_main_~j~0#1.offset|))))) |c_ULTIMATE.start_main_~c~0#1.base| v_ArrVal_471))) (let ((.cse6 (select .cse5 |c_ULTIMATE.start_main_~j~0#1.base|))) (or (< (select (select (store (store .cse5 |c_ULTIMATE.start_main_~j~0#1.base| (store .cse6 |c_ULTIMATE.start_main_~j~0#1.offset| (+ v_ArrVal_473 (- 1)))) |c_ULTIMATE.start_main_~c~0#1.base| v_ArrVal_477) |c_ULTIMATE.start_main_~j~0#1.base|) |c_ULTIMATE.start_main_~j~0#1.offset|) 10) (not (<= v_ArrVal_473 (+ 2 (select .cse6 |c_ULTIMATE.start_main_~j~0#1.offset|))))))))) is different from false [2022-07-23 14:33:35,777 WARN L833 $PredicateComparison]: unable to prove that (and (<= |c_ULTIMATE.start_main_#t~mem9#1| 8) (forall ((v_ArrVal_466 Int) (v_ArrVal_473 Int) (v_ArrVal_471 (Array Int Int)) (v_ArrVal_464 (Array Int Int)) (v_ArrVal_477 (Array Int Int))) (let ((.cse3 (store (store |c_#memory_int| |c_ULTIMATE.start_main_~j~0#1.base| (let ((.cse4 (select |c_#memory_int| |c_ULTIMATE.start_main_~j~0#1.base|))) (store .cse4 |c_ULTIMATE.start_main_~j~0#1.offset| (+ (- 1) (select .cse4 |c_ULTIMATE.start_main_~j~0#1.offset|))))) |c_ULTIMATE.start_main_~c~0#1.base| v_ArrVal_464))) (let ((.cse2 (select .cse3 |c_ULTIMATE.start_main_~j~0#1.base|))) (let ((.cse1 (store (store .cse3 |c_ULTIMATE.start_main_~j~0#1.base| (store .cse2 |c_ULTIMATE.start_main_~j~0#1.offset| (+ v_ArrVal_466 (- 1)))) |c_ULTIMATE.start_main_~c~0#1.base| v_ArrVal_471))) (let ((.cse0 (select .cse1 |c_ULTIMATE.start_main_~j~0#1.base|))) (or (not (<= v_ArrVal_473 (+ (select .cse0 |c_ULTIMATE.start_main_~j~0#1.offset|) 2))) (< (select (select (store (store .cse1 |c_ULTIMATE.start_main_~j~0#1.base| (store .cse0 |c_ULTIMATE.start_main_~j~0#1.offset| (+ v_ArrVal_473 (- 1)))) |c_ULTIMATE.start_main_~c~0#1.base| v_ArrVal_477) |c_ULTIMATE.start_main_~j~0#1.base|) |c_ULTIMATE.start_main_~j~0#1.offset|) 10) (not (<= v_ArrVal_466 (+ (select .cse2 |c_ULTIMATE.start_main_~j~0#1.offset|) 2))))))))) (forall ((v_ArrVal_473 Int) (v_ArrVal_471 (Array Int Int)) (v_ArrVal_477 (Array Int Int))) (let ((.cse5 (store (store |c_#memory_int| |c_ULTIMATE.start_main_~j~0#1.base| (let ((.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~j~0#1.base|))) (store .cse7 |c_ULTIMATE.start_main_~j~0#1.offset| (+ (- 1) (select .cse7 |c_ULTIMATE.start_main_~j~0#1.offset|))))) |c_ULTIMATE.start_main_~c~0#1.base| v_ArrVal_471))) (let ((.cse6 (select .cse5 |c_ULTIMATE.start_main_~j~0#1.base|))) (or (< (select (select (store (store .cse5 |c_ULTIMATE.start_main_~j~0#1.base| (store .cse6 |c_ULTIMATE.start_main_~j~0#1.offset| (+ v_ArrVal_473 (- 1)))) |c_ULTIMATE.start_main_~c~0#1.base| v_ArrVal_477) |c_ULTIMATE.start_main_~j~0#1.base|) |c_ULTIMATE.start_main_~j~0#1.offset|) 10) (not (<= v_ArrVal_473 (+ 2 (select .cse6 |c_ULTIMATE.start_main_~j~0#1.offset|))))))))) is different from false [2022-07-23 14:33:41,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-23 14:33:41,522 INFO L93 Difference]: Finished difference Result 51 states and 52 transitions. [2022-07-23 14:33:41,523 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-07-23 14:33:41,523 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 52 transitions. [2022-07-23 14:33:41,524 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 20 [2022-07-23 14:33:41,525 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 52 transitions. [2022-07-23 14:33:41,525 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 51 [2022-07-23 14:33:41,525 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 51 [2022-07-23 14:33:41,526 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 52 transitions. [2022-07-23 14:33:41,526 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-23 14:33:41,526 INFO L369 hiAutomatonCegarLoop]: Abstraction has 51 states and 52 transitions. [2022-07-23 14:33:41,526 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 52 transitions. [2022-07-23 14:33:41,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 36. [2022-07-23 14:33:41,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.0277777777777777) internal successors, (37), 35 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-23 14:33:41,529 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 37 transitions. [2022-07-23 14:33:41,529 INFO L392 hiAutomatonCegarLoop]: Abstraction has 36 states and 37 transitions. [2022-07-23 14:33:41,529 INFO L374 stractBuchiCegarLoop]: Abstraction has 36 states and 37 transitions. [2022-07-23 14:33:41,529 INFO L287 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-07-23 14:33:41,529 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 36 states and 37 transitions. [2022-07-23 14:33:41,530 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 20 [2022-07-23 14:33:41,530 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-23 14:33:41,530 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-23 14:33:41,534 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 4, 1, 1, 1, 1] [2022-07-23 14:33:41,534 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [6, 5, 5, 1, 1, 1, 1] [2022-07-23 14:33:41,534 INFO L752 eck$LassoCheckResult]: Stem: 588#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 589#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem12#1, main_~i~0#1.base, main_~i~0#1.offset, main_~j~0#1.base, main_~j~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~i~0#1.base, main_~i~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~j~0#1.base, main_~j~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnStack(4);main_~c~0#1.base, main_~c~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;call write~int(0, main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int(0, main_~i~0#1.base, main_~i~0#1.offset, 4); 595#L552-4 call main_#t~mem7#1 := read~int(main_~i~0#1.base, main_~i~0#1.offset, 4); 596#L552-1 assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call write~int(3, main_~j~0#1.base, main_~j~0#1.offset, 4); 597#L553-4 call main_#t~mem9#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4); 621#L553-1 assume !!(main_#t~mem9#1 < 12);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(main_#t~mem10#1 - 1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem10#1;call main_#t~mem11#1 := read~int(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem11#1; 591#L553-3 call main_#t~mem8#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(2 + main_#t~mem8#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem8#1; 592#L553-4 call main_#t~mem9#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4); 593#L553-1 assume !!(main_#t~mem9#1 < 12);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(main_#t~mem10#1 - 1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem10#1;call main_#t~mem11#1 := read~int(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem11#1; 594#L553-3 call main_#t~mem8#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(2 + main_#t~mem8#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem8#1; 620#L553-4 call main_#t~mem9#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4); 619#L553-1 assume !!(main_#t~mem9#1 < 12);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(main_#t~mem10#1 - 1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem10#1;call main_#t~mem11#1 := read~int(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem11#1; 618#L553-3 call main_#t~mem8#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(2 + main_#t~mem8#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem8#1; 617#L553-4 call main_#t~mem9#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4); 616#L553-1 assume !!(main_#t~mem9#1 < 12);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(main_#t~mem10#1 - 1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem10#1;call main_#t~mem11#1 := read~int(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem11#1; 615#L553-3 call main_#t~mem8#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(2 + main_#t~mem8#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem8#1; 614#L553-4 [2022-07-23 14:33:41,534 INFO L754 eck$LassoCheckResult]: Loop: 614#L553-4 call main_#t~mem9#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4); 613#L553-1 assume !!(main_#t~mem9#1 < 12);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(main_#t~mem10#1 - 1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem10#1;call main_#t~mem11#1 := read~int(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem11#1; 612#L553-3 call main_#t~mem8#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(2 + main_#t~mem8#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem8#1; 611#L553-4 call main_#t~mem9#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4); 610#L553-1 assume !!(main_#t~mem9#1 < 12);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(main_#t~mem10#1 - 1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem10#1;call main_#t~mem11#1 := read~int(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem11#1; 609#L553-3 call main_#t~mem8#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(2 + main_#t~mem8#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem8#1; 608#L553-4 call main_#t~mem9#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4); 607#L553-1 assume !!(main_#t~mem9#1 < 12);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(main_#t~mem10#1 - 1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem10#1;call main_#t~mem11#1 := read~int(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem11#1; 606#L553-3 call main_#t~mem8#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(2 + main_#t~mem8#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem8#1; 605#L553-4 call main_#t~mem9#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4); 604#L553-1 assume !!(main_#t~mem9#1 < 12);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(main_#t~mem10#1 - 1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem10#1;call main_#t~mem11#1 := read~int(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem11#1; 603#L553-3 call main_#t~mem8#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(2 + main_#t~mem8#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem8#1; 602#L553-4 call main_#t~mem9#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4); 601#L553-1 assume !!(main_#t~mem9#1 < 12);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(main_#t~mem10#1 - 1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem10#1;call main_#t~mem11#1 := read~int(main_~c~0#1.base, main_~c~0#1.offset, 4);call write~int(1 + main_#t~mem11#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem11#1; 599#L553-3 call main_#t~mem8#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4);call write~int(2 + main_#t~mem8#1, main_~j~0#1.base, main_~j~0#1.offset, 4);havoc main_#t~mem8#1; 600#L553-4 call main_#t~mem9#1 := read~int(main_~j~0#1.base, main_~j~0#1.offset, 4); 598#L553-1 assume !(main_#t~mem9#1 < 12);havoc main_#t~mem9#1; 586#L552-3 call main_#t~mem5#1 := read~int(main_~i~0#1.base, main_~i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~i~0#1.base, main_~i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 587#L552-4 call main_#t~mem7#1 := read~int(main_~i~0#1.base, main_~i~0#1.offset, 4); 590#L552-1 assume !!(main_#t~mem7#1 < 10);havoc main_#t~mem7#1;call write~int(3, main_~j~0#1.base, main_~j~0#1.offset, 4); 614#L553-4 [2022-07-23 14:33:41,535 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-23 14:33:41,535 INFO L85 PathProgramCache]: Analyzing trace with hash 384495752, now seen corresponding path program 1 times [2022-07-23 14:33:41,535 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-23 14:33:41,535 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [657969987] [2022-07-23 14:33:41,535 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-23 14:33:41,535 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-23 14:33:41,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-23 14:33:41,569 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-23 14:33:41,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-23 14:33:41,595 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-23 14:33:41,596 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-23 14:33:41,596 INFO L85 PathProgramCache]: Analyzing trace with hash 440091564, now seen corresponding path program 4 times [2022-07-23 14:33:41,596 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-23 14:33:41,596 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1821486914] [2022-07-23 14:33:41,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-23 14:33:41,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-23 14:33:41,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-23 14:33:41,655 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-23 14:33:41,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-23 14:33:41,695 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-23 14:33:41,703 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-23 14:33:41,704 INFO L85 PathProgramCache]: Analyzing trace with hash -1560827213, now seen corresponding path program 2 times [2022-07-23 14:33:41,704 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-23 14:33:41,704 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1418234795] [2022-07-23 14:33:41,704 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-23 14:33:41,704 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-23 14:33:41,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-23 14:33:41,813 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-23 14:33:41,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-23 14:33:41,887 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace