./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/pthread/fib_safe-5.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version eb692b52 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/pthread/fib_safe-5.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 40fcfd4444bd180f6e5508f0972ed92e70894b01f23e03dc2e761819c6d5a859 --- Real Ultimate output --- This is Ultimate 0.2.2-?-eb692b5 [2022-07-19 20:54:05,493 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-07-19 20:54:05,494 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-07-19 20:54:05,519 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-07-19 20:54:05,519 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-07-19 20:54:05,520 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-07-19 20:54:05,521 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-07-19 20:54:05,523 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-07-19 20:54:05,525 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-07-19 20:54:05,525 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-07-19 20:54:05,526 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-07-19 20:54:05,527 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-07-19 20:54:05,528 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-07-19 20:54:05,528 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-07-19 20:54:05,529 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-07-19 20:54:05,530 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-07-19 20:54:05,531 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-07-19 20:54:05,532 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-07-19 20:54:05,534 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-07-19 20:54:05,535 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-07-19 20:54:05,536 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-07-19 20:54:05,537 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-07-19 20:54:05,544 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-07-19 20:54:05,546 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-07-19 20:54:05,547 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-07-19 20:54:05,551 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-07-19 20:54:05,555 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-07-19 20:54:05,555 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-07-19 20:54:05,556 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-07-19 20:54:05,557 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-07-19 20:54:05,557 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-07-19 20:54:05,558 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-07-19 20:54:05,559 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-07-19 20:54:05,560 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-07-19 20:54:05,561 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-07-19 20:54:05,562 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-07-19 20:54:05,565 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-07-19 20:54:05,566 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-07-19 20:54:05,566 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-07-19 20:54:05,566 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-07-19 20:54:05,567 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-07-19 20:54:05,568 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-07-19 20:54:05,569 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2022-07-19 20:54:05,604 INFO L113 SettingsManager]: Loading preferences was successful [2022-07-19 20:54:05,606 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-07-19 20:54:05,607 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-07-19 20:54:05,607 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-07-19 20:54:05,608 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-07-19 20:54:05,608 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-07-19 20:54:05,608 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-07-19 20:54:05,609 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-07-19 20:54:05,609 INFO L138 SettingsManager]: * Use SBE=true [2022-07-19 20:54:05,610 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-07-19 20:54:05,610 INFO L138 SettingsManager]: * sizeof long=4 [2022-07-19 20:54:05,610 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-07-19 20:54:05,610 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-07-19 20:54:05,611 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-07-19 20:54:05,611 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-07-19 20:54:05,611 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-07-19 20:54:05,611 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-07-19 20:54:05,611 INFO L138 SettingsManager]: * sizeof long double=12 [2022-07-19 20:54:05,612 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-07-19 20:54:05,613 INFO L138 SettingsManager]: * Use constant arrays=true [2022-07-19 20:54:05,613 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-07-19 20:54:05,614 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-07-19 20:54:05,614 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-07-19 20:54:05,614 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-07-19 20:54:05,614 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-07-19 20:54:05,615 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-07-19 20:54:05,615 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-07-19 20:54:05,615 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-07-19 20:54:05,615 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-07-19 20:54:05,615 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-07-19 20:54:05,616 INFO L138 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2022-07-19 20:54:05,616 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-07-19 20:54:05,616 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-07-19 20:54:05,616 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 40fcfd4444bd180f6e5508f0972ed92e70894b01f23e03dc2e761819c6d5a859 [2022-07-19 20:54:05,814 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-07-19 20:54:05,833 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-07-19 20:54:05,836 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-07-19 20:54:05,837 INFO L271 PluginConnector]: Initializing CDTParser... [2022-07-19 20:54:05,837 INFO L275 PluginConnector]: CDTParser initialized [2022-07-19 20:54:05,839 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/pthread/fib_safe-5.i [2022-07-19 20:54:05,892 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/313f4d95e/82d8217820624baba0c0cc855b02986a/FLAGf2cb8158b [2022-07-19 20:54:06,334 INFO L306 CDTParser]: Found 1 translation units. [2022-07-19 20:54:06,335 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/pthread/fib_safe-5.i [2022-07-19 20:54:06,348 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/313f4d95e/82d8217820624baba0c0cc855b02986a/FLAGf2cb8158b [2022-07-19 20:54:06,714 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/313f4d95e/82d8217820624baba0c0cc855b02986a [2022-07-19 20:54:06,716 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-07-19 20:54:06,717 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-07-19 20:54:06,718 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-07-19 20:54:06,719 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-07-19 20:54:06,721 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-07-19 20:54:06,722 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 19.07 08:54:06" (1/1) ... [2022-07-19 20:54:06,723 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6f5b4661 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.07 08:54:06, skipping insertion in model container [2022-07-19 20:54:06,723 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 19.07 08:54:06" (1/1) ... [2022-07-19 20:54:06,728 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-07-19 20:54:06,761 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-07-19 20:54:07,063 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/pthread/fib_safe-5.i[30813,30826] [2022-07-19 20:54:07,067 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-19 20:54:07,075 INFO L203 MainTranslator]: Completed pre-run [2022-07-19 20:54:07,114 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/pthread/fib_safe-5.i[30813,30826] [2022-07-19 20:54:07,119 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-19 20:54:07,152 INFO L208 MainTranslator]: Completed translation [2022-07-19 20:54:07,153 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.07 08:54:07 WrapperNode [2022-07-19 20:54:07,153 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-07-19 20:54:07,154 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-07-19 20:54:07,154 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-07-19 20:54:07,154 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-07-19 20:54:07,161 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.07 08:54:07" (1/1) ... [2022-07-19 20:54:07,192 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.07 08:54:07" (1/1) ... [2022-07-19 20:54:07,216 INFO L137 Inliner]: procedures = 164, calls = 26, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 71 [2022-07-19 20:54:07,217 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-07-19 20:54:07,217 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-07-19 20:54:07,217 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-07-19 20:54:07,218 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-07-19 20:54:07,225 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.07 08:54:07" (1/1) ... [2022-07-19 20:54:07,225 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.07 08:54:07" (1/1) ... [2022-07-19 20:54:07,230 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.07 08:54:07" (1/1) ... [2022-07-19 20:54:07,230 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.07 08:54:07" (1/1) ... [2022-07-19 20:54:07,245 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.07 08:54:07" (1/1) ... [2022-07-19 20:54:07,250 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.07 08:54:07" (1/1) ... [2022-07-19 20:54:07,255 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.07 08:54:07" (1/1) ... [2022-07-19 20:54:07,258 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-07-19 20:54:07,267 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-07-19 20:54:07,268 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-07-19 20:54:07,268 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-07-19 20:54:07,269 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.07 08:54:07" (1/1) ... [2022-07-19 20:54:07,273 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-07-19 20:54:07,285 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-19 20:54:07,295 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-07-19 20:54:07,298 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-07-19 20:54:07,327 INFO L130 BoogieDeclarations]: Found specification of procedure t1 [2022-07-19 20:54:07,328 INFO L138 BoogieDeclarations]: Found implementation of procedure t1 [2022-07-19 20:54:07,328 INFO L130 BoogieDeclarations]: Found specification of procedure t2 [2022-07-19 20:54:07,328 INFO L138 BoogieDeclarations]: Found implementation of procedure t2 [2022-07-19 20:54:07,328 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-07-19 20:54:07,328 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2022-07-19 20:54:07,329 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-07-19 20:54:07,329 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-07-19 20:54:07,329 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-07-19 20:54:07,329 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-07-19 20:54:07,329 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2022-07-19 20:54:07,329 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-07-19 20:54:07,330 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-07-19 20:54:07,331 WARN L208 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2022-07-19 20:54:07,447 INFO L234 CfgBuilder]: Building ICFG [2022-07-19 20:54:07,449 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-07-19 20:54:07,651 INFO L275 CfgBuilder]: Performing block encoding [2022-07-19 20:54:07,658 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-07-19 20:54:07,658 INFO L299 CfgBuilder]: Removed 3 assume(true) statements. [2022-07-19 20:54:07,662 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 19.07 08:54:07 BoogieIcfgContainer [2022-07-19 20:54:07,663 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-07-19 20:54:07,666 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-07-19 20:54:07,666 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-07-19 20:54:07,669 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-07-19 20:54:07,670 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 19.07 08:54:06" (1/3) ... [2022-07-19 20:54:07,671 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@76b0cac4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 19.07 08:54:07, skipping insertion in model container [2022-07-19 20:54:07,671 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.07 08:54:07" (2/3) ... [2022-07-19 20:54:07,671 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@76b0cac4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 19.07 08:54:07, skipping insertion in model container [2022-07-19 20:54:07,671 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 19.07 08:54:07" (3/3) ... [2022-07-19 20:54:07,672 INFO L111 eAbstractionObserver]: Analyzing ICFG fib_safe-5.i [2022-07-19 20:54:07,680 WARN L143 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2022-07-19 20:54:07,686 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-07-19 20:54:07,687 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-07-19 20:54:07,687 INFO L509 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2022-07-19 20:54:07,751 INFO L135 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2022-07-19 20:54:07,787 INFO L74 FinitePrefix]: Start finitePrefix. Operand has 96 places, 96 transitions, 202 flow [2022-07-19 20:54:07,826 INFO L129 PetriNetUnfolder]: 7/94 cut-off events. [2022-07-19 20:54:07,827 INFO L130 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2022-07-19 20:54:07,831 INFO L84 FinitePrefix]: Finished finitePrefix Result has 101 conditions, 94 events. 7/94 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 3. Compared 73 event pairs, 0 based on Foata normal form. 0/86 useless extension candidates. Maximal degree in co-relation 64. Up to 2 conditions per place. [2022-07-19 20:54:07,831 INFO L82 GeneralOperation]: Start removeDead. Operand has 96 places, 96 transitions, 202 flow [2022-07-19 20:54:07,835 INFO L88 GeneralOperation]: Finished RemoveDead, result has has 94 places, 94 transitions, 194 flow [2022-07-19 20:54:07,844 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-07-19 20:54:07,850 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@715e4a2b, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@31d5edb8 [2022-07-19 20:54:07,851 INFO L358 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2022-07-19 20:54:07,870 INFO L129 PetriNetUnfolder]: 6/83 cut-off events. [2022-07-19 20:54:07,870 INFO L130 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2022-07-19 20:54:07,871 INFO L192 CegarLoopForPetriNet]: Found error trace [2022-07-19 20:54:07,871 INFO L200 CegarLoopForPetriNet]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-19 20:54:07,872 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2022-07-19 20:54:07,876 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-19 20:54:07,877 INFO L85 PathProgramCache]: Analyzing trace with hash -1927097680, now seen corresponding path program 1 times [2022-07-19 20:54:07,885 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-19 20:54:07,886 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1689963915] [2022-07-19 20:54:07,886 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-19 20:54:07,887 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-19 20:54:07,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-19 20:54:08,061 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-19 20:54:08,062 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-19 20:54:08,062 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1689963915] [2022-07-19 20:54:08,063 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1689963915] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-19 20:54:08,063 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-19 20:54:08,063 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-07-19 20:54:08,064 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [636199427] [2022-07-19 20:54:08,065 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-19 20:54:08,071 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2022-07-19 20:54:08,071 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-19 20:54:08,094 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2022-07-19 20:54:08,097 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-07-19 20:54:08,102 INFO L443 CegarLoopForPetriNet]: Number of universal loopers: 89 out of 96 [2022-07-19 20:54:08,105 INFO L92 encePairwiseOnDemand]: Start differencePairwiseOnDemand. First operand has 94 places, 94 transitions, 194 flow. Second operand has 2 states, 2 states have (on average 90.5) internal successors, (181), 2 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-19 20:54:08,106 INFO L101 encePairwiseOnDemand]: Universal subtrahend loopers provided by user. [2022-07-19 20:54:08,106 INFO L102 encePairwiseOnDemand]: Number of universal subtrahend loopers: 89 of 96 [2022-07-19 20:54:08,107 INFO L74 FinitePrefix]: Start finitePrefix. Operand will be constructed on-demand [2022-07-19 20:54:08,135 INFO L129 PetriNetUnfolder]: 3/89 cut-off events. [2022-07-19 20:54:08,136 INFO L130 PetriNetUnfolder]: For 2/2 co-relation queries the response was YES. [2022-07-19 20:54:08,136 INFO L84 FinitePrefix]: Finished finitePrefix Result has 99 conditions, 89 events. 3/89 cut-off events. For 2/2 co-relation queries the response was YES. Maximal size of possible extension queue 3. Compared 64 event pairs, 0 based on Foata normal form. 5/90 useless extension candidates. Maximal degree in co-relation 60. Up to 3 conditions per place. [2022-07-19 20:54:08,138 INFO L132 encePairwiseOnDemand]: 92/96 looper letters, 2 selfloop transitions, 0 changer transitions 0/89 dead transitions. [2022-07-19 20:54:08,138 INFO L138 encePairwiseOnDemand]: Finished differencePairwiseOnDemand. Result has 94 places, 89 transitions, 188 flow [2022-07-19 20:54:08,139 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-07-19 20:54:08,141 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2022-07-19 20:54:08,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 184 transitions. [2022-07-19 20:54:08,149 INFO L488 CegarLoopForPetriNet]: DFA transition density 0.9583333333333334 [2022-07-19 20:54:08,150 INFO L72 ComplementDD]: Start complementDD. Operand 2 states and 184 transitions. [2022-07-19 20:54:08,151 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2 states and 184 transitions. [2022-07-19 20:54:08,152 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-19 20:54:08,154 INFO L117 ReachableStatesCopy]: Start reachableStatesCopy. Operand 2 states and 184 transitions. [2022-07-19 20:54:08,156 INFO L343 DoubleDeckerVisitor]: Before removal of dead ends has 3 states, 2 states have (on average 92.0) internal successors, (184), 2 states have internal predecessors, (184), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-19 20:54:08,160 INFO L131 ReachableStatesCopy]: Finished reachableStatesCopy Result has 3 states, 3 states have (on average 96.0) internal successors, (288), 3 states have internal predecessors, (288), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-19 20:54:08,160 INFO L81 ComplementDD]: Finished complementDD. Result has 3 states, 3 states have (on average 96.0) internal successors, (288), 3 states have internal predecessors, (288), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-19 20:54:08,162 INFO L186 Difference]: Start difference. First operand has 94 places, 94 transitions, 194 flow. Second operand 2 states and 184 transitions. [2022-07-19 20:54:08,162 INFO L82 GeneralOperation]: Start removeRedundantFlow. Operand has 94 places, 89 transitions, 188 flow [2022-07-19 20:54:08,165 INFO L88 GeneralOperation]: Finished removeRedundantFlow, result has has 92 places, 89 transitions, 186 flow, removed 0 selfloop flow, removed 2 redundant places. [2022-07-19 20:54:08,168 INFO L242 Difference]: Finished difference. Result has 92 places, 89 transitions, 182 flow [2022-07-19 20:54:08,170 INFO L262 CegarLoopForPetriNet]: {PETRI_ALPHABET=96, PETRI_DIFFERENCE_MINUEND_FLOW=182, PETRI_DIFFERENCE_MINUEND_PLACES=91, PETRI_DIFFERENCE_MINUEND_TRANSITIONS=89, PETRI_DIFFERENCE_SUBTRAHEND_LETTERS_WITH_MORE_CHANGERS_THAN_LOOPERS=0, PETRI_DIFFERENCE_SUBTRAHEND_LOOPER_ONLY_LETTERS=89, PETRI_DIFFERENCE_SUBTRAHEND_STATES=2, PETRI_FLOW=182, PETRI_PLACES=92, PETRI_TRANSITIONS=89} [2022-07-19 20:54:08,173 INFO L279 CegarLoopForPetriNet]: 94 programPoint places, -2 predicate places. [2022-07-19 20:54:08,173 INFO L495 AbstractCegarLoop]: Abstraction has has 92 places, 89 transitions, 182 flow [2022-07-19 20:54:08,174 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 90.5) internal successors, (181), 2 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-19 20:54:08,174 INFO L192 CegarLoopForPetriNet]: Found error trace [2022-07-19 20:54:08,174 INFO L200 CegarLoopForPetriNet]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-19 20:54:08,175 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-07-19 20:54:08,175 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2022-07-19 20:54:08,175 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-19 20:54:08,176 INFO L85 PathProgramCache]: Analyzing trace with hash 560415153, now seen corresponding path program 1 times [2022-07-19 20:54:08,176 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-19 20:54:08,176 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1694157732] [2022-07-19 20:54:08,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-19 20:54:08,177 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-19 20:54:08,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-19 20:54:08,283 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-19 20:54:08,283 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-19 20:54:08,283 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1694157732] [2022-07-19 20:54:08,284 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1694157732] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-19 20:54:08,285 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-19 20:54:08,285 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-07-19 20:54:08,285 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1371206241] [2022-07-19 20:54:08,286 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-19 20:54:08,289 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-07-19 20:54:08,290 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-19 20:54:08,290 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-07-19 20:54:08,290 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-19 20:54:08,293 INFO L443 CegarLoopForPetriNet]: Number of universal loopers: 83 out of 96 [2022-07-19 20:54:08,293 INFO L92 encePairwiseOnDemand]: Start differencePairwiseOnDemand. First operand has 92 places, 89 transitions, 182 flow. Second operand has 3 states, 3 states have (on average 84.66666666666667) internal successors, (254), 3 states have internal predecessors, (254), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-19 20:54:08,293 INFO L101 encePairwiseOnDemand]: Universal subtrahend loopers provided by user. [2022-07-19 20:54:08,293 INFO L102 encePairwiseOnDemand]: Number of universal subtrahend loopers: 83 of 96 [2022-07-19 20:54:08,294 INFO L74 FinitePrefix]: Start finitePrefix. Operand will be constructed on-demand [2022-07-19 20:54:08,347 INFO L129 PetriNetUnfolder]: 3/95 cut-off events. [2022-07-19 20:54:08,351 INFO L130 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2022-07-19 20:54:08,352 INFO L84 FinitePrefix]: Finished finitePrefix Result has 113 conditions, 95 events. 3/95 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 3. Compared 61 event pairs, 0 based on Foata normal form. 0/91 useless extension candidates. Maximal degree in co-relation 110. Up to 6 conditions per place. [2022-07-19 20:54:08,353 INFO L132 encePairwiseOnDemand]: 93/96 looper letters, 9 selfloop transitions, 2 changer transitions 0/92 dead transitions. [2022-07-19 20:54:08,353 INFO L138 encePairwiseOnDemand]: Finished differencePairwiseOnDemand. Result has 94 places, 92 transitions, 210 flow [2022-07-19 20:54:08,354 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-07-19 20:54:08,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2022-07-19 20:54:08,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 261 transitions. [2022-07-19 20:54:08,356 INFO L488 CegarLoopForPetriNet]: DFA transition density 0.90625 [2022-07-19 20:54:08,356 INFO L72 ComplementDD]: Start complementDD. Operand 3 states and 261 transitions. [2022-07-19 20:54:08,356 INFO L73 IsDeterministic]: Start isDeterministic. Operand 3 states and 261 transitions. [2022-07-19 20:54:08,357 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-19 20:54:08,357 INFO L117 ReachableStatesCopy]: Start reachableStatesCopy. Operand 3 states and 261 transitions. [2022-07-19 20:54:08,359 INFO L343 DoubleDeckerVisitor]: Before removal of dead ends has 4 states, 3 states have (on average 87.0) internal successors, (261), 3 states have internal predecessors, (261), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-19 20:54:08,360 INFO L131 ReachableStatesCopy]: Finished reachableStatesCopy Result has 4 states, 4 states have (on average 96.0) internal successors, (384), 4 states have internal predecessors, (384), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-19 20:54:08,361 INFO L81 ComplementDD]: Finished complementDD. Result has 4 states, 4 states have (on average 96.0) internal successors, (384), 4 states have internal predecessors, (384), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-19 20:54:08,361 INFO L186 Difference]: Start difference. First operand has 92 places, 89 transitions, 182 flow. Second operand 3 states and 261 transitions. [2022-07-19 20:54:08,361 INFO L82 GeneralOperation]: Start removeRedundantFlow. Operand has 94 places, 92 transitions, 210 flow [2022-07-19 20:54:08,362 INFO L88 GeneralOperation]: Finished removeRedundantFlow, result has has 94 places, 92 transitions, 210 flow, removed 0 selfloop flow, removed 0 redundant places. [2022-07-19 20:54:08,367 INFO L242 Difference]: Finished difference. Result has 95 places, 90 transitions, 194 flow [2022-07-19 20:54:08,368 INFO L262 CegarLoopForPetriNet]: {PETRI_ALPHABET=96, PETRI_DIFFERENCE_MINUEND_FLOW=182, PETRI_DIFFERENCE_MINUEND_PLACES=92, PETRI_DIFFERENCE_MINUEND_TRANSITIONS=89, PETRI_DIFFERENCE_SUBTRAHEND_LETTERS_WITH_MORE_CHANGERS_THAN_LOOPERS=1, PETRI_DIFFERENCE_SUBTRAHEND_LOOPER_ONLY_LETTERS=87, PETRI_DIFFERENCE_SUBTRAHEND_STATES=3, PETRI_FLOW=194, PETRI_PLACES=95, PETRI_TRANSITIONS=90} [2022-07-19 20:54:08,369 INFO L279 CegarLoopForPetriNet]: 94 programPoint places, 1 predicate places. [2022-07-19 20:54:08,369 INFO L495 AbstractCegarLoop]: Abstraction has has 95 places, 90 transitions, 194 flow [2022-07-19 20:54:08,369 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 84.66666666666667) internal successors, (254), 3 states have internal predecessors, (254), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-19 20:54:08,369 INFO L192 CegarLoopForPetriNet]: Found error trace [2022-07-19 20:54:08,370 INFO L200 CegarLoopForPetriNet]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-19 20:54:08,370 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-07-19 20:54:08,370 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2022-07-19 20:54:08,371 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-19 20:54:08,372 INFO L85 PathProgramCache]: Analyzing trace with hash -951035470, now seen corresponding path program 1 times [2022-07-19 20:54:08,372 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-19 20:54:08,372 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [809475669] [2022-07-19 20:54:08,372 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-19 20:54:08,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-19 20:54:08,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-19 20:54:08,459 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-19 20:54:08,460 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-19 20:54:08,461 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [809475669] [2022-07-19 20:54:08,461 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [809475669] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-19 20:54:08,462 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [81618384] [2022-07-19 20:54:08,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-19 20:54:08,462 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-19 20:54:08,463 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-19 20:54:08,464 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-19 20:54:08,511 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-07-19 20:54:08,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-19 20:54:08,593 INFO L263 TraceCheckSpWp]: Trace formula consists of 152 conjuncts, 4 conjunts are in the unsatisfiable core [2022-07-19 20:54:08,601 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-19 20:54:08,685 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-19 20:54:08,686 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-19 20:54:08,736 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-19 20:54:08,737 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [81618384] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-19 20:54:08,737 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-19 20:54:08,737 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 10 [2022-07-19 20:54:08,737 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [111847495] [2022-07-19 20:54:08,737 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-19 20:54:08,738 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-07-19 20:54:08,738 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-19 20:54:08,738 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-07-19 20:54:08,739 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2022-07-19 20:54:08,740 INFO L443 CegarLoopForPetriNet]: Number of universal loopers: 81 out of 96 [2022-07-19 20:54:08,741 INFO L92 encePairwiseOnDemand]: Start differencePairwiseOnDemand. First operand has 95 places, 90 transitions, 194 flow. Second operand has 10 states, 10 states have (on average 83.0) internal successors, (830), 10 states have internal predecessors, (830), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-19 20:54:08,741 INFO L101 encePairwiseOnDemand]: Universal subtrahend loopers provided by user. [2022-07-19 20:54:08,741 INFO L102 encePairwiseOnDemand]: Number of universal subtrahend loopers: 81 of 96 [2022-07-19 20:54:08,741 INFO L74 FinitePrefix]: Start finitePrefix. Operand will be constructed on-demand [2022-07-19 20:54:08,835 INFO L129 PetriNetUnfolder]: 3/104 cut-off events. [2022-07-19 20:54:08,835 INFO L130 PetriNetUnfolder]: For 3/3 co-relation queries the response was YES. [2022-07-19 20:54:08,838 INFO L84 FinitePrefix]: Finished finitePrefix Result has 138 conditions, 104 events. 3/104 cut-off events. For 3/3 co-relation queries the response was YES. Maximal size of possible extension queue 3. Compared 52 event pairs, 0 based on Foata normal form. 2/103 useless extension candidates. Maximal degree in co-relation 133. Up to 6 conditions per place. [2022-07-19 20:54:08,839 INFO L132 encePairwiseOnDemand]: 90/96 looper letters, 10 selfloop transitions, 9 changer transitions 0/98 dead transitions. [2022-07-19 20:54:08,839 INFO L138 encePairwiseOnDemand]: Finished differencePairwiseOnDemand. Result has 103 places, 98 transitions, 250 flow [2022-07-19 20:54:08,839 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-07-19 20:54:08,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9 states. [2022-07-19 20:54:08,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 750 transitions. [2022-07-19 20:54:08,846 INFO L488 CegarLoopForPetriNet]: DFA transition density 0.8680555555555556 [2022-07-19 20:54:08,846 INFO L72 ComplementDD]: Start complementDD. Operand 9 states and 750 transitions. [2022-07-19 20:54:08,846 INFO L73 IsDeterministic]: Start isDeterministic. Operand 9 states and 750 transitions. [2022-07-19 20:54:08,846 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-19 20:54:08,847 INFO L117 ReachableStatesCopy]: Start reachableStatesCopy. Operand 9 states and 750 transitions. [2022-07-19 20:54:08,850 INFO L343 DoubleDeckerVisitor]: Before removal of dead ends has 10 states, 9 states have (on average 83.33333333333333) internal successors, (750), 9 states have internal predecessors, (750), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-19 20:54:08,854 INFO L131 ReachableStatesCopy]: Finished reachableStatesCopy Result has 10 states, 10 states have (on average 96.0) internal successors, (960), 10 states have internal predecessors, (960), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-19 20:54:08,854 INFO L81 ComplementDD]: Finished complementDD. Result has 10 states, 10 states have (on average 96.0) internal successors, (960), 10 states have internal predecessors, (960), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-19 20:54:08,854 INFO L186 Difference]: Start difference. First operand has 95 places, 90 transitions, 194 flow. Second operand 9 states and 750 transitions. [2022-07-19 20:54:08,854 INFO L82 GeneralOperation]: Start removeRedundantFlow. Operand has 103 places, 98 transitions, 250 flow [2022-07-19 20:54:08,857 INFO L88 GeneralOperation]: Finished removeRedundantFlow, result has has 102 places, 98 transitions, 248 flow, removed 0 selfloop flow, removed 1 redundant places. [2022-07-19 20:54:08,862 INFO L242 Difference]: Finished difference. Result has 105 places, 96 transitions, 242 flow [2022-07-19 20:54:08,862 INFO L262 CegarLoopForPetriNet]: {PETRI_ALPHABET=96, PETRI_DIFFERENCE_MINUEND_FLOW=192, PETRI_DIFFERENCE_MINUEND_PLACES=94, PETRI_DIFFERENCE_MINUEND_TRANSITIONS=90, PETRI_DIFFERENCE_SUBTRAHEND_LETTERS_WITH_MORE_CHANGERS_THAN_LOOPERS=5, PETRI_DIFFERENCE_SUBTRAHEND_LOOPER_ONLY_LETTERS=84, PETRI_DIFFERENCE_SUBTRAHEND_STATES=9, PETRI_FLOW=242, PETRI_PLACES=105, PETRI_TRANSITIONS=96} [2022-07-19 20:54:08,864 INFO L279 CegarLoopForPetriNet]: 94 programPoint places, 11 predicate places. [2022-07-19 20:54:08,864 INFO L495 AbstractCegarLoop]: Abstraction has has 105 places, 96 transitions, 242 flow [2022-07-19 20:54:08,865 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 83.0) internal successors, (830), 10 states have internal predecessors, (830), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-19 20:54:08,866 INFO L192 CegarLoopForPetriNet]: Found error trace [2022-07-19 20:54:08,866 INFO L200 CegarLoopForPetriNet]: trace histogram [3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-19 20:54:08,892 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-07-19 20:54:09,079 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-19 20:54:09,080 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2022-07-19 20:54:09,080 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-19 20:54:09,080 INFO L85 PathProgramCache]: Analyzing trace with hash 1666707666, now seen corresponding path program 2 times [2022-07-19 20:54:09,080 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-19 20:54:09,080 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [613834299] [2022-07-19 20:54:09,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-19 20:54:09,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-19 20:54:09,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-19 20:54:09,193 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-19 20:54:09,193 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-19 20:54:09,193 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [613834299] [2022-07-19 20:54:09,194 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [613834299] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-19 20:54:09,194 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1963272896] [2022-07-19 20:54:09,194 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-07-19 20:54:09,194 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-19 20:54:09,195 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-19 20:54:09,196 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-19 20:54:09,197 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-07-19 20:54:09,296 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-07-19 20:54:09,297 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-07-19 20:54:09,298 INFO L263 TraceCheckSpWp]: Trace formula consists of 176 conjuncts, 8 conjunts are in the unsatisfiable core [2022-07-19 20:54:09,304 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-19 20:54:09,383 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-19 20:54:09,386 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-19 20:54:09,470 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-19 20:54:09,470 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1963272896] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-19 20:54:09,470 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-19 20:54:09,471 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 18 [2022-07-19 20:54:09,471 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1202764150] [2022-07-19 20:54:09,471 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-19 20:54:09,472 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-07-19 20:54:09,472 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-19 20:54:09,472 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-07-19 20:54:09,473 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=90, Invalid=216, Unknown=0, NotChecked=0, Total=306 [2022-07-19 20:54:09,475 INFO L443 CegarLoopForPetriNet]: Number of universal loopers: 81 out of 96 [2022-07-19 20:54:09,477 INFO L92 encePairwiseOnDemand]: Start differencePairwiseOnDemand. First operand has 105 places, 96 transitions, 242 flow. Second operand has 18 states, 18 states have (on average 83.0) internal successors, (1494), 18 states have internal predecessors, (1494), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-19 20:54:09,477 INFO L101 encePairwiseOnDemand]: Universal subtrahend loopers provided by user. [2022-07-19 20:54:09,477 INFO L102 encePairwiseOnDemand]: Number of universal subtrahend loopers: 81 of 96 [2022-07-19 20:54:09,477 INFO L74 FinitePrefix]: Start finitePrefix. Operand will be constructed on-demand [2022-07-19 20:54:09,667 INFO L129 PetriNetUnfolder]: 3/132 cut-off events. [2022-07-19 20:54:09,667 INFO L130 PetriNetUnfolder]: For 30/30 co-relation queries the response was YES. [2022-07-19 20:54:09,668 INFO L84 FinitePrefix]: Finished finitePrefix Result has 231 conditions, 132 events. 3/132 cut-off events. For 30/30 co-relation queries the response was YES. Maximal size of possible extension queue 3. Compared 52 event pairs, 0 based on Foata normal form. 4/133 useless extension candidates. Maximal degree in co-relation 224. Up to 11 conditions per place. [2022-07-19 20:54:09,669 INFO L132 encePairwiseOnDemand]: 90/96 looper letters, 14 selfloop transitions, 21 changer transitions 0/114 dead transitions. [2022-07-19 20:54:09,669 INFO L138 encePairwiseOnDemand]: Finished differencePairwiseOnDemand. Result has 125 places, 114 transitions, 408 flow [2022-07-19 20:54:09,669 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-07-19 20:54:09,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2022-07-19 20:54:09,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 1740 transitions. [2022-07-19 20:54:09,674 INFO L488 CegarLoopForPetriNet]: DFA transition density 0.8630952380952381 [2022-07-19 20:54:09,674 INFO L72 ComplementDD]: Start complementDD. Operand 21 states and 1740 transitions. [2022-07-19 20:54:09,674 INFO L73 IsDeterministic]: Start isDeterministic. Operand 21 states and 1740 transitions. [2022-07-19 20:54:09,675 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-19 20:54:09,675 INFO L117 ReachableStatesCopy]: Start reachableStatesCopy. Operand 21 states and 1740 transitions. [2022-07-19 20:54:09,679 INFO L343 DoubleDeckerVisitor]: Before removal of dead ends has 22 states, 21 states have (on average 82.85714285714286) internal successors, (1740), 21 states have internal predecessors, (1740), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-19 20:54:09,683 INFO L131 ReachableStatesCopy]: Finished reachableStatesCopy Result has 22 states, 22 states have (on average 96.0) internal successors, (2112), 22 states have internal predecessors, (2112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-19 20:54:09,684 INFO L81 ComplementDD]: Finished complementDD. Result has 22 states, 22 states have (on average 96.0) internal successors, (2112), 22 states have internal predecessors, (2112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-19 20:54:09,684 INFO L186 Difference]: Start difference. First operand has 105 places, 96 transitions, 242 flow. Second operand 21 states and 1740 transitions. [2022-07-19 20:54:09,684 INFO L82 GeneralOperation]: Start removeRedundantFlow. Operand has 125 places, 114 transitions, 408 flow [2022-07-19 20:54:09,686 INFO L88 GeneralOperation]: Finished removeRedundantFlow, result has has 124 places, 114 transitions, 394 flow, removed 6 selfloop flow, removed 1 redundant places. [2022-07-19 20:54:09,688 INFO L242 Difference]: Finished difference. Result has 129 places, 109 transitions, 366 flow [2022-07-19 20:54:09,688 INFO L262 CegarLoopForPetriNet]: {PETRI_ALPHABET=96, PETRI_DIFFERENCE_MINUEND_FLOW=236, PETRI_DIFFERENCE_MINUEND_PLACES=104, PETRI_DIFFERENCE_MINUEND_TRANSITIONS=96, PETRI_DIFFERENCE_SUBTRAHEND_LETTERS_WITH_MORE_CHANGERS_THAN_LOOPERS=10, PETRI_DIFFERENCE_SUBTRAHEND_LOOPER_ONLY_LETTERS=85, PETRI_DIFFERENCE_SUBTRAHEND_STATES=21, PETRI_FLOW=366, PETRI_PLACES=129, PETRI_TRANSITIONS=109} [2022-07-19 20:54:09,689 INFO L279 CegarLoopForPetriNet]: 94 programPoint places, 35 predicate places. [2022-07-19 20:54:09,689 INFO L495 AbstractCegarLoop]: Abstraction has has 129 places, 109 transitions, 366 flow [2022-07-19 20:54:09,690 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 83.0) internal successors, (1494), 18 states have internal predecessors, (1494), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-19 20:54:09,690 INFO L192 CegarLoopForPetriNet]: Found error trace [2022-07-19 20:54:09,690 INFO L200 CegarLoopForPetriNet]: trace histogram [7, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-19 20:54:09,716 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-07-19 20:54:09,899 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-07-19 20:54:09,900 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2022-07-19 20:54:09,900 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-19 20:54:09,900 INFO L85 PathProgramCache]: Analyzing trace with hash -1283180782, now seen corresponding path program 3 times [2022-07-19 20:54:09,900 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-19 20:54:09,901 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1194147500] [2022-07-19 20:54:09,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-19 20:54:09,901 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-19 20:54:09,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-19 20:54:10,144 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 0 proven. 154 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-19 20:54:10,145 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-19 20:54:10,145 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1194147500] [2022-07-19 20:54:10,146 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1194147500] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-19 20:54:10,146 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2144758075] [2022-07-19 20:54:10,146 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-07-19 20:54:10,146 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-19 20:54:10,147 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-19 20:54:10,148 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-19 20:54:10,149 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-07-19 20:54:10,239 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2022-07-19 20:54:10,240 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-07-19 20:54:10,241 INFO L263 TraceCheckSpWp]: Trace formula consists of 224 conjuncts, 16 conjunts are in the unsatisfiable core [2022-07-19 20:54:10,244 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-19 20:54:10,323 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 0 proven. 154 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-19 20:54:10,324 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-19 20:54:10,508 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 0 proven. 154 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-19 20:54:10,509 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2144758075] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-19 20:54:10,509 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-19 20:54:10,509 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17] total 27 [2022-07-19 20:54:10,509 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1057089077] [2022-07-19 20:54:10,509 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-19 20:54:10,529 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-07-19 20:54:10,529 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-19 20:54:10,530 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-07-19 20:54:10,530 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=195, Invalid=507, Unknown=0, NotChecked=0, Total=702 [2022-07-19 20:54:10,533 INFO L443 CegarLoopForPetriNet]: Number of universal loopers: 81 out of 96 [2022-07-19 20:54:10,535 INFO L92 encePairwiseOnDemand]: Start differencePairwiseOnDemand. First operand has 129 places, 109 transitions, 366 flow. Second operand has 27 states, 27 states have (on average 83.07407407407408) internal successors, (2243), 27 states have internal predecessors, (2243), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-19 20:54:10,535 INFO L101 encePairwiseOnDemand]: Universal subtrahend loopers provided by user. [2022-07-19 20:54:10,535 INFO L102 encePairwiseOnDemand]: Number of universal subtrahend loopers: 81 of 96 [2022-07-19 20:54:10,535 INFO L74 FinitePrefix]: Start finitePrefix. Operand will be constructed on-demand [2022-07-19 20:54:10,902 INFO L129 PetriNetUnfolder]: 3/167 cut-off events. [2022-07-19 20:54:10,902 INFO L130 PetriNetUnfolder]: For 184/184 co-relation queries the response was YES. [2022-07-19 20:54:10,903 INFO L84 FinitePrefix]: Finished finitePrefix Result has 381 conditions, 167 events. 3/167 cut-off events. For 184/184 co-relation queries the response was YES. Maximal size of possible extension queue 3. Compared 52 event pairs, 0 based on Foata normal form. 5/169 useless extension candidates. Maximal degree in co-relation 369. Up to 21 conditions per place. [2022-07-19 20:54:10,905 INFO L132 encePairwiseOnDemand]: 90/96 looper letters, 19 selfloop transitions, 36 changer transitions 0/134 dead transitions. [2022-07-19 20:54:10,906 INFO L138 encePairwiseOnDemand]: Finished differencePairwiseOnDemand. Result has 164 places, 134 transitions, 668 flow [2022-07-19 20:54:10,906 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2022-07-19 20:54:10,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2022-07-19 20:54:10,911 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 2976 transitions. [2022-07-19 20:54:10,913 INFO L488 CegarLoopForPetriNet]: DFA transition density 0.8611111111111112 [2022-07-19 20:54:10,913 INFO L72 ComplementDD]: Start complementDD. Operand 36 states and 2976 transitions. [2022-07-19 20:54:10,913 INFO L73 IsDeterministic]: Start isDeterministic. Operand 36 states and 2976 transitions. [2022-07-19 20:54:10,915 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-19 20:54:10,916 INFO L117 ReachableStatesCopy]: Start reachableStatesCopy. Operand 36 states and 2976 transitions. [2022-07-19 20:54:10,923 INFO L343 DoubleDeckerVisitor]: Before removal of dead ends has 37 states, 36 states have (on average 82.66666666666667) internal successors, (2976), 36 states have internal predecessors, (2976), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-19 20:54:10,930 INFO L131 ReachableStatesCopy]: Finished reachableStatesCopy Result has 37 states, 37 states have (on average 96.0) internal successors, (3552), 37 states have internal predecessors, (3552), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-19 20:54:10,932 INFO L81 ComplementDD]: Finished complementDD. Result has 37 states, 37 states have (on average 96.0) internal successors, (3552), 37 states have internal predecessors, (3552), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-19 20:54:10,932 INFO L186 Difference]: Start difference. First operand has 129 places, 109 transitions, 366 flow. Second operand 36 states and 2976 transitions. [2022-07-19 20:54:10,932 INFO L82 GeneralOperation]: Start removeRedundantFlow. Operand has 164 places, 134 transitions, 668 flow [2022-07-19 20:54:10,938 INFO L88 GeneralOperation]: Finished removeRedundantFlow, result has has 158 places, 134 transitions, 634 flow, removed 11 selfloop flow, removed 6 redundant places. [2022-07-19 20:54:10,944 INFO L242 Difference]: Finished difference. Result has 164 places, 125 transitions, 554 flow [2022-07-19 20:54:10,945 INFO L262 CegarLoopForPetriNet]: {PETRI_ALPHABET=96, PETRI_DIFFERENCE_MINUEND_FLOW=342, PETRI_DIFFERENCE_MINUEND_PLACES=123, PETRI_DIFFERENCE_MINUEND_TRANSITIONS=109, PETRI_DIFFERENCE_SUBTRAHEND_LETTERS_WITH_MORE_CHANGERS_THAN_LOOPERS=22, PETRI_DIFFERENCE_SUBTRAHEND_LOOPER_ONLY_LETTERS=86, PETRI_DIFFERENCE_SUBTRAHEND_STATES=36, PETRI_FLOW=554, PETRI_PLACES=164, PETRI_TRANSITIONS=125} [2022-07-19 20:54:10,947 INFO L279 CegarLoopForPetriNet]: 94 programPoint places, 70 predicate places. [2022-07-19 20:54:10,947 INFO L495 AbstractCegarLoop]: Abstraction has has 164 places, 125 transitions, 554 flow [2022-07-19 20:54:10,948 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 83.07407407407408) internal successors, (2243), 27 states have internal predecessors, (2243), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-19 20:54:10,948 INFO L192 CegarLoopForPetriNet]: Found error trace [2022-07-19 20:54:10,948 INFO L200 CegarLoopForPetriNet]: trace histogram [12, 12, 12, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-19 20:54:10,974 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-07-19 20:54:11,171 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-19 20:54:11,172 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2022-07-19 20:54:11,172 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-19 20:54:11,172 INFO L85 PathProgramCache]: Analyzing trace with hash 1938020081, now seen corresponding path program 4 times [2022-07-19 20:54:11,172 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-19 20:54:11,172 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [400519696] [2022-07-19 20:54:11,173 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-19 20:54:11,173 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-19 20:54:11,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-19 20:54:12,455 INFO L134 CoverageAnalysis]: Checked inductivity of 474 backedges. 0 proven. 474 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-19 20:54:12,455 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-19 20:54:12,455 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [400519696] [2022-07-19 20:54:12,456 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [400519696] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-19 20:54:12,456 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1660592069] [2022-07-19 20:54:12,456 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-07-19 20:54:12,456 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-19 20:54:12,456 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-19 20:54:12,459 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-19 20:54:12,460 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-07-19 20:54:12,545 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-07-19 20:54:12,545 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-07-19 20:54:12,547 INFO L263 TraceCheckSpWp]: Trace formula consists of 267 conjuncts, 41 conjunts are in the unsatisfiable core [2022-07-19 20:54:12,552 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-19 20:54:15,088 INFO L134 CoverageAnalysis]: Checked inductivity of 474 backedges. 335 proven. 139 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-19 20:54:15,088 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-19 20:57:04,620 INFO L134 CoverageAnalysis]: Checked inductivity of 474 backedges. 0 proven. 474 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-19 20:57:04,620 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1660592069] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-19 20:57:04,620 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-19 20:57:04,620 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 42, 42] total 121 [2022-07-19 20:57:04,621 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2029534932] [2022-07-19 20:57:04,621 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-19 20:57:04,623 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 121 states [2022-07-19 20:57:04,623 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-19 20:57:04,624 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 121 interpolants. [2022-07-19 20:57:04,629 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=965, Invalid=13519, Unknown=36, NotChecked=0, Total=14520 [2022-07-19 20:57:04,634 INFO L443 CegarLoopForPetriNet]: Number of universal loopers: 68 out of 96 [2022-07-19 20:57:04,641 INFO L92 encePairwiseOnDemand]: Start differencePairwiseOnDemand. First operand has 164 places, 125 transitions, 554 flow. Second operand has 121 states, 121 states have (on average 69.27272727272727) internal successors, (8382), 121 states have internal predecessors, (8382), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-19 20:57:04,642 INFO L101 encePairwiseOnDemand]: Universal subtrahend loopers provided by user. [2022-07-19 20:57:04,642 INFO L102 encePairwiseOnDemand]: Number of universal subtrahend loopers: 68 of 96 [2022-07-19 20:57:04,642 INFO L74 FinitePrefix]: Start finitePrefix. Operand will be constructed on-demand [2022-07-19 20:57:07,288 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse5 (* 2 c_~cur~0))) (let ((.cse1 (* (- 1) c_~i~0)) (.cse0 (+ .cse5 c_~prev~0)) (.cse2 (+ c_~prev~0 1 c_~cur~0)) (.cse4 (* (- 1) c_~j~0)) (.cse3 (+ .cse5 3 c_~prev~0))) (and (forall ((v_~cur~0_24 Int)) (or (and (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56)))) (< v_~cur~0_24 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (< v_~cur~0_22 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) c_~cur~0)) (> 0 aux_mod_v_~next~0_20_56))) (<= c_~j~0 .cse0) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~prev~0 c_~cur~0)) (< v_~cur~0_24 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56))) (<= (div (+ (- 2) .cse1 c_~cur~0) (- 2)) .cse2) (forall ((v_~cur~0_22 Int)) (or (< v_~cur~0_22 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~next~0_20_56 Int) (aux_mod_v_~next~0_20_56 Int)) (or (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) c_~cur~0)) (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56)))))) (= c_~prev~0 0) (forall ((v_~cur~0_26 Int)) (or (and (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) v_~cur~0_26 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~cur~0)) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) v_~cur~0_26 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~cur~0)) (> 0 aux_mod_v_~next~0_20_56)))) (< v_~cur~0_26 (+ c_~prev~0 c_~cur~0)))) (<= (div (+ c_~prev~0 .cse1 (- 6) c_~cur~0) (- 2)) .cse3) (forall ((aux_div_v_~next~0_20_56 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) c_~cur~0) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (not (<= (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~next~0_20_56)) (+ aux_mod_v_~next~0_20_56 c_~j~0 8))) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~prev~0 c_~cur~0)) (< v_~cur~0_24 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56))) (<= c_~i~0 .cse0) (= 1 c_~cur~0) (forall ((aux_div_v_~next~0_20_56 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) c_~cur~0) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (not (<= (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~next~0_20_56)) (+ aux_mod_v_~next~0_20_56 c_~i~0 8))) (> 0 aux_mod_v_~next~0_20_56))) (forall ((v_~j~0_8 Int)) (or (and (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (v_~cur~0_26 Int) (aux_mod_v_~next~0_20_56 Int)) (or (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~prev~0 v_~cur~0_26 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 v_~j~0_8) (* aux_mod_v_~next~0_20_56 2))) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~prev~0 c_~cur~0)) (< (+ aux_mod_v_~next~0_20_56 8 v_~j~0_8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (< v_~cur~0_26 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (v_~cur~0_26 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~prev~0 v_~cur~0_26 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~prev~0 c_~cur~0)) (< v_~cur~0_26 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56)))) (not (<= v_~j~0_8 1)))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (v_~cur~0_26 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~prev~0 v_~cur~0_26 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~prev~0 c_~cur~0)) (< v_~cur~0_26 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< v_~cur~0_22 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (v_~cur~0_26 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~prev~0 v_~cur~0_26 c_~cur~0)) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~prev~0 c_~cur~0)) (< v_~cur~0_26 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56))) (<= (div (+ (- 2) .cse4 c_~cur~0) (- 2)) .cse2) (<= (div (+ c_~prev~0 .cse4 (- 6) c_~cur~0) (- 2)) .cse3)))) is different from false [2022-07-19 20:57:09,947 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (+ (* 2 c_~cur~0) 3 c_~prev~0))) (and (forall ((v_~cur~0_24 Int)) (or (and (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56)))) (< v_~cur~0_24 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (< v_~cur~0_22 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) c_~cur~0)) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~prev~0 c_~cur~0)) (< v_~cur~0_24 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56))) (forall ((v_~cur~0_22 Int)) (or (< v_~cur~0_22 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~next~0_20_56 Int) (aux_mod_v_~next~0_20_56 Int)) (or (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) c_~cur~0)) (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56)))))) (= c_~prev~0 0) (forall ((v_~cur~0_26 Int)) (or (and (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) v_~cur~0_26 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~cur~0)) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) v_~cur~0_26 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~cur~0)) (> 0 aux_mod_v_~next~0_20_56)))) (< v_~cur~0_26 (+ c_~prev~0 c_~cur~0)))) (<= (div (+ c_~prev~0 (* (- 1) c_~i~0) (- 6) c_~cur~0) (- 2)) .cse0) (forall ((aux_div_v_~next~0_20_56 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) c_~cur~0) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (not (<= (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~next~0_20_56)) (+ aux_mod_v_~next~0_20_56 c_~j~0 8))) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~prev~0 c_~cur~0)) (< v_~cur~0_24 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56))) (= 1 c_~cur~0) (forall ((aux_div_v_~next~0_20_56 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) c_~cur~0) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (not (<= (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~next~0_20_56)) (+ aux_mod_v_~next~0_20_56 c_~i~0 8))) (> 0 aux_mod_v_~next~0_20_56))) (forall ((v_~j~0_8 Int)) (or (and (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (v_~cur~0_26 Int) (aux_mod_v_~next~0_20_56 Int)) (or (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~prev~0 v_~cur~0_26 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 v_~j~0_8) (* aux_mod_v_~next~0_20_56 2))) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~prev~0 c_~cur~0)) (< (+ aux_mod_v_~next~0_20_56 8 v_~j~0_8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (< v_~cur~0_26 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (v_~cur~0_26 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~prev~0 v_~cur~0_26 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~prev~0 c_~cur~0)) (< v_~cur~0_26 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56)))) (not (<= v_~j~0_8 1)))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (v_~cur~0_26 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~prev~0 v_~cur~0_26 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~prev~0 c_~cur~0)) (< v_~cur~0_26 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< v_~cur~0_22 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (v_~cur~0_26 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~prev~0 v_~cur~0_26 c_~cur~0)) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~prev~0 c_~cur~0)) (< v_~cur~0_26 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56))) (<= (div (+ c_~prev~0 (* (- 1) c_~j~0) (- 6) c_~cur~0) (- 2)) .cse0))) is different from false [2022-07-19 20:58:14,018 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse9 (* (- 1) c_~j~0)) (.cse1 (* (- 1) c_~i~0)) (.cse14 (* 2 c_~cur~0))) (let ((.cse0 (+ .cse14 c_~prev~0)) (.cse4 (div (+ (- 2) .cse1 c_~cur~0) (- 2))) (.cse3 (+ c_~next~0 1)) (.cse2 (div (+ (- 2) .cse9 c_~cur~0) (- 2))) (.cse5 (+ c_~prev~0 1 c_~cur~0)) (.cse13 (+ (* 2 c_~next~0) 4 c_~cur~0)) (.cse8 (+ .cse14 3 c_~prev~0)) (.cse6 (div (+ .cse9 (- 4) c_~next~0) (- 2))) (.cse12 (+ 2 c_~next~0 c_~cur~0)) (.cse10 (+ c_~next~0 c_~cur~0)) (.cse11 (div (+ .cse1 (- 4) c_~next~0) (- 2))) (.cse7 (+ 2 c_~prev~0 c_~next~0))) (and (forall ((v_~cur~0_24 Int)) (or (and (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56)))) (< v_~cur~0_24 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (< v_~cur~0_22 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) c_~cur~0)) (> 0 aux_mod_v_~next~0_20_56))) (<= c_~j~0 .cse0) (<= (div (+ c_~prev~0 .cse1) (- 2)) c_~next~0) (<= .cse2 .cse3) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~prev~0 c_~cur~0)) (< v_~cur~0_24 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (aux_mod_v_~next~0_20_56 Int)) (or (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~next~0)) (< v_~cur~0_24 (+ c_~next~0 c_~cur~0)) (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) c_~next~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_24)))) (forall ((v_~cur~0_22 Int)) (or (not (<= c_~next~0 v_~cur~0_22)) (and (forall ((aux_div_v_~next~0_20_56 Int) (aux_mod_v_~next~0_20_56 Int)) (or (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) c_~cur~0)) (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56)))))) (<= .cse4 .cse5) (<= .cse6 .cse7) (forall ((v_~cur~0_22 Int)) (or (< v_~cur~0_22 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~next~0_20_56 Int) (aux_mod_v_~next~0_20_56 Int)) (or (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) c_~cur~0)) (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56)))))) (forall ((v_~cur~0_24 Int)) (or (not (<= c_~next~0 v_~cur~0_24)) (and (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56)))))) (= c_~prev~0 0) (forall ((v_~cur~0_26 Int)) (or (and (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) v_~cur~0_26 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~cur~0)) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) v_~cur~0_26 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~cur~0)) (> 0 aux_mod_v_~next~0_20_56)))) (< v_~cur~0_26 (+ c_~prev~0 c_~cur~0)))) (<= (div (+ c_~prev~0 .cse1 (- 6) c_~cur~0) (- 2)) .cse8) (<= (div (+ c_~prev~0 .cse9) (- 2)) c_~next~0) (forall ((aux_div_v_~next~0_20_56 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) c_~cur~0) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (not (<= (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~next~0_20_56)) (+ aux_mod_v_~next~0_20_56 c_~j~0 8))) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56))) (<= c_~j~0 .cse10) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~prev~0 c_~cur~0)) (< v_~cur~0_24 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56))) (<= c_~i~0 .cse0) (<= .cse4 .cse3) (= 1 c_~cur~0) (<= .cse11 .cse12) (forall ((v_~cur~0_26 Int)) (or (and (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) v_~cur~0_26 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~cur~0)) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) v_~cur~0_26 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~cur~0)) (> 0 aux_mod_v_~next~0_20_56)))) (not (<= c_~next~0 v_~cur~0_26)))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (< v_~cur~0_22 (+ c_~next~0 c_~cur~0)) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) c_~next~0 (* 2 aux_div_v_~next~0_20_56))) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) c_~cur~0) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (not (<= (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~next~0_20_56)) (+ aux_mod_v_~next~0_20_56 c_~i~0 8))) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (v_~cur~0_26 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~next~0 v_~cur~0_26)) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) c_~next~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24)) (>= aux_mod_v_~next~0_20_56 2) (< v_~cur~0_26 (+ c_~next~0 c_~cur~0)) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~next~0)) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (v_~cur~0_26 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) c_~next~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~next~0 v_~cur~0_26)) (>= aux_mod_v_~next~0_20_56 2) (< v_~cur~0_26 (+ c_~next~0 c_~cur~0)) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~next~0)) (> 0 aux_mod_v_~next~0_20_56))) (forall ((v_~j~0_8 Int)) (or (and (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (v_~cur~0_26 Int) (aux_mod_v_~next~0_20_56 Int)) (or (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~prev~0 v_~cur~0_26 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 v_~j~0_8) (* aux_mod_v_~next~0_20_56 2))) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~prev~0 c_~cur~0)) (< (+ aux_mod_v_~next~0_20_56 8 v_~j~0_8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (< v_~cur~0_26 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (v_~cur~0_26 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~prev~0 v_~cur~0_26 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~prev~0 c_~cur~0)) (< v_~cur~0_26 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56)))) (not (<= v_~j~0_8 1)))) (<= (div (+ .cse1 c_~next~0 (- 8) c_~cur~0) (- 2)) .cse13) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (v_~cur~0_26 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~prev~0 v_~cur~0_26 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~prev~0 c_~cur~0)) (< v_~cur~0_26 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< v_~cur~0_22 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (v_~cur~0_26 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~prev~0 v_~cur~0_26 c_~cur~0)) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~prev~0 c_~cur~0)) (< v_~cur~0_26 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56))) (<= .cse2 .cse5) (<= (div (+ .cse9 c_~next~0 (- 8) c_~cur~0) (- 2)) .cse13) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (aux_mod_v_~next~0_20_56 Int)) (or (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~next~0)) (< v_~cur~0_24 (+ c_~next~0 c_~cur~0)) (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) c_~next~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_24)) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) c_~next~0 (* 2 aux_div_v_~next~0_20_56))) (>= aux_mod_v_~next~0_20_56 2) (< v_~cur~0_22 (+ c_~next~0 c_~cur~0)) (> 0 aux_mod_v_~next~0_20_56))) (<= (div (+ c_~prev~0 .cse9 (- 6) c_~cur~0) (- 2)) .cse8) (<= .cse6 .cse12) (<= c_~i~0 .cse10) (<= .cse11 .cse7)))) is different from false [2022-07-19 20:58:16,285 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (* (- 1) c_~i~0)) (.cse1 (+ c_~prev~0 1 c_~cur~0)) (.cse3 (* (- 1) c_~j~0)) (.cse2 (+ (* 2 c_~cur~0) 3 c_~prev~0))) (and (forall ((v_~cur~0_24 Int)) (or (and (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56)))) (< v_~cur~0_24 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (< v_~cur~0_22 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) c_~cur~0)) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~prev~0 c_~cur~0)) (< v_~cur~0_24 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56))) (<= (div (+ (- 2) .cse0 c_~cur~0) (- 2)) .cse1) (forall ((v_~cur~0_22 Int)) (or (< v_~cur~0_22 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~next~0_20_56 Int) (aux_mod_v_~next~0_20_56 Int)) (or (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) c_~cur~0)) (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56)))))) (= c_~prev~0 0) (forall ((v_~cur~0_26 Int)) (or (and (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) v_~cur~0_26 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~cur~0)) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) v_~cur~0_26 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~cur~0)) (> 0 aux_mod_v_~next~0_20_56)))) (< v_~cur~0_26 (+ c_~prev~0 c_~cur~0)))) (<= (div (+ c_~prev~0 .cse0 (- 6) c_~cur~0) (- 2)) .cse2) (forall ((aux_div_v_~next~0_20_56 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) c_~cur~0) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (not (<= (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~next~0_20_56)) (+ aux_mod_v_~next~0_20_56 c_~j~0 8))) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~prev~0 c_~cur~0)) (< v_~cur~0_24 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56))) (= 1 c_~cur~0) (forall ((aux_div_v_~next~0_20_56 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) c_~cur~0) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (not (<= (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~next~0_20_56)) (+ aux_mod_v_~next~0_20_56 c_~i~0 8))) (> 0 aux_mod_v_~next~0_20_56))) (forall ((v_~j~0_8 Int)) (or (and (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (v_~cur~0_26 Int) (aux_mod_v_~next~0_20_56 Int)) (or (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~prev~0 v_~cur~0_26 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 v_~j~0_8) (* aux_mod_v_~next~0_20_56 2))) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~prev~0 c_~cur~0)) (< (+ aux_mod_v_~next~0_20_56 8 v_~j~0_8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (< v_~cur~0_26 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (v_~cur~0_26 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~prev~0 v_~cur~0_26 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~prev~0 c_~cur~0)) (< v_~cur~0_26 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56)))) (not (<= v_~j~0_8 1)))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (v_~cur~0_26 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~prev~0 v_~cur~0_26 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~prev~0 c_~cur~0)) (< v_~cur~0_26 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< v_~cur~0_22 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (v_~cur~0_26 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~prev~0 v_~cur~0_26 c_~cur~0)) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~prev~0 c_~cur~0)) (< v_~cur~0_26 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56))) (<= (div (+ (- 2) .cse3 c_~cur~0) (- 2)) .cse1) (<= (div (+ c_~prev~0 .cse3 (- 6) c_~cur~0) (- 2)) .cse2))) is different from false [2022-07-19 20:58:18,930 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse9 (* (- 1) c_~j~0)) (.cse1 (* (- 1) c_~i~0)) (.cse14 (* 2 c_~cur~0))) (let ((.cse0 (+ .cse14 c_~prev~0)) (.cse4 (div (+ (- 2) .cse1 c_~cur~0) (- 2))) (.cse3 (+ c_~next~0 1)) (.cse2 (div (+ (- 2) .cse9 c_~cur~0) (- 2))) (.cse5 (+ c_~prev~0 1 c_~cur~0)) (.cse13 (+ (* 2 c_~next~0) 4 c_~cur~0)) (.cse8 (+ .cse14 3 c_~prev~0)) (.cse6 (div (+ .cse9 (- 4) c_~next~0) (- 2))) (.cse12 (+ 2 c_~next~0 c_~cur~0)) (.cse10 (+ c_~next~0 c_~cur~0)) (.cse11 (div (+ .cse1 (- 4) c_~next~0) (- 2))) (.cse7 (+ 2 c_~prev~0 c_~next~0))) (and (forall ((v_~cur~0_24 Int)) (or (and (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56)))) (< v_~cur~0_24 (+ c_~prev~0 c_~cur~0)))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (< v_~cur~0_22 (+ (* 2 c_~cur~0) c_~prev~0)) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) c_~cur~0)) (> 0 aux_mod_v_~next~0_20_56))) (<= c_~j~0 .cse0) (<= (div (+ c_~prev~0 .cse1) (- 2)) c_~next~0) (<= .cse2 .cse3) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~prev~0 c_~cur~0)) (< v_~cur~0_24 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (aux_mod_v_~next~0_20_56 Int)) (or (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~next~0)) (< v_~cur~0_24 (+ c_~next~0 c_~cur~0)) (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) c_~next~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_24)))) (forall ((v_~cur~0_22 Int)) (or (not (<= c_~next~0 v_~cur~0_22)) (and (forall ((aux_div_v_~next~0_20_56 Int) (aux_mod_v_~next~0_20_56 Int)) (or (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) c_~cur~0)) (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56)))))) (<= .cse4 .cse5) (<= .cse6 .cse7) (forall ((v_~cur~0_22 Int)) (or (< v_~cur~0_22 (+ c_~prev~0 c_~cur~0)) (and (forall ((aux_div_v_~next~0_20_56 Int) (aux_mod_v_~next~0_20_56 Int)) (or (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) c_~cur~0)) (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56)))))) (forall ((v_~cur~0_24 Int)) (or (not (<= c_~next~0 v_~cur~0_24)) (and (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56)))))) (= c_~prev~0 0) (forall ((v_~cur~0_26 Int)) (or (and (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) v_~cur~0_26 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~cur~0)) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) v_~cur~0_26 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~cur~0)) (> 0 aux_mod_v_~next~0_20_56)))) (< v_~cur~0_26 (+ c_~prev~0 c_~cur~0)))) (<= (div (+ c_~prev~0 .cse1 (- 6) c_~cur~0) (- 2)) .cse8) (<= (div (+ c_~prev~0 .cse9) (- 2)) c_~next~0) (forall ((aux_div_v_~next~0_20_56 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) c_~cur~0) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (not (<= (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~next~0_20_56)) (+ aux_mod_v_~next~0_20_56 c_~j~0 8))) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56))) (<= c_~j~0 .cse10) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~prev~0 c_~cur~0)) (< v_~cur~0_24 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56))) (<= c_~i~0 .cse0) (<= .cse4 .cse3) (= 1 c_~cur~0) (<= .cse11 .cse12) (forall ((v_~cur~0_26 Int)) (or (and (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) v_~cur~0_26 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~cur~0)) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) v_~cur~0_26 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~cur~0)) (> 0 aux_mod_v_~next~0_20_56)))) (not (<= c_~next~0 v_~cur~0_26)))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (< v_~cur~0_22 (+ c_~next~0 c_~cur~0)) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) c_~next~0 (* 2 aux_div_v_~next~0_20_56))) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) c_~cur~0) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (>= aux_mod_v_~next~0_20_56 2) (not (<= (+ (* 2 c_~cur~0) c_~prev~0 (* 2 aux_div_v_~next~0_20_56)) (+ aux_mod_v_~next~0_20_56 c_~i~0 8))) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (v_~cur~0_26 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~next~0 v_~cur~0_26)) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) c_~next~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24)) (>= aux_mod_v_~next~0_20_56 2) (< v_~cur~0_26 (+ c_~next~0 c_~cur~0)) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~next~0)) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (v_~cur~0_26 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) c_~next~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24)) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~next~0 v_~cur~0_26)) (>= aux_mod_v_~next~0_20_56 2) (< v_~cur~0_26 (+ c_~next~0 c_~cur~0)) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~next~0)) (> 0 aux_mod_v_~next~0_20_56))) (<= (div (+ .cse1 c_~next~0 (- 8) c_~cur~0) (- 2)) .cse13) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (v_~cur~0_26 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~i~0) (* aux_mod_v_~next~0_20_56 2))) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~prev~0 v_~cur~0_26 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< (+ aux_mod_v_~next~0_20_56 c_~i~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~prev~0 c_~cur~0)) (< v_~cur~0_26 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< v_~cur~0_22 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56))) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (v_~cur~0_26 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~prev~0 v_~cur~0_26 c_~cur~0)) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) c_~prev~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_26 v_~cur~0_24 c_~cur~0)) (>= aux_mod_v_~next~0_20_56 2) (< v_~cur~0_24 (+ (* 2 v_~cur~0_26) c_~prev~0 c_~cur~0)) (< v_~cur~0_26 (+ (* 2 c_~cur~0) c_~prev~0)) (> 0 aux_mod_v_~next~0_20_56))) (<= .cse2 .cse5) (<= (div (+ .cse9 c_~next~0 (- 8) c_~cur~0) (- 2)) .cse13) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (v_~cur~0_24 Int) (aux_mod_v_~next~0_20_56 Int)) (or (< v_~cur~0_22 (+ (* 2 v_~cur~0_24) c_~next~0)) (< v_~cur~0_24 (+ c_~next~0 c_~cur~0)) (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) c_~next~0 (* 2 aux_div_v_~next~0_20_56) v_~cur~0_24)) (>= aux_mod_v_~next~0_20_56 2) (> 0 aux_mod_v_~next~0_20_56))) (= c_~i~0 1) (forall ((aux_div_v_~next~0_20_56 Int) (v_~cur~0_22 Int) (aux_mod_v_~next~0_20_56 Int)) (or (<= (+ (* 5 aux_div_v_~next~0_20_56) v_~cur~0_22) (+ 20 (* 2 c_~j~0) (* aux_mod_v_~next~0_20_56 2))) (< (+ aux_mod_v_~next~0_20_56 c_~j~0 8) (+ (* 2 v_~cur~0_22) c_~next~0 (* 2 aux_div_v_~next~0_20_56))) (>= aux_mod_v_~next~0_20_56 2) (< v_~cur~0_22 (+ c_~next~0 c_~cur~0)) (> 0 aux_mod_v_~next~0_20_56))) (<= (div (+ c_~prev~0 .cse9 (- 6) c_~cur~0) (- 2)) .cse8) (<= .cse6 .cse12) (<= c_~i~0 .cse10) (<= .cse11 .cse7)))) is different from false