./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/loops/eureka_05.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version f4b24e32 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/loops/eureka_05.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 3f12ca1e314a03dfb1c8beadd0c1a180c2d2339dd5f3109d5999df06d52395ab --- Real Ultimate output --- This is Ultimate 0.2.2-?-f4b24e3 [2022-07-14 15:38:25,305 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-07-14 15:38:25,306 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-07-14 15:38:25,340 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-07-14 15:38:25,341 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-07-14 15:38:25,342 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-07-14 15:38:25,343 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-07-14 15:38:25,345 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-07-14 15:38:25,346 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-07-14 15:38:25,347 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-07-14 15:38:25,348 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-07-14 15:38:25,349 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-07-14 15:38:25,349 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-07-14 15:38:25,350 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-07-14 15:38:25,351 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-07-14 15:38:25,352 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-07-14 15:38:25,353 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-07-14 15:38:25,354 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-07-14 15:38:25,355 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-07-14 15:38:25,357 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-07-14 15:38:25,358 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-07-14 15:38:25,359 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-07-14 15:38:25,359 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-07-14 15:38:25,360 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-07-14 15:38:25,361 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-07-14 15:38:25,364 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-07-14 15:38:25,364 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-07-14 15:38:25,364 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-07-14 15:38:25,365 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-07-14 15:38:25,365 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-07-14 15:38:25,366 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-07-14 15:38:25,367 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-07-14 15:38:25,367 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-07-14 15:38:25,368 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-07-14 15:38:25,369 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-07-14 15:38:25,370 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-07-14 15:38:25,370 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-07-14 15:38:25,370 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-07-14 15:38:25,371 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-07-14 15:38:25,371 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-07-14 15:38:25,372 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-07-14 15:38:25,373 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-07-14 15:38:25,374 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-07-14 15:38:25,394 INFO L113 SettingsManager]: Loading preferences was successful [2022-07-14 15:38:25,394 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-07-14 15:38:25,394 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-07-14 15:38:25,395 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-07-14 15:38:25,396 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-07-14 15:38:25,396 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-07-14 15:38:25,396 INFO L138 SettingsManager]: * Use SBE=true [2022-07-14 15:38:25,396 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-07-14 15:38:25,397 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-07-14 15:38:25,397 INFO L138 SettingsManager]: * Use old map elimination=false [2022-07-14 15:38:25,397 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-07-14 15:38:25,397 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-07-14 15:38:25,397 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-07-14 15:38:25,398 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-07-14 15:38:25,398 INFO L138 SettingsManager]: * sizeof long=4 [2022-07-14 15:38:25,398 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-07-14 15:38:25,398 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-07-14 15:38:25,398 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-07-14 15:38:25,399 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-07-14 15:38:25,399 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-07-14 15:38:25,399 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-07-14 15:38:25,399 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-07-14 15:38:25,399 INFO L138 SettingsManager]: * sizeof long double=12 [2022-07-14 15:38:25,399 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-07-14 15:38:25,400 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-07-14 15:38:25,400 INFO L138 SettingsManager]: * Use constant arrays=true [2022-07-14 15:38:25,400 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-07-14 15:38:25,400 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-07-14 15:38:25,401 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-07-14 15:38:25,401 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-07-14 15:38:25,401 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-07-14 15:38:25,402 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-07-14 15:38:25,402 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 3f12ca1e314a03dfb1c8beadd0c1a180c2d2339dd5f3109d5999df06d52395ab [2022-07-14 15:38:25,607 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-07-14 15:38:25,630 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-07-14 15:38:25,634 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-07-14 15:38:25,635 INFO L271 PluginConnector]: Initializing CDTParser... [2022-07-14 15:38:25,635 INFO L275 PluginConnector]: CDTParser initialized [2022-07-14 15:38:25,636 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/loops/eureka_05.i [2022-07-14 15:38:25,707 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/5ac2c0498/684588d5f7f84934a36f2f4d4de8998c/FLAG6966493fd [2022-07-14 15:38:26,074 INFO L306 CDTParser]: Found 1 translation units. [2022-07-14 15:38:26,074 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/loops/eureka_05.i [2022-07-14 15:38:26,080 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/5ac2c0498/684588d5f7f84934a36f2f4d4de8998c/FLAG6966493fd [2022-07-14 15:38:26,507 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/5ac2c0498/684588d5f7f84934a36f2f4d4de8998c [2022-07-14 15:38:26,509 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-07-14 15:38:26,511 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-07-14 15:38:26,515 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-07-14 15:38:26,515 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-07-14 15:38:26,518 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-07-14 15:38:26,519 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.07 03:38:26" (1/1) ... [2022-07-14 15:38:26,520 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5edd916f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.07 03:38:26, skipping insertion in model container [2022-07-14 15:38:26,520 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.07 03:38:26" (1/1) ... [2022-07-14 15:38:26,525 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-07-14 15:38:26,537 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-07-14 15:38:26,667 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/loops/eureka_05.i[810,823] [2022-07-14 15:38:26,679 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-14 15:38:26,686 INFO L203 MainTranslator]: Completed pre-run [2022-07-14 15:38:26,696 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/loops/eureka_05.i[810,823] [2022-07-14 15:38:26,701 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-14 15:38:26,713 INFO L208 MainTranslator]: Completed translation [2022-07-14 15:38:26,713 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.07 03:38:26 WrapperNode [2022-07-14 15:38:26,713 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-07-14 15:38:26,714 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-07-14 15:38:26,714 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-07-14 15:38:26,714 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-07-14 15:38:26,720 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.07 03:38:26" (1/1) ... [2022-07-14 15:38:26,725 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.07 03:38:26" (1/1) ... [2022-07-14 15:38:26,741 INFO L137 Inliner]: procedures = 16, calls = 24, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 84 [2022-07-14 15:38:26,741 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-07-14 15:38:26,742 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-07-14 15:38:26,742 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-07-14 15:38:26,742 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-07-14 15:38:26,749 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.07 03:38:26" (1/1) ... [2022-07-14 15:38:26,750 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.07 03:38:26" (1/1) ... [2022-07-14 15:38:26,752 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.07 03:38:26" (1/1) ... [2022-07-14 15:38:26,752 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.07 03:38:26" (1/1) ... [2022-07-14 15:38:26,759 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.07 03:38:26" (1/1) ... [2022-07-14 15:38:26,769 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.07 03:38:26" (1/1) ... [2022-07-14 15:38:26,770 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.07 03:38:26" (1/1) ... [2022-07-14 15:38:26,772 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-07-14 15:38:26,773 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-07-14 15:38:26,773 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-07-14 15:38:26,773 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-07-14 15:38:26,774 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.07 03:38:26" (1/1) ... [2022-07-14 15:38:26,788 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-14 15:38:26,799 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-14 15:38:26,812 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-14 15:38:26,834 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-07-14 15:38:26,860 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-07-14 15:38:26,860 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-07-14 15:38:26,860 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-07-14 15:38:26,861 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-07-14 15:38:26,861 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-07-14 15:38:26,861 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-07-14 15:38:26,861 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-07-14 15:38:26,861 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-07-14 15:38:26,912 INFO L234 CfgBuilder]: Building ICFG [2022-07-14 15:38:26,913 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-07-14 15:38:27,028 INFO L275 CfgBuilder]: Performing block encoding [2022-07-14 15:38:27,033 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-07-14 15:38:27,034 INFO L299 CfgBuilder]: Removed 4 assume(true) statements. [2022-07-14 15:38:27,035 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.07 03:38:27 BoogieIcfgContainer [2022-07-14 15:38:27,036 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-07-14 15:38:27,037 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-07-14 15:38:27,037 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-07-14 15:38:27,040 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-07-14 15:38:27,040 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-14 15:38:27,040 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 14.07 03:38:26" (1/3) ... [2022-07-14 15:38:27,041 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@237473f6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 14.07 03:38:27, skipping insertion in model container [2022-07-14 15:38:27,041 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-14 15:38:27,042 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.07 03:38:26" (2/3) ... [2022-07-14 15:38:27,042 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@237473f6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 14.07 03:38:27, skipping insertion in model container [2022-07-14 15:38:27,042 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-14 15:38:27,042 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.07 03:38:27" (3/3) ... [2022-07-14 15:38:27,043 INFO L354 chiAutomizerObserver]: Analyzing ICFG eureka_05.i [2022-07-14 15:38:27,099 INFO L255 stractBuchiCegarLoop]: Interprodecural is true [2022-07-14 15:38:27,104 INFO L256 stractBuchiCegarLoop]: Hoare is false [2022-07-14 15:38:27,105 INFO L257 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-07-14 15:38:27,105 INFO L258 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-07-14 15:38:27,105 INFO L259 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-07-14 15:38:27,105 INFO L260 stractBuchiCegarLoop]: Difference is false [2022-07-14 15:38:27,105 INFO L261 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-07-14 15:38:27,106 INFO L265 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-07-14 15:38:27,109 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 21 states, 20 states have (on average 1.5) internal successors, (30), 20 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:38:27,123 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-07-14 15:38:27,124 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-14 15:38:27,124 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-14 15:38:27,128 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-14 15:38:27,128 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-07-14 15:38:27,128 INFO L287 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-07-14 15:38:27,129 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 21 states, 20 states have (on average 1.5) internal successors, (30), 20 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:38:27,137 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-07-14 15:38:27,137 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-14 15:38:27,137 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-14 15:38:27,137 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-07-14 15:38:27,138 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-07-14 15:38:27,143 INFO L752 eck$LassoCheckResult]: Stem: 5#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 13#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 6#L44-3true [2022-07-14 15:38:27,144 INFO L754 eck$LassoCheckResult]: Loop: 6#L44-3true assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 18#L44-2true main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 6#L44-3true [2022-07-14 15:38:27,171 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:27,171 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2022-07-14 15:38:27,178 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:27,178 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [897676896] [2022-07-14 15:38:27,178 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:27,179 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:27,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:27,295 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:38:27,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:27,341 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:38:27,344 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:27,344 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2022-07-14 15:38:27,345 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:27,346 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1107055413] [2022-07-14 15:38:27,346 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:27,347 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:27,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:27,368 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:38:27,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:27,387 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:38:27,389 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:27,390 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2022-07-14 15:38:27,390 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:27,390 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [663918372] [2022-07-14 15:38:27,391 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:27,391 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:27,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:27,421 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:38:27,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:27,452 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:38:27,921 INFO L210 LassoAnalysis]: Preferences: [2022-07-14 15:38:27,922 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-07-14 15:38:27,922 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-07-14 15:38:27,923 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-07-14 15:38:27,923 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-07-14 15:38:27,923 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-14 15:38:27,923 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-07-14 15:38:27,923 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-07-14 15:38:27,923 INFO L133 ssoRankerPreferences]: Filename of dumped script: eureka_05.i_Iteration1_Lasso [2022-07-14 15:38:27,924 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-07-14 15:38:27,924 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-07-14 15:38:27,942 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-14 15:38:27,947 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-14 15:38:27,951 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-14 15:38:27,954 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-14 15:38:27,956 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-14 15:38:28,407 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-14 15:38:28,411 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-14 15:38:28,414 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-14 15:38:28,723 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-07-14 15:38:28,726 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-07-14 15:38:28,728 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-14 15:38:28,728 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-14 15:38:28,748 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-14 15:38:28,749 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2022-07-14 15:38:28,751 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-07-14 15:38:28,758 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-07-14 15:38:28,759 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-07-14 15:38:28,759 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-07-14 15:38:28,759 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-07-14 15:38:28,759 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-07-14 15:38:28,761 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-07-14 15:38:28,761 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-07-14 15:38:28,792 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-07-14 15:38:28,818 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2022-07-14 15:38:28,819 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-14 15:38:28,819 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-14 15:38:28,822 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-14 15:38:28,831 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-07-14 15:38:28,841 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-07-14 15:38:28,841 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-07-14 15:38:28,842 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-07-14 15:38:28,842 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-07-14 15:38:28,845 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-07-14 15:38:28,846 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-07-14 15:38:28,849 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2022-07-14 15:38:28,858 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-07-14 15:38:28,878 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2022-07-14 15:38:28,878 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-14 15:38:28,878 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-14 15:38:28,880 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-14 15:38:28,880 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2022-07-14 15:38:28,881 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-07-14 15:38:28,887 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-07-14 15:38:28,888 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-07-14 15:38:28,888 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-07-14 15:38:28,888 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-07-14 15:38:28,891 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-07-14 15:38:28,891 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-07-14 15:38:28,904 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-07-14 15:38:28,919 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2022-07-14 15:38:28,920 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-14 15:38:28,920 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-14 15:38:28,921 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-14 15:38:28,922 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2022-07-14 15:38:28,923 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-07-14 15:38:28,929 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-07-14 15:38:28,929 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-07-14 15:38:28,929 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-07-14 15:38:28,929 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-07-14 15:38:28,929 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-07-14 15:38:28,930 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-07-14 15:38:28,930 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-07-14 15:38:28,955 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-07-14 15:38:28,978 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2022-07-14 15:38:28,978 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-14 15:38:28,978 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-14 15:38:28,980 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-14 15:38:28,983 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2022-07-14 15:38:28,984 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-07-14 15:38:28,990 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-07-14 15:38:28,990 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-07-14 15:38:28,991 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-07-14 15:38:28,991 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-07-14 15:38:28,993 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-07-14 15:38:28,993 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-07-14 15:38:29,011 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-07-14 15:38:29,028 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2022-07-14 15:38:29,028 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-14 15:38:29,028 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-14 15:38:29,029 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-14 15:38:29,030 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2022-07-14 15:38:29,032 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-07-14 15:38:29,038 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-07-14 15:38:29,039 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-07-14 15:38:29,039 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-07-14 15:38:29,039 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-07-14 15:38:29,041 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-07-14 15:38:29,041 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-07-14 15:38:29,053 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-07-14 15:38:29,068 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2022-07-14 15:38:29,069 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-14 15:38:29,069 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-14 15:38:29,070 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-14 15:38:29,071 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2022-07-14 15:38:29,072 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-07-14 15:38:29,078 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-07-14 15:38:29,078 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-07-14 15:38:29,078 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-07-14 15:38:29,078 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-07-14 15:38:29,082 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-07-14 15:38:29,082 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-07-14 15:38:29,095 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-07-14 15:38:29,110 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Ended with exit code 0 [2022-07-14 15:38:29,111 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-14 15:38:29,111 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-14 15:38:29,112 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-14 15:38:29,113 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2022-07-14 15:38:29,114 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-07-14 15:38:29,120 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-07-14 15:38:29,121 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-07-14 15:38:29,121 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-07-14 15:38:29,121 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-07-14 15:38:29,123 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-07-14 15:38:29,123 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-07-14 15:38:29,143 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-07-14 15:38:29,170 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2022-07-14 15:38:29,170 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-14 15:38:29,170 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-14 15:38:29,172 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-14 15:38:29,178 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-07-14 15:38:29,183 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2022-07-14 15:38:29,185 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-07-14 15:38:29,185 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-07-14 15:38:29,185 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-07-14 15:38:29,185 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-07-14 15:38:29,187 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-07-14 15:38:29,187 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-07-14 15:38:29,199 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-07-14 15:38:29,215 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2022-07-14 15:38:29,215 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-14 15:38:29,215 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-14 15:38:29,216 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-14 15:38:29,217 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2022-07-14 15:38:29,218 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-07-14 15:38:29,227 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-07-14 15:38:29,227 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-07-14 15:38:29,227 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-07-14 15:38:29,227 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-07-14 15:38:29,231 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-07-14 15:38:29,231 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-07-14 15:38:29,251 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-07-14 15:38:29,267 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2022-07-14 15:38:29,267 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-14 15:38:29,267 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-14 15:38:29,268 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-14 15:38:29,273 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2022-07-14 15:38:29,274 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-07-14 15:38:29,281 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-07-14 15:38:29,281 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-07-14 15:38:29,281 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-07-14 15:38:29,281 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-07-14 15:38:29,283 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-07-14 15:38:29,283 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-07-14 15:38:29,295 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-07-14 15:38:29,320 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2022-07-14 15:38:29,321 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-14 15:38:29,321 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-14 15:38:29,322 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-14 15:38:29,324 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2022-07-14 15:38:29,324 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-07-14 15:38:29,331 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-07-14 15:38:29,332 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-07-14 15:38:29,332 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-07-14 15:38:29,332 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-07-14 15:38:29,336 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-07-14 15:38:29,337 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-07-14 15:38:29,344 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-07-14 15:38:29,408 INFO L443 ModelExtractionUtils]: Simplification made 20 calls to the SMT solver. [2022-07-14 15:38:29,408 INFO L444 ModelExtractionUtils]: 1 out of 16 variables were initially zero. Simplification set additionally 12 variables to zero. [2022-07-14 15:38:29,410 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-14 15:38:29,410 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-14 15:38:29,419 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-14 15:38:29,463 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2022-07-14 15:38:29,464 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-07-14 15:38:29,485 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2022-07-14 15:38:29,485 INFO L513 LassoAnalysis]: Proved termination. [2022-07-14 15:38:29,485 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~1#1, v_rep(select #length ULTIMATE.start_main_~#array~1#1.base)_1) = 8*ULTIMATE.start_main_~i~1#1 + 1*v_rep(select #length ULTIMATE.start_main_~#array~1#1.base)_1 Supporting invariants [] [2022-07-14 15:38:29,523 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2022-07-14 15:38:29,591 INFO L293 tatePredicateManager]: 27 out of 27 supporting invariants were superfluous and have been removed [2022-07-14 15:38:29,615 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:29,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-14 15:38:29,639 INFO L263 TraceCheckSpWp]: Trace formula consists of 55 conjuncts, 2 conjunts are in the unsatisfiable core [2022-07-14 15:38:29,640 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-14 15:38:29,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-14 15:38:29,661 INFO L263 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjunts are in the unsatisfiable core [2022-07-14 15:38:29,662 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-14 15:38:29,685 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-14 15:38:29,714 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2022-07-14 15:38:29,715 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 21 states, 20 states have (on average 1.5) internal successors, (30), 20 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:38:29,753 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 21 states, 20 states have (on average 1.5) internal successors, (30), 20 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 48 states and 71 transitions. Complement of second has 8 states. [2022-07-14 15:38:29,755 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2022-07-14 15:38:29,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:38:29,760 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 42 transitions. [2022-07-14 15:38:29,761 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 42 transitions. Stem has 2 letters. Loop has 2 letters. [2022-07-14 15:38:29,761 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-07-14 15:38:29,761 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 42 transitions. Stem has 4 letters. Loop has 2 letters. [2022-07-14 15:38:29,762 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-07-14 15:38:29,762 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 42 transitions. Stem has 2 letters. Loop has 4 letters. [2022-07-14 15:38:29,762 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-07-14 15:38:29,762 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 48 states and 71 transitions. [2022-07-14 15:38:29,765 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 11 [2022-07-14 15:38:29,768 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 48 states to 18 states and 24 transitions. [2022-07-14 15:38:29,769 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2022-07-14 15:38:29,769 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2022-07-14 15:38:29,769 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18 states and 24 transitions. [2022-07-14 15:38:29,770 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-14 15:38:29,770 INFO L369 hiAutomatonCegarLoop]: Abstraction has 18 states and 24 transitions. [2022-07-14 15:38:29,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states and 24 transitions. [2022-07-14 15:38:29,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2022-07-14 15:38:29,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.3333333333333333) internal successors, (24), 17 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:38:29,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 24 transitions. [2022-07-14 15:38:29,789 INFO L392 hiAutomatonCegarLoop]: Abstraction has 18 states and 24 transitions. [2022-07-14 15:38:29,789 INFO L374 stractBuchiCegarLoop]: Abstraction has 18 states and 24 transitions. [2022-07-14 15:38:29,789 INFO L287 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-07-14 15:38:29,789 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 18 states and 24 transitions. [2022-07-14 15:38:29,790 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 11 [2022-07-14 15:38:29,790 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-14 15:38:29,790 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-14 15:38:29,790 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2022-07-14 15:38:29,790 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-07-14 15:38:29,791 INFO L752 eck$LassoCheckResult]: Stem: 221#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 222#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 223#L44-3 assume !(main_~i~1#1 >= 0); 224#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 220#L30-3 [2022-07-14 15:38:29,791 INFO L754 eck$LassoCheckResult]: Loop: 220#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 233#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 234#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 219#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 220#L30-3 [2022-07-14 15:38:29,791 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:29,791 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2022-07-14 15:38:29,791 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:29,791 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1348150126] [2022-07-14 15:38:29,792 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:29,792 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:29,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-14 15:38:29,823 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-14 15:38:29,824 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-14 15:38:29,824 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1348150126] [2022-07-14 15:38:29,824 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1348150126] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-14 15:38:29,824 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-14 15:38:29,825 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-07-14 15:38:29,825 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [257605808] [2022-07-14 15:38:29,825 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-14 15:38:29,827 INFO L757 eck$LassoCheckResult]: stem already infeasible [2022-07-14 15:38:29,827 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:29,827 INFO L85 PathProgramCache]: Analyzing trace with hash 1668713, now seen corresponding path program 1 times [2022-07-14 15:38:29,828 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:29,828 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1925445927] [2022-07-14 15:38:29,828 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:29,828 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:29,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:29,837 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:38:29,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:29,845 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:38:29,928 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-14 15:38:29,930 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-07-14 15:38:29,931 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-14 15:38:29,932 INFO L87 Difference]: Start difference. First operand 18 states and 24 transitions. cyclomatic complexity: 9 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:38:29,949 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-14 15:38:29,949 INFO L93 Difference]: Finished difference Result 19 states and 23 transitions. [2022-07-14 15:38:29,950 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-07-14 15:38:29,950 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 19 states and 23 transitions. [2022-07-14 15:38:29,954 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-07-14 15:38:29,955 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 19 states to 18 states and 22 transitions. [2022-07-14 15:38:29,956 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2022-07-14 15:38:29,956 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2022-07-14 15:38:29,956 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18 states and 22 transitions. [2022-07-14 15:38:29,956 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-14 15:38:29,956 INFO L369 hiAutomatonCegarLoop]: Abstraction has 18 states and 22 transitions. [2022-07-14 15:38:29,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states and 22 transitions. [2022-07-14 15:38:29,958 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 17. [2022-07-14 15:38:29,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.2352941176470589) internal successors, (21), 16 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:38:29,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 21 transitions. [2022-07-14 15:38:29,960 INFO L392 hiAutomatonCegarLoop]: Abstraction has 17 states and 21 transitions. [2022-07-14 15:38:29,960 INFO L374 stractBuchiCegarLoop]: Abstraction has 17 states and 21 transitions. [2022-07-14 15:38:29,961 INFO L287 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-07-14 15:38:29,961 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17 states and 21 transitions. [2022-07-14 15:38:29,962 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-07-14 15:38:29,962 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-14 15:38:29,962 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-14 15:38:29,962 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2022-07-14 15:38:29,962 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-07-14 15:38:29,963 INFO L752 eck$LassoCheckResult]: Stem: 262#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 263#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 264#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 265#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 266#L44-3 assume !(main_~i~1#1 >= 0); 267#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 261#L30-3 [2022-07-14 15:38:29,963 INFO L754 eck$LassoCheckResult]: Loop: 261#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 275#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 276#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 260#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 261#L30-3 [2022-07-14 15:38:29,964 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:29,964 INFO L85 PathProgramCache]: Analyzing trace with hash 889660429, now seen corresponding path program 1 times [2022-07-14 15:38:29,964 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:29,965 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1984897317] [2022-07-14 15:38:29,967 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:29,967 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:29,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-14 15:38:30,013 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-14 15:38:30,013 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-14 15:38:30,017 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1984897317] [2022-07-14 15:38:30,017 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1984897317] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-14 15:38:30,017 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [608117058] [2022-07-14 15:38:30,017 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:30,017 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-14 15:38:30,018 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-14 15:38:30,020 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-14 15:38:30,044 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-07-14 15:38:30,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-14 15:38:30,064 INFO L263 TraceCheckSpWp]: Trace formula consists of 69 conjuncts, 3 conjunts are in the unsatisfiable core [2022-07-14 15:38:30,064 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-14 15:38:30,073 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-14 15:38:30,073 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-14 15:38:30,089 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-14 15:38:30,089 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [608117058] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-14 15:38:30,089 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-14 15:38:30,089 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 6 [2022-07-14 15:38:30,089 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1331094178] [2022-07-14 15:38:30,089 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-14 15:38:30,090 INFO L757 eck$LassoCheckResult]: stem already infeasible [2022-07-14 15:38:30,090 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:30,090 INFO L85 PathProgramCache]: Analyzing trace with hash 1668713, now seen corresponding path program 2 times [2022-07-14 15:38:30,090 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:30,090 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1923443409] [2022-07-14 15:38:30,090 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:30,090 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:30,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:30,098 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:38:30,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:30,105 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:38:30,210 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-14 15:38:30,211 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-07-14 15:38:30,211 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2022-07-14 15:38:30,211 INFO L87 Difference]: Start difference. First operand 17 states and 21 transitions. cyclomatic complexity: 7 Second operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 6 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:38:30,244 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Forceful destruction successful, exit code 0 [2022-07-14 15:38:30,252 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-14 15:38:30,253 INFO L93 Difference]: Finished difference Result 27 states and 31 transitions. [2022-07-14 15:38:30,253 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-07-14 15:38:30,254 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 31 transitions. [2022-07-14 15:38:30,255 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-07-14 15:38:30,255 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 27 states and 31 transitions. [2022-07-14 15:38:30,255 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2022-07-14 15:38:30,256 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2022-07-14 15:38:30,256 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 31 transitions. [2022-07-14 15:38:30,256 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-14 15:38:30,256 INFO L369 hiAutomatonCegarLoop]: Abstraction has 27 states and 31 transitions. [2022-07-14 15:38:30,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 31 transitions. [2022-07-14 15:38:30,258 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 23. [2022-07-14 15:38:30,258 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.173913043478261) internal successors, (27), 22 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:38:30,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 27 transitions. [2022-07-14 15:38:30,258 INFO L392 hiAutomatonCegarLoop]: Abstraction has 23 states and 27 transitions. [2022-07-14 15:38:30,258 INFO L374 stractBuchiCegarLoop]: Abstraction has 23 states and 27 transitions. [2022-07-14 15:38:30,259 INFO L287 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-07-14 15:38:30,259 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 23 states and 27 transitions. [2022-07-14 15:38:30,259 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-07-14 15:38:30,259 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-14 15:38:30,260 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-14 15:38:30,260 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1] [2022-07-14 15:38:30,260 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-07-14 15:38:30,260 INFO L752 eck$LassoCheckResult]: Stem: 345#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 346#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 347#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 348#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 349#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 350#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 365#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 364#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 363#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 362#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 361#L44-3 assume !(main_~i~1#1 >= 0); 351#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 344#L30-3 [2022-07-14 15:38:30,260 INFO L754 eck$LassoCheckResult]: Loop: 344#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 359#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 360#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 343#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 344#L30-3 [2022-07-14 15:38:30,261 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:30,261 INFO L85 PathProgramCache]: Analyzing trace with hash 833936659, now seen corresponding path program 2 times [2022-07-14 15:38:30,261 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:30,261 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1569461759] [2022-07-14 15:38:30,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:30,262 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:30,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-14 15:38:30,334 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-14 15:38:30,334 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-14 15:38:30,334 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1569461759] [2022-07-14 15:38:30,334 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1569461759] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-14 15:38:30,335 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1236412958] [2022-07-14 15:38:30,335 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-07-14 15:38:30,335 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-14 15:38:30,335 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-14 15:38:30,336 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-14 15:38:30,337 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-07-14 15:38:30,380 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-07-14 15:38:30,381 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-07-14 15:38:30,381 INFO L263 TraceCheckSpWp]: Trace formula consists of 102 conjuncts, 6 conjunts are in the unsatisfiable core [2022-07-14 15:38:30,383 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-14 15:38:30,413 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-14 15:38:30,413 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-14 15:38:30,441 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-14 15:38:30,441 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1236412958] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-14 15:38:30,441 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-14 15:38:30,441 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 7 [2022-07-14 15:38:30,442 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2146811935] [2022-07-14 15:38:30,442 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-14 15:38:30,442 INFO L757 eck$LassoCheckResult]: stem already infeasible [2022-07-14 15:38:30,442 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:30,443 INFO L85 PathProgramCache]: Analyzing trace with hash 1668713, now seen corresponding path program 3 times [2022-07-14 15:38:30,443 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:30,443 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [540404372] [2022-07-14 15:38:30,443 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:30,443 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:30,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:30,450 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:38:30,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:30,456 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:38:30,533 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-14 15:38:30,534 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-07-14 15:38:30,534 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2022-07-14 15:38:30,535 INFO L87 Difference]: Start difference. First operand 23 states and 27 transitions. cyclomatic complexity: 7 Second operand has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:38:30,581 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-14 15:38:30,582 INFO L93 Difference]: Finished difference Result 41 states and 45 transitions. [2022-07-14 15:38:30,582 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-07-14 15:38:30,583 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 41 states and 45 transitions. [2022-07-14 15:38:30,584 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-07-14 15:38:30,584 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 41 states to 41 states and 45 transitions. [2022-07-14 15:38:30,584 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 31 [2022-07-14 15:38:30,585 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 31 [2022-07-14 15:38:30,585 INFO L73 IsDeterministic]: Start isDeterministic. Operand 41 states and 45 transitions. [2022-07-14 15:38:30,585 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-14 15:38:30,585 INFO L369 hiAutomatonCegarLoop]: Abstraction has 41 states and 45 transitions. [2022-07-14 15:38:30,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states and 45 transitions. [2022-07-14 15:38:30,587 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 25. [2022-07-14 15:38:30,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 1.16) internal successors, (29), 24 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:38:30,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 29 transitions. [2022-07-14 15:38:30,588 INFO L392 hiAutomatonCegarLoop]: Abstraction has 25 states and 29 transitions. [2022-07-14 15:38:30,588 INFO L374 stractBuchiCegarLoop]: Abstraction has 25 states and 29 transitions. [2022-07-14 15:38:30,588 INFO L287 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-07-14 15:38:30,588 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 25 states and 29 transitions. [2022-07-14 15:38:30,589 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-07-14 15:38:30,589 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-14 15:38:30,589 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-14 15:38:30,589 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 1, 1, 1, 1] [2022-07-14 15:38:30,589 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-07-14 15:38:30,590 INFO L752 eck$LassoCheckResult]: Stem: 485#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 486#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 487#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 488#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 489#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 490#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 507#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 506#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 505#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 504#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 503#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 502#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 501#L44-3 assume !(main_~i~1#1 >= 0); 491#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 484#L30-3 [2022-07-14 15:38:30,590 INFO L754 eck$LassoCheckResult]: Loop: 484#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 499#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 500#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 483#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 484#L30-3 [2022-07-14 15:38:30,590 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:30,590 INFO L85 PathProgramCache]: Analyzing trace with hash -1745699051, now seen corresponding path program 3 times [2022-07-14 15:38:30,591 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:30,591 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1112147646] [2022-07-14 15:38:30,591 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:30,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:30,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:30,607 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:38:30,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:30,622 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:38:30,622 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:30,622 INFO L85 PathProgramCache]: Analyzing trace with hash 1668713, now seen corresponding path program 4 times [2022-07-14 15:38:30,623 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:30,623 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [740452409] [2022-07-14 15:38:30,623 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:30,623 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:30,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:30,629 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:38:30,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:30,634 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:38:30,635 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:30,635 INFO L85 PathProgramCache]: Analyzing trace with hash -743535747, now seen corresponding path program 1 times [2022-07-14 15:38:30,635 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:30,635 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [50453680] [2022-07-14 15:38:30,635 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:30,635 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:30,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-14 15:38:30,680 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-07-14 15:38:30,680 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-14 15:38:30,681 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [50453680] [2022-07-14 15:38:30,681 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [50453680] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-14 15:38:30,681 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-14 15:38:30,681 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-07-14 15:38:30,681 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1830417670] [2022-07-14 15:38:30,681 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-14 15:38:30,757 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-14 15:38:30,758 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-07-14 15:38:30,758 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-07-14 15:38:30,758 INFO L87 Difference]: Start difference. First operand 25 states and 29 transitions. cyclomatic complexity: 7 Second operand has 5 states, 5 states have (on average 2.0) internal successors, (10), 4 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:38:30,796 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-14 15:38:30,796 INFO L93 Difference]: Finished difference Result 34 states and 41 transitions. [2022-07-14 15:38:30,797 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-07-14 15:38:30,798 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 34 states and 41 transitions. [2022-07-14 15:38:30,798 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-07-14 15:38:30,798 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 34 states to 34 states and 41 transitions. [2022-07-14 15:38:30,799 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 24 [2022-07-14 15:38:30,799 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 24 [2022-07-14 15:38:30,799 INFO L73 IsDeterministic]: Start isDeterministic. Operand 34 states and 41 transitions. [2022-07-14 15:38:30,799 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-14 15:38:30,799 INFO L369 hiAutomatonCegarLoop]: Abstraction has 34 states and 41 transitions. [2022-07-14 15:38:30,799 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states and 41 transitions. [2022-07-14 15:38:30,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 27. [2022-07-14 15:38:30,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.1481481481481481) internal successors, (31), 26 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:38:30,801 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 31 transitions. [2022-07-14 15:38:30,801 INFO L392 hiAutomatonCegarLoop]: Abstraction has 27 states and 31 transitions. [2022-07-14 15:38:30,801 INFO L374 stractBuchiCegarLoop]: Abstraction has 27 states and 31 transitions. [2022-07-14 15:38:30,801 INFO L287 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-07-14 15:38:30,801 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 31 transitions. [2022-07-14 15:38:30,801 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-07-14 15:38:30,801 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-14 15:38:30,801 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-14 15:38:30,802 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 1, 1, 1, 1, 1, 1] [2022-07-14 15:38:30,802 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-07-14 15:38:30,802 INFO L752 eck$LassoCheckResult]: Stem: 556#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 557#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 558#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 559#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 560#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 561#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 580#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 579#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 578#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 577#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 576#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 575#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 574#L44-3 assume !(main_~i~1#1 >= 0); 562#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 563#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 572#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 568#L33 [2022-07-14 15:38:30,802 INFO L754 eck$LassoCheckResult]: Loop: 568#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 569#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 571#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 568#L33 [2022-07-14 15:38:30,802 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:30,802 INFO L85 PathProgramCache]: Analyzing trace with hash 1715425501, now seen corresponding path program 1 times [2022-07-14 15:38:30,803 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:30,803 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1707232050] [2022-07-14 15:38:30,803 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:30,803 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:30,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:30,847 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:38:30,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:30,861 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:38:30,862 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:30,862 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 1 times [2022-07-14 15:38:30,862 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:30,862 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1112274079] [2022-07-14 15:38:30,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:30,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:30,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:30,866 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:38:30,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:30,888 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:38:30,889 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:30,889 INFO L85 PathProgramCache]: Analyzing trace with hash -1574719937, now seen corresponding path program 1 times [2022-07-14 15:38:30,889 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:30,889 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1026030463] [2022-07-14 15:38:30,889 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:30,890 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:30,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-14 15:38:31,270 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 1 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-14 15:38:31,271 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-14 15:38:31,271 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1026030463] [2022-07-14 15:38:31,271 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1026030463] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-14 15:38:31,271 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [26702157] [2022-07-14 15:38:31,271 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:31,271 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-14 15:38:31,272 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-14 15:38:31,279 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-14 15:38:31,287 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-07-14 15:38:31,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-14 15:38:31,348 INFO L263 TraceCheckSpWp]: Trace formula consists of 145 conjuncts, 26 conjunts are in the unsatisfiable core [2022-07-14 15:38:31,350 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-14 15:38:31,414 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-07-14 15:38:31,415 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-07-14 15:38:31,456 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-07-14 15:38:31,482 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-07-14 15:38:31,505 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-07-14 15:38:31,538 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-07-14 15:38:31,582 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-07-14 15:38:31,688 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-14 15:38:31,689 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-14 15:38:31,690 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-14 15:38:31,690 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-14 15:38:31,691 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 13 [2022-07-14 15:38:31,712 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 1 proven. 9 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-07-14 15:38:31,712 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-14 15:38:31,791 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_122 (Array Int Int))) (let ((.cse0 (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#array~1#1.base| v_ArrVal_122) |c_~#array~0.base|))) (<= (select .cse0 |c_~#array~0.offset|) (select .cse0 (+ |c_~#array~0.offset| 4))))) is different from false [2022-07-14 15:38:31,876 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 9 not checked. [2022-07-14 15:38:31,876 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [26702157] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-14 15:38:31,876 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-14 15:38:31,877 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 7, 7] total 23 [2022-07-14 15:38:31,878 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [352899403] [2022-07-14 15:38:31,879 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-14 15:38:31,936 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-14 15:38:31,937 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-07-14 15:38:31,938 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=85, Invalid=424, Unknown=1, NotChecked=42, Total=552 [2022-07-14 15:38:31,938 INFO L87 Difference]: Start difference. First operand 27 states and 31 transitions. cyclomatic complexity: 7 Second operand has 24 states, 24 states have (on average 1.7083333333333333) internal successors, (41), 23 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:38:32,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-14 15:38:32,689 INFO L93 Difference]: Finished difference Result 35 states and 41 transitions. [2022-07-14 15:38:32,689 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-07-14 15:38:32,690 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 35 states and 41 transitions. [2022-07-14 15:38:32,691 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 15 [2022-07-14 15:38:32,691 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 35 states to 35 states and 41 transitions. [2022-07-14 15:38:32,691 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 25 [2022-07-14 15:38:32,691 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 25 [2022-07-14 15:38:32,691 INFO L73 IsDeterministic]: Start isDeterministic. Operand 35 states and 41 transitions. [2022-07-14 15:38:32,691 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-14 15:38:32,692 INFO L369 hiAutomatonCegarLoop]: Abstraction has 35 states and 41 transitions. [2022-07-14 15:38:32,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states and 41 transitions. [2022-07-14 15:38:32,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 28. [2022-07-14 15:38:32,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.1428571428571428) internal successors, (32), 27 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:38:32,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 32 transitions. [2022-07-14 15:38:32,693 INFO L392 hiAutomatonCegarLoop]: Abstraction has 28 states and 32 transitions. [2022-07-14 15:38:32,693 INFO L374 stractBuchiCegarLoop]: Abstraction has 28 states and 32 transitions. [2022-07-14 15:38:32,694 INFO L287 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2022-07-14 15:38:32,694 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 32 transitions. [2022-07-14 15:38:32,694 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-07-14 15:38:32,694 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-14 15:38:32,694 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-14 15:38:32,694 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 1, 1, 1, 1, 1, 1, 1] [2022-07-14 15:38:32,694 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-07-14 15:38:32,695 INFO L752 eck$LassoCheckResult]: Stem: 781#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 782#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 783#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 784#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 785#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 786#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 805#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 804#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 803#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 802#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 801#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 800#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 799#L44-3 assume !(main_~i~1#1 >= 0); 787#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 788#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 797#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 793#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 794#L32-2 [2022-07-14 15:38:32,695 INFO L754 eck$LassoCheckResult]: Loop: 794#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 796#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 806#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 794#L32-2 [2022-07-14 15:38:32,695 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:32,695 INFO L85 PathProgramCache]: Analyzing trace with hash 1638583016, now seen corresponding path program 1 times [2022-07-14 15:38:32,695 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:32,695 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [809394928] [2022-07-14 15:38:32,695 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:32,695 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:32,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:32,719 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:38:32,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:32,745 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:38:32,746 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:32,746 INFO L85 PathProgramCache]: Analyzing trace with hash 68297, now seen corresponding path program 2 times [2022-07-14 15:38:32,746 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:32,746 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2073350096] [2022-07-14 15:38:32,746 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:32,746 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:32,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:32,750 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:38:32,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:32,754 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:38:32,754 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:32,754 INFO L85 PathProgramCache]: Analyzing trace with hash -1571618174, now seen corresponding path program 1 times [2022-07-14 15:38:32,754 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:32,755 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [266866349] [2022-07-14 15:38:32,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:32,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:32,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-14 15:38:32,974 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-07-14 15:38:32,974 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-14 15:38:32,974 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [266866349] [2022-07-14 15:38:32,974 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [266866349] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-14 15:38:32,974 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1835697806] [2022-07-14 15:38:32,975 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:32,975 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-14 15:38:32,975 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-14 15:38:32,979 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-14 15:38:32,987 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-07-14 15:38:33,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-14 15:38:33,043 INFO L263 TraceCheckSpWp]: Trace formula consists of 146 conjuncts, 34 conjunts are in the unsatisfiable core [2022-07-14 15:38:33,045 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-14 15:38:33,086 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-07-14 15:38:33,086 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-07-14 15:38:33,116 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-07-14 15:38:33,169 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-07-14 15:38:33,238 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-07-14 15:38:33,256 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-07-14 15:38:33,286 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-07-14 15:38:33,463 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 13 [2022-07-14 15:38:33,484 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-07-14 15:38:33,484 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-14 15:38:33,603 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_163 (Array Int Int))) (let ((.cse0 (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#array~1#1.base| v_ArrVal_163) |c_~#array~0.base|))) (<= (select .cse0 |c_~#array~0.offset|) (select .cse0 (+ |c_~#array~0.offset| 8))))) is different from false [2022-07-14 15:38:33,633 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~#array~1#1.base_55| Int) (v_ArrVal_163 (Array Int Int))) (or (not (= (select |c_#valid| |v_ULTIMATE.start_main_~#array~1#1.base_55|) 0)) (let ((.cse0 (select (store |c_#memory_int| |v_ULTIMATE.start_main_~#array~1#1.base_55| v_ArrVal_163) |c_~#array~0.base|))) (<= (select .cse0 |c_~#array~0.offset|) (select .cse0 (+ |c_~#array~0.offset| 8)))))) is different from false [2022-07-14 15:38:33,635 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 16 trivial. 9 not checked. [2022-07-14 15:38:33,635 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1835697806] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-14 15:38:33,635 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-14 15:38:33,635 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 7] total 25 [2022-07-14 15:38:33,635 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1906233384] [2022-07-14 15:38:33,635 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-14 15:38:33,689 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-14 15:38:33,689 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-07-14 15:38:33,690 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=526, Unknown=2, NotChecked=94, Total=702 [2022-07-14 15:38:33,690 INFO L87 Difference]: Start difference. First operand 28 states and 32 transitions. cyclomatic complexity: 7 Second operand has 27 states, 26 states have (on average 1.7692307692307692) internal successors, (46), 26 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:38:34,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-14 15:38:34,487 INFO L93 Difference]: Finished difference Result 51 states and 61 transitions. [2022-07-14 15:38:34,487 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-07-14 15:38:34,488 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 61 transitions. [2022-07-14 15:38:34,489 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 23 [2022-07-14 15:38:34,489 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 61 transitions. [2022-07-14 15:38:34,489 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 41 [2022-07-14 15:38:34,489 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 41 [2022-07-14 15:38:34,489 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 61 transitions. [2022-07-14 15:38:34,490 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-14 15:38:34,490 INFO L369 hiAutomatonCegarLoop]: Abstraction has 51 states and 61 transitions. [2022-07-14 15:38:34,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 61 transitions. [2022-07-14 15:38:34,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 31. [2022-07-14 15:38:34,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 1.1612903225806452) internal successors, (36), 30 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:38:34,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 36 transitions. [2022-07-14 15:38:34,493 INFO L392 hiAutomatonCegarLoop]: Abstraction has 31 states and 36 transitions. [2022-07-14 15:38:34,493 INFO L374 stractBuchiCegarLoop]: Abstraction has 31 states and 36 transitions. [2022-07-14 15:38:34,493 INFO L287 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2022-07-14 15:38:34,493 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 31 states and 36 transitions. [2022-07-14 15:38:34,493 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-07-14 15:38:34,493 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-14 15:38:34,493 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-14 15:38:34,494 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-14 15:38:34,494 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-07-14 15:38:34,494 INFO L752 eck$LassoCheckResult]: Stem: 1031#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 1032#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 1033#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1034#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1035#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1036#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1056#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1055#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1054#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1053#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1052#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1051#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1050#L44-3 assume !(main_~i~1#1 >= 0); 1037#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 1038#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1047#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1048#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1059#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1058#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 1049#L32-4 [2022-07-14 15:38:34,494 INFO L754 eck$LassoCheckResult]: Loop: 1049#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1029#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 1030#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1046#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 1049#L32-4 [2022-07-14 15:38:34,495 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:34,495 INFO L85 PathProgramCache]: Analyzing trace with hash -1574718017, now seen corresponding path program 1 times [2022-07-14 15:38:34,495 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:34,495 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [5410791] [2022-07-14 15:38:34,495 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:34,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:34,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-14 15:38:34,530 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-07-14 15:38:34,530 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-14 15:38:34,530 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [5410791] [2022-07-14 15:38:34,530 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [5410791] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-14 15:38:34,530 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2031827286] [2022-07-14 15:38:34,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:34,531 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-14 15:38:34,531 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-14 15:38:34,535 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-14 15:38:34,543 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-07-14 15:38:34,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-14 15:38:34,594 INFO L263 TraceCheckSpWp]: Trace formula consists of 133 conjuncts, 5 conjunts are in the unsatisfiable core [2022-07-14 15:38:34,595 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-14 15:38:34,650 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-07-14 15:38:34,650 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-14 15:38:34,704 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-07-14 15:38:34,704 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2031827286] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-14 15:38:34,704 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-14 15:38:34,704 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 11 [2022-07-14 15:38:34,704 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2062666458] [2022-07-14 15:38:34,704 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-14 15:38:34,706 INFO L757 eck$LassoCheckResult]: stem already infeasible [2022-07-14 15:38:34,706 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:34,706 INFO L85 PathProgramCache]: Analyzing trace with hash 2248553, now seen corresponding path program 5 times [2022-07-14 15:38:34,706 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:34,706 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [591508141] [2022-07-14 15:38:34,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:34,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:34,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:34,711 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:38:34,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:34,713 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:38:34,784 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-14 15:38:34,784 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-07-14 15:38:34,784 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=107, Unknown=0, NotChecked=0, Total=156 [2022-07-14 15:38:34,784 INFO L87 Difference]: Start difference. First operand 31 states and 36 transitions. cyclomatic complexity: 8 Second operand has 13 states, 12 states have (on average 2.3333333333333335) internal successors, (28), 12 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:38:34,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-14 15:38:34,898 INFO L93 Difference]: Finished difference Result 51 states and 61 transitions. [2022-07-14 15:38:34,899 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-07-14 15:38:34,900 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 61 transitions. [2022-07-14 15:38:34,900 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 16 [2022-07-14 15:38:34,901 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 61 transitions. [2022-07-14 15:38:34,901 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 41 [2022-07-14 15:38:34,901 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 41 [2022-07-14 15:38:34,901 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 61 transitions. [2022-07-14 15:38:34,902 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-14 15:38:34,902 INFO L369 hiAutomatonCegarLoop]: Abstraction has 51 states and 61 transitions. [2022-07-14 15:38:34,902 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 61 transitions. [2022-07-14 15:38:34,904 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 46. [2022-07-14 15:38:34,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 46 states have (on average 1.173913043478261) internal successors, (54), 45 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:38:34,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 54 transitions. [2022-07-14 15:38:34,906 INFO L392 hiAutomatonCegarLoop]: Abstraction has 46 states and 54 transitions. [2022-07-14 15:38:34,906 INFO L374 stractBuchiCegarLoop]: Abstraction has 46 states and 54 transitions. [2022-07-14 15:38:34,906 INFO L287 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2022-07-14 15:38:34,906 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 46 states and 54 transitions. [2022-07-14 15:38:34,906 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-07-14 15:38:34,907 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-14 15:38:34,907 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-14 15:38:34,907 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 4, 3, 3, 1, 1, 1, 1, 1] [2022-07-14 15:38:34,907 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-07-14 15:38:34,908 INFO L752 eck$LassoCheckResult]: Stem: 1253#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 1254#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 1255#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1256#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1257#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1258#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1285#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1283#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1280#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1278#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1277#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1274#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1273#L44-3 assume !(main_~i~1#1 >= 0); 1259#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 1260#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1295#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1294#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1293#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1292#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1291#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1290#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1289#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1288#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1287#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1286#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1282#L33 [2022-07-14 15:38:34,908 INFO L754 eck$LassoCheckResult]: Loop: 1282#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 1284#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1281#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1282#L33 [2022-07-14 15:38:34,908 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:34,908 INFO L85 PathProgramCache]: Analyzing trace with hash 649240641, now seen corresponding path program 1 times [2022-07-14 15:38:34,908 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:34,909 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1813106513] [2022-07-14 15:38:34,909 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:34,909 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:34,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:34,923 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:38:34,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:34,958 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:38:34,959 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:34,959 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 3 times [2022-07-14 15:38:34,959 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:34,959 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [358808502] [2022-07-14 15:38:34,959 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:34,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:34,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:34,963 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:38:34,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:34,965 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:38:34,966 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:34,966 INFO L85 PathProgramCache]: Analyzing trace with hash 1290237019, now seen corresponding path program 2 times [2022-07-14 15:38:34,966 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:34,966 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2135361626] [2022-07-14 15:38:34,966 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:34,966 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:34,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-14 15:38:35,036 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-07-14 15:38:35,036 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-14 15:38:35,036 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2135361626] [2022-07-14 15:38:35,036 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2135361626] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-14 15:38:35,037 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-14 15:38:35,037 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-07-14 15:38:35,037 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [863075440] [2022-07-14 15:38:35,037 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-14 15:38:35,111 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-14 15:38:35,112 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-07-14 15:38:35,113 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2022-07-14 15:38:35,113 INFO L87 Difference]: Start difference. First operand 46 states and 54 transitions. cyclomatic complexity: 12 Second operand has 9 states, 8 states have (on average 2.5) internal successors, (20), 8 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:38:35,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-14 15:38:35,185 INFO L93 Difference]: Finished difference Result 46 states and 53 transitions. [2022-07-14 15:38:35,186 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-07-14 15:38:35,186 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 46 states and 53 transitions. [2022-07-14 15:38:35,187 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-07-14 15:38:35,187 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 46 states to 46 states and 53 transitions. [2022-07-14 15:38:35,187 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 36 [2022-07-14 15:38:35,187 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 36 [2022-07-14 15:38:35,187 INFO L73 IsDeterministic]: Start isDeterministic. Operand 46 states and 53 transitions. [2022-07-14 15:38:35,188 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-14 15:38:35,188 INFO L369 hiAutomatonCegarLoop]: Abstraction has 46 states and 53 transitions. [2022-07-14 15:38:35,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states and 53 transitions. [2022-07-14 15:38:35,189 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2022-07-14 15:38:35,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 46 states have (on average 1.1521739130434783) internal successors, (53), 45 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:38:35,190 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 53 transitions. [2022-07-14 15:38:35,190 INFO L392 hiAutomatonCegarLoop]: Abstraction has 46 states and 53 transitions. [2022-07-14 15:38:35,190 INFO L374 stractBuchiCegarLoop]: Abstraction has 46 states and 53 transitions. [2022-07-14 15:38:35,190 INFO L287 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2022-07-14 15:38:35,190 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 46 states and 53 transitions. [2022-07-14 15:38:35,190 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-07-14 15:38:35,190 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-14 15:38:35,190 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-14 15:38:35,191 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 5, 5, 5, 5, 2, 1, 1, 1, 1, 1, 1, 1] [2022-07-14 15:38:35,191 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-07-14 15:38:35,191 INFO L752 eck$LassoCheckResult]: Stem: 1371#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 1372#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 1373#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1374#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1375#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1376#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1402#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1401#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1399#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1397#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1395#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1391#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1390#L44-3 assume !(main_~i~1#1 >= 0); 1377#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 1378#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1389#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1414#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1386#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1387#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1383#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1384#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1413#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1412#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1411#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1410#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1409#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1408#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1407#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 1388#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1369#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 1370#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1406#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1405#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1404#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1403#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1398#L33 [2022-07-14 15:38:35,191 INFO L754 eck$LassoCheckResult]: Loop: 1398#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 1400#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1393#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1398#L33 [2022-07-14 15:38:35,192 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:35,192 INFO L85 PathProgramCache]: Analyzing trace with hash -264183975, now seen corresponding path program 1 times [2022-07-14 15:38:35,192 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:35,192 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1663027073] [2022-07-14 15:38:35,192 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:35,192 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:35,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:35,214 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:38:35,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:35,234 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:38:35,234 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:35,234 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 4 times [2022-07-14 15:38:35,234 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:35,234 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1619658026] [2022-07-14 15:38:35,234 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:35,235 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:35,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:35,238 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:38:35,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:35,240 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:38:35,240 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:35,240 INFO L85 PathProgramCache]: Analyzing trace with hash -1924678077, now seen corresponding path program 1 times [2022-07-14 15:38:35,241 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:35,241 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [22552159] [2022-07-14 15:38:35,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:35,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:35,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-14 15:38:35,650 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 12 proven. 34 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2022-07-14 15:38:35,651 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-14 15:38:35,651 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [22552159] [2022-07-14 15:38:35,651 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [22552159] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-14 15:38:35,651 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1515470120] [2022-07-14 15:38:35,651 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:35,651 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-14 15:38:35,651 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-14 15:38:35,655 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-14 15:38:35,661 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-07-14 15:38:35,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-14 15:38:35,744 INFO L263 TraceCheckSpWp]: Trace formula consists of 237 conjuncts, 32 conjunts are in the unsatisfiable core [2022-07-14 15:38:35,747 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-14 15:38:35,788 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-07-14 15:38:35,789 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-07-14 15:38:35,824 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-07-14 15:38:35,841 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-07-14 15:38:35,871 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-07-14 15:38:35,888 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-07-14 15:38:35,907 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-07-14 15:38:36,135 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-14 15:38:36,136 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-14 15:38:36,137 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-14 15:38:36,138 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 36 [2022-07-14 15:38:36,290 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 13 [2022-07-14 15:38:36,314 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 12 proven. 34 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2022-07-14 15:38:36,314 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-14 15:38:36,545 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_264 (Array Int Int))) (let ((.cse0 (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#array~1#1.base| v_ArrVal_264) |c_~#array~0.base|))) (<= (select .cse0 (+ |c_~#array~0.offset| 4)) (select .cse0 (+ |c_~#array~0.offset| 12))))) is different from false [2022-07-14 15:38:36,602 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 12 proven. 25 refuted. 0 times theorem prover too weak. 38 trivial. 9 not checked. [2022-07-14 15:38:36,602 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1515470120] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-14 15:38:36,602 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-14 15:38:36,602 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 10, 10] total 30 [2022-07-14 15:38:36,602 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1813935379] [2022-07-14 15:38:36,602 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-14 15:38:36,661 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-14 15:38:36,661 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2022-07-14 15:38:36,661 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=95, Invalid=778, Unknown=1, NotChecked=56, Total=930 [2022-07-14 15:38:36,662 INFO L87 Difference]: Start difference. First operand 46 states and 53 transitions. cyclomatic complexity: 10 Second operand has 31 states, 31 states have (on average 2.096774193548387) internal successors, (65), 30 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:38:37,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-14 15:38:37,448 INFO L93 Difference]: Finished difference Result 68 states and 78 transitions. [2022-07-14 15:38:37,448 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-07-14 15:38:37,449 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 68 states and 78 transitions. [2022-07-14 15:38:37,450 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 15 [2022-07-14 15:38:37,450 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 68 states to 68 states and 78 transitions. [2022-07-14 15:38:37,450 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 58 [2022-07-14 15:38:37,450 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 58 [2022-07-14 15:38:37,450 INFO L73 IsDeterministic]: Start isDeterministic. Operand 68 states and 78 transitions. [2022-07-14 15:38:37,451 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-14 15:38:37,451 INFO L369 hiAutomatonCegarLoop]: Abstraction has 68 states and 78 transitions. [2022-07-14 15:38:37,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68 states and 78 transitions. [2022-07-14 15:38:37,453 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68 to 59. [2022-07-14 15:38:37,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59 states, 59 states have (on average 1.1355932203389831) internal successors, (67), 58 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:38:37,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 67 transitions. [2022-07-14 15:38:37,454 INFO L392 hiAutomatonCegarLoop]: Abstraction has 59 states and 67 transitions. [2022-07-14 15:38:37,454 INFO L374 stractBuchiCegarLoop]: Abstraction has 59 states and 67 transitions. [2022-07-14 15:38:37,454 INFO L287 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2022-07-14 15:38:37,454 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 59 states and 67 transitions. [2022-07-14 15:38:37,455 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-07-14 15:38:37,455 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-14 15:38:37,455 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-14 15:38:37,456 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 5, 5, 5, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-14 15:38:37,456 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-07-14 15:38:37,456 INFO L752 eck$LassoCheckResult]: Stem: 1766#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 1767#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 1768#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1769#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1770#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1771#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1799#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1798#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1797#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1796#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1794#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1790#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1789#L44-3 assume !(main_~i~1#1 >= 0); 1772#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 1773#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1817#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1816#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1815#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1814#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1813#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1812#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1811#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1809#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 1810#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1822#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1804#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1805#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1800#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 1801#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1764#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 1765#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1821#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1818#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1819#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1783#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1784#L33 [2022-07-14 15:38:37,456 INFO L754 eck$LassoCheckResult]: Loop: 1784#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 1779#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1792#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1784#L33 [2022-07-14 15:38:37,457 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:37,457 INFO L85 PathProgramCache]: Analyzing trace with hash 322622039, now seen corresponding path program 2 times [2022-07-14 15:38:37,457 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:37,457 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [176745773] [2022-07-14 15:38:37,457 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:37,457 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:37,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-14 15:38:37,810 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 25 proven. 16 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2022-07-14 15:38:37,811 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-14 15:38:37,811 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [176745773] [2022-07-14 15:38:37,811 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [176745773] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-14 15:38:37,811 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1975804570] [2022-07-14 15:38:37,811 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-07-14 15:38:37,811 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-14 15:38:37,811 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-14 15:38:37,816 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-14 15:38:37,817 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-07-14 15:38:37,901 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-07-14 15:38:37,901 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-07-14 15:38:37,903 INFO L263 TraceCheckSpWp]: Trace formula consists of 223 conjuncts, 30 conjunts are in the unsatisfiable core [2022-07-14 15:38:37,905 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-14 15:38:37,971 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-07-14 15:38:37,971 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-07-14 15:38:38,001 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-07-14 15:38:38,025 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-07-14 15:38:38,043 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-07-14 15:38:38,065 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-07-14 15:38:38,082 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-07-14 15:38:38,291 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-14 15:38:38,295 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 13 [2022-07-14 15:38:38,319 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 25 proven. 16 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2022-07-14 15:38:38,319 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-14 15:38:38,467 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_302 (Array Int Int))) (let ((.cse0 (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#array~1#1.base| v_ArrVal_302) |c_~#array~0.base|))) (<= (select .cse0 |c_~#array~0.offset|) (select .cse0 (+ |c_~#array~0.offset| 12))))) is different from false [2022-07-14 15:38:38,520 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 25 proven. 7 refuted. 0 times theorem prover too weak. 26 trivial. 9 not checked. [2022-07-14 15:38:38,521 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1975804570] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-14 15:38:38,521 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-14 15:38:38,521 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 9] total 27 [2022-07-14 15:38:38,521 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [432279403] [2022-07-14 15:38:38,521 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-14 15:38:38,522 INFO L757 eck$LassoCheckResult]: stem already infeasible [2022-07-14 15:38:38,522 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:38,522 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 5 times [2022-07-14 15:38:38,522 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:38,522 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [107748757] [2022-07-14 15:38:38,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:38,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:38,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:38,526 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:38:38,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:38,528 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:38:38,590 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-14 15:38:38,591 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2022-07-14 15:38:38,592 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=106, Invalid=599, Unknown=1, NotChecked=50, Total=756 [2022-07-14 15:38:38,592 INFO L87 Difference]: Start difference. First operand 59 states and 67 transitions. cyclomatic complexity: 11 Second operand has 28 states, 28 states have (on average 2.0714285714285716) internal successors, (58), 27 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:38:39,055 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-14 15:38:39,055 INFO L93 Difference]: Finished difference Result 58 states and 64 transitions. [2022-07-14 15:38:39,059 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-07-14 15:38:39,059 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 58 states and 64 transitions. [2022-07-14 15:38:39,060 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 11 [2022-07-14 15:38:39,061 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 58 states to 58 states and 64 transitions. [2022-07-14 15:38:39,061 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 48 [2022-07-14 15:38:39,061 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 48 [2022-07-14 15:38:39,061 INFO L73 IsDeterministic]: Start isDeterministic. Operand 58 states and 64 transitions. [2022-07-14 15:38:39,061 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-14 15:38:39,061 INFO L369 hiAutomatonCegarLoop]: Abstraction has 58 states and 64 transitions. [2022-07-14 15:38:39,062 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states and 64 transitions. [2022-07-14 15:38:39,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 56. [2022-07-14 15:38:39,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 56 states have (on average 1.1071428571428572) internal successors, (62), 55 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:38:39,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 62 transitions. [2022-07-14 15:38:39,064 INFO L392 hiAutomatonCegarLoop]: Abstraction has 56 states and 62 transitions. [2022-07-14 15:38:39,064 INFO L374 stractBuchiCegarLoop]: Abstraction has 56 states and 62 transitions. [2022-07-14 15:38:39,064 INFO L287 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2022-07-14 15:38:39,065 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 56 states and 62 transitions. [2022-07-14 15:38:39,065 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-07-14 15:38:39,065 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-14 15:38:39,065 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-14 15:38:39,066 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 5, 5, 5, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-14 15:38:39,066 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-07-14 15:38:39,066 INFO L752 eck$LassoCheckResult]: Stem: 2135#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 2136#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 2137#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2138#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2139#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2140#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2166#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2165#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2163#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2161#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2159#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2155#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2154#L44-3 assume !(main_~i~1#1 >= 0); 2141#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 2142#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2188#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2187#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2150#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2151#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2186#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2185#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2184#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2183#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2182#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2181#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2180#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 2178#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2177#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 2153#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2133#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 2134#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2152#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2147#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2148#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2170#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2162#L33 [2022-07-14 15:38:39,066 INFO L754 eck$LassoCheckResult]: Loop: 2162#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 2164#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2157#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2162#L33 [2022-07-14 15:38:39,067 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:39,067 INFO L85 PathProgramCache]: Analyzing trace with hash 128843035, now seen corresponding path program 3 times [2022-07-14 15:38:39,067 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:39,067 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [167714311] [2022-07-14 15:38:39,067 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:39,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:39,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-14 15:38:39,478 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 23 proven. 24 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2022-07-14 15:38:39,478 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-14 15:38:39,478 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [167714311] [2022-07-14 15:38:39,478 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [167714311] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-14 15:38:39,478 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1836461767] [2022-07-14 15:38:39,478 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-07-14 15:38:39,478 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-14 15:38:39,479 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-14 15:38:39,481 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-14 15:38:39,485 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-07-14 15:38:39,568 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2022-07-14 15:38:39,569 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-07-14 15:38:39,570 INFO L263 TraceCheckSpWp]: Trace formula consists of 223 conjuncts, 33 conjunts are in the unsatisfiable core [2022-07-14 15:38:39,574 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-14 15:38:39,614 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-07-14 15:38:39,614 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-07-14 15:38:39,643 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-07-14 15:38:39,671 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-07-14 15:38:39,690 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-07-14 15:38:39,724 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-07-14 15:38:39,757 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-07-14 15:38:39,976 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-14 15:38:39,976 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 31 treesize of output 33 [2022-07-14 15:38:40,166 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 19 proven. 19 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2022-07-14 15:38:40,166 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-14 15:38:40,455 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_337 (Array Int Int)) (|ULTIMATE.start_SelectionSort_~i~0#1| Int)) (or (not (< |ULTIMATE.start_SelectionSort_~i~0#1| c_~n~0)) (< (+ |ULTIMATE.start_SelectionSort_~i~0#1| 1) c_~n~0) (let ((.cse0 (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#array~1#1.base| v_ArrVal_337) |c_~#array~0.base|))) (<= (select .cse0 |c_~#array~0.offset|) (select .cse0 (+ (* |ULTIMATE.start_SelectionSort_~i~0#1| 4) |c_~#array~0.offset|)))))) is different from false [2022-07-14 15:38:40,583 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 19 proven. 10 refuted. 0 times theorem prover too weak. 29 trivial. 9 not checked. [2022-07-14 15:38:40,583 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1836461767] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-14 15:38:40,584 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-14 15:38:40,584 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 9, 9] total 29 [2022-07-14 15:38:40,584 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1380167921] [2022-07-14 15:38:40,584 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-14 15:38:40,584 INFO L757 eck$LassoCheckResult]: stem already infeasible [2022-07-14 15:38:40,585 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:40,585 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 6 times [2022-07-14 15:38:40,585 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:40,585 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1458960762] [2022-07-14 15:38:40,585 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:40,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:40,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:40,588 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:38:40,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:40,591 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:38:40,654 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-14 15:38:40,655 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2022-07-14 15:38:40,655 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=723, Unknown=1, NotChecked=54, Total=870 [2022-07-14 15:38:40,655 INFO L87 Difference]: Start difference. First operand 56 states and 62 transitions. cyclomatic complexity: 9 Second operand has 30 states, 30 states have (on average 1.9666666666666666) internal successors, (59), 29 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:38:41,693 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-14 15:38:41,694 INFO L93 Difference]: Finished difference Result 51 states and 57 transitions. [2022-07-14 15:38:41,694 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-07-14 15:38:41,696 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 57 transitions. [2022-07-14 15:38:41,697 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-07-14 15:38:41,697 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 57 transitions. [2022-07-14 15:38:41,697 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 41 [2022-07-14 15:38:41,698 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 41 [2022-07-14 15:38:41,699 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 57 transitions. [2022-07-14 15:38:41,699 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-14 15:38:41,699 INFO L369 hiAutomatonCegarLoop]: Abstraction has 51 states and 57 transitions. [2022-07-14 15:38:41,699 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 57 transitions. [2022-07-14 15:38:41,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 47. [2022-07-14 15:38:41,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 47 states have (on average 1.0851063829787233) internal successors, (51), 46 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:38:41,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 51 transitions. [2022-07-14 15:38:41,712 INFO L392 hiAutomatonCegarLoop]: Abstraction has 47 states and 51 transitions. [2022-07-14 15:38:41,712 INFO L374 stractBuchiCegarLoop]: Abstraction has 47 states and 51 transitions. [2022-07-14 15:38:41,712 INFO L287 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2022-07-14 15:38:41,712 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 47 states and 51 transitions. [2022-07-14 15:38:41,713 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-07-14 15:38:41,713 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-14 15:38:41,713 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-14 15:38:41,714 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 5, 5, 5, 2, 1, 1, 1, 1, 1, 1, 1] [2022-07-14 15:38:41,714 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-07-14 15:38:41,714 INFO L752 eck$LassoCheckResult]: Stem: 2517#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 2518#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 2519#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2520#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2521#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2522#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2546#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2545#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2544#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2543#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2541#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2537#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2536#L44-3 assume !(main_~i~1#1 >= 0); 2523#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 2524#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2559#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2558#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2557#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2556#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2555#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2554#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2553#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2552#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2551#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2550#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2549#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2548#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2547#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 2534#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2515#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 2516#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2535#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2561#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2532#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2533#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2529#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2530#L32-2 [2022-07-14 15:38:41,714 INFO L754 eck$LassoCheckResult]: Loop: 2530#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2539#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2560#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 2530#L32-2 [2022-07-14 15:38:41,714 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:41,714 INFO L85 PathProgramCache]: Analyzing trace with hash 400231404, now seen corresponding path program 2 times [2022-07-14 15:38:41,715 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:41,715 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [190498536] [2022-07-14 15:38:41,715 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:41,715 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:41,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:41,750 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:38:41,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:41,787 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:38:41,788 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:41,788 INFO L85 PathProgramCache]: Analyzing trace with hash 68297, now seen corresponding path program 7 times [2022-07-14 15:38:41,788 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:41,788 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1347518529] [2022-07-14 15:38:41,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:41,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:41,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:41,792 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:38:41,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:38:41,797 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:38:41,797 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:38:41,797 INFO L85 PathProgramCache]: Analyzing trace with hash 464581374, now seen corresponding path program 4 times [2022-07-14 15:38:41,797 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:38:41,797 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [598511569] [2022-07-14 15:38:41,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:38:41,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:38:41,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-14 15:38:42,221 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2022-07-14 15:38:42,221 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-14 15:38:42,221 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [598511569] [2022-07-14 15:38:42,221 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [598511569] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-14 15:38:42,221 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1550909711] [2022-07-14 15:38:42,221 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-07-14 15:38:42,221 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-14 15:38:42,221 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-14 15:38:42,223 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-14 15:38:42,223 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-07-14 15:38:42,354 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-07-14 15:38:42,354 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-07-14 15:38:42,356 INFO L263 TraceCheckSpWp]: Trace formula consists of 238 conjuncts, 46 conjunts are in the unsatisfiable core [2022-07-14 15:38:42,358 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-14 15:38:42,392 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-07-14 15:38:42,392 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-07-14 15:38:42,441 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-07-14 15:38:42,459 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-07-14 15:38:42,474 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-07-14 15:38:42,509 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-07-14 15:38:42,527 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-07-14 15:38:42,928 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-14 15:38:42,928 INFO L173 IndexEqualityManager]: detected equality via solver [2022-07-14 15:38:42,929 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-14 15:38:42,929 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-07-14 15:38:42,930 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 42 [2022-07-14 15:38:43,207 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-07-14 15:38:43,208 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 44 treesize of output 36 [2022-07-14 15:38:43,258 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 74 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-07-14 15:38:43,258 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-14 15:39:00,318 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_389 Int) (v_ArrVal_387 (Array Int Int)) (|v_ULTIMATE.start_SelectionSort_~rh~0#1_44| Int)) (let ((.cse1 (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#array~1#1.base| v_ArrVal_387) |c_~#array~0.base|))) (let ((.cse2 (select (store .cse1 |c_~#array~0.offset| v_ArrVal_389) (+ |c_~#array~0.offset| (* |v_ULTIMATE.start_SelectionSort_~rh~0#1_44| 4)))) (.cse0 (select .cse1 (+ 16 |c_~#array~0.offset|)))) (or (< .cse0 (select .cse1 |c_~#array~0.offset|)) (< (select .cse1 (+ |c_~#array~0.offset| 8)) .cse2) (<= .cse2 .cse0))))) is different from false [2022-07-14 15:39:00,462 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 7 proven. 58 refuted. 0 times theorem prover too weak. 16 trivial. 9 not checked. [2022-07-14 15:39:00,463 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1550909711] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-14 15:39:00,463 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-14 15:39:00,463 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 18, 18] total 48 [2022-07-14 15:39:00,463 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1149734557] [2022-07-14 15:39:00,463 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-14 15:39:00,508 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-14 15:39:00,509 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2022-07-14 15:39:00,509 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=183, Invalid=2169, Unknown=4, NotChecked=94, Total=2450 [2022-07-14 15:39:00,510 INFO L87 Difference]: Start difference. First operand 47 states and 51 transitions. cyclomatic complexity: 7 Second operand has 50 states, 49 states have (on average 1.816326530612245) internal successors, (89), 49 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:39:02,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-14 15:39:02,522 INFO L93 Difference]: Finished difference Result 58 states and 65 transitions. [2022-07-14 15:39:02,523 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2022-07-14 15:39:02,523 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 58 states and 65 transitions. [2022-07-14 15:39:02,524 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 15 [2022-07-14 15:39:02,524 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 58 states to 58 states and 65 transitions. [2022-07-14 15:39:02,524 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 48 [2022-07-14 15:39:02,525 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 48 [2022-07-14 15:39:02,525 INFO L73 IsDeterministic]: Start isDeterministic. Operand 58 states and 65 transitions. [2022-07-14 15:39:02,525 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-14 15:39:02,525 INFO L369 hiAutomatonCegarLoop]: Abstraction has 58 states and 65 transitions. [2022-07-14 15:39:02,525 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states and 65 transitions. [2022-07-14 15:39:02,527 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 50. [2022-07-14 15:39:02,527 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 50 states have (on average 1.1) internal successors, (55), 49 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:39:02,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 55 transitions. [2022-07-14 15:39:02,527 INFO L392 hiAutomatonCegarLoop]: Abstraction has 50 states and 55 transitions. [2022-07-14 15:39:02,527 INFO L374 stractBuchiCegarLoop]: Abstraction has 50 states and 55 transitions. [2022-07-14 15:39:02,528 INFO L287 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2022-07-14 15:39:02,528 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 50 states and 55 transitions. [2022-07-14 15:39:02,528 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-07-14 15:39:02,528 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-14 15:39:02,528 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-14 15:39:02,529 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 6, 5, 5, 2, 2, 1, 1, 1, 1, 1, 1] [2022-07-14 15:39:02,529 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-07-14 15:39:02,529 INFO L752 eck$LassoCheckResult]: Stem: 2961#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 2962#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 2963#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2964#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2965#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2966#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2990#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2989#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2988#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2987#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2985#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2982#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2981#L44-3 assume !(main_~i~1#1 >= 0); 2967#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 2968#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3003#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3002#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3001#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3000#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2999#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2998#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2997#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2996#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2995#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2994#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2993#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2992#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2991#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 2979#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2959#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 2960#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2980#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3006#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3005#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2977#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2978#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3008#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3007#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 2986#L32-4 [2022-07-14 15:39:02,530 INFO L754 eck$LassoCheckResult]: Loop: 2986#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2984#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 2983#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2976#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 2986#L32-4 [2022-07-14 15:39:02,530 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:39:02,530 INFO L85 PathProgramCache]: Analyzing trace with hash -1924676157, now seen corresponding path program 3 times [2022-07-14 15:39:02,530 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:39:02,530 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [905546663] [2022-07-14 15:39:02,530 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:39:02,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:39:02,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-14 15:39:02,592 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2022-07-14 15:39:02,593 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-14 15:39:02,593 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [905546663] [2022-07-14 15:39:02,593 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [905546663] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-14 15:39:02,593 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1359196577] [2022-07-14 15:39:02,593 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-07-14 15:39:02,593 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-14 15:39:02,593 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-14 15:39:02,603 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-14 15:39:02,615 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-07-14 15:39:02,674 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-07-14 15:39:02,674 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-07-14 15:39:02,675 INFO L263 TraceCheckSpWp]: Trace formula consists of 150 conjuncts, 7 conjunts are in the unsatisfiable core [2022-07-14 15:39:02,680 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-14 15:39:02,781 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2022-07-14 15:39:02,781 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-14 15:39:02,830 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2022-07-14 15:39:02,830 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1359196577] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-14 15:39:02,830 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-14 15:39:02,830 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 12 [2022-07-14 15:39:02,830 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1024486117] [2022-07-14 15:39:02,830 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-14 15:39:02,831 INFO L757 eck$LassoCheckResult]: stem already infeasible [2022-07-14 15:39:02,831 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:39:02,831 INFO L85 PathProgramCache]: Analyzing trace with hash 2248553, now seen corresponding path program 6 times [2022-07-14 15:39:02,831 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:39:02,831 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [417746083] [2022-07-14 15:39:02,831 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:39:02,831 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:39:02,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:39:02,836 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:39:02,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:39:02,840 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:39:02,917 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-14 15:39:02,918 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-07-14 15:39:02,918 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=130, Unknown=0, NotChecked=0, Total=182 [2022-07-14 15:39:02,918 INFO L87 Difference]: Start difference. First operand 50 states and 55 transitions. cyclomatic complexity: 8 Second operand has 14 states, 13 states have (on average 3.4615384615384617) internal successors, (45), 13 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:39:03,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-14 15:39:03,064 INFO L93 Difference]: Finished difference Result 56 states and 62 transitions. [2022-07-14 15:39:03,064 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-07-14 15:39:03,064 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 56 states and 62 transitions. [2022-07-14 15:39:03,065 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-07-14 15:39:03,065 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 56 states to 56 states and 62 transitions. [2022-07-14 15:39:03,065 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 46 [2022-07-14 15:39:03,065 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 46 [2022-07-14 15:39:03,066 INFO L73 IsDeterministic]: Start isDeterministic. Operand 56 states and 62 transitions. [2022-07-14 15:39:03,066 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-14 15:39:03,066 INFO L369 hiAutomatonCegarLoop]: Abstraction has 56 states and 62 transitions. [2022-07-14 15:39:03,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states and 62 transitions. [2022-07-14 15:39:03,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 50. [2022-07-14 15:39:03,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 50 states have (on average 1.08) internal successors, (54), 49 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:39:03,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 54 transitions. [2022-07-14 15:39:03,068 INFO L392 hiAutomatonCegarLoop]: Abstraction has 50 states and 54 transitions. [2022-07-14 15:39:03,068 INFO L374 stractBuchiCegarLoop]: Abstraction has 50 states and 54 transitions. [2022-07-14 15:39:03,068 INFO L287 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2022-07-14 15:39:03,068 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 50 states and 54 transitions. [2022-07-14 15:39:03,068 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-07-14 15:39:03,068 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-14 15:39:03,068 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-14 15:39:03,069 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 7, 6, 5, 5, 2, 1, 1, 1, 1, 1, 1, 1] [2022-07-14 15:39:03,069 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-07-14 15:39:03,069 INFO L752 eck$LassoCheckResult]: Stem: 3324#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 3325#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 3326#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3327#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3328#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3329#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3356#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3354#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3352#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3350#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3349#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3346#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3345#L44-3 assume !(main_~i~1#1 >= 0); 3330#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 3331#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3367#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3366#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3365#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3364#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3363#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3362#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3361#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3360#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3359#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3358#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3357#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3355#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3353#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 3351#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3322#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 3323#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3344#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3371#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3339#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3340#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3369#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3370#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3341#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3336#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3337#L32-2 [2022-07-14 15:39:03,069 INFO L754 eck$LassoCheckResult]: Loop: 3337#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3348#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3368#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 3337#L32-2 [2022-07-14 15:39:03,069 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:39:03,070 INFO L85 PathProgramCache]: Analyzing trace with hash 464581376, now seen corresponding path program 4 times [2022-07-14 15:39:03,070 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:39:03,070 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [315476129] [2022-07-14 15:39:03,070 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:39:03,070 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:39:03,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:39:03,089 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:39:03,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:39:03,111 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:39:03,111 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:39:03,112 INFO L85 PathProgramCache]: Analyzing trace with hash 68297, now seen corresponding path program 8 times [2022-07-14 15:39:03,112 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:39:03,112 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1621020678] [2022-07-14 15:39:03,112 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:39:03,112 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:39:03,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:39:03,118 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:39:03,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:39:03,123 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:39:03,124 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:39:03,124 INFO L85 PathProgramCache]: Analyzing trace with hash 1959183210, now seen corresponding path program 5 times [2022-07-14 15:39:03,124 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:39:03,124 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1536290669] [2022-07-14 15:39:03,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:39:03,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:39:03,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-14 15:39:03,221 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 19 proven. 45 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2022-07-14 15:39:03,221 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-14 15:39:03,221 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1536290669] [2022-07-14 15:39:03,221 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1536290669] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-14 15:39:03,222 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [584136959] [2022-07-14 15:39:03,222 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-07-14 15:39:03,222 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-14 15:39:03,222 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-14 15:39:03,224 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-14 15:39:03,225 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2022-07-14 15:39:03,332 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2022-07-14 15:39:03,332 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-07-14 15:39:03,333 INFO L263 TraceCheckSpWp]: Trace formula consists of 252 conjuncts, 12 conjunts are in the unsatisfiable core [2022-07-14 15:39:03,334 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-14 15:39:03,418 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 20 proven. 66 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-07-14 15:39:03,418 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-14 15:39:03,467 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 20 proven. 66 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-07-14 15:39:03,467 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [584136959] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-14 15:39:03,467 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-14 15:39:03,467 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 13, 13] total 15 [2022-07-14 15:39:03,467 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [638427630] [2022-07-14 15:39:03,467 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-14 15:39:03,518 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-14 15:39:03,518 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-07-14 15:39:03,518 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=164, Unknown=0, NotChecked=0, Total=210 [2022-07-14 15:39:03,518 INFO L87 Difference]: Start difference. First operand 50 states and 54 transitions. cyclomatic complexity: 7 Second operand has 15 states, 15 states have (on average 3.1333333333333333) internal successors, (47), 15 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:39:03,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-14 15:39:03,818 INFO L93 Difference]: Finished difference Result 79 states and 89 transitions. [2022-07-14 15:39:03,818 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-07-14 15:39:03,819 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 79 states and 89 transitions. [2022-07-14 15:39:03,821 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 16 [2022-07-14 15:39:03,821 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 79 states to 79 states and 89 transitions. [2022-07-14 15:39:03,821 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 69 [2022-07-14 15:39:03,821 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 69 [2022-07-14 15:39:03,821 INFO L73 IsDeterministic]: Start isDeterministic. Operand 79 states and 89 transitions. [2022-07-14 15:39:03,822 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-14 15:39:03,822 INFO L369 hiAutomatonCegarLoop]: Abstraction has 79 states and 89 transitions. [2022-07-14 15:39:03,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states and 89 transitions. [2022-07-14 15:39:03,823 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 66. [2022-07-14 15:39:03,823 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 66 states, 66 states have (on average 1.1515151515151516) internal successors, (76), 65 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:39:03,824 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 76 transitions. [2022-07-14 15:39:03,824 INFO L392 hiAutomatonCegarLoop]: Abstraction has 66 states and 76 transitions. [2022-07-14 15:39:03,824 INFO L374 stractBuchiCegarLoop]: Abstraction has 66 states and 76 transitions. [2022-07-14 15:39:03,824 INFO L287 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2022-07-14 15:39:03,824 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 66 states and 76 transitions. [2022-07-14 15:39:03,824 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2022-07-14 15:39:03,824 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-14 15:39:03,824 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-14 15:39:03,825 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 7, 7, 5, 5, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2022-07-14 15:39:03,825 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-07-14 15:39:03,825 INFO L752 eck$LassoCheckResult]: Stem: 3751#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 3752#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 3753#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3754#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3755#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3756#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3778#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3777#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3776#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3775#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3774#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3773#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3772#L44-3 assume !(main_~i~1#1 >= 0); 3757#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 3758#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3794#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3793#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3792#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3791#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3790#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3789#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3788#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3787#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3786#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3785#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3784#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3783#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3782#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 3781#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3749#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 3750#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3771#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3801#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3797#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3798#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3799#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3800#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3768#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3763#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3764#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3811#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 3769#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3770#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 3780#L30-3 assume !(SelectionSort_~lh~0#1 < ~n~0); 3765#L26 assume { :end_inline_SelectionSort } true;main_~i~1#1 := 0; 3762#L49-3 [2022-07-14 15:39:03,826 INFO L754 eck$LassoCheckResult]: Loop: 3762#L49-3 assume !!(main_~i~1#1 < 5);call main_#t~mem9#1 := read~int(main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4);assume { :begin_inline___VERIFIER_assert } true;__VERIFIER_assert_#in~cond#1 := (if main_#t~mem9#1 == main_~i~1#1 then 1 else 0);havoc __VERIFIER_assert_~cond#1;__VERIFIER_assert_~cond#1 := __VERIFIER_assert_#in~cond#1; 3759#L15 assume !(0 == __VERIFIER_assert_~cond#1); 3760#L15-2 assume { :end_inline___VERIFIER_assert } true;havoc main_#t~mem9#1; 3761#L49-2 main_#t~post8#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post8#1;havoc main_#t~post8#1; 3762#L49-3 [2022-07-14 15:39:03,826 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:39:03,826 INFO L85 PathProgramCache]: Analyzing trace with hash 1714859028, now seen corresponding path program 1 times [2022-07-14 15:39:03,826 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:39:03,826 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1013127659] [2022-07-14 15:39:03,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:39:03,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:39:03,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-14 15:39:03,893 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2022-07-14 15:39:03,893 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-14 15:39:03,894 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1013127659] [2022-07-14 15:39:03,894 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1013127659] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-14 15:39:03,894 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1830108343] [2022-07-14 15:39:03,894 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:39:03,894 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-14 15:39:03,894 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-14 15:39:03,899 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-14 15:39:03,923 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2022-07-14 15:39:03,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-14 15:39:03,988 INFO L263 TraceCheckSpWp]: Trace formula consists of 258 conjuncts, 5 conjunts are in the unsatisfiable core [2022-07-14 15:39:03,990 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-14 15:39:04,085 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2022-07-14 15:39:04,085 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-14 15:39:04,147 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2022-07-14 15:39:04,147 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1830108343] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-14 15:39:04,147 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-14 15:39:04,147 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 11 [2022-07-14 15:39:04,148 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1560804896] [2022-07-14 15:39:04,148 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-14 15:39:04,148 INFO L757 eck$LassoCheckResult]: stem already infeasible [2022-07-14 15:39:04,148 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:39:04,148 INFO L85 PathProgramCache]: Analyzing trace with hash 2685258, now seen corresponding path program 1 times [2022-07-14 15:39:04,149 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:39:04,149 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [373325008] [2022-07-14 15:39:04,149 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:39:04,149 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:39:04,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:39:04,154 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:39:04,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:39:04,160 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:39:04,218 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-14 15:39:04,219 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-07-14 15:39:04,219 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132 [2022-07-14 15:39:04,219 INFO L87 Difference]: Start difference. First operand 66 states and 76 transitions. cyclomatic complexity: 13 Second operand has 12 states, 12 states have (on average 4.916666666666667) internal successors, (59), 11 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:39:04,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-14 15:39:04,280 INFO L93 Difference]: Finished difference Result 73 states and 81 transitions. [2022-07-14 15:39:04,280 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-07-14 15:39:04,281 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 73 states and 81 transitions. [2022-07-14 15:39:04,281 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2022-07-14 15:39:04,282 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 73 states to 73 states and 81 transitions. [2022-07-14 15:39:04,282 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 63 [2022-07-14 15:39:04,282 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 63 [2022-07-14 15:39:04,282 INFO L73 IsDeterministic]: Start isDeterministic. Operand 73 states and 81 transitions. [2022-07-14 15:39:04,282 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-14 15:39:04,282 INFO L369 hiAutomatonCegarLoop]: Abstraction has 73 states and 81 transitions. [2022-07-14 15:39:04,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states and 81 transitions. [2022-07-14 15:39:04,284 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 73. [2022-07-14 15:39:04,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73 states, 73 states have (on average 1.1095890410958904) internal successors, (81), 72 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:39:04,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 81 transitions. [2022-07-14 15:39:04,284 INFO L392 hiAutomatonCegarLoop]: Abstraction has 73 states and 81 transitions. [2022-07-14 15:39:04,284 INFO L374 stractBuchiCegarLoop]: Abstraction has 73 states and 81 transitions. [2022-07-14 15:39:04,284 INFO L287 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2022-07-14 15:39:04,284 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 73 states and 81 transitions. [2022-07-14 15:39:04,285 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2022-07-14 15:39:04,285 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-14 15:39:04,285 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-14 15:39:04,286 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 7, 7, 5, 5, 5, 4, 4, 4, 1, 1, 1, 1] [2022-07-14 15:39:04,286 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-07-14 15:39:04,286 INFO L752 eck$LassoCheckResult]: Stem: 4173#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 4174#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 4175#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4176#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4177#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4178#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4203#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4201#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4199#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4198#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4196#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4192#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4191#L44-3 assume !(main_~i~1#1 >= 0); 4179#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 4180#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4189#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4185#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4186#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4188#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4243#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4241#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4239#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4237#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4235#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4233#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4231#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4229#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4227#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 4190#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4171#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4172#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4242#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4240#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4238#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4236#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4234#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4232#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4230#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4228#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4226#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4225#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 4224#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4223#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4221#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4216#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 4214#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4212#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4210#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4205#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 4204#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4202#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4200#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4194#L32-3 [2022-07-14 15:39:04,286 INFO L754 eck$LassoCheckResult]: Loop: 4194#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 4197#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4195#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4193#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4194#L32-3 [2022-07-14 15:39:04,286 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:39:04,286 INFO L85 PathProgramCache]: Analyzing trace with hash 1550869743, now seen corresponding path program 5 times [2022-07-14 15:39:04,286 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:39:04,286 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [122103441] [2022-07-14 15:39:04,286 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:39:04,286 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:39:04,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-14 15:39:04,381 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 24 proven. 58 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2022-07-14 15:39:04,382 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-14 15:39:04,382 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [122103441] [2022-07-14 15:39:04,382 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [122103441] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-14 15:39:04,383 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [569110243] [2022-07-14 15:39:04,383 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-07-14 15:39:04,383 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-14 15:39:04,383 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-14 15:39:04,388 INFO L229 MonitoredProcess]: Starting monitored process 27 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-14 15:39:04,390 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2022-07-14 15:39:04,483 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2022-07-14 15:39:04,484 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-07-14 15:39:04,485 INFO L263 TraceCheckSpWp]: Trace formula consists of 210 conjuncts, 12 conjunts are in the unsatisfiable core [2022-07-14 15:39:04,486 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-14 15:39:04,548 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 82 proven. 21 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2022-07-14 15:39:04,549 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-07-14 15:39:04,615 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 89 proven. 4 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2022-07-14 15:39:04,615 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [569110243] provided 0 perfect and 2 imperfect interpolant sequences [2022-07-14 15:39:04,615 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-07-14 15:39:04,616 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 10, 8] total 16 [2022-07-14 15:39:04,616 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [67045106] [2022-07-14 15:39:04,616 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-07-14 15:39:04,616 INFO L757 eck$LassoCheckResult]: stem already infeasible [2022-07-14 15:39:04,616 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:39:04,616 INFO L85 PathProgramCache]: Analyzing trace with hash 1859993, now seen corresponding path program 7 times [2022-07-14 15:39:04,616 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:39:04,616 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1940954935] [2022-07-14 15:39:04,617 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:39:04,617 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:39:04,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:39:04,620 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:39:04,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:39:04,623 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:39:04,702 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-14 15:39:04,702 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-07-14 15:39:04,702 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=178, Unknown=0, NotChecked=0, Total=240 [2022-07-14 15:39:04,703 INFO L87 Difference]: Start difference. First operand 73 states and 81 transitions. cyclomatic complexity: 11 Second operand has 16 states, 16 states have (on average 4.125) internal successors, (66), 16 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:39:05,039 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-14 15:39:05,040 INFO L93 Difference]: Finished difference Result 70 states and 75 transitions. [2022-07-14 15:39:05,040 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-07-14 15:39:05,040 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 70 states and 75 transitions. [2022-07-14 15:39:05,041 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2022-07-14 15:39:05,041 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 70 states to 70 states and 75 transitions. [2022-07-14 15:39:05,041 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 60 [2022-07-14 15:39:05,042 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 60 [2022-07-14 15:39:05,042 INFO L73 IsDeterministic]: Start isDeterministic. Operand 70 states and 75 transitions. [2022-07-14 15:39:05,042 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-14 15:39:05,042 INFO L369 hiAutomatonCegarLoop]: Abstraction has 70 states and 75 transitions. [2022-07-14 15:39:05,042 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states and 75 transitions. [2022-07-14 15:39:05,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 70. [2022-07-14 15:39:05,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 70 states, 70 states have (on average 1.0714285714285714) internal successors, (75), 69 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:39:05,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 75 transitions. [2022-07-14 15:39:05,044 INFO L392 hiAutomatonCegarLoop]: Abstraction has 70 states and 75 transitions. [2022-07-14 15:39:05,044 INFO L374 stractBuchiCegarLoop]: Abstraction has 70 states and 75 transitions. [2022-07-14 15:39:05,044 INFO L287 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2022-07-14 15:39:05,044 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 70 states and 75 transitions. [2022-07-14 15:39:05,044 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2022-07-14 15:39:05,044 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-14 15:39:05,044 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-14 15:39:05,045 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 10, 5, 5, 5, 4, 4, 4, 1, 1, 1, 1] [2022-07-14 15:39:05,045 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-07-14 15:39:05,045 INFO L752 eck$LassoCheckResult]: Stem: 4681#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 4682#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 4683#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4684#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4685#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4686#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4711#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4709#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4707#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4706#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4704#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4700#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4699#L44-3 assume !(main_~i~1#1 >= 0); 4687#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 4688#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4697#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4693#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4694#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4696#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4747#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4745#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4743#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4741#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4739#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4737#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4735#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4733#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4729#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 4698#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4679#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4680#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4748#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4746#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4744#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4742#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4740#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4738#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4736#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4734#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4732#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4731#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 4730#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4728#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4727#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4726#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4725#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4724#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4723#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4722#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4721#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4720#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 4719#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4718#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4717#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4716#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4715#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4714#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4713#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 4712#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4710#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4708#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4702#L32-3 [2022-07-14 15:39:05,045 INFO L754 eck$LassoCheckResult]: Loop: 4702#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 4705#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4703#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4701#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4702#L32-3 [2022-07-14 15:39:05,046 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:39:05,046 INFO L85 PathProgramCache]: Analyzing trace with hash 673243683, now seen corresponding path program 6 times [2022-07-14 15:39:05,046 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:39:05,046 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1953524348] [2022-07-14 15:39:05,046 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:39:05,046 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:39:05,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:39:05,073 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:39:05,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:39:05,100 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:39:05,100 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:39:05,100 INFO L85 PathProgramCache]: Analyzing trace with hash 1859993, now seen corresponding path program 8 times [2022-07-14 15:39:05,101 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:39:05,101 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1803508745] [2022-07-14 15:39:05,101 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:39:05,101 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:39:05,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:39:05,104 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:39:05,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:39:05,107 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:39:05,107 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:39:05,107 INFO L85 PathProgramCache]: Analyzing trace with hash -1965333829, now seen corresponding path program 7 times [2022-07-14 15:39:05,107 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:39:05,107 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1796551367] [2022-07-14 15:39:05,107 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:39:05,107 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:39:05,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-14 15:39:05,178 INFO L134 CoverageAnalysis]: Checked inductivity of 255 backedges. 79 proven. 111 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2022-07-14 15:39:05,178 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-14 15:39:05,178 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1796551367] [2022-07-14 15:39:05,178 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1796551367] provided 0 perfect and 1 imperfect interpolant sequences [2022-07-14 15:39:05,178 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1833876960] [2022-07-14 15:39:05,178 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-07-14 15:39:05,178 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-07-14 15:39:05,179 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-14 15:39:05,183 INFO L229 MonitoredProcess]: Starting monitored process 28 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-07-14 15:39:05,189 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2022-07-14 15:39:05,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-14 15:39:05,284 INFO L263 TraceCheckSpWp]: Trace formula consists of 368 conjuncts, 8 conjunts are in the unsatisfiable core [2022-07-14 15:39:05,285 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-07-14 15:39:05,472 INFO L134 CoverageAnalysis]: Checked inductivity of 255 backedges. 190 proven. 0 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2022-07-14 15:39:05,472 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-07-14 15:39:05,473 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1833876960] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-14 15:39:05,473 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-07-14 15:39:05,473 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [7] total 13 [2022-07-14 15:39:05,473 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1605348558] [2022-07-14 15:39:05,473 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-14 15:39:05,547 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-14 15:39:05,548 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-07-14 15:39:05,548 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=75, Invalid=135, Unknown=0, NotChecked=0, Total=210 [2022-07-14 15:39:05,548 INFO L87 Difference]: Start difference. First operand 70 states and 75 transitions. cyclomatic complexity: 8 Second operand has 9 states, 8 states have (on average 4.875) internal successors, (39), 8 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:39:05,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-14 15:39:05,596 INFO L93 Difference]: Finished difference Result 70 states and 74 transitions. [2022-07-14 15:39:05,597 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-07-14 15:39:05,597 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 70 states and 74 transitions. [2022-07-14 15:39:05,597 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-07-14 15:39:05,599 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 70 states to 70 states and 74 transitions. [2022-07-14 15:39:05,599 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 60 [2022-07-14 15:39:05,599 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 60 [2022-07-14 15:39:05,600 INFO L73 IsDeterministic]: Start isDeterministic. Operand 70 states and 74 transitions. [2022-07-14 15:39:05,600 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-14 15:39:05,600 INFO L369 hiAutomatonCegarLoop]: Abstraction has 70 states and 74 transitions. [2022-07-14 15:39:05,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states and 74 transitions. [2022-07-14 15:39:05,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 70. [2022-07-14 15:39:05,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 70 states, 70 states have (on average 1.0571428571428572) internal successors, (74), 69 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-14 15:39:05,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 74 transitions. [2022-07-14 15:39:05,604 INFO L392 hiAutomatonCegarLoop]: Abstraction has 70 states and 74 transitions. [2022-07-14 15:39:05,604 INFO L374 stractBuchiCegarLoop]: Abstraction has 70 states and 74 transitions. [2022-07-14 15:39:05,604 INFO L287 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2022-07-14 15:39:05,604 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 70 states and 74 transitions. [2022-07-14 15:39:05,605 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-07-14 15:39:05,605 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-14 15:39:05,605 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-14 15:39:05,607 INFO L179 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 10, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1] [2022-07-14 15:39:05,607 INFO L180 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-07-14 15:39:05,609 INFO L752 eck$LassoCheckResult]: Stem: 5033#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 5034#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 5035#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5036#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5037#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5038#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5063#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5061#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5059#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5057#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5055#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5052#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5051#L44-3 assume !(main_~i~1#1 >= 0); 5039#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 5040#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5049#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5045#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5046#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5048#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5099#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5097#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5095#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5093#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5091#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5089#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5087#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5085#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5081#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5050#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5031#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5032#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5100#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5098#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5096#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5094#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5092#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5090#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5088#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5086#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5084#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5083#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5082#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5080#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5079#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5078#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5077#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5076#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5075#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5074#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5073#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5072#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5071#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5070#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5069#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5068#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5067#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5066#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5065#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5064#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5062#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5060#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5058#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5056#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5054#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5053#L30-3 assume !(SelectionSort_~lh~0#1 < ~n~0); 5047#L26 assume { :end_inline_SelectionSort } true;main_~i~1#1 := 0; 5044#L49-3 [2022-07-14 15:39:05,609 INFO L754 eck$LassoCheckResult]: Loop: 5044#L49-3 assume !!(main_~i~1#1 < 5);call main_#t~mem9#1 := read~int(main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4);assume { :begin_inline___VERIFIER_assert } true;__VERIFIER_assert_#in~cond#1 := (if main_#t~mem9#1 == main_~i~1#1 then 1 else 0);havoc __VERIFIER_assert_~cond#1;__VERIFIER_assert_~cond#1 := __VERIFIER_assert_#in~cond#1; 5041#L15 assume !(0 == __VERIFIER_assert_~cond#1); 5042#L15-2 assume { :end_inline___VERIFIER_assert } true;havoc main_#t~mem9#1; 5043#L49-2 main_#t~post8#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post8#1;havoc main_#t~post8#1; 5044#L49-3 [2022-07-14 15:39:05,609 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:39:05,609 INFO L85 PathProgramCache]: Analyzing trace with hash -795806568, now seen corresponding path program 2 times [2022-07-14 15:39:05,610 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:39:05,610 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1219378194] [2022-07-14 15:39:05,610 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:39:05,610 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:39:05,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:39:05,637 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:39:05,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:39:05,684 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:39:05,685 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:39:05,685 INFO L85 PathProgramCache]: Analyzing trace with hash 2685258, now seen corresponding path program 2 times [2022-07-14 15:39:05,685 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:39:05,685 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [644690535] [2022-07-14 15:39:05,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:39:05,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:39:05,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:39:05,702 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:39:05,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:39:05,705 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:39:05,706 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-14 15:39:05,706 INFO L85 PathProgramCache]: Analyzing trace with hash 2138032737, now seen corresponding path program 1 times [2022-07-14 15:39:05,706 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-14 15:39:05,706 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [361565285] [2022-07-14 15:39:05,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-14 15:39:05,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-14 15:39:05,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:39:05,747 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-14 15:39:05,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-14 15:39:05,790 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-14 15:39:30,355 WARN L233 SmtUtils]: Spent 24.50s on a formula simplification. DAG size of input: 471 DAG size of output: 345 (called from [L 279] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2022-07-14 15:39:31,116 INFO L210 LassoAnalysis]: Preferences: [2022-07-14 15:39:31,117 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-07-14 15:39:31,117 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-07-14 15:39:31,117 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-07-14 15:39:31,117 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-07-14 15:39:31,117 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-14 15:39:31,117 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-07-14 15:39:31,117 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-07-14 15:39:31,117 INFO L133 ssoRankerPreferences]: Filename of dumped script: eureka_05.i_Iteration19_Lasso [2022-07-14 15:39:31,117 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-07-14 15:39:31,117 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-07-14 15:39:31,119 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-14 15:39:31,123 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-14 15:39:31,124 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-14 15:39:31,125 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-14 15:39:31,127 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-14 15:39:31,128 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-07-14 15:39:32,393 FATAL L? ?]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer has thrown an exception: java.lang.IllegalArgumentException at de.uni_freiburg.informatik.ultimate.util.datastructures.ScopedHashMap.put(ScopedHashMap.java:331) at java.base/java.util.AbstractMap.putAll(AbstractMap.java:281) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.PureSubstitution.(PureSubstitution.java:81) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.Substitution.(Substitution.java:48) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.Substitution.apply(Substitution.java:59) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.mapelimination.MapEliminator.replaceMapReads(MapEliminator.java:518) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.mapelimination.MapEliminator.getRewrittenTransFormula(MapEliminator.java:342) at de.uni_freiburg.informatik.ultimate.lassoranker.preprocessors.MapEliminationLassoPreprocessor.process(MapEliminationLassoPreprocessor.java:111) at de.uni_freiburg.informatik.ultimate.lassoranker.variables.LassoBuilder.applyPreprocessor(LassoBuilder.java:154) at de.uni_freiburg.informatik.ultimate.lassoranker.variables.LassoBuilder.preprocess(LassoBuilder.java:262) at de.uni_freiburg.informatik.ultimate.lassoranker.LassoAnalysis.preprocess(LassoAnalysis.java:280) at de.uni_freiburg.informatik.ultimate.lassoranker.LassoAnalysis.(LassoAnalysis.java:229) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.LassoCheck.synthesize(LassoCheck.java:601) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.LassoCheck$LassoCheckResult.checkLassoTermination(LassoCheck.java:914) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.LassoCheck$LassoCheckResult.(LassoCheck.java:823) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.LassoCheck.(LassoCheck.java:247) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.cegar.AbstractBuchiCegarLoop.runCegarLoop(AbstractBuchiCegarLoop.java:310) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver.doTerminationAnalysis(BuchiAutomizerObserver.java:146) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver.finish(BuchiAutomizerObserver.java:363) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2022-07-14 15:39:32,396 INFO L158 Benchmark]: Toolchain (without parser) took 65885.21ms. Allocated memory was 90.2MB in the beginning and 207.6MB in the end (delta: 117.4MB). Free memory was 57.0MB in the beginning and 90.3MB in the end (delta: -33.3MB). Peak memory consumption was 126.2MB. Max. memory is 16.1GB. [2022-07-14 15:39:32,396 INFO L158 Benchmark]: CDTParser took 0.19ms. Allocated memory is still 90.2MB. Free memory was 45.5MB in the beginning and 45.4MB in the end (delta: 28.1kB). There was no memory consumed. Max. memory is 16.1GB. [2022-07-14 15:39:32,396 INFO L158 Benchmark]: CACSL2BoogieTranslator took 198.50ms. Allocated memory is still 90.2MB. Free memory was 56.7MB in the beginning and 65.5MB in the end (delta: -8.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2022-07-14 15:39:32,397 INFO L158 Benchmark]: Boogie Procedure Inliner took 27.45ms. Allocated memory is still 90.2MB. Free memory was 65.5MB in the beginning and 63.7MB in the end (delta: 1.8MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-07-14 15:39:32,397 INFO L158 Benchmark]: Boogie Preprocessor took 30.24ms. Allocated memory is still 90.2MB. Free memory was 63.7MB in the beginning and 62.7MB in the end (delta: 1.0MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-07-14 15:39:32,397 INFO L158 Benchmark]: RCFGBuilder took 262.72ms. Allocated memory is still 90.2MB. Free memory was 62.7MB in the beginning and 51.9MB in the end (delta: 10.8MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. [2022-07-14 15:39:32,397 INFO L158 Benchmark]: BuchiAutomizer took 65358.89ms. Allocated memory was 90.2MB in the beginning and 207.6MB in the end (delta: 117.4MB). Free memory was 51.9MB in the beginning and 90.3MB in the end (delta: -38.4MB). Peak memory consumption was 123.0MB. Max. memory is 16.1GB. [2022-07-14 15:39:32,398 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19ms. Allocated memory is still 90.2MB. Free memory was 45.5MB in the beginning and 45.4MB in the end (delta: 28.1kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 198.50ms. Allocated memory is still 90.2MB. Free memory was 56.7MB in the beginning and 65.5MB in the end (delta: -8.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 27.45ms. Allocated memory is still 90.2MB. Free memory was 65.5MB in the beginning and 63.7MB in the end (delta: 1.8MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Boogie Preprocessor took 30.24ms. Allocated memory is still 90.2MB. Free memory was 63.7MB in the beginning and 62.7MB in the end (delta: 1.0MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * RCFGBuilder took 262.72ms. Allocated memory is still 90.2MB. Free memory was 62.7MB in the beginning and 51.9MB in the end (delta: 10.8MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. * BuchiAutomizer took 65358.89ms. Allocated memory was 90.2MB in the beginning and 207.6MB in the end (delta: 117.4MB). Free memory was 51.9MB in the beginning and 90.3MB in the end (delta: -38.4MB). Peak memory consumption was 123.0MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer: - ExceptionOrErrorResult: IllegalArgumentException: null de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer: IllegalArgumentException: null: de.uni_freiburg.informatik.ultimate.util.datastructures.ScopedHashMap.put(ScopedHashMap.java:331) RESULT: Ultimate could not prove your program: Toolchain returned no result. [2022-07-14 15:39:32,423 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Forceful destruction successful, exit code 0 [2022-07-14 15:39:32,624 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Forceful destruction successful, exit code 0 [2022-07-14 15:39:32,824 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Forceful destruction successful, exit code 0 [2022-07-14 15:39:33,024 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Forceful destruction successful, exit code 0 [2022-07-14 15:39:33,224 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Forceful destruction successful, exit code 0 [2022-07-14 15:39:33,425 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Forceful destruction successful, exit code 0 [2022-07-14 15:39:33,626 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Ended with exit code 0 [2022-07-14 15:39:33,827 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Forceful destruction successful, exit code 0 [2022-07-14 15:39:34,025 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2022-07-14 15:39:34,225 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2022-07-14 15:39:34,425 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Ended with exit code 0 [2022-07-14 15:39:34,625 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-07-14 15:39:34,826 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-07-14 15:39:35,025 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2022-07-14 15:39:35,237 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis No suitable file found in config dir /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config using search string *Termination*32bit*_Bitvector*.epf No suitable settings file found using Termination*32bit*_Bitvector ERROR: UNSUPPORTED PROPERTY Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: IllegalArgumentException: null