./Ultimate.py --spec ../../sv-benchmarks/c/ReachSafety.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_1.ufo.BOUNDED-10.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 1dbac8bc Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_1.ufo.BOUNDED-10.pals.c -s /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2b1be4311b85b6fe57410228c7ae2544fffadecc ...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_1.ufo.BOUNDED-10.pals.c -s /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2b1be4311b85b6fe57410228c7ae2544fffadecc ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-1dbac8b [2018-10-26 23:17:40,388 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-10-26 23:17:40,390 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-10-26 23:17:40,399 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-10-26 23:17:40,399 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-10-26 23:17:40,399 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-10-26 23:17:40,400 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-10-26 23:17:40,402 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-10-26 23:17:40,403 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-10-26 23:17:40,404 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-10-26 23:17:40,404 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-10-26 23:17:40,405 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-10-26 23:17:40,405 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-10-26 23:17:40,406 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-10-26 23:17:40,407 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-10-26 23:17:40,408 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-10-26 23:17:40,409 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-10-26 23:17:40,410 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-10-26 23:17:40,411 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-10-26 23:17:40,412 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-10-26 23:17:40,413 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-10-26 23:17:40,414 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-10-26 23:17:40,416 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-10-26 23:17:40,416 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-10-26 23:17:40,416 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-10-26 23:17:40,417 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-10-26 23:17:40,418 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-10-26 23:17:40,418 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-10-26 23:17:40,419 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-10-26 23:17:40,420 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-10-26 23:17:40,420 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-10-26 23:17:40,420 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-10-26 23:17:40,420 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-10-26 23:17:40,421 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-10-26 23:17:40,421 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-10-26 23:17:40,422 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-10-26 23:17:40,423 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-10-26 23:17:40,433 INFO L110 SettingsManager]: Loading preferences was successful [2018-10-26 23:17:40,433 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-10-26 23:17:40,434 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-10-26 23:17:40,434 INFO L133 SettingsManager]: * User list type=DISABLED [2018-10-26 23:17:40,434 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-10-26 23:17:40,434 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-10-26 23:17:40,434 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-10-26 23:17:40,435 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-10-26 23:17:40,435 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-10-26 23:17:40,435 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-10-26 23:17:40,435 INFO L133 SettingsManager]: * Interval Domain=false [2018-10-26 23:17:40,435 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-10-26 23:17:40,436 INFO L133 SettingsManager]: * sizeof long=4 [2018-10-26 23:17:40,436 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-10-26 23:17:40,436 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-10-26 23:17:40,436 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-10-26 23:17:40,436 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-10-26 23:17:40,436 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-10-26 23:17:40,436 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-10-26 23:17:40,437 INFO L133 SettingsManager]: * sizeof long double=12 [2018-10-26 23:17:40,437 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-10-26 23:17:40,437 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-10-26 23:17:40,437 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-10-26 23:17:40,437 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-10-26 23:17:40,437 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-10-26 23:17:40,439 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-10-26 23:17:40,439 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-26 23:17:40,440 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-10-26 23:17:40,440 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-10-26 23:17:40,440 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-10-26 23:17:40,440 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-10-26 23:17:40,440 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-10-26 23:17:40,440 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-10-26 23:17:40,440 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-10-26 23:17:40,440 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2b1be4311b85b6fe57410228c7ae2544fffadecc [2018-10-26 23:17:40,467 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-10-26 23:17:40,477 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-10-26 23:17:40,480 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-10-26 23:17:40,485 INFO L271 PluginConnector]: Initializing CDTParser... [2018-10-26 23:17:40,485 INFO L276 PluginConnector]: CDTParser initialized [2018-10-26 23:17:40,486 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_1.ufo.BOUNDED-10.pals.c [2018-10-26 23:17:40,537 INFO L218 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/data/0ce72ad33/617ed8220e1c4137bcad80d79d6cb3bd/FLAG84b1064a7 [2018-10-26 23:17:40,966 INFO L298 CDTParser]: Found 1 translation units. [2018-10-26 23:17:40,967 INFO L158 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_1.ufo.BOUNDED-10.pals.c [2018-10-26 23:17:40,976 INFO L346 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/data/0ce72ad33/617ed8220e1c4137bcad80d79d6cb3bd/FLAG84b1064a7 [2018-10-26 23:17:40,992 INFO L354 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/data/0ce72ad33/617ed8220e1c4137bcad80d79d6cb3bd [2018-10-26 23:17:40,995 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-10-26 23:17:40,996 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-10-26 23:17:40,997 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-10-26 23:17:40,997 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-10-26 23:17:41,000 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-10-26 23:17:41,001 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.10 11:17:40" (1/1) ... [2018-10-26 23:17:41,004 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1eda7c4f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 11:17:41, skipping insertion in model container [2018-10-26 23:17:41,004 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.10 11:17:40" (1/1) ... [2018-10-26 23:17:41,014 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-10-26 23:17:41,057 INFO L174 MainTranslator]: Built tables and reachable declarations [2018-10-26 23:17:41,279 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-26 23:17:41,286 INFO L189 MainTranslator]: Completed pre-run [2018-10-26 23:17:41,341 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-26 23:17:41,359 INFO L193 MainTranslator]: Completed translation [2018-10-26 23:17:41,359 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 11:17:41 WrapperNode [2018-10-26 23:17:41,359 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-10-26 23:17:41,360 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-10-26 23:17:41,360 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-10-26 23:17:41,360 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-10-26 23:17:41,369 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 11:17:41" (1/1) ... [2018-10-26 23:17:41,390 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 11:17:41" (1/1) ... [2018-10-26 23:17:41,396 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-10-26 23:17:41,397 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-10-26 23:17:41,397 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-10-26 23:17:41,397 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-10-26 23:17:41,485 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 11:17:41" (1/1) ... [2018-10-26 23:17:41,485 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 11:17:41" (1/1) ... [2018-10-26 23:17:41,489 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 11:17:41" (1/1) ... [2018-10-26 23:17:41,497 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 11:17:41" (1/1) ... [2018-10-26 23:17:41,518 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 11:17:41" (1/1) ... [2018-10-26 23:17:41,542 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 11:17:41" (1/1) ... [2018-10-26 23:17:41,551 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 11:17:41" (1/1) ... [2018-10-26 23:17:41,562 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-10-26 23:17:41,563 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-10-26 23:17:41,563 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-10-26 23:17:41,563 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-10-26 23:17:41,564 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 11:17:41" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-26 23:17:41,631 INFO L130 BoogieDeclarations]: Found specification of procedure read_manual_selection_history [2018-10-26 23:17:41,631 INFO L138 BoogieDeclarations]: Found implementation of procedure read_manual_selection_history [2018-10-26 23:17:41,631 INFO L130 BoogieDeclarations]: Found specification of procedure Side1_activestandby_task_each_pals_period [2018-10-26 23:17:41,631 INFO L138 BoogieDeclarations]: Found implementation of procedure Side1_activestandby_task_each_pals_period [2018-10-26 23:17:41,631 INFO L130 BoogieDeclarations]: Found specification of procedure write_active_side_history [2018-10-26 23:17:41,631 INFO L138 BoogieDeclarations]: Found implementation of procedure write_active_side_history [2018-10-26 23:17:41,631 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-10-26 23:17:41,632 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-10-26 23:17:41,632 INFO L130 BoogieDeclarations]: Found specification of procedure Console_task_each_pals_period [2018-10-26 23:17:41,632 INFO L138 BoogieDeclarations]: Found implementation of procedure Console_task_each_pals_period [2018-10-26 23:17:41,632 INFO L130 BoogieDeclarations]: Found specification of procedure read_side2_failed_history [2018-10-26 23:17:41,632 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side2_failed_history [2018-10-26 23:17:41,632 INFO L130 BoogieDeclarations]: Found specification of procedure assert [2018-10-26 23:17:41,632 INFO L138 BoogieDeclarations]: Found implementation of procedure assert [2018-10-26 23:17:41,632 INFO L130 BoogieDeclarations]: Found specification of procedure Pendulum_prism_task_each_pals_period [2018-10-26 23:17:41,632 INFO L138 BoogieDeclarations]: Found implementation of procedure Pendulum_prism_task_each_pals_period [2018-10-26 23:17:41,633 INFO L130 BoogieDeclarations]: Found specification of procedure write_manual_selection_history [2018-10-26 23:17:41,633 INFO L138 BoogieDeclarations]: Found implementation of procedure write_manual_selection_history [2018-10-26 23:17:41,633 INFO L130 BoogieDeclarations]: Found specification of procedure init [2018-10-26 23:17:41,633 INFO L138 BoogieDeclarations]: Found implementation of procedure init [2018-10-26 23:17:41,633 INFO L130 BoogieDeclarations]: Found specification of procedure flip_the_side [2018-10-26 23:17:41,633 INFO L138 BoogieDeclarations]: Found implementation of procedure flip_the_side [2018-10-26 23:17:41,637 INFO L130 BoogieDeclarations]: Found specification of procedure Side2_activestandby_task_each_pals_period [2018-10-26 23:17:41,637 INFO L138 BoogieDeclarations]: Found implementation of procedure Side2_activestandby_task_each_pals_period [2018-10-26 23:17:41,637 INFO L130 BoogieDeclarations]: Found specification of procedure check [2018-10-26 23:17:41,638 INFO L138 BoogieDeclarations]: Found implementation of procedure check [2018-10-26 23:17:41,638 INFO L130 BoogieDeclarations]: Found specification of procedure write_side1_failed_history [2018-10-26 23:17:41,638 INFO L138 BoogieDeclarations]: Found implementation of procedure write_side1_failed_history [2018-10-26 23:17:41,638 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-10-26 23:17:41,638 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-10-26 23:17:41,638 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-10-26 23:17:41,638 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-10-26 23:17:41,638 INFO L130 BoogieDeclarations]: Found specification of procedure read_side1_failed_history [2018-10-26 23:17:41,639 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side1_failed_history [2018-10-26 23:17:41,639 INFO L130 BoogieDeclarations]: Found specification of procedure read_active_side_history [2018-10-26 23:17:41,639 INFO L138 BoogieDeclarations]: Found implementation of procedure read_active_side_history [2018-10-26 23:17:41,639 INFO L130 BoogieDeclarations]: Found specification of procedure write_side2_failed_history [2018-10-26 23:17:41,639 INFO L138 BoogieDeclarations]: Found implementation of procedure write_side2_failed_history [2018-10-26 23:17:43,017 INFO L341 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-10-26 23:17:43,018 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.10 11:17:43 BoogieIcfgContainer [2018-10-26 23:17:43,018 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-10-26 23:17:43,019 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-10-26 23:17:43,019 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-10-26 23:17:43,023 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-10-26 23:17:43,023 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 26.10 11:17:40" (1/3) ... [2018-10-26 23:17:43,024 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1c519815 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 26.10 11:17:43, skipping insertion in model container [2018-10-26 23:17:43,024 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 11:17:41" (2/3) ... [2018-10-26 23:17:43,024 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1c519815 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 26.10 11:17:43, skipping insertion in model container [2018-10-26 23:17:43,024 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.10 11:17:43" (3/3) ... [2018-10-26 23:17:43,027 INFO L112 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby_false-unreach-call.4_1.ufo.BOUNDED-10.pals.c [2018-10-26 23:17:43,036 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-10-26 23:17:43,044 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-10-26 23:17:43,060 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-10-26 23:17:43,096 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-10-26 23:17:43,096 INFO L383 AbstractCegarLoop]: Hoare is true [2018-10-26 23:17:43,096 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-10-26 23:17:43,096 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-10-26 23:17:43,096 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-10-26 23:17:43,097 INFO L387 AbstractCegarLoop]: Difference is false [2018-10-26 23:17:43,097 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-10-26 23:17:43,097 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-10-26 23:17:43,121 INFO L276 IsEmpty]: Start isEmpty. Operand 236 states. [2018-10-26 23:17:43,130 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-10-26 23:17:43,130 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:17:43,131 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:17:43,133 INFO L424 AbstractCegarLoop]: === Iteration 1 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:17:43,147 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:17:43,147 INFO L82 PathProgramCache]: Analyzing trace with hash 409760090, now seen corresponding path program 1 times [2018-10-26 23:17:43,150 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 23:17:43,200 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:17:43,200 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:17:43,200 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:17:43,200 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 23:17:43,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:17:43,504 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-26 23:17:43,506 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:17:43,507 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-26 23:17:43,507 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 23:17:43,516 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-26 23:17:43,530 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-26 23:17:43,530 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-26 23:17:43,533 INFO L87 Difference]: Start difference. First operand 236 states. Second operand 4 states. [2018-10-26 23:17:43,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:17:43,670 INFO L93 Difference]: Finished difference Result 453 states and 692 transitions. [2018-10-26 23:17:43,671 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-26 23:17:43,672 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2018-10-26 23:17:43,673 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:17:43,688 INFO L225 Difference]: With dead ends: 453 [2018-10-26 23:17:43,688 INFO L226 Difference]: Without dead ends: 231 [2018-10-26 23:17:43,694 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-26 23:17:43,708 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 231 states. [2018-10-26 23:17:43,746 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 231 to 231. [2018-10-26 23:17:43,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 231 states. [2018-10-26 23:17:43,751 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 231 states to 231 states and 321 transitions. [2018-10-26 23:17:43,754 INFO L78 Accepts]: Start accepts. Automaton has 231 states and 321 transitions. Word has length 66 [2018-10-26 23:17:43,754 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:17:43,754 INFO L481 AbstractCegarLoop]: Abstraction has 231 states and 321 transitions. [2018-10-26 23:17:43,754 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-26 23:17:43,754 INFO L276 IsEmpty]: Start isEmpty. Operand 231 states and 321 transitions. [2018-10-26 23:17:43,758 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-10-26 23:17:43,758 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:17:43,758 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:17:43,759 INFO L424 AbstractCegarLoop]: === Iteration 2 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:17:43,759 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:17:43,759 INFO L82 PathProgramCache]: Analyzing trace with hash -1305350834, now seen corresponding path program 1 times [2018-10-26 23:17:43,759 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 23:17:43,762 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:17:43,762 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:17:43,762 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:17:43,762 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 23:17:43,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:17:44,021 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-26 23:17:44,021 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:17:44,021 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-26 23:17:44,021 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 23:17:44,023 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-26 23:17:44,023 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-26 23:17:44,023 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-26 23:17:44,023 INFO L87 Difference]: Start difference. First operand 231 states and 321 transitions. Second operand 4 states. [2018-10-26 23:17:44,396 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:17:44,396 INFO L93 Difference]: Finished difference Result 444 states and 630 transitions. [2018-10-26 23:17:44,397 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-26 23:17:44,398 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 77 [2018-10-26 23:17:44,398 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:17:44,401 INFO L225 Difference]: With dead ends: 444 [2018-10-26 23:17:44,402 INFO L226 Difference]: Without dead ends: 235 [2018-10-26 23:17:44,403 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-26 23:17:44,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 235 states. [2018-10-26 23:17:44,432 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 235 to 235. [2018-10-26 23:17:44,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 235 states. [2018-10-26 23:17:44,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 235 states to 235 states and 324 transitions. [2018-10-26 23:17:44,435 INFO L78 Accepts]: Start accepts. Automaton has 235 states and 324 transitions. Word has length 77 [2018-10-26 23:17:44,436 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:17:44,436 INFO L481 AbstractCegarLoop]: Abstraction has 235 states and 324 transitions. [2018-10-26 23:17:44,436 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-26 23:17:44,436 INFO L276 IsEmpty]: Start isEmpty. Operand 235 states and 324 transitions. [2018-10-26 23:17:44,445 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-10-26 23:17:44,445 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:17:44,446 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:17:44,446 INFO L424 AbstractCegarLoop]: === Iteration 3 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:17:44,446 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:17:44,446 INFO L82 PathProgramCache]: Analyzing trace with hash -1987778778, now seen corresponding path program 1 times [2018-10-26 23:17:44,446 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 23:17:44,448 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:17:44,448 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:17:44,448 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:17:44,448 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 23:17:44,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:17:45,065 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-26 23:17:45,066 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:17:45,066 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-26 23:17:45,066 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 23:17:45,067 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-26 23:17:45,067 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-26 23:17:45,067 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-10-26 23:17:45,067 INFO L87 Difference]: Start difference. First operand 235 states and 324 transitions. Second operand 7 states. [2018-10-26 23:17:46,996 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:17:46,996 INFO L93 Difference]: Finished difference Result 536 states and 741 transitions. [2018-10-26 23:17:46,996 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-26 23:17:46,997 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 95 [2018-10-26 23:17:46,997 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:17:47,001 INFO L225 Difference]: With dead ends: 536 [2018-10-26 23:17:47,002 INFO L226 Difference]: Without dead ends: 323 [2018-10-26 23:17:47,003 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=40, Invalid=92, Unknown=0, NotChecked=0, Total=132 [2018-10-26 23:17:47,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 323 states. [2018-10-26 23:17:47,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 323 to 322. [2018-10-26 23:17:47,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 322 states. [2018-10-26 23:17:47,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 322 states to 322 states and 437 transitions. [2018-10-26 23:17:47,032 INFO L78 Accepts]: Start accepts. Automaton has 322 states and 437 transitions. Word has length 95 [2018-10-26 23:17:47,033 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:17:47,033 INFO L481 AbstractCegarLoop]: Abstraction has 322 states and 437 transitions. [2018-10-26 23:17:47,033 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-26 23:17:47,033 INFO L276 IsEmpty]: Start isEmpty. Operand 322 states and 437 transitions. [2018-10-26 23:17:47,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-10-26 23:17:47,036 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:17:47,036 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:17:47,036 INFO L424 AbstractCegarLoop]: === Iteration 4 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:17:47,036 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:17:47,036 INFO L82 PathProgramCache]: Analyzing trace with hash 1906972080, now seen corresponding path program 1 times [2018-10-26 23:17:47,037 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 23:17:47,038 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:17:47,038 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:17:47,038 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:17:47,038 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 23:17:47,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:17:47,190 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-26 23:17:47,190 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:17:47,190 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-26 23:17:47,190 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 23:17:47,191 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-26 23:17:47,191 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-26 23:17:47,191 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-10-26 23:17:47,191 INFO L87 Difference]: Start difference. First operand 322 states and 437 transitions. Second operand 7 states. [2018-10-26 23:17:48,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:17:48,435 INFO L93 Difference]: Finished difference Result 542 states and 749 transitions. [2018-10-26 23:17:48,436 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-26 23:17:48,436 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 96 [2018-10-26 23:17:48,436 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:17:48,438 INFO L225 Difference]: With dead ends: 542 [2018-10-26 23:17:48,438 INFO L226 Difference]: Without dead ends: 326 [2018-10-26 23:17:48,439 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=92, Unknown=0, NotChecked=0, Total=132 [2018-10-26 23:17:48,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 326 states. [2018-10-26 23:17:48,460 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 326 to 322. [2018-10-26 23:17:48,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 322 states. [2018-10-26 23:17:48,463 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 322 states to 322 states and 437 transitions. [2018-10-26 23:17:48,464 INFO L78 Accepts]: Start accepts. Automaton has 322 states and 437 transitions. Word has length 96 [2018-10-26 23:17:48,464 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:17:48,464 INFO L481 AbstractCegarLoop]: Abstraction has 322 states and 437 transitions. [2018-10-26 23:17:48,464 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-26 23:17:48,464 INFO L276 IsEmpty]: Start isEmpty. Operand 322 states and 437 transitions. [2018-10-26 23:17:48,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-10-26 23:17:48,467 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:17:48,468 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:17:48,468 INFO L424 AbstractCegarLoop]: === Iteration 5 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:17:48,468 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:17:48,468 INFO L82 PathProgramCache]: Analyzing trace with hash 837758963, now seen corresponding path program 1 times [2018-10-26 23:17:48,468 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 23:17:48,471 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:17:48,471 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:17:48,471 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:17:48,472 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 23:17:48,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:17:48,606 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-26 23:17:48,606 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:17:48,606 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-26 23:17:48,606 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 23:17:48,607 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-26 23:17:48,607 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-26 23:17:48,607 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-26 23:17:48,607 INFO L87 Difference]: Start difference. First operand 322 states and 437 transitions. Second operand 3 states. [2018-10-26 23:17:48,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:17:48,741 INFO L93 Difference]: Finished difference Result 771 states and 1070 transitions. [2018-10-26 23:17:48,742 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-26 23:17:48,742 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 97 [2018-10-26 23:17:48,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:17:48,746 INFO L225 Difference]: With dead ends: 771 [2018-10-26 23:17:48,747 INFO L226 Difference]: Without dead ends: 555 [2018-10-26 23:17:48,748 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-26 23:17:48,749 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2018-10-26 23:17:48,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 536. [2018-10-26 23:17:48,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 536 states. [2018-10-26 23:17:48,791 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 536 states to 536 states and 740 transitions. [2018-10-26 23:17:48,792 INFO L78 Accepts]: Start accepts. Automaton has 536 states and 740 transitions. Word has length 97 [2018-10-26 23:17:48,792 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:17:48,792 INFO L481 AbstractCegarLoop]: Abstraction has 536 states and 740 transitions. [2018-10-26 23:17:48,792 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-26 23:17:48,792 INFO L276 IsEmpty]: Start isEmpty. Operand 536 states and 740 transitions. [2018-10-26 23:17:48,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-10-26 23:17:48,795 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:17:48,796 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:17:48,796 INFO L424 AbstractCegarLoop]: === Iteration 6 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:17:48,796 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:17:48,796 INFO L82 PathProgramCache]: Analyzing trace with hash 1086805318, now seen corresponding path program 1 times [2018-10-26 23:17:48,796 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 23:17:48,797 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:17:48,798 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:17:48,798 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:17:48,800 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 23:17:48,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:17:48,917 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-26 23:17:48,918 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:17:48,918 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-26 23:17:48,918 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 23:17:48,919 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-26 23:17:48,919 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-26 23:17:48,919 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-26 23:17:48,919 INFO L87 Difference]: Start difference. First operand 536 states and 740 transitions. Second operand 3 states. [2018-10-26 23:17:49,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:17:49,105 INFO L93 Difference]: Finished difference Result 1273 states and 1799 transitions. [2018-10-26 23:17:49,106 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-26 23:17:49,106 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 98 [2018-10-26 23:17:49,107 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:17:49,113 INFO L225 Difference]: With dead ends: 1273 [2018-10-26 23:17:49,117 INFO L226 Difference]: Without dead ends: 886 [2018-10-26 23:17:49,119 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-26 23:17:49,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 886 states. [2018-10-26 23:17:49,199 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 886 to 880. [2018-10-26 23:17:49,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 880 states. [2018-10-26 23:17:49,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 880 states to 880 states and 1233 transitions. [2018-10-26 23:17:49,207 INFO L78 Accepts]: Start accepts. Automaton has 880 states and 1233 transitions. Word has length 98 [2018-10-26 23:17:49,209 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:17:49,210 INFO L481 AbstractCegarLoop]: Abstraction has 880 states and 1233 transitions. [2018-10-26 23:17:49,210 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-26 23:17:49,210 INFO L276 IsEmpty]: Start isEmpty. Operand 880 states and 1233 transitions. [2018-10-26 23:17:49,213 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-10-26 23:17:49,214 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:17:49,214 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:17:49,214 INFO L424 AbstractCegarLoop]: === Iteration 7 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:17:49,214 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:17:49,214 INFO L82 PathProgramCache]: Analyzing trace with hash 1787869896, now seen corresponding path program 1 times [2018-10-26 23:17:49,215 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 23:17:49,217 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:17:49,219 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:17:49,220 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:17:49,220 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 23:17:49,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:17:49,347 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-26 23:17:49,348 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:17:49,348 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-26 23:17:49,348 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 23:17:49,349 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-26 23:17:49,349 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-26 23:17:49,349 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-26 23:17:49,349 INFO L87 Difference]: Start difference. First operand 880 states and 1233 transitions. Second operand 3 states. [2018-10-26 23:17:49,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:17:49,452 INFO L93 Difference]: Finished difference Result 1484 states and 2092 transitions. [2018-10-26 23:17:49,453 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-26 23:17:49,453 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 98 [2018-10-26 23:17:49,454 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:17:49,457 INFO L225 Difference]: With dead ends: 1484 [2018-10-26 23:17:49,458 INFO L226 Difference]: Without dead ends: 721 [2018-10-26 23:17:49,461 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-26 23:17:49,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 721 states. [2018-10-26 23:17:49,505 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 721 to 721. [2018-10-26 23:17:49,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 721 states. [2018-10-26 23:17:49,509 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 721 states to 721 states and 1001 transitions. [2018-10-26 23:17:49,510 INFO L78 Accepts]: Start accepts. Automaton has 721 states and 1001 transitions. Word has length 98 [2018-10-26 23:17:49,510 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:17:49,510 INFO L481 AbstractCegarLoop]: Abstraction has 721 states and 1001 transitions. [2018-10-26 23:17:49,510 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-26 23:17:49,510 INFO L276 IsEmpty]: Start isEmpty. Operand 721 states and 1001 transitions. [2018-10-26 23:17:49,511 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-10-26 23:17:49,512 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:17:49,513 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:17:49,513 INFO L424 AbstractCegarLoop]: === Iteration 8 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:17:49,513 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:17:49,513 INFO L82 PathProgramCache]: Analyzing trace with hash 630792314, now seen corresponding path program 1 times [2018-10-26 23:17:49,513 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 23:17:49,514 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:17:49,514 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:17:49,514 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:17:49,514 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 23:17:49,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:17:49,812 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-26 23:17:49,814 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:17:49,814 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-26 23:17:49,814 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 23:17:49,815 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-26 23:17:49,815 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-26 23:17:49,815 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-26 23:17:49,816 INFO L87 Difference]: Start difference. First operand 721 states and 1001 transitions. Second operand 4 states. [2018-10-26 23:17:50,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:17:50,160 INFO L93 Difference]: Finished difference Result 1305 states and 1838 transitions. [2018-10-26 23:17:50,161 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-26 23:17:50,161 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 98 [2018-10-26 23:17:50,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:17:50,165 INFO L225 Difference]: With dead ends: 1305 [2018-10-26 23:17:50,165 INFO L226 Difference]: Without dead ends: 736 [2018-10-26 23:17:50,169 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-26 23:17:50,170 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 736 states. [2018-10-26 23:17:50,209 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 736 to 736. [2018-10-26 23:17:50,209 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 736 states. [2018-10-26 23:17:50,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 736 states to 736 states and 1013 transitions. [2018-10-26 23:17:50,215 INFO L78 Accepts]: Start accepts. Automaton has 736 states and 1013 transitions. Word has length 98 [2018-10-26 23:17:50,215 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:17:50,215 INFO L481 AbstractCegarLoop]: Abstraction has 736 states and 1013 transitions. [2018-10-26 23:17:50,215 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-26 23:17:50,215 INFO L276 IsEmpty]: Start isEmpty. Operand 736 states and 1013 transitions. [2018-10-26 23:17:50,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2018-10-26 23:17:50,217 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:17:50,217 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:17:50,219 INFO L424 AbstractCegarLoop]: === Iteration 9 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:17:50,220 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:17:50,220 INFO L82 PathProgramCache]: Analyzing trace with hash -1140976842, now seen corresponding path program 1 times [2018-10-26 23:17:50,220 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 23:17:50,221 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:17:50,221 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:17:50,221 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:17:50,221 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 23:17:50,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:17:50,500 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-26 23:17:50,501 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:17:50,501 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-26 23:17:50,501 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 23:17:50,501 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-26 23:17:50,503 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-26 23:17:50,503 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-26 23:17:50,503 INFO L87 Difference]: Start difference. First operand 736 states and 1013 transitions. Second operand 4 states. [2018-10-26 23:17:51,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:17:51,011 INFO L93 Difference]: Finished difference Result 1335 states and 1871 transitions. [2018-10-26 23:17:51,012 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-26 23:17:51,016 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 106 [2018-10-26 23:17:51,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:17:51,021 INFO L225 Difference]: With dead ends: 1335 [2018-10-26 23:17:51,021 INFO L226 Difference]: Without dead ends: 751 [2018-10-26 23:17:51,026 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-26 23:17:51,028 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 751 states. [2018-10-26 23:17:51,078 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 751 to 751. [2018-10-26 23:17:51,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 751 states. [2018-10-26 23:17:51,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 751 states to 751 states and 1025 transitions. [2018-10-26 23:17:51,086 INFO L78 Accepts]: Start accepts. Automaton has 751 states and 1025 transitions. Word has length 106 [2018-10-26 23:17:51,086 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:17:51,087 INFO L481 AbstractCegarLoop]: Abstraction has 751 states and 1025 transitions. [2018-10-26 23:17:51,089 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-26 23:17:51,089 INFO L276 IsEmpty]: Start isEmpty. Operand 751 states and 1025 transitions. [2018-10-26 23:17:51,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-10-26 23:17:51,091 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:17:51,092 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:17:51,092 INFO L424 AbstractCegarLoop]: === Iteration 10 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:17:51,092 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:17:51,092 INFO L82 PathProgramCache]: Analyzing trace with hash -817560800, now seen corresponding path program 1 times [2018-10-26 23:17:51,092 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 23:17:51,096 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:17:51,097 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:17:51,097 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:17:51,097 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 23:17:51,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:17:51,356 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-26 23:17:51,356 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:17:51,356 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-26 23:17:51,356 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 23:17:51,358 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-26 23:17:51,358 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-26 23:17:51,358 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-26 23:17:51,358 INFO L87 Difference]: Start difference. First operand 751 states and 1025 transitions. Second operand 4 states. [2018-10-26 23:17:51,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:17:51,779 INFO L93 Difference]: Finished difference Result 1362 states and 1883 transitions. [2018-10-26 23:17:51,780 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-26 23:17:51,780 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 114 [2018-10-26 23:17:51,780 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:17:51,785 INFO L225 Difference]: With dead ends: 1362 [2018-10-26 23:17:51,786 INFO L226 Difference]: Without dead ends: 763 [2018-10-26 23:17:51,789 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-26 23:17:51,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 763 states. [2018-10-26 23:17:51,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 763 to 763. [2018-10-26 23:17:51,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 763 states. [2018-10-26 23:17:51,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 763 states to 763 states and 1034 transitions. [2018-10-26 23:17:51,844 INFO L78 Accepts]: Start accepts. Automaton has 763 states and 1034 transitions. Word has length 114 [2018-10-26 23:17:51,844 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:17:51,844 INFO L481 AbstractCegarLoop]: Abstraction has 763 states and 1034 transitions. [2018-10-26 23:17:51,844 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-26 23:17:51,845 INFO L276 IsEmpty]: Start isEmpty. Operand 763 states and 1034 transitions. [2018-10-26 23:17:51,848 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-10-26 23:17:51,849 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:17:51,850 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:17:51,850 INFO L424 AbstractCegarLoop]: === Iteration 11 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:17:51,850 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:17:51,850 INFO L82 PathProgramCache]: Analyzing trace with hash -526252078, now seen corresponding path program 1 times [2018-10-26 23:17:51,850 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 23:17:51,851 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:17:51,852 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:17:51,852 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:17:51,852 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 23:17:51,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:17:52,162 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-26 23:17:52,162 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:17:52,163 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-26 23:17:52,163 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 23:17:52,163 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-26 23:17:52,163 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-26 23:17:52,163 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-26 23:17:52,164 INFO L87 Difference]: Start difference. First operand 763 states and 1034 transitions. Second operand 4 states. [2018-10-26 23:17:52,708 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:17:52,708 INFO L93 Difference]: Finished difference Result 1389 states and 1913 transitions. [2018-10-26 23:17:52,709 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-26 23:17:52,709 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 114 [2018-10-26 23:17:52,709 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:17:52,714 INFO L225 Difference]: With dead ends: 1389 [2018-10-26 23:17:52,715 INFO L226 Difference]: Without dead ends: 778 [2018-10-26 23:17:52,717 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-26 23:17:52,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 778 states. [2018-10-26 23:17:52,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 778 to 778. [2018-10-26 23:17:52,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 778 states. [2018-10-26 23:17:52,762 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 778 states to 778 states and 1046 transitions. [2018-10-26 23:17:52,762 INFO L78 Accepts]: Start accepts. Automaton has 778 states and 1046 transitions. Word has length 114 [2018-10-26 23:17:52,763 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:17:52,763 INFO L481 AbstractCegarLoop]: Abstraction has 778 states and 1046 transitions. [2018-10-26 23:17:52,763 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-26 23:17:52,763 INFO L276 IsEmpty]: Start isEmpty. Operand 778 states and 1046 transitions. [2018-10-26 23:17:52,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-10-26 23:17:52,768 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:17:52,768 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:17:52,768 INFO L424 AbstractCegarLoop]: === Iteration 12 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:17:52,769 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:17:52,769 INFO L82 PathProgramCache]: Analyzing trace with hash 1823404772, now seen corresponding path program 1 times [2018-10-26 23:17:52,769 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 23:17:52,772 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:17:52,774 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:17:52,774 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:17:52,775 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 23:17:52,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:17:53,133 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-10-26 23:17:53,134 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:17:53,134 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-26 23:17:53,134 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 23:17:53,134 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-26 23:17:53,135 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-26 23:17:53,135 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-26 23:17:53,136 INFO L87 Difference]: Start difference. First operand 778 states and 1046 transitions. Second operand 4 states. [2018-10-26 23:17:53,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:17:53,571 INFO L93 Difference]: Finished difference Result 1422 states and 1934 transitions. [2018-10-26 23:17:53,572 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-26 23:17:53,572 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 122 [2018-10-26 23:17:53,573 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:17:53,577 INFO L225 Difference]: With dead ends: 1422 [2018-10-26 23:17:53,577 INFO L226 Difference]: Without dead ends: 796 [2018-10-26 23:17:53,580 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-26 23:17:53,581 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 796 states. [2018-10-26 23:17:53,626 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 796 to 796. [2018-10-26 23:17:53,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 796 states. [2018-10-26 23:17:53,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 796 states to 796 states and 1061 transitions. [2018-10-26 23:17:53,631 INFO L78 Accepts]: Start accepts. Automaton has 796 states and 1061 transitions. Word has length 122 [2018-10-26 23:17:53,632 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:17:53,634 INFO L481 AbstractCegarLoop]: Abstraction has 796 states and 1061 transitions. [2018-10-26 23:17:53,634 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-26 23:17:53,634 INFO L276 IsEmpty]: Start isEmpty. Operand 796 states and 1061 transitions. [2018-10-26 23:17:53,637 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-10-26 23:17:53,637 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:17:53,637 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:17:53,637 INFO L424 AbstractCegarLoop]: === Iteration 13 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:17:53,640 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:17:53,640 INFO L82 PathProgramCache]: Analyzing trace with hash 165489709, now seen corresponding path program 1 times [2018-10-26 23:17:53,640 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 23:17:53,643 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:17:53,644 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:17:53,644 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:17:53,644 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 23:17:53,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:17:54,023 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-26 23:17:54,024 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:17:54,024 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-10-26 23:17:54,025 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 23:17:54,025 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-10-26 23:17:54,025 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-10-26 23:17:54,025 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-10-26 23:17:54,026 INFO L87 Difference]: Start difference. First operand 796 states and 1061 transitions. Second operand 10 states. [2018-10-26 23:18:05,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:18:05,704 INFO L93 Difference]: Finished difference Result 2082 states and 2755 transitions. [2018-10-26 23:18:05,705 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-10-26 23:18:05,705 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 127 [2018-10-26 23:18:05,705 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:18:05,714 INFO L225 Difference]: With dead ends: 2082 [2018-10-26 23:18:05,714 INFO L226 Difference]: Without dead ends: 1429 [2018-10-26 23:18:05,717 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 84 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=92, Invalid=460, Unknown=0, NotChecked=0, Total=552 [2018-10-26 23:18:05,719 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1429 states. [2018-10-26 23:18:05,782 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1429 to 1328. [2018-10-26 23:18:05,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1328 states. [2018-10-26 23:18:05,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1328 states to 1328 states and 1739 transitions. [2018-10-26 23:18:05,792 INFO L78 Accepts]: Start accepts. Automaton has 1328 states and 1739 transitions. Word has length 127 [2018-10-26 23:18:05,793 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:18:05,793 INFO L481 AbstractCegarLoop]: Abstraction has 1328 states and 1739 transitions. [2018-10-26 23:18:05,793 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-10-26 23:18:05,793 INFO L276 IsEmpty]: Start isEmpty. Operand 1328 states and 1739 transitions. [2018-10-26 23:18:05,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-10-26 23:18:05,795 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:18:05,795 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:18:05,796 INFO L424 AbstractCegarLoop]: === Iteration 14 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:18:05,798 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:18:05,799 INFO L82 PathProgramCache]: Analyzing trace with hash 905097090, now seen corresponding path program 1 times [2018-10-26 23:18:05,799 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 23:18:05,801 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:18:05,802 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:18:05,802 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:18:05,803 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 23:18:05,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:18:06,031 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-26 23:18:06,031 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:18:06,032 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-26 23:18:06,032 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 23:18:06,032 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-26 23:18:06,033 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-26 23:18:06,034 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-26 23:18:06,034 INFO L87 Difference]: Start difference. First operand 1328 states and 1739 transitions. Second operand 4 states. [2018-10-26 23:18:06,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:18:06,481 INFO L93 Difference]: Finished difference Result 2413 states and 3182 transitions. [2018-10-26 23:18:06,482 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-26 23:18:06,482 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 129 [2018-10-26 23:18:06,483 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:18:06,487 INFO L225 Difference]: With dead ends: 2413 [2018-10-26 23:18:06,487 INFO L226 Difference]: Without dead ends: 1340 [2018-10-26 23:18:06,491 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-26 23:18:06,493 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1340 states. [2018-10-26 23:18:06,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1340 to 1334. [2018-10-26 23:18:06,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1334 states. [2018-10-26 23:18:06,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1334 states to 1334 states and 1726 transitions. [2018-10-26 23:18:06,559 INFO L78 Accepts]: Start accepts. Automaton has 1334 states and 1726 transitions. Word has length 129 [2018-10-26 23:18:06,559 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:18:06,560 INFO L481 AbstractCegarLoop]: Abstraction has 1334 states and 1726 transitions. [2018-10-26 23:18:06,560 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-26 23:18:06,560 INFO L276 IsEmpty]: Start isEmpty. Operand 1334 states and 1726 transitions. [2018-10-26 23:18:06,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2018-10-26 23:18:06,564 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:18:06,564 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:18:06,564 INFO L424 AbstractCegarLoop]: === Iteration 15 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:18:06,564 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:18:06,564 INFO L82 PathProgramCache]: Analyzing trace with hash -128491061, now seen corresponding path program 1 times [2018-10-26 23:18:06,565 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 23:18:06,565 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:18:06,566 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:18:06,566 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:18:06,566 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 23:18:06,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:18:07,179 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-10-26 23:18:07,179 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:18:07,179 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-10-26 23:18:07,179 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 23:18:07,180 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-26 23:18:07,180 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-26 23:18:07,180 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-10-26 23:18:07,180 INFO L87 Difference]: Start difference. First operand 1334 states and 1726 transitions. Second operand 8 states. [2018-10-26 23:18:07,557 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:18:07,557 INFO L93 Difference]: Finished difference Result 1419 states and 1854 transitions. [2018-10-26 23:18:07,557 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-26 23:18:07,557 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 130 [2018-10-26 23:18:07,558 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:18:07,564 INFO L225 Difference]: With dead ends: 1419 [2018-10-26 23:18:07,564 INFO L226 Difference]: Without dead ends: 1417 [2018-10-26 23:18:07,565 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-10-26 23:18:07,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1417 states. [2018-10-26 23:18:07,633 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1417 to 1358. [2018-10-26 23:18:07,634 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1358 states. [2018-10-26 23:18:07,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1358 states to 1358 states and 1756 transitions. [2018-10-26 23:18:07,638 INFO L78 Accepts]: Start accepts. Automaton has 1358 states and 1756 transitions. Word has length 130 [2018-10-26 23:18:07,639 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:18:07,639 INFO L481 AbstractCegarLoop]: Abstraction has 1358 states and 1756 transitions. [2018-10-26 23:18:07,639 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-26 23:18:07,639 INFO L276 IsEmpty]: Start isEmpty. Operand 1358 states and 1756 transitions. [2018-10-26 23:18:07,641 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-10-26 23:18:07,641 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:18:07,641 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:18:07,644 INFO L424 AbstractCegarLoop]: === Iteration 16 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:18:07,644 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:18:07,644 INFO L82 PathProgramCache]: Analyzing trace with hash -2007180510, now seen corresponding path program 1 times [2018-10-26 23:18:07,644 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 23:18:07,645 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:18:07,645 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:18:07,645 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:18:07,646 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 23:18:07,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:18:07,798 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-10-26 23:18:07,799 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:18:07,799 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-26 23:18:07,799 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 23:18:07,799 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-26 23:18:07,799 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-26 23:18:07,800 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-10-26 23:18:07,800 INFO L87 Difference]: Start difference. First operand 1358 states and 1756 transitions. Second operand 9 states. [2018-10-26 23:18:09,466 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:18:09,467 INFO L93 Difference]: Finished difference Result 2810 states and 3600 transitions. [2018-10-26 23:18:09,467 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-10-26 23:18:09,468 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 131 [2018-10-26 23:18:09,468 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:18:09,476 INFO L225 Difference]: With dead ends: 2810 [2018-10-26 23:18:09,476 INFO L226 Difference]: Without dead ends: 1758 [2018-10-26 23:18:09,480 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=67, Invalid=275, Unknown=0, NotChecked=0, Total=342 [2018-10-26 23:18:09,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1758 states. [2018-10-26 23:18:09,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1758 to 1478. [2018-10-26 23:18:09,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1478 states. [2018-10-26 23:18:09,560 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1478 states to 1478 states and 1883 transitions. [2018-10-26 23:18:09,560 INFO L78 Accepts]: Start accepts. Automaton has 1478 states and 1883 transitions. Word has length 131 [2018-10-26 23:18:09,561 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:18:09,561 INFO L481 AbstractCegarLoop]: Abstraction has 1478 states and 1883 transitions. [2018-10-26 23:18:09,561 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-26 23:18:09,561 INFO L276 IsEmpty]: Start isEmpty. Operand 1478 states and 1883 transitions. [2018-10-26 23:18:09,565 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2018-10-26 23:18:09,565 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:18:09,565 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:18:09,565 INFO L424 AbstractCegarLoop]: === Iteration 17 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:18:09,566 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:18:09,566 INFO L82 PathProgramCache]: Analyzing trace with hash 512775089, now seen corresponding path program 1 times [2018-10-26 23:18:09,566 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 23:18:09,567 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:18:09,567 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:18:09,567 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:18:09,567 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 23:18:09,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:18:10,259 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-10-26 23:18:10,259 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:18:10,260 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-10-26 23:18:10,260 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 23:18:10,260 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-10-26 23:18:10,260 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-10-26 23:18:10,260 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-10-26 23:18:10,261 INFO L87 Difference]: Start difference. First operand 1478 states and 1883 transitions. Second operand 10 states. [2018-10-26 23:18:12,568 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:18:12,568 INFO L93 Difference]: Finished difference Result 3884 states and 4926 transitions. [2018-10-26 23:18:12,582 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-10-26 23:18:12,582 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 135 [2018-10-26 23:18:12,582 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:18:12,593 INFO L225 Difference]: With dead ends: 3884 [2018-10-26 23:18:12,593 INFO L226 Difference]: Without dead ends: 2754 [2018-10-26 23:18:12,597 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=92, Invalid=460, Unknown=0, NotChecked=0, Total=552 [2018-10-26 23:18:12,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2754 states. [2018-10-26 23:18:12,712 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2754 to 1903. [2018-10-26 23:18:12,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1903 states. [2018-10-26 23:18:12,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1903 states to 1903 states and 2413 transitions. [2018-10-26 23:18:12,719 INFO L78 Accepts]: Start accepts. Automaton has 1903 states and 2413 transitions. Word has length 135 [2018-10-26 23:18:12,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:18:12,719 INFO L481 AbstractCegarLoop]: Abstraction has 1903 states and 2413 transitions. [2018-10-26 23:18:12,719 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-10-26 23:18:12,719 INFO L276 IsEmpty]: Start isEmpty. Operand 1903 states and 2413 transitions. [2018-10-26 23:18:12,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2018-10-26 23:18:12,721 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:18:12,724 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:18:12,724 INFO L424 AbstractCegarLoop]: === Iteration 18 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:18:12,724 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:18:12,724 INFO L82 PathProgramCache]: Analyzing trace with hash 2115029633, now seen corresponding path program 1 times [2018-10-26 23:18:12,725 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 23:18:12,726 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:18:12,726 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:18:12,726 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:18:12,726 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 23:18:12,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:18:12,901 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-10-26 23:18:12,901 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:18:12,902 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-26 23:18:12,902 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 23:18:12,902 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-26 23:18:12,902 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-26 23:18:12,902 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-26 23:18:12,903 INFO L87 Difference]: Start difference. First operand 1903 states and 2413 transitions. Second operand 5 states. [2018-10-26 23:18:13,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:18:13,351 INFO L93 Difference]: Finished difference Result 6583 states and 8459 transitions. [2018-10-26 23:18:13,352 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-26 23:18:13,352 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 136 [2018-10-26 23:18:13,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:18:13,371 INFO L225 Difference]: With dead ends: 6583 [2018-10-26 23:18:13,371 INFO L226 Difference]: Without dead ends: 4973 [2018-10-26 23:18:13,376 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-10-26 23:18:13,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4973 states. [2018-10-26 23:18:13,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4973 to 4513. [2018-10-26 23:18:13,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4513 states. [2018-10-26 23:18:13,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4513 states to 4513 states and 5743 transitions. [2018-10-26 23:18:13,618 INFO L78 Accepts]: Start accepts. Automaton has 4513 states and 5743 transitions. Word has length 136 [2018-10-26 23:18:13,619 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:18:13,619 INFO L481 AbstractCegarLoop]: Abstraction has 4513 states and 5743 transitions. [2018-10-26 23:18:13,619 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-26 23:18:13,619 INFO L276 IsEmpty]: Start isEmpty. Operand 4513 states and 5743 transitions. [2018-10-26 23:18:13,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2018-10-26 23:18:13,623 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:18:13,624 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:18:13,624 INFO L424 AbstractCegarLoop]: === Iteration 19 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:18:13,624 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:18:13,624 INFO L82 PathProgramCache]: Analyzing trace with hash 48959050, now seen corresponding path program 1 times [2018-10-26 23:18:13,624 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 23:18:13,628 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:18:13,628 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:18:13,628 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:18:13,628 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 23:18:13,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:18:13,879 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-10-26 23:18:13,880 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:18:13,880 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-26 23:18:13,880 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 23:18:13,880 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-26 23:18:13,880 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-26 23:18:13,880 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-10-26 23:18:13,881 INFO L87 Difference]: Start difference. First operand 4513 states and 5743 transitions. Second operand 9 states. [2018-10-26 23:18:15,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:18:15,172 INFO L93 Difference]: Finished difference Result 8673 states and 11307 transitions. [2018-10-26 23:18:15,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-10-26 23:18:15,173 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 137 [2018-10-26 23:18:15,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:18:15,192 INFO L225 Difference]: With dead ends: 8673 [2018-10-26 23:18:15,192 INFO L226 Difference]: Without dead ends: 4626 [2018-10-26 23:18:15,204 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=53, Invalid=187, Unknown=0, NotChecked=0, Total=240 [2018-10-26 23:18:15,208 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4626 states. [2018-10-26 23:18:15,415 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4626 to 3693. [2018-10-26 23:18:15,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3693 states. [2018-10-26 23:18:15,424 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3693 states to 3693 states and 4744 transitions. [2018-10-26 23:18:15,425 INFO L78 Accepts]: Start accepts. Automaton has 3693 states and 4744 transitions. Word has length 137 [2018-10-26 23:18:15,426 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:18:15,426 INFO L481 AbstractCegarLoop]: Abstraction has 3693 states and 4744 transitions. [2018-10-26 23:18:15,426 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-26 23:18:15,426 INFO L276 IsEmpty]: Start isEmpty. Operand 3693 states and 4744 transitions. [2018-10-26 23:18:15,428 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2018-10-26 23:18:15,428 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:18:15,428 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:18:15,429 INFO L424 AbstractCegarLoop]: === Iteration 20 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:18:15,429 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:18:15,429 INFO L82 PathProgramCache]: Analyzing trace with hash 1321465495, now seen corresponding path program 1 times [2018-10-26 23:18:15,429 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 23:18:15,434 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:18:15,435 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:18:15,435 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:18:15,435 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 23:18:15,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:18:15,774 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-10-26 23:18:15,774 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:18:15,774 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-26 23:18:15,774 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 23:18:15,775 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-26 23:18:15,775 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-26 23:18:15,775 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-10-26 23:18:15,775 INFO L87 Difference]: Start difference. First operand 3693 states and 4744 transitions. Second operand 9 states. [2018-10-26 23:18:17,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:18:17,148 INFO L93 Difference]: Finished difference Result 7498 states and 9785 transitions. [2018-10-26 23:18:17,149 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-10-26 23:18:17,149 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 138 [2018-10-26 23:18:17,149 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:18:17,164 INFO L225 Difference]: With dead ends: 7498 [2018-10-26 23:18:17,164 INFO L226 Difference]: Without dead ends: 4171 [2018-10-26 23:18:17,172 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=59, Invalid=213, Unknown=0, NotChecked=0, Total=272 [2018-10-26 23:18:17,176 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4171 states. [2018-10-26 23:18:17,406 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4171 to 3390. [2018-10-26 23:18:17,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3390 states. [2018-10-26 23:18:17,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3390 states to 3390 states and 4297 transitions. [2018-10-26 23:18:17,414 INFO L78 Accepts]: Start accepts. Automaton has 3390 states and 4297 transitions. Word has length 138 [2018-10-26 23:18:17,414 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:18:17,415 INFO L481 AbstractCegarLoop]: Abstraction has 3390 states and 4297 transitions. [2018-10-26 23:18:17,415 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-26 23:18:17,415 INFO L276 IsEmpty]: Start isEmpty. Operand 3390 states and 4297 transitions. [2018-10-26 23:18:17,417 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-10-26 23:18:17,417 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:18:17,417 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:18:17,420 INFO L424 AbstractCegarLoop]: === Iteration 21 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:18:17,420 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:18:17,420 INFO L82 PathProgramCache]: Analyzing trace with hash -1232509940, now seen corresponding path program 1 times [2018-10-26 23:18:17,420 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 23:18:17,422 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:18:17,422 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:18:17,423 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:18:17,423 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 23:18:17,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:18:17,718 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-10-26 23:18:17,718 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:18:17,718 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-26 23:18:17,718 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 23:18:17,719 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-26 23:18:17,719 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-26 23:18:17,719 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-26 23:18:17,719 INFO L87 Difference]: Start difference. First operand 3390 states and 4297 transitions. Second operand 5 states. [2018-10-26 23:18:18,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:18:18,442 INFO L93 Difference]: Finished difference Result 10446 states and 13373 transitions. [2018-10-26 23:18:18,443 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-26 23:18:18,443 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 139 [2018-10-26 23:18:18,443 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:18:18,489 INFO L225 Difference]: With dead ends: 10446 [2018-10-26 23:18:18,491 INFO L226 Difference]: Without dead ends: 7566 [2018-10-26 23:18:18,505 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-10-26 23:18:18,512 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7566 states. [2018-10-26 23:18:18,957 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7566 to 5197. [2018-10-26 23:18:18,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5197 states. [2018-10-26 23:18:18,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5197 states to 5197 states and 6579 transitions. [2018-10-26 23:18:18,966 INFO L78 Accepts]: Start accepts. Automaton has 5197 states and 6579 transitions. Word has length 139 [2018-10-26 23:18:18,967 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:18:18,967 INFO L481 AbstractCegarLoop]: Abstraction has 5197 states and 6579 transitions. [2018-10-26 23:18:18,967 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-26 23:18:18,967 INFO L276 IsEmpty]: Start isEmpty. Operand 5197 states and 6579 transitions. [2018-10-26 23:18:18,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-10-26 23:18:18,972 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:18:18,972 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:18:18,972 INFO L424 AbstractCegarLoop]: === Iteration 22 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:18:18,973 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:18:18,973 INFO L82 PathProgramCache]: Analyzing trace with hash -167362415, now seen corresponding path program 1 times [2018-10-26 23:18:18,973 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 23:18:18,974 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:18:18,974 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:18:18,974 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:18:18,974 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 23:18:18,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:18:19,259 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-10-26 23:18:19,259 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:18:19,259 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-26 23:18:19,259 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 23:18:19,261 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-26 23:18:19,261 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-26 23:18:19,261 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-26 23:18:19,261 INFO L87 Difference]: Start difference. First operand 5197 states and 6579 transitions. Second operand 5 states. [2018-10-26 23:18:20,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:18:20,522 INFO L93 Difference]: Finished difference Result 12066 states and 15343 transitions. [2018-10-26 23:18:20,523 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-26 23:18:20,523 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 139 [2018-10-26 23:18:20,524 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:18:20,548 INFO L225 Difference]: With dead ends: 12066 [2018-10-26 23:18:20,548 INFO L226 Difference]: Without dead ends: 7514 [2018-10-26 23:18:20,560 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-10-26 23:18:20,565 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7514 states. [2018-10-26 23:18:21,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7514 to 6962. [2018-10-26 23:18:21,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6962 states. [2018-10-26 23:18:21,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6962 states to 6962 states and 8766 transitions. [2018-10-26 23:18:21,054 INFO L78 Accepts]: Start accepts. Automaton has 6962 states and 8766 transitions. Word has length 139 [2018-10-26 23:18:21,054 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:18:21,055 INFO L481 AbstractCegarLoop]: Abstraction has 6962 states and 8766 transitions. [2018-10-26 23:18:21,055 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-26 23:18:21,055 INFO L276 IsEmpty]: Start isEmpty. Operand 6962 states and 8766 transitions. [2018-10-26 23:18:21,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2018-10-26 23:18:21,057 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:18:21,058 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:18:21,059 INFO L424 AbstractCegarLoop]: === Iteration 23 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:18:21,059 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:18:21,059 INFO L82 PathProgramCache]: Analyzing trace with hash -309879282, now seen corresponding path program 1 times [2018-10-26 23:18:21,059 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 23:18:21,060 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:18:21,060 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:18:21,060 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:18:21,060 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 23:18:21,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:18:21,153 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-10-26 23:18:21,153 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:18:21,154 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-26 23:18:21,154 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 23:18:21,154 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-26 23:18:21,154 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-26 23:18:21,154 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-26 23:18:21,154 INFO L87 Difference]: Start difference. First operand 6962 states and 8766 transitions. Second operand 3 states. [2018-10-26 23:18:22,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:18:22,258 INFO L93 Difference]: Finished difference Result 13412 states and 16966 transitions. [2018-10-26 23:18:22,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-26 23:18:22,259 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 140 [2018-10-26 23:18:22,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:18:22,279 INFO L225 Difference]: With dead ends: 13412 [2018-10-26 23:18:22,279 INFO L226 Difference]: Without dead ends: 7031 [2018-10-26 23:18:22,293 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-26 23:18:22,301 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7031 states. [2018-10-26 23:18:22,830 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7031 to 6968. [2018-10-26 23:18:22,830 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6968 states. [2018-10-26 23:18:22,838 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6968 states to 6968 states and 8772 transitions. [2018-10-26 23:18:22,840 INFO L78 Accepts]: Start accepts. Automaton has 6968 states and 8772 transitions. Word has length 140 [2018-10-26 23:18:22,840 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:18:22,840 INFO L481 AbstractCegarLoop]: Abstraction has 6968 states and 8772 transitions. [2018-10-26 23:18:22,840 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-26 23:18:22,840 INFO L276 IsEmpty]: Start isEmpty. Operand 6968 states and 8772 transitions. [2018-10-26 23:18:22,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2018-10-26 23:18:22,842 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:18:22,843 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:18:22,843 INFO L424 AbstractCegarLoop]: === Iteration 24 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:18:22,844 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:18:22,845 INFO L82 PathProgramCache]: Analyzing trace with hash -722562067, now seen corresponding path program 1 times [2018-10-26 23:18:22,845 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 23:18:22,846 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:18:22,846 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:18:22,846 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:18:22,846 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 23:18:22,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:18:23,151 WARN L179 SmtUtils]: Spent 175.00 ms on a formula simplification. DAG size of input: 10 DAG size of output: 7 [2018-10-26 23:18:23,335 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-10-26 23:18:23,335 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:18:23,335 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-10-26 23:18:23,335 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 23:18:23,336 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-10-26 23:18:23,336 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-10-26 23:18:23,336 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2018-10-26 23:18:23,336 INFO L87 Difference]: Start difference. First operand 6968 states and 8772 transitions. Second operand 11 states. [2018-10-26 23:18:25,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:18:25,332 INFO L93 Difference]: Finished difference Result 13345 states and 16866 transitions. [2018-10-26 23:18:25,333 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-10-26 23:18:25,333 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 141 [2018-10-26 23:18:25,333 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:18:25,354 INFO L225 Difference]: With dead ends: 13345 [2018-10-26 23:18:25,354 INFO L226 Difference]: Without dead ends: 6532 [2018-10-26 23:18:25,369 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 84 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=140, Invalid=460, Unknown=0, NotChecked=0, Total=600 [2018-10-26 23:18:25,375 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6532 states. [2018-10-26 23:18:25,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6532 to 6480. [2018-10-26 23:18:25,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6480 states. [2018-10-26 23:18:25,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6480 states to 6480 states and 8185 transitions. [2018-10-26 23:18:25,938 INFO L78 Accepts]: Start accepts. Automaton has 6480 states and 8185 transitions. Word has length 141 [2018-10-26 23:18:25,938 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:18:25,938 INFO L481 AbstractCegarLoop]: Abstraction has 6480 states and 8185 transitions. [2018-10-26 23:18:25,938 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-10-26 23:18:25,938 INFO L276 IsEmpty]: Start isEmpty. Operand 6480 states and 8185 transitions. [2018-10-26 23:18:25,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2018-10-26 23:18:25,940 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:18:25,940 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:18:25,940 INFO L424 AbstractCegarLoop]: === Iteration 25 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:18:25,940 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:18:25,941 INFO L82 PathProgramCache]: Analyzing trace with hash -1198617235, now seen corresponding path program 1 times [2018-10-26 23:18:25,941 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 23:18:25,946 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:18:25,946 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:18:25,946 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:18:25,946 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 23:18:25,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:18:26,231 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-10-26 23:18:26,232 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:18:26,232 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-10-26 23:18:26,232 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 23:18:26,232 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-10-26 23:18:26,232 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-10-26 23:18:26,233 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2018-10-26 23:18:26,233 INFO L87 Difference]: Start difference. First operand 6480 states and 8185 transitions. Second operand 10 states. [2018-10-26 23:18:28,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:18:28,036 INFO L93 Difference]: Finished difference Result 12811 states and 16228 transitions. [2018-10-26 23:18:28,037 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-10-26 23:18:28,037 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 142 [2018-10-26 23:18:28,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:18:28,057 INFO L225 Difference]: With dead ends: 12811 [2018-10-26 23:18:28,057 INFO L226 Difference]: Without dead ends: 6598 [2018-10-26 23:18:28,070 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=113, Invalid=349, Unknown=0, NotChecked=0, Total=462 [2018-10-26 23:18:28,076 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6598 states. [2018-10-26 23:18:28,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6598 to 6270. [2018-10-26 23:18:28,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6270 states. [2018-10-26 23:18:28,752 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6270 states to 6270 states and 7907 transitions. [2018-10-26 23:18:28,754 INFO L78 Accepts]: Start accepts. Automaton has 6270 states and 7907 transitions. Word has length 142 [2018-10-26 23:18:28,754 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:18:28,755 INFO L481 AbstractCegarLoop]: Abstraction has 6270 states and 7907 transitions. [2018-10-26 23:18:28,755 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-10-26 23:18:28,755 INFO L276 IsEmpty]: Start isEmpty. Operand 6270 states and 7907 transitions. [2018-10-26 23:18:28,756 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2018-10-26 23:18:28,756 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:18:28,756 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:18:28,757 INFO L424 AbstractCegarLoop]: === Iteration 26 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:18:28,760 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:18:28,760 INFO L82 PathProgramCache]: Analyzing trace with hash 1155351133, now seen corresponding path program 1 times [2018-10-26 23:18:28,760 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 23:18:28,761 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:18:28,761 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:18:28,761 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:18:28,761 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 23:18:28,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:18:28,935 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-10-26 23:18:28,935 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:18:28,935 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-26 23:18:28,935 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 23:18:28,938 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-26 23:18:28,938 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-26 23:18:28,938 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-26 23:18:28,938 INFO L87 Difference]: Start difference. First operand 6270 states and 7907 transitions. Second operand 4 states. [2018-10-26 23:18:29,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:18:29,549 INFO L93 Difference]: Finished difference Result 12235 states and 15491 transitions. [2018-10-26 23:18:29,550 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-26 23:18:29,550 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 143 [2018-10-26 23:18:29,550 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:18:29,568 INFO L225 Difference]: With dead ends: 12235 [2018-10-26 23:18:29,568 INFO L226 Difference]: Without dead ends: 6232 [2018-10-26 23:18:29,579 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-26 23:18:29,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6232 states. [2018-10-26 23:18:30,070 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6232 to 6138. [2018-10-26 23:18:30,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6138 states. [2018-10-26 23:18:30,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6138 states to 6138 states and 7751 transitions. [2018-10-26 23:18:30,081 INFO L78 Accepts]: Start accepts. Automaton has 6138 states and 7751 transitions. Word has length 143 [2018-10-26 23:18:30,082 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:18:30,082 INFO L481 AbstractCegarLoop]: Abstraction has 6138 states and 7751 transitions. [2018-10-26 23:18:30,082 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-26 23:18:30,083 INFO L276 IsEmpty]: Start isEmpty. Operand 6138 states and 7751 transitions. [2018-10-26 23:18:30,089 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 236 [2018-10-26 23:18:30,089 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:18:30,089 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:18:30,089 INFO L424 AbstractCegarLoop]: === Iteration 27 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:18:30,090 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:18:30,090 INFO L82 PathProgramCache]: Analyzing trace with hash -207691691, now seen corresponding path program 1 times [2018-10-26 23:18:30,090 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 23:18:30,091 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:18:30,091 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:18:30,091 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 23:18:30,091 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 23:18:30,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:18:30,915 INFO L134 CoverageAnalysis]: Checked inductivity of 117 backedges. 12 proven. 23 refuted. 0 times theorem prover too weak. 82 trivial. 0 not checked. [2018-10-26 23:18:30,916 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-26 23:18:30,916 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-26 23:18:30,917 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 236 with the following transitions: [2018-10-26 23:18:30,919 INFO L202 CegarAbsIntRunner]: [0], [4], [7], [15], [16], [42], [45], [82], [86], [89], [93], [96], [100], [101], [105], [109], [113], [117], [121], [125], [129], [133], [137], [141], [145], [149], [150], [160], [161], [162], [166], [171], [173], [178], [180], [185], [187], [247], [248], [250], [254], [260], [265], [267], [269], [275], [278], [287], [289], [356], [359], [362], [364], [367], [369], [372], [390], [393], [424], [427], [468], [470], [471], [472], [476], [480], [483], [487], [488], [489], [490], [491], [492], [493], [497], [500], [508], [509], [512], [514], [517], [519], [520], [522], [525], [527], [532], [543], [546], [550], [554], [557], [565], [566], [569], [570], [574], [577], [581], [582], [583], [584], [585], [588], [589], [592], [593], [596], [597], [598], [599], [600], [601], [602], [603], [604], [605], [606], [607], [608], [609], [610], [611], [620], [621], [622], [623], [624], [625], [628], [629], [636], [637], [652], [653], [656], [657], [658], [659], [660], [661], [662] [2018-10-26 23:18:30,976 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-10-26 23:18:30,976 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-10-26 23:18:31,055 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: Sort ~port_t~0 not declared at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.extractInterpolants(BaseRefinementStrategy.java:391) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.handleInfeasibleCase(BaseRefinementStrategy.java:296) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:206) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:70) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:429) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:435) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:376) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:312) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:123) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:316) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) Caused by: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: Sort ~port_t~0 not declared at de.uni_freiburg.informatik.ultimate.logic.NoopScript.sort(NoopScript.java:289) at de.uni_freiburg.informatik.ultimate.logic.NoopScript.sort(NoopScript.java:278) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.SmtSortUtils.getNamedSort(SmtSortUtils.java:118) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.TypeSortTranslator.constructSort(TypeSortTranslator.java:253) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.util.FakeBoogieVar.(FakeBoogieVar.java:60) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.util.AbsIntUtil.createTemporaryIBoogieVar(AbsIntUtil.java:347) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.relational.octagon.OctStatementProcessor.processAssignmentStatement(OctStatementProcessor.java:105) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.relational.octagon.OctStatementProcessor.processStatement(OctStatementProcessor.java:65) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.relational.octagon.OctPostOperator.applyCall(OctPostOperator.java:251) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.relational.octagon.OctPostOperator.apply(OctPostOperator.java:214) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.relational.octagon.OctPostOperator.apply(OctPostOperator.java:1) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.compound.CompoundDomainPostOperator.applyInternally(CompoundDomainPostOperator.java:311) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.compound.CompoundDomainPostOperator.apply(CompoundDomainPostOperator.java:276) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.compound.CompoundDomainPostOperator.apply(CompoundDomainPostOperator.java:1) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.transformula.poorman.PoormansAbstractPostOperator.handleCallTransition(PoormansAbstractPostOperator.java:185) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.transformula.poorman.PoormansAbstractPostOperator.apply(PoormansAbstractPostOperator.java:165) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.transformula.poorman.PoormansAbstractPostOperator.apply(PoormansAbstractPostOperator.java:1) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.absint.DisjunctiveAbstractState.lambda$18(DisjunctiveAbstractState.java:339) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.absint.DisjunctiveAbstractState.crossProductCollection(DisjunctiveAbstractState.java:507) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.absint.DisjunctiveAbstractState.apply(DisjunctiveAbstractState.java:339) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.algorithm.FixpointEngine.calculateAbstractPost(FixpointEngine.java:243) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.algorithm.FixpointEngine.calculateFixpoint(FixpointEngine.java:134) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.algorithm.FixpointEngine.run(FixpointEngine.java:105) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.tool.AbstractInterpreter.runWithoutTimeoutAndResults(AbstractInterpreter.java:149) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarAbsIntRunner.generateFixpoints(CegarAbsIntRunner.java:217) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseTaipanRefinementStrategy.constructInterpolantGenerator(BaseTaipanRefinementStrategy.java:385) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseTaipanRefinementStrategy.getInterpolantGenerator(BaseTaipanRefinementStrategy.java:226) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.extractInterpolants(BaseRefinementStrategy.java:380) ... 20 more [2018-10-26 23:18:31,071 INFO L168 Benchmark]: Toolchain (without parser) took 50076.46 ms. Allocated memory was 1.0 GB in the beginning and 2.0 GB in the end (delta: 935.3 MB). Free memory was 964.5 MB in the beginning and 1.7 GB in the end (delta: -757.6 MB). Peak memory consumption was 177.8 MB. Max. memory is 11.5 GB. [2018-10-26 23:18:31,072 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 982.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-10-26 23:18:31,073 INFO L168 Benchmark]: CACSL2BoogieTranslator took 362.90 ms. Allocated memory is still 1.0 GB. Free memory was 959.1 MB in the beginning and 943.0 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. [2018-10-26 23:18:31,074 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.29 ms. Allocated memory is still 1.0 GB. Free memory is still 943.0 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-10-26 23:18:31,074 INFO L168 Benchmark]: Boogie Preprocessor took 165.93 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 133.2 MB). Free memory was 943.0 MB in the beginning and 1.1 GB in the end (delta: -183.1 MB). Peak memory consumption was 16.0 MB. Max. memory is 11.5 GB. [2018-10-26 23:18:31,075 INFO L168 Benchmark]: RCFGBuilder took 1455.52 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 65.4 MB). Peak memory consumption was 65.4 MB. Max. memory is 11.5 GB. [2018-10-26 23:18:31,075 INFO L168 Benchmark]: TraceAbstraction took 48051.62 ms. Allocated memory was 1.2 GB in the beginning and 2.0 GB in the end (delta: 802.2 MB). Free memory was 1.1 GB in the beginning and 1.7 GB in the end (delta: -661.3 MB). Peak memory consumption was 140.8 MB. Max. memory is 11.5 GB. [2018-10-26 23:18:31,087 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 982.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 362.90 ms. Allocated memory is still 1.0 GB. Free memory was 959.1 MB in the beginning and 943.0 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.29 ms. Allocated memory is still 1.0 GB. Free memory is still 943.0 MB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 165.93 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 133.2 MB). Free memory was 943.0 MB in the beginning and 1.1 GB in the end (delta: -183.1 MB). Peak memory consumption was 16.0 MB. Max. memory is 11.5 GB. * RCFGBuilder took 1455.52 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 65.4 MB). Peak memory consumption was 65.4 MB. Max. memory is 11.5 GB. * TraceAbstraction took 48051.62 ms. Allocated memory was 1.2 GB in the beginning and 2.0 GB in the end (delta: 802.2 MB). Free memory was 1.1 GB in the beginning and 1.7 GB in the end (delta: -661.3 MB). Peak memory consumption was 140.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: AssertionError: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: Sort ~port_t~0 not declared de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: Sort ~port_t~0 not declared: de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.extractInterpolants(BaseRefinementStrategy.java:391) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-1dbac8b [2018-10-26 23:18:33,297 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-10-26 23:18:33,299 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-10-26 23:18:33,310 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-10-26 23:18:33,311 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-10-26 23:18:33,313 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-10-26 23:18:33,316 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-10-26 23:18:33,318 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-10-26 23:18:33,320 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-10-26 23:18:33,324 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-10-26 23:18:33,326 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-10-26 23:18:33,326 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-10-26 23:18:33,327 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-10-26 23:18:33,328 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-10-26 23:18:33,329 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-10-26 23:18:33,330 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-10-26 23:18:33,330 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-10-26 23:18:33,332 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-10-26 23:18:33,342 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-10-26 23:18:33,343 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-10-26 23:18:33,344 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-10-26 23:18:33,345 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-10-26 23:18:33,351 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-10-26 23:18:33,354 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-10-26 23:18:33,355 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-10-26 23:18:33,356 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-10-26 23:18:33,356 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-10-26 23:18:33,357 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-10-26 23:18:33,358 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-10-26 23:18:33,358 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-10-26 23:18:33,359 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-10-26 23:18:33,359 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-10-26 23:18:33,359 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-10-26 23:18:33,360 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-10-26 23:18:33,360 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-10-26 23:18:33,361 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-10-26 23:18:33,361 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Bitvector.epf [2018-10-26 23:18:33,384 INFO L110 SettingsManager]: Loading preferences was successful [2018-10-26 23:18:33,388 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-10-26 23:18:33,389 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-10-26 23:18:33,389 INFO L133 SettingsManager]: * User list type=DISABLED [2018-10-26 23:18:33,390 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-10-26 23:18:33,390 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-10-26 23:18:33,390 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-10-26 23:18:33,391 INFO L133 SettingsManager]: * Interval Domain=false [2018-10-26 23:18:33,392 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-10-26 23:18:33,393 INFO L133 SettingsManager]: * sizeof long=4 [2018-10-26 23:18:33,393 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-10-26 23:18:33,393 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-10-26 23:18:33,393 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-10-26 23:18:33,393 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-10-26 23:18:33,394 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-10-26 23:18:33,394 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-10-26 23:18:33,394 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-10-26 23:18:33,395 INFO L133 SettingsManager]: * sizeof long double=12 [2018-10-26 23:18:33,395 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-10-26 23:18:33,395 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-10-26 23:18:33,395 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-10-26 23:18:33,395 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-10-26 23:18:33,395 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-10-26 23:18:33,396 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-10-26 23:18:33,396 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-26 23:18:33,396 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-10-26 23:18:33,396 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-10-26 23:18:33,396 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-10-26 23:18:33,396 INFO L133 SettingsManager]: * Trace refinement strategy=WALRUS [2018-10-26 23:18:33,396 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-10-26 23:18:33,397 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-10-26 23:18:33,397 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-10-26 23:18:33,397 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2b1be4311b85b6fe57410228c7ae2544fffadecc [2018-10-26 23:18:33,440 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-10-26 23:18:33,451 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-10-26 23:18:33,455 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-10-26 23:18:33,456 INFO L271 PluginConnector]: Initializing CDTParser... [2018-10-26 23:18:33,457 INFO L276 PluginConnector]: CDTParser initialized [2018-10-26 23:18:33,458 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_1.ufo.BOUNDED-10.pals.c [2018-10-26 23:18:33,511 INFO L218 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/data/5b9e77c5c/db208030ebb44b149a00c850154a0a12/FLAG1765b3d93 [2018-10-26 23:18:34,007 INFO L298 CDTParser]: Found 1 translation units. [2018-10-26 23:18:34,007 INFO L158 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_1.ufo.BOUNDED-10.pals.c [2018-10-26 23:18:34,019 INFO L346 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/data/5b9e77c5c/db208030ebb44b149a00c850154a0a12/FLAG1765b3d93 [2018-10-26 23:18:34,032 INFO L354 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/data/5b9e77c5c/db208030ebb44b149a00c850154a0a12 [2018-10-26 23:18:34,036 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-10-26 23:18:34,038 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-10-26 23:18:34,039 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-10-26 23:18:34,039 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-10-26 23:18:34,043 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-10-26 23:18:34,044 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.10 11:18:34" (1/1) ... [2018-10-26 23:18:34,047 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1dee2376 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 11:18:34, skipping insertion in model container [2018-10-26 23:18:34,047 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.10 11:18:34" (1/1) ... [2018-10-26 23:18:34,057 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-10-26 23:18:34,101 INFO L174 MainTranslator]: Built tables and reachable declarations [2018-10-26 23:18:34,379 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-26 23:18:34,398 INFO L189 MainTranslator]: Completed pre-run [2018-10-26 23:18:34,524 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-26 23:18:34,554 INFO L193 MainTranslator]: Completed translation [2018-10-26 23:18:34,555 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 11:18:34 WrapperNode [2018-10-26 23:18:34,555 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-10-26 23:18:34,556 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-10-26 23:18:34,556 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-10-26 23:18:34,556 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-10-26 23:18:34,566 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 11:18:34" (1/1) ... [2018-10-26 23:18:34,580 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 11:18:34" (1/1) ... [2018-10-26 23:18:34,587 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-10-26 23:18:34,588 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-10-26 23:18:34,588 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-10-26 23:18:34,588 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-10-26 23:18:34,595 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 11:18:34" (1/1) ... [2018-10-26 23:18:34,595 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 11:18:34" (1/1) ... [2018-10-26 23:18:34,601 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 11:18:34" (1/1) ... [2018-10-26 23:18:34,602 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 11:18:34" (1/1) ... [2018-10-26 23:18:34,620 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 11:18:34" (1/1) ... [2018-10-26 23:18:34,632 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 11:18:34" (1/1) ... [2018-10-26 23:18:34,636 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 11:18:34" (1/1) ... [2018-10-26 23:18:34,640 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-10-26 23:18:34,641 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-10-26 23:18:34,641 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-10-26 23:18:34,641 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-10-26 23:18:34,643 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 11:18:34" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-26 23:18:34,793 INFO L130 BoogieDeclarations]: Found specification of procedure read_manual_selection_history [2018-10-26 23:18:34,793 INFO L138 BoogieDeclarations]: Found implementation of procedure read_manual_selection_history [2018-10-26 23:18:34,794 INFO L130 BoogieDeclarations]: Found specification of procedure Side1_activestandby_task_each_pals_period [2018-10-26 23:18:34,794 INFO L138 BoogieDeclarations]: Found implementation of procedure Side1_activestandby_task_each_pals_period [2018-10-26 23:18:34,794 INFO L130 BoogieDeclarations]: Found specification of procedure write_active_side_history [2018-10-26 23:18:34,794 INFO L138 BoogieDeclarations]: Found implementation of procedure write_active_side_history [2018-10-26 23:18:34,794 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-10-26 23:18:34,794 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-10-26 23:18:34,794 INFO L130 BoogieDeclarations]: Found specification of procedure Console_task_each_pals_period [2018-10-26 23:18:34,795 INFO L138 BoogieDeclarations]: Found implementation of procedure Console_task_each_pals_period [2018-10-26 23:18:34,795 INFO L130 BoogieDeclarations]: Found specification of procedure read_side2_failed_history [2018-10-26 23:18:34,795 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side2_failed_history [2018-10-26 23:18:34,795 INFO L130 BoogieDeclarations]: Found specification of procedure assert [2018-10-26 23:18:34,795 INFO L138 BoogieDeclarations]: Found implementation of procedure assert [2018-10-26 23:18:34,795 INFO L130 BoogieDeclarations]: Found specification of procedure Pendulum_prism_task_each_pals_period [2018-10-26 23:18:34,795 INFO L138 BoogieDeclarations]: Found implementation of procedure Pendulum_prism_task_each_pals_period [2018-10-26 23:18:34,796 INFO L130 BoogieDeclarations]: Found specification of procedure write_manual_selection_history [2018-10-26 23:18:34,796 INFO L138 BoogieDeclarations]: Found implementation of procedure write_manual_selection_history [2018-10-26 23:18:34,796 INFO L130 BoogieDeclarations]: Found specification of procedure init [2018-10-26 23:18:34,796 INFO L138 BoogieDeclarations]: Found implementation of procedure init [2018-10-26 23:18:34,796 INFO L130 BoogieDeclarations]: Found specification of procedure flip_the_side [2018-10-26 23:18:34,796 INFO L138 BoogieDeclarations]: Found implementation of procedure flip_the_side [2018-10-26 23:18:34,796 INFO L130 BoogieDeclarations]: Found specification of procedure Side2_activestandby_task_each_pals_period [2018-10-26 23:18:34,797 INFO L138 BoogieDeclarations]: Found implementation of procedure Side2_activestandby_task_each_pals_period [2018-10-26 23:18:34,797 INFO L130 BoogieDeclarations]: Found specification of procedure check [2018-10-26 23:18:34,797 INFO L138 BoogieDeclarations]: Found implementation of procedure check [2018-10-26 23:18:34,797 INFO L130 BoogieDeclarations]: Found specification of procedure write_side1_failed_history [2018-10-26 23:18:34,797 INFO L138 BoogieDeclarations]: Found implementation of procedure write_side1_failed_history [2018-10-26 23:18:34,797 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-10-26 23:18:34,801 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-10-26 23:18:34,801 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-10-26 23:18:34,801 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-10-26 23:18:34,801 INFO L130 BoogieDeclarations]: Found specification of procedure read_side1_failed_history [2018-10-26 23:18:34,801 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side1_failed_history [2018-10-26 23:18:34,801 INFO L130 BoogieDeclarations]: Found specification of procedure read_active_side_history [2018-10-26 23:18:34,802 INFO L138 BoogieDeclarations]: Found implementation of procedure read_active_side_history [2018-10-26 23:18:34,802 INFO L130 BoogieDeclarations]: Found specification of procedure write_side2_failed_history [2018-10-26 23:18:34,802 INFO L138 BoogieDeclarations]: Found implementation of procedure write_side2_failed_history [2018-10-26 23:18:36,219 INFO L341 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-10-26 23:18:36,220 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.10 11:18:36 BoogieIcfgContainer [2018-10-26 23:18:36,220 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-10-26 23:18:36,221 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-10-26 23:18:36,221 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-10-26 23:18:36,224 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-10-26 23:18:36,225 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 26.10 11:18:34" (1/3) ... [2018-10-26 23:18:36,226 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@763ae361 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 26.10 11:18:36, skipping insertion in model container [2018-10-26 23:18:36,226 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 11:18:34" (2/3) ... [2018-10-26 23:18:36,226 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@763ae361 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 26.10 11:18:36, skipping insertion in model container [2018-10-26 23:18:36,226 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.10 11:18:36" (3/3) ... [2018-10-26 23:18:36,228 INFO L112 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby_false-unreach-call.4_1.ufo.BOUNDED-10.pals.c [2018-10-26 23:18:36,237 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-10-26 23:18:36,247 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-10-26 23:18:36,260 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-10-26 23:18:36,288 INFO L135 ementStrategyFactory]: Using default assertion order modulation [2018-10-26 23:18:36,289 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-10-26 23:18:36,290 INFO L383 AbstractCegarLoop]: Hoare is true [2018-10-26 23:18:36,290 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-10-26 23:18:36,290 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-10-26 23:18:36,290 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-10-26 23:18:36,291 INFO L387 AbstractCegarLoop]: Difference is false [2018-10-26 23:18:36,291 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-10-26 23:18:36,291 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-10-26 23:18:36,315 INFO L276 IsEmpty]: Start isEmpty. Operand 236 states. [2018-10-26 23:18:36,325 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-10-26 23:18:36,325 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:18:36,326 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:18:36,328 INFO L424 AbstractCegarLoop]: === Iteration 1 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:18:36,335 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:18:36,335 INFO L82 PathProgramCache]: Analyzing trace with hash 409760090, now seen corresponding path program 1 times [2018-10-26 23:18:36,341 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:18:36,341 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:18:36,360 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:18:36,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:18:36,561 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:18:36,594 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-26 23:18:36,595 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (2)] Exception during sending of exit command (exit): Broken pipe [2018-10-26 23:18:36,602 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:18:36,603 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-26 23:18:36,611 INFO L460 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-10-26 23:18:36,626 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-10-26 23:18:36,627 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-10-26 23:18:36,630 INFO L87 Difference]: Start difference. First operand 236 states. Second operand 2 states. [2018-10-26 23:18:36,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:18:36,707 INFO L93 Difference]: Finished difference Result 450 states and 689 transitions. [2018-10-26 23:18:36,707 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-10-26 23:18:36,709 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 66 [2018-10-26 23:18:36,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:18:36,724 INFO L225 Difference]: With dead ends: 450 [2018-10-26 23:18:36,724 INFO L226 Difference]: Without dead ends: 231 [2018-10-26 23:18:36,731 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-10-26 23:18:36,750 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 231 states. [2018-10-26 23:18:36,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 231 to 231. [2018-10-26 23:18:36,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 231 states. [2018-10-26 23:18:36,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 231 states to 231 states and 333 transitions. [2018-10-26 23:18:36,822 INFO L78 Accepts]: Start accepts. Automaton has 231 states and 333 transitions. Word has length 66 [2018-10-26 23:18:36,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:18:36,824 INFO L481 AbstractCegarLoop]: Abstraction has 231 states and 333 transitions. [2018-10-26 23:18:36,824 INFO L482 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-10-26 23:18:36,824 INFO L276 IsEmpty]: Start isEmpty. Operand 231 states and 333 transitions. [2018-10-26 23:18:36,827 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-10-26 23:18:36,828 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:18:36,828 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:18:36,828 INFO L424 AbstractCegarLoop]: === Iteration 2 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:18:36,829 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:18:36,829 INFO L82 PathProgramCache]: Analyzing trace with hash -2073778980, now seen corresponding path program 1 times [2018-10-26 23:18:36,831 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:18:36,831 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:18:36,857 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:18:37,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:18:37,022 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:18:37,167 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-26 23:18:37,168 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-26 23:18:37,171 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:18:37,171 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-26 23:18:37,173 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-26 23:18:37,173 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-26 23:18:37,174 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-26 23:18:37,174 INFO L87 Difference]: Start difference. First operand 231 states and 333 transitions. Second operand 4 states. [2018-10-26 23:18:37,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:18:37,429 INFO L93 Difference]: Finished difference Result 443 states and 635 transitions. [2018-10-26 23:18:37,430 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-26 23:18:37,431 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2018-10-26 23:18:37,431 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:18:37,433 INFO L225 Difference]: With dead ends: 443 [2018-10-26 23:18:37,434 INFO L226 Difference]: Without dead ends: 231 [2018-10-26 23:18:37,436 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 63 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-26 23:18:37,437 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 231 states. [2018-10-26 23:18:37,457 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 231 to 231. [2018-10-26 23:18:37,457 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 231 states. [2018-10-26 23:18:37,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 231 states to 231 states and 321 transitions. [2018-10-26 23:18:37,460 INFO L78 Accepts]: Start accepts. Automaton has 231 states and 321 transitions. Word has length 66 [2018-10-26 23:18:37,460 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:18:37,461 INFO L481 AbstractCegarLoop]: Abstraction has 231 states and 321 transitions. [2018-10-26 23:18:37,461 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-26 23:18:37,461 INFO L276 IsEmpty]: Start isEmpty. Operand 231 states and 321 transitions. [2018-10-26 23:18:37,464 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-10-26 23:18:37,464 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:18:37,464 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:18:37,465 INFO L424 AbstractCegarLoop]: === Iteration 3 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:18:37,465 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:18:37,465 INFO L82 PathProgramCache]: Analyzing trace with hash -1305350834, now seen corresponding path program 1 times [2018-10-26 23:18:37,466 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:18:37,466 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:18:37,498 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:18:37,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:18:37,655 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:18:37,696 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-26 23:18:37,696 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (4)] Exception during sending of exit command (exit): Broken pipe [2018-10-26 23:18:37,699 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:18:37,700 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-26 23:18:37,700 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-26 23:18:37,700 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-26 23:18:37,701 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-26 23:18:37,701 INFO L87 Difference]: Start difference. First operand 231 states and 321 transitions. Second operand 4 states. [2018-10-26 23:18:37,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:18:37,923 INFO L93 Difference]: Finished difference Result 446 states and 633 transitions. [2018-10-26 23:18:37,924 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-26 23:18:37,924 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 77 [2018-10-26 23:18:37,925 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:18:37,929 INFO L225 Difference]: With dead ends: 446 [2018-10-26 23:18:37,929 INFO L226 Difference]: Without dead ends: 237 [2018-10-26 23:18:37,935 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 74 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-26 23:18:37,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 237 states. [2018-10-26 23:18:37,974 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 237 to 235. [2018-10-26 23:18:37,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 235 states. [2018-10-26 23:18:37,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 235 states to 235 states and 324 transitions. [2018-10-26 23:18:37,977 INFO L78 Accepts]: Start accepts. Automaton has 235 states and 324 transitions. Word has length 77 [2018-10-26 23:18:37,981 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:18:37,982 INFO L481 AbstractCegarLoop]: Abstraction has 235 states and 324 transitions. [2018-10-26 23:18:37,982 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-26 23:18:37,982 INFO L276 IsEmpty]: Start isEmpty. Operand 235 states and 324 transitions. [2018-10-26 23:18:37,988 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-10-26 23:18:37,989 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:18:37,989 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:18:37,989 INFO L424 AbstractCegarLoop]: === Iteration 4 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:18:37,990 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:18:37,990 INFO L82 PathProgramCache]: Analyzing trace with hash -1987778778, now seen corresponding path program 1 times [2018-10-26 23:18:37,990 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:18:37,990 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:18:38,016 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:18:38,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:18:38,187 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:18:38,239 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-26 23:18:38,239 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (5)] Exception during sending of exit command (exit): Broken pipe [2018-10-26 23:18:38,246 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:18:38,247 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-26 23:18:38,247 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-26 23:18:38,247 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-26 23:18:38,248 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-26 23:18:38,248 INFO L87 Difference]: Start difference. First operand 235 states and 324 transitions. Second operand 3 states. [2018-10-26 23:18:38,340 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:18:38,341 INFO L93 Difference]: Finished difference Result 635 states and 894 transitions. [2018-10-26 23:18:38,341 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-26 23:18:38,342 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 95 [2018-10-26 23:18:38,342 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:18:38,345 INFO L225 Difference]: With dead ends: 635 [2018-10-26 23:18:38,346 INFO L226 Difference]: Without dead ends: 422 [2018-10-26 23:18:38,347 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 93 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-26 23:18:38,348 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 422 states. [2018-10-26 23:18:38,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 422 to 403. [2018-10-26 23:18:38,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 403 states. [2018-10-26 23:18:38,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 403 states to 403 states and 568 transitions. [2018-10-26 23:18:38,385 INFO L78 Accepts]: Start accepts. Automaton has 403 states and 568 transitions. Word has length 95 [2018-10-26 23:18:38,386 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:18:38,386 INFO L481 AbstractCegarLoop]: Abstraction has 403 states and 568 transitions. [2018-10-26 23:18:38,387 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-26 23:18:38,387 INFO L276 IsEmpty]: Start isEmpty. Operand 403 states and 568 transitions. [2018-10-26 23:18:38,389 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-10-26 23:18:38,389 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:18:38,389 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:18:38,389 INFO L424 AbstractCegarLoop]: === Iteration 5 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:18:38,391 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:18:38,391 INFO L82 PathProgramCache]: Analyzing trace with hash -605518733, now seen corresponding path program 1 times [2018-10-26 23:18:38,391 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:18:38,391 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:18:38,427 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:18:38,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:18:38,614 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:18:38,690 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-26 23:18:38,690 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-26 23:18:38,693 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:18:38,694 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-26 23:18:38,695 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-26 23:18:38,695 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-26 23:18:38,695 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-26 23:18:38,695 INFO L87 Difference]: Start difference. First operand 403 states and 568 transitions. Second operand 3 states. [2018-10-26 23:18:38,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:18:38,865 INFO L93 Difference]: Finished difference Result 1110 states and 1591 transitions. [2018-10-26 23:18:38,866 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-26 23:18:38,866 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 96 [2018-10-26 23:18:38,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:18:38,872 INFO L225 Difference]: With dead ends: 1110 [2018-10-26 23:18:38,872 INFO L226 Difference]: Without dead ends: 729 [2018-10-26 23:18:38,875 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 94 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-26 23:18:38,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 729 states. [2018-10-26 23:18:38,945 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 729 to 723. [2018-10-26 23:18:38,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 723 states. [2018-10-26 23:18:38,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 723 states to 723 states and 1033 transitions. [2018-10-26 23:18:38,957 INFO L78 Accepts]: Start accepts. Automaton has 723 states and 1033 transitions. Word has length 96 [2018-10-26 23:18:38,958 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:18:38,960 INFO L481 AbstractCegarLoop]: Abstraction has 723 states and 1033 transitions. [2018-10-26 23:18:38,960 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-26 23:18:38,961 INFO L276 IsEmpty]: Start isEmpty. Operand 723 states and 1033 transitions. [2018-10-26 23:18:38,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-10-26 23:18:38,963 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:18:38,963 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:18:38,963 INFO L424 AbstractCegarLoop]: === Iteration 6 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:18:38,963 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:18:38,963 INFO L82 PathProgramCache]: Analyzing trace with hash 95545845, now seen corresponding path program 1 times [2018-10-26 23:18:38,964 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:18:38,964 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:18:38,987 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:18:39,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:18:39,140 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:18:39,204 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-26 23:18:39,205 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-26 23:18:39,208 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:18:39,208 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-26 23:18:39,208 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-26 23:18:39,208 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-26 23:18:39,209 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-26 23:18:39,209 INFO L87 Difference]: Start difference. First operand 723 states and 1033 transitions. Second operand 3 states. [2018-10-26 23:18:39,311 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:18:39,312 INFO L93 Difference]: Finished difference Result 1315 states and 1876 transitions. [2018-10-26 23:18:39,312 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-26 23:18:39,313 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 96 [2018-10-26 23:18:39,314 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:18:39,322 INFO L225 Difference]: With dead ends: 1315 [2018-10-26 23:18:39,324 INFO L226 Difference]: Without dead ends: 582 [2018-10-26 23:18:39,327 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 94 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-26 23:18:39,329 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 582 states. [2018-10-26 23:18:39,360 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 582 to 582. [2018-10-26 23:18:39,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 582 states. [2018-10-26 23:18:39,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 582 states to 582 states and 822 transitions. [2018-10-26 23:18:39,366 INFO L78 Accepts]: Start accepts. Automaton has 582 states and 822 transitions. Word has length 96 [2018-10-26 23:18:39,367 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:18:39,367 INFO L481 AbstractCegarLoop]: Abstraction has 582 states and 822 transitions. [2018-10-26 23:18:39,367 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-26 23:18:39,367 INFO L276 IsEmpty]: Start isEmpty. Operand 582 states and 822 transitions. [2018-10-26 23:18:39,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-10-26 23:18:39,370 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:18:39,371 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:18:39,371 INFO L424 AbstractCegarLoop]: === Iteration 7 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:18:39,371 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:18:39,371 INFO L82 PathProgramCache]: Analyzing trace with hash -30454419, now seen corresponding path program 1 times [2018-10-26 23:18:39,372 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:18:39,373 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:18:39,403 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:18:39,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:18:39,562 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:18:39,703 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-26 23:18:39,704 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (8)] Exception during sending of exit command (exit): Broken pipe [2018-10-26 23:18:39,710 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:18:39,710 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-26 23:18:39,710 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-26 23:18:39,711 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-26 23:18:39,711 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-26 23:18:39,711 INFO L87 Difference]: Start difference. First operand 582 states and 822 transitions. Second operand 4 states. [2018-10-26 23:18:40,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:18:40,034 INFO L93 Difference]: Finished difference Result 1163 states and 1653 transitions. [2018-10-26 23:18:40,035 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-26 23:18:40,035 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 96 [2018-10-26 23:18:40,035 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:18:40,038 INFO L225 Difference]: With dead ends: 1163 [2018-10-26 23:18:40,038 INFO L226 Difference]: Without dead ends: 603 [2018-10-26 23:18:40,040 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 93 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-26 23:18:40,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 603 states. [2018-10-26 23:18:40,061 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 603 to 597. [2018-10-26 23:18:40,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 597 states. [2018-10-26 23:18:40,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 597 states to 597 states and 834 transitions. [2018-10-26 23:18:40,066 INFO L78 Accepts]: Start accepts. Automaton has 597 states and 834 transitions. Word has length 96 [2018-10-26 23:18:40,067 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:18:40,067 INFO L481 AbstractCegarLoop]: Abstraction has 597 states and 834 transitions. [2018-10-26 23:18:40,067 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-26 23:18:40,067 INFO L276 IsEmpty]: Start isEmpty. Operand 597 states and 834 transitions. [2018-10-26 23:18:40,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-10-26 23:18:40,068 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:18:40,068 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:18:40,068 INFO L424 AbstractCegarLoop]: === Iteration 8 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:18:40,069 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:18:40,069 INFO L82 PathProgramCache]: Analyzing trace with hash 513645865, now seen corresponding path program 1 times [2018-10-26 23:18:40,069 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:18:40,069 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:18:40,093 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:18:40,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:18:40,241 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:18:40,381 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-26 23:18:40,381 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-26 23:18:40,384 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:18:40,385 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-26 23:18:40,385 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-26 23:18:40,385 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-26 23:18:40,386 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-26 23:18:40,386 INFO L87 Difference]: Start difference. First operand 597 states and 834 transitions. Second operand 4 states. [2018-10-26 23:18:40,890 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:18:40,890 INFO L93 Difference]: Finished difference Result 1193 states and 1692 transitions. [2018-10-26 23:18:40,891 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-26 23:18:40,891 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 104 [2018-10-26 23:18:40,891 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:18:40,895 INFO L225 Difference]: With dead ends: 1193 [2018-10-26 23:18:40,895 INFO L226 Difference]: Without dead ends: 618 [2018-10-26 23:18:40,898 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 101 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-26 23:18:40,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 618 states. [2018-10-26 23:18:40,922 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 618 to 612. [2018-10-26 23:18:40,922 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 612 states. [2018-10-26 23:18:40,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 612 states to 612 states and 846 transitions. [2018-10-26 23:18:40,927 INFO L78 Accepts]: Start accepts. Automaton has 612 states and 846 transitions. Word has length 104 [2018-10-26 23:18:40,927 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:18:40,927 INFO L481 AbstractCegarLoop]: Abstraction has 612 states and 846 transitions. [2018-10-26 23:18:40,927 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-26 23:18:40,927 INFO L276 IsEmpty]: Start isEmpty. Operand 612 states and 846 transitions. [2018-10-26 23:18:40,929 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-10-26 23:18:40,929 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:18:40,930 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:18:40,931 INFO L424 AbstractCegarLoop]: === Iteration 9 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:18:40,931 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:18:40,931 INFO L82 PathProgramCache]: Analyzing trace with hash 2134960659, now seen corresponding path program 1 times [2018-10-26 23:18:40,932 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:18:40,932 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:18:40,957 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:18:41,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:18:41,115 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:18:41,256 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-26 23:18:41,257 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-26 23:18:41,261 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:18:41,261 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-26 23:18:41,261 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-26 23:18:41,261 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-26 23:18:41,262 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-26 23:18:41,262 INFO L87 Difference]: Start difference. First operand 612 states and 846 transitions. Second operand 4 states. [2018-10-26 23:18:41,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:18:41,669 INFO L93 Difference]: Finished difference Result 1220 states and 1698 transitions. [2018-10-26 23:18:41,670 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-26 23:18:41,670 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 112 [2018-10-26 23:18:41,671 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:18:41,674 INFO L225 Difference]: With dead ends: 1220 [2018-10-26 23:18:41,675 INFO L226 Difference]: Without dead ends: 630 [2018-10-26 23:18:41,677 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 110 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-26 23:18:41,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 630 states. [2018-10-26 23:18:41,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 630 to 624. [2018-10-26 23:18:41,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 624 states. [2018-10-26 23:18:41,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 624 states to 624 states and 855 transitions. [2018-10-26 23:18:41,704 INFO L78 Accepts]: Start accepts. Automaton has 624 states and 855 transitions. Word has length 112 [2018-10-26 23:18:41,705 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:18:41,705 INFO L481 AbstractCegarLoop]: Abstraction has 624 states and 855 transitions. [2018-10-26 23:18:41,705 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-26 23:18:41,705 INFO L276 IsEmpty]: Start isEmpty. Operand 624 states and 855 transitions. [2018-10-26 23:18:41,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-10-26 23:18:41,708 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:18:41,708 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:18:41,708 INFO L424 AbstractCegarLoop]: === Iteration 10 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:18:41,708 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:18:41,709 INFO L82 PathProgramCache]: Analyzing trace with hash -1868697915, now seen corresponding path program 1 times [2018-10-26 23:18:41,709 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:18:41,709 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:18:41,738 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:18:41,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:18:41,900 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:18:42,029 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-26 23:18:42,029 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (11)] Exception during sending of exit command (exit): Broken pipe [2018-10-26 23:18:42,032 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:18:42,032 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-26 23:18:42,033 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-26 23:18:42,033 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-26 23:18:42,033 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-26 23:18:42,033 INFO L87 Difference]: Start difference. First operand 624 states and 855 transitions. Second operand 4 states. [2018-10-26 23:18:42,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:18:42,539 INFO L93 Difference]: Finished difference Result 1247 states and 1734 transitions. [2018-10-26 23:18:42,540 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-26 23:18:42,540 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 112 [2018-10-26 23:18:42,541 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:18:42,545 INFO L225 Difference]: With dead ends: 1247 [2018-10-26 23:18:42,546 INFO L226 Difference]: Without dead ends: 645 [2018-10-26 23:18:42,548 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 109 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-26 23:18:42,549 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 645 states. [2018-10-26 23:18:42,581 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 645 to 639. [2018-10-26 23:18:42,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 639 states. [2018-10-26 23:18:42,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 639 states to 639 states and 867 transitions. [2018-10-26 23:18:42,586 INFO L78 Accepts]: Start accepts. Automaton has 639 states and 867 transitions. Word has length 112 [2018-10-26 23:18:42,586 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:18:42,587 INFO L481 AbstractCegarLoop]: Abstraction has 639 states and 867 transitions. [2018-10-26 23:18:42,587 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-26 23:18:42,587 INFO L276 IsEmpty]: Start isEmpty. Operand 639 states and 867 transitions. [2018-10-26 23:18:42,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-10-26 23:18:42,592 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:18:42,592 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:18:42,594 INFO L424 AbstractCegarLoop]: === Iteration 11 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:18:42,594 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:18:42,594 INFO L82 PathProgramCache]: Analyzing trace with hash 710555351, now seen corresponding path program 1 times [2018-10-26 23:18:42,595 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:18:42,595 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:18:42,625 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:18:42,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:18:42,784 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:18:43,569 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-26 23:18:43,571 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-26 23:18:43,574 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:18:43,575 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-26 23:18:43,576 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-26 23:18:43,576 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-26 23:18:43,576 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-10-26 23:18:43,577 INFO L87 Difference]: Start difference. First operand 639 states and 867 transitions. Second operand 9 states. [2018-10-26 23:18:46,421 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:18:46,421 INFO L93 Difference]: Finished difference Result 1665 states and 2272 transitions. [2018-10-26 23:18:46,423 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-10-26 23:18:46,423 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 120 [2018-10-26 23:18:46,423 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:18:46,428 INFO L225 Difference]: With dead ends: 1665 [2018-10-26 23:18:46,428 INFO L226 Difference]: Without dead ends: 1048 [2018-10-26 23:18:46,431 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 123 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=38, Invalid=118, Unknown=0, NotChecked=0, Total=156 [2018-10-26 23:18:46,432 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1048 states. [2018-10-26 23:18:46,474 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1048 to 918. [2018-10-26 23:18:46,474 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 918 states. [2018-10-26 23:18:46,478 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 918 states to 918 states and 1237 transitions. [2018-10-26 23:18:46,478 INFO L78 Accepts]: Start accepts. Automaton has 918 states and 1237 transitions. Word has length 120 [2018-10-26 23:18:46,479 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:18:46,479 INFO L481 AbstractCegarLoop]: Abstraction has 918 states and 1237 transitions. [2018-10-26 23:18:46,479 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-26 23:18:46,479 INFO L276 IsEmpty]: Start isEmpty. Operand 918 states and 1237 transitions. [2018-10-26 23:18:46,481 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-10-26 23:18:46,482 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:18:46,483 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:18:46,483 INFO L424 AbstractCegarLoop]: === Iteration 12 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:18:46,483 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:18:46,483 INFO L82 PathProgramCache]: Analyzing trace with hash 309159962, now seen corresponding path program 1 times [2018-10-26 23:18:46,484 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:18:46,484 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:18:46,514 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:18:46,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:18:46,773 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:18:47,335 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-26 23:18:47,335 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-26 23:18:47,338 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:18:47,338 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-26 23:18:47,339 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-26 23:18:47,339 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-26 23:18:47,341 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-10-26 23:18:47,341 INFO L87 Difference]: Start difference. First operand 918 states and 1237 transitions. Second operand 7 states. [2018-10-26 23:18:50,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:18:50,898 INFO L93 Difference]: Finished difference Result 1974 states and 2664 transitions. [2018-10-26 23:18:50,898 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-10-26 23:18:50,898 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 125 [2018-10-26 23:18:50,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:18:50,902 INFO L225 Difference]: With dead ends: 1974 [2018-10-26 23:18:50,902 INFO L226 Difference]: Without dead ends: 1078 [2018-10-26 23:18:50,905 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 120 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=50, Invalid=106, Unknown=0, NotChecked=0, Total=156 [2018-10-26 23:18:50,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1078 states. [2018-10-26 23:18:50,964 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1078 to 1069. [2018-10-26 23:18:50,964 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1069 states. [2018-10-26 23:18:50,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1069 states to 1069 states and 1428 transitions. [2018-10-26 23:18:50,968 INFO L78 Accepts]: Start accepts. Automaton has 1069 states and 1428 transitions. Word has length 125 [2018-10-26 23:18:50,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:18:50,969 INFO L481 AbstractCegarLoop]: Abstraction has 1069 states and 1428 transitions. [2018-10-26 23:18:50,969 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-26 23:18:50,969 INFO L276 IsEmpty]: Start isEmpty. Operand 1069 states and 1428 transitions. [2018-10-26 23:18:50,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-10-26 23:18:50,972 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:18:50,972 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:18:50,973 INFO L424 AbstractCegarLoop]: === Iteration 13 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:18:50,973 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:18:50,973 INFO L82 PathProgramCache]: Analyzing trace with hash 1476131518, now seen corresponding path program 1 times [2018-10-26 23:18:50,973 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:18:50,974 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:18:50,999 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:18:51,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:18:51,248 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:18:51,384 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-26 23:18:51,384 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (14)] Exception during sending of exit command (exit): Broken pipe [2018-10-26 23:18:51,390 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:18:51,390 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-26 23:18:51,391 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-26 23:18:51,391 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-26 23:18:51,392 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-10-26 23:18:51,392 INFO L87 Difference]: Start difference. First operand 1069 states and 1428 transitions. Second operand 7 states. [2018-10-26 23:18:53,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:18:53,030 INFO L93 Difference]: Finished difference Result 1992 states and 2679 transitions. [2018-10-26 23:18:53,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-10-26 23:18:53,031 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 126 [2018-10-26 23:18:53,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:18:53,036 INFO L225 Difference]: With dead ends: 1992 [2018-10-26 23:18:53,036 INFO L226 Difference]: Without dead ends: 1087 [2018-10-26 23:18:53,039 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 133 GetRequests, 121 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=50, Invalid=106, Unknown=0, NotChecked=0, Total=156 [2018-10-26 23:18:53,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1087 states. [2018-10-26 23:18:53,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1087 to 1069. [2018-10-26 23:18:53,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1069 states. [2018-10-26 23:18:53,096 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1069 states to 1069 states and 1425 transitions. [2018-10-26 23:18:53,097 INFO L78 Accepts]: Start accepts. Automaton has 1069 states and 1425 transitions. Word has length 126 [2018-10-26 23:18:53,097 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:18:53,098 INFO L481 AbstractCegarLoop]: Abstraction has 1069 states and 1425 transitions. [2018-10-26 23:18:53,098 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-26 23:18:53,098 INFO L276 IsEmpty]: Start isEmpty. Operand 1069 states and 1425 transitions. [2018-10-26 23:18:53,100 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-10-26 23:18:53,100 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:18:53,101 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:18:53,101 INFO L424 AbstractCegarLoop]: === Iteration 14 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:18:53,101 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:18:53,101 INFO L82 PathProgramCache]: Analyzing trace with hash 165489709, now seen corresponding path program 1 times [2018-10-26 23:18:53,103 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:18:53,103 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:18:53,133 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:18:53,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:18:53,365 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:18:53,582 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-26 23:18:53,583 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-26 23:18:53,585 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:18:53,585 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-26 23:18:53,585 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-26 23:18:53,586 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-26 23:18:53,586 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-10-26 23:18:53,586 INFO L87 Difference]: Start difference. First operand 1069 states and 1425 transitions. Second operand 9 states. [2018-10-26 23:18:55,809 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:18:55,809 INFO L93 Difference]: Finished difference Result 2693 states and 3634 transitions. [2018-10-26 23:18:55,810 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-10-26 23:18:55,810 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 127 [2018-10-26 23:18:55,811 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:18:55,818 INFO L225 Difference]: With dead ends: 2693 [2018-10-26 23:18:55,818 INFO L226 Difference]: Without dead ends: 1797 [2018-10-26 23:18:55,822 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 120 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=62, Invalid=210, Unknown=0, NotChecked=0, Total=272 [2018-10-26 23:18:55,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1797 states. [2018-10-26 23:18:55,904 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1797 to 1769. [2018-10-26 23:18:55,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1769 states. [2018-10-26 23:18:55,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1769 states to 1769 states and 2377 transitions. [2018-10-26 23:18:55,910 INFO L78 Accepts]: Start accepts. Automaton has 1769 states and 2377 transitions. Word has length 127 [2018-10-26 23:18:55,910 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:18:55,910 INFO L481 AbstractCegarLoop]: Abstraction has 1769 states and 2377 transitions. [2018-10-26 23:18:55,910 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-26 23:18:55,911 INFO L276 IsEmpty]: Start isEmpty. Operand 1769 states and 2377 transitions. [2018-10-26 23:18:55,912 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-10-26 23:18:55,912 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:18:55,912 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:18:55,913 INFO L424 AbstractCegarLoop]: === Iteration 15 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:18:55,913 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:18:55,913 INFO L82 PathProgramCache]: Analyzing trace with hash 905097090, now seen corresponding path program 1 times [2018-10-26 23:18:55,913 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:18:55,915 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:18:55,943 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:18:56,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:18:56,097 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:18:56,217 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-26 23:18:56,217 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-26 23:18:56,219 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:18:56,219 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-26 23:18:56,220 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-26 23:18:56,220 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-26 23:18:56,220 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-26 23:18:56,220 INFO L87 Difference]: Start difference. First operand 1769 states and 2377 transitions. Second operand 4 states. [2018-10-26 23:18:56,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:18:56,283 INFO L93 Difference]: Finished difference Result 3334 states and 4514 transitions. [2018-10-26 23:18:56,284 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-26 23:18:56,284 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 129 [2018-10-26 23:18:56,284 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:18:56,291 INFO L225 Difference]: With dead ends: 3334 [2018-10-26 23:18:56,291 INFO L226 Difference]: Without dead ends: 1817 [2018-10-26 23:18:56,296 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 130 GetRequests, 127 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-26 23:18:56,298 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1817 states. [2018-10-26 23:18:56,380 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1817 to 1793. [2018-10-26 23:18:56,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1793 states. [2018-10-26 23:18:56,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1793 states to 1793 states and 2395 transitions. [2018-10-26 23:18:56,386 INFO L78 Accepts]: Start accepts. Automaton has 1793 states and 2395 transitions. Word has length 129 [2018-10-26 23:18:56,386 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:18:56,386 INFO L481 AbstractCegarLoop]: Abstraction has 1793 states and 2395 transitions. [2018-10-26 23:18:56,387 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-26 23:18:56,387 INFO L276 IsEmpty]: Start isEmpty. Operand 1793 states and 2395 transitions. [2018-10-26 23:18:56,389 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2018-10-26 23:18:56,389 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:18:56,389 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:18:56,391 INFO L424 AbstractCegarLoop]: === Iteration 16 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:18:56,391 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:18:56,391 INFO L82 PathProgramCache]: Analyzing trace with hash 86939965, now seen corresponding path program 1 times [2018-10-26 23:18:56,392 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:18:56,392 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:18:56,415 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:18:56,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:18:56,680 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:18:56,775 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-26 23:18:56,775 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-26 23:18:56,777 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:18:56,777 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-26 23:18:56,778 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-26 23:18:56,778 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-26 23:18:56,778 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-10-26 23:18:56,778 INFO L87 Difference]: Start difference. First operand 1793 states and 2395 transitions. Second operand 9 states. [2018-10-26 23:19:00,875 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:19:00,875 INFO L93 Difference]: Finished difference Result 3362 states and 4498 transitions. [2018-10-26 23:19:00,876 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-10-26 23:19:00,876 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 135 [2018-10-26 23:19:00,876 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:19:00,883 INFO L225 Difference]: With dead ends: 3362 [2018-10-26 23:19:00,884 INFO L226 Difference]: Without dead ends: 1845 [2018-10-26 23:19:00,888 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 128 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=62, Invalid=210, Unknown=0, NotChecked=0, Total=272 [2018-10-26 23:19:00,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1845 states. [2018-10-26 23:19:00,978 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1845 to 1793. [2018-10-26 23:19:00,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1793 states. [2018-10-26 23:19:00,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1793 states to 1793 states and 2392 transitions. [2018-10-26 23:19:00,984 INFO L78 Accepts]: Start accepts. Automaton has 1793 states and 2392 transitions. Word has length 135 [2018-10-26 23:19:00,984 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:19:00,984 INFO L481 AbstractCegarLoop]: Abstraction has 1793 states and 2392 transitions. [2018-10-26 23:19:00,985 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-26 23:19:00,985 INFO L276 IsEmpty]: Start isEmpty. Operand 1793 states and 2392 transitions. [2018-10-26 23:19:00,988 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2018-10-26 23:19:00,988 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:19:00,988 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:19:00,988 INFO L424 AbstractCegarLoop]: === Iteration 17 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:19:00,988 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:19:00,989 INFO L82 PathProgramCache]: Analyzing trace with hash 2115029633, now seen corresponding path program 1 times [2018-10-26 23:19:00,989 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:19:00,989 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:19:01,022 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:19:01,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:19:01,148 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:19:01,990 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-10-26 23:19:01,990 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-26 23:19:01,993 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:19:01,993 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-10-26 23:19:01,994 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-26 23:19:01,994 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-26 23:19:01,994 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-10-26 23:19:01,994 INFO L87 Difference]: Start difference. First operand 1793 states and 2392 transitions. Second operand 8 states. [2018-10-26 23:19:02,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:19:02,989 INFO L93 Difference]: Finished difference Result 3095 states and 4187 transitions. [2018-10-26 23:19:02,990 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-26 23:19:02,990 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 136 [2018-10-26 23:19:02,990 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:19:02,996 INFO L225 Difference]: With dead ends: 3095 [2018-10-26 23:19:02,996 INFO L226 Difference]: Without dead ends: 1978 [2018-10-26 23:19:02,998 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 140 GetRequests, 130 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2018-10-26 23:19:03,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1978 states. [2018-10-26 23:19:03,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1978 to 1786. [2018-10-26 23:19:03,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1786 states. [2018-10-26 23:19:03,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1786 states to 1786 states and 2371 transitions. [2018-10-26 23:19:03,102 INFO L78 Accepts]: Start accepts. Automaton has 1786 states and 2371 transitions. Word has length 136 [2018-10-26 23:19:03,103 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:19:03,103 INFO L481 AbstractCegarLoop]: Abstraction has 1786 states and 2371 transitions. [2018-10-26 23:19:03,103 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-26 23:19:03,103 INFO L276 IsEmpty]: Start isEmpty. Operand 1786 states and 2371 transitions. [2018-10-26 23:19:03,105 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2018-10-26 23:19:03,105 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:19:03,105 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:19:03,107 INFO L424 AbstractCegarLoop]: === Iteration 18 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:19:03,107 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:19:03,107 INFO L82 PathProgramCache]: Analyzing trace with hash 48959050, now seen corresponding path program 1 times [2018-10-26 23:19:03,108 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:19:03,108 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:19:03,135 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:19:03,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:19:03,328 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:19:03,414 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-10-26 23:19:03,414 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-26 23:19:03,416 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:19:03,417 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-10-26 23:19:03,417 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-26 23:19:03,417 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-26 23:19:03,417 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-10-26 23:19:03,417 INFO L87 Difference]: Start difference. First operand 1786 states and 2371 transitions. Second operand 8 states. [2018-10-26 23:19:04,191 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:19:04,192 INFO L93 Difference]: Finished difference Result 2995 states and 4014 transitions. [2018-10-26 23:19:04,193 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-26 23:19:04,193 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 137 [2018-10-26 23:19:04,193 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:19:04,200 INFO L225 Difference]: With dead ends: 2995 [2018-10-26 23:19:04,200 INFO L226 Difference]: Without dead ends: 1878 [2018-10-26 23:19:04,204 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 131 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2018-10-26 23:19:04,206 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1878 states. [2018-10-26 23:19:04,301 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1878 to 1762. [2018-10-26 23:19:04,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1762 states. [2018-10-26 23:19:04,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1762 states to 1762 states and 2325 transitions. [2018-10-26 23:19:04,307 INFO L78 Accepts]: Start accepts. Automaton has 1762 states and 2325 transitions. Word has length 137 [2018-10-26 23:19:04,307 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:19:04,307 INFO L481 AbstractCegarLoop]: Abstraction has 1762 states and 2325 transitions. [2018-10-26 23:19:04,307 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-26 23:19:04,307 INFO L276 IsEmpty]: Start isEmpty. Operand 1762 states and 2325 transitions. [2018-10-26 23:19:04,310 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2018-10-26 23:19:04,310 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:19:04,310 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:19:04,311 INFO L424 AbstractCegarLoop]: === Iteration 19 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:19:04,311 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:19:04,311 INFO L82 PathProgramCache]: Analyzing trace with hash 1674383670, now seen corresponding path program 1 times [2018-10-26 23:19:04,311 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:19:04,311 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:19:04,341 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:19:04,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:19:04,606 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:19:04,654 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-10-26 23:19:04,654 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-26 23:19:04,656 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:19:04,656 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-26 23:19:04,657 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-26 23:19:04,657 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-26 23:19:04,657 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-26 23:19:04,657 INFO L87 Difference]: Start difference. First operand 1762 states and 2325 transitions. Second operand 4 states. [2018-10-26 23:19:04,862 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:19:04,862 INFO L93 Difference]: Finished difference Result 4509 states and 6010 transitions. [2018-10-26 23:19:04,863 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-26 23:19:04,863 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 137 [2018-10-26 23:19:04,863 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:19:04,872 INFO L225 Difference]: With dead ends: 4509 [2018-10-26 23:19:04,872 INFO L226 Difference]: Without dead ends: 3379 [2018-10-26 23:19:04,875 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 133 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-26 23:19:04,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3379 states. [2018-10-26 23:19:05,057 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3379 to 3305. [2018-10-26 23:19:05,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3305 states. [2018-10-26 23:19:05,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3305 states to 3305 states and 4378 transitions. [2018-10-26 23:19:05,068 INFO L78 Accepts]: Start accepts. Automaton has 3305 states and 4378 transitions. Word has length 137 [2018-10-26 23:19:05,069 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:19:05,069 INFO L481 AbstractCegarLoop]: Abstraction has 3305 states and 4378 transitions. [2018-10-26 23:19:05,069 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-26 23:19:05,069 INFO L276 IsEmpty]: Start isEmpty. Operand 3305 states and 4378 transitions. [2018-10-26 23:19:05,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-10-26 23:19:05,073 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:19:05,073 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:19:05,074 INFO L424 AbstractCegarLoop]: === Iteration 20 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:19:05,074 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:19:05,075 INFO L82 PathProgramCache]: Analyzing trace with hash -1232509940, now seen corresponding path program 1 times [2018-10-26 23:19:05,075 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:19:05,075 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:19:05,103 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:19:05,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:19:05,323 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:19:05,393 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-10-26 23:19:05,393 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-26 23:19:05,395 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:19:05,395 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-26 23:19:05,396 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-26 23:19:05,396 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-26 23:19:05,396 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-26 23:19:05,396 INFO L87 Difference]: Start difference. First operand 3305 states and 4378 transitions. Second operand 4 states. [2018-10-26 23:19:05,796 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:19:05,797 INFO L93 Difference]: Finished difference Result 7724 states and 10321 transitions. [2018-10-26 23:19:05,797 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-26 23:19:05,797 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 139 [2018-10-26 23:19:05,798 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:19:05,817 INFO L225 Difference]: With dead ends: 7724 [2018-10-26 23:19:05,817 INFO L226 Difference]: Without dead ends: 5453 [2018-10-26 23:19:05,823 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 135 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-26 23:19:05,828 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5453 states. [2018-10-26 23:19:06,047 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5453 to 5260. [2018-10-26 23:19:06,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5260 states. [2018-10-26 23:19:06,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5260 states to 5260 states and 6982 transitions. [2018-10-26 23:19:06,059 INFO L78 Accepts]: Start accepts. Automaton has 5260 states and 6982 transitions. Word has length 139 [2018-10-26 23:19:06,059 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:19:06,059 INFO L481 AbstractCegarLoop]: Abstraction has 5260 states and 6982 transitions. [2018-10-26 23:19:06,059 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-26 23:19:06,060 INFO L276 IsEmpty]: Start isEmpty. Operand 5260 states and 6982 transitions. [2018-10-26 23:19:06,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-10-26 23:19:06,064 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:19:06,065 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:19:06,065 INFO L424 AbstractCegarLoop]: === Iteration 21 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:19:06,065 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:19:06,065 INFO L82 PathProgramCache]: Analyzing trace with hash -167362415, now seen corresponding path program 1 times [2018-10-26 23:19:06,067 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:19:06,067 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:19:06,094 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:19:06,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:19:06,301 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:19:06,409 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-10-26 23:19:06,409 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-26 23:19:06,412 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:19:06,412 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-26 23:19:06,412 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-26 23:19:06,412 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-26 23:19:06,413 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-10-26 23:19:06,413 INFO L87 Difference]: Start difference. First operand 5260 states and 6982 transitions. Second operand 7 states. [2018-10-26 23:19:07,557 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:19:07,557 INFO L93 Difference]: Finished difference Result 9621 states and 12765 transitions. [2018-10-26 23:19:07,561 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-10-26 23:19:07,561 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 139 [2018-10-26 23:19:07,561 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:19:07,574 INFO L225 Difference]: With dead ends: 9621 [2018-10-26 23:19:07,575 INFO L226 Difference]: Without dead ends: 4491 [2018-10-26 23:19:07,583 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 135 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=50, Invalid=106, Unknown=0, NotChecked=0, Total=156 [2018-10-26 23:19:07,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4491 states. [2018-10-26 23:19:07,802 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4491 to 4475. [2018-10-26 23:19:07,802 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4475 states. [2018-10-26 23:19:07,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4475 states to 4475 states and 5914 transitions. [2018-10-26 23:19:07,811 INFO L78 Accepts]: Start accepts. Automaton has 4475 states and 5914 transitions. Word has length 139 [2018-10-26 23:19:07,811 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:19:07,811 INFO L481 AbstractCegarLoop]: Abstraction has 4475 states and 5914 transitions. [2018-10-26 23:19:07,811 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-26 23:19:07,811 INFO L276 IsEmpty]: Start isEmpty. Operand 4475 states and 5914 transitions. [2018-10-26 23:19:07,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2018-10-26 23:19:07,814 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:19:07,814 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:19:07,814 INFO L424 AbstractCegarLoop]: === Iteration 22 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:19:07,814 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:19:07,815 INFO L82 PathProgramCache]: Analyzing trace with hash -108970935, now seen corresponding path program 1 times [2018-10-26 23:19:07,815 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:19:07,815 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:19:07,833 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:19:07,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:19:07,926 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:19:07,975 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-10-26 23:19:07,975 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-26 23:19:07,977 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:19:07,977 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-10-26 23:19:07,977 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-26 23:19:07,977 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-26 23:19:07,977 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-10-26 23:19:07,978 INFO L87 Difference]: Start difference. First operand 4475 states and 5914 transitions. Second operand 8 states. [2018-10-26 23:19:08,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:19:08,750 INFO L93 Difference]: Finished difference Result 8526 states and 11454 transitions. [2018-10-26 23:19:08,752 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-26 23:19:08,753 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 142 [2018-10-26 23:19:08,753 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:19:08,769 INFO L225 Difference]: With dead ends: 8526 [2018-10-26 23:19:08,769 INFO L226 Difference]: Without dead ends: 4805 [2018-10-26 23:19:08,777 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 136 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2018-10-26 23:19:08,781 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4805 states. [2018-10-26 23:19:09,014 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4805 to 4028. [2018-10-26 23:19:09,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4028 states. [2018-10-26 23:19:09,023 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4028 states to 4028 states and 5326 transitions. [2018-10-26 23:19:09,025 INFO L78 Accepts]: Start accepts. Automaton has 4028 states and 5326 transitions. Word has length 142 [2018-10-26 23:19:09,026 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:19:09,026 INFO L481 AbstractCegarLoop]: Abstraction has 4028 states and 5326 transitions. [2018-10-26 23:19:09,026 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-26 23:19:09,026 INFO L276 IsEmpty]: Start isEmpty. Operand 4028 states and 5326 transitions. [2018-10-26 23:19:09,028 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2018-10-26 23:19:09,028 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:19:09,028 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:19:09,028 INFO L424 AbstractCegarLoop]: === Iteration 23 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:19:09,029 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:19:09,029 INFO L82 PathProgramCache]: Analyzing trace with hash -1121860270, now seen corresponding path program 1 times [2018-10-26 23:19:09,029 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:19:09,029 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:19:09,048 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:19:09,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:19:09,177 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:19:09,252 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 13 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-10-26 23:19:09,253 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-26 23:19:09,434 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-10-26 23:19:09,438 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-26 23:19:09,438 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-26 23:19:09,454 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:19:09,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:19:09,530 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:19:09,603 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-10-26 23:19:09,603 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-26 23:19:09,622 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-10-26 23:19:09,622 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [9, 9] total 18 [2018-10-26 23:19:09,622 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-10-26 23:19:09,622 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-10-26 23:19:09,623 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=250, Unknown=0, NotChecked=0, Total=306 [2018-10-26 23:19:09,623 INFO L87 Difference]: Start difference. First operand 4028 states and 5326 transitions. Second operand 18 states. [2018-10-26 23:19:12,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:19:12,827 INFO L93 Difference]: Finished difference Result 8723 states and 11677 transitions. [2018-10-26 23:19:12,828 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-10-26 23:19:12,828 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 143 [2018-10-26 23:19:12,828 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:19:12,848 INFO L225 Difference]: With dead ends: 8723 [2018-10-26 23:19:12,848 INFO L226 Difference]: Without dead ends: 5523 [2018-10-26 23:19:12,857 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 450 GetRequests, 416 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 231 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=198, Invalid=992, Unknown=0, NotChecked=0, Total=1190 [2018-10-26 23:19:12,862 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5523 states. [2018-10-26 23:19:13,108 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5523 to 3570. [2018-10-26 23:19:13,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3570 states. [2018-10-26 23:19:13,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3570 states to 3570 states and 4574 transitions. [2018-10-26 23:19:13,114 INFO L78 Accepts]: Start accepts. Automaton has 3570 states and 4574 transitions. Word has length 143 [2018-10-26 23:19:13,114 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:19:13,115 INFO L481 AbstractCegarLoop]: Abstraction has 3570 states and 4574 transitions. [2018-10-26 23:19:13,115 INFO L482 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-10-26 23:19:13,115 INFO L276 IsEmpty]: Start isEmpty. Operand 3570 states and 4574 transitions. [2018-10-26 23:19:13,116 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2018-10-26 23:19:13,116 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:19:13,116 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:19:13,116 INFO L424 AbstractCegarLoop]: === Iteration 24 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:19:13,116 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:19:13,116 INFO L82 PathProgramCache]: Analyzing trace with hash -1198617235, now seen corresponding path program 1 times [2018-10-26 23:19:13,117 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:19:13,117 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 26 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:19:13,144 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:19:13,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:19:13,322 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:19:13,428 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-10-26 23:19:13,428 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-26 23:19:13,430 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:19:13,430 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-26 23:19:13,431 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-26 23:19:13,431 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-26 23:19:13,431 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-10-26 23:19:13,431 INFO L87 Difference]: Start difference. First operand 3570 states and 4574 transitions. Second operand 7 states. [2018-10-26 23:19:14,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:19:14,653 INFO L93 Difference]: Finished difference Result 6748 states and 8674 transitions. [2018-10-26 23:19:14,658 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-10-26 23:19:14,658 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 142 [2018-10-26 23:19:14,658 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:19:14,670 INFO L225 Difference]: With dead ends: 6748 [2018-10-26 23:19:14,670 INFO L226 Difference]: Without dead ends: 3418 [2018-10-26 23:19:14,677 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 138 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=50, Invalid=106, Unknown=0, NotChecked=0, Total=156 [2018-10-26 23:19:14,680 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3418 states. [2018-10-26 23:19:14,912 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3418 to 3295. [2018-10-26 23:19:14,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3295 states. [2018-10-26 23:19:14,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3295 states to 3295 states and 4216 transitions. [2018-10-26 23:19:14,920 INFO L78 Accepts]: Start accepts. Automaton has 3295 states and 4216 transitions. Word has length 142 [2018-10-26 23:19:14,921 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:19:14,921 INFO L481 AbstractCegarLoop]: Abstraction has 3295 states and 4216 transitions. [2018-10-26 23:19:14,921 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-26 23:19:14,921 INFO L276 IsEmpty]: Start isEmpty. Operand 3295 states and 4216 transitions. [2018-10-26 23:19:14,923 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147 [2018-10-26 23:19:14,923 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:19:14,923 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:19:14,924 INFO L424 AbstractCegarLoop]: === Iteration 25 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:19:14,924 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:19:14,924 INFO L82 PathProgramCache]: Analyzing trace with hash -9647601, now seen corresponding path program 1 times [2018-10-26 23:19:14,924 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:19:14,924 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:19:14,953 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:19:15,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:19:15,098 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:19:15,120 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-10-26 23:19:15,120 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-26 23:19:15,121 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:19:15,122 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-26 23:19:15,122 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-26 23:19:15,122 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-26 23:19:15,122 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-26 23:19:15,123 INFO L87 Difference]: Start difference. First operand 3295 states and 4216 transitions. Second operand 4 states. [2018-10-26 23:19:15,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:19:15,339 INFO L93 Difference]: Finished difference Result 6448 states and 8349 transitions. [2018-10-26 23:19:15,340 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-26 23:19:15,340 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 146 [2018-10-26 23:19:15,340 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:19:15,352 INFO L225 Difference]: With dead ends: 6448 [2018-10-26 23:19:15,353 INFO L226 Difference]: Without dead ends: 3487 [2018-10-26 23:19:15,360 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 147 GetRequests, 144 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-26 23:19:15,365 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3487 states. [2018-10-26 23:19:15,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3487 to 3439. [2018-10-26 23:19:15,612 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3439 states. [2018-10-26 23:19:15,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3439 states to 3439 states and 4336 transitions. [2018-10-26 23:19:15,621 INFO L78 Accepts]: Start accepts. Automaton has 3439 states and 4336 transitions. Word has length 146 [2018-10-26 23:19:15,621 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:19:15,621 INFO L481 AbstractCegarLoop]: Abstraction has 3439 states and 4336 transitions. [2018-10-26 23:19:15,621 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-26 23:19:15,622 INFO L276 IsEmpty]: Start isEmpty. Operand 3439 states and 4336 transitions. [2018-10-26 23:19:15,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2018-10-26 23:19:15,623 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:19:15,624 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:19:15,624 INFO L424 AbstractCegarLoop]: === Iteration 26 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:19:15,624 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:19:15,624 INFO L82 PathProgramCache]: Analyzing trace with hash -1576011818, now seen corresponding path program 1 times [2018-10-26 23:19:15,624 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:19:15,625 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:19:15,655 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:19:15,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:19:15,899 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:19:15,969 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-10-26 23:19:15,969 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-26 23:19:15,971 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:19:15,971 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-26 23:19:15,971 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-26 23:19:15,971 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-26 23:19:15,972 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-10-26 23:19:15,972 INFO L87 Difference]: Start difference. First operand 3439 states and 4336 transitions. Second operand 9 states. [2018-10-26 23:19:17,509 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:19:17,509 INFO L93 Difference]: Finished difference Result 6545 states and 8305 transitions. [2018-10-26 23:19:17,509 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-10-26 23:19:17,509 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 151 [2018-10-26 23:19:17,510 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:19:17,518 INFO L225 Difference]: With dead ends: 6545 [2018-10-26 23:19:17,518 INFO L226 Difference]: Without dead ends: 3403 [2018-10-26 23:19:17,525 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 160 GetRequests, 144 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=62, Invalid=210, Unknown=0, NotChecked=0, Total=272 [2018-10-26 23:19:17,528 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3403 states. [2018-10-26 23:19:17,761 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3403 to 3324. [2018-10-26 23:19:17,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3324 states. [2018-10-26 23:19:17,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3324 states to 3324 states and 4186 transitions. [2018-10-26 23:19:17,770 INFO L78 Accepts]: Start accepts. Automaton has 3324 states and 4186 transitions. Word has length 151 [2018-10-26 23:19:17,770 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:19:17,770 INFO L481 AbstractCegarLoop]: Abstraction has 3324 states and 4186 transitions. [2018-10-26 23:19:17,770 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-26 23:19:17,770 INFO L276 IsEmpty]: Start isEmpty. Operand 3324 states and 4186 transitions. [2018-10-26 23:19:17,771 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 155 [2018-10-26 23:19:17,772 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:19:17,772 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:19:17,772 INFO L424 AbstractCegarLoop]: === Iteration 27 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:19:17,772 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:19:17,772 INFO L82 PathProgramCache]: Analyzing trace with hash -556999178, now seen corresponding path program 1 times [2018-10-26 23:19:17,773 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:19:17,773 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:19:17,802 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:19:18,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:19:18,061 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:19:18,137 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-10-26 23:19:18,138 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-26 23:19:18,140 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:19:18,140 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-10-26 23:19:18,140 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-26 23:19:18,140 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-26 23:19:18,141 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-10-26 23:19:18,141 INFO L87 Difference]: Start difference. First operand 3324 states and 4186 transitions. Second operand 8 states. [2018-10-26 23:19:18,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:19:18,333 INFO L93 Difference]: Finished difference Result 3583 states and 4558 transitions. [2018-10-26 23:19:18,334 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-26 23:19:18,334 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 154 [2018-10-26 23:19:18,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:19:18,343 INFO L225 Difference]: With dead ends: 3583 [2018-10-26 23:19:18,343 INFO L226 Difference]: Without dead ends: 3581 [2018-10-26 23:19:18,345 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 147 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-10-26 23:19:18,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3581 states. [2018-10-26 23:19:18,692 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3581 to 3343. [2018-10-26 23:19:18,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3343 states. [2018-10-26 23:19:18,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3343 states to 3343 states and 4211 transitions. [2018-10-26 23:19:18,701 INFO L78 Accepts]: Start accepts. Automaton has 3343 states and 4211 transitions. Word has length 154 [2018-10-26 23:19:18,701 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:19:18,701 INFO L481 AbstractCegarLoop]: Abstraction has 3343 states and 4211 transitions. [2018-10-26 23:19:18,701 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-26 23:19:18,701 INFO L276 IsEmpty]: Start isEmpty. Operand 3343 states and 4211 transitions. [2018-10-26 23:19:18,703 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-10-26 23:19:18,704 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:19:18,704 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:19:18,704 INFO L424 AbstractCegarLoop]: === Iteration 28 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:19:18,704 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:19:18,704 INFO L82 PathProgramCache]: Analyzing trace with hash 1888937047, now seen corresponding path program 1 times [2018-10-26 23:19:18,705 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:19:18,705 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:19:18,730 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:19:18,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:19:18,895 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:19:19,033 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-10-26 23:19:19,033 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-26 23:19:19,036 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:19:19,036 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-26 23:19:19,037 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-26 23:19:19,037 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-26 23:19:19,037 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-26 23:19:19,038 INFO L87 Difference]: Start difference. First operand 3343 states and 4211 transitions. Second operand 4 states. [2018-10-26 23:19:19,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:19:19,470 INFO L93 Difference]: Finished difference Result 6301 states and 8041 transitions. [2018-10-26 23:19:19,470 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-26 23:19:19,470 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 155 [2018-10-26 23:19:19,471 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:19:19,476 INFO L225 Difference]: With dead ends: 6301 [2018-10-26 23:19:19,476 INFO L226 Difference]: Without dead ends: 3297 [2018-10-26 23:19:19,482 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 153 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-26 23:19:19,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3297 states. [2018-10-26 23:19:19,651 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3297 to 3297. [2018-10-26 23:19:19,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3297 states. [2018-10-26 23:19:19,656 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3297 states to 3297 states and 4073 transitions. [2018-10-26 23:19:19,658 INFO L78 Accepts]: Start accepts. Automaton has 3297 states and 4073 transitions. Word has length 155 [2018-10-26 23:19:19,658 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:19:19,658 INFO L481 AbstractCegarLoop]: Abstraction has 3297 states and 4073 transitions. [2018-10-26 23:19:19,658 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-26 23:19:19,658 INFO L276 IsEmpty]: Start isEmpty. Operand 3297 states and 4073 transitions. [2018-10-26 23:19:19,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2018-10-26 23:19:19,660 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:19:19,660 INFO L375 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:19:19,660 INFO L424 AbstractCegarLoop]: === Iteration 29 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:19:19,660 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:19:19,661 INFO L82 PathProgramCache]: Analyzing trace with hash -1891406661, now seen corresponding path program 1 times [2018-10-26 23:19:19,661 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:19:19,661 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:19:19,685 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:19:19,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:19:19,802 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:19:19,820 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-10-26 23:19:19,820 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-26 23:19:19,821 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:19:19,821 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-26 23:19:19,822 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-26 23:19:19,822 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-26 23:19:19,822 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-26 23:19:19,822 INFO L87 Difference]: Start difference. First operand 3297 states and 4073 transitions. Second operand 4 states. [2018-10-26 23:19:19,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:19:19,986 INFO L93 Difference]: Finished difference Result 6182 states and 7735 transitions. [2018-10-26 23:19:19,987 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-26 23:19:19,987 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 164 [2018-10-26 23:19:19,988 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:19:19,995 INFO L225 Difference]: With dead ends: 6182 [2018-10-26 23:19:19,995 INFO L226 Difference]: Without dead ends: 3251 [2018-10-26 23:19:20,001 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 162 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-26 23:19:20,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3251 states. [2018-10-26 23:19:20,149 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3251 to 3251. [2018-10-26 23:19:20,150 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3251 states. [2018-10-26 23:19:20,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3251 states to 3251 states and 3935 transitions. [2018-10-26 23:19:20,156 INFO L78 Accepts]: Start accepts. Automaton has 3251 states and 3935 transitions. Word has length 164 [2018-10-26 23:19:20,156 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:19:20,156 INFO L481 AbstractCegarLoop]: Abstraction has 3251 states and 3935 transitions. [2018-10-26 23:19:20,156 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-26 23:19:20,156 INFO L276 IsEmpty]: Start isEmpty. Operand 3251 states and 3935 transitions. [2018-10-26 23:19:20,158 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2018-10-26 23:19:20,159 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:19:20,159 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 5, 4, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:19:20,159 INFO L424 AbstractCegarLoop]: === Iteration 30 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:19:20,159 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:19:20,159 INFO L82 PathProgramCache]: Analyzing trace with hash -240336849, now seen corresponding path program 1 times [2018-10-26 23:19:20,160 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:19:20,160 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:19:20,193 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:19:20,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:19:20,322 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:19:20,340 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 79 trivial. 0 not checked. [2018-10-26 23:19:20,340 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-26 23:19:20,342 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:19:20,342 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-26 23:19:20,343 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-26 23:19:20,343 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-26 23:19:20,343 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-26 23:19:20,344 INFO L87 Difference]: Start difference. First operand 3251 states and 3935 transitions. Second operand 4 states. [2018-10-26 23:19:20,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:19:20,559 INFO L93 Difference]: Finished difference Result 6042 states and 7408 transitions. [2018-10-26 23:19:20,559 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-26 23:19:20,559 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 180 [2018-10-26 23:19:20,560 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:19:20,567 INFO L225 Difference]: With dead ends: 6042 [2018-10-26 23:19:20,568 INFO L226 Difference]: Without dead ends: 3205 [2018-10-26 23:19:20,573 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 181 GetRequests, 178 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-26 23:19:20,576 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3205 states. [2018-10-26 23:19:20,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3205 to 3205. [2018-10-26 23:19:20,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3205 states. [2018-10-26 23:19:20,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3205 states to 3205 states and 3797 transitions. [2018-10-26 23:19:20,751 INFO L78 Accepts]: Start accepts. Automaton has 3205 states and 3797 transitions. Word has length 180 [2018-10-26 23:19:20,751 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:19:20,751 INFO L481 AbstractCegarLoop]: Abstraction has 3205 states and 3797 transitions. [2018-10-26 23:19:20,752 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-26 23:19:20,752 INFO L276 IsEmpty]: Start isEmpty. Operand 3205 states and 3797 transitions. [2018-10-26 23:19:20,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 197 [2018-10-26 23:19:20,753 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:19:20,754 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 5, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:19:20,754 INFO L424 AbstractCegarLoop]: === Iteration 31 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:19:20,754 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:19:20,754 INFO L82 PathProgramCache]: Analyzing trace with hash 424739623, now seen corresponding path program 1 times [2018-10-26 23:19:20,755 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:19:20,755 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:19:20,786 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:19:20,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:19:20,938 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:19:21,081 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 94 trivial. 0 not checked. [2018-10-26 23:19:21,081 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-26 23:19:21,088 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:19:21,088 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-26 23:19:21,088 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-26 23:19:21,089 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-26 23:19:21,089 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-26 23:19:21,089 INFO L87 Difference]: Start difference. First operand 3205 states and 3797 transitions. Second operand 4 states. [2018-10-26 23:19:21,246 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:19:21,246 INFO L93 Difference]: Finished difference Result 5882 states and 7041 transitions. [2018-10-26 23:19:21,247 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-26 23:19:21,247 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 196 [2018-10-26 23:19:21,247 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:19:21,253 INFO L225 Difference]: With dead ends: 5882 [2018-10-26 23:19:21,253 INFO L226 Difference]: Without dead ends: 3136 [2018-10-26 23:19:21,257 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 197 GetRequests, 194 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-26 23:19:21,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3136 states. [2018-10-26 23:19:21,399 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3136 to 2946. [2018-10-26 23:19:21,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2946 states. [2018-10-26 23:19:21,403 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2946 states to 2946 states and 3406 transitions. [2018-10-26 23:19:21,404 INFO L78 Accepts]: Start accepts. Automaton has 2946 states and 3406 transitions. Word has length 196 [2018-10-26 23:19:21,404 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:19:21,404 INFO L481 AbstractCegarLoop]: Abstraction has 2946 states and 3406 transitions. [2018-10-26 23:19:21,404 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-26 23:19:21,404 INFO L276 IsEmpty]: Start isEmpty. Operand 2946 states and 3406 transitions. [2018-10-26 23:19:21,407 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 209 [2018-10-26 23:19:21,407 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:19:21,407 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 5, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:19:21,407 INFO L424 AbstractCegarLoop]: === Iteration 32 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:19:21,408 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:19:21,408 INFO L82 PathProgramCache]: Analyzing trace with hash -1558908564, now seen corresponding path program 1 times [2018-10-26 23:19:21,408 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:19:21,408 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:19:21,445 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:19:21,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:19:21,670 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:19:21,837 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 74 proven. 0 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2018-10-26 23:19:21,837 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-26 23:19:21,841 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:19:21,841 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-26 23:19:21,841 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-26 23:19:21,842 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-26 23:19:21,842 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-10-26 23:19:21,842 INFO L87 Difference]: Start difference. First operand 2946 states and 3406 transitions. Second operand 9 states. [2018-10-26 23:19:27,055 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:19:27,056 INFO L93 Difference]: Finished difference Result 5728 states and 6707 transitions. [2018-10-26 23:19:27,056 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-10-26 23:19:27,056 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 208 [2018-10-26 23:19:27,057 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:19:27,062 INFO L225 Difference]: With dead ends: 5728 [2018-10-26 23:19:27,062 INFO L226 Difference]: Without dead ends: 3106 [2018-10-26 23:19:27,064 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 218 GetRequests, 202 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=62, Invalid=210, Unknown=0, NotChecked=0, Total=272 [2018-10-26 23:19:27,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3106 states. [2018-10-26 23:19:27,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3106 to 2805. [2018-10-26 23:19:27,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2805 states. [2018-10-26 23:19:27,215 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2805 states to 2805 states and 3244 transitions. [2018-10-26 23:19:27,216 INFO L78 Accepts]: Start accepts. Automaton has 2805 states and 3244 transitions. Word has length 208 [2018-10-26 23:19:27,216 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:19:27,217 INFO L481 AbstractCegarLoop]: Abstraction has 2805 states and 3244 transitions. [2018-10-26 23:19:27,217 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-26 23:19:27,217 INFO L276 IsEmpty]: Start isEmpty. Operand 2805 states and 3244 transitions. [2018-10-26 23:19:27,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 260 [2018-10-26 23:19:27,220 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:19:27,220 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:19:27,220 INFO L424 AbstractCegarLoop]: === Iteration 33 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:19:27,220 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:19:27,221 INFO L82 PathProgramCache]: Analyzing trace with hash 1235789962, now seen corresponding path program 1 times [2018-10-26 23:19:27,221 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:19:27,221 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:19:27,237 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:19:27,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:19:27,530 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:19:27,716 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 82 proven. 24 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2018-10-26 23:19:27,717 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-26 23:19:28,258 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2018-10-26 23:19:28,260 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-26 23:19:28,260 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-26 23:19:28,269 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:19:28,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:19:28,392 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:19:28,492 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 82 proven. 24 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2018-10-26 23:19:28,492 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-26 23:19:28,862 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2018-10-26 23:19:28,882 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-10-26 23:19:28,882 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14, 13, 14] total 24 [2018-10-26 23:19:28,882 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-10-26 23:19:28,883 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-10-26 23:19:28,883 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=480, Unknown=0, NotChecked=0, Total=552 [2018-10-26 23:19:28,883 INFO L87 Difference]: Start difference. First operand 2805 states and 3244 transitions. Second operand 24 states. [2018-10-26 23:19:35,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:19:35,520 INFO L93 Difference]: Finished difference Result 6377 states and 7427 transitions. [2018-10-26 23:19:35,521 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2018-10-26 23:19:35,521 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 259 [2018-10-26 23:19:35,521 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:19:35,533 INFO L225 Difference]: With dead ends: 6377 [2018-10-26 23:19:35,534 INFO L226 Difference]: Without dead ends: 3935 [2018-10-26 23:19:35,541 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1119 GetRequests, 1025 SyntacticMatches, 12 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1674 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=1457, Invalid=5515, Unknown=0, NotChecked=0, Total=6972 [2018-10-26 23:19:35,544 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3935 states. [2018-10-26 23:19:35,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3935 to 3156. [2018-10-26 23:19:35,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3156 states. [2018-10-26 23:19:35,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3156 states to 3156 states and 3649 transitions. [2018-10-26 23:19:35,849 INFO L78 Accepts]: Start accepts. Automaton has 3156 states and 3649 transitions. Word has length 259 [2018-10-26 23:19:35,849 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:19:35,849 INFO L481 AbstractCegarLoop]: Abstraction has 3156 states and 3649 transitions. [2018-10-26 23:19:35,849 INFO L482 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-10-26 23:19:35,849 INFO L276 IsEmpty]: Start isEmpty. Operand 3156 states and 3649 transitions. [2018-10-26 23:19:35,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 261 [2018-10-26 23:19:35,852 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:19:35,852 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:19:35,852 INFO L424 AbstractCegarLoop]: === Iteration 34 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:19:35,852 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:19:35,853 INFO L82 PathProgramCache]: Analyzing trace with hash -619480953, now seen corresponding path program 1 times [2018-10-26 23:19:35,853 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:19:35,853 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:19:35,867 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:19:36,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:19:36,148 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:19:36,338 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 77 proven. 46 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-10-26 23:19:36,338 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-26 23:19:36,849 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 11 proven. 24 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-10-26 23:19:36,851 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-26 23:19:36,851 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-26 23:19:36,858 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:19:36,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:19:36,955 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:19:37,043 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 77 proven. 46 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-10-26 23:19:37,043 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-26 23:19:37,268 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 11 proven. 24 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-10-26 23:19:37,286 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-10-26 23:19:37,287 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14, 13, 14] total 24 [2018-10-26 23:19:37,287 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-10-26 23:19:37,288 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-10-26 23:19:37,288 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=480, Unknown=0, NotChecked=0, Total=552 [2018-10-26 23:19:37,288 INFO L87 Difference]: Start difference. First operand 3156 states and 3649 transitions. Second operand 24 states. [2018-10-26 23:19:43,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:19:43,406 INFO L93 Difference]: Finished difference Result 7053 states and 8223 transitions. [2018-10-26 23:19:43,407 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2018-10-26 23:19:43,407 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 260 [2018-10-26 23:19:43,408 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:19:43,418 INFO L225 Difference]: With dead ends: 7053 [2018-10-26 23:19:43,419 INFO L226 Difference]: Without dead ends: 4252 [2018-10-26 23:19:43,426 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1099 GetRequests, 1016 SyntacticMatches, 14 SemanticMatches, 69 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1208 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=870, Invalid=4100, Unknown=0, NotChecked=0, Total=4970 [2018-10-26 23:19:43,429 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4252 states. [2018-10-26 23:19:43,756 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4252 to 4036. [2018-10-26 23:19:43,756 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4036 states. [2018-10-26 23:19:43,761 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4036 states to 4036 states and 4670 transitions. [2018-10-26 23:19:43,762 INFO L78 Accepts]: Start accepts. Automaton has 4036 states and 4670 transitions. Word has length 260 [2018-10-26 23:19:43,762 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:19:43,762 INFO L481 AbstractCegarLoop]: Abstraction has 4036 states and 4670 transitions. [2018-10-26 23:19:43,763 INFO L482 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-10-26 23:19:43,763 INFO L276 IsEmpty]: Start isEmpty. Operand 4036 states and 4670 transitions. [2018-10-26 23:19:43,768 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 262 [2018-10-26 23:19:43,768 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:19:43,769 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:19:43,769 INFO L424 AbstractCegarLoop]: === Iteration 35 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:19:43,769 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:19:43,769 INFO L82 PathProgramCache]: Analyzing trace with hash 263416933, now seen corresponding path program 1 times [2018-10-26 23:19:43,771 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:19:43,771 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:19:43,800 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:19:44,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:19:44,122 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:19:44,334 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 61 proven. 52 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-10-26 23:19:44,334 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-26 23:19:44,762 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 13 proven. 11 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-10-26 23:19:44,764 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-26 23:19:44,764 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-26 23:19:44,772 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:19:44,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:19:44,874 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:19:44,970 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 61 proven. 52 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-10-26 23:19:44,970 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-26 23:19:45,425 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 13 proven. 11 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-10-26 23:19:45,445 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-10-26 23:19:45,445 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10] total 17 [2018-10-26 23:19:45,446 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-10-26 23:19:45,447 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-10-26 23:19:45,447 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=228, Unknown=0, NotChecked=0, Total=272 [2018-10-26 23:19:45,447 INFO L87 Difference]: Start difference. First operand 4036 states and 4670 transitions. Second operand 17 states. [2018-10-26 23:19:47,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:19:47,897 INFO L93 Difference]: Finished difference Result 8058 states and 9443 transitions. [2018-10-26 23:19:47,898 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-10-26 23:19:47,898 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 261 [2018-10-26 23:19:47,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:19:47,909 INFO L225 Difference]: With dead ends: 8058 [2018-10-26 23:19:47,910 INFO L226 Difference]: Without dead ends: 4467 [2018-10-26 23:19:47,917 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1073 GetRequests, 1025 SyntacticMatches, 13 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 215 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=334, Invalid=998, Unknown=0, NotChecked=0, Total=1332 [2018-10-26 23:19:47,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4467 states. [2018-10-26 23:19:48,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4467 to 4403. [2018-10-26 23:19:48,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4403 states. [2018-10-26 23:19:48,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4403 states to 4403 states and 5122 transitions. [2018-10-26 23:19:48,499 INFO L78 Accepts]: Start accepts. Automaton has 4403 states and 5122 transitions. Word has length 261 [2018-10-26 23:19:48,499 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:19:48,499 INFO L481 AbstractCegarLoop]: Abstraction has 4403 states and 5122 transitions. [2018-10-26 23:19:48,499 INFO L482 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-10-26 23:19:48,500 INFO L276 IsEmpty]: Start isEmpty. Operand 4403 states and 5122 transitions. [2018-10-26 23:19:48,503 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 263 [2018-10-26 23:19:48,503 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:19:48,503 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:19:48,504 INFO L424 AbstractCegarLoop]: === Iteration 36 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:19:48,504 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:19:48,504 INFO L82 PathProgramCache]: Analyzing trace with hash 58097619, now seen corresponding path program 1 times [2018-10-26 23:19:48,504 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:19:48,505 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:19:48,521 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:19:48,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:19:48,823 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:19:49,488 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 88 proven. 26 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-10-26 23:19:49,489 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-26 23:19:50,093 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 19 proven. 3 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-10-26 23:19:50,095 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-26 23:19:50,095 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-26 23:19:50,102 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:19:50,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:19:50,203 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:19:50,244 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 88 proven. 26 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-10-26 23:19:50,244 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-26 23:19:51,272 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 19 proven. 3 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-10-26 23:19:51,291 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-10-26 23:19:51,292 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9] total 15 [2018-10-26 23:19:51,292 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-10-26 23:19:51,293 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-10-26 23:19:51,293 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2018-10-26 23:19:51,293 INFO L87 Difference]: Start difference. First operand 4403 states and 5122 transitions. Second operand 15 states. [2018-10-26 23:19:54,510 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:19:54,510 INFO L93 Difference]: Finished difference Result 10865 states and 12724 transitions. [2018-10-26 23:19:54,510 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-10-26 23:19:54,510 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 262 [2018-10-26 23:19:54,511 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:19:54,522 INFO L225 Difference]: With dead ends: 10865 [2018-10-26 23:19:54,523 INFO L226 Difference]: Without dead ends: 6858 [2018-10-26 23:19:54,528 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1068 GetRequests, 1033 SyntacticMatches, 9 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 92 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=155, Invalid=601, Unknown=0, NotChecked=0, Total=756 [2018-10-26 23:19:54,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6858 states. [2018-10-26 23:19:55,054 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6858 to 6055. [2018-10-26 23:19:55,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6055 states. [2018-10-26 23:19:55,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6055 states to 6055 states and 7101 transitions. [2018-10-26 23:19:55,064 INFO L78 Accepts]: Start accepts. Automaton has 6055 states and 7101 transitions. Word has length 262 [2018-10-26 23:19:55,064 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:19:55,064 INFO L481 AbstractCegarLoop]: Abstraction has 6055 states and 7101 transitions. [2018-10-26 23:19:55,064 INFO L482 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-10-26 23:19:55,064 INFO L276 IsEmpty]: Start isEmpty. Operand 6055 states and 7101 transitions. [2018-10-26 23:19:55,071 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 263 [2018-10-26 23:19:55,071 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:19:55,072 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:19:55,072 INFO L424 AbstractCegarLoop]: === Iteration 37 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:19:55,072 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:19:55,072 INFO L82 PathProgramCache]: Analyzing trace with hash 342083157, now seen corresponding path program 1 times [2018-10-26 23:19:55,073 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:19:55,073 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:19:55,090 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:19:55,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 23:19:55,380 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 23:19:55,487 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 32 proven. 0 refuted. 0 times theorem prover too weak. 109 trivial. 0 not checked. [2018-10-26 23:19:55,487 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-26 23:19:55,489 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 23:19:55,490 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-26 23:19:55,490 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-26 23:19:55,490 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-26 23:19:55,490 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-10-26 23:19:55,490 INFO L87 Difference]: Start difference. First operand 6055 states and 7101 transitions. Second operand 7 states. [2018-10-26 23:19:56,405 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 23:19:56,405 INFO L93 Difference]: Finished difference Result 10162 states and 12072 transitions. [2018-10-26 23:19:56,406 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-26 23:19:56,406 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 262 [2018-10-26 23:19:56,406 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 23:19:56,415 INFO L225 Difference]: With dead ends: 10162 [2018-10-26 23:19:56,415 INFO L226 Difference]: Without dead ends: 4472 [2018-10-26 23:19:56,422 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 263 GetRequests, 256 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2018-10-26 23:19:56,426 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4472 states. [2018-10-26 23:19:56,752 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4472 to 4364. [2018-10-26 23:19:56,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4364 states. [2018-10-26 23:19:56,757 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4364 states to 4364 states and 5152 transitions. [2018-10-26 23:19:56,759 INFO L78 Accepts]: Start accepts. Automaton has 4364 states and 5152 transitions. Word has length 262 [2018-10-26 23:19:56,759 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 23:19:56,759 INFO L481 AbstractCegarLoop]: Abstraction has 4364 states and 5152 transitions. [2018-10-26 23:19:56,759 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-26 23:19:56,759 INFO L276 IsEmpty]: Start isEmpty. Operand 4364 states and 5152 transitions. [2018-10-26 23:19:56,763 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 264 [2018-10-26 23:19:56,763 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 23:19:56,764 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 23:19:56,764 INFO L424 AbstractCegarLoop]: === Iteration 38 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 23:19:56,764 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 23:19:56,764 INFO L82 PathProgramCache]: Analyzing trace with hash -843888200, now seen corresponding path program 1 times [2018-10-26 23:19:56,765 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-26 23:19:56,765 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/cvc4nyu Starting monitored process 44 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-26 23:19:56,784 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 23:19:57,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-10-26 23:19:57,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (44)] Exception during sending of exit command (exit): Broken pipe [2018-10-26 23:19:57,912 INFO L442 BasicCegarLoop]: Counterexample might be feasible [2018-10-26 23:19:58,210 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 26.10 11:19:58 BoogieIcfgContainer [2018-10-26 23:19:58,211 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-10-26 23:19:58,211 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-10-26 23:19:58,211 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-10-26 23:19:58,211 INFO L276 PluginConnector]: Witness Printer initialized [2018-10-26 23:19:58,212 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.10 11:18:36" (3/4) ... [2018-10-26 23:19:58,215 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-10-26 23:19:58,534 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_052ff093-9721-4b33-9b80-195eb2cef259/bin-2019/utaipan/witness.graphml [2018-10-26 23:19:58,534 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-10-26 23:19:58,535 INFO L168 Benchmark]: Toolchain (without parser) took 84498.19 ms. Allocated memory was 1.0 GB in the beginning and 2.5 GB in the end (delta: 1.4 GB). Free memory was 951.9 MB in the beginning and 2.2 GB in the end (delta: -1.2 GB). Peak memory consumption was 220.8 MB. Max. memory is 11.5 GB. [2018-10-26 23:19:58,536 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-10-26 23:19:58,536 INFO L168 Benchmark]: CACSL2BoogieTranslator took 516.78 ms. Allocated memory is still 1.0 GB. Free memory was 951.9 MB in the beginning and 930.4 MB in the end (delta: 21.5 MB). Peak memory consumption was 21.5 MB. Max. memory is 11.5 GB. [2018-10-26 23:19:58,537 INFO L168 Benchmark]: Boogie Procedure Inliner took 31.50 ms. Allocated memory is still 1.0 GB. Free memory was 930.4 MB in the beginning and 925.1 MB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2018-10-26 23:19:58,537 INFO L168 Benchmark]: Boogie Preprocessor took 53.09 ms. Allocated memory is still 1.0 GB. Free memory is still 925.1 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-10-26 23:19:58,537 INFO L168 Benchmark]: RCFGBuilder took 1579.37 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 175.1 MB). Free memory was 925.1 MB in the beginning and 1.1 GB in the end (delta: -172.9 MB). Peak memory consumption was 17.6 MB. Max. memory is 11.5 GB. [2018-10-26 23:19:58,540 INFO L168 Benchmark]: TraceAbstraction took 81989.78 ms. Allocated memory was 1.2 GB in the beginning and 2.5 GB in the end (delta: 1.3 GB). Free memory was 1.1 GB in the beginning and 2.2 GB in the end (delta: -1.1 GB). Peak memory consumption was 132.4 MB. Max. memory is 11.5 GB. [2018-10-26 23:19:58,541 INFO L168 Benchmark]: Witness Printer took 323.13 ms. Allocated memory is still 2.5 GB. Free memory was 2.2 GB in the beginning and 2.2 GB in the end (delta: 59.4 MB). Peak memory consumption was 59.4 MB. Max. memory is 11.5 GB. [2018-10-26 23:19:58,543 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 516.78 ms. Allocated memory is still 1.0 GB. Free memory was 951.9 MB in the beginning and 930.4 MB in the end (delta: 21.5 MB). Peak memory consumption was 21.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 31.50 ms. Allocated memory is still 1.0 GB. Free memory was 930.4 MB in the beginning and 925.1 MB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 53.09 ms. Allocated memory is still 1.0 GB. Free memory is still 925.1 MB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 1579.37 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 175.1 MB). Free memory was 925.1 MB in the beginning and 1.1 GB in the end (delta: -172.9 MB). Peak memory consumption was 17.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 81989.78 ms. Allocated memory was 1.2 GB in the beginning and 2.5 GB in the end (delta: 1.3 GB). Free memory was 1.1 GB in the beginning and 2.2 GB in the end (delta: -1.1 GB). Peak memory consumption was 132.4 MB. Max. memory is 11.5 GB. * Witness Printer took 323.13 ms. Allocated memory is still 2.5 GB. Free memory was 2.2 GB in the beginning and 2.2 GB in the end (delta: 59.4 MB). Peak memory consumption was 59.4 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 654]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L96] _Bool side1Failed ; [L97] _Bool side2Failed ; [L102] static _Bool side1Failed_History_0 ; [L103] static _Bool side1Failed_History_1 ; [L104] static _Bool side1Failed_History_2 ; [L105] static _Bool side2Failed_History_0 ; [L106] static _Bool side2Failed_History_1 ; [L107] static _Bool side2Failed_History_2 ; [L69] msg_t nomsg = (msg_t )-1; [L70] port_t cs1 ; [L71] int8_t cs1_old ; [L72] int8_t cs1_new ; [L73] port_t cs2 ; [L74] int8_t cs2_old ; [L75] int8_t cs2_new ; [L76] port_t s1s2 ; [L77] int8_t s1s2_old ; [L78] int8_t s1s2_new ; [L79] port_t s1s1 ; [L80] int8_t s1s1_old ; [L81] int8_t s1s1_new ; [L82] port_t s2s1 ; [L83] int8_t s2s1_old ; [L84] int8_t s2s1_new ; [L85] port_t s2s2 ; [L86] int8_t s2s2_old ; [L87] int8_t s2s2_new ; [L88] port_t s1p ; [L89] int8_t s1p_old ; [L90] int8_t s1p_new ; [L91] port_t s2p ; [L92] int8_t s2p_old ; [L93] int8_t s2p_new ; [L98] msg_t side1_written ; [L99] msg_t side2_written ; [L108] static int8_t active_side_History_0 ; [L109] static int8_t active_side_History_1 ; [L110] static int8_t active_side_History_2 ; [L111] static msg_t manual_selection_History_0 ; [L112] static msg_t manual_selection_History_1 ; [L113] static msg_t manual_selection_History_2 ; [L455] void (*nodes[4])(void) = { & Console_task_each_pals_period, & Side1_activestandby_task_each_pals_period, & Side2_activestandby_task_each_pals_period, & Pendulum_prism_task_each_pals_period}; VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(nomsg)=0, \old(s1p)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L577] int c1 ; [L578] int i2 ; [L581] c1 = 0 [L582] side1Failed = __VERIFIER_nondet_bool() [L583] side2Failed = __VERIFIER_nondet_bool() [L584] side1_written = __VERIFIER_nondet_char() [L585] side2_written = __VERIFIER_nondet_char() [L586] side1Failed_History_0 = __VERIFIER_nondet_bool() [L587] side1Failed_History_1 = __VERIFIER_nondet_bool() [L588] side1Failed_History_2 = __VERIFIER_nondet_bool() [L589] side2Failed_History_0 = __VERIFIER_nondet_bool() [L590] side2Failed_History_1 = __VERIFIER_nondet_bool() [L591] side2Failed_History_2 = __VERIFIER_nondet_bool() [L592] active_side_History_0 = __VERIFIER_nondet_char() [L593] active_side_History_1 = __VERIFIER_nondet_char() [L594] active_side_History_2 = __VERIFIER_nondet_char() [L595] manual_selection_History_0 = __VERIFIER_nondet_char() [L596] manual_selection_History_1 = __VERIFIER_nondet_char() [L597] manual_selection_History_2 = __VERIFIER_nondet_char() [L598] CALL, EXPR init() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L239] COND FALSE !((int )side1Failed_History_0 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L242] COND FALSE !((int )side2Failed_History_0 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L245] COND FALSE !((int )active_side_History_0 != -2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L248] COND FALSE !((int )manual_selection_History_0 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L251] COND FALSE !((int )side1Failed_History_1 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L254] COND FALSE !((int )side2Failed_History_1 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L257] COND FALSE !((int )active_side_History_1 != -2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L260] COND FALSE !((int )manual_selection_History_1 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L263] COND FALSE !((int )side1Failed_History_2 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] COND FALSE !((int )side2Failed_History_2 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L269] COND FALSE !((int )active_side_History_2 != -2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L272] COND FALSE !((int )manual_selection_History_2 != 0) [L275] RET return (1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=1, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L598] EXPR init() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, init()=1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L598] i2 = init() [L600] cs1_old = nomsg [L601] cs1_new = nomsg [L602] cs2_old = nomsg [L603] cs2_new = nomsg [L604] s1s2_old = nomsg [L605] s1s2_new = nomsg [L606] s1s1_old = nomsg [L607] s1s1_new = nomsg [L608] s2s1_old = nomsg [L609] s2s1_new = nomsg [L610] s2s2_old = nomsg [L611] s2s2_new = nomsg [L612] s1p_old = nomsg [L613] s1p_new = nomsg [L614] s2p_old = nomsg [L615] s2p_new = nomsg [L616] i2 = 0 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, i2=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L617] COND TRUE i2 < 10 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, i2=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L619] CALL Console_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L293] msg_t manual_selection ; [L294] char tmp ; [L297] tmp = __VERIFIER_nondet_char() [L298] manual_selection = tmp VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L299] CALL write_manual_selection_history(manual_selection) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=1, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L209] manual_selection_History_2 = manual_selection_History_1 [L210] manual_selection_History_1 = manual_selection_History_0 [L211] RET manual_selection_History_0 = val VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=1, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, val=1] [L299] write_manual_selection_history(manual_selection) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, manual_selection=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L300] COND TRUE, EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, manual_selection=1, manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L300] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L301] COND TRUE, EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, manual_selection=1, manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L301] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L302] RET manual_selection = (msg_t )0 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L619] Console_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, i2=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L620] CALL Side1_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L308] int8_t side1 ; [L309] int8_t side2 ; [L310] msg_t manual_selection ; [L311] int8_t next_state ; [L314] side1 = nomsg [L315] side2 = nomsg [L316] manual_selection = (msg_t )0 [L317] side1Failed = __VERIFIER_nondet_bool() [L318] CALL write_side1_failed_history(side1Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=1, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L119] side1Failed_History_2 = side1Failed_History_1 [L120] side1Failed_History_1 = side1Failed_History_0 [L121] RET side1Failed_History_0 = val VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=1, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, val=1] [L318] write_side1_failed_history(side1Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L319] COND TRUE \read(side1Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L320] COND FALSE, EXPR !(nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new=-1, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L320] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L321] COND FALSE, EXPR !(nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new=-1, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L321] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L322] COND FALSE, EXPR !(nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new=-1, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L322] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L323] RET side1_written = nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L620] Side1_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, i2=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L621] CALL Side2_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L365] int8_t side1 ; [L366] int8_t side2 ; [L367] msg_t manual_selection ; [L368] int8_t next_state ; [L371] side1 = nomsg [L372] side2 = nomsg [L373] manual_selection = (msg_t )0 [L374] side2Failed = __VERIFIER_nondet_bool() [L375] CALL write_side2_failed_history(side2Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L149] side2Failed_History_2 = side2Failed_History_1 [L150] side2Failed_History_1 = side2Failed_History_0 [L151] RET side2Failed_History_0 = val VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, val=0] [L375] write_side2_failed_history(side2Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L376] COND FALSE !(\read(side2Failed)) [L383] side1 = s1s2_old [L384] s1s2_old = nomsg [L385] side2 = s2s2_old [L386] s2s2_old = nomsg [L387] manual_selection = cs2_old [L388] cs2_old = nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L389] COND TRUE (int )side1 == (int )side2 [L390] next_state = (int8_t )0 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, next_state=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L413] COND TRUE, EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, next_state=0, next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L413] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L414] COND TRUE, EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, next_state=0, next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L414] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L415] COND TRUE, EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, next_state=0, next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L415] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L416] RET side2_written = next_state VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, next_state=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L621] Side2_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, i2=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L622] CALL Pendulum_prism_task_each_pals_period() VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L422] int8_t active_side ; [L423] int8_t tmp ; [L424] int8_t side1 ; [L425] int8_t side2 ; VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L428] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L190] COND TRUE (int )index == 0 [L191] RET return (active_side_History_0); VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=-2, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, index=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L428] EXPR read_active_side_history((unsigned char)0) VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_active_side_history((unsigned char)0)=-2, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L428] tmp = read_active_side_history((unsigned char)0) [L429] active_side = tmp [L430] side1 = nomsg [L431] side2 = nomsg [L432] side1 = s1p_old [L433] s1p_old = nomsg [L434] side2 = s2p_old [L435] s2p_old = nomsg VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=254, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=254] [L436] COND FALSE !((int )side1 == 1) VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=254, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=254] [L439] COND FALSE !((int )side2 == 1) VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=254, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=254] [L442] COND FALSE !((int )side1 == 0) [L449] active_side = (int8_t )0 VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=254] [L451] CALL write_active_side_history(active_side) VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L179] active_side_History_2 = active_side_History_1 [L180] active_side_History_1 = active_side_History_0 [L181] RET active_side_History_0 = val VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, val=0] [L451] RET write_active_side_history(active_side) VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=254] [L622] Pendulum_prism_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, i2=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L623] cs1_old = cs1_new [L624] cs1_new = nomsg [L625] cs2_old = cs2_new [L626] cs2_new = nomsg [L627] s1s2_old = s1s2_new [L628] s1s2_new = nomsg [L629] s1s1_old = s1s1_new [L630] s1s1_new = nomsg [L631] s2s1_old = s2s1_new [L632] s2s1_new = nomsg [L633] s2s2_old = s2s2_new [L634] s2s2_new = nomsg [L635] s1p_old = s1p_new [L636] s1p_new = nomsg [L637] s2p_old = s2p_new [L638] s2p_new = nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, i2=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L639] CALL, EXPR check() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L458] int tmp ; [L459] msg_t tmp___0 ; [L460] _Bool tmp___1 ; [L461] _Bool tmp___2 ; [L462] _Bool tmp___3 ; [L463] _Bool tmp___4 ; [L464] int8_t tmp___5 ; [L465] _Bool tmp___6 ; [L466] _Bool tmp___7 ; [L467] _Bool tmp___8 ; [L468] int8_t tmp___9 ; [L469] _Bool tmp___10 ; [L470] _Bool tmp___11 ; [L471] _Bool tmp___12 ; [L472] msg_t tmp___13 ; [L473] _Bool tmp___14 ; [L474] _Bool tmp___15 ; [L475] _Bool tmp___16 ; [L476] _Bool tmp___17 ; [L477] int8_t tmp___18 ; [L478] int8_t tmp___19 ; [L479] int8_t tmp___20 ; VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L482] COND FALSE !(! side1Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L485] COND TRUE ! side2Failed [L486] tmp = 1 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L491] CALL, EXPR read_manual_selection_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L220] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L223] COND TRUE (int )index == 1 [L224] RET return (manual_selection_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L491] EXPR read_manual_selection_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_manual_selection_history((unsigned char)1)=0, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L491] tmp___0 = read_manual_selection_history((unsigned char)1) [L492] COND TRUE ! tmp___0 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0] [L493] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] RET return (side1Failed_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L493] EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_side1_failed_history((unsigned char)1)=0, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0] [L493] tmp___1 = read_side1_failed_history((unsigned char)1) [L494] COND TRUE ! tmp___1 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0] [L495] CALL, EXPR read_side1_failed_history((unsigned char)0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND TRUE (int )index == 0 [L131] RET return (side1Failed_History_0); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=1, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L495] EXPR read_side1_failed_history((unsigned char)0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_side1_failed_history((unsigned char)0)=1, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0] [L495] tmp___2 = read_side1_failed_history((unsigned char)0) [L496] COND FALSE !(! tmp___2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___2=1] [L521] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] RET return (side1Failed_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L521] EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_side1_failed_history((unsigned char)1)=0, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___2=1] [L521] tmp___7 = read_side1_failed_history((unsigned char)1) [L522] COND FALSE !(\read(tmp___7)) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___2=1, tmp___7=0] [L537] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] RET return (side1Failed_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L537] EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_side1_failed_history((unsigned char)1)=0, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___2=1, tmp___7=0] [L537] tmp___11 = read_side1_failed_history((unsigned char)1) [L538] COND TRUE ! tmp___11 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___11=0, tmp___2=1, tmp___7=0] [L539] CALL, EXPR read_side2_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L160] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L163] COND TRUE (int )index == 1 [L164] RET return (side2Failed_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L539] EXPR read_side2_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_side2_failed_history((unsigned char)1)=0, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___11=0, tmp___2=1, tmp___7=0] [L539] tmp___12 = read_side2_failed_history((unsigned char)1) [L540] COND FALSE !(\read(tmp___12)) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___11=0, tmp___12=0, tmp___2=1, tmp___7=0] [L553] CALL, EXPR read_active_side_history((unsigned char)2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=2, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L190] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=2, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=2, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L193] COND FALSE !((int )index == 1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=2, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=2, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L196] COND TRUE (int )index == 2 [L197] RET return (active_side_History_2); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=2, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=-2, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=2, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L553] EXPR read_active_side_history((unsigned char)2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_active_side_history((unsigned char)2)=-2, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___11=0, tmp___12=0, tmp___2=1, tmp___7=0] [L553] tmp___20 = read_active_side_history((unsigned char)2) [L554] COND FALSE !((int )tmp___20 > -2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___11=0, tmp___12=0, tmp___2=1, tmp___20=254, tmp___7=0] [L572] RET return (1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=1, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___11=0, tmp___12=0, tmp___2=1, tmp___20=254, tmp___7=0] [L639] EXPR check() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=0, check()=1, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, i2=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L639] c1 = check() [L640] CALL assert(c1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(arg)=1, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L652] COND FALSE, RET !(! arg) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(arg)=1, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, arg=1, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L640] assert(c1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=1, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, i2=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L641] i2 ++ VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=1, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, i2=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L617] COND TRUE i2 < 10 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=1, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, i2=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L619] CALL Console_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L293] msg_t manual_selection ; [L294] char tmp ; [L297] tmp = __VERIFIER_nondet_char() [L298] manual_selection = tmp VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L299] CALL write_manual_selection_history(manual_selection) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L209] manual_selection_History_2 = manual_selection_History_1 [L210] manual_selection_History_1 = manual_selection_History_0 [L211] RET manual_selection_History_0 = val VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, val=0] [L299] write_manual_selection_history(manual_selection) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L300] COND TRUE, EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection=0, manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L300] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L301] COND TRUE, EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection=0, manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L301] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L302] RET manual_selection = (msg_t )0 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L619] Console_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=1, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, i2=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L620] CALL Side1_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L308] int8_t side1 ; [L309] int8_t side2 ; [L310] msg_t manual_selection ; [L311] int8_t next_state ; [L314] side1 = nomsg [L315] side2 = nomsg [L316] manual_selection = (msg_t )0 [L317] side1Failed = __VERIFIER_nondet_bool() [L318] CALL write_side1_failed_history(side1Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=0, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L119] side1Failed_History_2 = side1Failed_History_1 [L120] side1Failed_History_1 = side1Failed_History_0 [L121] RET side1Failed_History_0 = val VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, val=0] [L318] write_side1_failed_history(side1Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=255, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L319] COND FALSE !(\read(side1Failed)) [L326] side1 = s1s1_old [L327] s1s1_old = nomsg [L328] side2 = s2s1_old [L329] s2s1_old = nomsg [L330] manual_selection = cs1_old [L331] cs1_old = nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=255, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L332] COND FALSE !((int )side1 == (int )side2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=255, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L335] COND TRUE (int )side1 == (int )nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=255, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L336] COND TRUE (int )side2 != (int )nomsg [L337] next_state = (int8_t )0 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, next_state=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=255, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L356] COND TRUE, EXPR next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, next_state=0, next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=255, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L356] s1s1_new = next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new [L357] COND TRUE, EXPR next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, next_state=0, next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=255, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L357] s1s2_new = next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new [L358] COND TRUE, EXPR next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, next_state=0, next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=255, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L358] s1p_new = next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new [L359] RET side1_written = next_state VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, next_state=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L620] Side1_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=1, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, i2=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L621] CALL Side2_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L365] int8_t side1 ; [L366] int8_t side2 ; [L367] msg_t manual_selection ; [L368] int8_t next_state ; [L371] side1 = nomsg [L372] side2 = nomsg [L373] manual_selection = (msg_t )0 [L374] side2Failed = __VERIFIER_nondet_bool() [L375] CALL write_side2_failed_history(side2Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=1, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L149] side2Failed_History_2 = side2Failed_History_1 [L150] side2Failed_History_1 = side2Failed_History_0 [L151] RET side2Failed_History_0 = val VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=1, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, val=1] [L375] write_side2_failed_history(side2Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L376] COND TRUE \read(side2Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L377] COND FALSE, EXPR !(nomsg != nomsg && s2s1_new == nomsg ? nomsg : s2s1_new) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, nomsg != nomsg && s2s1_new == nomsg ? nomsg : s2s1_new=-1, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L377] s2s1_new = nomsg != nomsg && s2s1_new == nomsg ? nomsg : s2s1_new [L378] COND FALSE, EXPR !(nomsg != nomsg && s2s2_new == nomsg ? nomsg : s2s2_new) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, nomsg != nomsg && s2s2_new == nomsg ? nomsg : s2s2_new=-1, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L378] s2s2_new = nomsg != nomsg && s2s2_new == nomsg ? nomsg : s2s2_new [L379] COND FALSE, EXPR !(nomsg != nomsg && s2p_new == nomsg ? nomsg : s2p_new) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, nomsg != nomsg && s2p_new == nomsg ? nomsg : s2p_new=-1, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L379] s2p_new = nomsg != nomsg && s2p_new == nomsg ? nomsg : s2p_new [L380] RET side2_written = nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=255, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L621] Side2_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=1, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, i2=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L622] CALL Pendulum_prism_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L422] int8_t active_side ; [L423] int8_t tmp ; [L424] int8_t side1 ; [L425] int8_t side2 ; VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L428] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L190] COND TRUE (int )index == 0 [L191] RET return (active_side_History_0); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, index=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L428] EXPR read_active_side_history((unsigned char)0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, read_active_side_history((unsigned char)0)=0, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L428] tmp = read_active_side_history((unsigned char)0) [L429] active_side = tmp [L430] side1 = nomsg [L431] side2 = nomsg [L432] side1 = s1p_old [L433] s1p_old = nomsg [L434] side2 = s2p_old [L435] s2p_old = nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L436] COND FALSE !((int )side1 == 1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L439] COND FALSE !((int )side2 == 1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L442] COND FALSE !((int )side1 == 0) [L449] active_side = (int8_t )0 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L451] CALL write_active_side_history(active_side) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L179] active_side_History_2 = active_side_History_1 [L180] active_side_History_1 = active_side_History_0 [L181] RET active_side_History_0 = val VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, val=0] [L451] RET write_active_side_history(active_side) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L622] Pendulum_prism_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, c1=1, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, i2=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L623] cs1_old = cs1_new [L624] cs1_new = nomsg [L625] cs2_old = cs2_new [L626] cs2_new = nomsg [L627] s1s2_old = s1s2_new [L628] s1s2_new = nomsg [L629] s1s1_old = s1s1_new [L630] s1s1_new = nomsg [L631] s2s1_old = s2s1_new [L632] s2s1_new = nomsg [L633] s2s2_old = s2s2_new [L634] s2s2_new = nomsg [L635] s1p_old = s1p_new [L636] s1p_new = nomsg [L637] s2p_old = s2p_new [L638] s2p_new = nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, c1=1, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, i2=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L639] CALL, EXPR check() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L458] int tmp ; [L459] msg_t tmp___0 ; [L460] _Bool tmp___1 ; [L461] _Bool tmp___2 ; [L462] _Bool tmp___3 ; [L463] _Bool tmp___4 ; [L464] int8_t tmp___5 ; [L465] _Bool tmp___6 ; [L466] _Bool tmp___7 ; [L467] _Bool tmp___8 ; [L468] int8_t tmp___9 ; [L469] _Bool tmp___10 ; [L470] _Bool tmp___11 ; [L471] _Bool tmp___12 ; [L472] msg_t tmp___13 ; [L473] _Bool tmp___14 ; [L474] _Bool tmp___15 ; [L475] _Bool tmp___16 ; [L476] _Bool tmp___17 ; [L477] int8_t tmp___18 ; [L478] int8_t tmp___19 ; [L479] int8_t tmp___20 ; VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L482] COND TRUE ! side1Failed [L483] tmp = 1 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L491] CALL, EXPR read_manual_selection_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L220] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, index=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L223] COND TRUE (int )index == 1 [L224] RET return (manual_selection_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, index=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L491] EXPR read_manual_selection_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, read_manual_selection_history((unsigned char)1)=1, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L491] tmp___0 = read_manual_selection_history((unsigned char)1) [L492] COND FALSE !(! tmp___0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1] [L521] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, index=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] RET return (side1Failed_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, index=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L521] EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, read_side1_failed_history((unsigned char)1)=1, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1] [L521] tmp___7 = read_side1_failed_history((unsigned char)1) [L522] COND TRUE \read(tmp___7) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1, tmp___7=1] [L523] CALL, EXPR read_side2_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L160] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, index=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L163] COND TRUE (int )index == 1 [L164] RET return (side2Failed_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, index=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L523] EXPR read_side2_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, read_side2_failed_history((unsigned char)1)=0, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1, tmp___7=1] [L523] tmp___8 = read_side2_failed_history((unsigned char)1) [L524] COND TRUE ! tmp___8 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1, tmp___7=1, tmp___8=0] [L525] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L190] COND TRUE (int )index == 0 [L191] RET return (active_side_History_0); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, index=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L525] EXPR read_active_side_history((unsigned char)0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, read_active_side_history((unsigned char)0)=0, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1, tmp___7=1, tmp___8=0] [L525] tmp___5 = read_active_side_history((unsigned char)0) [L526] COND TRUE ! ((int )tmp___5 == 2) [L527] RET return (0); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1, tmp___5=0, tmp___7=1, tmp___8=0] [L639] EXPR check() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, c1=1, check()=0, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, i2=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L639] c1 = check() [L640] CALL assert(c1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(arg)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L652] COND TRUE ! arg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(arg)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, arg=0, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L654] __VERIFIER_error() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(arg)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, arg=0, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 19 procedures, 236 locations, 1 error locations. UNSAFE Result, 81.9s OverallTime, 38 OverallIterations, 6 TraceHistogramMax, 53.8s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 12801 SDtfs, 19592 SDslu, 21735 SDs, 0 SdLazy, 34765 SolverSat, 6434 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 37.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 9163 GetRequests, 8657 SyntacticMatches, 57 SemanticMatches, 449 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3577 ImplicationChecksByTransitivity, 11.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=6055occurred in iteration=36, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 6.1s AutomataMinimizationTime, 37 MinimizatonAttempts, 6582 StatesRemovedByMinimization, 31 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 2.0s SsaConstructionTime, 5.0s SatisfiabilityAnalysisTime, 11.9s InterpolantComputationTime, 6903 NumberOfCodeBlocks, 6903 NumberOfCodeBlocksAsserted, 43 NumberOfCheckSat, 8816 ConstructedInterpolants, 0 QuantifiedInterpolants, 4940223 SizeOfPredicates, 97 NumberOfNonLiveVariables, 24920 ConjunctsInSsa, 311 ConjunctsInUnsatCore, 51 InterpolantComputations, 33 PerfectInterpolantSequences, 2664/3064 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...