./Ultimate.py --spec ../../sv-benchmarks/c/ReachSafety.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_1.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 1dbac8bc Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_1.ufo.UNBOUNDED.pals.c -s /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 51b120a585d23a491f06d4bb80c2a463453987ac ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_1.ufo.UNBOUNDED.pals.c -s /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 51b120a585d23a491f06d4bb80c2a463453987ac ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-1dbac8b [2018-10-27 00:17:42,640 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-10-27 00:17:42,642 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-10-27 00:17:42,652 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-10-27 00:17:42,653 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-10-27 00:17:42,654 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-10-27 00:17:42,655 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-10-27 00:17:42,656 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-10-27 00:17:42,657 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-10-27 00:17:42,660 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-10-27 00:17:42,662 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-10-27 00:17:42,662 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-10-27 00:17:42,663 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-10-27 00:17:42,665 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-10-27 00:17:42,671 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-10-27 00:17:42,672 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-10-27 00:17:42,674 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-10-27 00:17:42,676 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-10-27 00:17:42,679 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-10-27 00:17:42,681 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-10-27 00:17:42,683 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-10-27 00:17:42,684 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-10-27 00:17:42,685 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-10-27 00:17:42,685 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-10-27 00:17:42,685 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-10-27 00:17:42,687 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-10-27 00:17:42,688 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-10-27 00:17:42,689 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-10-27 00:17:42,689 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-10-27 00:17:42,690 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-10-27 00:17:42,690 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-10-27 00:17:42,690 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-10-27 00:17:42,690 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-10-27 00:17:42,691 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-10-27 00:17:42,691 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-10-27 00:17:42,692 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-10-27 00:17:42,692 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-10-27 00:17:42,707 INFO L110 SettingsManager]: Loading preferences was successful [2018-10-27 00:17:42,708 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-10-27 00:17:42,709 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-10-27 00:17:42,711 INFO L133 SettingsManager]: * User list type=DISABLED [2018-10-27 00:17:42,711 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-10-27 00:17:42,711 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-10-27 00:17:42,711 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-10-27 00:17:42,711 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-10-27 00:17:42,711 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-10-27 00:17:42,711 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-10-27 00:17:42,712 INFO L133 SettingsManager]: * Interval Domain=false [2018-10-27 00:17:42,712 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-10-27 00:17:42,712 INFO L133 SettingsManager]: * sizeof long=4 [2018-10-27 00:17:42,712 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-10-27 00:17:42,713 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-10-27 00:17:42,713 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-10-27 00:17:42,713 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-10-27 00:17:42,713 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-10-27 00:17:42,713 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-10-27 00:17:42,713 INFO L133 SettingsManager]: * sizeof long double=12 [2018-10-27 00:17:42,713 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-10-27 00:17:42,713 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-10-27 00:17:42,714 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-10-27 00:17:42,714 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-10-27 00:17:42,714 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-10-27 00:17:42,714 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-10-27 00:17:42,714 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-27 00:17:42,714 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-10-27 00:17:42,715 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-10-27 00:17:42,715 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-10-27 00:17:42,715 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-10-27 00:17:42,715 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-10-27 00:17:42,715 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-10-27 00:17:42,715 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-10-27 00:17:42,715 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 51b120a585d23a491f06d4bb80c2a463453987ac [2018-10-27 00:17:42,760 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-10-27 00:17:42,773 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-10-27 00:17:42,776 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-10-27 00:17:42,778 INFO L271 PluginConnector]: Initializing CDTParser... [2018-10-27 00:17:42,778 INFO L276 PluginConnector]: CDTParser initialized [2018-10-27 00:17:42,779 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_1.ufo.UNBOUNDED.pals.c [2018-10-27 00:17:42,826 INFO L218 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/data/6c4a53bc5/39ccaadbde334e6ea1d638c3f7e09d3b/FLAGbfb1824bd [2018-10-27 00:17:43,235 INFO L298 CDTParser]: Found 1 translation units. [2018-10-27 00:17:43,237 INFO L158 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_1.ufo.UNBOUNDED.pals.c [2018-10-27 00:17:43,246 INFO L346 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/data/6c4a53bc5/39ccaadbde334e6ea1d638c3f7e09d3b/FLAGbfb1824bd [2018-10-27 00:17:43,257 INFO L354 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/data/6c4a53bc5/39ccaadbde334e6ea1d638c3f7e09d3b [2018-10-27 00:17:43,260 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-10-27 00:17:43,261 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-10-27 00:17:43,262 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-10-27 00:17:43,262 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-10-27 00:17:43,265 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-10-27 00:17:43,266 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.10 12:17:43" (1/1) ... [2018-10-27 00:17:43,268 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@134985e3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 12:17:43, skipping insertion in model container [2018-10-27 00:17:43,268 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.10 12:17:43" (1/1) ... [2018-10-27 00:17:43,275 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-10-27 00:17:43,308 INFO L174 MainTranslator]: Built tables and reachable declarations [2018-10-27 00:17:43,502 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-27 00:17:43,509 INFO L189 MainTranslator]: Completed pre-run [2018-10-27 00:17:43,564 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-27 00:17:43,580 INFO L193 MainTranslator]: Completed translation [2018-10-27 00:17:43,580 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 12:17:43 WrapperNode [2018-10-27 00:17:43,581 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-10-27 00:17:43,581 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-10-27 00:17:43,582 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-10-27 00:17:43,582 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-10-27 00:17:43,589 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 12:17:43" (1/1) ... [2018-10-27 00:17:43,601 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 12:17:43" (1/1) ... [2018-10-27 00:17:43,620 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-10-27 00:17:43,620 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-10-27 00:17:43,621 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-10-27 00:17:43,621 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-10-27 00:17:43,629 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 12:17:43" (1/1) ... [2018-10-27 00:17:43,629 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 12:17:43" (1/1) ... [2018-10-27 00:17:43,634 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 12:17:43" (1/1) ... [2018-10-27 00:17:43,634 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 12:17:43" (1/1) ... [2018-10-27 00:17:43,764 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 12:17:43" (1/1) ... [2018-10-27 00:17:43,784 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 12:17:43" (1/1) ... [2018-10-27 00:17:43,787 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 12:17:43" (1/1) ... [2018-10-27 00:17:43,793 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-10-27 00:17:43,794 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-10-27 00:17:43,794 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-10-27 00:17:43,794 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-10-27 00:17:43,795 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 12:17:43" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-27 00:17:43,846 INFO L130 BoogieDeclarations]: Found specification of procedure read_manual_selection_history [2018-10-27 00:17:43,846 INFO L138 BoogieDeclarations]: Found implementation of procedure read_manual_selection_history [2018-10-27 00:17:43,847 INFO L130 BoogieDeclarations]: Found specification of procedure Side1_activestandby_task_each_pals_period [2018-10-27 00:17:43,847 INFO L138 BoogieDeclarations]: Found implementation of procedure Side1_activestandby_task_each_pals_period [2018-10-27 00:17:43,847 INFO L130 BoogieDeclarations]: Found specification of procedure write_active_side_history [2018-10-27 00:17:43,847 INFO L138 BoogieDeclarations]: Found implementation of procedure write_active_side_history [2018-10-27 00:17:43,847 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-10-27 00:17:43,847 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-10-27 00:17:43,847 INFO L130 BoogieDeclarations]: Found specification of procedure Console_task_each_pals_period [2018-10-27 00:17:43,847 INFO L138 BoogieDeclarations]: Found implementation of procedure Console_task_each_pals_period [2018-10-27 00:17:43,847 INFO L130 BoogieDeclarations]: Found specification of procedure read_side2_failed_history [2018-10-27 00:17:43,848 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side2_failed_history [2018-10-27 00:17:43,848 INFO L130 BoogieDeclarations]: Found specification of procedure assert [2018-10-27 00:17:43,848 INFO L138 BoogieDeclarations]: Found implementation of procedure assert [2018-10-27 00:17:43,848 INFO L130 BoogieDeclarations]: Found specification of procedure Pendulum_prism_task_each_pals_period [2018-10-27 00:17:43,848 INFO L138 BoogieDeclarations]: Found implementation of procedure Pendulum_prism_task_each_pals_period [2018-10-27 00:17:43,848 INFO L130 BoogieDeclarations]: Found specification of procedure write_manual_selection_history [2018-10-27 00:17:43,848 INFO L138 BoogieDeclarations]: Found implementation of procedure write_manual_selection_history [2018-10-27 00:17:43,848 INFO L130 BoogieDeclarations]: Found specification of procedure init [2018-10-27 00:17:43,848 INFO L138 BoogieDeclarations]: Found implementation of procedure init [2018-10-27 00:17:43,848 INFO L130 BoogieDeclarations]: Found specification of procedure flip_the_side [2018-10-27 00:17:43,849 INFO L138 BoogieDeclarations]: Found implementation of procedure flip_the_side [2018-10-27 00:17:43,849 INFO L130 BoogieDeclarations]: Found specification of procedure Side2_activestandby_task_each_pals_period [2018-10-27 00:17:43,849 INFO L138 BoogieDeclarations]: Found implementation of procedure Side2_activestandby_task_each_pals_period [2018-10-27 00:17:43,849 INFO L130 BoogieDeclarations]: Found specification of procedure check [2018-10-27 00:17:43,849 INFO L138 BoogieDeclarations]: Found implementation of procedure check [2018-10-27 00:17:43,849 INFO L130 BoogieDeclarations]: Found specification of procedure write_side1_failed_history [2018-10-27 00:17:43,849 INFO L138 BoogieDeclarations]: Found implementation of procedure write_side1_failed_history [2018-10-27 00:17:43,851 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-10-27 00:17:43,851 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-10-27 00:17:43,851 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-10-27 00:17:43,851 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-10-27 00:17:43,851 INFO L130 BoogieDeclarations]: Found specification of procedure read_side1_failed_history [2018-10-27 00:17:43,851 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side1_failed_history [2018-10-27 00:17:43,852 INFO L130 BoogieDeclarations]: Found specification of procedure read_active_side_history [2018-10-27 00:17:43,852 INFO L138 BoogieDeclarations]: Found implementation of procedure read_active_side_history [2018-10-27 00:17:43,852 INFO L130 BoogieDeclarations]: Found specification of procedure write_side2_failed_history [2018-10-27 00:17:43,852 INFO L138 BoogieDeclarations]: Found implementation of procedure write_side2_failed_history [2018-10-27 00:17:45,029 INFO L341 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-10-27 00:17:45,030 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.10 12:17:45 BoogieIcfgContainer [2018-10-27 00:17:45,030 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-10-27 00:17:45,031 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-10-27 00:17:45,031 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-10-27 00:17:45,033 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-10-27 00:17:45,034 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.10 12:17:43" (1/3) ... [2018-10-27 00:17:45,034 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2caf9ddb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.10 12:17:45, skipping insertion in model container [2018-10-27 00:17:45,034 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 12:17:43" (2/3) ... [2018-10-27 00:17:45,035 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2caf9ddb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.10 12:17:45, skipping insertion in model container [2018-10-27 00:17:45,035 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.10 12:17:45" (3/3) ... [2018-10-27 00:17:45,036 INFO L112 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby_false-unreach-call.4_1.ufo.UNBOUNDED.pals.c [2018-10-27 00:17:45,042 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-10-27 00:17:45,049 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-10-27 00:17:45,062 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-10-27 00:17:45,090 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-10-27 00:17:45,090 INFO L383 AbstractCegarLoop]: Hoare is true [2018-10-27 00:17:45,090 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-10-27 00:17:45,091 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-10-27 00:17:45,091 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-10-27 00:17:45,091 INFO L387 AbstractCegarLoop]: Difference is false [2018-10-27 00:17:45,091 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-10-27 00:17:45,091 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-10-27 00:17:45,111 INFO L276 IsEmpty]: Start isEmpty. Operand 235 states. [2018-10-27 00:17:45,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-10-27 00:17:45,119 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:17:45,120 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:17:45,122 INFO L424 AbstractCegarLoop]: === Iteration 1 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:17:45,127 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:17:45,127 INFO L82 PathProgramCache]: Analyzing trace with hash 1961805370, now seen corresponding path program 1 times [2018-10-27 00:17:45,129 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 00:17:45,167 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:17:45,168 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:17:45,168 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:17:45,168 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 00:17:45,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:17:45,463 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 00:17:45,465 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:17:45,465 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 00:17:45,465 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 00:17:45,470 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 00:17:45,482 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 00:17:45,482 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 00:17:45,484 INFO L87 Difference]: Start difference. First operand 235 states. Second operand 4 states. [2018-10-27 00:17:45,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:17:45,612 INFO L93 Difference]: Finished difference Result 446 states and 686 transitions. [2018-10-27 00:17:45,613 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 00:17:45,614 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2018-10-27 00:17:45,614 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:17:45,624 INFO L225 Difference]: With dead ends: 446 [2018-10-27 00:17:45,625 INFO L226 Difference]: Without dead ends: 230 [2018-10-27 00:17:45,630 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 00:17:45,645 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 230 states. [2018-10-27 00:17:45,678 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 230 to 230. [2018-10-27 00:17:45,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 230 states. [2018-10-27 00:17:45,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 230 states to 230 states and 320 transitions. [2018-10-27 00:17:45,683 INFO L78 Accepts]: Start accepts. Automaton has 230 states and 320 transitions. Word has length 66 [2018-10-27 00:17:45,683 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:17:45,683 INFO L481 AbstractCegarLoop]: Abstraction has 230 states and 320 transitions. [2018-10-27 00:17:45,683 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 00:17:45,684 INFO L276 IsEmpty]: Start isEmpty. Operand 230 states and 320 transitions. [2018-10-27 00:17:45,686 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-10-27 00:17:45,686 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:17:45,686 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:17:45,686 INFO L424 AbstractCegarLoop]: === Iteration 2 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:17:45,686 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:17:45,687 INFO L82 PathProgramCache]: Analyzing trace with hash -1751540886, now seen corresponding path program 1 times [2018-10-27 00:17:45,687 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 00:17:45,688 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:17:45,688 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:17:45,689 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:17:45,689 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 00:17:45,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:17:45,849 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 00:17:45,850 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:17:45,850 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 00:17:45,850 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 00:17:45,851 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 00:17:45,852 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 00:17:45,852 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 00:17:45,852 INFO L87 Difference]: Start difference. First operand 230 states and 320 transitions. Second operand 4 states. [2018-10-27 00:17:46,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:17:46,058 INFO L93 Difference]: Finished difference Result 442 states and 628 transitions. [2018-10-27 00:17:46,059 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 00:17:46,059 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 77 [2018-10-27 00:17:46,059 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:17:46,061 INFO L225 Difference]: With dead ends: 442 [2018-10-27 00:17:46,061 INFO L226 Difference]: Without dead ends: 234 [2018-10-27 00:17:46,064 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 00:17:46,064 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 234 states. [2018-10-27 00:17:46,086 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 234 to 234. [2018-10-27 00:17:46,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234 states. [2018-10-27 00:17:46,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234 states to 234 states and 323 transitions. [2018-10-27 00:17:46,090 INFO L78 Accepts]: Start accepts. Automaton has 234 states and 323 transitions. Word has length 77 [2018-10-27 00:17:46,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:17:46,090 INFO L481 AbstractCegarLoop]: Abstraction has 234 states and 323 transitions. [2018-10-27 00:17:46,090 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 00:17:46,091 INFO L276 IsEmpty]: Start isEmpty. Operand 234 states and 323 transitions. [2018-10-27 00:17:46,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-10-27 00:17:46,092 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:17:46,093 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:17:46,093 INFO L424 AbstractCegarLoop]: === Iteration 3 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:17:46,093 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:17:46,093 INFO L82 PathProgramCache]: Analyzing trace with hash -30717215, now seen corresponding path program 1 times [2018-10-27 00:17:46,096 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 00:17:46,097 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:17:46,097 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:17:46,098 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:17:46,098 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 00:17:46,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:17:46,376 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 00:17:46,376 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:17:46,376 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-27 00:17:46,376 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 00:17:46,377 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-27 00:17:46,377 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-27 00:17:46,377 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-10-27 00:17:46,378 INFO L87 Difference]: Start difference. First operand 234 states and 323 transitions. Second operand 7 states. [2018-10-27 00:17:48,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:17:48,214 INFO L93 Difference]: Finished difference Result 534 states and 739 transitions. [2018-10-27 00:17:48,215 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-27 00:17:48,215 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 95 [2018-10-27 00:17:48,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:17:48,219 INFO L225 Difference]: With dead ends: 534 [2018-10-27 00:17:48,219 INFO L226 Difference]: Without dead ends: 322 [2018-10-27 00:17:48,220 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=92, Unknown=0, NotChecked=0, Total=132 [2018-10-27 00:17:48,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 322 states. [2018-10-27 00:17:48,243 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 322 to 321. [2018-10-27 00:17:48,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 321 states. [2018-10-27 00:17:48,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 321 states to 321 states and 436 transitions. [2018-10-27 00:17:48,246 INFO L78 Accepts]: Start accepts. Automaton has 321 states and 436 transitions. Word has length 95 [2018-10-27 00:17:48,246 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:17:48,246 INFO L481 AbstractCegarLoop]: Abstraction has 321 states and 436 transitions. [2018-10-27 00:17:48,246 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-27 00:17:48,247 INFO L276 IsEmpty]: Start isEmpty. Operand 321 states and 436 transitions. [2018-10-27 00:17:48,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-10-27 00:17:48,248 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:17:48,248 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:17:48,248 INFO L424 AbstractCegarLoop]: === Iteration 4 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:17:48,248 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:17:48,249 INFO L82 PathProgramCache]: Analyzing trace with hash 1653357810, now seen corresponding path program 1 times [2018-10-27 00:17:48,249 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 00:17:48,251 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:17:48,251 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:17:48,252 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:17:48,252 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 00:17:48,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:17:48,410 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 00:17:48,410 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:17:48,410 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-27 00:17:48,411 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 00:17:48,411 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-27 00:17:48,411 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-27 00:17:48,411 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-10-27 00:17:48,411 INFO L87 Difference]: Start difference. First operand 321 states and 436 transitions. Second operand 7 states. [2018-10-27 00:17:49,450 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:17:49,451 INFO L93 Difference]: Finished difference Result 540 states and 747 transitions. [2018-10-27 00:17:49,451 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-27 00:17:49,451 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 96 [2018-10-27 00:17:49,451 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:17:49,453 INFO L225 Difference]: With dead ends: 540 [2018-10-27 00:17:49,453 INFO L226 Difference]: Without dead ends: 325 [2018-10-27 00:17:49,454 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=92, Unknown=0, NotChecked=0, Total=132 [2018-10-27 00:17:49,455 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 325 states. [2018-10-27 00:17:49,476 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 325 to 321. [2018-10-27 00:17:49,476 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 321 states. [2018-10-27 00:17:49,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 321 states to 321 states and 436 transitions. [2018-10-27 00:17:49,479 INFO L78 Accepts]: Start accepts. Automaton has 321 states and 436 transitions. Word has length 96 [2018-10-27 00:17:49,479 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:17:49,480 INFO L481 AbstractCegarLoop]: Abstraction has 321 states and 436 transitions. [2018-10-27 00:17:49,480 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-27 00:17:49,480 INFO L276 IsEmpty]: Start isEmpty. Operand 321 states and 436 transitions. [2018-10-27 00:17:49,481 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-10-27 00:17:49,481 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:17:49,481 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:17:49,483 INFO L424 AbstractCegarLoop]: === Iteration 5 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:17:49,483 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:17:49,483 INFO L82 PathProgramCache]: Analyzing trace with hash 772670606, now seen corresponding path program 1 times [2018-10-27 00:17:49,483 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 00:17:49,484 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:17:49,484 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:17:49,485 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:17:49,485 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 00:17:49,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:17:49,597 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 00:17:49,598 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:17:49,598 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 00:17:49,598 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 00:17:49,598 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-27 00:17:49,599 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-27 00:17:49,599 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 00:17:49,599 INFO L87 Difference]: Start difference. First operand 321 states and 436 transitions. Second operand 3 states. [2018-10-27 00:17:49,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:17:49,724 INFO L93 Difference]: Finished difference Result 768 states and 1067 transitions. [2018-10-27 00:17:49,727 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-27 00:17:49,727 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 97 [2018-10-27 00:17:49,728 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:17:49,730 INFO L225 Difference]: With dead ends: 768 [2018-10-27 00:17:49,730 INFO L226 Difference]: Without dead ends: 553 [2018-10-27 00:17:49,731 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 00:17:49,732 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2018-10-27 00:17:49,765 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 535. [2018-10-27 00:17:49,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 535 states. [2018-10-27 00:17:49,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 535 states to 535 states and 739 transitions. [2018-10-27 00:17:49,768 INFO L78 Accepts]: Start accepts. Automaton has 535 states and 739 transitions. Word has length 97 [2018-10-27 00:17:49,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:17:49,769 INFO L481 AbstractCegarLoop]: Abstraction has 535 states and 739 transitions. [2018-10-27 00:17:49,769 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-27 00:17:49,769 INFO L276 IsEmpty]: Start isEmpty. Operand 535 states and 739 transitions. [2018-10-27 00:17:49,772 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-10-27 00:17:49,772 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:17:49,772 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:17:49,772 INFO L424 AbstractCegarLoop]: === Iteration 6 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:17:49,772 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:17:49,772 INFO L82 PathProgramCache]: Analyzing trace with hash 877444234, now seen corresponding path program 1 times [2018-10-27 00:17:49,772 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 00:17:49,773 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:17:49,774 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:17:49,774 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:17:49,774 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 00:17:49,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:17:49,883 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 00:17:49,883 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:17:49,883 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 00:17:49,884 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 00:17:49,884 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-27 00:17:49,884 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-27 00:17:49,884 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 00:17:49,884 INFO L87 Difference]: Start difference. First operand 535 states and 739 transitions. Second operand 3 states. [2018-10-27 00:17:50,025 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:17:50,025 INFO L93 Difference]: Finished difference Result 1270 states and 1796 transitions. [2018-10-27 00:17:50,026 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-27 00:17:50,026 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 98 [2018-10-27 00:17:50,027 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:17:50,031 INFO L225 Difference]: With dead ends: 1270 [2018-10-27 00:17:50,031 INFO L226 Difference]: Without dead ends: 884 [2018-10-27 00:17:50,032 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 00:17:50,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 884 states. [2018-10-27 00:17:50,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 884 to 878. [2018-10-27 00:17:50,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 878 states. [2018-10-27 00:17:50,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 878 states to 878 states and 1231 transitions. [2018-10-27 00:17:50,090 INFO L78 Accepts]: Start accepts. Automaton has 878 states and 1231 transitions. Word has length 98 [2018-10-27 00:17:50,091 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:17:50,092 INFO L481 AbstractCegarLoop]: Abstraction has 878 states and 1231 transitions. [2018-10-27 00:17:50,092 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-27 00:17:50,092 INFO L276 IsEmpty]: Start isEmpty. Operand 878 states and 1231 transitions. [2018-10-27 00:17:50,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-10-27 00:17:50,093 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:17:50,093 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:17:50,094 INFO L424 AbstractCegarLoop]: === Iteration 7 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:17:50,094 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:17:50,094 INFO L82 PathProgramCache]: Analyzing trace with hash 1578508812, now seen corresponding path program 1 times [2018-10-27 00:17:50,094 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 00:17:50,097 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:17:50,098 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:17:50,098 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:17:50,098 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 00:17:50,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:17:50,233 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 00:17:50,234 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:17:50,234 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 00:17:50,234 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 00:17:50,234 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-27 00:17:50,234 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-27 00:17:50,234 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 00:17:50,236 INFO L87 Difference]: Start difference. First operand 878 states and 1231 transitions. Second operand 3 states. [2018-10-27 00:17:50,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:17:50,340 INFO L93 Difference]: Finished difference Result 1480 states and 2088 transitions. [2018-10-27 00:17:50,340 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-27 00:17:50,341 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 98 [2018-10-27 00:17:50,342 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:17:50,345 INFO L225 Difference]: With dead ends: 1480 [2018-10-27 00:17:50,346 INFO L226 Difference]: Without dead ends: 719 [2018-10-27 00:17:50,348 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 00:17:50,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 719 states. [2018-10-27 00:17:50,411 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 719 to 719. [2018-10-27 00:17:50,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 719 states. [2018-10-27 00:17:50,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 719 states to 719 states and 999 transitions. [2018-10-27 00:17:50,418 INFO L78 Accepts]: Start accepts. Automaton has 719 states and 999 transitions. Word has length 98 [2018-10-27 00:17:50,418 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:17:50,419 INFO L481 AbstractCegarLoop]: Abstraction has 719 states and 999 transitions. [2018-10-27 00:17:50,419 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-27 00:17:50,419 INFO L276 IsEmpty]: Start isEmpty. Operand 719 states and 999 transitions. [2018-10-27 00:17:50,421 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-10-27 00:17:50,421 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:17:50,421 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:17:50,422 INFO L424 AbstractCegarLoop]: === Iteration 8 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:17:50,422 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:17:50,422 INFO L82 PathProgramCache]: Analyzing trace with hash -1975756131, now seen corresponding path program 1 times [2018-10-27 00:17:50,422 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 00:17:50,424 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:17:50,425 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:17:50,425 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:17:50,425 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 00:17:50,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:17:50,706 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 00:17:50,706 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:17:50,706 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 00:17:50,706 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 00:17:50,706 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 00:17:50,706 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 00:17:50,707 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 00:17:50,707 INFO L87 Difference]: Start difference. First operand 719 states and 999 transitions. Second operand 4 states. [2018-10-27 00:17:51,055 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:17:51,055 INFO L93 Difference]: Finished difference Result 1301 states and 1834 transitions. [2018-10-27 00:17:51,056 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 00:17:51,056 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 98 [2018-10-27 00:17:51,056 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:17:51,059 INFO L225 Difference]: With dead ends: 1301 [2018-10-27 00:17:51,059 INFO L226 Difference]: Without dead ends: 734 [2018-10-27 00:17:51,061 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 00:17:51,063 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 734 states. [2018-10-27 00:17:51,093 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 734 to 734. [2018-10-27 00:17:51,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 734 states. [2018-10-27 00:17:51,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 734 states to 734 states and 1011 transitions. [2018-10-27 00:17:51,097 INFO L78 Accepts]: Start accepts. Automaton has 734 states and 1011 transitions. Word has length 98 [2018-10-27 00:17:51,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:17:51,098 INFO L481 AbstractCegarLoop]: Abstraction has 734 states and 1011 transitions. [2018-10-27 00:17:51,098 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 00:17:51,098 INFO L276 IsEmpty]: Start isEmpty. Operand 734 states and 1011 transitions. [2018-10-27 00:17:51,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2018-10-27 00:17:51,099 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:17:51,099 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:17:51,099 INFO L424 AbstractCegarLoop]: === Iteration 9 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:17:51,100 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:17:51,100 INFO L82 PathProgramCache]: Analyzing trace with hash -174609959, now seen corresponding path program 1 times [2018-10-27 00:17:51,100 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 00:17:51,101 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:17:51,101 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:17:51,101 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:17:51,101 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 00:17:51,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:17:51,218 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 00:17:51,218 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:17:51,218 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 00:17:51,218 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 00:17:51,218 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 00:17:51,219 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 00:17:51,219 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 00:17:51,219 INFO L87 Difference]: Start difference. First operand 734 states and 1011 transitions. Second operand 4 states. [2018-10-27 00:17:51,621 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:17:51,621 INFO L93 Difference]: Finished difference Result 1331 states and 1867 transitions. [2018-10-27 00:17:51,622 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 00:17:51,622 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 106 [2018-10-27 00:17:51,622 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:17:51,625 INFO L225 Difference]: With dead ends: 1331 [2018-10-27 00:17:51,625 INFO L226 Difference]: Without dead ends: 749 [2018-10-27 00:17:51,631 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 00:17:51,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 749 states. [2018-10-27 00:17:51,664 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 749 to 749. [2018-10-27 00:17:51,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 749 states. [2018-10-27 00:17:51,667 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 749 states to 749 states and 1023 transitions. [2018-10-27 00:17:51,668 INFO L78 Accepts]: Start accepts. Automaton has 749 states and 1023 transitions. Word has length 106 [2018-10-27 00:17:51,668 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:17:51,668 INFO L481 AbstractCegarLoop]: Abstraction has 749 states and 1023 transitions. [2018-10-27 00:17:51,670 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 00:17:51,670 INFO L276 IsEmpty]: Start isEmpty. Operand 749 states and 1023 transitions. [2018-10-27 00:17:51,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-10-27 00:17:51,671 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:17:51,672 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:17:51,672 INFO L424 AbstractCegarLoop]: === Iteration 10 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:17:51,672 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:17:51,672 INFO L82 PathProgramCache]: Analyzing trace with hash 1106277955, now seen corresponding path program 1 times [2018-10-27 00:17:51,672 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 00:17:51,673 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:17:51,673 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:17:51,673 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:17:51,673 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 00:17:51,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:17:51,886 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 00:17:51,886 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:17:51,887 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 00:17:51,887 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 00:17:51,888 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 00:17:51,888 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 00:17:51,888 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 00:17:51,888 INFO L87 Difference]: Start difference. First operand 749 states and 1023 transitions. Second operand 4 states. [2018-10-27 00:17:52,316 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:17:52,316 INFO L93 Difference]: Finished difference Result 1358 states and 1879 transitions. [2018-10-27 00:17:52,317 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 00:17:52,317 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 114 [2018-10-27 00:17:52,318 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:17:52,320 INFO L225 Difference]: With dead ends: 1358 [2018-10-27 00:17:52,321 INFO L226 Difference]: Without dead ends: 761 [2018-10-27 00:17:52,323 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 00:17:52,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 761 states. [2018-10-27 00:17:52,351 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 761 to 761. [2018-10-27 00:17:52,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 761 states. [2018-10-27 00:17:52,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 761 states to 761 states and 1032 transitions. [2018-10-27 00:17:52,355 INFO L78 Accepts]: Start accepts. Automaton has 761 states and 1032 transitions. Word has length 114 [2018-10-27 00:17:52,355 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:17:52,355 INFO L481 AbstractCegarLoop]: Abstraction has 761 states and 1032 transitions. [2018-10-27 00:17:52,355 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 00:17:52,355 INFO L276 IsEmpty]: Start isEmpty. Operand 761 states and 1032 transitions. [2018-10-27 00:17:52,356 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-10-27 00:17:52,357 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:17:52,357 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:17:52,357 INFO L424 AbstractCegarLoop]: === Iteration 11 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:17:52,357 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:17:52,357 INFO L82 PathProgramCache]: Analyzing trace with hash 1397586677, now seen corresponding path program 1 times [2018-10-27 00:17:52,357 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 00:17:52,361 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:17:52,361 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:17:52,361 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:17:52,361 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 00:17:52,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:17:52,640 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 00:17:52,640 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:17:52,640 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 00:17:52,640 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 00:17:52,640 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 00:17:52,641 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 00:17:52,641 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 00:17:52,641 INFO L87 Difference]: Start difference. First operand 761 states and 1032 transitions. Second operand 4 states. [2018-10-27 00:17:53,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:17:53,171 INFO L93 Difference]: Finished difference Result 1385 states and 1909 transitions. [2018-10-27 00:17:53,172 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 00:17:53,172 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 114 [2018-10-27 00:17:53,172 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:17:53,175 INFO L225 Difference]: With dead ends: 1385 [2018-10-27 00:17:53,175 INFO L226 Difference]: Without dead ends: 776 [2018-10-27 00:17:53,177 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 00:17:53,179 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 776 states. [2018-10-27 00:17:53,206 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 776 to 776. [2018-10-27 00:17:53,207 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 776 states. [2018-10-27 00:17:53,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 776 states to 776 states and 1044 transitions. [2018-10-27 00:17:53,210 INFO L78 Accepts]: Start accepts. Automaton has 776 states and 1044 transitions. Word has length 114 [2018-10-27 00:17:53,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:17:53,211 INFO L481 AbstractCegarLoop]: Abstraction has 776 states and 1044 transitions. [2018-10-27 00:17:53,211 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 00:17:53,211 INFO L276 IsEmpty]: Start isEmpty. Operand 776 states and 1044 transitions. [2018-10-27 00:17:53,212 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-10-27 00:17:53,212 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:17:53,213 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:17:53,213 INFO L424 AbstractCegarLoop]: === Iteration 12 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:17:53,213 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:17:53,213 INFO L82 PathProgramCache]: Analyzing trace with hash 1762116231, now seen corresponding path program 1 times [2018-10-27 00:17:53,213 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 00:17:53,216 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:17:53,217 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:17:53,217 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:17:53,217 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 00:17:53,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:17:53,528 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-10-27 00:17:53,528 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:17:53,528 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 00:17:53,528 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 00:17:53,529 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 00:17:53,529 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 00:17:53,529 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 00:17:53,529 INFO L87 Difference]: Start difference. First operand 776 states and 1044 transitions. Second operand 4 states. [2018-10-27 00:17:53,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:17:53,964 INFO L93 Difference]: Finished difference Result 1418 states and 1930 transitions. [2018-10-27 00:17:53,965 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 00:17:53,965 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 122 [2018-10-27 00:17:53,965 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:17:53,968 INFO L225 Difference]: With dead ends: 1418 [2018-10-27 00:17:53,968 INFO L226 Difference]: Without dead ends: 794 [2018-10-27 00:17:53,972 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 00:17:53,974 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 794 states. [2018-10-27 00:17:54,002 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 794 to 794. [2018-10-27 00:17:54,002 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 794 states. [2018-10-27 00:17:54,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 794 states to 794 states and 1059 transitions. [2018-10-27 00:17:54,006 INFO L78 Accepts]: Start accepts. Automaton has 794 states and 1059 transitions. Word has length 122 [2018-10-27 00:17:54,006 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:17:54,008 INFO L481 AbstractCegarLoop]: Abstraction has 794 states and 1059 transitions. [2018-10-27 00:17:54,008 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 00:17:54,008 INFO L276 IsEmpty]: Start isEmpty. Operand 794 states and 1059 transitions. [2018-10-27 00:17:54,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-10-27 00:17:54,011 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:17:54,011 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:17:54,012 INFO L424 AbstractCegarLoop]: === Iteration 13 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:17:54,012 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:17:54,012 INFO L82 PathProgramCache]: Analyzing trace with hash 1439904298, now seen corresponding path program 1 times [2018-10-27 00:17:54,013 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 00:17:54,013 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:17:54,013 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:17:54,014 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:17:54,014 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 00:17:54,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:17:54,913 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-27 00:17:54,913 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:17:54,913 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-10-27 00:17:54,913 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 00:17:54,914 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-10-27 00:17:54,914 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-10-27 00:17:54,914 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-10-27 00:17:54,914 INFO L87 Difference]: Start difference. First operand 794 states and 1059 transitions. Second operand 10 states. [2018-10-27 00:18:00,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:00,071 INFO L93 Difference]: Finished difference Result 2074 states and 2747 transitions. [2018-10-27 00:18:00,072 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-10-27 00:18:00,072 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 127 [2018-10-27 00:18:00,072 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:00,077 INFO L225 Difference]: With dead ends: 2074 [2018-10-27 00:18:00,077 INFO L226 Difference]: Without dead ends: 1423 [2018-10-27 00:18:00,079 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 84 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=92, Invalid=460, Unknown=0, NotChecked=0, Total=552 [2018-10-27 00:18:00,080 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1423 states. [2018-10-27 00:18:00,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1423 to 1326. [2018-10-27 00:18:00,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1326 states. [2018-10-27 00:18:00,138 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1326 states to 1326 states and 1737 transitions. [2018-10-27 00:18:00,138 INFO L78 Accepts]: Start accepts. Automaton has 1326 states and 1737 transitions. Word has length 127 [2018-10-27 00:18:00,139 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:00,139 INFO L481 AbstractCegarLoop]: Abstraction has 1326 states and 1737 transitions. [2018-10-27 00:18:00,139 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-10-27 00:18:00,139 INFO L276 IsEmpty]: Start isEmpty. Operand 1326 states and 1737 transitions. [2018-10-27 00:18:00,142 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-10-27 00:18:00,142 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:00,142 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:00,142 INFO L424 AbstractCegarLoop]: === Iteration 14 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:00,143 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:00,143 INFO L82 PathProgramCache]: Analyzing trace with hash 664334046, now seen corresponding path program 1 times [2018-10-27 00:18:00,143 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 00:18:00,144 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:18:00,144 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:00,144 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:18:00,144 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 00:18:00,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:00,355 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-27 00:18:00,356 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:00,356 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 00:18:00,356 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 00:18:00,357 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 00:18:00,358 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 00:18:00,358 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 00:18:00,358 INFO L87 Difference]: Start difference. First operand 1326 states and 1737 transitions. Second operand 4 states. [2018-10-27 00:18:00,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:00,691 INFO L93 Difference]: Finished difference Result 2409 states and 3178 transitions. [2018-10-27 00:18:00,693 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 00:18:00,693 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 129 [2018-10-27 00:18:00,694 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:00,697 INFO L225 Difference]: With dead ends: 2409 [2018-10-27 00:18:00,697 INFO L226 Difference]: Without dead ends: 1338 [2018-10-27 00:18:00,704 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 00:18:00,706 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1338 states. [2018-10-27 00:18:00,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1338 to 1332. [2018-10-27 00:18:00,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1332 states. [2018-10-27 00:18:00,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1332 states to 1332 states and 1724 transitions. [2018-10-27 00:18:00,766 INFO L78 Accepts]: Start accepts. Automaton has 1332 states and 1724 transitions. Word has length 129 [2018-10-27 00:18:00,767 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:00,767 INFO L481 AbstractCegarLoop]: Abstraction has 1332 states and 1724 transitions. [2018-10-27 00:18:00,767 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 00:18:00,767 INFO L276 IsEmpty]: Start isEmpty. Operand 1332 states and 1724 transitions. [2018-10-27 00:18:00,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2018-10-27 00:18:00,769 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:00,769 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:00,769 INFO L424 AbstractCegarLoop]: === Iteration 15 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:00,769 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:00,769 INFO L82 PathProgramCache]: Analyzing trace with hash 998712687, now seen corresponding path program 1 times [2018-10-27 00:18:00,772 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 00:18:00,773 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:18:00,774 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:00,774 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:18:00,774 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 00:18:00,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:01,390 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-10-27 00:18:01,391 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:01,391 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-27 00:18:01,391 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 00:18:01,391 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-27 00:18:01,391 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-27 00:18:01,391 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-10-27 00:18:01,391 INFO L87 Difference]: Start difference. First operand 1332 states and 1724 transitions. Second operand 7 states. [2018-10-27 00:18:01,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:01,745 INFO L93 Difference]: Finished difference Result 1415 states and 1850 transitions. [2018-10-27 00:18:01,745 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-27 00:18:01,746 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 130 [2018-10-27 00:18:01,746 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:01,751 INFO L225 Difference]: With dead ends: 1415 [2018-10-27 00:18:01,751 INFO L226 Difference]: Without dead ends: 1413 [2018-10-27 00:18:01,754 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-10-27 00:18:01,755 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1413 states. [2018-10-27 00:18:01,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1413 to 1356. [2018-10-27 00:18:01,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1356 states. [2018-10-27 00:18:01,815 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1356 states to 1356 states and 1754 transitions. [2018-10-27 00:18:01,815 INFO L78 Accepts]: Start accepts. Automaton has 1356 states and 1754 transitions. Word has length 130 [2018-10-27 00:18:01,815 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:01,815 INFO L481 AbstractCegarLoop]: Abstraction has 1356 states and 1754 transitions. [2018-10-27 00:18:01,816 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-27 00:18:01,816 INFO L276 IsEmpty]: Start isEmpty. Operand 1356 states and 1754 transitions. [2018-10-27 00:18:01,819 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-10-27 00:18:01,819 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:01,819 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:01,819 INFO L424 AbstractCegarLoop]: === Iteration 16 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:01,819 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:01,820 INFO L82 PathProgramCache]: Analyzing trace with hash 1207634846, now seen corresponding path program 1 times [2018-10-27 00:18:01,820 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 00:18:01,822 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:18:01,823 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:01,823 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:18:01,823 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 00:18:01,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:01,971 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-10-27 00:18:01,971 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:01,971 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-27 00:18:01,971 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 00:18:01,971 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-27 00:18:01,972 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-27 00:18:01,972 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-10-27 00:18:01,972 INFO L87 Difference]: Start difference. First operand 1356 states and 1754 transitions. Second operand 9 states. [2018-10-27 00:18:03,198 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:03,198 INFO L93 Difference]: Finished difference Result 2804 states and 3594 transitions. [2018-10-27 00:18:03,198 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-10-27 00:18:03,198 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 131 [2018-10-27 00:18:03,199 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:03,204 INFO L225 Difference]: With dead ends: 2804 [2018-10-27 00:18:03,205 INFO L226 Difference]: Without dead ends: 1754 [2018-10-27 00:18:03,207 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=67, Invalid=275, Unknown=0, NotChecked=0, Total=342 [2018-10-27 00:18:03,208 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1754 states. [2018-10-27 00:18:03,268 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1754 to 1476. [2018-10-27 00:18:03,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1476 states. [2018-10-27 00:18:03,272 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1476 states to 1476 states and 1881 transitions. [2018-10-27 00:18:03,272 INFO L78 Accepts]: Start accepts. Automaton has 1476 states and 1881 transitions. Word has length 131 [2018-10-27 00:18:03,273 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:03,273 INFO L481 AbstractCegarLoop]: Abstraction has 1476 states and 1881 transitions. [2018-10-27 00:18:03,273 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-27 00:18:03,273 INFO L276 IsEmpty]: Start isEmpty. Operand 1476 states and 1881 transitions. [2018-10-27 00:18:03,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2018-10-27 00:18:03,276 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:03,277 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:03,277 INFO L424 AbstractCegarLoop]: === Iteration 17 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:03,277 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:03,277 INFO L82 PathProgramCache]: Analyzing trace with hash 1699958062, now seen corresponding path program 1 times [2018-10-27 00:18:03,277 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 00:18:03,278 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:18:03,278 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:03,278 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:18:03,278 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 00:18:03,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:03,718 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-10-27 00:18:03,719 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:03,719 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-10-27 00:18:03,719 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 00:18:03,719 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-10-27 00:18:03,719 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-10-27 00:18:03,719 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-10-27 00:18:03,720 INFO L87 Difference]: Start difference. First operand 1476 states and 1881 transitions. Second operand 10 states. [2018-10-27 00:18:05,670 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:05,670 INFO L93 Difference]: Finished difference Result 3876 states and 4918 transitions. [2018-10-27 00:18:05,671 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-10-27 00:18:05,671 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 135 [2018-10-27 00:18:05,671 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:05,679 INFO L225 Difference]: With dead ends: 3876 [2018-10-27 00:18:05,679 INFO L226 Difference]: Without dead ends: 2748 [2018-10-27 00:18:05,682 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=92, Invalid=460, Unknown=0, NotChecked=0, Total=552 [2018-10-27 00:18:05,684 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2748 states. [2018-10-27 00:18:05,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2748 to 1901. [2018-10-27 00:18:05,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1901 states. [2018-10-27 00:18:05,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1901 states to 1901 states and 2411 transitions. [2018-10-27 00:18:05,809 INFO L78 Accepts]: Start accepts. Automaton has 1901 states and 2411 transitions. Word has length 135 [2018-10-27 00:18:05,809 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:05,809 INFO L481 AbstractCegarLoop]: Abstraction has 1901 states and 2411 transitions. [2018-10-27 00:18:05,809 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-10-27 00:18:05,809 INFO L276 IsEmpty]: Start isEmpty. Operand 1901 states and 2411 transitions. [2018-10-27 00:18:05,812 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2018-10-27 00:18:05,812 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:05,812 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:05,812 INFO L424 AbstractCegarLoop]: === Iteration 18 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:05,813 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:05,813 INFO L82 PathProgramCache]: Analyzing trace with hash 235290501, now seen corresponding path program 1 times [2018-10-27 00:18:05,813 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 00:18:05,814 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:18:05,814 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:05,814 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:18:05,814 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 00:18:05,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:06,091 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-10-27 00:18:06,091 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:06,091 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-27 00:18:06,091 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 00:18:06,091 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 00:18:06,092 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 00:18:06,092 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 00:18:06,092 INFO L87 Difference]: Start difference. First operand 1901 states and 2411 transitions. Second operand 5 states. [2018-10-27 00:18:07,561 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:07,561 INFO L93 Difference]: Finished difference Result 6575 states and 8451 transitions. [2018-10-27 00:18:07,562 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 00:18:07,562 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 136 [2018-10-27 00:18:07,563 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:07,576 INFO L225 Difference]: With dead ends: 6575 [2018-10-27 00:18:07,576 INFO L226 Difference]: Without dead ends: 4967 [2018-10-27 00:18:07,582 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-10-27 00:18:07,587 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4967 states. [2018-10-27 00:18:07,795 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4967 to 4509. [2018-10-27 00:18:07,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4509 states. [2018-10-27 00:18:07,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4509 states to 4509 states and 5739 transitions. [2018-10-27 00:18:07,805 INFO L78 Accepts]: Start accepts. Automaton has 4509 states and 5739 transitions. Word has length 136 [2018-10-27 00:18:07,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:07,805 INFO L481 AbstractCegarLoop]: Abstraction has 4509 states and 5739 transitions. [2018-10-27 00:18:07,805 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 00:18:07,807 INFO L276 IsEmpty]: Start isEmpty. Operand 4509 states and 5739 transitions. [2018-10-27 00:18:07,809 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2018-10-27 00:18:07,809 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:07,809 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:07,809 INFO L424 AbstractCegarLoop]: === Iteration 19 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:07,810 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:07,810 INFO L82 PathProgramCache]: Analyzing trace with hash -1933825285, now seen corresponding path program 1 times [2018-10-27 00:18:07,810 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 00:18:07,811 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:18:07,811 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:07,811 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:18:07,811 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 00:18:07,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:07,935 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-10-27 00:18:07,935 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:07,935 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 00:18:07,935 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 00:18:07,935 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 00:18:07,935 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 00:18:07,936 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 00:18:07,936 INFO L87 Difference]: Start difference. First operand 4509 states and 5739 transitions. Second operand 4 states. [2018-10-27 00:18:08,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:08,201 INFO L93 Difference]: Finished difference Result 8469 states and 10814 transitions. [2018-10-27 00:18:08,201 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 00:18:08,202 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 140 [2018-10-27 00:18:08,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:08,213 INFO L225 Difference]: With dead ends: 8469 [2018-10-27 00:18:08,213 INFO L226 Difference]: Without dead ends: 4550 [2018-10-27 00:18:08,221 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 00:18:08,225 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4550 states. [2018-10-27 00:18:08,467 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4550 to 4127. [2018-10-27 00:18:08,467 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4127 states. [2018-10-27 00:18:08,475 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4127 states to 4127 states and 5254 transitions. [2018-10-27 00:18:08,476 INFO L78 Accepts]: Start accepts. Automaton has 4127 states and 5254 transitions. Word has length 140 [2018-10-27 00:18:08,477 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:08,478 INFO L481 AbstractCegarLoop]: Abstraction has 4127 states and 5254 transitions. [2018-10-27 00:18:08,478 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 00:18:08,478 INFO L276 IsEmpty]: Start isEmpty. Operand 4127 states and 5254 transitions. [2018-10-27 00:18:08,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2018-10-27 00:18:08,480 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:08,480 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:08,480 INFO L424 AbstractCegarLoop]: === Iteration 20 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:08,480 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:08,481 INFO L82 PathProgramCache]: Analyzing trace with hash -1088543513, now seen corresponding path program 1 times [2018-10-27 00:18:08,481 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 00:18:08,486 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:18:08,487 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:08,487 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:18:08,487 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 00:18:08,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:08,658 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-10-27 00:18:08,658 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:08,658 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-27 00:18:08,658 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 00:18:08,659 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-27 00:18:08,659 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-27 00:18:08,659 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-10-27 00:18:08,659 INFO L87 Difference]: Start difference. First operand 4127 states and 5254 transitions. Second operand 9 states. [2018-10-27 00:18:09,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:09,665 INFO L93 Difference]: Finished difference Result 8163 states and 10647 transitions. [2018-10-27 00:18:09,665 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-10-27 00:18:09,665 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 137 [2018-10-27 00:18:09,666 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:09,681 INFO L225 Difference]: With dead ends: 8163 [2018-10-27 00:18:09,681 INFO L226 Difference]: Without dead ends: 4386 [2018-10-27 00:18:09,689 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=53, Invalid=187, Unknown=0, NotChecked=0, Total=240 [2018-10-27 00:18:09,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4386 states. [2018-10-27 00:18:09,958 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4386 to 3689. [2018-10-27 00:18:09,958 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3689 states. [2018-10-27 00:18:09,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3689 states to 3689 states and 4740 transitions. [2018-10-27 00:18:09,966 INFO L78 Accepts]: Start accepts. Automaton has 3689 states and 4740 transitions. Word has length 137 [2018-10-27 00:18:09,967 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:09,967 INFO L481 AbstractCegarLoop]: Abstraction has 3689 states and 4740 transitions. [2018-10-27 00:18:09,967 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-27 00:18:09,967 INFO L276 IsEmpty]: Start isEmpty. Operand 3689 states and 4740 transitions. [2018-10-27 00:18:09,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2018-10-27 00:18:09,969 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:09,969 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:09,969 INFO L424 AbstractCegarLoop]: === Iteration 21 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:09,969 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:09,969 INFO L82 PathProgramCache]: Analyzing trace with hash -2108156229, now seen corresponding path program 1 times [2018-10-27 00:18:09,972 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 00:18:09,973 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:18:09,973 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:09,973 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:18:09,973 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 00:18:10,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:10,251 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-10-27 00:18:10,251 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:10,252 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-27 00:18:10,252 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 00:18:10,252 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-27 00:18:10,252 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-27 00:18:10,252 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-10-27 00:18:10,253 INFO L87 Difference]: Start difference. First operand 3689 states and 4740 transitions. Second operand 9 states. [2018-10-27 00:18:11,384 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:11,385 INFO L93 Difference]: Finished difference Result 7489 states and 9776 transitions. [2018-10-27 00:18:11,386 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-10-27 00:18:11,386 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 138 [2018-10-27 00:18:11,386 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:11,398 INFO L225 Difference]: With dead ends: 7489 [2018-10-27 00:18:11,399 INFO L226 Difference]: Without dead ends: 4166 [2018-10-27 00:18:11,406 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=59, Invalid=213, Unknown=0, NotChecked=0, Total=272 [2018-10-27 00:18:11,409 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4166 states. [2018-10-27 00:18:11,567 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4166 to 3386. [2018-10-27 00:18:11,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3386 states. [2018-10-27 00:18:11,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3386 states to 3386 states and 4293 transitions. [2018-10-27 00:18:11,573 INFO L78 Accepts]: Start accepts. Automaton has 3386 states and 4293 transitions. Word has length 138 [2018-10-27 00:18:11,573 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:11,573 INFO L481 AbstractCegarLoop]: Abstraction has 3386 states and 4293 transitions. [2018-10-27 00:18:11,573 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-27 00:18:11,574 INFO L276 IsEmpty]: Start isEmpty. Operand 3386 states and 4293 transitions. [2018-10-27 00:18:11,575 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-10-27 00:18:11,575 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:11,576 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:11,576 INFO L424 AbstractCegarLoop]: === Iteration 22 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:11,576 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:11,576 INFO L82 PathProgramCache]: Analyzing trace with hash -844755992, now seen corresponding path program 1 times [2018-10-27 00:18:11,576 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 00:18:11,577 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:18:11,577 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:11,577 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:18:11,577 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 00:18:11,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:11,725 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-10-27 00:18:11,725 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:11,725 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-27 00:18:11,725 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 00:18:11,726 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 00:18:11,726 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 00:18:11,726 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 00:18:11,726 INFO L87 Difference]: Start difference. First operand 3386 states and 4293 transitions. Second operand 5 states. [2018-10-27 00:18:12,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:12,408 INFO L93 Difference]: Finished difference Result 10430 states and 13357 transitions. [2018-10-27 00:18:12,410 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 00:18:12,410 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 139 [2018-10-27 00:18:12,410 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:12,433 INFO L225 Difference]: With dead ends: 10430 [2018-10-27 00:18:12,434 INFO L226 Difference]: Without dead ends: 7554 [2018-10-27 00:18:12,441 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-10-27 00:18:12,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7554 states. [2018-10-27 00:18:12,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7554 to 5193. [2018-10-27 00:18:12,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5193 states. [2018-10-27 00:18:12,715 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5193 states to 5193 states and 6575 transitions. [2018-10-27 00:18:12,716 INFO L78 Accepts]: Start accepts. Automaton has 5193 states and 6575 transitions. Word has length 139 [2018-10-27 00:18:12,717 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:12,717 INFO L481 AbstractCegarLoop]: Abstraction has 5193 states and 6575 transitions. [2018-10-27 00:18:12,717 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 00:18:12,717 INFO L276 IsEmpty]: Start isEmpty. Operand 5193 states and 6575 transitions. [2018-10-27 00:18:12,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-10-27 00:18:12,721 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:12,721 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:12,721 INFO L424 AbstractCegarLoop]: === Iteration 23 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:12,721 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:12,721 INFO L82 PathProgramCache]: Analyzing trace with hash 490372173, now seen corresponding path program 1 times [2018-10-27 00:18:12,721 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 00:18:12,722 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:18:12,722 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:12,722 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:18:12,723 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 00:18:12,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:12,978 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-10-27 00:18:12,978 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:12,978 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-27 00:18:12,979 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 00:18:12,979 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 00:18:12,979 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 00:18:12,979 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 00:18:12,979 INFO L87 Difference]: Start difference. First operand 5193 states and 6575 transitions. Second operand 5 states. [2018-10-27 00:18:13,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:13,605 INFO L93 Difference]: Finished difference Result 12053 states and 15330 transitions. [2018-10-27 00:18:13,606 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 00:18:13,606 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 139 [2018-10-27 00:18:13,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:13,626 INFO L225 Difference]: With dead ends: 12053 [2018-10-27 00:18:13,626 INFO L226 Difference]: Without dead ends: 7505 [2018-10-27 00:18:13,636 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-10-27 00:18:13,641 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7505 states. [2018-10-27 00:18:13,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7505 to 6957. [2018-10-27 00:18:13,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6957 states. [2018-10-27 00:18:13,937 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6957 states to 6957 states and 8761 transitions. [2018-10-27 00:18:13,939 INFO L78 Accepts]: Start accepts. Automaton has 6957 states and 8761 transitions. Word has length 139 [2018-10-27 00:18:13,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:13,939 INFO L481 AbstractCegarLoop]: Abstraction has 6957 states and 8761 transitions. [2018-10-27 00:18:13,939 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 00:18:13,940 INFO L276 IsEmpty]: Start isEmpty. Operand 6957 states and 8761 transitions. [2018-10-27 00:18:13,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2018-10-27 00:18:13,942 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:13,942 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:13,942 INFO L424 AbstractCegarLoop]: === Iteration 24 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:13,942 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:13,942 INFO L82 PathProgramCache]: Analyzing trace with hash 867489106, now seen corresponding path program 1 times [2018-10-27 00:18:13,943 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 00:18:13,943 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:18:13,943 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:13,943 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:18:13,944 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 00:18:13,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:14,048 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-10-27 00:18:14,048 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:14,049 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 00:18:14,049 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 00:18:14,049 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-27 00:18:14,051 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-27 00:18:14,051 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 00:18:14,051 INFO L87 Difference]: Start difference. First operand 6957 states and 8761 transitions. Second operand 3 states. [2018-10-27 00:18:14,796 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:14,796 INFO L93 Difference]: Finished difference Result 13402 states and 16956 transitions. [2018-10-27 00:18:14,797 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-27 00:18:14,797 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 140 [2018-10-27 00:18:14,797 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:14,813 INFO L225 Difference]: With dead ends: 13402 [2018-10-27 00:18:14,813 INFO L226 Difference]: Without dead ends: 7026 [2018-10-27 00:18:14,823 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 00:18:14,828 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7026 states. [2018-10-27 00:18:15,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7026 to 6963. [2018-10-27 00:18:15,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6963 states. [2018-10-27 00:18:15,159 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6963 states to 6963 states and 8767 transitions. [2018-10-27 00:18:15,160 INFO L78 Accepts]: Start accepts. Automaton has 6963 states and 8767 transitions. Word has length 140 [2018-10-27 00:18:15,160 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:15,161 INFO L481 AbstractCegarLoop]: Abstraction has 6963 states and 8767 transitions. [2018-10-27 00:18:15,161 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-27 00:18:15,161 INFO L276 IsEmpty]: Start isEmpty. Operand 6963 states and 8767 transitions. [2018-10-27 00:18:15,163 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2018-10-27 00:18:15,163 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:15,163 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:15,163 INFO L424 AbstractCegarLoop]: === Iteration 25 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:15,163 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:15,163 INFO L82 PathProgramCache]: Analyzing trace with hash -886395703, now seen corresponding path program 1 times [2018-10-27 00:18:15,163 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 00:18:15,164 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:18:15,164 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:15,164 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:18:15,165 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 00:18:15,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:15,413 WARN L179 SmtUtils]: Spent 126.00 ms on a formula simplification. DAG size of input: 10 DAG size of output: 7 [2018-10-27 00:18:15,515 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-10-27 00:18:15,515 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:15,515 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-10-27 00:18:15,515 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 00:18:15,516 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-10-27 00:18:15,516 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-10-27 00:18:15,516 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2018-10-27 00:18:15,516 INFO L87 Difference]: Start difference. First operand 6963 states and 8767 transitions. Second operand 11 states. [2018-10-27 00:18:17,254 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:17,254 INFO L93 Difference]: Finished difference Result 13335 states and 16856 transitions. [2018-10-27 00:18:17,255 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-10-27 00:18:17,255 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 141 [2018-10-27 00:18:17,255 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:17,273 INFO L225 Difference]: With dead ends: 13335 [2018-10-27 00:18:17,273 INFO L226 Difference]: Without dead ends: 6527 [2018-10-27 00:18:17,284 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 84 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=140, Invalid=460, Unknown=0, NotChecked=0, Total=600 [2018-10-27 00:18:17,289 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6527 states. [2018-10-27 00:18:17,666 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6527 to 6475. [2018-10-27 00:18:17,666 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6475 states. [2018-10-27 00:18:17,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6475 states to 6475 states and 8180 transitions. [2018-10-27 00:18:17,680 INFO L78 Accepts]: Start accepts. Automaton has 6475 states and 8180 transitions. Word has length 141 [2018-10-27 00:18:17,680 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:17,680 INFO L481 AbstractCegarLoop]: Abstraction has 6475 states and 8180 transitions. [2018-10-27 00:18:17,681 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-10-27 00:18:17,681 INFO L276 IsEmpty]: Start isEmpty. Operand 6475 states and 8180 transitions. [2018-10-27 00:18:17,684 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2018-10-27 00:18:17,684 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:17,684 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:17,684 INFO L424 AbstractCegarLoop]: === Iteration 26 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:17,684 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:17,685 INFO L82 PathProgramCache]: Analyzing trace with hash -840770671, now seen corresponding path program 1 times [2018-10-27 00:18:17,685 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 00:18:17,686 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:18:17,686 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:17,686 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:18:17,686 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 00:18:17,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:17,922 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-10-27 00:18:17,922 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:17,922 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-10-27 00:18:17,922 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 00:18:17,922 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-10-27 00:18:17,923 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-10-27 00:18:17,923 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2018-10-27 00:18:17,923 INFO L87 Difference]: Start difference. First operand 6475 states and 8180 transitions. Second operand 10 states. [2018-10-27 00:18:19,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:19,387 INFO L93 Difference]: Finished difference Result 12801 states and 16218 transitions. [2018-10-27 00:18:19,387 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-10-27 00:18:19,387 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 142 [2018-10-27 00:18:19,388 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:19,402 INFO L225 Difference]: With dead ends: 12801 [2018-10-27 00:18:19,402 INFO L226 Difference]: Without dead ends: 6593 [2018-10-27 00:18:19,411 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=113, Invalid=349, Unknown=0, NotChecked=0, Total=462 [2018-10-27 00:18:19,416 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6593 states. [2018-10-27 00:18:19,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6593 to 6269. [2018-10-27 00:18:19,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6269 states. [2018-10-27 00:18:19,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6269 states to 6269 states and 7906 transitions. [2018-10-27 00:18:19,772 INFO L78 Accepts]: Start accepts. Automaton has 6269 states and 7906 transitions. Word has length 142 [2018-10-27 00:18:19,773 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:19,773 INFO L481 AbstractCegarLoop]: Abstraction has 6269 states and 7906 transitions. [2018-10-27 00:18:19,773 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-10-27 00:18:19,773 INFO L276 IsEmpty]: Start isEmpty. Operand 6269 states and 7906 transitions. [2018-10-27 00:18:19,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2018-10-27 00:18:19,774 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:19,774 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:19,774 INFO L424 AbstractCegarLoop]: === Iteration 27 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:19,775 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:19,775 INFO L82 PathProgramCache]: Analyzing trace with hash -1304462279, now seen corresponding path program 1 times [2018-10-27 00:18:19,775 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 00:18:19,776 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:18:19,776 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:19,776 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:18:19,776 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 00:18:19,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:19,949 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-10-27 00:18:19,949 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:19,950 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 00:18:19,950 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 00:18:19,950 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 00:18:19,950 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 00:18:19,951 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 00:18:19,951 INFO L87 Difference]: Start difference. First operand 6269 states and 7906 transitions. Second operand 4 states. [2018-10-27 00:18:20,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:20,391 INFO L93 Difference]: Finished difference Result 12233 states and 15489 transitions. [2018-10-27 00:18:20,392 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 00:18:20,392 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 143 [2018-10-27 00:18:20,392 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:20,406 INFO L225 Difference]: With dead ends: 12233 [2018-10-27 00:18:20,406 INFO L226 Difference]: Without dead ends: 6231 [2018-10-27 00:18:20,416 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 00:18:20,420 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6231 states. [2018-10-27 00:18:20,945 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6231 to 6137. [2018-10-27 00:18:20,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6137 states. [2018-10-27 00:18:20,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6137 states to 6137 states and 7750 transitions. [2018-10-27 00:18:20,957 INFO L78 Accepts]: Start accepts. Automaton has 6137 states and 7750 transitions. Word has length 143 [2018-10-27 00:18:20,957 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:20,958 INFO L481 AbstractCegarLoop]: Abstraction has 6137 states and 7750 transitions. [2018-10-27 00:18:20,958 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 00:18:20,958 INFO L276 IsEmpty]: Start isEmpty. Operand 6137 states and 7750 transitions. [2018-10-27 00:18:20,963 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 235 [2018-10-27 00:18:20,963 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:20,963 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:20,963 INFO L424 AbstractCegarLoop]: === Iteration 28 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:20,963 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:20,964 INFO L82 PathProgramCache]: Analyzing trace with hash -1482425029, now seen corresponding path program 1 times [2018-10-27 00:18:20,964 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 00:18:20,964 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:18:20,964 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:20,965 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 00:18:20,965 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 00:18:20,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:22,147 INFO L134 CoverageAnalysis]: Checked inductivity of 117 backedges. 12 proven. 23 refuted. 0 times theorem prover too weak. 82 trivial. 0 not checked. [2018-10-27 00:18:22,148 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 00:18:22,148 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-27 00:18:22,148 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 235 with the following transitions: [2018-10-27 00:18:22,152 INFO L202 CegarAbsIntRunner]: [0], [4], [7], [15], [16], [42], [45], [82], [86], [89], [93], [96], [100], [101], [105], [109], [113], [117], [121], [125], [129], [133], [137], [141], [145], [149], [150], [160], [161], [162], [166], [171], [173], [178], [180], [185], [187], [247], [248], [250], [254], [260], [265], [267], [274], [277], [286], [288], [355], [358], [361], [363], [366], [368], [371], [389], [392], [423], [426], [467], [469], [470], [471], [475], [479], [482], [486], [487], [488], [489], [490], [491], [492], [496], [499], [507], [508], [511], [513], [516], [518], [519], [521], [524], [526], [531], [542], [545], [549], [553], [556], [564], [565], [568], [569], [573], [576], [580], [581], [582], [583], [584], [587], [588], [591], [592], [595], [596], [597], [598], [599], [600], [601], [602], [603], [604], [605], [606], [607], [608], [609], [610], [619], [620], [621], [622], [623], [624], [627], [628], [635], [636], [651], [652], [655], [656], [657], [658], [659], [660], [661] [2018-10-27 00:18:22,198 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-10-27 00:18:22,198 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-10-27 00:18:22,267 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: Sort ~port_t~0 not declared at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.extractInterpolants(BaseRefinementStrategy.java:391) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.handleInfeasibleCase(BaseRefinementStrategy.java:296) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:206) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:70) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:429) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:435) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:376) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:312) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:123) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:316) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) Caused by: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: Sort ~port_t~0 not declared at de.uni_freiburg.informatik.ultimate.logic.NoopScript.sort(NoopScript.java:289) at de.uni_freiburg.informatik.ultimate.logic.NoopScript.sort(NoopScript.java:278) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.SmtSortUtils.getNamedSort(SmtSortUtils.java:118) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.boogie.TypeSortTranslator.constructSort(TypeSortTranslator.java:253) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.util.FakeBoogieVar.(FakeBoogieVar.java:60) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.util.AbsIntUtil.createTemporaryIBoogieVar(AbsIntUtil.java:347) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.relational.octagon.OctStatementProcessor.processAssignmentStatement(OctStatementProcessor.java:105) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.relational.octagon.OctStatementProcessor.processStatement(OctStatementProcessor.java:65) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.relational.octagon.OctPostOperator.applyCall(OctPostOperator.java:251) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.relational.octagon.OctPostOperator.apply(OctPostOperator.java:214) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.relational.octagon.OctPostOperator.apply(OctPostOperator.java:1) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.compound.CompoundDomainPostOperator.applyInternally(CompoundDomainPostOperator.java:311) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.compound.CompoundDomainPostOperator.apply(CompoundDomainPostOperator.java:276) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.compound.CompoundDomainPostOperator.apply(CompoundDomainPostOperator.java:1) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.transformula.poorman.PoormansAbstractPostOperator.handleCallTransition(PoormansAbstractPostOperator.java:185) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.transformula.poorman.PoormansAbstractPostOperator.apply(PoormansAbstractPostOperator.java:165) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.domain.transformula.poorman.PoormansAbstractPostOperator.apply(PoormansAbstractPostOperator.java:1) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.absint.DisjunctiveAbstractState.lambda$18(DisjunctiveAbstractState.java:339) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.absint.DisjunctiveAbstractState.crossProductCollection(DisjunctiveAbstractState.java:507) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.absint.DisjunctiveAbstractState.apply(DisjunctiveAbstractState.java:339) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.algorithm.FixpointEngine.calculateAbstractPost(FixpointEngine.java:243) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.algorithm.FixpointEngine.calculateFixpoint(FixpointEngine.java:134) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.algorithm.FixpointEngine.run(FixpointEngine.java:105) at de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2.tool.AbstractInterpreter.runWithoutTimeoutAndResults(AbstractInterpreter.java:149) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarAbsIntRunner.generateFixpoints(CegarAbsIntRunner.java:217) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseTaipanRefinementStrategy.constructInterpolantGenerator(BaseTaipanRefinementStrategy.java:385) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseTaipanRefinementStrategy.getInterpolantGenerator(BaseTaipanRefinementStrategy.java:226) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.extractInterpolants(BaseRefinementStrategy.java:380) ... 20 more [2018-10-27 00:18:22,270 INFO L168 Benchmark]: Toolchain (without parser) took 39009.83 ms. Allocated memory was 1.0 GB in the beginning and 2.0 GB in the end (delta: 1.0 GB). Free memory was 954.4 MB in the beginning and 1.6 GB in the end (delta: -629.7 MB). Peak memory consumption was 387.4 MB. Max. memory is 11.5 GB. [2018-10-27 00:18:22,271 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 977.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-10-27 00:18:22,271 INFO L168 Benchmark]: CACSL2BoogieTranslator took 319.07 ms. Allocated memory is still 1.0 GB. Free memory was 949.1 MB in the beginning and 933.0 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. [2018-10-27 00:18:22,272 INFO L168 Benchmark]: Boogie Procedure Inliner took 39.03 ms. Allocated memory is still 1.0 GB. Free memory is still 933.0 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-10-27 00:18:22,272 INFO L168 Benchmark]: Boogie Preprocessor took 172.80 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 203.9 MB). Free memory was 933.0 MB in the beginning and 1.2 GB in the end (delta: -261.3 MB). Peak memory consumption was 22.0 MB. Max. memory is 11.5 GB. [2018-10-27 00:18:22,273 INFO L168 Benchmark]: RCFGBuilder took 1236.69 ms. Allocated memory is still 1.2 GB. Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 63.1 MB). Peak memory consumption was 63.1 MB. Max. memory is 11.5 GB. [2018-10-27 00:18:22,273 INFO L168 Benchmark]: TraceAbstraction took 37238.77 ms. Allocated memory was 1.2 GB in the beginning and 2.0 GB in the end (delta: 813.2 MB). Free memory was 1.1 GB in the beginning and 1.6 GB in the end (delta: -453.0 MB). Peak memory consumption was 360.2 MB. Max. memory is 11.5 GB. [2018-10-27 00:18:22,278 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 977.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 319.07 ms. Allocated memory is still 1.0 GB. Free memory was 949.1 MB in the beginning and 933.0 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 39.03 ms. Allocated memory is still 1.0 GB. Free memory is still 933.0 MB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 172.80 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 203.9 MB). Free memory was 933.0 MB in the beginning and 1.2 GB in the end (delta: -261.3 MB). Peak memory consumption was 22.0 MB. Max. memory is 11.5 GB. * RCFGBuilder took 1236.69 ms. Allocated memory is still 1.2 GB. Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 63.1 MB). Peak memory consumption was 63.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 37238.77 ms. Allocated memory was 1.2 GB in the beginning and 2.0 GB in the end (delta: 813.2 MB). Free memory was 1.1 GB in the beginning and 1.6 GB in the end (delta: -453.0 MB). Peak memory consumption was 360.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: AssertionError: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: Sort ~port_t~0 not declared de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: Sort ~port_t~0 not declared: de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.extractInterpolants(BaseRefinementStrategy.java:391) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-1dbac8b [2018-10-27 00:18:24,153 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-10-27 00:18:24,159 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-10-27 00:18:24,172 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-10-27 00:18:24,173 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-10-27 00:18:24,174 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-10-27 00:18:24,175 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-10-27 00:18:24,177 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-10-27 00:18:24,179 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-10-27 00:18:24,181 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-10-27 00:18:24,183 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-10-27 00:18:24,183 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-10-27 00:18:24,184 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-10-27 00:18:24,184 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-10-27 00:18:24,185 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-10-27 00:18:24,186 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-10-27 00:18:24,186 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-10-27 00:18:24,187 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-10-27 00:18:24,189 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-10-27 00:18:24,199 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-10-27 00:18:24,201 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-10-27 00:18:24,204 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-10-27 00:18:24,208 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-10-27 00:18:24,211 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-10-27 00:18:24,211 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-10-27 00:18:24,212 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-10-27 00:18:24,213 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-10-27 00:18:24,213 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-10-27 00:18:24,214 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-10-27 00:18:24,215 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-10-27 00:18:24,215 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-10-27 00:18:24,215 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-10-27 00:18:24,215 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-10-27 00:18:24,215 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-10-27 00:18:24,216 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-10-27 00:18:24,217 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-10-27 00:18:24,217 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Bitvector.epf [2018-10-27 00:18:24,236 INFO L110 SettingsManager]: Loading preferences was successful [2018-10-27 00:18:24,237 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-10-27 00:18:24,237 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-10-27 00:18:24,238 INFO L133 SettingsManager]: * User list type=DISABLED [2018-10-27 00:18:24,238 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-10-27 00:18:24,238 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-10-27 00:18:24,239 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-10-27 00:18:24,239 INFO L133 SettingsManager]: * Interval Domain=false [2018-10-27 00:18:24,240 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-10-27 00:18:24,241 INFO L133 SettingsManager]: * sizeof long=4 [2018-10-27 00:18:24,241 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-10-27 00:18:24,241 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-10-27 00:18:24,241 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-10-27 00:18:24,241 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-10-27 00:18:24,242 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-10-27 00:18:24,242 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-10-27 00:18:24,242 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-10-27 00:18:24,242 INFO L133 SettingsManager]: * sizeof long double=12 [2018-10-27 00:18:24,243 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-10-27 00:18:24,243 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-10-27 00:18:24,243 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-10-27 00:18:24,243 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-10-27 00:18:24,243 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-10-27 00:18:24,243 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-10-27 00:18:24,243 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-27 00:18:24,243 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-10-27 00:18:24,244 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-10-27 00:18:24,244 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-10-27 00:18:24,244 INFO L133 SettingsManager]: * Trace refinement strategy=WALRUS [2018-10-27 00:18:24,244 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-10-27 00:18:24,244 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-10-27 00:18:24,244 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-10-27 00:18:24,244 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 51b120a585d23a491f06d4bb80c2a463453987ac [2018-10-27 00:18:24,288 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-10-27 00:18:24,299 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-10-27 00:18:24,303 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-10-27 00:18:24,304 INFO L271 PluginConnector]: Initializing CDTParser... [2018-10-27 00:18:24,304 INFO L276 PluginConnector]: CDTParser initialized [2018-10-27 00:18:24,305 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_1.ufo.UNBOUNDED.pals.c [2018-10-27 00:18:24,348 INFO L218 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/data/6754dc6ac/dafe6ee6624f410f9148fcd4f6fa6b15/FLAGe65c7b577 [2018-10-27 00:18:24,759 INFO L298 CDTParser]: Found 1 translation units. [2018-10-27 00:18:24,759 INFO L158 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_1.ufo.UNBOUNDED.pals.c [2018-10-27 00:18:24,768 INFO L346 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/data/6754dc6ac/dafe6ee6624f410f9148fcd4f6fa6b15/FLAGe65c7b577 [2018-10-27 00:18:24,780 INFO L354 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/data/6754dc6ac/dafe6ee6624f410f9148fcd4f6fa6b15 [2018-10-27 00:18:24,783 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-10-27 00:18:24,784 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-10-27 00:18:24,785 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-10-27 00:18:24,785 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-10-27 00:18:24,788 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-10-27 00:18:24,789 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.10 12:18:24" (1/1) ... [2018-10-27 00:18:24,792 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@645dd792 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 12:18:24, skipping insertion in model container [2018-10-27 00:18:24,795 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.10 12:18:24" (1/1) ... [2018-10-27 00:18:24,801 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-10-27 00:18:24,839 INFO L174 MainTranslator]: Built tables and reachable declarations [2018-10-27 00:18:25,116 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-27 00:18:25,129 INFO L189 MainTranslator]: Completed pre-run [2018-10-27 00:18:25,200 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-27 00:18:25,220 INFO L193 MainTranslator]: Completed translation [2018-10-27 00:18:25,220 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 12:18:25 WrapperNode [2018-10-27 00:18:25,220 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-10-27 00:18:25,221 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-10-27 00:18:25,221 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-10-27 00:18:25,221 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-10-27 00:18:25,228 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 12:18:25" (1/1) ... [2018-10-27 00:18:25,243 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 12:18:25" (1/1) ... [2018-10-27 00:18:25,249 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-10-27 00:18:25,250 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-10-27 00:18:25,250 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-10-27 00:18:25,250 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-10-27 00:18:25,256 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 12:18:25" (1/1) ... [2018-10-27 00:18:25,256 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 12:18:25" (1/1) ... [2018-10-27 00:18:25,266 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 12:18:25" (1/1) ... [2018-10-27 00:18:25,266 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 12:18:25" (1/1) ... [2018-10-27 00:18:25,291 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 12:18:25" (1/1) ... [2018-10-27 00:18:25,300 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 12:18:25" (1/1) ... [2018-10-27 00:18:25,303 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 12:18:25" (1/1) ... [2018-10-27 00:18:25,307 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-10-27 00:18:25,308 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-10-27 00:18:25,308 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-10-27 00:18:25,309 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-10-27 00:18:25,309 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 12:18:25" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-27 00:18:25,412 INFO L130 BoogieDeclarations]: Found specification of procedure read_manual_selection_history [2018-10-27 00:18:25,412 INFO L138 BoogieDeclarations]: Found implementation of procedure read_manual_selection_history [2018-10-27 00:18:25,413 INFO L130 BoogieDeclarations]: Found specification of procedure Side1_activestandby_task_each_pals_period [2018-10-27 00:18:25,413 INFO L138 BoogieDeclarations]: Found implementation of procedure Side1_activestandby_task_each_pals_period [2018-10-27 00:18:25,413 INFO L130 BoogieDeclarations]: Found specification of procedure write_active_side_history [2018-10-27 00:18:25,413 INFO L138 BoogieDeclarations]: Found implementation of procedure write_active_side_history [2018-10-27 00:18:25,413 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-10-27 00:18:25,413 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-10-27 00:18:25,413 INFO L130 BoogieDeclarations]: Found specification of procedure Console_task_each_pals_period [2018-10-27 00:18:25,414 INFO L138 BoogieDeclarations]: Found implementation of procedure Console_task_each_pals_period [2018-10-27 00:18:25,414 INFO L130 BoogieDeclarations]: Found specification of procedure read_side2_failed_history [2018-10-27 00:18:25,414 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side2_failed_history [2018-10-27 00:18:25,414 INFO L130 BoogieDeclarations]: Found specification of procedure assert [2018-10-27 00:18:25,414 INFO L138 BoogieDeclarations]: Found implementation of procedure assert [2018-10-27 00:18:25,414 INFO L130 BoogieDeclarations]: Found specification of procedure Pendulum_prism_task_each_pals_period [2018-10-27 00:18:25,414 INFO L138 BoogieDeclarations]: Found implementation of procedure Pendulum_prism_task_each_pals_period [2018-10-27 00:18:25,414 INFO L130 BoogieDeclarations]: Found specification of procedure write_manual_selection_history [2018-10-27 00:18:25,415 INFO L138 BoogieDeclarations]: Found implementation of procedure write_manual_selection_history [2018-10-27 00:18:25,415 INFO L130 BoogieDeclarations]: Found specification of procedure init [2018-10-27 00:18:25,415 INFO L138 BoogieDeclarations]: Found implementation of procedure init [2018-10-27 00:18:25,415 INFO L130 BoogieDeclarations]: Found specification of procedure flip_the_side [2018-10-27 00:18:25,415 INFO L138 BoogieDeclarations]: Found implementation of procedure flip_the_side [2018-10-27 00:18:25,415 INFO L130 BoogieDeclarations]: Found specification of procedure Side2_activestandby_task_each_pals_period [2018-10-27 00:18:25,415 INFO L138 BoogieDeclarations]: Found implementation of procedure Side2_activestandby_task_each_pals_period [2018-10-27 00:18:25,415 INFO L130 BoogieDeclarations]: Found specification of procedure check [2018-10-27 00:18:25,416 INFO L138 BoogieDeclarations]: Found implementation of procedure check [2018-10-27 00:18:25,416 INFO L130 BoogieDeclarations]: Found specification of procedure write_side1_failed_history [2018-10-27 00:18:25,416 INFO L138 BoogieDeclarations]: Found implementation of procedure write_side1_failed_history [2018-10-27 00:18:25,416 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-10-27 00:18:25,416 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-10-27 00:18:25,416 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-10-27 00:18:25,416 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-10-27 00:18:25,416 INFO L130 BoogieDeclarations]: Found specification of procedure read_side1_failed_history [2018-10-27 00:18:25,417 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side1_failed_history [2018-10-27 00:18:25,417 INFO L130 BoogieDeclarations]: Found specification of procedure read_active_side_history [2018-10-27 00:18:25,417 INFO L138 BoogieDeclarations]: Found implementation of procedure read_active_side_history [2018-10-27 00:18:25,417 INFO L130 BoogieDeclarations]: Found specification of procedure write_side2_failed_history [2018-10-27 00:18:25,417 INFO L138 BoogieDeclarations]: Found implementation of procedure write_side2_failed_history [2018-10-27 00:18:26,579 INFO L341 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-10-27 00:18:26,579 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.10 12:18:26 BoogieIcfgContainer [2018-10-27 00:18:26,580 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-10-27 00:18:26,580 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-10-27 00:18:26,580 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-10-27 00:18:26,583 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-10-27 00:18:26,584 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.10 12:18:24" (1/3) ... [2018-10-27 00:18:26,584 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@61559b2a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.10 12:18:26, skipping insertion in model container [2018-10-27 00:18:26,584 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 12:18:25" (2/3) ... [2018-10-27 00:18:26,585 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@61559b2a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.10 12:18:26, skipping insertion in model container [2018-10-27 00:18:26,585 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.10 12:18:26" (3/3) ... [2018-10-27 00:18:26,587 INFO L112 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby_false-unreach-call.4_1.ufo.UNBOUNDED.pals.c [2018-10-27 00:18:26,595 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-10-27 00:18:26,600 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-10-27 00:18:26,609 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-10-27 00:18:26,635 INFO L135 ementStrategyFactory]: Using default assertion order modulation [2018-10-27 00:18:26,635 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-10-27 00:18:26,636 INFO L383 AbstractCegarLoop]: Hoare is true [2018-10-27 00:18:26,636 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-10-27 00:18:26,636 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-10-27 00:18:26,636 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-10-27 00:18:26,636 INFO L387 AbstractCegarLoop]: Difference is false [2018-10-27 00:18:26,636 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-10-27 00:18:26,636 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-10-27 00:18:26,660 INFO L276 IsEmpty]: Start isEmpty. Operand 235 states. [2018-10-27 00:18:26,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-10-27 00:18:26,667 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:26,668 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:26,670 INFO L424 AbstractCegarLoop]: === Iteration 1 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:26,675 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:26,675 INFO L82 PathProgramCache]: Analyzing trace with hash 1961805370, now seen corresponding path program 1 times [2018-10-27 00:18:26,680 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:18:26,680 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:18:26,697 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:26,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:26,857 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:18:26,887 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 00:18:26,887 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:18:26,891 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:26,892 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-27 00:18:26,898 INFO L460 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-10-27 00:18:26,908 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-10-27 00:18:26,908 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-10-27 00:18:26,910 INFO L87 Difference]: Start difference. First operand 235 states. Second operand 2 states. [2018-10-27 00:18:26,959 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:26,959 INFO L93 Difference]: Finished difference Result 443 states and 683 transitions. [2018-10-27 00:18:26,959 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-10-27 00:18:26,960 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 66 [2018-10-27 00:18:26,961 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:26,973 INFO L225 Difference]: With dead ends: 443 [2018-10-27 00:18:26,973 INFO L226 Difference]: Without dead ends: 230 [2018-10-27 00:18:26,978 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-10-27 00:18:26,997 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 230 states. [2018-10-27 00:18:27,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 230 to 230. [2018-10-27 00:18:27,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 230 states. [2018-10-27 00:18:27,048 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 230 states to 230 states and 332 transitions. [2018-10-27 00:18:27,050 INFO L78 Accepts]: Start accepts. Automaton has 230 states and 332 transitions. Word has length 66 [2018-10-27 00:18:27,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:27,050 INFO L481 AbstractCegarLoop]: Abstraction has 230 states and 332 transitions. [2018-10-27 00:18:27,050 INFO L482 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-10-27 00:18:27,051 INFO L276 IsEmpty]: Start isEmpty. Operand 230 states and 332 transitions. [2018-10-27 00:18:27,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-10-27 00:18:27,053 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:27,053 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:27,054 INFO L424 AbstractCegarLoop]: === Iteration 2 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:27,054 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:27,055 INFO L82 PathProgramCache]: Analyzing trace with hash -521733700, now seen corresponding path program 1 times [2018-10-27 00:18:27,055 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:18:27,055 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:18:27,073 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:27,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:27,201 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:18:27,342 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 00:18:27,343 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:18:27,346 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:27,346 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 00:18:27,348 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 00:18:27,348 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 00:18:27,348 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 00:18:27,348 INFO L87 Difference]: Start difference. First operand 230 states and 332 transitions. Second operand 4 states. [2018-10-27 00:18:27,560 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:27,569 INFO L93 Difference]: Finished difference Result 441 states and 633 transitions. [2018-10-27 00:18:27,570 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 00:18:27,574 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2018-10-27 00:18:27,574 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:27,576 INFO L225 Difference]: With dead ends: 441 [2018-10-27 00:18:27,576 INFO L226 Difference]: Without dead ends: 230 [2018-10-27 00:18:27,582 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 63 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 00:18:27,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 230 states. [2018-10-27 00:18:27,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 230 to 230. [2018-10-27 00:18:27,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 230 states. [2018-10-27 00:18:27,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 230 states to 230 states and 320 transitions. [2018-10-27 00:18:27,604 INFO L78 Accepts]: Start accepts. Automaton has 230 states and 320 transitions. Word has length 66 [2018-10-27 00:18:27,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:27,604 INFO L481 AbstractCegarLoop]: Abstraction has 230 states and 320 transitions. [2018-10-27 00:18:27,604 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 00:18:27,604 INFO L276 IsEmpty]: Start isEmpty. Operand 230 states and 320 transitions. [2018-10-27 00:18:27,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-10-27 00:18:27,607 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:27,607 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:27,607 INFO L424 AbstractCegarLoop]: === Iteration 3 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:27,607 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:27,608 INFO L82 PathProgramCache]: Analyzing trace with hash -1751540886, now seen corresponding path program 1 times [2018-10-27 00:18:27,608 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:18:27,608 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:18:27,631 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:27,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:27,778 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:18:27,863 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 00:18:27,864 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:18:27,866 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:27,866 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 00:18:27,866 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 00:18:27,867 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 00:18:27,867 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 00:18:27,868 INFO L87 Difference]: Start difference. First operand 230 states and 320 transitions. Second operand 4 states. [2018-10-27 00:18:28,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:28,084 INFO L93 Difference]: Finished difference Result 444 states and 631 transitions. [2018-10-27 00:18:28,085 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 00:18:28,085 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 77 [2018-10-27 00:18:28,086 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:28,089 INFO L225 Difference]: With dead ends: 444 [2018-10-27 00:18:28,089 INFO L226 Difference]: Without dead ends: 236 [2018-10-27 00:18:28,095 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 74 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 00:18:28,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 236 states. [2018-10-27 00:18:28,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 236 to 234. [2018-10-27 00:18:28,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234 states. [2018-10-27 00:18:28,131 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234 states to 234 states and 323 transitions. [2018-10-27 00:18:28,132 INFO L78 Accepts]: Start accepts. Automaton has 234 states and 323 transitions. Word has length 77 [2018-10-27 00:18:28,132 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:28,132 INFO L481 AbstractCegarLoop]: Abstraction has 234 states and 323 transitions. [2018-10-27 00:18:28,132 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 00:18:28,132 INFO L276 IsEmpty]: Start isEmpty. Operand 234 states and 323 transitions. [2018-10-27 00:18:28,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-10-27 00:18:28,139 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:28,139 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:28,140 INFO L424 AbstractCegarLoop]: === Iteration 4 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:28,140 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:28,140 INFO L82 PathProgramCache]: Analyzing trace with hash -30717215, now seen corresponding path program 1 times [2018-10-27 00:18:28,140 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:18:28,141 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:18:28,162 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:28,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:28,298 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:18:28,336 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 00:18:28,336 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:18:28,338 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:28,338 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 00:18:28,339 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-27 00:18:28,339 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-27 00:18:28,339 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 00:18:28,339 INFO L87 Difference]: Start difference. First operand 234 states and 323 transitions. Second operand 3 states. [2018-10-27 00:18:28,436 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:28,437 INFO L93 Difference]: Finished difference Result 632 states and 891 transitions. [2018-10-27 00:18:28,441 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-27 00:18:28,442 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 95 [2018-10-27 00:18:28,442 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:28,445 INFO L225 Difference]: With dead ends: 632 [2018-10-27 00:18:28,445 INFO L226 Difference]: Without dead ends: 420 [2018-10-27 00:18:28,452 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 93 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 00:18:28,453 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 420 states. [2018-10-27 00:18:28,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 420 to 402. [2018-10-27 00:18:28,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 402 states. [2018-10-27 00:18:28,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 402 states to 402 states and 567 transitions. [2018-10-27 00:18:28,496 INFO L78 Accepts]: Start accepts. Automaton has 402 states and 567 transitions. Word has length 95 [2018-10-27 00:18:28,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:28,496 INFO L481 AbstractCegarLoop]: Abstraction has 402 states and 567 transitions. [2018-10-27 00:18:28,496 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-27 00:18:28,496 INFO L276 IsEmpty]: Start isEmpty. Operand 402 states and 567 transitions. [2018-10-27 00:18:28,502 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-10-27 00:18:28,503 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:28,504 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:28,504 INFO L424 AbstractCegarLoop]: === Iteration 5 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:28,504 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:28,504 INFO L82 PathProgramCache]: Analyzing trace with hash 1742225559, now seen corresponding path program 1 times [2018-10-27 00:18:28,505 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:18:28,506 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:18:28,529 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:28,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:28,679 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:18:28,751 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 00:18:28,751 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:18:28,754 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:28,755 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 00:18:28,756 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-27 00:18:28,756 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-27 00:18:28,756 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 00:18:28,756 INFO L87 Difference]: Start difference. First operand 402 states and 567 transitions. Second operand 3 states. [2018-10-27 00:18:28,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:28,911 INFO L93 Difference]: Finished difference Result 1107 states and 1588 transitions. [2018-10-27 00:18:28,930 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-27 00:18:28,931 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 96 [2018-10-27 00:18:28,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:28,934 INFO L225 Difference]: With dead ends: 1107 [2018-10-27 00:18:28,935 INFO L226 Difference]: Without dead ends: 727 [2018-10-27 00:18:28,936 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 94 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 00:18:28,937 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 727 states. [2018-10-27 00:18:28,986 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 727 to 721. [2018-10-27 00:18:28,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 721 states. [2018-10-27 00:18:28,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 721 states to 721 states and 1031 transitions. [2018-10-27 00:18:28,992 INFO L78 Accepts]: Start accepts. Automaton has 721 states and 1031 transitions. Word has length 96 [2018-10-27 00:18:28,993 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:28,993 INFO L481 AbstractCegarLoop]: Abstraction has 721 states and 1031 transitions. [2018-10-27 00:18:28,993 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-27 00:18:28,993 INFO L276 IsEmpty]: Start isEmpty. Operand 721 states and 1031 transitions. [2018-10-27 00:18:28,994 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-10-27 00:18:28,995 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:28,995 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:28,995 INFO L424 AbstractCegarLoop]: === Iteration 6 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:28,995 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:28,995 INFO L82 PathProgramCache]: Analyzing trace with hash -1851677159, now seen corresponding path program 1 times [2018-10-27 00:18:28,996 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:18:28,996 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:18:29,019 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:29,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:29,148 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:18:29,169 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 00:18:29,170 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:18:29,171 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:29,171 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 00:18:29,171 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-27 00:18:29,172 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-27 00:18:29,172 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 00:18:29,172 INFO L87 Difference]: Start difference. First operand 721 states and 1031 transitions. Second operand 3 states. [2018-10-27 00:18:29,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:29,215 INFO L93 Difference]: Finished difference Result 1311 states and 1872 transitions. [2018-10-27 00:18:29,218 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-27 00:18:29,218 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 96 [2018-10-27 00:18:29,218 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:29,221 INFO L225 Difference]: With dead ends: 1311 [2018-10-27 00:18:29,221 INFO L226 Difference]: Without dead ends: 580 [2018-10-27 00:18:29,224 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 94 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 00:18:29,225 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 580 states. [2018-10-27 00:18:29,247 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 580 to 580. [2018-10-27 00:18:29,247 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 580 states. [2018-10-27 00:18:29,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 580 states to 580 states and 820 transitions. [2018-10-27 00:18:29,251 INFO L78 Accepts]: Start accepts. Automaton has 580 states and 820 transitions. Word has length 96 [2018-10-27 00:18:29,251 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:29,251 INFO L481 AbstractCegarLoop]: Abstraction has 580 states and 820 transitions. [2018-10-27 00:18:29,251 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-27 00:18:29,251 INFO L276 IsEmpty]: Start isEmpty. Operand 580 states and 820 transitions. [2018-10-27 00:18:29,252 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-10-27 00:18:29,252 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:29,253 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:29,253 INFO L424 AbstractCegarLoop]: === Iteration 7 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:29,253 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:29,253 INFO L82 PathProgramCache]: Analyzing trace with hash 382064816, now seen corresponding path program 1 times [2018-10-27 00:18:29,255 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:18:29,255 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:18:29,282 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:29,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:29,410 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:18:29,542 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 00:18:29,543 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:18:29,545 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:29,546 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 00:18:29,547 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 00:18:29,548 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 00:18:29,548 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 00:18:29,548 INFO L87 Difference]: Start difference. First operand 580 states and 820 transitions. Second operand 4 states. [2018-10-27 00:18:29,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:29,805 INFO L93 Difference]: Finished difference Result 1159 states and 1649 transitions. [2018-10-27 00:18:29,810 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 00:18:29,810 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 96 [2018-10-27 00:18:29,810 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:29,814 INFO L225 Difference]: With dead ends: 1159 [2018-10-27 00:18:29,815 INFO L226 Difference]: Without dead ends: 601 [2018-10-27 00:18:29,818 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 93 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 00:18:29,819 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 601 states. [2018-10-27 00:18:29,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 601 to 595. [2018-10-27 00:18:29,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 595 states. [2018-10-27 00:18:29,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 595 states to 595 states and 832 transitions. [2018-10-27 00:18:29,849 INFO L78 Accepts]: Start accepts. Automaton has 595 states and 832 transitions. Word has length 96 [2018-10-27 00:18:29,850 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:29,851 INFO L481 AbstractCegarLoop]: Abstraction has 595 states and 832 transitions. [2018-10-27 00:18:29,851 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 00:18:29,851 INFO L276 IsEmpty]: Start isEmpty. Operand 595 states and 832 transitions. [2018-10-27 00:18:29,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-10-27 00:18:29,852 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:29,852 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:29,852 INFO L424 AbstractCegarLoop]: === Iteration 8 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:29,853 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:29,857 INFO L82 PathProgramCache]: Analyzing trace with hash -1730714388, now seen corresponding path program 1 times [2018-10-27 00:18:29,858 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:18:29,858 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:18:29,878 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:29,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:30,002 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:18:30,143 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 00:18:30,144 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:18:30,146 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:30,147 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 00:18:30,147 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 00:18:30,148 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 00:18:30,148 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 00:18:30,150 INFO L87 Difference]: Start difference. First operand 595 states and 832 transitions. Second operand 4 states. [2018-10-27 00:18:30,680 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:30,680 INFO L93 Difference]: Finished difference Result 1189 states and 1688 transitions. [2018-10-27 00:18:30,681 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 00:18:30,681 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 104 [2018-10-27 00:18:30,681 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:30,684 INFO L225 Difference]: With dead ends: 1189 [2018-10-27 00:18:30,684 INFO L226 Difference]: Without dead ends: 616 [2018-10-27 00:18:30,687 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 101 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 00:18:30,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 616 states. [2018-10-27 00:18:30,709 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 616 to 610. [2018-10-27 00:18:30,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 610 states. [2018-10-27 00:18:30,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 610 states to 610 states and 844 transitions. [2018-10-27 00:18:30,713 INFO L78 Accepts]: Start accepts. Automaton has 610 states and 844 transitions. Word has length 104 [2018-10-27 00:18:30,713 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:30,713 INFO L481 AbstractCegarLoop]: Abstraction has 610 states and 844 transitions. [2018-10-27 00:18:30,714 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 00:18:30,714 INFO L276 IsEmpty]: Start isEmpty. Operand 610 states and 844 transitions. [2018-10-27 00:18:30,715 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-10-27 00:18:30,718 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:30,718 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:30,719 INFO L424 AbstractCegarLoop]: === Iteration 9 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:30,719 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:30,719 INFO L82 PathProgramCache]: Analyzing trace with hash 878276182, now seen corresponding path program 1 times [2018-10-27 00:18:30,719 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:18:30,719 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:18:30,739 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:30,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:30,868 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:18:31,012 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 00:18:31,012 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:18:31,015 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:31,016 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 00:18:31,016 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 00:18:31,016 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 00:18:31,016 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 00:18:31,017 INFO L87 Difference]: Start difference. First operand 610 states and 844 transitions. Second operand 4 states. [2018-10-27 00:18:31,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:31,440 INFO L93 Difference]: Finished difference Result 1216 states and 1694 transitions. [2018-10-27 00:18:31,442 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 00:18:31,442 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 112 [2018-10-27 00:18:31,442 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:31,445 INFO L225 Difference]: With dead ends: 1216 [2018-10-27 00:18:31,445 INFO L226 Difference]: Without dead ends: 628 [2018-10-27 00:18:31,449 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 110 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 00:18:31,450 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 628 states. [2018-10-27 00:18:31,469 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 628 to 622. [2018-10-27 00:18:31,469 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 622 states. [2018-10-27 00:18:31,472 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 622 states to 622 states and 853 transitions. [2018-10-27 00:18:31,472 INFO L78 Accepts]: Start accepts. Automaton has 622 states and 853 transitions. Word has length 112 [2018-10-27 00:18:31,472 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:31,473 INFO L481 AbstractCegarLoop]: Abstraction has 622 states and 853 transitions. [2018-10-27 00:18:31,473 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 00:18:31,473 INFO L276 IsEmpty]: Start isEmpty. Operand 622 states and 853 transitions. [2018-10-27 00:18:31,475 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-10-27 00:18:31,476 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:31,476 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:31,476 INFO L424 AbstractCegarLoop]: === Iteration 10 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:31,477 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:31,477 INFO L82 PathProgramCache]: Analyzing trace with hash 1169584904, now seen corresponding path program 1 times [2018-10-27 00:18:31,477 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:18:31,478 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:18:31,498 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:31,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:31,635 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:18:31,776 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 00:18:31,776 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:18:31,778 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:31,778 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 00:18:31,778 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 00:18:31,778 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 00:18:31,779 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 00:18:31,779 INFO L87 Difference]: Start difference. First operand 622 states and 853 transitions. Second operand 4 states. [2018-10-27 00:18:32,282 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:32,283 INFO L93 Difference]: Finished difference Result 1243 states and 1730 transitions. [2018-10-27 00:18:32,283 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 00:18:32,284 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 112 [2018-10-27 00:18:32,284 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:32,287 INFO L225 Difference]: With dead ends: 1243 [2018-10-27 00:18:32,287 INFO L226 Difference]: Without dead ends: 643 [2018-10-27 00:18:32,289 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 109 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 00:18:32,291 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 643 states. [2018-10-27 00:18:32,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 643 to 637. [2018-10-27 00:18:32,311 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 637 states. [2018-10-27 00:18:32,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 637 states to 637 states and 865 transitions. [2018-10-27 00:18:32,314 INFO L78 Accepts]: Start accepts. Automaton has 637 states and 865 transitions. Word has length 112 [2018-10-27 00:18:32,314 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:32,314 INFO L481 AbstractCegarLoop]: Abstraction has 637 states and 865 transitions. [2018-10-27 00:18:32,314 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 00:18:32,315 INFO L276 IsEmpty]: Start isEmpty. Operand 637 states and 865 transitions. [2018-10-27 00:18:32,317 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-10-27 00:18:32,318 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:32,319 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:32,319 INFO L424 AbstractCegarLoop]: === Iteration 11 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:32,319 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:32,319 INFO L82 PathProgramCache]: Analyzing trace with hash -1072892006, now seen corresponding path program 1 times [2018-10-27 00:18:32,320 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:18:32,320 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:18:32,345 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:32,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:32,483 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:18:32,870 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 00:18:32,870 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:18:32,872 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:32,873 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-27 00:18:32,873 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-27 00:18:32,873 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-27 00:18:32,874 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-10-27 00:18:32,875 INFO L87 Difference]: Start difference. First operand 637 states and 865 transitions. Second operand 9 states. [2018-10-27 00:18:37,112 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:37,112 INFO L93 Difference]: Finished difference Result 1659 states and 2266 transitions. [2018-10-27 00:18:37,113 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-10-27 00:18:37,113 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 120 [2018-10-27 00:18:37,113 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:37,117 INFO L225 Difference]: With dead ends: 1659 [2018-10-27 00:18:37,118 INFO L226 Difference]: Without dead ends: 1044 [2018-10-27 00:18:37,120 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 123 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=38, Invalid=118, Unknown=0, NotChecked=0, Total=156 [2018-10-27 00:18:37,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1044 states. [2018-10-27 00:18:37,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1044 to 916. [2018-10-27 00:18:37,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 916 states. [2018-10-27 00:18:37,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 916 states to 916 states and 1235 transitions. [2018-10-27 00:18:37,155 INFO L78 Accepts]: Start accepts. Automaton has 916 states and 1235 transitions. Word has length 120 [2018-10-27 00:18:37,156 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:37,156 INFO L481 AbstractCegarLoop]: Abstraction has 916 states and 1235 transitions. [2018-10-27 00:18:37,156 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-27 00:18:37,156 INFO L276 IsEmpty]: Start isEmpty. Operand 916 states and 1235 transitions. [2018-10-27 00:18:37,158 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-10-27 00:18:37,158 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:37,159 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:37,159 INFO L424 AbstractCegarLoop]: === Iteration 12 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:37,159 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:37,159 INFO L82 PathProgramCache]: Analyzing trace with hash 724775159, now seen corresponding path program 1 times [2018-10-27 00:18:37,159 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:18:37,159 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:18:37,181 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:37,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:37,385 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:18:37,966 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 00:18:37,966 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:18:37,969 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:37,969 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-27 00:18:37,969 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-27 00:18:37,970 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-27 00:18:37,970 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-10-27 00:18:37,972 INFO L87 Difference]: Start difference. First operand 916 states and 1235 transitions. Second operand 7 states. [2018-10-27 00:18:42,335 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:42,336 INFO L93 Difference]: Finished difference Result 1970 states and 2660 transitions. [2018-10-27 00:18:42,336 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-10-27 00:18:42,336 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 125 [2018-10-27 00:18:42,336 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:42,341 INFO L225 Difference]: With dead ends: 1970 [2018-10-27 00:18:42,341 INFO L226 Difference]: Without dead ends: 1076 [2018-10-27 00:18:42,344 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 120 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=50, Invalid=106, Unknown=0, NotChecked=0, Total=156 [2018-10-27 00:18:42,345 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1076 states. [2018-10-27 00:18:42,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1076 to 1067. [2018-10-27 00:18:42,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1067 states. [2018-10-27 00:18:42,386 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1067 states to 1067 states and 1426 transitions. [2018-10-27 00:18:42,387 INFO L78 Accepts]: Start accepts. Automaton has 1067 states and 1426 transitions. Word has length 125 [2018-10-27 00:18:42,387 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:42,387 INFO L481 AbstractCegarLoop]: Abstraction has 1067 states and 1426 transitions. [2018-10-27 00:18:42,387 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-27 00:18:42,387 INFO L276 IsEmpty]: Start isEmpty. Operand 1067 states and 1426 transitions. [2018-10-27 00:18:42,389 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-10-27 00:18:42,389 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:42,390 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:42,390 INFO L424 AbstractCegarLoop]: === Iteration 13 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:42,391 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:42,391 INFO L82 PathProgramCache]: Analyzing trace with hash -899988092, now seen corresponding path program 1 times [2018-10-27 00:18:42,391 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:18:42,391 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:18:42,418 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:42,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:42,607 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:18:42,656 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 00:18:42,657 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:18:42,658 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:42,658 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-27 00:18:42,659 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-27 00:18:42,659 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-27 00:18:42,659 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-10-27 00:18:42,659 INFO L87 Difference]: Start difference. First operand 1067 states and 1426 transitions. Second operand 7 states. [2018-10-27 00:18:44,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:44,158 INFO L93 Difference]: Finished difference Result 1988 states and 2675 transitions. [2018-10-27 00:18:44,159 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-10-27 00:18:44,159 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 126 [2018-10-27 00:18:44,159 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:44,163 INFO L225 Difference]: With dead ends: 1988 [2018-10-27 00:18:44,163 INFO L226 Difference]: Without dead ends: 1085 [2018-10-27 00:18:44,165 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 133 GetRequests, 121 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=50, Invalid=106, Unknown=0, NotChecked=0, Total=156 [2018-10-27 00:18:44,166 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1085 states. [2018-10-27 00:18:44,208 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1085 to 1067. [2018-10-27 00:18:44,209 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1067 states. [2018-10-27 00:18:44,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1067 states to 1067 states and 1423 transitions. [2018-10-27 00:18:44,212 INFO L78 Accepts]: Start accepts. Automaton has 1067 states and 1423 transitions. Word has length 126 [2018-10-27 00:18:44,212 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:44,212 INFO L481 AbstractCegarLoop]: Abstraction has 1067 states and 1423 transitions. [2018-10-27 00:18:44,213 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-27 00:18:44,213 INFO L276 IsEmpty]: Start isEmpty. Operand 1067 states and 1423 transitions. [2018-10-27 00:18:44,215 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-10-27 00:18:44,215 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:44,215 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:44,216 INFO L424 AbstractCegarLoop]: === Iteration 14 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:44,216 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:44,216 INFO L82 PathProgramCache]: Analyzing trace with hash 1439904298, now seen corresponding path program 1 times [2018-10-27 00:18:44,216 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:18:44,216 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:18:44,242 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:44,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:44,426 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:18:45,324 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 00:18:45,324 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:18:45,326 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:45,326 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-27 00:18:45,326 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-27 00:18:45,326 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-27 00:18:45,327 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-10-27 00:18:45,327 INFO L87 Difference]: Start difference. First operand 1067 states and 1423 transitions. Second operand 9 states. [2018-10-27 00:18:47,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:47,425 INFO L93 Difference]: Finished difference Result 2687 states and 3628 transitions. [2018-10-27 00:18:47,425 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-10-27 00:18:47,426 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 127 [2018-10-27 00:18:47,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:47,431 INFO L225 Difference]: With dead ends: 2687 [2018-10-27 00:18:47,431 INFO L226 Difference]: Without dead ends: 1793 [2018-10-27 00:18:47,434 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 120 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=62, Invalid=210, Unknown=0, NotChecked=0, Total=272 [2018-10-27 00:18:47,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1793 states. [2018-10-27 00:18:47,505 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1793 to 1767. [2018-10-27 00:18:47,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1767 states. [2018-10-27 00:18:47,509 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1767 states to 1767 states and 2375 transitions. [2018-10-27 00:18:47,510 INFO L78 Accepts]: Start accepts. Automaton has 1767 states and 2375 transitions. Word has length 127 [2018-10-27 00:18:47,510 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:47,510 INFO L481 AbstractCegarLoop]: Abstraction has 1767 states and 2375 transitions. [2018-10-27 00:18:47,510 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-27 00:18:47,510 INFO L276 IsEmpty]: Start isEmpty. Operand 1767 states and 2375 transitions. [2018-10-27 00:18:47,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-10-27 00:18:47,512 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:47,512 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:47,512 INFO L424 AbstractCegarLoop]: === Iteration 15 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:47,512 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:47,513 INFO L82 PathProgramCache]: Analyzing trace with hash 664334046, now seen corresponding path program 1 times [2018-10-27 00:18:47,513 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:18:47,513 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:18:47,542 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:47,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:47,671 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:18:47,813 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-27 00:18:47,813 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:18:47,815 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:47,815 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 00:18:47,816 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 00:18:47,816 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 00:18:47,816 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 00:18:47,816 INFO L87 Difference]: Start difference. First operand 1767 states and 2375 transitions. Second operand 4 states. [2018-10-27 00:18:48,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:48,053 INFO L93 Difference]: Finished difference Result 3330 states and 4510 transitions. [2018-10-27 00:18:48,053 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 00:18:48,053 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 129 [2018-10-27 00:18:48,054 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:48,057 INFO L225 Difference]: With dead ends: 3330 [2018-10-27 00:18:48,057 INFO L226 Difference]: Without dead ends: 1815 [2018-10-27 00:18:48,062 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 130 GetRequests, 127 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 00:18:48,063 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1815 states. [2018-10-27 00:18:48,132 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1815 to 1791. [2018-10-27 00:18:48,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1791 states. [2018-10-27 00:18:48,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1791 states to 1791 states and 2393 transitions. [2018-10-27 00:18:48,137 INFO L78 Accepts]: Start accepts. Automaton has 1791 states and 2393 transitions. Word has length 129 [2018-10-27 00:18:48,138 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:48,138 INFO L481 AbstractCegarLoop]: Abstraction has 1791 states and 2393 transitions. [2018-10-27 00:18:48,138 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 00:18:48,138 INFO L276 IsEmpty]: Start isEmpty. Operand 1791 states and 2393 transitions. [2018-10-27 00:18:48,140 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2018-10-27 00:18:48,140 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:48,140 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:48,140 INFO L424 AbstractCegarLoop]: === Iteration 16 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:48,141 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:48,141 INFO L82 PathProgramCache]: Analyzing trace with hash 1274122938, now seen corresponding path program 1 times [2018-10-27 00:18:48,141 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:18:48,141 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:18:48,167 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:48,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:48,337 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:18:48,404 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 00:18:48,404 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:18:48,407 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:48,407 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-27 00:18:48,407 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-27 00:18:48,407 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-27 00:18:48,407 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-10-27 00:18:48,408 INFO L87 Difference]: Start difference. First operand 1791 states and 2393 transitions. Second operand 9 states. [2018-10-27 00:18:48,895 WARN L179 SmtUtils]: Spent 223.00 ms on a formula simplification. DAG size of input: 11 DAG size of output: 10 [2018-10-27 00:18:51,134 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:51,134 INFO L93 Difference]: Finished difference Result 3356 states and 4492 transitions. [2018-10-27 00:18:51,135 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-10-27 00:18:51,135 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 135 [2018-10-27 00:18:51,135 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:51,140 INFO L225 Difference]: With dead ends: 3356 [2018-10-27 00:18:51,140 INFO L226 Difference]: Without dead ends: 1841 [2018-10-27 00:18:51,143 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 128 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=62, Invalid=210, Unknown=0, NotChecked=0, Total=272 [2018-10-27 00:18:51,144 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1841 states. [2018-10-27 00:18:51,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1841 to 1791. [2018-10-27 00:18:51,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1791 states. [2018-10-27 00:18:51,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1791 states to 1791 states and 2390 transitions. [2018-10-27 00:18:51,222 INFO L78 Accepts]: Start accepts. Automaton has 1791 states and 2390 transitions. Word has length 135 [2018-10-27 00:18:51,222 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:51,222 INFO L481 AbstractCegarLoop]: Abstraction has 1791 states and 2390 transitions. [2018-10-27 00:18:51,222 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-27 00:18:51,222 INFO L276 IsEmpty]: Start isEmpty. Operand 1791 states and 2390 transitions. [2018-10-27 00:18:51,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2018-10-27 00:18:51,224 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:51,224 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:51,224 INFO L424 AbstractCegarLoop]: === Iteration 17 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:51,225 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:51,225 INFO L82 PathProgramCache]: Analyzing trace with hash 235290501, now seen corresponding path program 1 times [2018-10-27 00:18:51,225 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:18:51,225 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:18:51,252 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:51,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:51,369 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:18:51,432 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-10-27 00:18:51,432 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (18)] Exception during sending of exit command (exit): Broken pipe [2018-10-27 00:18:51,437 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:51,437 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-10-27 00:18:51,437 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-27 00:18:51,438 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-27 00:18:51,438 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-10-27 00:18:51,438 INFO L87 Difference]: Start difference. First operand 1791 states and 2390 transitions. Second operand 8 states. [2018-10-27 00:18:52,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:52,100 INFO L93 Difference]: Finished difference Result 3091 states and 4183 transitions. [2018-10-27 00:18:52,102 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-27 00:18:52,102 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 136 [2018-10-27 00:18:52,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:52,109 INFO L225 Difference]: With dead ends: 3091 [2018-10-27 00:18:52,109 INFO L226 Difference]: Without dead ends: 1976 [2018-10-27 00:18:52,112 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 140 GetRequests, 130 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2018-10-27 00:18:52,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1976 states. [2018-10-27 00:18:52,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1976 to 1784. [2018-10-27 00:18:52,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1784 states. [2018-10-27 00:18:52,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1784 states to 1784 states and 2369 transitions. [2018-10-27 00:18:52,205 INFO L78 Accepts]: Start accepts. Automaton has 1784 states and 2369 transitions. Word has length 136 [2018-10-27 00:18:52,205 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:52,205 INFO L481 AbstractCegarLoop]: Abstraction has 1784 states and 2369 transitions. [2018-10-27 00:18:52,206 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-27 00:18:52,206 INFO L276 IsEmpty]: Start isEmpty. Operand 1784 states and 2369 transitions. [2018-10-27 00:18:52,208 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2018-10-27 00:18:52,208 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:52,208 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:52,208 INFO L424 AbstractCegarLoop]: === Iteration 18 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:52,208 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:52,208 INFO L82 PathProgramCache]: Analyzing trace with hash -1088543513, now seen corresponding path program 1 times [2018-10-27 00:18:52,209 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:18:52,209 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:18:52,233 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:52,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:52,339 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:18:52,502 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-10-27 00:18:52,502 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:18:52,504 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:52,504 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-10-27 00:18:52,504 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-27 00:18:52,504 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-27 00:18:52,505 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-10-27 00:18:52,505 INFO L87 Difference]: Start difference. First operand 1784 states and 2369 transitions. Second operand 8 states. [2018-10-27 00:18:53,607 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:53,607 INFO L93 Difference]: Finished difference Result 2990 states and 4009 transitions. [2018-10-27 00:18:53,608 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-27 00:18:53,608 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 137 [2018-10-27 00:18:53,609 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:53,613 INFO L225 Difference]: With dead ends: 2990 [2018-10-27 00:18:53,613 INFO L226 Difference]: Without dead ends: 1875 [2018-10-27 00:18:53,615 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 131 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2018-10-27 00:18:53,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1875 states. [2018-10-27 00:18:53,695 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1875 to 1760. [2018-10-27 00:18:53,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1760 states. [2018-10-27 00:18:53,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1760 states to 1760 states and 2323 transitions. [2018-10-27 00:18:53,699 INFO L78 Accepts]: Start accepts. Automaton has 1760 states and 2323 transitions. Word has length 137 [2018-10-27 00:18:53,700 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:53,700 INFO L481 AbstractCegarLoop]: Abstraction has 1760 states and 2323 transitions. [2018-10-27 00:18:53,700 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-27 00:18:53,700 INFO L276 IsEmpty]: Start isEmpty. Operand 1760 states and 2323 transitions. [2018-10-27 00:18:53,702 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2018-10-27 00:18:53,702 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:53,703 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:53,703 INFO L424 AbstractCegarLoop]: === Iteration 19 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:53,703 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:53,703 INFO L82 PathProgramCache]: Analyzing trace with hash 951688178, now seen corresponding path program 1 times [2018-10-27 00:18:53,704 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:18:53,704 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:18:53,728 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:53,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:53,951 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:18:54,121 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-10-27 00:18:54,122 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:18:54,125 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:54,126 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 00:18:54,126 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 00:18:54,128 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 00:18:54,128 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 00:18:54,128 INFO L87 Difference]: Start difference. First operand 1760 states and 2323 transitions. Second operand 4 states. [2018-10-27 00:18:54,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:54,650 INFO L93 Difference]: Finished difference Result 4503 states and 6004 transitions. [2018-10-27 00:18:54,651 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 00:18:54,651 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 137 [2018-10-27 00:18:54,651 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:54,659 INFO L225 Difference]: With dead ends: 4503 [2018-10-27 00:18:54,660 INFO L226 Difference]: Without dead ends: 3375 [2018-10-27 00:18:54,662 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 133 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 00:18:54,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3375 states. [2018-10-27 00:18:54,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3375 to 3302. [2018-10-27 00:18:54,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3302 states. [2018-10-27 00:18:54,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3302 states to 3302 states and 4375 transitions. [2018-10-27 00:18:54,821 INFO L78 Accepts]: Start accepts. Automaton has 3302 states and 4375 transitions. Word has length 137 [2018-10-27 00:18:54,822 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:54,822 INFO L481 AbstractCegarLoop]: Abstraction has 3302 states and 4375 transitions. [2018-10-27 00:18:54,822 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 00:18:54,822 INFO L276 IsEmpty]: Start isEmpty. Operand 3302 states and 4375 transitions. [2018-10-27 00:18:54,825 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-10-27 00:18:54,825 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:54,825 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:54,826 INFO L424 AbstractCegarLoop]: === Iteration 20 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:54,826 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:54,826 INFO L82 PathProgramCache]: Analyzing trace with hash -844755992, now seen corresponding path program 1 times [2018-10-27 00:18:54,826 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:18:54,826 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:18:54,850 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:55,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:55,032 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:18:55,060 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-10-27 00:18:55,060 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:18:55,062 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:55,062 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 00:18:55,063 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 00:18:55,063 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 00:18:55,063 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 00:18:55,063 INFO L87 Difference]: Start difference. First operand 3302 states and 4375 transitions. Second operand 4 states. [2018-10-27 00:18:55,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:55,318 INFO L93 Difference]: Finished difference Result 7716 states and 10313 transitions. [2018-10-27 00:18:55,318 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 00:18:55,318 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 139 [2018-10-27 00:18:55,318 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:55,335 INFO L225 Difference]: With dead ends: 7716 [2018-10-27 00:18:55,335 INFO L226 Difference]: Without dead ends: 5448 [2018-10-27 00:18:55,341 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 135 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 00:18:55,344 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5448 states. [2018-10-27 00:18:55,576 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5448 to 5257. [2018-10-27 00:18:55,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5257 states. [2018-10-27 00:18:55,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5257 states to 5257 states and 6979 transitions. [2018-10-27 00:18:55,589 INFO L78 Accepts]: Start accepts. Automaton has 5257 states and 6979 transitions. Word has length 139 [2018-10-27 00:18:55,589 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:55,590 INFO L481 AbstractCegarLoop]: Abstraction has 5257 states and 6979 transitions. [2018-10-27 00:18:55,590 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 00:18:55,591 INFO L276 IsEmpty]: Start isEmpty. Operand 5257 states and 6979 transitions. [2018-10-27 00:18:55,594 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-10-27 00:18:55,594 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:55,594 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:55,594 INFO L424 AbstractCegarLoop]: === Iteration 21 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:55,594 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:55,595 INFO L82 PathProgramCache]: Analyzing trace with hash 490372173, now seen corresponding path program 1 times [2018-10-27 00:18:55,595 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:18:55,595 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:18:55,615 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:55,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:55,807 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:18:55,875 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-10-27 00:18:55,875 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:18:55,877 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:55,877 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-27 00:18:55,877 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-27 00:18:55,877 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-27 00:18:55,877 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-10-27 00:18:55,878 INFO L87 Difference]: Start difference. First operand 5257 states and 6979 transitions. Second operand 7 states. [2018-10-27 00:18:56,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:56,866 INFO L93 Difference]: Finished difference Result 9615 states and 12759 transitions. [2018-10-27 00:18:56,867 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-10-27 00:18:56,867 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 139 [2018-10-27 00:18:56,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:56,883 INFO L225 Difference]: With dead ends: 9615 [2018-10-27 00:18:56,883 INFO L226 Difference]: Without dead ends: 4488 [2018-10-27 00:18:56,892 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 135 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=50, Invalid=106, Unknown=0, NotChecked=0, Total=156 [2018-10-27 00:18:56,896 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4488 states. [2018-10-27 00:18:57,119 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4488 to 4472. [2018-10-27 00:18:57,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4472 states. [2018-10-27 00:18:57,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4472 states to 4472 states and 5911 transitions. [2018-10-27 00:18:57,127 INFO L78 Accepts]: Start accepts. Automaton has 4472 states and 5911 transitions. Word has length 139 [2018-10-27 00:18:57,127 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:57,127 INFO L481 AbstractCegarLoop]: Abstraction has 4472 states and 5911 transitions. [2018-10-27 00:18:57,127 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-27 00:18:57,127 INFO L276 IsEmpty]: Start isEmpty. Operand 4472 states and 5911 transitions. [2018-10-27 00:18:57,131 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2018-10-27 00:18:57,131 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:57,131 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:57,131 INFO L424 AbstractCegarLoop]: === Iteration 22 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:57,131 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:57,132 INFO L82 PathProgramCache]: Analyzing trace with hash 1942608557, now seen corresponding path program 1 times [2018-10-27 00:18:57,132 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:18:57,132 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:18:57,163 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:57,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:57,258 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:18:57,309 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-10-27 00:18:57,309 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:18:57,311 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:18:57,311 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-10-27 00:18:57,311 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-27 00:18:57,311 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-27 00:18:57,311 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-10-27 00:18:57,312 INFO L87 Difference]: Start difference. First operand 4472 states and 5911 transitions. Second operand 8 states. [2018-10-27 00:18:57,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:18:57,996 INFO L93 Difference]: Finished difference Result 8518 states and 11446 transitions. [2018-10-27 00:18:57,997 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-27 00:18:57,997 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 142 [2018-10-27 00:18:57,998 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:18:58,013 INFO L225 Difference]: With dead ends: 8518 [2018-10-27 00:18:58,013 INFO L226 Difference]: Without dead ends: 4800 [2018-10-27 00:18:58,022 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 136 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2018-10-27 00:18:58,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4800 states. [2018-10-27 00:18:58,190 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4800 to 4025. [2018-10-27 00:18:58,190 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4025 states. [2018-10-27 00:18:58,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4025 states to 4025 states and 5323 transitions. [2018-10-27 00:18:58,198 INFO L78 Accepts]: Start accepts. Automaton has 4025 states and 5323 transitions. Word has length 142 [2018-10-27 00:18:58,198 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:18:58,198 INFO L481 AbstractCegarLoop]: Abstraction has 4025 states and 5323 transitions. [2018-10-27 00:18:58,198 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-27 00:18:58,198 INFO L276 IsEmpty]: Start isEmpty. Operand 4025 states and 5323 transitions. [2018-10-27 00:18:58,200 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2018-10-27 00:18:58,200 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:18:58,200 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:18:58,201 INFO L424 AbstractCegarLoop]: === Iteration 23 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:18:58,201 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:18:58,201 INFO L82 PathProgramCache]: Analyzing trace with hash -356209009, now seen corresponding path program 1 times [2018-10-27 00:18:58,201 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:18:58,203 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:18:58,223 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:58,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:58,348 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:18:58,484 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 13 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-10-27 00:18:58,485 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 00:18:58,745 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-10-27 00:18:58,747 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 00:18:58,747 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-27 00:18:58,757 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:18:58,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:18:58,825 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:18:58,900 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-10-27 00:18:58,900 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:18:58,930 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-10-27 00:18:58,930 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [9, 9] total 18 [2018-10-27 00:18:58,930 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-10-27 00:18:58,930 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-10-27 00:18:58,931 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=250, Unknown=0, NotChecked=0, Total=306 [2018-10-27 00:18:58,931 INFO L87 Difference]: Start difference. First operand 4025 states and 5323 transitions. Second operand 18 states. [2018-10-27 00:19:01,971 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:19:01,971 INFO L93 Difference]: Finished difference Result 8714 states and 11668 transitions. [2018-10-27 00:19:01,972 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-10-27 00:19:01,972 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 143 [2018-10-27 00:19:01,972 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:19:01,986 INFO L225 Difference]: With dead ends: 8714 [2018-10-27 00:19:01,986 INFO L226 Difference]: Without dead ends: 5517 [2018-10-27 00:19:01,993 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 450 GetRequests, 416 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 231 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=198, Invalid=992, Unknown=0, NotChecked=0, Total=1190 [2018-10-27 00:19:01,996 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5517 states. [2018-10-27 00:19:02,209 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5517 to 3567. [2018-10-27 00:19:02,209 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3567 states. [2018-10-27 00:19:02,216 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3567 states to 3567 states and 4571 transitions. [2018-10-27 00:19:02,217 INFO L78 Accepts]: Start accepts. Automaton has 3567 states and 4571 transitions. Word has length 143 [2018-10-27 00:19:02,217 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:19:02,218 INFO L481 AbstractCegarLoop]: Abstraction has 3567 states and 4571 transitions. [2018-10-27 00:19:02,218 INFO L482 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-10-27 00:19:02,218 INFO L276 IsEmpty]: Start isEmpty. Operand 3567 states and 4571 transitions. [2018-10-27 00:19:02,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2018-10-27 00:19:02,219 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:19:02,219 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:19:02,219 INFO L424 AbstractCegarLoop]: === Iteration 24 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:19:02,219 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:19:02,220 INFO L82 PathProgramCache]: Analyzing trace with hash -840770671, now seen corresponding path program 1 times [2018-10-27 00:19:02,220 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:19:02,220 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 26 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:19:02,245 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:19:02,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:19:02,448 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:19:02,582 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-10-27 00:19:02,582 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:19:02,584 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:19:02,584 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-27 00:19:02,585 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-27 00:19:02,585 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-27 00:19:02,586 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-10-27 00:19:02,586 INFO L87 Difference]: Start difference. First operand 3567 states and 4571 transitions. Second operand 7 states. [2018-10-27 00:19:03,426 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:19:03,427 INFO L93 Difference]: Finished difference Result 6742 states and 8668 transitions. [2018-10-27 00:19:03,427 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-10-27 00:19:03,427 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 142 [2018-10-27 00:19:03,427 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:19:03,437 INFO L225 Difference]: With dead ends: 6742 [2018-10-27 00:19:03,437 INFO L226 Difference]: Without dead ends: 3415 [2018-10-27 00:19:03,443 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 138 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=50, Invalid=106, Unknown=0, NotChecked=0, Total=156 [2018-10-27 00:19:03,445 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3415 states. [2018-10-27 00:19:03,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3415 to 3294. [2018-10-27 00:19:03,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3294 states. [2018-10-27 00:19:03,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3294 states to 3294 states and 4215 transitions. [2018-10-27 00:19:03,749 INFO L78 Accepts]: Start accepts. Automaton has 3294 states and 4215 transitions. Word has length 142 [2018-10-27 00:19:03,750 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:19:03,750 INFO L481 AbstractCegarLoop]: Abstraction has 3294 states and 4215 transitions. [2018-10-27 00:19:03,750 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-27 00:19:03,750 INFO L276 IsEmpty]: Start isEmpty. Operand 3294 states and 4215 transitions. [2018-10-27 00:19:03,751 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147 [2018-10-27 00:19:03,751 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:19:03,751 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:19:03,752 INFO L424 AbstractCegarLoop]: === Iteration 25 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:19:03,752 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:19:03,752 INFO L82 PathProgramCache]: Analyzing trace with hash 1487915762, now seen corresponding path program 1 times [2018-10-27 00:19:03,752 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:19:03,752 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:19:03,778 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:19:03,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:19:03,878 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:19:03,890 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-10-27 00:19:03,890 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:19:03,892 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:19:03,892 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 00:19:03,892 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 00:19:03,892 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 00:19:03,892 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 00:19:03,892 INFO L87 Difference]: Start difference. First operand 3294 states and 4215 transitions. Second operand 4 states. [2018-10-27 00:19:04,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:19:04,045 INFO L93 Difference]: Finished difference Result 6446 states and 8347 transitions. [2018-10-27 00:19:04,045 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 00:19:04,045 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 146 [2018-10-27 00:19:04,046 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:19:04,054 INFO L225 Difference]: With dead ends: 6446 [2018-10-27 00:19:04,054 INFO L226 Difference]: Without dead ends: 3486 [2018-10-27 00:19:04,061 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 147 GetRequests, 144 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 00:19:04,064 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3486 states. [2018-10-27 00:19:04,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3486 to 3438. [2018-10-27 00:19:04,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3438 states. [2018-10-27 00:19:04,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3438 states to 3438 states and 4335 transitions. [2018-10-27 00:19:04,269 INFO L78 Accepts]: Start accepts. Automaton has 3438 states and 4335 transitions. Word has length 146 [2018-10-27 00:19:04,270 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:19:04,270 INFO L481 AbstractCegarLoop]: Abstraction has 3438 states and 4335 transitions. [2018-10-27 00:19:04,270 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 00:19:04,270 INFO L276 IsEmpty]: Start isEmpty. Operand 3438 states and 4335 transitions. [2018-10-27 00:19:04,271 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2018-10-27 00:19:04,271 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:19:04,271 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:19:04,271 INFO L424 AbstractCegarLoop]: === Iteration 26 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:19:04,271 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:19:04,272 INFO L82 PathProgramCache]: Analyzing trace with hash 503878803, now seen corresponding path program 1 times [2018-10-27 00:19:04,272 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:19:04,272 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:19:04,292 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:19:04,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:19:04,508 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:19:04,727 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-10-27 00:19:04,727 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:19:04,729 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:19:04,729 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-27 00:19:04,729 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-27 00:19:04,729 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-27 00:19:04,730 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-10-27 00:19:04,730 INFO L87 Difference]: Start difference. First operand 3438 states and 4335 transitions. Second operand 9 states. [2018-10-27 00:19:05,963 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:19:05,963 INFO L93 Difference]: Finished difference Result 6542 states and 8302 transitions. [2018-10-27 00:19:05,963 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-10-27 00:19:05,963 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 151 [2018-10-27 00:19:05,964 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:19:05,971 INFO L225 Difference]: With dead ends: 6542 [2018-10-27 00:19:05,971 INFO L226 Difference]: Without dead ends: 3401 [2018-10-27 00:19:05,977 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 160 GetRequests, 144 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=62, Invalid=210, Unknown=0, NotChecked=0, Total=272 [2018-10-27 00:19:05,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3401 states. [2018-10-27 00:19:06,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3401 to 3323. [2018-10-27 00:19:06,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3323 states. [2018-10-27 00:19:06,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3323 states to 3323 states and 4185 transitions. [2018-10-27 00:19:06,228 INFO L78 Accepts]: Start accepts. Automaton has 3323 states and 4185 transitions. Word has length 151 [2018-10-27 00:19:06,229 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:19:06,229 INFO L481 AbstractCegarLoop]: Abstraction has 3323 states and 4185 transitions. [2018-10-27 00:19:06,229 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-27 00:19:06,229 INFO L276 IsEmpty]: Start isEmpty. Operand 3323 states and 4185 transitions. [2018-10-27 00:19:06,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 155 [2018-10-27 00:19:06,231 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:19:06,231 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:19:06,232 INFO L424 AbstractCegarLoop]: === Iteration 27 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:19:06,232 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:19:06,232 INFO L82 PathProgramCache]: Analyzing trace with hash 524391130, now seen corresponding path program 1 times [2018-10-27 00:19:06,232 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:19:06,232 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:19:06,260 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:19:06,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:19:06,480 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:19:06,697 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-10-27 00:19:06,697 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:19:06,698 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:19:06,698 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-10-27 00:19:06,699 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-27 00:19:06,699 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-27 00:19:06,699 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-10-27 00:19:06,699 INFO L87 Difference]: Start difference. First operand 3323 states and 4185 transitions. Second operand 8 states. [2018-10-27 00:19:06,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:19:06,909 INFO L93 Difference]: Finished difference Result 3581 states and 4556 transitions. [2018-10-27 00:19:06,910 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-27 00:19:06,910 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 154 [2018-10-27 00:19:06,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:19:06,915 INFO L225 Difference]: With dead ends: 3581 [2018-10-27 00:19:06,915 INFO L226 Difference]: Without dead ends: 3579 [2018-10-27 00:19:06,916 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 147 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-10-27 00:19:06,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3579 states. [2018-10-27 00:19:07,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3579 to 3342. [2018-10-27 00:19:07,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3342 states. [2018-10-27 00:19:07,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3342 states to 3342 states and 4210 transitions. [2018-10-27 00:19:07,062 INFO L78 Accepts]: Start accepts. Automaton has 3342 states and 4210 transitions. Word has length 154 [2018-10-27 00:19:07,063 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:19:07,063 INFO L481 AbstractCegarLoop]: Abstraction has 3342 states and 4210 transitions. [2018-10-27 00:19:07,063 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-27 00:19:07,063 INFO L276 IsEmpty]: Start isEmpty. Operand 3342 states and 4210 transitions. [2018-10-27 00:19:07,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-10-27 00:19:07,064 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:19:07,064 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:19:07,064 INFO L424 AbstractCegarLoop]: === Iteration 28 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:19:07,064 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:19:07,064 INFO L82 PathProgramCache]: Analyzing trace with hash -611431533, now seen corresponding path program 1 times [2018-10-27 00:19:07,065 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:19:07,065 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:19:07,077 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:19:07,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:19:07,176 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:19:07,224 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-10-27 00:19:07,224 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:19:07,226 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:19:07,226 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 00:19:07,226 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 00:19:07,226 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 00:19:07,226 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 00:19:07,226 INFO L87 Difference]: Start difference. First operand 3342 states and 4210 transitions. Second operand 4 states. [2018-10-27 00:19:07,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:19:07,353 INFO L93 Difference]: Finished difference Result 6299 states and 8039 transitions. [2018-10-27 00:19:07,353 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 00:19:07,354 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 155 [2018-10-27 00:19:07,354 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:19:07,359 INFO L225 Difference]: With dead ends: 6299 [2018-10-27 00:19:07,359 INFO L226 Difference]: Without dead ends: 3296 [2018-10-27 00:19:07,362 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 153 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 00:19:07,364 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3296 states. [2018-10-27 00:19:07,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3296 to 3296. [2018-10-27 00:19:07,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3296 states. [2018-10-27 00:19:07,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3296 states to 3296 states and 4072 transitions. [2018-10-27 00:19:07,493 INFO L78 Accepts]: Start accepts. Automaton has 3296 states and 4072 transitions. Word has length 155 [2018-10-27 00:19:07,493 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:19:07,493 INFO L481 AbstractCegarLoop]: Abstraction has 3296 states and 4072 transitions. [2018-10-27 00:19:07,493 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 00:19:07,493 INFO L276 IsEmpty]: Start isEmpty. Operand 3296 states and 4072 transitions. [2018-10-27 00:19:07,494 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2018-10-27 00:19:07,494 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:19:07,494 INFO L375 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:19:07,495 INFO L424 AbstractCegarLoop]: === Iteration 29 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:19:07,495 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:19:07,495 INFO L82 PathProgramCache]: Analyzing trace with hash 328871935, now seen corresponding path program 1 times [2018-10-27 00:19:07,495 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:19:07,495 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:19:07,508 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:19:07,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:19:07,604 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:19:07,633 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-10-27 00:19:07,633 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:19:07,635 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:19:07,635 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 00:19:07,635 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 00:19:07,635 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 00:19:07,636 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 00:19:07,636 INFO L87 Difference]: Start difference. First operand 3296 states and 4072 transitions. Second operand 4 states. [2018-10-27 00:19:07,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:19:07,846 INFO L93 Difference]: Finished difference Result 6180 states and 7733 transitions. [2018-10-27 00:19:07,847 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 00:19:07,847 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 164 [2018-10-27 00:19:07,847 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:19:07,853 INFO L225 Difference]: With dead ends: 6180 [2018-10-27 00:19:07,853 INFO L226 Difference]: Without dead ends: 3250 [2018-10-27 00:19:07,858 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 162 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 00:19:07,861 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3250 states. [2018-10-27 00:19:07,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3250 to 3250. [2018-10-27 00:19:07,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3250 states. [2018-10-27 00:19:07,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3250 states to 3250 states and 3934 transitions. [2018-10-27 00:19:07,996 INFO L78 Accepts]: Start accepts. Automaton has 3250 states and 3934 transitions. Word has length 164 [2018-10-27 00:19:07,997 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:19:07,997 INFO L481 AbstractCegarLoop]: Abstraction has 3250 states and 3934 transitions. [2018-10-27 00:19:07,997 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 00:19:07,997 INFO L276 IsEmpty]: Start isEmpty. Operand 3250 states and 3934 transitions. [2018-10-27 00:19:07,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2018-10-27 00:19:07,998 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:19:07,998 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 5, 4, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:19:07,998 INFO L424 AbstractCegarLoop]: === Iteration 30 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:19:07,998 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:19:07,998 INFO L82 PathProgramCache]: Analyzing trace with hash 197089907, now seen corresponding path program 1 times [2018-10-27 00:19:07,999 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:19:07,999 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:19:08,013 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:19:08,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:19:08,113 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:19:08,145 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 79 trivial. 0 not checked. [2018-10-27 00:19:08,145 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:19:08,147 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:19:08,147 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 00:19:08,147 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 00:19:08,148 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 00:19:08,148 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 00:19:08,148 INFO L87 Difference]: Start difference. First operand 3250 states and 3934 transitions. Second operand 4 states. [2018-10-27 00:19:08,291 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:19:08,292 INFO L93 Difference]: Finished difference Result 6040 states and 7406 transitions. [2018-10-27 00:19:08,292 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 00:19:08,292 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 180 [2018-10-27 00:19:08,292 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:19:08,297 INFO L225 Difference]: With dead ends: 6040 [2018-10-27 00:19:08,298 INFO L226 Difference]: Without dead ends: 3204 [2018-10-27 00:19:08,303 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 181 GetRequests, 178 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 00:19:08,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3204 states. [2018-10-27 00:19:08,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3204 to 3204. [2018-10-27 00:19:08,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3204 states. [2018-10-27 00:19:08,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3204 states to 3204 states and 3796 transitions. [2018-10-27 00:19:08,497 INFO L78 Accepts]: Start accepts. Automaton has 3204 states and 3796 transitions. Word has length 180 [2018-10-27 00:19:08,497 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:19:08,498 INFO L481 AbstractCegarLoop]: Abstraction has 3204 states and 3796 transitions. [2018-10-27 00:19:08,498 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 00:19:08,498 INFO L276 IsEmpty]: Start isEmpty. Operand 3204 states and 3796 transitions. [2018-10-27 00:19:08,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 197 [2018-10-27 00:19:08,499 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:19:08,500 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 5, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:19:08,502 INFO L424 AbstractCegarLoop]: === Iteration 31 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:19:08,503 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:19:08,503 INFO L82 PathProgramCache]: Analyzing trace with hash -1668189077, now seen corresponding path program 1 times [2018-10-27 00:19:08,503 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:19:08,503 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:19:08,532 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:19:08,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:19:08,676 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:19:08,830 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 94 trivial. 0 not checked. [2018-10-27 00:19:08,830 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:19:08,832 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:19:08,832 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 00:19:08,832 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 00:19:08,833 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 00:19:08,833 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 00:19:08,833 INFO L87 Difference]: Start difference. First operand 3204 states and 3796 transitions. Second operand 4 states. [2018-10-27 00:19:08,971 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:19:08,972 INFO L93 Difference]: Finished difference Result 5880 states and 7039 transitions. [2018-10-27 00:19:08,972 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 00:19:08,972 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 196 [2018-10-27 00:19:08,972 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:19:08,978 INFO L225 Difference]: With dead ends: 5880 [2018-10-27 00:19:08,978 INFO L226 Difference]: Without dead ends: 3135 [2018-10-27 00:19:08,981 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 197 GetRequests, 194 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 00:19:08,983 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3135 states. [2018-10-27 00:19:09,091 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3135 to 2945. [2018-10-27 00:19:09,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2945 states. [2018-10-27 00:19:09,095 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2945 states to 2945 states and 3405 transitions. [2018-10-27 00:19:09,096 INFO L78 Accepts]: Start accepts. Automaton has 2945 states and 3405 transitions. Word has length 196 [2018-10-27 00:19:09,096 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:19:09,096 INFO L481 AbstractCegarLoop]: Abstraction has 2945 states and 3405 transitions. [2018-10-27 00:19:09,096 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 00:19:09,096 INFO L276 IsEmpty]: Start isEmpty. Operand 2945 states and 3405 transitions. [2018-10-27 00:19:09,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 209 [2018-10-27 00:19:09,098 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:19:09,098 INFO L375 BasicCegarLoop]: trace histogram [6, 6, 5, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:19:09,098 INFO L424 AbstractCegarLoop]: === Iteration 32 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:19:09,099 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:19:09,099 INFO L82 PathProgramCache]: Analyzing trace with hash -1285510287, now seen corresponding path program 1 times [2018-10-27 00:19:09,099 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:19:09,099 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:19:09,130 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:19:09,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:19:09,325 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:19:09,545 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 74 proven. 0 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2018-10-27 00:19:09,545 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (34)] Exception during sending of exit command (exit): Broken pipe [2018-10-27 00:19:09,547 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:19:09,547 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-27 00:19:09,548 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-27 00:19:09,548 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-27 00:19:09,548 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-10-27 00:19:09,548 INFO L87 Difference]: Start difference. First operand 2945 states and 3405 transitions. Second operand 9 states. [2018-10-27 00:19:14,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:19:14,481 INFO L93 Difference]: Finished difference Result 5725 states and 6704 transitions. [2018-10-27 00:19:14,482 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-10-27 00:19:14,482 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 208 [2018-10-27 00:19:14,482 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:19:14,487 INFO L225 Difference]: With dead ends: 5725 [2018-10-27 00:19:14,487 INFO L226 Difference]: Without dead ends: 3104 [2018-10-27 00:19:14,490 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 218 GetRequests, 202 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=62, Invalid=210, Unknown=0, NotChecked=0, Total=272 [2018-10-27 00:19:14,492 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3104 states. [2018-10-27 00:19:14,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3104 to 2804. [2018-10-27 00:19:14,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2804 states. [2018-10-27 00:19:14,608 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2804 states to 2804 states and 3243 transitions. [2018-10-27 00:19:14,609 INFO L78 Accepts]: Start accepts. Automaton has 2804 states and 3243 transitions. Word has length 208 [2018-10-27 00:19:14,609 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:19:14,609 INFO L481 AbstractCegarLoop]: Abstraction has 2804 states and 3243 transitions. [2018-10-27 00:19:14,610 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-27 00:19:14,610 INFO L276 IsEmpty]: Start isEmpty. Operand 2804 states and 3243 transitions. [2018-10-27 00:19:14,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 259 [2018-10-27 00:19:14,612 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:19:14,612 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:19:14,612 INFO L424 AbstractCegarLoop]: === Iteration 33 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:19:14,612 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:19:14,613 INFO L82 PathProgramCache]: Analyzing trace with hash 863407014, now seen corresponding path program 1 times [2018-10-27 00:19:14,613 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:19:14,613 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:19:14,627 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:19:14,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:19:14,874 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:19:15,099 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 82 proven. 24 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2018-10-27 00:19:15,099 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 00:19:15,671 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2018-10-27 00:19:15,673 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 00:19:15,673 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-27 00:19:15,680 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:19:15,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:19:15,785 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:19:15,876 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 82 proven. 24 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2018-10-27 00:19:15,876 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 00:19:16,242 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2018-10-27 00:19:16,259 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-10-27 00:19:16,259 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14, 13, 14] total 24 [2018-10-27 00:19:16,261 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-10-27 00:19:16,262 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-10-27 00:19:16,262 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=480, Unknown=0, NotChecked=0, Total=552 [2018-10-27 00:19:16,262 INFO L87 Difference]: Start difference. First operand 2804 states and 3243 transitions. Second operand 24 states. [2018-10-27 00:19:21,407 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:19:21,407 INFO L93 Difference]: Finished difference Result 6373 states and 7423 transitions. [2018-10-27 00:19:21,408 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2018-10-27 00:19:21,408 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 258 [2018-10-27 00:19:21,408 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:19:21,420 INFO L225 Difference]: With dead ends: 6373 [2018-10-27 00:19:21,420 INFO L226 Difference]: Without dead ends: 3932 [2018-10-27 00:19:21,427 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1115 GetRequests, 1021 SyntacticMatches, 12 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1674 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=1457, Invalid=5515, Unknown=0, NotChecked=0, Total=6972 [2018-10-27 00:19:21,430 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3932 states. [2018-10-27 00:19:21,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3932 to 3154. [2018-10-27 00:19:21,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3154 states. [2018-10-27 00:19:21,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3154 states to 3154 states and 3647 transitions. [2018-10-27 00:19:21,706 INFO L78 Accepts]: Start accepts. Automaton has 3154 states and 3647 transitions. Word has length 258 [2018-10-27 00:19:21,706 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:19:21,706 INFO L481 AbstractCegarLoop]: Abstraction has 3154 states and 3647 transitions. [2018-10-27 00:19:21,706 INFO L482 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-10-27 00:19:21,706 INFO L276 IsEmpty]: Start isEmpty. Operand 3154 states and 3647 transitions. [2018-10-27 00:19:21,709 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 260 [2018-10-27 00:19:21,709 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:19:21,709 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:19:21,709 INFO L424 AbstractCegarLoop]: === Iteration 34 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:19:21,709 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:19:21,710 INFO L82 PathProgramCache]: Analyzing trace with hash 130536332, now seen corresponding path program 1 times [2018-10-27 00:19:21,710 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:19:21,710 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:19:21,727 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:19:21,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:19:21,967 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:19:22,132 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 77 proven. 46 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-10-27 00:19:22,132 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 00:19:22,527 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 11 proven. 24 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-10-27 00:19:22,530 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 00:19:22,530 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-27 00:19:22,537 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:19:22,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:19:22,626 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:19:22,698 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 77 proven. 46 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-10-27 00:19:22,699 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 00:19:22,899 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 11 proven. 24 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-10-27 00:19:22,916 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-10-27 00:19:22,916 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14, 13, 14] total 24 [2018-10-27 00:19:22,917 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-10-27 00:19:22,917 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-10-27 00:19:22,917 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=480, Unknown=0, NotChecked=0, Total=552 [2018-10-27 00:19:22,918 INFO L87 Difference]: Start difference. First operand 3154 states and 3647 transitions. Second operand 24 states. [2018-10-27 00:19:28,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:19:28,406 INFO L93 Difference]: Finished difference Result 7047 states and 8217 transitions. [2018-10-27 00:19:28,407 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2018-10-27 00:19:28,407 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 259 [2018-10-27 00:19:28,407 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:19:28,418 INFO L225 Difference]: With dead ends: 7047 [2018-10-27 00:19:28,418 INFO L226 Difference]: Without dead ends: 4248 [2018-10-27 00:19:28,425 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1095 GetRequests, 1012 SyntacticMatches, 14 SemanticMatches, 69 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1208 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=870, Invalid=4100, Unknown=0, NotChecked=0, Total=4970 [2018-10-27 00:19:28,428 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4248 states. [2018-10-27 00:19:28,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4248 to 4032. [2018-10-27 00:19:28,743 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4032 states. [2018-10-27 00:19:28,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4032 states to 4032 states and 4666 transitions. [2018-10-27 00:19:28,749 INFO L78 Accepts]: Start accepts. Automaton has 4032 states and 4666 transitions. Word has length 259 [2018-10-27 00:19:28,749 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:19:28,749 INFO L481 AbstractCegarLoop]: Abstraction has 4032 states and 4666 transitions. [2018-10-27 00:19:28,749 INFO L482 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-10-27 00:19:28,749 INFO L276 IsEmpty]: Start isEmpty. Operand 4032 states and 4666 transitions. [2018-10-27 00:19:28,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 261 [2018-10-27 00:19:28,754 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:19:28,755 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:19:28,755 INFO L424 AbstractCegarLoop]: === Iteration 35 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:19:28,755 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:19:28,755 INFO L82 PathProgramCache]: Analyzing trace with hash 460123329, now seen corresponding path program 1 times [2018-10-27 00:19:28,756 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:19:28,756 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:19:28,786 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:19:29,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:19:29,061 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:19:29,226 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 61 proven. 52 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-10-27 00:19:29,226 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 00:19:29,484 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 13 proven. 11 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-10-27 00:19:29,486 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 00:19:29,486 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-27 00:19:29,493 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:19:29,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:19:29,577 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:19:29,624 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 61 proven. 52 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-10-27 00:19:29,624 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 00:19:29,838 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 13 proven. 11 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-10-27 00:19:29,855 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-10-27 00:19:29,855 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10] total 17 [2018-10-27 00:19:29,856 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-10-27 00:19:29,856 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-10-27 00:19:29,856 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=228, Unknown=0, NotChecked=0, Total=272 [2018-10-27 00:19:29,856 INFO L87 Difference]: Start difference. First operand 4032 states and 4666 transitions. Second operand 17 states. [2018-10-27 00:19:31,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:19:31,998 INFO L93 Difference]: Finished difference Result 8049 states and 9434 transitions. [2018-10-27 00:19:31,999 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-10-27 00:19:31,999 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 260 [2018-10-27 00:19:31,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:19:32,008 INFO L225 Difference]: With dead ends: 8049 [2018-10-27 00:19:32,008 INFO L226 Difference]: Without dead ends: 4462 [2018-10-27 00:19:32,015 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1069 GetRequests, 1021 SyntacticMatches, 13 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 215 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=334, Invalid=998, Unknown=0, NotChecked=0, Total=1332 [2018-10-27 00:19:32,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4462 states. [2018-10-27 00:19:32,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4462 to 4398. [2018-10-27 00:19:32,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4398 states. [2018-10-27 00:19:32,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4398 states to 4398 states and 5117 transitions. [2018-10-27 00:19:32,343 INFO L78 Accepts]: Start accepts. Automaton has 4398 states and 5117 transitions. Word has length 260 [2018-10-27 00:19:32,343 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:19:32,344 INFO L481 AbstractCegarLoop]: Abstraction has 4398 states and 5117 transitions. [2018-10-27 00:19:32,344 INFO L482 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-10-27 00:19:32,344 INFO L276 IsEmpty]: Start isEmpty. Operand 4398 states and 5117 transitions. [2018-10-27 00:19:32,347 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 262 [2018-10-27 00:19:32,347 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:19:32,347 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:19:32,348 INFO L424 AbstractCegarLoop]: === Iteration 36 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:19:32,348 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:19:32,348 INFO L82 PathProgramCache]: Analyzing trace with hash -514260230, now seen corresponding path program 1 times [2018-10-27 00:19:32,348 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:19:32,348 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:19:32,362 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:19:32,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:19:32,603 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:19:32,694 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 88 proven. 26 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-10-27 00:19:32,694 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 00:19:32,919 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 19 proven. 3 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-10-27 00:19:32,921 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 00:19:32,921 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-27 00:19:32,927 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:19:33,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:19:33,019 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:19:33,074 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 88 proven. 26 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-10-27 00:19:33,074 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 00:19:33,690 WARN L179 SmtUtils]: Spent 108.00 ms on a formula simplification that was a NOOP. DAG size: 10 [2018-10-27 00:19:34,054 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 19 proven. 3 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-10-27 00:19:34,070 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-10-27 00:19:34,070 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9] total 15 [2018-10-27 00:19:34,071 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-10-27 00:19:34,071 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-10-27 00:19:34,071 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2018-10-27 00:19:34,072 INFO L87 Difference]: Start difference. First operand 4398 states and 5117 transitions. Second operand 15 states. [2018-10-27 00:19:36,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:19:36,590 INFO L93 Difference]: Finished difference Result 10852 states and 12711 transitions. [2018-10-27 00:19:36,591 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-10-27 00:19:36,591 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 261 [2018-10-27 00:19:36,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:19:36,603 INFO L225 Difference]: With dead ends: 10852 [2018-10-27 00:19:36,603 INFO L226 Difference]: Without dead ends: 6850 [2018-10-27 00:19:36,609 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1064 GetRequests, 1029 SyntacticMatches, 9 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 92 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=155, Invalid=601, Unknown=0, NotChecked=0, Total=756 [2018-10-27 00:19:36,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6850 states. [2018-10-27 00:19:37,125 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6850 to 6048. [2018-10-27 00:19:37,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6048 states. [2018-10-27 00:19:37,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6048 states to 6048 states and 7094 transitions. [2018-10-27 00:19:37,134 INFO L78 Accepts]: Start accepts. Automaton has 6048 states and 7094 transitions. Word has length 261 [2018-10-27 00:19:37,134 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:19:37,134 INFO L481 AbstractCegarLoop]: Abstraction has 6048 states and 7094 transitions. [2018-10-27 00:19:37,134 INFO L482 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-10-27 00:19:37,134 INFO L276 IsEmpty]: Start isEmpty. Operand 6048 states and 7094 transitions. [2018-10-27 00:19:37,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 262 [2018-10-27 00:19:37,139 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:19:37,139 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:19:37,139 INFO L424 AbstractCegarLoop]: === Iteration 37 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:19:37,140 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:19:37,140 INFO L82 PathProgramCache]: Analyzing trace with hash 1850205240, now seen corresponding path program 1 times [2018-10-27 00:19:37,140 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:19:37,140 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:19:37,156 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:19:37,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 00:19:37,394 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 00:19:37,477 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 32 proven. 0 refuted. 0 times theorem prover too weak. 109 trivial. 0 not checked. [2018-10-27 00:19:37,477 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 00:19:37,479 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 00:19:37,479 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-27 00:19:37,480 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-27 00:19:37,480 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-27 00:19:37,480 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-10-27 00:19:37,480 INFO L87 Difference]: Start difference. First operand 6048 states and 7094 transitions. Second operand 7 states. [2018-10-27 00:19:38,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 00:19:38,336 INFO L93 Difference]: Finished difference Result 10149 states and 12059 transitions. [2018-10-27 00:19:38,337 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 00:19:38,337 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 261 [2018-10-27 00:19:38,337 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 00:19:38,345 INFO L225 Difference]: With dead ends: 10149 [2018-10-27 00:19:38,345 INFO L226 Difference]: Without dead ends: 4466 [2018-10-27 00:19:38,351 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 262 GetRequests, 255 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2018-10-27 00:19:38,355 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4466 states. [2018-10-27 00:19:38,643 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4466 to 4358. [2018-10-27 00:19:38,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4358 states. [2018-10-27 00:19:38,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4358 states to 4358 states and 5146 transitions. [2018-10-27 00:19:38,649 INFO L78 Accepts]: Start accepts. Automaton has 4358 states and 5146 transitions. Word has length 261 [2018-10-27 00:19:38,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 00:19:38,649 INFO L481 AbstractCegarLoop]: Abstraction has 4358 states and 5146 transitions. [2018-10-27 00:19:38,650 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-27 00:19:38,650 INFO L276 IsEmpty]: Start isEmpty. Operand 4358 states and 5146 transitions. [2018-10-27 00:19:38,654 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 263 [2018-10-27 00:19:38,654 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 00:19:38,654 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 00:19:38,654 INFO L424 AbstractCegarLoop]: === Iteration 38 === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-27 00:19:38,654 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 00:19:38,654 INFO L82 PathProgramCache]: Analyzing trace with hash 512566132, now seen corresponding path program 1 times [2018-10-27 00:19:38,655 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 00:19:38,655 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/cvc4nyu Starting monitored process 44 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 00:19:38,673 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 00:19:38,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-10-27 00:19:39,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-10-27 00:19:39,619 INFO L442 BasicCegarLoop]: Counterexample might be feasible [2018-10-27 00:19:39,873 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.10 12:19:39 BoogieIcfgContainer [2018-10-27 00:19:39,875 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-10-27 00:19:39,877 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-10-27 00:19:39,877 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-10-27 00:19:39,877 INFO L276 PluginConnector]: Witness Printer initialized [2018-10-27 00:19:39,877 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.10 12:18:26" (3/4) ... [2018-10-27 00:19:39,879 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-10-27 00:19:40,138 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_fca5e029-bbc2-4faa-ab9e-141224a54663/bin-2019/utaipan/witness.graphml [2018-10-27 00:19:40,138 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-10-27 00:19:40,139 INFO L168 Benchmark]: Toolchain (without parser) took 75356.16 ms. Allocated memory was 1.0 GB in the beginning and 2.6 GB in the end (delta: 1.6 GB). Free memory was 953.2 MB in the beginning and 1.7 GB in the end (delta: -733.2 MB). Peak memory consumption was 860.1 MB. Max. memory is 11.5 GB. [2018-10-27 00:19:40,140 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-10-27 00:19:40,140 INFO L168 Benchmark]: CACSL2BoogieTranslator took 436.01 ms. Allocated memory is still 1.0 GB. Free memory was 947.9 MB in the beginning and 931.8 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. [2018-10-27 00:19:40,140 INFO L168 Benchmark]: Boogie Procedure Inliner took 28.47 ms. Allocated memory is still 1.0 GB. Free memory was 931.8 MB in the beginning and 926.4 MB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2018-10-27 00:19:40,140 INFO L168 Benchmark]: Boogie Preprocessor took 58.29 ms. Allocated memory is still 1.0 GB. Free memory is still 926.4 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-10-27 00:19:40,141 INFO L168 Benchmark]: RCFGBuilder took 1271.48 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 119.0 MB). Free memory was 926.4 MB in the beginning and 1.0 GB in the end (delta: -112.3 MB). Peak memory consumption was 20.2 MB. Max. memory is 11.5 GB. [2018-10-27 00:19:40,141 INFO L168 Benchmark]: TraceAbstraction took 73295.09 ms. Allocated memory was 1.1 GB in the beginning and 2.6 GB in the end (delta: 1.5 GB). Free memory was 1.0 GB in the beginning and 1.8 GB in the end (delta: -715.7 MB). Peak memory consumption was 758.6 MB. Max. memory is 11.5 GB. [2018-10-27 00:19:40,141 INFO L168 Benchmark]: Witness Printer took 262.05 ms. Allocated memory is still 2.6 GB. Free memory was 1.8 GB in the beginning and 1.7 GB in the end (delta: 67.9 MB). Peak memory consumption was 67.9 MB. Max. memory is 11.5 GB. [2018-10-27 00:19:40,147 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 436.01 ms. Allocated memory is still 1.0 GB. Free memory was 947.9 MB in the beginning and 931.8 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 28.47 ms. Allocated memory is still 1.0 GB. Free memory was 931.8 MB in the beginning and 926.4 MB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 58.29 ms. Allocated memory is still 1.0 GB. Free memory is still 926.4 MB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 1271.48 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 119.0 MB). Free memory was 926.4 MB in the beginning and 1.0 GB in the end (delta: -112.3 MB). Peak memory consumption was 20.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 73295.09 ms. Allocated memory was 1.1 GB in the beginning and 2.6 GB in the end (delta: 1.5 GB). Free memory was 1.0 GB in the beginning and 1.8 GB in the end (delta: -715.7 MB). Peak memory consumption was 758.6 MB. Max. memory is 11.5 GB. * Witness Printer took 262.05 ms. Allocated memory is still 2.6 GB. Free memory was 1.8 GB in the beginning and 1.7 GB in the end (delta: 67.9 MB). Peak memory consumption was 67.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 653]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L96] _Bool side1Failed ; [L97] _Bool side2Failed ; [L102] static _Bool side1Failed_History_0 ; [L103] static _Bool side1Failed_History_1 ; [L104] static _Bool side1Failed_History_2 ; [L105] static _Bool side2Failed_History_0 ; [L106] static _Bool side2Failed_History_1 ; [L107] static _Bool side2Failed_History_2 ; [L69] msg_t nomsg = (msg_t )-1; [L70] port_t cs1 ; [L71] int8_t cs1_old ; [L72] int8_t cs1_new ; [L73] port_t cs2 ; [L74] int8_t cs2_old ; [L75] int8_t cs2_new ; [L76] port_t s1s2 ; [L77] int8_t s1s2_old ; [L78] int8_t s1s2_new ; [L79] port_t s1s1 ; [L80] int8_t s1s1_old ; [L81] int8_t s1s1_new ; [L82] port_t s2s1 ; [L83] int8_t s2s1_old ; [L84] int8_t s2s1_new ; [L85] port_t s2s2 ; [L86] int8_t s2s2_old ; [L87] int8_t s2s2_new ; [L88] port_t s1p ; [L89] int8_t s1p_old ; [L90] int8_t s1p_new ; [L91] port_t s2p ; [L92] int8_t s2p_old ; [L93] int8_t s2p_new ; [L98] msg_t side1_written ; [L99] msg_t side2_written ; [L108] static int8_t active_side_History_0 ; [L109] static int8_t active_side_History_1 ; [L110] static int8_t active_side_History_2 ; [L111] static msg_t manual_selection_History_0 ; [L112] static msg_t manual_selection_History_1 ; [L113] static msg_t manual_selection_History_2 ; [L455] void (*nodes[4])(void) = { & Console_task_each_pals_period, & Side1_activestandby_task_each_pals_period, & Side2_activestandby_task_each_pals_period, & Pendulum_prism_task_each_pals_period}; VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(nomsg)=0, \old(s1p)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L577] int c1 ; [L578] int i2 ; [L581] c1 = 0 [L582] side1Failed = __VERIFIER_nondet_bool() [L583] side2Failed = __VERIFIER_nondet_bool() [L584] side1_written = __VERIFIER_nondet_char() [L585] side2_written = __VERIFIER_nondet_char() [L586] side1Failed_History_0 = __VERIFIER_nondet_bool() [L587] side1Failed_History_1 = __VERIFIER_nondet_bool() [L588] side1Failed_History_2 = __VERIFIER_nondet_bool() [L589] side2Failed_History_0 = __VERIFIER_nondet_bool() [L590] side2Failed_History_1 = __VERIFIER_nondet_bool() [L591] side2Failed_History_2 = __VERIFIER_nondet_bool() [L592] active_side_History_0 = __VERIFIER_nondet_char() [L593] active_side_History_1 = __VERIFIER_nondet_char() [L594] active_side_History_2 = __VERIFIER_nondet_char() [L595] manual_selection_History_0 = __VERIFIER_nondet_char() [L596] manual_selection_History_1 = __VERIFIER_nondet_char() [L597] manual_selection_History_2 = __VERIFIER_nondet_char() [L598] CALL, EXPR init() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L239] COND FALSE !((int )side1Failed_History_0 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L242] COND FALSE !((int )side2Failed_History_0 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L245] COND FALSE !((int )active_side_History_0 != -2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L248] COND FALSE !((int )manual_selection_History_0 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L251] COND FALSE !((int )side1Failed_History_1 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L254] COND FALSE !((int )side2Failed_History_1 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L257] COND FALSE !((int )active_side_History_1 != -2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L260] COND FALSE !((int )manual_selection_History_1 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L263] COND FALSE !((int )side1Failed_History_2 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] COND FALSE !((int )side2Failed_History_2 != 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L269] COND FALSE !((int )active_side_History_2 != -2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L272] COND FALSE !((int )manual_selection_History_2 != 0) [L275] RET return (1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=1, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L598] EXPR init() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, init()=1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L598] i2 = init() [L600] cs1_old = nomsg [L601] cs1_new = nomsg [L602] cs2_old = nomsg [L603] cs2_new = nomsg [L604] s1s2_old = nomsg [L605] s1s2_new = nomsg [L606] s1s1_old = nomsg [L607] s1s1_new = nomsg [L608] s2s1_old = nomsg [L609] s2s1_new = nomsg [L610] s2s2_old = nomsg [L611] s2s2_new = nomsg [L612] s1p_old = nomsg [L613] s1p_new = nomsg [L614] s2p_old = nomsg [L615] s2p_new = nomsg [L616] i2 = 0 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, i2=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L617] COND TRUE 1 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, i2=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L619] CALL Console_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L293] msg_t manual_selection ; [L294] char tmp ; [L297] tmp = __VERIFIER_nondet_char() [L298] manual_selection = tmp VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L299] CALL write_manual_selection_history(manual_selection) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=1, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L209] manual_selection_History_2 = manual_selection_History_1 [L210] manual_selection_History_1 = manual_selection_History_0 [L211] RET manual_selection_History_0 = val VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=1, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, val=1] [L299] write_manual_selection_history(manual_selection) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, manual_selection=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L300] COND TRUE, EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, manual_selection=1, manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L300] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L301] COND TRUE, EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=255, cs2_old=255, manual_selection=1, manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L301] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L302] RET manual_selection = (msg_t )0 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L619] Console_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, i2=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L620] CALL Side1_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L308] int8_t side1 ; [L309] int8_t side2 ; [L310] msg_t manual_selection ; [L311] int8_t next_state ; [L314] side1 = nomsg [L315] side2 = nomsg [L316] manual_selection = (msg_t )0 [L317] side1Failed = __VERIFIER_nondet_bool() [L318] CALL write_side1_failed_history(side1Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=1, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L119] side1Failed_History_2 = side1Failed_History_1 [L120] side1Failed_History_1 = side1Failed_History_0 [L121] RET side1Failed_History_0 = val VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=1, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, val=1] [L318] write_side1_failed_history(side1Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L319] COND TRUE \read(side1Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L320] COND FALSE, EXPR !(nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new=-1, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L320] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L321] COND FALSE, EXPR !(nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new=-1, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L321] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L322] COND FALSE, EXPR !(nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new=-1, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L322] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L323] RET side1_written = nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=255, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=255, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L620] Side1_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, i2=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L621] CALL Side2_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L365] int8_t side1 ; [L366] int8_t side2 ; [L367] msg_t manual_selection ; [L368] int8_t next_state ; [L371] side1 = nomsg [L372] side2 = nomsg [L373] manual_selection = (msg_t )0 [L374] side2Failed = __VERIFIER_nondet_bool() [L375] CALL write_side2_failed_history(side2Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L149] side2Failed_History_2 = side2Failed_History_1 [L150] side2Failed_History_1 = side2Failed_History_0 [L151] RET side2Failed_History_0 = val VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, val=0] [L375] write_side2_failed_history(side2Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L376] COND FALSE !(\read(side2Failed)) [L383] side1 = s1s2_old [L384] s1s2_old = nomsg [L385] side2 = s2s2_old [L386] s2s2_old = nomsg [L387] manual_selection = cs2_old [L388] cs2_old = nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L389] COND TRUE (int )side1 == (int )side2 [L390] next_state = (int8_t )0 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, next_state=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L413] COND TRUE, EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, next_state=0, next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L413] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L414] COND TRUE, EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, next_state=0, next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L414] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L415] COND TRUE, EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, next_state=0, next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L415] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L416] RET side2_written = next_state VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=255, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=255, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, next_state=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L621] Side2_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, i2=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L622] CALL Pendulum_prism_task_each_pals_period() VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L422] int8_t active_side ; [L423] int8_t tmp ; [L424] int8_t side1 ; [L425] int8_t side2 ; VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L428] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L190] COND TRUE (int )index == 0 [L191] RET return (active_side_History_0); VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=-2, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, index=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L428] EXPR read_active_side_history((unsigned char)0) VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_active_side_history((unsigned char)0)=-2, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L428] tmp = read_active_side_history((unsigned char)0) [L429] active_side = tmp [L430] side1 = nomsg [L431] side2 = nomsg [L432] side1 = s1p_old [L433] s1p_old = nomsg [L434] side2 = s2p_old [L435] s2p_old = nomsg VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=254, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=254] [L436] COND FALSE !((int )side1 == 1) VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=254, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=254] [L439] COND FALSE !((int )side2 == 1) VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=254, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=254] [L442] COND FALSE !((int )side1 == 0) [L449] active_side = (int8_t )0 VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=254] [L451] CALL write_active_side_history(active_side) VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=254, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L179] active_side_History_2 = active_side_History_1 [L180] active_side_History_1 = active_side_History_0 [L181] RET active_side_History_0 = val VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, val=0] [L451] RET write_active_side_history(active_side) VAL [\old(active_side_History_0)=254, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=255, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=254] [L622] Pendulum_prism_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=1, cs1_old=255, cs2=0, cs2_new=1, cs2_old=255, i2=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=0, s2p_old=255, s2s1=0, s2s1_new=0, s2s1_old=255, s2s2=0, s2s2_new=0, s2s2_old=255, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L623] cs1_old = cs1_new [L624] cs1_new = nomsg [L625] cs2_old = cs2_new [L626] cs2_new = nomsg [L627] s1s2_old = s1s2_new [L628] s1s2_new = nomsg [L629] s1s1_old = s1s1_new [L630] s1s1_new = nomsg [L631] s2s1_old = s2s1_new [L632] s2s1_new = nomsg [L633] s2s2_old = s2s2_new [L634] s2s2_new = nomsg [L635] s1p_old = s1p_new [L636] s1p_new = nomsg [L637] s2p_old = s2p_new [L638] s2p_new = nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=0, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, i2=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L639] CALL, EXPR check() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L458] int tmp ; [L459] msg_t tmp___0 ; [L460] _Bool tmp___1 ; [L461] _Bool tmp___2 ; [L462] _Bool tmp___3 ; [L463] _Bool tmp___4 ; [L464] int8_t tmp___5 ; [L465] _Bool tmp___6 ; [L466] _Bool tmp___7 ; [L467] _Bool tmp___8 ; [L468] int8_t tmp___9 ; [L469] _Bool tmp___10 ; [L470] _Bool tmp___11 ; [L471] _Bool tmp___12 ; [L472] msg_t tmp___13 ; [L473] _Bool tmp___14 ; [L474] _Bool tmp___15 ; [L475] _Bool tmp___16 ; [L476] _Bool tmp___17 ; [L477] int8_t tmp___18 ; [L478] int8_t tmp___19 ; [L479] int8_t tmp___20 ; VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L482] COND FALSE !(! side1Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L485] COND TRUE ! side2Failed [L486] tmp = 1 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L491] CALL, EXPR read_manual_selection_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L220] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L223] COND TRUE (int )index == 1 [L224] RET return (manual_selection_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L491] EXPR read_manual_selection_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_manual_selection_history((unsigned char)1)=0, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L491] tmp___0 = read_manual_selection_history((unsigned char)1) [L492] COND TRUE ! tmp___0 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0] [L493] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] RET return (side1Failed_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L493] EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_side1_failed_history((unsigned char)1)=0, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0] [L493] tmp___1 = read_side1_failed_history((unsigned char)1) [L494] COND TRUE ! tmp___1 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0] [L495] CALL, EXPR read_side1_failed_history((unsigned char)0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND TRUE (int )index == 0 [L131] RET return (side1Failed_History_0); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=1, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L495] EXPR read_side1_failed_history((unsigned char)0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_side1_failed_history((unsigned char)0)=1, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0] [L495] tmp___2 = read_side1_failed_history((unsigned char)0) [L496] COND FALSE !(! tmp___2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___2=1] [L521] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] RET return (side1Failed_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L521] EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_side1_failed_history((unsigned char)1)=0, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___2=1] [L521] tmp___7 = read_side1_failed_history((unsigned char)1) [L522] COND FALSE !(\read(tmp___7)) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___2=1, tmp___7=0] [L537] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] RET return (side1Failed_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L537] EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_side1_failed_history((unsigned char)1)=0, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___2=1, tmp___7=0] [L537] tmp___11 = read_side1_failed_history((unsigned char)1) [L538] COND TRUE ! tmp___11 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___11=0, tmp___2=1, tmp___7=0] [L539] CALL, EXPR read_side2_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L160] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L163] COND TRUE (int )index == 1 [L164] RET return (side2Failed_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L539] EXPR read_side2_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_side2_failed_history((unsigned char)1)=0, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___11=0, tmp___2=1, tmp___7=0] [L539] tmp___12 = read_side2_failed_history((unsigned char)1) [L540] COND FALSE !(\read(tmp___12)) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___11=0, tmp___12=0, tmp___2=1, tmp___7=0] [L553] CALL, EXPR read_active_side_history((unsigned char)2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=2, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L190] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=2, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=2, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L193] COND FALSE !((int )index == 1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=2, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=2, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L196] COND TRUE (int )index == 2 [L197] RET return (active_side_History_2); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=2, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=-2, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, index=2, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L553] EXPR read_active_side_history((unsigned char)2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, read_active_side_history((unsigned char)2)=-2, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___11=0, tmp___12=0, tmp___2=1, tmp___7=0] [L553] tmp___20 = read_active_side_history((unsigned char)2) [L554] COND FALSE !((int )tmp___20 > -2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___11=0, tmp___12=0, tmp___2=1, tmp___20=254, tmp___7=0] [L572] RET return (1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=1, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=0, tmp___1=0, tmp___11=0, tmp___12=0, tmp___2=1, tmp___20=254, tmp___7=0] [L639] EXPR check() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=0, check()=1, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, i2=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L639] c1 = check() [L640] CALL assert(c1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(arg)=1, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L651] COND FALSE, RET !(! arg) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(arg)=1, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, arg=1, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L640] assert(c1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=1, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, i2=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L617] COND TRUE 1 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=1, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, i2=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L619] CALL Console_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L293] msg_t manual_selection ; [L294] char tmp ; [L297] tmp = __VERIFIER_nondet_char() [L298] manual_selection = tmp VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection=0, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L299] CALL write_manual_selection_history(manual_selection) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=1, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L209] manual_selection_History_2 = manual_selection_History_1 [L210] manual_selection_History_1 = manual_selection_History_0 [L211] RET manual_selection_History_0 = val VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, val=0] [L299] write_manual_selection_history(manual_selection) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L300] COND TRUE, EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection=0, manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L300] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L301] COND TRUE, EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=255, cs2_old=1, manual_selection=0, manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L301] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L302] RET manual_selection = (msg_t )0 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=255, \old(cs1_old)=0, \old(cs2_new)=255, \old(cs2_old)=0, \old(manual_selection_History_0)=1, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L619] Console_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=1, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, i2=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L620] CALL Side1_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L308] int8_t side1 ; [L309] int8_t side2 ; [L310] msg_t manual_selection ; [L311] int8_t next_state ; [L314] side1 = nomsg [L315] side2 = nomsg [L316] manual_selection = (msg_t )0 [L317] side1Failed = __VERIFIER_nondet_bool() [L318] CALL write_side1_failed_history(side1Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=0, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L119] side1Failed_History_2 = side1Failed_History_1 [L120] side1Failed_History_1 = side1Failed_History_0 [L121] RET side1Failed_History_0 = val VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=255, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, val=0] [L318] write_side1_failed_history(side1Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=1, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=0, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=255, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L319] COND FALSE !(\read(side1Failed)) [L326] side1 = s1s1_old [L327] s1s1_old = nomsg [L328] side2 = s2s1_old [L329] s2s1_old = nomsg [L330] manual_selection = cs1_old [L331] cs1_old = nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=255, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L332] COND FALSE !((int )side1 == (int )side2) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=255, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L335] COND TRUE (int )side1 == (int )nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=255, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L336] COND TRUE (int )side2 != (int )nomsg [L337] next_state = (int8_t )0 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, next_state=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=255, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L356] COND TRUE, EXPR next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, next_state=0, next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=255, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=255, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L356] s1s1_new = next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new [L357] COND TRUE, EXPR next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, next_state=0, next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=255, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=255, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L357] s1s2_new = next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new [L358] COND TRUE, EXPR next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, next_state=0, next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=255, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L358] s1p_new = next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new [L359] RET side1_written = next_state VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=1, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=255, \old(s1p_old)=0, \old(s1s1_new)=255, \old(s1s1_old)=255, \old(s1s2_new)=255, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=255, \old(side1Failed)=1, \old(side1Failed_History_0)=1, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, next_state=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L620] Side1_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=1, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, i2=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L621] CALL Side2_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L365] int8_t side1 ; [L366] int8_t side2 ; [L367] msg_t manual_selection ; [L368] int8_t next_state ; [L371] side1 = nomsg [L372] side2 = nomsg [L373] manual_selection = (msg_t )0 [L374] side2Failed = __VERIFIER_nondet_bool() [L375] CALL write_side2_failed_history(side2Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=1, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L149] side2Failed_History_2 = side2Failed_History_1 [L150] side2Failed_History_1 = side2Failed_History_0 [L151] RET side2Failed_History_0 = val VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=1, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, val=1] [L375] write_side2_failed_history(side2Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L376] COND TRUE \read(side2Failed) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L377] COND FALSE, EXPR !(nomsg != nomsg && s2s1_new == nomsg ? nomsg : s2s1_new) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, nomsg != nomsg && s2s1_new == nomsg ? nomsg : s2s1_new=-1, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L377] s2s1_new = nomsg != nomsg && s2s1_new == nomsg ? nomsg : s2s1_new [L378] COND FALSE, EXPR !(nomsg != nomsg && s2s2_new == nomsg ? nomsg : s2s2_new) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, nomsg != nomsg && s2s2_new == nomsg ? nomsg : s2s2_new=-1, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L378] s2s2_new = nomsg != nomsg && s2s2_new == nomsg ? nomsg : s2s2_new [L379] COND FALSE, EXPR !(nomsg != nomsg && s2p_new == nomsg ? nomsg : s2p_new) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, nomsg != nomsg && s2p_new == nomsg ? nomsg : s2p_new=-1, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=255, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L379] s2p_new = nomsg != nomsg && s2p_new == nomsg ? nomsg : s2p_new [L380] RET side2_written = nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=255, \old(s2p_new)=255, \old(s2p_old)=0, \old(s2s1_new)=255, \old(s2s1_old)=0, \old(s2s2_new)=255, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=255, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L621] Side2_activestandby_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, c1=1, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, i2=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L622] CALL Pendulum_prism_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L422] int8_t active_side ; [L423] int8_t tmp ; [L424] int8_t side1 ; [L425] int8_t side2 ; VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L428] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L190] COND TRUE (int )index == 0 [L191] RET return (active_side_History_0); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, index=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L428] EXPR read_active_side_history((unsigned char)0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, read_active_side_history((unsigned char)0)=0, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=0, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L428] tmp = read_active_side_history((unsigned char)0) [L429] active_side = tmp [L430] side1 = nomsg [L431] side2 = nomsg [L432] side1 = s1p_old [L433] s1p_old = nomsg [L434] side2 = s2p_old [L435] s2p_old = nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L436] COND FALSE !((int )side1 == 1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L439] COND FALSE !((int )side2 == 1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L442] COND FALSE !((int )side1 == 0) [L449] active_side = (int8_t )0 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L451] CALL write_active_side_history(active_side) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=0, active_side_History_1=254, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L179] active_side_History_2 = active_side_History_1 [L180] active_side_History_1 = active_side_History_0 [L181] RET active_side_History_0 = val VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \old(val)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, val=0] [L451] RET write_active_side_history(active_side) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=254, \old(active_side_History_2)=254, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=255, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, tmp=0] [L622] Pendulum_prism_task_each_pals_period() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, c1=1, cs1=0, cs1_new=0, cs1_old=255, cs2=0, cs2_new=0, cs2_old=1, i2=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=0, s1p_old=255, s1s1=0, s1s1_new=0, s1s1_old=255, s1s2=0, s1s2_new=0, s1s2_old=255, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L623] cs1_old = cs1_new [L624] cs1_new = nomsg [L625] cs2_old = cs2_new [L626] cs2_new = nomsg [L627] s1s2_old = s1s2_new [L628] s1s2_new = nomsg [L629] s1s1_old = s1s1_new [L630] s1s1_new = nomsg [L631] s2s1_old = s2s1_new [L632] s2s1_new = nomsg [L633] s2s2_old = s2s2_new [L634] s2s2_new = nomsg [L635] s1p_old = s1p_new [L636] s1p_new = nomsg [L637] s2p_old = s2p_new [L638] s2p_new = nomsg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, c1=1, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, i2=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L639] CALL, EXPR check() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L458] int tmp ; [L459] msg_t tmp___0 ; [L460] _Bool tmp___1 ; [L461] _Bool tmp___2 ; [L462] _Bool tmp___3 ; [L463] _Bool tmp___4 ; [L464] int8_t tmp___5 ; [L465] _Bool tmp___6 ; [L466] _Bool tmp___7 ; [L467] _Bool tmp___8 ; [L468] int8_t tmp___9 ; [L469] _Bool tmp___10 ; [L470] _Bool tmp___11 ; [L471] _Bool tmp___12 ; [L472] msg_t tmp___13 ; [L473] _Bool tmp___14 ; [L474] _Bool tmp___15 ; [L475] _Bool tmp___16 ; [L476] _Bool tmp___17 ; [L477] int8_t tmp___18 ; [L478] int8_t tmp___19 ; [L479] int8_t tmp___20 ; VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L482] COND TRUE ! side1Failed [L483] tmp = 1 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L491] CALL, EXPR read_manual_selection_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L220] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, index=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L223] COND TRUE (int )index == 1 [L224] RET return (manual_selection_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, index=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L491] EXPR read_manual_selection_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, read_manual_selection_history((unsigned char)1)=1, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1] [L491] tmp___0 = read_manual_selection_history((unsigned char)1) [L492] COND FALSE !(! tmp___0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1] [L521] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, index=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] RET return (side1Failed_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, index=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L521] EXPR read_side1_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, read_side1_failed_history((unsigned char)1)=1, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1] [L521] tmp___7 = read_side1_failed_history((unsigned char)1) [L522] COND TRUE \read(tmp___7) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1, tmp___7=1] [L523] CALL, EXPR read_side2_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L160] COND FALSE !((int )index == 0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, index=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L163] COND TRUE (int )index == 1 [L164] RET return (side2Failed_History_1); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=1, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, index=1, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L523] EXPR read_side2_failed_history((unsigned char)1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, read_side2_failed_history((unsigned char)1)=0, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1, tmp___7=1] [L523] tmp___8 = read_side2_failed_history((unsigned char)1) [L524] COND TRUE ! tmp___8 VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1, tmp___7=1, tmp___8=0] [L525] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L190] COND TRUE (int )index == 0 [L191] RET return (active_side_History_0); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(index)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, index=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L525] EXPR read_active_side_history((unsigned char)0) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, read_active_side_history((unsigned char)0)=0, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1, tmp___7=1, tmp___8=0] [L525] tmp___5 = read_active_side_history((unsigned char)0) [L526] COND TRUE ! ((int )tmp___5 == 2) [L527] RET return (0); VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, \result=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, tmp=1, tmp___0=1, tmp___5=0, tmp___7=1, tmp___8=0] [L639] EXPR check() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, c1=1, check()=0, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, i2=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L639] c1 = check() [L640] CALL assert(c1) VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(arg)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L651] COND TRUE ! arg VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(arg)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, arg=0, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L653] __VERIFIER_error() VAL [\old(active_side_History_0)=0, \old(active_side_History_1)=0, \old(active_side_History_2)=0, \old(arg)=0, \old(cs1_new)=0, \old(cs1_old)=0, \old(cs2_new)=0, \old(cs2_old)=0, \old(manual_selection_History_0)=0, \old(manual_selection_History_1)=0, \old(manual_selection_History_2)=0, \old(s1p_new)=0, \old(s1p_old)=0, \old(s1s1_new)=0, \old(s1s1_old)=0, \old(s1s2_new)=0, \old(s1s2_old)=0, \old(s2p_new)=0, \old(s2p_old)=0, \old(s2s1_new)=0, \old(s2s1_old)=0, \old(s2s2_new)=0, \old(s2s2_old)=0, \old(side1_written)=0, \old(side1Failed)=0, \old(side1Failed_History_0)=0, \old(side1Failed_History_1)=0, \old(side1Failed_History_2)=0, \old(side2_written)=0, \old(side2Failed)=0, \old(side2Failed_History_0)=0, \old(side2Failed_History_1)=0, \old(side2Failed_History_2)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=254, arg=0, cs1=0, cs1_new=255, cs1_old=0, cs2=0, cs2_new=255, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=1, manual_selection_History_2=0, nomsg=255, s1p=0, s1p_new=255, s1p_old=0, s1s1=0, s1s1_new=255, s1s1_old=0, s1s2=0, s1s2_new=255, s1s2_old=0, s2p=0, s2p_new=255, s2p_old=255, s2s1=0, s2s1_new=255, s2s1_old=255, s2s2=0, s2s2_new=255, s2s2_old=255, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=255, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 19 procedures, 235 locations, 1 error locations. UNSAFE Result, 73.2s OverallTime, 38 OverallIterations, 6 TraceHistogramMax, 49.5s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 12756 SDtfs, 18945 SDslu, 21183 SDs, 0 SdLazy, 34344 SolverSat, 6232 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 35.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 9146 GetRequests, 8640 SyntacticMatches, 57 SemanticMatches, 449 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3577 ImplicationChecksByTransitivity, 11.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=6048occurred in iteration=36, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 5.2s AutomataMinimizationTime, 37 MinimizatonAttempts, 6559 StatesRemovedByMinimization, 31 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 1.6s SsaConstructionTime, 4.1s SatisfiabilityAnalysisTime, 10.1s InterpolantComputationTime, 6893 NumberOfCodeBlocks, 6893 NumberOfCodeBlocksAsserted, 43 NumberOfCheckSat, 8799 ConstructedInterpolants, 0 QuantifiedInterpolants, 4899827 SizeOfPredicates, 97 NumberOfNonLiveVariables, 24911 ConjunctsInSsa, 311 ConjunctsInUnsatCore, 51 InterpolantComputations, 33 PerfectInterpolantSequences, 2664/3064 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...