./Ultimate.py --spec ../../sv-benchmarks/c/ReachSafety.prp --file ../../sv-benchmarks/c/reducercommutativity/rangesum40_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 1dbac8bc Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/reducercommutativity/rangesum40_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 3bc22eacddab290eba000ecad4885815ce9878ac ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Result: UNKNOWN --- Real Ultimate output --- This is Ultimate 0.1.23-1dbac8b [2018-10-26 20:01:24,231 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-10-26 20:01:24,233 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-10-26 20:01:24,244 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-10-26 20:01:24,244 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-10-26 20:01:24,245 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-10-26 20:01:24,246 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-10-26 20:01:24,250 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-10-26 20:01:24,251 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-10-26 20:01:24,252 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-10-26 20:01:24,252 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-10-26 20:01:24,252 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-10-26 20:01:24,253 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-10-26 20:01:24,254 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-10-26 20:01:24,254 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-10-26 20:01:24,255 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-10-26 20:01:24,257 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-10-26 20:01:24,258 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-10-26 20:01:24,259 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-10-26 20:01:24,261 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-10-26 20:01:24,261 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-10-26 20:01:24,262 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-10-26 20:01:24,265 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-10-26 20:01:24,265 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-10-26 20:01:24,265 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-10-26 20:01:24,266 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-10-26 20:01:24,267 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-10-26 20:01:24,268 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-10-26 20:01:24,269 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-10-26 20:01:24,270 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-10-26 20:01:24,270 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-10-26 20:01:24,270 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-10-26 20:01:24,271 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-10-26 20:01:24,271 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-10-26 20:01:24,272 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-10-26 20:01:24,273 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-10-26 20:01:24,273 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2018-10-26 20:01:24,284 INFO L110 SettingsManager]: Loading preferences was successful [2018-10-26 20:01:24,285 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-10-26 20:01:24,285 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-10-26 20:01:24,285 INFO L133 SettingsManager]: * User list type=DISABLED [2018-10-26 20:01:24,286 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-10-26 20:01:24,286 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-10-26 20:01:24,286 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-10-26 20:01:24,286 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-10-26 20:01:24,286 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-10-26 20:01:24,286 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-10-26 20:01:24,286 INFO L133 SettingsManager]: * Interval Domain=false [2018-10-26 20:01:24,287 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-10-26 20:01:24,287 INFO L133 SettingsManager]: * sizeof long=4 [2018-10-26 20:01:24,287 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-10-26 20:01:24,287 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-10-26 20:01:24,289 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-10-26 20:01:24,289 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-10-26 20:01:24,289 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-10-26 20:01:24,289 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-10-26 20:01:24,289 INFO L133 SettingsManager]: * sizeof long double=12 [2018-10-26 20:01:24,289 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-10-26 20:01:24,290 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-10-26 20:01:24,290 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-10-26 20:01:24,290 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-10-26 20:01:24,290 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-10-26 20:01:24,290 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-10-26 20:01:24,290 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-26 20:01:24,290 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-10-26 20:01:24,290 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-10-26 20:01:24,291 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-10-26 20:01:24,291 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-10-26 20:01:24,291 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-10-26 20:01:24,291 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-10-26 20:01:24,291 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-10-26 20:01:24,291 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 3bc22eacddab290eba000ecad4885815ce9878ac [2018-10-26 20:01:24,327 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-10-26 20:01:24,347 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-10-26 20:01:24,349 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-10-26 20:01:24,351 INFO L271 PluginConnector]: Initializing CDTParser... [2018-10-26 20:01:24,351 INFO L276 PluginConnector]: CDTParser initialized [2018-10-26 20:01:24,353 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/../../sv-benchmarks/c/reducercommutativity/rangesum40_false-unreach-call.i [2018-10-26 20:01:24,413 INFO L218 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/data/7b1f4c9c3/903fca701aff4e8b94ba4b145ca76d84/FLAG9ca6febc6 [2018-10-26 20:01:24,774 INFO L298 CDTParser]: Found 1 translation units. [2018-10-26 20:01:24,775 INFO L158 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/sv-benchmarks/c/reducercommutativity/rangesum40_false-unreach-call.i [2018-10-26 20:01:24,781 INFO L346 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/data/7b1f4c9c3/903fca701aff4e8b94ba4b145ca76d84/FLAG9ca6febc6 [2018-10-26 20:01:24,792 INFO L354 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/data/7b1f4c9c3/903fca701aff4e8b94ba4b145ca76d84 [2018-10-26 20:01:24,797 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-10-26 20:01:24,798 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-10-26 20:01:24,800 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-10-26 20:01:24,800 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-10-26 20:01:24,803 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-10-26 20:01:24,804 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.10 08:01:24" (1/1) ... [2018-10-26 20:01:24,807 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@d245ed3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 08:01:24, skipping insertion in model container [2018-10-26 20:01:24,807 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.10 08:01:24" (1/1) ... [2018-10-26 20:01:24,816 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-10-26 20:01:24,834 INFO L174 MainTranslator]: Built tables and reachable declarations [2018-10-26 20:01:24,968 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-26 20:01:24,976 INFO L189 MainTranslator]: Completed pre-run [2018-10-26 20:01:24,997 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-26 20:01:25,011 INFO L193 MainTranslator]: Completed translation [2018-10-26 20:01:25,011 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 08:01:25 WrapperNode [2018-10-26 20:01:25,012 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-10-26 20:01:25,013 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-10-26 20:01:25,013 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-10-26 20:01:25,013 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-10-26 20:01:25,021 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 08:01:25" (1/1) ... [2018-10-26 20:01:25,029 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 08:01:25" (1/1) ... [2018-10-26 20:01:25,048 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-10-26 20:01:25,048 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-10-26 20:01:25,049 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-10-26 20:01:25,049 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-10-26 20:01:25,056 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 08:01:25" (1/1) ... [2018-10-26 20:01:25,056 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 08:01:25" (1/1) ... [2018-10-26 20:01:25,058 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 08:01:25" (1/1) ... [2018-10-26 20:01:25,059 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 08:01:25" (1/1) ... [2018-10-26 20:01:25,064 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 08:01:25" (1/1) ... [2018-10-26 20:01:25,070 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 08:01:25" (1/1) ... [2018-10-26 20:01:25,071 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 08:01:25" (1/1) ... [2018-10-26 20:01:25,074 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-10-26 20:01:25,074 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-10-26 20:01:25,074 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-10-26 20:01:25,074 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-10-26 20:01:25,075 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 08:01:25" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-26 20:01:25,185 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-10-26 20:01:25,186 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-10-26 20:01:25,186 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-10-26 20:01:25,186 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-10-26 20:01:25,186 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-10-26 20:01:25,186 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-10-26 20:01:25,186 INFO L130 BoogieDeclarations]: Found specification of procedure rangesum [2018-10-26 20:01:25,186 INFO L138 BoogieDeclarations]: Found implementation of procedure rangesum [2018-10-26 20:01:25,187 INFO L130 BoogieDeclarations]: Found specification of procedure init_nondet [2018-10-26 20:01:25,187 INFO L138 BoogieDeclarations]: Found implementation of procedure init_nondet [2018-10-26 20:01:25,638 INFO L341 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-10-26 20:01:25,639 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.10 08:01:25 BoogieIcfgContainer [2018-10-26 20:01:25,639 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-10-26 20:01:25,640 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-10-26 20:01:25,640 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-10-26 20:01:25,643 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-10-26 20:01:25,643 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 26.10 08:01:24" (1/3) ... [2018-10-26 20:01:25,644 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@22cbb23a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 26.10 08:01:25, skipping insertion in model container [2018-10-26 20:01:25,644 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.10 08:01:25" (2/3) ... [2018-10-26 20:01:25,644 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@22cbb23a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 26.10 08:01:25, skipping insertion in model container [2018-10-26 20:01:25,645 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.10 08:01:25" (3/3) ... [2018-10-26 20:01:25,646 INFO L112 eAbstractionObserver]: Analyzing ICFG rangesum40_false-unreach-call.i [2018-10-26 20:01:25,653 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-10-26 20:01:25,659 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-10-26 20:01:25,672 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-10-26 20:01:25,700 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-10-26 20:01:25,700 INFO L383 AbstractCegarLoop]: Hoare is true [2018-10-26 20:01:25,700 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-10-26 20:01:25,701 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-10-26 20:01:25,701 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-10-26 20:01:25,701 INFO L387 AbstractCegarLoop]: Difference is false [2018-10-26 20:01:25,701 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-10-26 20:01:25,701 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-10-26 20:01:25,716 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states. [2018-10-26 20:01:25,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-10-26 20:01:25,721 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 20:01:25,722 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 20:01:25,724 INFO L424 AbstractCegarLoop]: === Iteration 1 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 20:01:25,728 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 20:01:25,729 INFO L82 PathProgramCache]: Analyzing trace with hash -1049289672, now seen corresponding path program 1 times [2018-10-26 20:01:25,730 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 20:01:25,761 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:25,762 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 20:01:25,762 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:25,762 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 20:01:25,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 20:01:25,834 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unsupported non-linear arithmetic [2018-10-26 20:01:25,834 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-26 20:01:25,834 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-26 20:01:25,835 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 38 with the following transitions: [2018-10-26 20:01:25,837 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [24], [26], [28], [31], [32], [39], [57], [61], [63], [64], [77], [79], [80], [81], [82], [84], [85], [86], [87], [88], [89], [90], [91] [2018-10-26 20:01:25,886 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-10-26 20:01:25,887 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-10-26 20:01:26,031 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-10-26 20:01:26,033 INFO L272 AbstractInterpreter]: Visited 9 different actions 9 times. Never merged. Never widened. Never found a fixpoint. Largest state had 37 variables. [2018-10-26 20:01:26,077 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 20:01:26,077 INFO L398 sIntCurrentIteration]: Generating AbsInt predicates [2018-10-26 20:01:26,162 INFO L227 lantSequenceWeakener]: Weakened 8 states. On average, predicates are now at 93.06% of their original sizes. [2018-10-26 20:01:26,162 INFO L413 sIntCurrentIteration]: Unifying AI predicates [2018-10-26 20:01:26,257 INFO L415 sIntCurrentIteration]: We unified 36 AI predicates to 36 [2018-10-26 20:01:26,258 INFO L424 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-10-26 20:01:26,259 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 20:01:26,259 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-26 20:01:26,259 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 20:01:26,265 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-26 20:01:26,268 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-26 20:01:26,268 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-26 20:01:26,271 INFO L87 Difference]: Start difference. First operand 40 states. Second operand 4 states. [2018-10-26 20:01:26,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 20:01:26,617 INFO L93 Difference]: Finished difference Result 69 states and 90 transitions. [2018-10-26 20:01:26,617 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-26 20:01:26,618 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 37 [2018-10-26 20:01:26,619 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 20:01:26,629 INFO L225 Difference]: With dead ends: 69 [2018-10-26 20:01:26,629 INFO L226 Difference]: Without dead ends: 35 [2018-10-26 20:01:26,633 INFO L605 BasicCegarLoop]: 2 DeclaredPredicates, 36 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-26 20:01:26,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-10-26 20:01:26,675 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 35. [2018-10-26 20:01:26,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-10-26 20:01:26,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 41 transitions. [2018-10-26 20:01:26,682 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 41 transitions. Word has length 37 [2018-10-26 20:01:26,683 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 20:01:26,683 INFO L481 AbstractCegarLoop]: Abstraction has 35 states and 41 transitions. [2018-10-26 20:01:26,683 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-26 20:01:26,683 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 41 transitions. [2018-10-26 20:01:26,685 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-10-26 20:01:26,685 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 20:01:26,685 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 20:01:26,686 INFO L424 AbstractCegarLoop]: === Iteration 2 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 20:01:26,686 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 20:01:26,686 INFO L82 PathProgramCache]: Analyzing trace with hash 1338067039, now seen corresponding path program 1 times [2018-10-26 20:01:26,686 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 20:01:26,687 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:26,687 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 20:01:26,691 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:26,692 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 20:01:26,710 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-10-26 20:01:26,711 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-10-26 20:01:26,711 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-10-26 20:01:26,724 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 20:01:26,724 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) [2018-10-26 20:01:26,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 20:01:26,786 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 43 with the following transitions: [2018-10-26 20:01:26,786 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [15], [18], [26], [28], [31], [32], [39], [43], [46], [61], [63], [64], [68], [71], [79], [80], [81], [82], [84], [85], [86], [87], [88], [89], [90], [91] [2018-10-26 20:01:26,787 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-10-26 20:01:26,788 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-10-26 20:01:26,808 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-10-26 20:01:26,808 INFO L272 AbstractInterpreter]: Visited 10 different actions 10 times. Never merged. Never widened. Never found a fixpoint. Largest state had 37 variables. [2018-10-26 20:01:26,846 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 20:01:26,846 INFO L398 sIntCurrentIteration]: Generating AbsInt predicates [2018-10-26 20:01:26,882 INFO L227 lantSequenceWeakener]: Weakened 9 states. On average, predicates are now at 91.36% of their original sizes. [2018-10-26 20:01:26,882 INFO L413 sIntCurrentIteration]: Unifying AI predicates [2018-10-26 20:01:26,946 INFO L415 sIntCurrentIteration]: We unified 41 AI predicates to 41 [2018-10-26 20:01:26,947 INFO L424 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-10-26 20:01:26,947 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 20:01:26,947 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-26 20:01:26,947 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 20:01:26,948 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-26 20:01:26,949 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-26 20:01:26,949 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-26 20:01:26,949 INFO L87 Difference]: Start difference. First operand 35 states and 41 transitions. Second operand 5 states. [2018-10-26 20:01:27,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 20:01:27,413 INFO L93 Difference]: Finished difference Result 62 states and 74 transitions. [2018-10-26 20:01:27,413 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-26 20:01:27,413 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2018-10-26 20:01:27,414 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 20:01:27,414 INFO L225 Difference]: With dead ends: 62 [2018-10-26 20:01:27,414 INFO L226 Difference]: Without dead ends: 38 [2018-10-26 20:01:27,415 INFO L605 BasicCegarLoop]: 2 DeclaredPredicates, 42 GetRequests, 38 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-10-26 20:01:27,416 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2018-10-26 20:01:27,422 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 37. [2018-10-26 20:01:27,422 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-10-26 20:01:27,423 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 43 transitions. [2018-10-26 20:01:27,423 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 43 transitions. Word has length 42 [2018-10-26 20:01:27,423 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 20:01:27,424 INFO L481 AbstractCegarLoop]: Abstraction has 37 states and 43 transitions. [2018-10-26 20:01:27,424 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-26 20:01:27,424 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 43 transitions. [2018-10-26 20:01:27,425 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-10-26 20:01:27,425 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 20:01:27,425 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 20:01:27,425 INFO L424 AbstractCegarLoop]: === Iteration 3 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 20:01:27,425 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 20:01:27,426 INFO L82 PathProgramCache]: Analyzing trace with hash -1866850875, now seen corresponding path program 1 times [2018-10-26 20:01:27,426 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 20:01:27,427 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:27,427 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 20:01:27,427 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:27,427 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 20:01:27,443 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-10-26 20:01:27,444 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-10-26 20:01:27,444 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-10-26 20:01:27,457 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 20:01:27,457 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) [2018-10-26 20:01:27,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 20:01:27,510 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 46 with the following transitions: [2018-10-26 20:01:27,510 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [15], [18], [26], [28], [31], [32], [39], [43], [46], [61], [63], [64], [68], [71], [73], [75], [79], [80], [81], [82], [84], [85], [86], [87], [88], [89], [90], [91] [2018-10-26 20:01:27,512 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-10-26 20:01:27,513 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-10-26 20:01:27,744 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-10-26 20:01:27,745 INFO L272 AbstractInterpreter]: Visited 19 different actions 54 times. Merged at 3 different actions 26 times. Widened at 1 different actions 5 times. Found 1 fixpoints after 1 different actions. Largest state had 37 variables. [2018-10-26 20:01:27,761 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 20:01:27,761 INFO L398 sIntCurrentIteration]: Generating AbsInt predicates [2018-10-26 20:01:27,824 INFO L227 lantSequenceWeakener]: Weakened 19 states. On average, predicates are now at 85.03% of their original sizes. [2018-10-26 20:01:27,825 INFO L413 sIntCurrentIteration]: Unifying AI predicates [2018-10-26 20:01:28,243 INFO L415 sIntCurrentIteration]: We unified 44 AI predicates to 44 [2018-10-26 20:01:28,243 INFO L424 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-10-26 20:01:28,243 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 20:01:28,243 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-26 20:01:28,243 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 20:01:28,244 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-26 20:01:28,244 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-26 20:01:28,244 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-10-26 20:01:28,245 INFO L87 Difference]: Start difference. First operand 37 states and 43 transitions. Second operand 9 states. [2018-10-26 20:01:28,989 WARN L79 EvaluatorLogger]: Possible loss of precision. Operator ARITHMOD has no precise implementation. [2018-10-26 20:01:29,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 20:01:29,647 INFO L93 Difference]: Finished difference Result 61 states and 76 transitions. [2018-10-26 20:01:29,647 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-26 20:01:29,647 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 45 [2018-10-26 20:01:29,647 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 20:01:29,648 INFO L225 Difference]: With dead ends: 61 [2018-10-26 20:01:29,648 INFO L226 Difference]: Without dead ends: 41 [2018-10-26 20:01:29,649 INFO L605 BasicCegarLoop]: 2 DeclaredPredicates, 48 GetRequests, 38 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=33, Invalid=99, Unknown=0, NotChecked=0, Total=132 [2018-10-26 20:01:29,649 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-10-26 20:01:29,655 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 40. [2018-10-26 20:01:29,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-10-26 20:01:29,656 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 46 transitions. [2018-10-26 20:01:29,656 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 46 transitions. Word has length 45 [2018-10-26 20:01:29,656 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 20:01:29,657 INFO L481 AbstractCegarLoop]: Abstraction has 40 states and 46 transitions. [2018-10-26 20:01:29,657 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-26 20:01:29,657 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 46 transitions. [2018-10-26 20:01:29,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-10-26 20:01:29,658 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 20:01:29,658 INFO L375 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 20:01:29,658 INFO L424 AbstractCegarLoop]: === Iteration 4 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 20:01:29,658 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 20:01:29,658 INFO L82 PathProgramCache]: Analyzing trace with hash -1254084674, now seen corresponding path program 1 times [2018-10-26 20:01:29,659 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 20:01:29,659 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:29,661 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 20:01:29,661 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:29,661 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 20:01:29,675 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-10-26 20:01:29,676 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-10-26 20:01:29,676 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-10-26 20:01:29,693 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 20:01:29,693 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) [2018-10-26 20:01:29,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 20:01:29,756 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 58 with the following transitions: [2018-10-26 20:01:29,757 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [15], [18], [26], [28], [31], [32], [39], [43], [46], [48], [53], [55], [61], [63], [64], [68], [71], [73], [75], [79], [80], [81], [82], [84], [85], [86], [87], [88], [89], [90], [91] [2018-10-26 20:01:29,758 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-10-26 20:01:29,759 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-10-26 20:01:29,922 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-10-26 20:01:29,923 INFO L272 AbstractInterpreter]: Visited 22 different actions 105 times. Merged at 7 different actions 64 times. Widened at 2 different actions 11 times. Found 2 fixpoints after 2 different actions. Largest state had 37 variables. [2018-10-26 20:01:29,960 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 20:01:29,961 INFO L398 sIntCurrentIteration]: Generating AbsInt predicates [2018-10-26 20:01:30,008 INFO L227 lantSequenceWeakener]: Weakened 23 states. On average, predicates are now at 82.89% of their original sizes. [2018-10-26 20:01:30,008 INFO L413 sIntCurrentIteration]: Unifying AI predicates [2018-10-26 20:01:30,337 INFO L415 sIntCurrentIteration]: We unified 56 AI predicates to 56 [2018-10-26 20:01:30,337 INFO L424 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-10-26 20:01:30,337 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 20:01:30,337 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-10-26 20:01:30,337 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 20:01:30,338 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-10-26 20:01:30,338 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-10-26 20:01:30,338 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-10-26 20:01:30,338 INFO L87 Difference]: Start difference. First operand 40 states and 46 transitions. Second operand 10 states. [2018-10-26 20:01:30,764 WARN L79 EvaluatorLogger]: Possible loss of precision. Operator ARITHMOD has no precise implementation. [2018-10-26 20:01:31,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 20:01:31,301 INFO L93 Difference]: Finished difference Result 67 states and 82 transitions. [2018-10-26 20:01:31,301 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-26 20:01:31,301 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 57 [2018-10-26 20:01:31,302 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 20:01:31,302 INFO L225 Difference]: With dead ends: 67 [2018-10-26 20:01:31,302 INFO L226 Difference]: Without dead ends: 44 [2018-10-26 20:01:31,303 INFO L605 BasicCegarLoop]: 2 DeclaredPredicates, 61 GetRequests, 49 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=42, Invalid=140, Unknown=0, NotChecked=0, Total=182 [2018-10-26 20:01:31,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-10-26 20:01:31,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-10-26 20:01:31,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-10-26 20:01:31,310 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 51 transitions. [2018-10-26 20:01:31,310 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 51 transitions. Word has length 57 [2018-10-26 20:01:31,311 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 20:01:31,311 INFO L481 AbstractCegarLoop]: Abstraction has 44 states and 51 transitions. [2018-10-26 20:01:31,311 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-10-26 20:01:31,311 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 51 transitions. [2018-10-26 20:01:31,312 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-10-26 20:01:31,312 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 20:01:31,313 INFO L375 BasicCegarLoop]: trace histogram [9, 6, 6, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 20:01:31,313 INFO L424 AbstractCegarLoop]: === Iteration 5 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 20:01:31,313 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 20:01:31,313 INFO L82 PathProgramCache]: Analyzing trace with hash -1360907787, now seen corresponding path program 1 times [2018-10-26 20:01:31,313 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 20:01:31,314 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:31,314 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 20:01:31,314 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:31,315 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 20:01:31,333 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-10-26 20:01:31,334 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-10-26 20:01:31,334 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-10-26 20:01:31,346 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 20:01:31,346 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) [2018-10-26 20:01:31,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 20:01:31,395 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 70 with the following transitions: [2018-10-26 20:01:31,395 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [15], [18], [26], [28], [31], [32], [39], [43], [46], [48], [51], [53], [55], [61], [63], [64], [68], [71], [73], [75], [79], [80], [81], [82], [84], [85], [86], [87], [88], [89], [90], [91] [2018-10-26 20:01:31,397 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-10-26 20:01:31,397 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-10-26 20:01:31,593 WARN L79 EvaluatorLogger]: Possible loss of precision. Operator ARITHMOD has no precise implementation. [2018-10-26 20:01:32,362 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2018-10-26 20:01:32,363 INFO L272 AbstractInterpreter]: Visited 32 different actions 352 times. Merged at 11 different actions 231 times. Widened at 2 different actions 34 times. Found 37 fixpoints after 6 different actions. Largest state had 37 variables. [2018-10-26 20:01:32,402 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 20:01:32,402 INFO L398 sIntCurrentIteration]: Generating AbsInt predicates [2018-10-26 20:01:32,527 INFO L227 lantSequenceWeakener]: Weakened 49 states. On average, predicates are now at 77.76% of their original sizes. [2018-10-26 20:01:32,528 INFO L413 sIntCurrentIteration]: Unifying AI predicates [2018-10-26 20:01:33,039 INFO L415 sIntCurrentIteration]: We unified 68 AI predicates to 68 [2018-10-26 20:01:33,039 INFO L424 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-10-26 20:01:33,039 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-26 20:01:33,039 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-10-26 20:01:33,039 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-26 20:01:33,040 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-10-26 20:01:33,040 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-10-26 20:01:33,040 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=295, Unknown=0, NotChecked=0, Total=342 [2018-10-26 20:01:33,040 INFO L87 Difference]: Start difference. First operand 44 states and 51 transitions. Second operand 19 states. [2018-10-26 20:01:37,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 20:01:37,850 INFO L93 Difference]: Finished difference Result 75 states and 91 transitions. [2018-10-26 20:01:37,850 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-10-26 20:01:37,850 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 69 [2018-10-26 20:01:37,851 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 20:01:37,852 INFO L225 Difference]: With dead ends: 75 [2018-10-26 20:01:37,852 INFO L226 Difference]: Without dead ends: 48 [2018-10-26 20:01:37,853 INFO L605 BasicCegarLoop]: 2 DeclaredPredicates, 78 GetRequests, 52 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 103 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=117, Invalid=639, Unknown=0, NotChecked=0, Total=756 [2018-10-26 20:01:37,853 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-10-26 20:01:37,860 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 46. [2018-10-26 20:01:37,860 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-10-26 20:01:37,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 52 transitions. [2018-10-26 20:01:37,861 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 52 transitions. Word has length 69 [2018-10-26 20:01:37,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 20:01:37,863 INFO L481 AbstractCegarLoop]: Abstraction has 46 states and 52 transitions. [2018-10-26 20:01:37,863 INFO L482 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-10-26 20:01:37,863 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 52 transitions. [2018-10-26 20:01:37,865 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-10-26 20:01:37,865 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 20:01:37,865 INFO L375 BasicCegarLoop]: trace histogram [9, 6, 6, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 20:01:37,865 INFO L424 AbstractCegarLoop]: === Iteration 6 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 20:01:37,865 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 20:01:37,865 INFO L82 PathProgramCache]: Analyzing trace with hash 1443367440, now seen corresponding path program 1 times [2018-10-26 20:01:37,866 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 20:01:37,866 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:37,866 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 20:01:37,867 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:37,867 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 20:01:37,879 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-10-26 20:01:37,879 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-10-26 20:01:37,880 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-10-26 20:01:37,899 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 20:01:37,899 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) [2018-10-26 20:01:37,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 20:01:37,959 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 73 with the following transitions: [2018-10-26 20:01:37,959 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [15], [18], [20], [22], [26], [28], [31], [32], [39], [43], [46], [48], [51], [53], [55], [61], [63], [64], [68], [71], [73], [75], [79], [80], [81], [82], [84], [85], [86], [87], [88], [89], [90], [91] [2018-10-26 20:01:37,961 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-10-26 20:01:37,961 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-10-26 20:01:38,127 WARN L79 EvaluatorLogger]: Possible loss of precision. Operator ARITHMOD has no precise implementation. [2018-10-26 20:01:40,259 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-10-26 20:01:40,260 INFO L272 AbstractInterpreter]: Visited 40 different actions 723 times. Merged at 20 different actions 489 times. Widened at 3 different actions 75 times. Found 74 fixpoints after 8 different actions. Largest state had 39 variables. [2018-10-26 20:01:40,272 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 20:01:40,273 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-10-26 20:01:40,273 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-26 20:01:40,273 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-26 20:01:40,280 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 20:01:40,280 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-26 20:01:40,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 20:01:40,332 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 20:01:40,398 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-10-26 20:01:40,399 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-26 20:01:40,507 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2018-10-26 20:01:40,532 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-26 20:01:40,532 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2018-10-26 20:01:40,532 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-26 20:01:40,533 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-26 20:01:40,535 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-26 20:01:40,535 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-10-26 20:01:40,537 INFO L87 Difference]: Start difference. First operand 46 states and 52 transitions. Second operand 6 states. [2018-10-26 20:01:40,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 20:01:40,588 INFO L93 Difference]: Finished difference Result 88 states and 102 transitions. [2018-10-26 20:01:40,589 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-26 20:01:40,589 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 72 [2018-10-26 20:01:40,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 20:01:40,590 INFO L225 Difference]: With dead ends: 88 [2018-10-26 20:01:40,590 INFO L226 Difference]: Without dead ends: 55 [2018-10-26 20:01:40,591 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 143 GetRequests, 139 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-10-26 20:01:40,591 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-10-26 20:01:40,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2018-10-26 20:01:40,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-10-26 20:01:40,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 61 transitions. [2018-10-26 20:01:40,601 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 61 transitions. Word has length 72 [2018-10-26 20:01:40,601 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 20:01:40,601 INFO L481 AbstractCegarLoop]: Abstraction has 55 states and 61 transitions. [2018-10-26 20:01:40,601 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-26 20:01:40,601 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 61 transitions. [2018-10-26 20:01:40,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-10-26 20:01:40,602 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 20:01:40,602 INFO L375 BasicCegarLoop]: trace histogram [9, 6, 6, 5, 4, 4, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 20:01:40,603 INFO L424 AbstractCegarLoop]: === Iteration 7 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 20:01:40,603 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 20:01:40,603 INFO L82 PathProgramCache]: Analyzing trace with hash -1140034890, now seen corresponding path program 2 times [2018-10-26 20:01:40,603 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 20:01:40,606 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:40,606 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 20:01:40,606 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:40,606 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 20:01:40,621 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-10-26 20:01:40,622 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-10-26 20:01:40,622 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2018-10-26 20:01:40,630 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-26 20:01:40,630 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-10-26 20:01:40,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 20:01:40,689 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-26 20:01:40,690 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-26 20:01:40,690 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-26 20:01:40,690 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2018-10-26 20:01:40,699 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-26 20:01:40,699 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-26 20:01:40,772 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-10-26 20:01:40,772 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-26 20:01:40,775 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 20:01:40,813 INFO L134 CoverageAnalysis]: Checked inductivity of 142 backedges. 47 proven. 3 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2018-10-26 20:01:40,814 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-26 20:01:40,903 INFO L134 CoverageAnalysis]: Checked inductivity of 142 backedges. 47 proven. 3 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2018-10-26 20:01:40,919 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-26 20:01:40,920 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 8 [2018-10-26 20:01:40,920 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-26 20:01:40,921 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-26 20:01:40,921 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-26 20:01:40,921 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-10-26 20:01:40,922 INFO L87 Difference]: Start difference. First operand 55 states and 61 transitions. Second operand 8 states. [2018-10-26 20:01:41,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 20:01:41,103 INFO L93 Difference]: Finished difference Result 103 states and 125 transitions. [2018-10-26 20:01:41,103 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-26 20:01:41,104 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 81 [2018-10-26 20:01:41,104 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 20:01:41,105 INFO L225 Difference]: With dead ends: 103 [2018-10-26 20:01:41,105 INFO L226 Difference]: Without dead ends: 74 [2018-10-26 20:01:41,106 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 155 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-10-26 20:01:41,106 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states. [2018-10-26 20:01:41,116 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 70. [2018-10-26 20:01:41,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70 states. [2018-10-26 20:01:41,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 79 transitions. [2018-10-26 20:01:41,117 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 79 transitions. Word has length 81 [2018-10-26 20:01:41,117 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 20:01:41,118 INFO L481 AbstractCegarLoop]: Abstraction has 70 states and 79 transitions. [2018-10-26 20:01:41,118 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-26 20:01:41,118 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 79 transitions. [2018-10-26 20:01:41,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-10-26 20:01:41,123 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 20:01:41,124 INFO L375 BasicCegarLoop]: trace histogram [21, 18, 18, 15, 5, 4, 4, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 20:01:41,124 INFO L424 AbstractCegarLoop]: === Iteration 8 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 20:01:41,124 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 20:01:41,124 INFO L82 PathProgramCache]: Analyzing trace with hash 12732450, now seen corresponding path program 3 times [2018-10-26 20:01:41,124 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 20:01:41,125 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:41,125 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-26 20:01:41,125 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:41,125 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 20:01:41,158 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-10-26 20:01:41,158 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-10-26 20:01:41,158 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-10-26 20:01:41,165 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-26 20:01:41,165 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) [2018-10-26 20:01:41,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 20:01:41,224 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-26 20:01:41,224 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-26 20:01:41,224 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-26 20:01:41,224 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-26 20:01:41,234 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-26 20:01:41,234 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-26 20:01:41,327 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-26 20:01:41,328 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-26 20:01:41,333 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 20:01:41,416 INFO L134 CoverageAnalysis]: Checked inductivity of 766 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 740 trivial. 0 not checked. [2018-10-26 20:01:41,416 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-26 20:01:41,474 INFO L134 CoverageAnalysis]: Checked inductivity of 766 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 740 trivial. 0 not checked. [2018-10-26 20:01:41,493 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-26 20:01:41,493 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2018-10-26 20:01:41,493 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-26 20:01:41,493 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-10-26 20:01:41,494 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-10-26 20:01:41,494 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-10-26 20:01:41,494 INFO L87 Difference]: Start difference. First operand 70 states and 79 transitions. Second operand 12 states. [2018-10-26 20:01:41,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 20:01:41,590 INFO L93 Difference]: Finished difference Result 136 states and 159 transitions. [2018-10-26 20:01:41,592 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-10-26 20:01:41,592 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 129 [2018-10-26 20:01:41,592 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 20:01:41,593 INFO L225 Difference]: With dead ends: 136 [2018-10-26 20:01:41,593 INFO L226 Difference]: Without dead ends: 88 [2018-10-26 20:01:41,594 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 257 GetRequests, 247 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-10-26 20:01:41,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2018-10-26 20:01:41,610 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 88. [2018-10-26 20:01:41,612 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 88 states. [2018-10-26 20:01:41,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 97 transitions. [2018-10-26 20:01:41,617 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 97 transitions. Word has length 129 [2018-10-26 20:01:41,617 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 20:01:41,617 INFO L481 AbstractCegarLoop]: Abstraction has 88 states and 97 transitions. [2018-10-26 20:01:41,618 INFO L482 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-10-26 20:01:41,618 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 97 transitions. [2018-10-26 20:01:41,619 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148 [2018-10-26 20:01:41,619 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 20:01:41,619 INFO L375 BasicCegarLoop]: trace histogram [21, 18, 18, 15, 11, 10, 10, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 20:01:41,619 INFO L424 AbstractCegarLoop]: === Iteration 9 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 20:01:41,619 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 20:01:41,619 INFO L82 PathProgramCache]: Analyzing trace with hash 1495303522, now seen corresponding path program 4 times [2018-10-26 20:01:41,619 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 20:01:41,620 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:41,620 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-26 20:01:41,620 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:41,620 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 20:01:41,643 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-10-26 20:01:41,643 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-10-26 20:01:41,643 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2018-10-26 20:01:41,651 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 20:01:41,651 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-10-26 20:01:41,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 20:01:41,693 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-26 20:01:41,693 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-26 20:01:41,693 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-26 20:01:41,693 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-26 20:01:41,699 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 20:01:41,699 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-26 20:01:41,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 20:01:41,772 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 20:01:41,983 INFO L134 CoverageAnalysis]: Checked inductivity of 895 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 740 trivial. 0 not checked. [2018-10-26 20:01:41,983 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-26 20:01:42,164 INFO L134 CoverageAnalysis]: Checked inductivity of 895 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 740 trivial. 0 not checked. [2018-10-26 20:01:42,181 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-26 20:01:42,181 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 24 [2018-10-26 20:01:42,181 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-26 20:01:42,182 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-10-26 20:01:42,182 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-10-26 20:01:42,182 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=276, Invalid=276, Unknown=0, NotChecked=0, Total=552 [2018-10-26 20:01:42,182 INFO L87 Difference]: Start difference. First operand 88 states and 97 transitions. Second operand 24 states. [2018-10-26 20:01:42,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 20:01:42,400 INFO L93 Difference]: Finished difference Result 172 states and 201 transitions. [2018-10-26 20:01:42,403 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-10-26 20:01:42,404 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 147 [2018-10-26 20:01:42,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 20:01:42,405 INFO L225 Difference]: With dead ends: 172 [2018-10-26 20:01:42,405 INFO L226 Difference]: Without dead ends: 124 [2018-10-26 20:01:42,406 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 293 GetRequests, 271 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=276, Invalid=276, Unknown=0, NotChecked=0, Total=552 [2018-10-26 20:01:42,406 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-10-26 20:01:42,427 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 124. [2018-10-26 20:01:42,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-10-26 20:01:42,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 133 transitions. [2018-10-26 20:01:42,428 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 133 transitions. Word has length 147 [2018-10-26 20:01:42,428 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 20:01:42,429 INFO L481 AbstractCegarLoop]: Abstraction has 124 states and 133 transitions. [2018-10-26 20:01:42,429 INFO L482 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-10-26 20:01:42,429 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 133 transitions. [2018-10-26 20:01:42,430 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 184 [2018-10-26 20:01:42,430 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 20:01:42,430 INFO L375 BasicCegarLoop]: trace histogram [23, 22, 22, 21, 18, 18, 15, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 20:01:42,430 INFO L424 AbstractCegarLoop]: === Iteration 10 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 20:01:42,431 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 20:01:42,431 INFO L82 PathProgramCache]: Analyzing trace with hash -2103799838, now seen corresponding path program 5 times [2018-10-26 20:01:42,431 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 20:01:42,435 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:42,435 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 20:01:42,435 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:42,435 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 20:01:42,489 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-10-26 20:01:42,489 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-10-26 20:01:42,489 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-10-26 20:01:42,499 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-26 20:01:42,499 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) [2018-10-26 20:01:42,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 20:01:42,580 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-26 20:01:42,581 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-26 20:01:42,581 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-26 20:01:42,581 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-26 20:01:42,588 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-26 20:01:42,588 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-26 20:01:42,634 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-10-26 20:01:42,634 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-26 20:01:42,638 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 20:01:42,703 INFO L134 CoverageAnalysis]: Checked inductivity of 1477 backedges. 348 proven. 2 refuted. 0 times theorem prover too weak. 1127 trivial. 0 not checked. [2018-10-26 20:01:42,704 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-26 20:01:42,817 INFO L134 CoverageAnalysis]: Checked inductivity of 1477 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1475 trivial. 0 not checked. [2018-10-26 20:01:42,834 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-26 20:01:42,834 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2018-10-26 20:01:42,834 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-26 20:01:42,835 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-26 20:01:42,835 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-26 20:01:42,835 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-10-26 20:01:42,835 INFO L87 Difference]: Start difference. First operand 124 states and 133 transitions. Second operand 6 states. [2018-10-26 20:01:42,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 20:01:42,906 INFO L93 Difference]: Finished difference Result 169 states and 186 transitions. [2018-10-26 20:01:42,907 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-26 20:01:42,908 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 183 [2018-10-26 20:01:42,908 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 20:01:42,909 INFO L225 Difference]: With dead ends: 169 [2018-10-26 20:01:42,909 INFO L226 Difference]: Without dead ends: 133 [2018-10-26 20:01:42,910 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 365 GetRequests, 361 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-10-26 20:01:42,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-10-26 20:01:42,921 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 133. [2018-10-26 20:01:42,922 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-10-26 20:01:42,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 142 transitions. [2018-10-26 20:01:42,923 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 142 transitions. Word has length 183 [2018-10-26 20:01:42,923 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 20:01:42,923 INFO L481 AbstractCegarLoop]: Abstraction has 133 states and 142 transitions. [2018-10-26 20:01:42,923 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-26 20:01:42,923 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 142 transitions. [2018-10-26 20:01:42,926 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 193 [2018-10-26 20:01:42,927 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 20:01:42,927 INFO L375 BasicCegarLoop]: trace histogram [23, 22, 22, 21, 18, 18, 15, 5, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 20:01:42,927 INFO L424 AbstractCegarLoop]: === Iteration 11 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 20:01:42,927 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 20:01:42,927 INFO L82 PathProgramCache]: Analyzing trace with hash -295793557, now seen corresponding path program 6 times [2018-10-26 20:01:42,927 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 20:01:42,928 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:42,928 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-26 20:01:42,928 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:42,928 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 20:01:42,959 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-10-26 20:01:42,959 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-10-26 20:01:42,959 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2018-10-26 20:01:42,982 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-26 20:01:42,982 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-10-26 20:01:43,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 20:01:43,054 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-26 20:01:43,054 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-26 20:01:43,055 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-26 20:01:43,055 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-26 20:01:43,061 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-26 20:01:43,062 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-26 20:01:43,155 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-26 20:01:43,156 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-26 20:01:43,160 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 20:01:43,404 INFO L134 CoverageAnalysis]: Checked inductivity of 1501 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 764 trivial. 0 not checked. [2018-10-26 20:01:43,404 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-26 20:01:43,879 INFO L134 CoverageAnalysis]: Checked inductivity of 1501 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 764 trivial. 0 not checked. [2018-10-26 20:01:43,896 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-26 20:01:43,896 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25] total 42 [2018-10-26 20:01:43,896 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-26 20:01:43,897 INFO L460 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-10-26 20:01:43,897 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-10-26 20:01:43,898 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=861, Invalid=861, Unknown=0, NotChecked=0, Total=1722 [2018-10-26 20:01:43,898 INFO L87 Difference]: Start difference. First operand 133 states and 142 transitions. Second operand 42 states. [2018-10-26 20:01:44,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 20:01:44,031 INFO L93 Difference]: Finished difference Result 244 states and 279 transitions. [2018-10-26 20:01:44,032 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-10-26 20:01:44,032 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 192 [2018-10-26 20:01:44,033 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 20:01:44,034 INFO L225 Difference]: With dead ends: 244 [2018-10-26 20:01:44,034 INFO L226 Difference]: Without dead ends: 187 [2018-10-26 20:01:44,035 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 383 GetRequests, 337 SyntacticMatches, 6 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 117 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=861, Invalid=861, Unknown=0, NotChecked=0, Total=1722 [2018-10-26 20:01:44,035 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2018-10-26 20:01:44,048 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 187. [2018-10-26 20:01:44,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 187 states. [2018-10-26 20:01:44,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 187 states to 187 states and 196 transitions. [2018-10-26 20:01:44,049 INFO L78 Accepts]: Start accepts. Automaton has 187 states and 196 transitions. Word has length 192 [2018-10-26 20:01:44,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 20:01:44,050 INFO L481 AbstractCegarLoop]: Abstraction has 187 states and 196 transitions. [2018-10-26 20:01:44,050 INFO L482 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-10-26 20:01:44,050 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 196 transitions. [2018-10-26 20:01:44,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 247 [2018-10-26 20:01:44,054 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 20:01:44,055 INFO L375 BasicCegarLoop]: trace histogram [41, 40, 40, 21, 18, 18, 15, 5, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 20:01:44,055 INFO L424 AbstractCegarLoop]: === Iteration 12 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 20:01:44,055 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 20:01:44,055 INFO L82 PathProgramCache]: Analyzing trace with hash 1113345195, now seen corresponding path program 7 times [2018-10-26 20:01:44,055 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 20:01:44,056 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:44,056 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-26 20:01:44,056 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:44,056 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 20:01:44,095 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-10-26 20:01:44,095 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-10-26 20:01:44,095 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2018-10-26 20:01:44,108 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 20:01:44,108 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-10-26 20:01:44,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 20:01:44,187 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-26 20:01:44,187 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-26 20:01:44,187 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-26 20:01:44,187 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2018-10-26 20:01:44,207 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 20:01:44,207 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-26 20:01:44,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 20:01:44,350 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 20:01:44,430 INFO L134 CoverageAnalysis]: Checked inductivity of 3184 backedges. 127 proven. 3 refuted. 0 times theorem prover too weak. 3054 trivial. 0 not checked. [2018-10-26 20:01:44,430 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-26 20:01:44,490 INFO L134 CoverageAnalysis]: Checked inductivity of 3184 backedges. 33 proven. 349 refuted. 0 times theorem prover too weak. 2802 trivial. 0 not checked. [2018-10-26 20:01:44,507 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-26 20:01:44,507 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2018-10-26 20:01:44,507 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-26 20:01:44,508 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-26 20:01:44,508 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-26 20:01:44,508 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-10-26 20:01:44,508 INFO L87 Difference]: Start difference. First operand 187 states and 196 transitions. Second operand 6 states. [2018-10-26 20:01:44,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 20:01:44,545 INFO L93 Difference]: Finished difference Result 252 states and 274 transitions. [2018-10-26 20:01:44,545 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-26 20:01:44,545 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 246 [2018-10-26 20:01:44,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 20:01:44,546 INFO L225 Difference]: With dead ends: 252 [2018-10-26 20:01:44,547 INFO L226 Difference]: Without dead ends: 199 [2018-10-26 20:01:44,547 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 491 GetRequests, 487 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-10-26 20:01:44,547 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 199 states. [2018-10-26 20:01:44,562 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 199 to 199. [2018-10-26 20:01:44,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 199 states. [2018-10-26 20:01:44,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199 states to 199 states and 208 transitions. [2018-10-26 20:01:44,564 INFO L78 Accepts]: Start accepts. Automaton has 199 states and 208 transitions. Word has length 246 [2018-10-26 20:01:44,565 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 20:01:44,565 INFO L481 AbstractCegarLoop]: Abstraction has 199 states and 208 transitions. [2018-10-26 20:01:44,565 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-26 20:01:44,565 INFO L276 IsEmpty]: Start isEmpty. Operand 199 states and 208 transitions. [2018-10-26 20:01:44,570 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 283 [2018-10-26 20:01:44,570 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 20:01:44,571 INFO L375 BasicCegarLoop]: trace histogram [41, 40, 40, 30, 27, 27, 15, 12, 5, 4, 4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 20:01:44,571 INFO L424 AbstractCegarLoop]: === Iteration 13 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 20:01:44,571 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 20:01:44,571 INFO L82 PathProgramCache]: Analyzing trace with hash -1829432298, now seen corresponding path program 8 times [2018-10-26 20:01:44,571 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 20:01:44,572 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:44,572 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 20:01:44,572 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:44,572 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 20:01:44,611 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-10-26 20:01:44,611 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-10-26 20:01:44,611 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-10-26 20:01:44,626 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-26 20:01:44,626 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) [2018-10-26 20:01:44,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 20:01:44,716 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-26 20:01:44,716 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-26 20:01:44,716 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-26 20:01:44,716 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-26 20:01:44,723 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-26 20:01:44,724 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-26 20:01:44,854 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-10-26 20:01:44,854 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-26 20:01:44,859 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 20:01:44,951 INFO L134 CoverageAnalysis]: Checked inductivity of 4030 backedges. 732 proven. 26 refuted. 0 times theorem prover too weak. 3272 trivial. 0 not checked. [2018-10-26 20:01:44,951 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-26 20:01:45,024 INFO L134 CoverageAnalysis]: Checked inductivity of 4030 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 4004 trivial. 0 not checked. [2018-10-26 20:01:45,041 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-26 20:01:45,041 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2018-10-26 20:01:45,041 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-26 20:01:45,042 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-10-26 20:01:45,042 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-10-26 20:01:45,042 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-10-26 20:01:45,042 INFO L87 Difference]: Start difference. First operand 199 states and 208 transitions. Second operand 12 states. [2018-10-26 20:01:45,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 20:01:45,101 INFO L93 Difference]: Finished difference Result 265 states and 285 transitions. [2018-10-26 20:01:45,102 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-10-26 20:01:45,102 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 282 [2018-10-26 20:01:45,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 20:01:45,103 INFO L225 Difference]: With dead ends: 265 [2018-10-26 20:01:45,103 INFO L226 Difference]: Without dead ends: 217 [2018-10-26 20:01:45,104 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 563 GetRequests, 553 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-10-26 20:01:45,104 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 217 states. [2018-10-26 20:01:45,116 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 217 to 217. [2018-10-26 20:01:45,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 217 states. [2018-10-26 20:01:45,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 217 states to 217 states and 226 transitions. [2018-10-26 20:01:45,117 INFO L78 Accepts]: Start accepts. Automaton has 217 states and 226 transitions. Word has length 282 [2018-10-26 20:01:45,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 20:01:45,118 INFO L481 AbstractCegarLoop]: Abstraction has 217 states and 226 transitions. [2018-10-26 20:01:45,118 INFO L482 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-10-26 20:01:45,118 INFO L276 IsEmpty]: Start isEmpty. Operand 217 states and 226 transitions. [2018-10-26 20:01:45,121 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 301 [2018-10-26 20:01:45,122 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 20:01:45,122 INFO L375 BasicCegarLoop]: trace histogram [41, 40, 40, 30, 27, 27, 15, 12, 11, 10, 10, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 20:01:45,122 INFO L424 AbstractCegarLoop]: === Iteration 14 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 20:01:45,122 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 20:01:45,122 INFO L82 PathProgramCache]: Analyzing trace with hash -2034953098, now seen corresponding path program 9 times [2018-10-26 20:01:45,122 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 20:01:45,123 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:45,123 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-26 20:01:45,123 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:45,123 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 20:01:45,152 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-10-26 20:01:45,152 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-10-26 20:01:45,152 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2018-10-26 20:01:45,172 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-26 20:01:45,172 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-10-26 20:01:45,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 20:01:45,259 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-26 20:01:45,259 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-26 20:01:45,259 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-26 20:01:45,259 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-26 20:01:45,265 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-26 20:01:45,265 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-26 20:01:45,378 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-26 20:01:45,379 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-26 20:01:45,385 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 20:01:45,433 INFO L134 CoverageAnalysis]: Checked inductivity of 4159 backedges. 820 proven. 36 refuted. 0 times theorem prover too weak. 3303 trivial. 0 not checked. [2018-10-26 20:01:45,433 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-26 20:01:45,574 INFO L134 CoverageAnalysis]: Checked inductivity of 4159 backedges. 820 proven. 36 refuted. 0 times theorem prover too weak. 3303 trivial. 0 not checked. [2018-10-26 20:01:45,592 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-26 20:01:45,592 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2018-10-26 20:01:45,592 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-26 20:01:45,592 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-10-26 20:01:45,593 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-10-26 20:01:45,593 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-10-26 20:01:45,593 INFO L87 Difference]: Start difference. First operand 217 states and 226 transitions. Second operand 12 states. [2018-10-26 20:01:45,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 20:01:45,664 INFO L93 Difference]: Finished difference Result 324 states and 349 transitions. [2018-10-26 20:01:45,665 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-10-26 20:01:45,665 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 300 [2018-10-26 20:01:45,666 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 20:01:45,667 INFO L225 Difference]: With dead ends: 324 [2018-10-26 20:01:45,667 INFO L226 Difference]: Without dead ends: 241 [2018-10-26 20:01:45,667 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 599 GetRequests, 589 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-10-26 20:01:45,668 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 241 states. [2018-10-26 20:01:45,679 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 241 to 241. [2018-10-26 20:01:45,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 241 states. [2018-10-26 20:01:45,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 241 states to 241 states and 250 transitions. [2018-10-26 20:01:45,681 INFO L78 Accepts]: Start accepts. Automaton has 241 states and 250 transitions. Word has length 300 [2018-10-26 20:01:45,681 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 20:01:45,681 INFO L481 AbstractCegarLoop]: Abstraction has 241 states and 250 transitions. [2018-10-26 20:01:45,681 INFO L482 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-10-26 20:01:45,681 INFO L276 IsEmpty]: Start isEmpty. Operand 241 states and 250 transitions. [2018-10-26 20:01:45,683 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 373 [2018-10-26 20:01:45,683 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 20:01:45,686 INFO L375 BasicCegarLoop]: trace histogram [48, 45, 45, 41, 40, 40, 30, 15, 11, 10, 10, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 20:01:45,687 INFO L424 AbstractCegarLoop]: === Iteration 15 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 20:01:45,687 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 20:01:45,687 INFO L82 PathProgramCache]: Analyzing trace with hash -961004084, now seen corresponding path program 10 times [2018-10-26 20:01:45,687 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 20:01:45,688 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:45,688 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-26 20:01:45,688 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:45,688 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 20:01:45,717 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-10-26 20:01:45,717 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-10-26 20:01:45,717 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2018-10-26 20:01:45,733 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 20:01:45,733 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-10-26 20:01:45,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 20:01:45,843 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-26 20:01:45,843 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-26 20:01:45,843 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-26 20:01:45,843 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2018-10-26 20:01:45,853 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 20:01:45,853 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-26 20:01:46,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 20:01:46,012 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 20:01:46,672 INFO L134 CoverageAnalysis]: Checked inductivity of 6823 backedges. 1540 proven. 210 refuted. 0 times theorem prover too weak. 5073 trivial. 0 not checked. [2018-10-26 20:01:46,673 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-26 20:01:46,906 INFO L134 CoverageAnalysis]: Checked inductivity of 6823 backedges. 204 proven. 2140 refuted. 0 times theorem prover too weak. 4479 trivial. 0 not checked. [2018-10-26 20:01:46,924 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-26 20:01:46,924 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 23 [2018-10-26 20:01:46,924 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-26 20:01:46,924 INFO L460 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-10-26 20:01:46,925 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-10-26 20:01:46,925 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=253, Invalid=253, Unknown=0, NotChecked=0, Total=506 [2018-10-26 20:01:46,925 INFO L87 Difference]: Start difference. First operand 241 states and 250 transitions. Second operand 23 states. [2018-10-26 20:01:47,014 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 20:01:47,014 INFO L93 Difference]: Finished difference Result 392 states and 422 transitions. [2018-10-26 20:01:47,015 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-10-26 20:01:47,015 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 372 [2018-10-26 20:01:47,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 20:01:47,017 INFO L225 Difference]: With dead ends: 392 [2018-10-26 20:01:47,017 INFO L226 Difference]: Without dead ends: 285 [2018-10-26 20:01:47,018 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 743 GetRequests, 721 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=253, Invalid=253, Unknown=0, NotChecked=0, Total=506 [2018-10-26 20:01:47,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 285 states. [2018-10-26 20:01:47,037 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 285 to 285. [2018-10-26 20:01:47,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 285 states. [2018-10-26 20:01:47,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 285 states to 285 states and 294 transitions. [2018-10-26 20:01:47,038 INFO L78 Accepts]: Start accepts. Automaton has 285 states and 294 transitions. Word has length 372 [2018-10-26 20:01:47,039 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 20:01:47,039 INFO L481 AbstractCegarLoop]: Abstraction has 285 states and 294 transitions. [2018-10-26 20:01:47,039 INFO L482 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-10-26 20:01:47,039 INFO L276 IsEmpty]: Start isEmpty. Operand 285 states and 294 transitions. [2018-10-26 20:01:47,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 505 [2018-10-26 20:01:47,044 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 20:01:47,044 INFO L375 BasicCegarLoop]: trace histogram [81, 78, 78, 63, 41, 40, 40, 15, 11, 10, 10, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 20:01:47,044 INFO L424 AbstractCegarLoop]: === Iteration 16 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 20:01:47,045 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 20:01:47,045 INFO L82 PathProgramCache]: Analyzing trace with hash 1052177151, now seen corresponding path program 11 times [2018-10-26 20:01:47,045 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 20:01:47,045 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:47,046 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 20:01:47,046 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:47,046 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 20:01:47,076 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-10-26 20:01:47,076 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-10-26 20:01:47,076 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2018-10-26 20:01:47,087 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-26 20:01:47,087 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-10-26 20:01:47,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 20:01:47,217 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-26 20:01:47,217 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-26 20:01:47,218 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-26 20:01:47,218 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2018-10-26 20:01:47,229 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-26 20:01:47,229 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-26 20:01:47,732 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-10-26 20:01:47,732 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-26 20:01:47,739 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 20:01:47,908 INFO L134 CoverageAnalysis]: Checked inductivity of 15073 backedges. 1703 proven. 55 refuted. 0 times theorem prover too weak. 13315 trivial. 0 not checked. [2018-10-26 20:01:47,908 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-26 20:01:48,081 INFO L134 CoverageAnalysis]: Checked inductivity of 15073 backedges. 1703 proven. 55 refuted. 0 times theorem prover too weak. 13315 trivial. 0 not checked. [2018-10-26 20:01:48,100 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-26 20:01:48,100 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 16 [2018-10-26 20:01:48,100 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-26 20:01:48,101 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-10-26 20:01:48,101 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-10-26 20:01:48,101 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2018-10-26 20:01:48,101 INFO L87 Difference]: Start difference. First operand 285 states and 294 transitions. Second operand 16 states. [2018-10-26 20:01:48,205 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 20:01:48,205 INFO L93 Difference]: Finished difference Result 468 states and 503 transitions. [2018-10-26 20:01:48,208 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-10-26 20:01:48,208 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 504 [2018-10-26 20:01:48,208 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 20:01:48,209 INFO L225 Difference]: With dead ends: 468 [2018-10-26 20:01:48,209 INFO L226 Difference]: Without dead ends: 317 [2018-10-26 20:01:48,212 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1007 GetRequests, 993 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2018-10-26 20:01:48,213 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 317 states. [2018-10-26 20:01:48,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 317 to 317. [2018-10-26 20:01:48,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 317 states. [2018-10-26 20:01:48,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 317 states to 317 states and 334 transitions. [2018-10-26 20:01:48,236 INFO L78 Accepts]: Start accepts. Automaton has 317 states and 334 transitions. Word has length 504 [2018-10-26 20:01:48,236 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 20:01:48,236 INFO L481 AbstractCegarLoop]: Abstraction has 317 states and 334 transitions. [2018-10-26 20:01:48,236 INFO L482 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-10-26 20:01:48,236 INFO L276 IsEmpty]: Start isEmpty. Operand 317 states and 334 transitions. [2018-10-26 20:01:48,241 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 601 [2018-10-26 20:01:48,241 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 20:01:48,241 INFO L375 BasicCegarLoop]: trace histogram [105, 102, 102, 63, 41, 40, 40, 39, 11, 10, 10, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 20:01:48,242 INFO L424 AbstractCegarLoop]: === Iteration 17 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 20:01:48,242 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 20:01:48,242 INFO L82 PathProgramCache]: Analyzing trace with hash 56465079, now seen corresponding path program 12 times [2018-10-26 20:01:48,242 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 20:01:48,242 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:48,242 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-26 20:01:48,242 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:48,243 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 20:01:48,273 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-10-26 20:01:48,273 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-10-26 20:01:48,273 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2018-10-26 20:01:48,294 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-26 20:01:48,294 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-10-26 20:01:48,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 20:01:48,413 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-26 20:01:48,413 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-26 20:01:48,413 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-26 20:01:48,413 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-26 20:01:48,420 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-10-26 20:01:48,420 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-10-26 20:01:48,620 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-10-26 20:01:48,620 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-26 20:01:48,630 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 20:01:49,836 INFO L134 CoverageAnalysis]: Checked inductivity of 23809 backedges. 9530 proven. 2312 refuted. 0 times theorem prover too weak. 11967 trivial. 0 not checked. [2018-10-26 20:01:49,837 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-26 20:01:51,293 INFO L134 CoverageAnalysis]: Checked inductivity of 23809 backedges. 9530 proven. 2312 refuted. 0 times theorem prover too weak. 11967 trivial. 0 not checked. [2018-10-26 20:01:51,322 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-26 20:01:51,322 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37] total 42 [2018-10-26 20:01:51,322 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-26 20:01:51,323 INFO L460 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-10-26 20:01:51,323 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-10-26 20:01:51,324 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=861, Invalid=861, Unknown=0, NotChecked=0, Total=1722 [2018-10-26 20:01:51,324 INFO L87 Difference]: Start difference. First operand 317 states and 334 transitions. Second operand 42 states. [2018-10-26 20:01:52,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 20:01:52,068 INFO L93 Difference]: Finished difference Result 524 states and 571 transitions. [2018-10-26 20:01:52,072 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-10-26 20:01:52,072 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 600 [2018-10-26 20:01:52,072 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 20:01:52,073 INFO L225 Difference]: With dead ends: 524 [2018-10-26 20:01:52,074 INFO L226 Difference]: Without dead ends: 341 [2018-10-26 20:01:52,075 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1199 GetRequests, 1129 SyntacticMatches, 30 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 585 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=861, Invalid=861, Unknown=0, NotChecked=0, Total=1722 [2018-10-26 20:01:52,075 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 341 states. [2018-10-26 20:01:52,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 341 to 341. [2018-10-26 20:01:52,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 341 states. [2018-10-26 20:01:52,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 341 states to 341 states and 364 transitions. [2018-10-26 20:01:52,098 INFO L78 Accepts]: Start accepts. Automaton has 341 states and 364 transitions. Word has length 600 [2018-10-26 20:01:52,099 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 20:01:52,099 INFO L481 AbstractCegarLoop]: Abstraction has 341 states and 364 transitions. [2018-10-26 20:01:52,099 INFO L482 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-10-26 20:01:52,099 INFO L276 IsEmpty]: Start isEmpty. Operand 341 states and 364 transitions. [2018-10-26 20:01:52,102 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 673 [2018-10-26 20:01:52,102 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 20:01:52,102 INFO L375 BasicCegarLoop]: trace histogram [123, 120, 120, 63, 57, 41, 40, 40, 11, 10, 10, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 20:01:52,102 INFO L424 AbstractCegarLoop]: === Iteration 18 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 20:01:52,103 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 20:01:52,103 INFO L82 PathProgramCache]: Analyzing trace with hash 464301185, now seen corresponding path program 13 times [2018-10-26 20:01:52,103 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 20:01:52,103 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:52,104 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-26 20:01:52,104 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:52,104 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 20:01:52,134 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-10-26 20:01:52,134 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-10-26 20:01:52,135 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2018-10-26 20:01:52,149 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 20:01:52,149 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-10-26 20:01:52,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 20:01:52,306 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-26 20:01:52,307 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-26 20:01:52,307 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-26 20:01:52,307 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2018-10-26 20:01:52,321 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 20:01:52,321 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-26 20:01:52,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 20:01:52,572 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 20:01:52,961 INFO L134 CoverageAnalysis]: Checked inductivity of 31873 backedges. 13132 proven. 155 refuted. 0 times theorem prover too weak. 18586 trivial. 0 not checked. [2018-10-26 20:01:52,961 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-26 20:01:53,366 INFO L134 CoverageAnalysis]: Checked inductivity of 31873 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 31718 trivial. 0 not checked. [2018-10-26 20:01:53,383 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-26 20:01:53,383 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 24 [2018-10-26 20:01:53,384 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-26 20:01:53,384 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-10-26 20:01:53,384 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-10-26 20:01:53,385 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=276, Invalid=276, Unknown=0, NotChecked=0, Total=552 [2018-10-26 20:01:53,385 INFO L87 Difference]: Start difference. First operand 341 states and 364 transitions. Second operand 24 states. [2018-10-26 20:01:53,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 20:01:53,945 INFO L93 Difference]: Finished difference Result 549 states and 603 transitions. [2018-10-26 20:01:53,948 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-10-26 20:01:53,948 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 672 [2018-10-26 20:01:53,949 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 20:01:53,950 INFO L225 Difference]: With dead ends: 549 [2018-10-26 20:01:53,950 INFO L226 Difference]: Without dead ends: 377 [2018-10-26 20:01:53,951 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1343 GetRequests, 1321 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=276, Invalid=276, Unknown=0, NotChecked=0, Total=552 [2018-10-26 20:01:53,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 377 states. [2018-10-26 20:01:53,974 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 377 to 377. [2018-10-26 20:01:53,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 377 states. [2018-10-26 20:01:53,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 377 states to 377 states and 400 transitions. [2018-10-26 20:01:53,978 INFO L78 Accepts]: Start accepts. Automaton has 377 states and 400 transitions. Word has length 672 [2018-10-26 20:01:53,979 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 20:01:53,979 INFO L481 AbstractCegarLoop]: Abstraction has 377 states and 400 transitions. [2018-10-26 20:01:53,979 INFO L482 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-10-26 20:01:53,979 INFO L276 IsEmpty]: Start isEmpty. Operand 377 states and 400 transitions. [2018-10-26 20:01:53,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 709 [2018-10-26 20:01:53,985 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 20:01:53,986 INFO L375 BasicCegarLoop]: trace histogram [123, 120, 120, 63, 57, 41, 40, 40, 23, 22, 22, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 20:01:53,986 INFO L424 AbstractCegarLoop]: === Iteration 19 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 20:01:53,986 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 20:01:53,986 INFO L82 PathProgramCache]: Analyzing trace with hash 1887179329, now seen corresponding path program 14 times [2018-10-26 20:01:53,986 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 20:01:53,989 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:53,989 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-26 20:01:53,989 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:01:53,989 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 20:01:54,024 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-10-26 20:01:54,025 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-10-26 20:01:54,025 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2018-10-26 20:01:54,042 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-26 20:01:54,042 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-10-26 20:01:54,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-26 20:01:54,175 INFO L184 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-10-26 20:01:54,175 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-10-26 20:01:54,175 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-26 20:01:54,175 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-26 20:01:54,184 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-26 20:01:54,184 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-10-26 20:02:05,674 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 24 check-sat command(s) [2018-10-26 20:02:05,674 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-26 20:02:05,691 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-26 20:02:06,710 INFO L134 CoverageAnalysis]: Checked inductivity of 32455 backedges. 13132 proven. 737 refuted. 0 times theorem prover too weak. 18586 trivial. 0 not checked. [2018-10-26 20:02:06,710 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-26 20:02:07,513 INFO L134 CoverageAnalysis]: Checked inductivity of 32455 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 31718 trivial. 0 not checked. [2018-10-26 20:02:07,535 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-26 20:02:07,535 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25] total 41 [2018-10-26 20:02:07,535 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-26 20:02:07,536 INFO L460 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-10-26 20:02:07,536 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-10-26 20:02:07,536 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=820, Invalid=820, Unknown=0, NotChecked=0, Total=1640 [2018-10-26 20:02:07,537 INFO L87 Difference]: Start difference. First operand 377 states and 400 transitions. Second operand 41 states. [2018-10-26 20:02:08,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-26 20:02:08,068 INFO L93 Difference]: Finished difference Result 600 states and 659 transitions. [2018-10-26 20:02:08,071 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-10-26 20:02:08,071 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 708 [2018-10-26 20:02:08,072 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-26 20:02:08,073 INFO L225 Difference]: With dead ends: 600 [2018-10-26 20:02:08,073 INFO L226 Difference]: Without dead ends: 428 [2018-10-26 20:02:08,074 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1415 GetRequests, 1369 SyntacticMatches, 7 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 133 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=820, Invalid=820, Unknown=0, NotChecked=0, Total=1640 [2018-10-26 20:02:08,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 428 states. [2018-10-26 20:02:08,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 428 to 428. [2018-10-26 20:02:08,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 428 states. [2018-10-26 20:02:08,099 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 428 states to 428 states and 451 transitions. [2018-10-26 20:02:08,099 INFO L78 Accepts]: Start accepts. Automaton has 428 states and 451 transitions. Word has length 708 [2018-10-26 20:02:08,101 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-26 20:02:08,101 INFO L481 AbstractCegarLoop]: Abstraction has 428 states and 451 transitions. [2018-10-26 20:02:08,101 INFO L482 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-10-26 20:02:08,101 INFO L276 IsEmpty]: Start isEmpty. Operand 428 states and 451 transitions. [2018-10-26 20:02:08,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 760 [2018-10-26 20:02:08,106 INFO L367 BasicCegarLoop]: Found error trace [2018-10-26 20:02:08,107 INFO L375 BasicCegarLoop]: trace histogram [123, 120, 120, 63, 57, 41, 40, 40, 40, 39, 39, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-26 20:02:08,107 INFO L424 AbstractCegarLoop]: === Iteration 20 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-10-26 20:02:08,107 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-26 20:02:08,107 INFO L82 PathProgramCache]: Analyzing trace with hash 1676592736, now seen corresponding path program 15 times [2018-10-26 20:02:08,107 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-26 20:02:08,111 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:02:08,111 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-26 20:02:08,111 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-26 20:02:08,112 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-26 20:02:08,144 ERROR L235 seRefinementStrategy]: Caught known exception: Unsupported non-linear arithmetic [2018-10-26 20:02:08,144 INFO L258 seRefinementStrategy]: Advancing trace checker [2018-10-26 20:02:08,144 INFO L171 anRefinementStrategy]: Switched to traceCheck mode Z3_NO_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_aa0341d3-1f29-4b5e-b48b-f526e1615777/bin-2019/utaipan/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2018-10-26 20:02:08,157 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-26 20:02:08,158 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_NO_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2018-10-26 20:02:10,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2018-10-26 20:02:10,309 INFO L285 seRefinementStrategy]: Strategy TaipanRefinementStrategy was unsuccessful and could not determine trace feasibility. [2018-10-26 20:02:10,309 INFO L442 BasicCegarLoop]: Counterexample might be feasible [2018-10-26 20:02:10,386 WARN L208 ceAbstractionStarter]: Unable to decide correctness. Please check the following counterexample manually. [2018-10-26 20:02:10,386 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 26.10 08:02:10 BoogieIcfgContainer [2018-10-26 20:02:10,386 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-10-26 20:02:10,387 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-10-26 20:02:10,387 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-10-26 20:02:10,387 INFO L276 PluginConnector]: Witness Printer initialized [2018-10-26 20:02:10,387 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.10 08:01:25" (3/4) ... [2018-10-26 20:02:10,393 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-10-26 20:02:10,393 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-10-26 20:02:10,394 INFO L168 Benchmark]: Toolchain (without parser) took 45595.98 ms. Allocated memory was 1.0 GB in the beginning and 2.4 GB in the end (delta: 1.4 GB). Free memory was 963.4 MB in the beginning and 1.1 GB in the end (delta: -106.4 MB). Peak memory consumption was 1.2 GB. Max. memory is 11.5 GB. [2018-10-26 20:02:10,396 INFO L168 Benchmark]: CDTParser took 0.21 ms. Allocated memory is still 1.0 GB. Free memory is still 982.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-10-26 20:02:10,396 INFO L168 Benchmark]: CACSL2BoogieTranslator took 212.45 ms. Allocated memory is still 1.0 GB. Free memory was 963.4 MB in the beginning and 952.7 MB in the end (delta: 10.7 MB). Peak memory consumption was 10.7 MB. Max. memory is 11.5 GB. [2018-10-26 20:02:10,396 INFO L168 Benchmark]: Boogie Procedure Inliner took 35.61 ms. Allocated memory is still 1.0 GB. Free memory was 952.7 MB in the beginning and 947.3 MB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2018-10-26 20:02:10,397 INFO L168 Benchmark]: Boogie Preprocessor took 25.37 ms. Allocated memory is still 1.0 GB. Free memory is still 947.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-10-26 20:02:10,397 INFO L168 Benchmark]: RCFGBuilder took 565.04 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 188.2 MB). Free memory was 947.3 MB in the beginning and 1.2 GB in the end (delta: -213.1 MB). Peak memory consumption was 15.5 MB. Max. memory is 11.5 GB. [2018-10-26 20:02:10,397 INFO L168 Benchmark]: TraceAbstraction took 44746.51 ms. Allocated memory was 1.2 GB in the beginning and 2.4 GB in the end (delta: 1.2 GB). Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 90.5 MB). Peak memory consumption was 1.3 GB. Max. memory is 11.5 GB. [2018-10-26 20:02:10,398 INFO L168 Benchmark]: Witness Printer took 6.42 ms. Allocated memory is still 2.4 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-10-26 20:02:10,403 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.21 ms. Allocated memory is still 1.0 GB. Free memory is still 982.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 212.45 ms. Allocated memory is still 1.0 GB. Free memory was 963.4 MB in the beginning and 952.7 MB in the end (delta: 10.7 MB). Peak memory consumption was 10.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 35.61 ms. Allocated memory is still 1.0 GB. Free memory was 952.7 MB in the beginning and 947.3 MB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.37 ms. Allocated memory is still 1.0 GB. Free memory is still 947.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 565.04 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 188.2 MB). Free memory was 947.3 MB in the beginning and 1.2 GB in the end (delta: -213.1 MB). Peak memory consumption was 15.5 MB. Max. memory is 11.5 GB. * TraceAbstraction took 44746.51 ms. Allocated memory was 1.2 GB in the beginning and 2.4 GB in the end (delta: 1.2 GB). Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 90.5 MB). Peak memory consumption was 1.3 GB. Max. memory is 11.5 GB. * Witness Printer took 6.42 ms. Allocated memory is still 2.4 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 50]: Unable to prove that call of __VERIFIER_error() unreachable Unable to prove that call of __VERIFIER_error() unreachable Reason: unable to decide satisfiability of path constraint. Possible FailurePath: [L31] CALL int x[40]; [L31] RET int x[40]; [L32] CALL init_nondet(x) [L5] int i; [L6] i = 0 [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND TRUE i < 40 [L7] CALL x[i] = __VERIFIER_nondet_int() [L7] RET x[i] = __VERIFIER_nondet_int() [L6] i++ [L6] COND FALSE, RET !(i < 40) [L32] init_nondet(x) [L33] int temp; [L34] int ret; [L35] int ret2; [L36] int ret5; [L38] CALL, EXPR rangesum(x) [L13] int i; [L14] long long ret; [L15] ret = 0 [L16] int cnt = 0; [L17] i = 0 [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND FALSE !(i < 40) [L23] COND TRUE cnt !=0 [L24] RET return ret / cnt; [L38] EXPR rangesum(x) [L38] ret = rangesum(x) [L40] CALL, EXPR x[0] [L40] RET, EXPR x[0] [L40] temp=x[0] [L40] CALL, EXPR x[1] [L40] RET, EXPR x[1] [L40] CALL x[0] = x[1] [L40] RET x[0] = x[1] [L40] CALL x[1] = temp [L40] RET x[1] = temp [L41] CALL, EXPR rangesum(x) [L13] int i; [L14] long long ret; [L15] ret = 0 [L16] int cnt = 0; [L17] i = 0 [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND FALSE !(i < 40) [L23] COND TRUE cnt !=0 [L24] RET return ret / cnt; [L41] EXPR rangesum(x) [L41] ret2 = rangesum(x) [L42] CALL, EXPR x[0] [L42] RET, EXPR x[0] [L42] temp=x[0] [L43] int i =0 ; [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND TRUE i<40 -1 [L44] CALL, EXPR x[i+1] [L44] RET, EXPR x[i+1] [L44] CALL x[i] = x[i+1] [L44] RET x[i] = x[i+1] [L43] i++ [L43] COND FALSE !(i<40 -1) [L46] CALL x[40 -1] = temp [L46] RET x[40 -1] = temp [L47] CALL, EXPR rangesum(x) [L13] int i; [L14] long long ret; [L15] ret = 0 [L16] int cnt = 0; [L17] i = 0 [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND FALSE !(i > 40/2) [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND TRUE i < 40 [L18] COND TRUE i > 40/2 [L19] CALL, EXPR x[i] [L19] RET, EXPR x[i] [L19] ret = ret + x[i] [L20] cnt = cnt + 1 [L17] i++ [L17] COND FALSE !(i < 40) [L23] COND TRUE cnt !=0 [L24] RET return ret / cnt; [L47] EXPR rangesum(x) [L47] ret5 = rangesum(x) [L49] COND TRUE ret != ret2 || ret !=ret5 [L50] __VERIFIER_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 40 locations, 1 error locations. UNKNOWN Result, 44.6s OverallTime, 20 OverallIterations, 123 TraceHistogramMax, 11.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 664 SDtfs, 607 SDslu, 2223 SDs, 0 SdLazy, 704 SolverSat, 191 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 3.5s Time, PredicateUnifierStatistics: 10 DeclaredPredicates, 9227 GetRequests, 8883 SyntacticMatches, 44 SemanticMatches, 300 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 964 ImplicationChecksByTransitivity, 8.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=428occurred in iteration=19, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 4.0s AbstIntTime, 6 AbstIntIterations, 5 AbstIntStrong, 0.9726047715521402 AbsIntWeakeningRatio, 1.6408163265306122 AbsIntAvgWeakeningVarsNumRemoved, 42.74285714285714 AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.3s AutomataMinimizationTime, 19 MinimizatonAttempts, 8 StatesRemovedByMinimization, 4 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.9s SsaConstructionTime, 15.6s SatisfiabilityAnalysisTime, 8.8s InterpolantComputationTime, 9985 NumberOfCodeBlocks, 8922 NumberOfCodeBlocksAsserted, 78 NumberOfCheckSat, 8948 ConstructedInterpolants, 0 QuantifiedInterpolants, 4942704 SizeOfPredicates, 17 NumberOfNonLiveVariables, 13905 ConjunctsInSsa, 172 ConjunctsInUnsatCore, 28 InterpolantComputations, 0 PerfectInterpolantSequences, 241416/252610 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request...