./Ultimate.py --spec ../../sv-benchmarks/c/MemSafety.prp --file ../../sv-benchmarks/c/forester-heap/dll-optional_true-unreach-call_true-valid-memsafety.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 1dbac8bc Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/config/TaipanMemDerefMemtrack.xml -i ../../sv-benchmarks/c/forester-heap/dll-optional_true-unreach-call_true-valid-memsafety.i -s /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 497bfe83d1a123e7e085e38ee3eed2e663cc023e ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/config/TaipanMemDerefMemtrack.xml -i ../../sv-benchmarks/c/forester-heap/dll-optional_true-unreach-call_true-valid-memsafety.i -s /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 497bfe83d1a123e7e085e38ee3eed2e663cc023e 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........................ Execution finished normally Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: AssertionError: var is still there: v_arrayElimCell_938 term size 24 --- Real Ultimate output --- This is Ultimate 0.1.23-1dbac8b [2018-10-27 04:46:59,954 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-10-27 04:46:59,956 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-10-27 04:46:59,967 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-10-27 04:46:59,967 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-10-27 04:46:59,968 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-10-27 04:46:59,969 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-10-27 04:46:59,970 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-10-27 04:46:59,971 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-10-27 04:46:59,971 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-10-27 04:46:59,972 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-10-27 04:46:59,972 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-10-27 04:46:59,976 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-10-27 04:46:59,977 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-10-27 04:46:59,978 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-10-27 04:46:59,980 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-10-27 04:46:59,981 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-10-27 04:46:59,982 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-10-27 04:46:59,983 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-10-27 04:46:59,984 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-10-27 04:46:59,986 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-10-27 04:46:59,986 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-10-27 04:46:59,988 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-10-27 04:46:59,988 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-10-27 04:46:59,988 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-10-27 04:46:59,990 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-10-27 04:46:59,990 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-10-27 04:46:59,991 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-10-27 04:46:59,991 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-10-27 04:46:59,992 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-10-27 04:46:59,992 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-10-27 04:46:59,993 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-10-27 04:46:59,994 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-10-27 04:46:59,994 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-10-27 04:46:59,994 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-10-27 04:46:59,995 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-10-27 04:46:59,995 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Default.epf [2018-10-27 04:47:00,007 INFO L110 SettingsManager]: Loading preferences was successful [2018-10-27 04:47:00,007 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-10-27 04:47:00,008 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-10-27 04:47:00,008 INFO L133 SettingsManager]: * User list type=DISABLED [2018-10-27 04:47:00,008 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-10-27 04:47:00,008 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-10-27 04:47:00,008 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-10-27 04:47:00,008 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-10-27 04:47:00,009 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-10-27 04:47:00,011 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-10-27 04:47:00,012 INFO L133 SettingsManager]: * Interval Domain=false [2018-10-27 04:47:00,012 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-10-27 04:47:00,012 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-10-27 04:47:00,012 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-10-27 04:47:00,013 INFO L133 SettingsManager]: * sizeof long=4 [2018-10-27 04:47:00,013 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-10-27 04:47:00,013 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-10-27 04:47:00,013 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-10-27 04:47:00,013 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-10-27 04:47:00,013 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-10-27 04:47:00,013 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-10-27 04:47:00,013 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-10-27 04:47:00,014 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-10-27 04:47:00,014 INFO L133 SettingsManager]: * sizeof long double=12 [2018-10-27 04:47:00,014 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-10-27 04:47:00,014 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-10-27 04:47:00,014 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-10-27 04:47:00,014 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-10-27 04:47:00,014 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-27 04:47:00,014 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-10-27 04:47:00,015 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-10-27 04:47:00,015 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-10-27 04:47:00,015 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-10-27 04:47:00,015 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-10-27 04:47:00,015 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 497bfe83d1a123e7e085e38ee3eed2e663cc023e [2018-10-27 04:47:00,043 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-10-27 04:47:00,056 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-10-27 04:47:00,059 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-10-27 04:47:00,060 INFO L271 PluginConnector]: Initializing CDTParser... [2018-10-27 04:47:00,061 INFO L276 PluginConnector]: CDTParser initialized [2018-10-27 04:47:00,061 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/../../sv-benchmarks/c/forester-heap/dll-optional_true-unreach-call_true-valid-memsafety.i [2018-10-27 04:47:00,108 INFO L218 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/data/8b0992570/617aa6094400465884087bcaeaf4f75a/FLAGb4890ad8f [2018-10-27 04:47:00,529 INFO L298 CDTParser]: Found 1 translation units. [2018-10-27 04:47:00,529 INFO L158 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/sv-benchmarks/c/forester-heap/dll-optional_true-unreach-call_true-valid-memsafety.i [2018-10-27 04:47:00,538 INFO L346 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/data/8b0992570/617aa6094400465884087bcaeaf4f75a/FLAGb4890ad8f [2018-10-27 04:47:00,550 INFO L354 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/data/8b0992570/617aa6094400465884087bcaeaf4f75a [2018-10-27 04:47:00,552 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-10-27 04:47:00,553 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-10-27 04:47:00,554 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-10-27 04:47:00,554 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-10-27 04:47:00,556 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-10-27 04:47:00,557 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.10 04:47:00" (1/1) ... [2018-10-27 04:47:00,559 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@16b2ae80 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:00, skipping insertion in model container [2018-10-27 04:47:00,559 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.10 04:47:00" (1/1) ... [2018-10-27 04:47:00,566 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-10-27 04:47:00,602 INFO L174 MainTranslator]: Built tables and reachable declarations [2018-10-27 04:47:00,856 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-27 04:47:00,870 INFO L189 MainTranslator]: Completed pre-run [2018-10-27 04:47:00,912 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-27 04:47:00,944 INFO L193 MainTranslator]: Completed translation [2018-10-27 04:47:00,944 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:00 WrapperNode [2018-10-27 04:47:00,944 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-10-27 04:47:00,945 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-10-27 04:47:00,945 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-10-27 04:47:00,945 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-10-27 04:47:00,952 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:00" (1/1) ... [2018-10-27 04:47:00,968 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:00" (1/1) ... [2018-10-27 04:47:01,080 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-10-27 04:47:01,080 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-10-27 04:47:01,080 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-10-27 04:47:01,081 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-10-27 04:47:01,088 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:00" (1/1) ... [2018-10-27 04:47:01,088 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:00" (1/1) ... [2018-10-27 04:47:01,104 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:00" (1/1) ... [2018-10-27 04:47:01,104 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:00" (1/1) ... [2018-10-27 04:47:01,134 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:00" (1/1) ... [2018-10-27 04:47:01,138 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:00" (1/1) ... [2018-10-27 04:47:01,141 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:00" (1/1) ... [2018-10-27 04:47:01,144 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-10-27 04:47:01,145 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-10-27 04:47:01,153 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-10-27 04:47:01,153 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-10-27 04:47:01,154 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:00" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-27 04:47:01,200 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-10-27 04:47:01,200 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-10-27 04:47:01,201 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-10-27 04:47:01,201 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-10-27 04:47:01,201 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-10-27 04:47:01,201 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-10-27 04:47:02,341 INFO L341 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-10-27 04:47:02,342 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.10 04:47:02 BoogieIcfgContainer [2018-10-27 04:47:02,342 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-10-27 04:47:02,343 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-10-27 04:47:02,343 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-10-27 04:47:02,345 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-10-27 04:47:02,346 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.10 04:47:00" (1/3) ... [2018-10-27 04:47:02,346 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2671fbd3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.10 04:47:02, skipping insertion in model container [2018-10-27 04:47:02,346 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:00" (2/3) ... [2018-10-27 04:47:02,347 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2671fbd3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.10 04:47:02, skipping insertion in model container [2018-10-27 04:47:02,347 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.10 04:47:02" (3/3) ... [2018-10-27 04:47:02,348 INFO L112 eAbstractionObserver]: Analyzing ICFG dll-optional_true-unreach-call_true-valid-memsafety.i [2018-10-27 04:47:02,357 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-10-27 04:47:02,362 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 69 error locations. [2018-10-27 04:47:02,371 INFO L257 AbstractCegarLoop]: Starting to check reachability of 69 error locations. [2018-10-27 04:47:02,390 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-10-27 04:47:02,391 INFO L383 AbstractCegarLoop]: Hoare is false [2018-10-27 04:47:02,391 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-10-27 04:47:02,391 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-10-27 04:47:02,391 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-10-27 04:47:02,391 INFO L387 AbstractCegarLoop]: Difference is false [2018-10-27 04:47:02,391 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-10-27 04:47:02,391 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-10-27 04:47:02,409 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states. [2018-10-27 04:47:02,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-10-27 04:47:02,417 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:02,417 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:02,420 INFO L424 AbstractCegarLoop]: === Iteration 1 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:02,425 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:02,425 INFO L82 PathProgramCache]: Analyzing trace with hash 431779457, now seen corresponding path program 1 times [2018-10-27 04:47:02,427 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:02,470 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:02,471 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:02,471 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:02,471 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:02,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:02,597 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:02,598 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:02,599 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-27 04:47:02,599 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:02,606 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-27 04:47:02,618 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-27 04:47:02,619 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:47:02,621 INFO L87 Difference]: Start difference. First operand 172 states. Second operand 3 states. [2018-10-27 04:47:03,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:03,268 INFO L93 Difference]: Finished difference Result 198 states and 210 transitions. [2018-10-27 04:47:03,269 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-27 04:47:03,270 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-10-27 04:47:03,270 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:03,280 INFO L225 Difference]: With dead ends: 198 [2018-10-27 04:47:03,280 INFO L226 Difference]: Without dead ends: 194 [2018-10-27 04:47:03,281 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:47:03,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2018-10-27 04:47:03,312 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 168. [2018-10-27 04:47:03,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-10-27 04:47:03,316 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 178 transitions. [2018-10-27 04:47:03,317 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 178 transitions. Word has length 7 [2018-10-27 04:47:03,318 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:03,318 INFO L481 AbstractCegarLoop]: Abstraction has 168 states and 178 transitions. [2018-10-27 04:47:03,318 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-27 04:47:03,318 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 178 transitions. [2018-10-27 04:47:03,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-10-27 04:47:03,318 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:03,318 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:03,320 INFO L424 AbstractCegarLoop]: === Iteration 2 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:03,320 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:03,320 INFO L82 PathProgramCache]: Analyzing trace with hash 500261318, now seen corresponding path program 1 times [2018-10-27 04:47:03,320 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:03,324 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:03,325 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:03,325 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:03,325 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:03,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:03,390 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:03,390 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:03,390 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-27 04:47:03,390 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:03,391 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-27 04:47:03,391 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-27 04:47:03,391 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:47:03,391 INFO L87 Difference]: Start difference. First operand 168 states and 178 transitions. Second operand 3 states. [2018-10-27 04:47:03,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:03,577 INFO L93 Difference]: Finished difference Result 167 states and 177 transitions. [2018-10-27 04:47:03,577 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-27 04:47:03,578 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 8 [2018-10-27 04:47:03,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:03,579 INFO L225 Difference]: With dead ends: 167 [2018-10-27 04:47:03,579 INFO L226 Difference]: Without dead ends: 167 [2018-10-27 04:47:03,580 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:47:03,581 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2018-10-27 04:47:03,587 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 167. [2018-10-27 04:47:03,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-10-27 04:47:03,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 177 transitions. [2018-10-27 04:47:03,590 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 177 transitions. Word has length 8 [2018-10-27 04:47:03,590 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:03,590 INFO L481 AbstractCegarLoop]: Abstraction has 167 states and 177 transitions. [2018-10-27 04:47:03,590 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-27 04:47:03,590 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 177 transitions. [2018-10-27 04:47:03,591 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2018-10-27 04:47:03,591 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:03,591 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:03,592 INFO L424 AbstractCegarLoop]: === Iteration 3 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:03,592 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:03,592 INFO L82 PathProgramCache]: Analyzing trace with hash -1671768285, now seen corresponding path program 1 times [2018-10-27 04:47:03,596 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:03,597 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:03,597 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:03,598 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:03,598 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:03,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:03,663 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:03,664 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:03,664 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:03,664 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:03,664 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:47:03,664 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:47:03,665 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:03,665 INFO L87 Difference]: Start difference. First operand 167 states and 177 transitions. Second operand 5 states. [2018-10-27 04:47:04,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:04,085 INFO L93 Difference]: Finished difference Result 235 states and 251 transitions. [2018-10-27 04:47:04,089 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-27 04:47:04,089 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 9 [2018-10-27 04:47:04,089 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:04,091 INFO L225 Difference]: With dead ends: 235 [2018-10-27 04:47:04,091 INFO L226 Difference]: Without dead ends: 235 [2018-10-27 04:47:04,091 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:47:04,092 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 235 states. [2018-10-27 04:47:04,100 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 235 to 163. [2018-10-27 04:47:04,102 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-10-27 04:47:04,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 173 transitions. [2018-10-27 04:47:04,105 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 173 transitions. Word has length 9 [2018-10-27 04:47:04,105 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:04,105 INFO L481 AbstractCegarLoop]: Abstraction has 163 states and 173 transitions. [2018-10-27 04:47:04,106 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:47:04,106 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 173 transitions. [2018-10-27 04:47:04,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2018-10-27 04:47:04,106 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:04,106 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:04,107 INFO L424 AbstractCegarLoop]: === Iteration 4 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:04,108 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:04,108 INFO L82 PathProgramCache]: Analyzing trace with hash -285209240, now seen corresponding path program 1 times [2018-10-27 04:47:04,108 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:04,110 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:04,110 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:04,110 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:04,110 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:04,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:04,170 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:04,170 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:04,170 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 04:47:04,171 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:04,171 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:47:04,171 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:47:04,171 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:47:04,172 INFO L87 Difference]: Start difference. First operand 163 states and 173 transitions. Second operand 4 states. [2018-10-27 04:47:04,330 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:04,331 INFO L93 Difference]: Finished difference Result 167 states and 177 transitions. [2018-10-27 04:47:04,333 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 04:47:04,333 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 10 [2018-10-27 04:47:04,333 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:04,334 INFO L225 Difference]: With dead ends: 167 [2018-10-27 04:47:04,334 INFO L226 Difference]: Without dead ends: 167 [2018-10-27 04:47:04,334 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:04,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2018-10-27 04:47:04,345 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 162. [2018-10-27 04:47:04,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-10-27 04:47:04,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 172 transitions. [2018-10-27 04:47:04,347 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 172 transitions. Word has length 10 [2018-10-27 04:47:04,347 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:04,347 INFO L481 AbstractCegarLoop]: Abstraction has 162 states and 172 transitions. [2018-10-27 04:47:04,347 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:47:04,347 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 172 transitions. [2018-10-27 04:47:04,348 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-10-27 04:47:04,348 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:04,348 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:04,351 INFO L424 AbstractCegarLoop]: === Iteration 5 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:04,351 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:04,351 INFO L82 PathProgramCache]: Analyzing trace with hash 791828778, now seen corresponding path program 1 times [2018-10-27 04:47:04,351 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:04,352 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:04,352 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:04,353 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:04,353 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:04,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:04,426 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:04,426 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:04,426 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-27 04:47:04,426 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:04,427 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-27 04:47:04,427 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-27 04:47:04,427 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-10-27 04:47:04,428 INFO L87 Difference]: Start difference. First operand 162 states and 172 transitions. Second operand 6 states. [2018-10-27 04:47:04,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:04,755 INFO L93 Difference]: Finished difference Result 231 states and 247 transitions. [2018-10-27 04:47:04,755 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 04:47:04,755 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 12 [2018-10-27 04:47:04,756 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:04,756 INFO L225 Difference]: With dead ends: 231 [2018-10-27 04:47:04,756 INFO L226 Difference]: Without dead ends: 231 [2018-10-27 04:47:04,757 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:47:04,757 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 231 states. [2018-10-27 04:47:04,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 231 to 159. [2018-10-27 04:47:04,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-10-27 04:47:04,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 169 transitions. [2018-10-27 04:47:04,764 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 169 transitions. Word has length 12 [2018-10-27 04:47:04,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:04,764 INFO L481 AbstractCegarLoop]: Abstraction has 159 states and 169 transitions. [2018-10-27 04:47:04,764 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-27 04:47:04,764 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 169 transitions. [2018-10-27 04:47:04,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-10-27 04:47:04,766 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:04,766 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:04,767 INFO L424 AbstractCegarLoop]: === Iteration 6 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:04,768 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:04,768 INFO L82 PathProgramCache]: Analyzing trace with hash -1223111608, now seen corresponding path program 1 times [2018-10-27 04:47:04,768 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:04,769 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:04,769 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:04,769 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:04,770 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:04,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:04,848 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:04,848 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:04,849 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 04:47:04,849 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:04,849 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:47:04,849 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:47:04,849 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:47:04,850 INFO L87 Difference]: Start difference. First operand 159 states and 169 transitions. Second operand 4 states. [2018-10-27 04:47:05,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:05,019 INFO L93 Difference]: Finished difference Result 254 states and 272 transitions. [2018-10-27 04:47:05,020 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 04:47:05,020 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2018-10-27 04:47:05,021 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:05,021 INFO L225 Difference]: With dead ends: 254 [2018-10-27 04:47:05,021 INFO L226 Difference]: Without dead ends: 254 [2018-10-27 04:47:05,022 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:05,022 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 254 states. [2018-10-27 04:47:05,024 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 254 to 156. [2018-10-27 04:47:05,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156 states. [2018-10-27 04:47:05,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 166 transitions. [2018-10-27 04:47:05,031 INFO L78 Accepts]: Start accepts. Automaton has 156 states and 166 transitions. Word has length 13 [2018-10-27 04:47:05,031 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:05,031 INFO L481 AbstractCegarLoop]: Abstraction has 156 states and 166 transitions. [2018-10-27 04:47:05,031 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:47:05,031 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states and 166 transitions. [2018-10-27 04:47:05,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-10-27 04:47:05,032 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:05,032 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:05,033 INFO L424 AbstractCegarLoop]: === Iteration 7 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:05,033 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:05,033 INFO L82 PathProgramCache]: Analyzing trace with hash 1410785482, now seen corresponding path program 1 times [2018-10-27 04:47:05,033 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:05,034 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:05,034 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:05,035 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:05,035 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:05,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:05,183 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:05,183 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:05,183 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:05,183 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:05,184 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:47:05,184 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:47:05,184 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:05,184 INFO L87 Difference]: Start difference. First operand 156 states and 166 transitions. Second operand 5 states. [2018-10-27 04:47:05,460 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:05,460 INFO L93 Difference]: Finished difference Result 230 states and 246 transitions. [2018-10-27 04:47:05,463 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-27 04:47:05,464 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 15 [2018-10-27 04:47:05,464 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:05,465 INFO L225 Difference]: With dead ends: 230 [2018-10-27 04:47:05,465 INFO L226 Difference]: Without dead ends: 230 [2018-10-27 04:47:05,465 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-10-27 04:47:05,465 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 230 states. [2018-10-27 04:47:05,468 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 230 to 153. [2018-10-27 04:47:05,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153 states. [2018-10-27 04:47:05,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 163 transitions. [2018-10-27 04:47:05,471 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 163 transitions. Word has length 15 [2018-10-27 04:47:05,471 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:05,471 INFO L481 AbstractCegarLoop]: Abstraction has 153 states and 163 transitions. [2018-10-27 04:47:05,471 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:47:05,471 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 163 transitions. [2018-10-27 04:47:05,472 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-10-27 04:47:05,472 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:05,472 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:05,473 INFO L424 AbstractCegarLoop]: === Iteration 8 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:05,473 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:05,473 INFO L82 PathProgramCache]: Analyzing trace with hash 784677038, now seen corresponding path program 1 times [2018-10-27 04:47:05,473 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:05,474 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:05,474 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:05,474 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:05,474 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:05,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:05,604 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:05,604 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:05,604 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:05,604 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:05,604 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:47:05,605 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:47:05,605 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:05,605 INFO L87 Difference]: Start difference. First operand 153 states and 163 transitions. Second operand 5 states. [2018-10-27 04:47:06,355 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:06,355 INFO L93 Difference]: Finished difference Result 232 states and 251 transitions. [2018-10-27 04:47:06,356 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 04:47:06,356 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-10-27 04:47:06,356 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:06,357 INFO L225 Difference]: With dead ends: 232 [2018-10-27 04:47:06,357 INFO L226 Difference]: Without dead ends: 232 [2018-10-27 04:47:06,357 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-10-27 04:47:06,358 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 232 states. [2018-10-27 04:47:06,360 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 232 to 152. [2018-10-27 04:47:06,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-10-27 04:47:06,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 162 transitions. [2018-10-27 04:47:06,361 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 162 transitions. Word has length 16 [2018-10-27 04:47:06,361 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:06,361 INFO L481 AbstractCegarLoop]: Abstraction has 152 states and 162 transitions. [2018-10-27 04:47:06,361 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:47:06,361 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 162 transitions. [2018-10-27 04:47:06,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-10-27 04:47:06,362 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:06,362 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:06,363 INFO L424 AbstractCegarLoop]: === Iteration 9 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:06,363 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:06,363 INFO L82 PathProgramCache]: Analyzing trace with hash -1444815540, now seen corresponding path program 1 times [2018-10-27 04:47:06,363 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:06,364 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:06,364 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:06,364 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:06,364 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:06,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:06,553 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:06,554 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:06,554 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:06,554 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:06,554 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:47:06,554 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:47:06,554 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:06,554 INFO L87 Difference]: Start difference. First operand 152 states and 162 transitions. Second operand 5 states. [2018-10-27 04:47:06,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:06,779 INFO L93 Difference]: Finished difference Result 222 states and 242 transitions. [2018-10-27 04:47:06,779 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-27 04:47:06,779 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-10-27 04:47:06,779 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:06,780 INFO L225 Difference]: With dead ends: 222 [2018-10-27 04:47:06,780 INFO L226 Difference]: Without dead ends: 222 [2018-10-27 04:47:06,781 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:47:06,781 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states. [2018-10-27 04:47:06,783 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 151. [2018-10-27 04:47:06,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-10-27 04:47:06,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 161 transitions. [2018-10-27 04:47:06,784 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 161 transitions. Word has length 17 [2018-10-27 04:47:06,784 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:06,784 INFO L481 AbstractCegarLoop]: Abstraction has 151 states and 161 transitions. [2018-10-27 04:47:06,784 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:47:06,784 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 161 transitions. [2018-10-27 04:47:06,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-10-27 04:47:06,787 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:06,787 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:06,788 INFO L424 AbstractCegarLoop]: === Iteration 10 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:06,788 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:06,789 INFO L82 PathProgramCache]: Analyzing trace with hash -1839608720, now seen corresponding path program 1 times [2018-10-27 04:47:06,789 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:06,790 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:06,790 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:06,790 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:06,790 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:06,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:06,847 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:06,847 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:06,847 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:06,847 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:06,848 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:47:06,848 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:47:06,848 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:06,848 INFO L87 Difference]: Start difference. First operand 151 states and 161 transitions. Second operand 5 states. [2018-10-27 04:47:07,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:07,209 INFO L93 Difference]: Finished difference Result 176 states and 187 transitions. [2018-10-27 04:47:07,209 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 04:47:07,210 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 18 [2018-10-27 04:47:07,210 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:07,210 INFO L225 Difference]: With dead ends: 176 [2018-10-27 04:47:07,210 INFO L226 Difference]: Without dead ends: 176 [2018-10-27 04:47:07,211 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:47:07,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-10-27 04:47:07,213 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 150. [2018-10-27 04:47:07,213 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-10-27 04:47:07,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 160 transitions. [2018-10-27 04:47:07,214 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 160 transitions. Word has length 18 [2018-10-27 04:47:07,214 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:07,214 INFO L481 AbstractCegarLoop]: Abstraction has 150 states and 160 transitions. [2018-10-27 04:47:07,214 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:47:07,214 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 160 transitions. [2018-10-27 04:47:07,215 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-10-27 04:47:07,215 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:07,215 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:07,215 INFO L424 AbstractCegarLoop]: === Iteration 11 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:07,216 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:07,216 INFO L82 PathProgramCache]: Analyzing trace with hash -1193295410, now seen corresponding path program 1 times [2018-10-27 04:47:07,216 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:07,217 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:07,221 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:07,221 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:07,221 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:07,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:07,453 WARN L179 SmtUtils]: Spent 143.00 ms on a formula simplification that was a NOOP. DAG size: 18 [2018-10-27 04:47:07,480 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:07,480 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:07,480 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:07,480 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:07,480 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:47:07,480 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:47:07,480 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:07,481 INFO L87 Difference]: Start difference. First operand 150 states and 160 transitions. Second operand 5 states. [2018-10-27 04:47:08,055 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:08,055 INFO L93 Difference]: Finished difference Result 216 states and 232 transitions. [2018-10-27 04:47:08,056 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-27 04:47:08,056 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2018-10-27 04:47:08,056 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:08,057 INFO L225 Difference]: With dead ends: 216 [2018-10-27 04:47:08,057 INFO L226 Difference]: Without dead ends: 216 [2018-10-27 04:47:08,057 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:47:08,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-10-27 04:47:08,060 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 149. [2018-10-27 04:47:08,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-10-27 04:47:08,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 159 transitions. [2018-10-27 04:47:08,061 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 159 transitions. Word has length 19 [2018-10-27 04:47:08,061 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:08,061 INFO L481 AbstractCegarLoop]: Abstraction has 149 states and 159 transitions. [2018-10-27 04:47:08,061 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:47:08,061 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 159 transitions. [2018-10-27 04:47:08,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-10-27 04:47:08,062 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:08,062 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:08,064 INFO L424 AbstractCegarLoop]: === Iteration 12 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:08,064 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:08,064 INFO L82 PathProgramCache]: Analyzing trace with hash 1601358380, now seen corresponding path program 1 times [2018-10-27 04:47:08,065 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:08,065 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:08,066 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:08,066 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:08,066 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:08,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:08,369 WARN L179 SmtUtils]: Spent 164.00 ms on a formula simplification. DAG size of input: 9 DAG size of output: 8 [2018-10-27 04:47:08,506 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:08,506 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:08,506 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-27 04:47:08,506 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:08,506 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-27 04:47:08,506 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-27 04:47:08,506 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:47:08,507 INFO L87 Difference]: Start difference. First operand 149 states and 159 transitions. Second operand 7 states. [2018-10-27 04:47:08,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:08,788 INFO L93 Difference]: Finished difference Result 311 states and 336 transitions. [2018-10-27 04:47:08,788 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-27 04:47:08,788 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 21 [2018-10-27 04:47:08,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:08,789 INFO L225 Difference]: With dead ends: 311 [2018-10-27 04:47:08,789 INFO L226 Difference]: Without dead ends: 311 [2018-10-27 04:47:08,790 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2018-10-27 04:47:08,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 311 states. [2018-10-27 04:47:08,793 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 311 to 162. [2018-10-27 04:47:08,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-10-27 04:47:08,794 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 180 transitions. [2018-10-27 04:47:08,794 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 180 transitions. Word has length 21 [2018-10-27 04:47:08,795 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:08,795 INFO L481 AbstractCegarLoop]: Abstraction has 162 states and 180 transitions. [2018-10-27 04:47:08,795 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-27 04:47:08,795 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 180 transitions. [2018-10-27 04:47:08,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-10-27 04:47:08,795 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:08,796 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:08,796 INFO L424 AbstractCegarLoop]: === Iteration 13 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:08,796 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:08,796 INFO L82 PathProgramCache]: Analyzing trace with hash -1897497670, now seen corresponding path program 1 times [2018-10-27 04:47:08,797 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:08,802 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:08,802 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:08,803 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:08,803 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:08,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:08,871 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:08,872 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:08,872 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-27 04:47:08,872 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:08,872 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-27 04:47:08,872 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-27 04:47:08,872 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-10-27 04:47:08,873 INFO L87 Difference]: Start difference. First operand 162 states and 180 transitions. Second operand 6 states. [2018-10-27 04:47:09,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:09,290 INFO L93 Difference]: Finished difference Result 317 states and 342 transitions. [2018-10-27 04:47:09,291 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-27 04:47:09,291 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2018-10-27 04:47:09,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:09,292 INFO L225 Difference]: With dead ends: 317 [2018-10-27 04:47:09,292 INFO L226 Difference]: Without dead ends: 317 [2018-10-27 04:47:09,293 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=59, Unknown=0, NotChecked=0, Total=90 [2018-10-27 04:47:09,293 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 317 states. [2018-10-27 04:47:09,295 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 317 to 168. [2018-10-27 04:47:09,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-10-27 04:47:09,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 189 transitions. [2018-10-27 04:47:09,296 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 189 transitions. Word has length 22 [2018-10-27 04:47:09,296 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:09,297 INFO L481 AbstractCegarLoop]: Abstraction has 168 states and 189 transitions. [2018-10-27 04:47:09,299 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-27 04:47:09,299 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 189 transitions. [2018-10-27 04:47:09,300 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-10-27 04:47:09,300 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:09,300 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:09,300 INFO L424 AbstractCegarLoop]: === Iteration 14 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:09,300 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:09,300 INFO L82 PathProgramCache]: Analyzing trace with hash 1307114478, now seen corresponding path program 1 times [2018-10-27 04:47:09,301 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:09,304 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:09,305 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:09,305 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:09,305 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:09,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:09,414 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:09,415 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:09,415 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:09,415 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:09,415 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:47:09,415 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:47:09,415 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:09,415 INFO L87 Difference]: Start difference. First operand 168 states and 189 transitions. Second operand 5 states. [2018-10-27 04:47:09,576 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:09,576 INFO L93 Difference]: Finished difference Result 200 states and 227 transitions. [2018-10-27 04:47:09,577 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 04:47:09,577 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 23 [2018-10-27 04:47:09,577 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:09,578 INFO L225 Difference]: With dead ends: 200 [2018-10-27 04:47:09,578 INFO L226 Difference]: Without dead ends: 200 [2018-10-27 04:47:09,578 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:47:09,578 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 200 states. [2018-10-27 04:47:09,580 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 200 to 167. [2018-10-27 04:47:09,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-10-27 04:47:09,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 189 transitions. [2018-10-27 04:47:09,581 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 189 transitions. Word has length 23 [2018-10-27 04:47:09,581 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:09,582 INFO L481 AbstractCegarLoop]: Abstraction has 167 states and 189 transitions. [2018-10-27 04:47:09,582 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:47:09,582 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 189 transitions. [2018-10-27 04:47:09,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-10-27 04:47:09,582 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:09,583 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:09,583 INFO L424 AbstractCegarLoop]: === Iteration 15 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:09,583 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:09,583 INFO L82 PathProgramCache]: Analyzing trace with hash 1865843260, now seen corresponding path program 1 times [2018-10-27 04:47:09,583 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:09,584 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:09,584 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:09,584 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:09,584 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:09,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:09,747 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:09,748 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:09,748 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-27 04:47:09,748 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:09,748 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-27 04:47:09,748 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-27 04:47:09,748 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-10-27 04:47:09,749 INFO L87 Difference]: Start difference. First operand 167 states and 189 transitions. Second operand 6 states. [2018-10-27 04:47:10,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:10,078 INFO L93 Difference]: Finished difference Result 221 states and 239 transitions. [2018-10-27 04:47:10,079 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 04:47:10,079 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 24 [2018-10-27 04:47:10,079 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:10,080 INFO L225 Difference]: With dead ends: 221 [2018-10-27 04:47:10,080 INFO L226 Difference]: Without dead ends: 221 [2018-10-27 04:47:10,080 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=35, Invalid=55, Unknown=0, NotChecked=0, Total=90 [2018-10-27 04:47:10,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states. [2018-10-27 04:47:10,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 169. [2018-10-27 04:47:10,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-10-27 04:47:10,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 191 transitions. [2018-10-27 04:47:10,084 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 191 transitions. Word has length 24 [2018-10-27 04:47:10,084 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:10,084 INFO L481 AbstractCegarLoop]: Abstraction has 169 states and 191 transitions. [2018-10-27 04:47:10,084 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-27 04:47:10,084 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 191 transitions. [2018-10-27 04:47:10,084 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-10-27 04:47:10,084 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:10,084 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:10,089 INFO L424 AbstractCegarLoop]: === Iteration 16 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:10,090 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:10,090 INFO L82 PathProgramCache]: Analyzing trace with hash 2011403447, now seen corresponding path program 1 times [2018-10-27 04:47:10,090 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:10,090 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:10,091 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:10,091 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:10,091 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:10,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:10,458 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:10,458 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:10,458 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-27 04:47:10,458 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:10,458 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-27 04:47:10,458 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-27 04:47:10,459 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-10-27 04:47:10,459 INFO L87 Difference]: Start difference. First operand 169 states and 191 transitions. Second operand 6 states. [2018-10-27 04:47:10,963 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:10,963 INFO L93 Difference]: Finished difference Result 322 states and 348 transitions. [2018-10-27 04:47:10,964 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-10-27 04:47:10,964 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2018-10-27 04:47:10,964 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:10,966 INFO L225 Difference]: With dead ends: 322 [2018-10-27 04:47:10,966 INFO L226 Difference]: Without dead ends: 322 [2018-10-27 04:47:10,966 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2018-10-27 04:47:10,966 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 322 states. [2018-10-27 04:47:10,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 322 to 173. [2018-10-27 04:47:10,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-10-27 04:47:10,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 195 transitions. [2018-10-27 04:47:10,969 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 195 transitions. Word has length 25 [2018-10-27 04:47:10,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:10,969 INFO L481 AbstractCegarLoop]: Abstraction has 173 states and 195 transitions. [2018-10-27 04:47:10,969 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-27 04:47:10,969 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 195 transitions. [2018-10-27 04:47:10,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-10-27 04:47:10,970 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:10,970 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:10,970 INFO L424 AbstractCegarLoop]: === Iteration 17 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:10,970 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:10,971 INFO L82 PathProgramCache]: Analyzing trace with hash 2006566320, now seen corresponding path program 1 times [2018-10-27 04:47:10,971 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:10,971 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:10,971 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:10,972 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:10,972 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:10,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:11,137 WARN L179 SmtUtils]: Spent 103.00 ms on a formula simplification that was a NOOP. DAG size: 12 [2018-10-27 04:47:11,306 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:11,306 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:11,306 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:11,306 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:11,306 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:47:11,306 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:47:11,306 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:11,307 INFO L87 Difference]: Start difference. First operand 173 states and 195 transitions. Second operand 5 states. [2018-10-27 04:47:11,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:11,840 INFO L93 Difference]: Finished difference Result 182 states and 196 transitions. [2018-10-27 04:47:11,840 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 04:47:11,840 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2018-10-27 04:47:11,840 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:11,841 INFO L225 Difference]: With dead ends: 182 [2018-10-27 04:47:11,841 INFO L226 Difference]: Without dead ends: 182 [2018-10-27 04:47:11,841 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:47:11,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-10-27 04:47:11,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 172. [2018-10-27 04:47:11,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-10-27 04:47:11,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 194 transitions. [2018-10-27 04:47:11,844 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 194 transitions. Word has length 25 [2018-10-27 04:47:11,844 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:11,844 INFO L481 AbstractCegarLoop]: Abstraction has 172 states and 194 transitions. [2018-10-27 04:47:11,844 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:47:11,844 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 194 transitions. [2018-10-27 04:47:11,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-10-27 04:47:11,847 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:11,848 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:11,848 INFO L424 AbstractCegarLoop]: === Iteration 18 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:11,848 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:11,848 INFO L82 PathProgramCache]: Analyzing trace with hash -2071002400, now seen corresponding path program 1 times [2018-10-27 04:47:11,848 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:11,849 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:11,849 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:11,849 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:11,849 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:11,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:12,016 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:12,016 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:12,016 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:12,016 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:12,016 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:47:12,016 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:47:12,016 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:12,017 INFO L87 Difference]: Start difference. First operand 172 states and 194 transitions. Second operand 5 states. [2018-10-27 04:47:12,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:12,296 INFO L93 Difference]: Finished difference Result 243 states and 261 transitions. [2018-10-27 04:47:12,297 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 04:47:12,297 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2018-10-27 04:47:12,297 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:12,298 INFO L225 Difference]: With dead ends: 243 [2018-10-27 04:47:12,298 INFO L226 Difference]: Without dead ends: 243 [2018-10-27 04:47:12,298 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:47:12,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 243 states. [2018-10-27 04:47:12,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 243 to 173. [2018-10-27 04:47:12,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-10-27 04:47:12,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 194 transitions. [2018-10-27 04:47:12,301 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 194 transitions. Word has length 26 [2018-10-27 04:47:12,301 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:12,301 INFO L481 AbstractCegarLoop]: Abstraction has 173 states and 194 transitions. [2018-10-27 04:47:12,302 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:47:12,302 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 194 transitions. [2018-10-27 04:47:12,302 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-10-27 04:47:12,302 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:12,302 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:12,303 INFO L424 AbstractCegarLoop]: === Iteration 19 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:12,303 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:12,303 INFO L82 PathProgramCache]: Analyzing trace with hash 2074013886, now seen corresponding path program 1 times [2018-10-27 04:47:12,303 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:12,304 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:12,304 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:12,304 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:12,304 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:12,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:12,517 WARN L179 SmtUtils]: Spent 124.00 ms on a formula simplification that was a NOOP. DAG size: 15 [2018-10-27 04:47:12,553 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:12,554 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:12,554 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:12,554 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:12,554 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:47:12,554 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:47:12,554 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:12,555 INFO L87 Difference]: Start difference. First operand 173 states and 194 transitions. Second operand 5 states. [2018-10-27 04:47:12,740 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:12,740 INFO L93 Difference]: Finished difference Result 172 states and 193 transitions. [2018-10-27 04:47:12,740 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-27 04:47:12,741 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2018-10-27 04:47:12,741 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:12,741 INFO L225 Difference]: With dead ends: 172 [2018-10-27 04:47:12,741 INFO L226 Difference]: Without dead ends: 172 [2018-10-27 04:47:12,742 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:47:12,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2018-10-27 04:47:12,744 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 172. [2018-10-27 04:47:12,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-10-27 04:47:12,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 193 transitions. [2018-10-27 04:47:12,745 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 193 transitions. Word has length 26 [2018-10-27 04:47:12,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:12,745 INFO L481 AbstractCegarLoop]: Abstraction has 172 states and 193 transitions. [2018-10-27 04:47:12,745 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:47:12,745 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 193 transitions. [2018-10-27 04:47:12,745 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-10-27 04:47:12,745 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:12,746 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:12,746 INFO L424 AbstractCegarLoop]: === Iteration 20 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:12,746 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:12,746 INFO L82 PathProgramCache]: Analyzing trace with hash 223529689, now seen corresponding path program 1 times [2018-10-27 04:47:12,746 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:12,747 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:12,747 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:12,747 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:12,747 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:12,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:12,828 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:12,828 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:12,828 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:12,828 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:12,829 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:47:12,829 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:47:12,829 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:47:12,829 INFO L87 Difference]: Start difference. First operand 172 states and 193 transitions. Second operand 4 states. [2018-10-27 04:47:12,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:12,972 INFO L93 Difference]: Finished difference Result 219 states and 236 transitions. [2018-10-27 04:47:12,973 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 04:47:12,973 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 27 [2018-10-27 04:47:12,973 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:12,974 INFO L225 Difference]: With dead ends: 219 [2018-10-27 04:47:12,974 INFO L226 Difference]: Without dead ends: 219 [2018-10-27 04:47:12,974 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:12,974 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219 states. [2018-10-27 04:47:12,976 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219 to 172. [2018-10-27 04:47:12,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-10-27 04:47:12,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 191 transitions. [2018-10-27 04:47:12,978 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 191 transitions. Word has length 27 [2018-10-27 04:47:12,978 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:12,978 INFO L481 AbstractCegarLoop]: Abstraction has 172 states and 191 transitions. [2018-10-27 04:47:12,978 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:47:12,978 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 191 transitions. [2018-10-27 04:47:12,979 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-10-27 04:47:12,979 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:12,979 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:12,979 INFO L424 AbstractCegarLoop]: === Iteration 21 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:12,980 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:12,980 INFO L82 PathProgramCache]: Analyzing trace with hash -130078862, now seen corresponding path program 1 times [2018-10-27 04:47:12,980 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:12,981 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:12,981 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:12,981 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:12,981 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:12,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:13,137 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:13,137 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:13,137 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-27 04:47:13,137 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:13,138 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-27 04:47:13,138 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-27 04:47:13,138 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-10-27 04:47:13,138 INFO L87 Difference]: Start difference. First operand 172 states and 191 transitions. Second operand 6 states. [2018-10-27 04:47:13,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:13,381 INFO L93 Difference]: Finished difference Result 196 states and 219 transitions. [2018-10-27 04:47:13,381 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-27 04:47:13,381 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2018-10-27 04:47:13,381 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:13,382 INFO L225 Difference]: With dead ends: 196 [2018-10-27 04:47:13,382 INFO L226 Difference]: Without dead ends: 196 [2018-10-27 04:47:13,382 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-10-27 04:47:13,383 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states. [2018-10-27 04:47:13,384 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 166. [2018-10-27 04:47:13,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-10-27 04:47:13,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 184 transitions. [2018-10-27 04:47:13,385 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 184 transitions. Word has length 27 [2018-10-27 04:47:13,385 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:13,385 INFO L481 AbstractCegarLoop]: Abstraction has 166 states and 184 transitions. [2018-10-27 04:47:13,385 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-27 04:47:13,385 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 184 transitions. [2018-10-27 04:47:13,385 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-10-27 04:47:13,385 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:13,386 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:13,386 INFO L424 AbstractCegarLoop]: === Iteration 22 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:13,386 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:13,386 INFO L82 PathProgramCache]: Analyzing trace with hash -1663442398, now seen corresponding path program 1 times [2018-10-27 04:47:13,386 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:13,387 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:13,387 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:13,387 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:13,387 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:13,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:13,450 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:13,450 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:13,450 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-27 04:47:13,450 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:13,451 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-27 04:47:13,451 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-27 04:47:13,451 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:47:13,451 INFO L87 Difference]: Start difference. First operand 166 states and 184 transitions. Second operand 7 states. [2018-10-27 04:47:13,718 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:13,719 INFO L93 Difference]: Finished difference Result 285 states and 310 transitions. [2018-10-27 04:47:13,720 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-10-27 04:47:13,720 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 28 [2018-10-27 04:47:13,720 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:13,721 INFO L225 Difference]: With dead ends: 285 [2018-10-27 04:47:13,721 INFO L226 Difference]: Without dead ends: 285 [2018-10-27 04:47:13,722 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2018-10-27 04:47:13,722 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 285 states. [2018-10-27 04:47:13,723 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 285 to 183. [2018-10-27 04:47:13,724 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2018-10-27 04:47:13,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 207 transitions. [2018-10-27 04:47:13,724 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 207 transitions. Word has length 28 [2018-10-27 04:47:13,724 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:13,724 INFO L481 AbstractCegarLoop]: Abstraction has 183 states and 207 transitions. [2018-10-27 04:47:13,724 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-27 04:47:13,724 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 207 transitions. [2018-10-27 04:47:13,725 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-10-27 04:47:13,725 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:13,725 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:13,725 INFO L424 AbstractCegarLoop]: === Iteration 23 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:13,725 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:13,726 INFO L82 PathProgramCache]: Analyzing trace with hash 262522688, now seen corresponding path program 1 times [2018-10-27 04:47:13,726 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:13,726 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:13,727 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:13,727 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:13,727 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:13,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:13,879 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:13,879 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:13,880 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-27 04:47:13,880 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:13,880 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-27 04:47:13,880 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-27 04:47:13,880 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:47:13,880 INFO L87 Difference]: Start difference. First operand 183 states and 207 transitions. Second operand 7 states. [2018-10-27 04:47:14,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:14,168 INFO L93 Difference]: Finished difference Result 263 states and 288 transitions. [2018-10-27 04:47:14,169 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-27 04:47:14,169 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 28 [2018-10-27 04:47:14,169 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:14,170 INFO L225 Difference]: With dead ends: 263 [2018-10-27 04:47:14,170 INFO L226 Difference]: Without dead ends: 263 [2018-10-27 04:47:14,170 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=87, Unknown=0, NotChecked=0, Total=132 [2018-10-27 04:47:14,170 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 263 states. [2018-10-27 04:47:14,172 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 263 to 187. [2018-10-27 04:47:14,172 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 187 states. [2018-10-27 04:47:14,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 187 states to 187 states and 211 transitions. [2018-10-27 04:47:14,173 INFO L78 Accepts]: Start accepts. Automaton has 187 states and 211 transitions. Word has length 28 [2018-10-27 04:47:14,173 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:14,173 INFO L481 AbstractCegarLoop]: Abstraction has 187 states and 211 transitions. [2018-10-27 04:47:14,173 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-27 04:47:14,174 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 211 transitions. [2018-10-27 04:47:14,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-10-27 04:47:14,174 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:14,174 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:14,174 INFO L424 AbstractCegarLoop]: === Iteration 24 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:14,175 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:14,175 INFO L82 PathProgramCache]: Analyzing trace with hash -27106596, now seen corresponding path program 1 times [2018-10-27 04:47:14,175 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:14,175 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:14,176 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:14,176 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:14,176 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:14,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:14,333 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:14,333 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:14,333 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:14,333 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:14,334 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:47:14,334 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:47:14,334 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:14,334 INFO L87 Difference]: Start difference. First operand 187 states and 211 transitions. Second operand 5 states. [2018-10-27 04:47:14,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:14,563 INFO L93 Difference]: Finished difference Result 227 states and 246 transitions. [2018-10-27 04:47:14,563 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-27 04:47:14,564 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-10-27 04:47:14,564 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:14,564 INFO L225 Difference]: With dead ends: 227 [2018-10-27 04:47:14,564 INFO L226 Difference]: Without dead ends: 227 [2018-10-27 04:47:14,565 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:47:14,565 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227 states. [2018-10-27 04:47:14,567 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227 to 187. [2018-10-27 04:47:14,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 187 states. [2018-10-27 04:47:14,567 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 187 states to 187 states and 207 transitions. [2018-10-27 04:47:14,567 INFO L78 Accepts]: Start accepts. Automaton has 187 states and 207 transitions. Word has length 29 [2018-10-27 04:47:14,568 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:14,568 INFO L481 AbstractCegarLoop]: Abstraction has 187 states and 207 transitions. [2018-10-27 04:47:14,568 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:47:14,568 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 207 transitions. [2018-10-27 04:47:14,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-10-27 04:47:14,568 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:14,568 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:14,569 INFO L424 AbstractCegarLoop]: === Iteration 25 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:14,569 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:14,569 INFO L82 PathProgramCache]: Analyzing trace with hash -451731148, now seen corresponding path program 1 times [2018-10-27 04:47:14,569 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:14,570 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:14,570 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:14,570 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:14,570 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:14,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:14,737 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:14,737 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:14,738 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-10-27 04:47:14,738 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:14,738 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-10-27 04:47:14,738 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-10-27 04:47:14,738 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2018-10-27 04:47:14,738 INFO L87 Difference]: Start difference. First operand 187 states and 207 transitions. Second operand 11 states. [2018-10-27 04:47:15,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:15,206 INFO L93 Difference]: Finished difference Result 262 states and 285 transitions. [2018-10-27 04:47:15,207 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-10-27 04:47:15,207 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 29 [2018-10-27 04:47:15,207 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:15,208 INFO L225 Difference]: With dead ends: 262 [2018-10-27 04:47:15,208 INFO L226 Difference]: Without dead ends: 262 [2018-10-27 04:47:15,208 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=103, Invalid=277, Unknown=0, NotChecked=0, Total=380 [2018-10-27 04:47:15,208 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 262 states. [2018-10-27 04:47:15,210 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 262 to 186. [2018-10-27 04:47:15,210 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-10-27 04:47:15,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 206 transitions. [2018-10-27 04:47:15,211 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 206 transitions. Word has length 29 [2018-10-27 04:47:15,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:15,211 INFO L481 AbstractCegarLoop]: Abstraction has 186 states and 206 transitions. [2018-10-27 04:47:15,211 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-10-27 04:47:15,211 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 206 transitions. [2018-10-27 04:47:15,211 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-10-27 04:47:15,211 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:15,211 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:15,212 INFO L424 AbstractCegarLoop]: === Iteration 26 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:15,212 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:15,212 INFO L82 PathProgramCache]: Analyzing trace with hash -1118763582, now seen corresponding path program 1 times [2018-10-27 04:47:15,212 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:15,221 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:15,221 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:15,221 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:15,221 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:15,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:15,561 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:15,561 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:15,562 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-10-27 04:47:15,562 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:15,562 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-10-27 04:47:15,562 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-10-27 04:47:15,562 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2018-10-27 04:47:15,562 INFO L87 Difference]: Start difference. First operand 186 states and 206 transitions. Second operand 11 states. [2018-10-27 04:47:16,116 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:16,116 INFO L93 Difference]: Finished difference Result 279 states and 304 transitions. [2018-10-27 04:47:16,117 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-10-27 04:47:16,117 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 30 [2018-10-27 04:47:16,117 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:16,118 INFO L225 Difference]: With dead ends: 279 [2018-10-27 04:47:16,118 INFO L226 Difference]: Without dead ends: 279 [2018-10-27 04:47:16,118 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=80, Invalid=300, Unknown=0, NotChecked=0, Total=380 [2018-10-27 04:47:16,118 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 279 states. [2018-10-27 04:47:16,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 279 to 188. [2018-10-27 04:47:16,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-10-27 04:47:16,121 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 208 transitions. [2018-10-27 04:47:16,121 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 208 transitions. Word has length 30 [2018-10-27 04:47:16,121 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:16,121 INFO L481 AbstractCegarLoop]: Abstraction has 188 states and 208 transitions. [2018-10-27 04:47:16,121 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-10-27 04:47:16,121 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 208 transitions. [2018-10-27 04:47:16,122 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-10-27 04:47:16,122 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:16,122 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:16,122 INFO L424 AbstractCegarLoop]: === Iteration 27 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:16,122 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:16,123 INFO L82 PathProgramCache]: Analyzing trace with hash 98972454, now seen corresponding path program 1 times [2018-10-27 04:47:16,123 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:16,123 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:16,124 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:16,124 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:16,124 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:16,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:16,193 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:16,194 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:16,194 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:16,194 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:16,194 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:47:16,194 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:47:16,194 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:47:16,194 INFO L87 Difference]: Start difference. First operand 188 states and 208 transitions. Second operand 4 states. [2018-10-27 04:47:16,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:16,223 INFO L93 Difference]: Finished difference Result 216 states and 240 transitions. [2018-10-27 04:47:16,224 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 04:47:16,224 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 32 [2018-10-27 04:47:16,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:16,225 INFO L225 Difference]: With dead ends: 216 [2018-10-27 04:47:16,225 INFO L226 Difference]: Without dead ends: 216 [2018-10-27 04:47:16,225 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:16,225 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-10-27 04:47:16,227 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 192. [2018-10-27 04:47:16,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192 states. [2018-10-27 04:47:16,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192 states to 192 states and 212 transitions. [2018-10-27 04:47:16,228 INFO L78 Accepts]: Start accepts. Automaton has 192 states and 212 transitions. Word has length 32 [2018-10-27 04:47:16,228 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:16,228 INFO L481 AbstractCegarLoop]: Abstraction has 192 states and 212 transitions. [2018-10-27 04:47:16,228 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:47:16,228 INFO L276 IsEmpty]: Start isEmpty. Operand 192 states and 212 transitions. [2018-10-27 04:47:16,228 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-10-27 04:47:16,228 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:16,228 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:16,228 INFO L424 AbstractCegarLoop]: === Iteration 28 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:16,228 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:16,228 INFO L82 PathProgramCache]: Analyzing trace with hash -1389974428, now seen corresponding path program 1 times [2018-10-27 04:47:16,229 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:16,229 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:16,229 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:16,229 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:16,229 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:16,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:16,486 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:16,486 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:16,486 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:16,486 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:16,487 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:47:16,487 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:47:16,487 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:16,487 INFO L87 Difference]: Start difference. First operand 192 states and 212 transitions. Second operand 5 states. [2018-10-27 04:47:16,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:16,912 INFO L93 Difference]: Finished difference Result 197 states and 215 transitions. [2018-10-27 04:47:16,913 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-27 04:47:16,913 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 32 [2018-10-27 04:47:16,913 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:16,914 INFO L225 Difference]: With dead ends: 197 [2018-10-27 04:47:16,914 INFO L226 Difference]: Without dead ends: 197 [2018-10-27 04:47:16,914 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:47:16,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2018-10-27 04:47:16,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 189. [2018-10-27 04:47:16,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 189 states. [2018-10-27 04:47:16,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189 states to 189 states and 209 transitions. [2018-10-27 04:47:16,916 INFO L78 Accepts]: Start accepts. Automaton has 189 states and 209 transitions. Word has length 32 [2018-10-27 04:47:16,917 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:16,917 INFO L481 AbstractCegarLoop]: Abstraction has 189 states and 209 transitions. [2018-10-27 04:47:16,921 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:47:16,921 INFO L276 IsEmpty]: Start isEmpty. Operand 189 states and 209 transitions. [2018-10-27 04:47:16,921 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-10-27 04:47:16,921 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:16,921 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:16,924 INFO L424 AbstractCegarLoop]: === Iteration 29 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:16,924 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:16,925 INFO L82 PathProgramCache]: Analyzing trace with hash -139534183, now seen corresponding path program 1 times [2018-10-27 04:47:16,925 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:16,925 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:16,926 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:16,926 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:16,926 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:16,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:17,127 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:17,127 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:17,127 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-10-27 04:47:17,128 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:17,128 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-10-27 04:47:17,128 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-10-27 04:47:17,128 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=130, Unknown=0, NotChecked=0, Total=156 [2018-10-27 04:47:17,128 INFO L87 Difference]: Start difference. First operand 189 states and 209 transitions. Second operand 13 states. [2018-10-27 04:47:18,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:18,036 INFO L93 Difference]: Finished difference Result 423 states and 460 transitions. [2018-10-27 04:47:18,037 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-10-27 04:47:18,037 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 33 [2018-10-27 04:47:18,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:18,038 INFO L225 Difference]: With dead ends: 423 [2018-10-27 04:47:18,038 INFO L226 Difference]: Without dead ends: 423 [2018-10-27 04:47:18,038 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 88 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=106, Invalid=494, Unknown=0, NotChecked=0, Total=600 [2018-10-27 04:47:18,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 423 states. [2018-10-27 04:47:18,041 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 423 to 197. [2018-10-27 04:47:18,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2018-10-27 04:47:18,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 219 transitions. [2018-10-27 04:47:18,042 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 219 transitions. Word has length 33 [2018-10-27 04:47:18,042 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:18,042 INFO L481 AbstractCegarLoop]: Abstraction has 197 states and 219 transitions. [2018-10-27 04:47:18,042 INFO L482 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-10-27 04:47:18,042 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 219 transitions. [2018-10-27 04:47:18,042 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-10-27 04:47:18,042 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:18,043 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:18,043 INFO L424 AbstractCegarLoop]: === Iteration 30 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:18,043 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:18,043 INFO L82 PathProgramCache]: Analyzing trace with hash 1816094634, now seen corresponding path program 1 times [2018-10-27 04:47:18,043 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:18,044 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:18,044 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:18,044 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:18,044 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:18,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:18,489 WARN L179 SmtUtils]: Spent 208.00 ms on a formula simplification. DAG size of input: 16 DAG size of output: 15 [2018-10-27 04:47:18,690 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:18,690 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:18,690 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-27 04:47:18,690 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:18,691 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-27 04:47:18,691 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-27 04:47:18,691 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-10-27 04:47:18,691 INFO L87 Difference]: Start difference. First operand 197 states and 219 transitions. Second operand 9 states. [2018-10-27 04:47:19,226 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:19,226 INFO L93 Difference]: Finished difference Result 293 states and 324 transitions. [2018-10-27 04:47:19,227 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-10-27 04:47:19,227 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 34 [2018-10-27 04:47:19,227 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:19,228 INFO L225 Difference]: With dead ends: 293 [2018-10-27 04:47:19,228 INFO L226 Difference]: Without dead ends: 293 [2018-10-27 04:47:19,228 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=96, Invalid=176, Unknown=0, NotChecked=0, Total=272 [2018-10-27 04:47:19,229 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 293 states. [2018-10-27 04:47:19,231 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 293 to 210. [2018-10-27 04:47:19,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 210 states. [2018-10-27 04:47:19,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210 states to 210 states and 234 transitions. [2018-10-27 04:47:19,231 INFO L78 Accepts]: Start accepts. Automaton has 210 states and 234 transitions. Word has length 34 [2018-10-27 04:47:19,231 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:19,232 INFO L481 AbstractCegarLoop]: Abstraction has 210 states and 234 transitions. [2018-10-27 04:47:19,232 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-27 04:47:19,232 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 234 transitions. [2018-10-27 04:47:19,232 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-10-27 04:47:19,232 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:19,232 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:19,233 INFO L424 AbstractCegarLoop]: === Iteration 31 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:19,237 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:19,237 INFO L82 PathProgramCache]: Analyzing trace with hash -948359621, now seen corresponding path program 1 times [2018-10-27 04:47:19,237 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:19,238 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:19,238 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:19,238 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:19,238 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:19,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:19,460 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:19,460 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:19,460 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-10-27 04:47:19,460 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:19,460 INFO L460 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-10-27 04:47:19,461 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-10-27 04:47:19,461 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=154, Unknown=0, NotChecked=0, Total=182 [2018-10-27 04:47:19,461 INFO L87 Difference]: Start difference. First operand 210 states and 234 transitions. Second operand 14 states. [2018-10-27 04:47:20,794 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:20,794 INFO L93 Difference]: Finished difference Result 380 states and 414 transitions. [2018-10-27 04:47:20,795 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-10-27 04:47:20,795 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 35 [2018-10-27 04:47:20,795 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:20,796 INFO L225 Difference]: With dead ends: 380 [2018-10-27 04:47:20,796 INFO L226 Difference]: Without dead ends: 380 [2018-10-27 04:47:20,796 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 197 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=204, Invalid=918, Unknown=0, NotChecked=0, Total=1122 [2018-10-27 04:47:20,797 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 380 states. [2018-10-27 04:47:20,799 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 380 to 207. [2018-10-27 04:47:20,799 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2018-10-27 04:47:20,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 231 transitions. [2018-10-27 04:47:20,800 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 231 transitions. Word has length 35 [2018-10-27 04:47:20,801 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:20,802 INFO L481 AbstractCegarLoop]: Abstraction has 207 states and 231 transitions. [2018-10-27 04:47:20,802 INFO L482 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-10-27 04:47:20,802 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 231 transitions. [2018-10-27 04:47:20,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-10-27 04:47:20,802 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:20,802 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:20,803 INFO L424 AbstractCegarLoop]: === Iteration 32 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:20,803 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:20,803 INFO L82 PathProgramCache]: Analyzing trace with hash -1479627176, now seen corresponding path program 1 times [2018-10-27 04:47:20,803 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:20,804 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:20,804 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:20,804 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:20,804 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:20,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:20,957 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:20,957 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:20,958 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:20,958 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:20,958 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:47:20,958 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:47:20,958 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:47:20,958 INFO L87 Difference]: Start difference. First operand 207 states and 231 transitions. Second operand 4 states. [2018-10-27 04:47:20,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:20,976 INFO L93 Difference]: Finished difference Result 219 states and 243 transitions. [2018-10-27 04:47:20,977 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 04:47:20,977 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 36 [2018-10-27 04:47:20,977 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:20,978 INFO L225 Difference]: With dead ends: 219 [2018-10-27 04:47:20,978 INFO L226 Difference]: Without dead ends: 219 [2018-10-27 04:47:20,978 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:20,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219 states. [2018-10-27 04:47:20,980 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219 to 211. [2018-10-27 04:47:20,980 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 211 states. [2018-10-27 04:47:20,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 211 states and 235 transitions. [2018-10-27 04:47:20,985 INFO L78 Accepts]: Start accepts. Automaton has 211 states and 235 transitions. Word has length 36 [2018-10-27 04:47:20,985 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:20,985 INFO L481 AbstractCegarLoop]: Abstraction has 211 states and 235 transitions. [2018-10-27 04:47:20,985 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:47:20,985 INFO L276 IsEmpty]: Start isEmpty. Operand 211 states and 235 transitions. [2018-10-27 04:47:20,986 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-10-27 04:47:20,986 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:20,986 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:20,986 INFO L424 AbstractCegarLoop]: === Iteration 33 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:20,986 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:20,987 INFO L82 PathProgramCache]: Analyzing trace with hash -1380171639, now seen corresponding path program 1 times [2018-10-27 04:47:20,987 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:20,987 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:20,987 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:20,987 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:20,988 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:21,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:21,297 WARN L179 SmtUtils]: Spent 223.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 11 [2018-10-27 04:47:21,609 WARN L179 SmtUtils]: Spent 267.00 ms on a formula simplification. DAG size of input: 16 DAG size of output: 15 [2018-10-27 04:47:21,943 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:21,943 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:21,943 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2018-10-27 04:47:21,943 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:21,943 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-10-27 04:47:21,944 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-10-27 04:47:21,944 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2018-10-27 04:47:21,944 INFO L87 Difference]: Start difference. First operand 211 states and 235 transitions. Second operand 16 states. [2018-10-27 04:47:23,608 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:23,608 INFO L93 Difference]: Finished difference Result 370 states and 406 transitions. [2018-10-27 04:47:23,609 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-10-27 04:47:23,609 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 37 [2018-10-27 04:47:23,609 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:23,610 INFO L225 Difference]: With dead ends: 370 [2018-10-27 04:47:23,610 INFO L226 Difference]: Without dead ends: 370 [2018-10-27 04:47:23,611 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 292 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=292, Invalid=1040, Unknown=0, NotChecked=0, Total=1332 [2018-10-27 04:47:23,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 370 states. [2018-10-27 04:47:23,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 370 to 225. [2018-10-27 04:47:23,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 225 states. [2018-10-27 04:47:23,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 225 states to 225 states and 251 transitions. [2018-10-27 04:47:23,615 INFO L78 Accepts]: Start accepts. Automaton has 225 states and 251 transitions. Word has length 37 [2018-10-27 04:47:23,615 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:23,615 INFO L481 AbstractCegarLoop]: Abstraction has 225 states and 251 transitions. [2018-10-27 04:47:23,615 INFO L482 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-10-27 04:47:23,615 INFO L276 IsEmpty]: Start isEmpty. Operand 225 states and 251 transitions. [2018-10-27 04:47:23,616 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-10-27 04:47:23,616 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:23,616 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:23,616 INFO L424 AbstractCegarLoop]: === Iteration 34 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:23,616 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:23,617 INFO L82 PathProgramCache]: Analyzing trace with hash -840524835, now seen corresponding path program 1 times [2018-10-27 04:47:23,617 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:23,617 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:23,617 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:23,617 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:23,618 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:23,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:23,762 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:23,762 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:23,762 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 04:47:23,762 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:23,762 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:47:23,762 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:47:23,763 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:47:23,763 INFO L87 Difference]: Start difference. First operand 225 states and 251 transitions. Second operand 4 states. [2018-10-27 04:47:23,875 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:23,875 INFO L93 Difference]: Finished difference Result 232 states and 259 transitions. [2018-10-27 04:47:23,876 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 04:47:23,876 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 37 [2018-10-27 04:47:23,876 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:23,877 INFO L225 Difference]: With dead ends: 232 [2018-10-27 04:47:23,877 INFO L226 Difference]: Without dead ends: 232 [2018-10-27 04:47:23,877 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:23,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 232 states. [2018-10-27 04:47:23,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 232 to 224. [2018-10-27 04:47:23,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 224 states. [2018-10-27 04:47:23,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224 states to 224 states and 250 transitions. [2018-10-27 04:47:23,880 INFO L78 Accepts]: Start accepts. Automaton has 224 states and 250 transitions. Word has length 37 [2018-10-27 04:47:23,880 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:23,880 INFO L481 AbstractCegarLoop]: Abstraction has 224 states and 250 transitions. [2018-10-27 04:47:23,880 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:47:23,880 INFO L276 IsEmpty]: Start isEmpty. Operand 224 states and 250 transitions. [2018-10-27 04:47:23,881 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-10-27 04:47:23,881 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:23,882 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:23,882 INFO L424 AbstractCegarLoop]: === Iteration 35 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:23,883 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:23,883 INFO L82 PathProgramCache]: Analyzing trace with hash 164352356, now seen corresponding path program 1 times [2018-10-27 04:47:23,883 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:23,883 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:23,884 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:23,884 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:23,884 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:23,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:24,173 WARN L179 SmtUtils]: Spent 208.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 11 [2018-10-27 04:47:24,448 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:24,448 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:24,448 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2018-10-27 04:47:24,449 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:24,449 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-10-27 04:47:24,449 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-10-27 04:47:24,449 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=178, Unknown=0, NotChecked=0, Total=210 [2018-10-27 04:47:24,449 INFO L87 Difference]: Start difference. First operand 224 states and 250 transitions. Second operand 15 states. [2018-10-27 04:47:25,204 WARN L179 SmtUtils]: Spent 190.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 68 [2018-10-27 04:47:25,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:25,871 INFO L93 Difference]: Finished difference Result 362 states and 398 transitions. [2018-10-27 04:47:25,872 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-10-27 04:47:25,872 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 38 [2018-10-27 04:47:25,872 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:25,873 INFO L225 Difference]: With dead ends: 362 [2018-10-27 04:47:25,873 INFO L226 Difference]: Without dead ends: 362 [2018-10-27 04:47:25,874 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=136, Invalid=514, Unknown=0, NotChecked=0, Total=650 [2018-10-27 04:47:25,874 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 362 states. [2018-10-27 04:47:25,876 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 362 to 225. [2018-10-27 04:47:25,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 225 states. [2018-10-27 04:47:25,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 225 states to 225 states and 251 transitions. [2018-10-27 04:47:25,876 INFO L78 Accepts]: Start accepts. Automaton has 225 states and 251 transitions. Word has length 38 [2018-10-27 04:47:25,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:25,877 INFO L481 AbstractCegarLoop]: Abstraction has 225 states and 251 transitions. [2018-10-27 04:47:25,877 INFO L482 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-10-27 04:47:25,881 INFO L276 IsEmpty]: Start isEmpty. Operand 225 states and 251 transitions. [2018-10-27 04:47:25,881 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-10-27 04:47:25,881 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:25,881 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:25,882 INFO L424 AbstractCegarLoop]: === Iteration 36 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:25,882 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:25,882 INFO L82 PathProgramCache]: Analyzing trace with hash 97256020, now seen corresponding path program 1 times [2018-10-27 04:47:25,882 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:25,883 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:25,883 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:25,883 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:25,883 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:25,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:26,047 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:26,047 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:26,047 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:26,047 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:26,048 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:47:26,048 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:47:26,048 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:26,048 INFO L87 Difference]: Start difference. First operand 225 states and 251 transitions. Second operand 5 states. [2018-10-27 04:47:26,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:26,258 INFO L93 Difference]: Finished difference Result 280 states and 305 transitions. [2018-10-27 04:47:26,258 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-27 04:47:26,258 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 38 [2018-10-27 04:47:26,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:26,259 INFO L225 Difference]: With dead ends: 280 [2018-10-27 04:47:26,259 INFO L226 Difference]: Without dead ends: 280 [2018-10-27 04:47:26,260 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:47:26,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280 states. [2018-10-27 04:47:26,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280 to 226. [2018-10-27 04:47:26,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 226 states. [2018-10-27 04:47:26,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 226 states to 226 states and 251 transitions. [2018-10-27 04:47:26,263 INFO L78 Accepts]: Start accepts. Automaton has 226 states and 251 transitions. Word has length 38 [2018-10-27 04:47:26,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:26,263 INFO L481 AbstractCegarLoop]: Abstraction has 226 states and 251 transitions. [2018-10-27 04:47:26,263 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:47:26,263 INFO L276 IsEmpty]: Start isEmpty. Operand 226 states and 251 transitions. [2018-10-27 04:47:26,263 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-10-27 04:47:26,263 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:26,263 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:26,264 INFO L424 AbstractCegarLoop]: === Iteration 37 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:26,264 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:26,264 INFO L82 PathProgramCache]: Analyzing trace with hash -286465974, now seen corresponding path program 1 times [2018-10-27 04:47:26,264 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:26,265 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:26,268 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:26,268 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:26,268 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:26,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:26,511 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:26,511 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:26,511 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2018-10-27 04:47:26,511 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:26,512 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-10-27 04:47:26,512 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-10-27 04:47:26,512 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2018-10-27 04:47:26,512 INFO L87 Difference]: Start difference. First operand 226 states and 251 transitions. Second operand 16 states. [2018-10-27 04:47:28,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:28,258 INFO L93 Difference]: Finished difference Result 457 states and 499 transitions. [2018-10-27 04:47:28,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-10-27 04:47:28,259 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 38 [2018-10-27 04:47:28,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:28,260 INFO L225 Difference]: With dead ends: 457 [2018-10-27 04:47:28,260 INFO L226 Difference]: Without dead ends: 457 [2018-10-27 04:47:28,261 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 666 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=473, Invalid=2283, Unknown=0, NotChecked=0, Total=2756 [2018-10-27 04:47:28,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 457 states. [2018-10-27 04:47:28,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 457 to 225. [2018-10-27 04:47:28,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 225 states. [2018-10-27 04:47:28,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 225 states to 225 states and 250 transitions. [2018-10-27 04:47:28,264 INFO L78 Accepts]: Start accepts. Automaton has 225 states and 250 transitions. Word has length 38 [2018-10-27 04:47:28,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:28,264 INFO L481 AbstractCegarLoop]: Abstraction has 225 states and 250 transitions. [2018-10-27 04:47:28,264 INFO L482 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-10-27 04:47:28,264 INFO L276 IsEmpty]: Start isEmpty. Operand 225 states and 250 transitions. [2018-10-27 04:47:28,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-10-27 04:47:28,265 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:28,265 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:28,265 INFO L424 AbstractCegarLoop]: === Iteration 38 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:28,266 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:28,266 INFO L82 PathProgramCache]: Analyzing trace with hash -290510465, now seen corresponding path program 1 times [2018-10-27 04:47:28,266 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:28,266 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:28,267 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:28,267 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:28,267 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:28,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:28,591 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:28,592 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:28,592 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2018-10-27 04:47:28,592 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:28,592 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-10-27 04:47:28,592 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-10-27 04:47:28,592 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=237, Unknown=0, NotChecked=0, Total=272 [2018-10-27 04:47:28,593 INFO L87 Difference]: Start difference. First operand 225 states and 250 transitions. Second operand 17 states. [2018-10-27 04:47:30,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:30,534 INFO L93 Difference]: Finished difference Result 685 states and 754 transitions. [2018-10-27 04:47:30,535 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-10-27 04:47:30,535 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 39 [2018-10-27 04:47:30,535 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:30,537 INFO L225 Difference]: With dead ends: 685 [2018-10-27 04:47:30,537 INFO L226 Difference]: Without dead ends: 685 [2018-10-27 04:47:30,537 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 696 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=379, Invalid=2377, Unknown=0, NotChecked=0, Total=2756 [2018-10-27 04:47:30,538 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 685 states. [2018-10-27 04:47:30,540 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 685 to 224. [2018-10-27 04:47:30,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 224 states. [2018-10-27 04:47:30,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224 states to 224 states and 249 transitions. [2018-10-27 04:47:30,541 INFO L78 Accepts]: Start accepts. Automaton has 224 states and 249 transitions. Word has length 39 [2018-10-27 04:47:30,541 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:30,541 INFO L481 AbstractCegarLoop]: Abstraction has 224 states and 249 transitions. [2018-10-27 04:47:30,541 INFO L482 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-10-27 04:47:30,541 INFO L276 IsEmpty]: Start isEmpty. Operand 224 states and 249 transitions. [2018-10-27 04:47:30,542 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-10-27 04:47:30,542 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:30,542 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:30,542 INFO L424 AbstractCegarLoop]: === Iteration 39 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:30,542 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:30,542 INFO L82 PathProgramCache]: Analyzing trace with hash 1526484793, now seen corresponding path program 1 times [2018-10-27 04:47:30,542 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:30,543 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:30,543 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:30,543 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:30,543 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:30,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:30,934 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:30,934 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:47:30,934 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-27 04:47:30,934 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 42 with the following transitions: [2018-10-27 04:47:30,935 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [13], [34], [37], [39], [41], [43], [45], [57], [61], [63], [68], [70], [71], [72], [74], [76], [78], [80], [82], [84], [86], [88], [109], [112], [114], [116], [118], [120], [255], [256], [257] [2018-10-27 04:47:30,981 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-10-27 04:47:30,982 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-10-27 04:47:32,181 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-10-27 04:47:32,183 INFO L272 AbstractInterpreter]: Visited 37 different actions 63 times. Merged at 20 different actions 26 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 56 variables. [2018-10-27 04:47:32,213 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:32,214 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-10-27 04:47:32,214 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:47:32,214 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-27 04:47:32,232 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:32,232 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-27 04:47:32,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:32,298 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:32,332 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:32,333 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:32,346 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:32,347 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-27 04:47:32,421 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:32,449 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:32,450 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-27 04:47:32,451 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:32,553 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:32,553 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:11 [2018-10-27 04:47:32,925 WARN L179 SmtUtils]: Spent 103.00 ms on a formula simplification that was a NOOP. DAG size: 10 [2018-10-27 04:47:32,981 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:47:32,990 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:32,990 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:32,992 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,021 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,022 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:22, output treesize:15 [2018-10-27 04:47:33,055 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2018-10-27 04:47:33,081 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-27 04:47:33,082 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,165 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,237 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,237 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:28, output treesize:8 [2018-10-27 04:47:33,635 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 12 [2018-10-27 04:47:33,650 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2018-10-27 04:47:33,651 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,658 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,661 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,661 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:22, output treesize:7 [2018-10-27 04:47:33,794 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:33,796 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-10-27 04:47:33,796 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,806 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:33,807 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:33,808 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-27 04:47:33,808 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,918 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,918 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:30, output treesize:14 [2018-10-27 04:47:34,213 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:34,213 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:47:34,441 WARN L179 SmtUtils]: Spent 143.00 ms on a formula simplification that was a NOOP. DAG size: 36 [2018-10-27 04:47:34,449 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-10-27 04:47:34,450 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:34,490 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 28 [2018-10-27 04:47:34,491 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-10-27 04:47:34,509 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 21 [2018-10-27 04:47:34,509 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:34,526 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: 3 dim-0 vars, and 4 xjuncts. [2018-10-27 04:47:34,526 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 5 variables, input treesize:44, output treesize:47 [2018-10-27 04:47:34,813 WARN L179 SmtUtils]: Spent 225.00 ms on a formula simplification that was a NOOP. DAG size: 39 [2018-10-27 04:47:35,163 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:35,164 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:35,165 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 7 [2018-10-27 04:47:35,165 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:35,185 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:35,186 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:35,186 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-10-27 04:47:35,186 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:35,195 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:47:35,195 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:36, output treesize:15 [2018-10-27 04:47:35,245 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:35,262 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-10-27 04:47:35,262 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [12, 13] total 28 [2018-10-27 04:47:35,262 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:35,262 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-27 04:47:35,262 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-27 04:47:35,263 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=724, Unknown=0, NotChecked=0, Total=812 [2018-10-27 04:47:35,263 INFO L87 Difference]: Start difference. First operand 224 states and 249 transitions. Second operand 8 states. [2018-10-27 04:47:36,939 WARN L179 SmtUtils]: Spent 1.28 s on a formula simplification. DAG size of input: 52 DAG size of output: 49 [2018-10-27 04:47:37,705 WARN L179 SmtUtils]: Spent 172.00 ms on a formula simplification. DAG size of input: 57 DAG size of output: 45 [2018-10-27 04:47:39,783 WARN L179 SmtUtils]: Spent 2.04 s on a formula simplification. DAG size of input: 46 DAG size of output: 43 [2018-10-27 04:47:39,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:39,997 INFO L93 Difference]: Finished difference Result 227 states and 253 transitions. [2018-10-27 04:47:39,999 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-10-27 04:47:39,999 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 41 [2018-10-27 04:47:39,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:40,000 INFO L225 Difference]: With dead ends: 227 [2018-10-27 04:47:40,000 INFO L226 Difference]: Without dead ends: 227 [2018-10-27 04:47:40,000 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 69 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 205 ImplicationChecksByTransitivity, 6.3s TimeCoverageRelationStatistics Valid=154, Invalid=1178, Unknown=0, NotChecked=0, Total=1332 [2018-10-27 04:47:40,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227 states. [2018-10-27 04:47:40,003 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227 to 223. [2018-10-27 04:47:40,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223 states. [2018-10-27 04:47:40,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223 states to 223 states and 248 transitions. [2018-10-27 04:47:40,017 INFO L78 Accepts]: Start accepts. Automaton has 223 states and 248 transitions. Word has length 41 [2018-10-27 04:47:40,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:40,017 INFO L481 AbstractCegarLoop]: Abstraction has 223 states and 248 transitions. [2018-10-27 04:47:40,017 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-27 04:47:40,017 INFO L276 IsEmpty]: Start isEmpty. Operand 223 states and 248 transitions. [2018-10-27 04:47:40,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-10-27 04:47:40,018 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:40,018 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:40,019 INFO L424 AbstractCegarLoop]: === Iteration 40 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:40,019 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:40,019 INFO L82 PathProgramCache]: Analyzing trace with hash 1625961052, now seen corresponding path program 1 times [2018-10-27 04:47:40,019 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:40,020 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:40,020 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:40,020 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:40,020 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:40,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:40,346 WARN L179 SmtUtils]: Spent 260.00 ms on a formula simplification. DAG size of input: 14 DAG size of output: 13 [2018-10-27 04:47:40,409 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:40,409 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:47:40,409 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-27 04:47:40,409 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 43 with the following transitions: [2018-10-27 04:47:40,409 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [13], [34], [37], [39], [41], [43], [45], [57], [61], [63], [66], [135], [139], [145], [149], [150], [151], [153], [162], [164], [177], [179], [184], [186], [188], [194], [198], [204], [206], [208], [255], [256], [257] [2018-10-27 04:47:40,412 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-10-27 04:47:40,412 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-10-27 04:47:40,919 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-10-27 04:47:40,919 INFO L272 AbstractInterpreter]: Visited 39 different actions 59 times. Merged at 18 different actions 20 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 66 variables. [2018-10-27 04:47:40,925 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:40,925 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-10-27 04:47:40,925 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:47:40,925 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-27 04:47:40,934 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:40,934 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-27 04:47:40,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:40,977 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:40,997 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:40,998 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:41,013 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:41,014 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:22, output treesize:21 [2018-10-27 04:47:41,030 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:47:41,036 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:41,036 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:41,038 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:41,049 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:47:41,055 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:41,056 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:41,057 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:41,065 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:41,065 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:43, output treesize:32 [2018-10-27 04:47:41,089 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 14 [2018-10-27 04:47:41,092 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 18 [2018-10-27 04:47:41,092 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:41,096 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:41,110 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 14 [2018-10-27 04:47:41,112 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 18 [2018-10-27 04:47:41,113 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:41,117 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:41,124 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:47:41,124 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:45, output treesize:37 [2018-10-27 04:47:41,205 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-10-27 04:47:41,208 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:41,209 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-10-27 04:47:41,210 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:41,218 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:41,227 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-10-27 04:47:41,230 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:41,231 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-10-27 04:47:41,232 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:41,236 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:41,243 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:41,244 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:49, output treesize:23 [2018-10-27 04:47:41,401 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 16 [2018-10-27 04:47:41,449 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 3 [2018-10-27 04:47:41,450 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:41,473 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:41,611 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 16 [2018-10-27 04:47:41,612 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 3 [2018-10-27 04:47:41,613 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:41,617 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:41,621 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:47:41,621 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:48, output treesize:12 [2018-10-27 04:47:41,644 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:41,644 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:47:42,532 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 46 [2018-10-27 04:47:42,534 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:47:42,535 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:42,546 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 41 treesize of output 43 [2018-10-27 04:47:42,552 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 38 [2018-10-27 04:47:42,562 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 12 [2018-10-27 04:47:42,563 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:47:42,570 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:47:42,590 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 15 [2018-10-27 04:47:42,591 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:42,607 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 35 treesize of output 40 [2018-10-27 04:47:42,620 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 16 [2018-10-27 04:47:42,621 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:47:42,642 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 25 treesize of output 28 [2018-10-27 04:47:42,643 INFO L267 ElimStorePlain]: Start of recursive call 10: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-10-27 04:47:42,667 INFO L267 ElimStorePlain]: Start of recursive call 8: 2 dim-1 vars, End of recursive call: 3 dim-0 vars, and 4 xjuncts. [2018-10-27 04:47:42,695 INFO L267 ElimStorePlain]: Start of recursive call 4: 3 dim-1 vars, End of recursive call: 4 dim-0 vars, and 5 xjuncts. [2018-10-27 04:47:42,725 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 5 xjuncts. [2018-10-27 04:47:42,768 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 54 [2018-10-27 04:47:42,771 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:47:42,772 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:42,785 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 26 treesize of output 30 [2018-10-27 04:47:42,801 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 22 treesize of output 30 [2018-10-27 04:47:42,812 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:42,821 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 20 treesize of output 25 [2018-10-27 04:47:42,822 INFO L267 ElimStorePlain]: Start of recursive call 15: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 4 xjuncts. [2018-10-27 04:47:42,877 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:42,879 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 13 [2018-10-27 04:47:42,879 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:47:42,900 INFO L267 ElimStorePlain]: Start of recursive call 14: 2 dim-1 vars, End of recursive call: 3 dim-0 vars, and 5 xjuncts. [2018-10-27 04:47:42,925 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 28 [2018-10-27 04:47:42,932 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:42,934 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 9 [2018-10-27 04:47:42,934 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:47:42,992 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:47:43,017 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 9 [2018-10-27 04:47:43,018 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:43,041 INFO L267 ElimStorePlain]: Start of recursive call 13: 3 dim-1 vars, End of recursive call: 4 dim-0 vars, and 6 xjuncts. [2018-10-27 04:47:43,067 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 6 xjuncts. [2018-10-27 04:47:43,145 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 41 [2018-10-27 04:47:43,148 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:47:43,148 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:43,160 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 28 [2018-10-27 04:47:43,170 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 26 [2018-10-27 04:47:43,179 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 7 [2018-10-27 04:47:43,179 INFO L267 ElimStorePlain]: Start of recursive call 24: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:43,183 INFO L267 ElimStorePlain]: Start of recursive call 23: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:43,276 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 20 treesize of output 28 [2018-10-27 04:47:43,287 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2018-10-27 04:47:43,287 INFO L267 ElimStorePlain]: Start of recursive call 26: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:43,299 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 18 [2018-10-27 04:47:43,300 INFO L267 ElimStorePlain]: Start of recursive call 27: End of recursive call: and 2 xjuncts. [2018-10-27 04:47:43,307 INFO L267 ElimStorePlain]: Start of recursive call 25: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:43,311 INFO L267 ElimStorePlain]: Start of recursive call 22: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:43,317 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:43,320 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 38 [2018-10-27 04:47:43,345 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:47:43,345 INFO L267 ElimStorePlain]: Start of recursive call 29: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:43,649 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 28 [2018-10-27 04:47:43,691 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 20 treesize of output 28 [2018-10-27 04:47:43,702 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2018-10-27 04:47:43,702 INFO L267 ElimStorePlain]: Start of recursive call 32: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:43,719 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 23 [2018-10-27 04:47:43,720 INFO L267 ElimStorePlain]: Start of recursive call 33: End of recursive call: and 3 xjuncts. [2018-10-27 04:47:43,730 INFO L267 ElimStorePlain]: Start of recursive call 31: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:47:43,742 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 26 [2018-10-27 04:47:43,762 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 7 [2018-10-27 04:47:43,763 INFO L267 ElimStorePlain]: Start of recursive call 35: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:43,768 INFO L267 ElimStorePlain]: Start of recursive call 34: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:43,781 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 7 [2018-10-27 04:47:43,781 INFO L267 ElimStorePlain]: Start of recursive call 36: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:43,791 INFO L267 ElimStorePlain]: Start of recursive call 30: 3 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:47:43,802 INFO L267 ElimStorePlain]: Start of recursive call 28: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:47:43,805 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 38 [2018-10-27 04:47:43,807 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:47:43,807 INFO L267 ElimStorePlain]: Start of recursive call 38: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:43,819 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 28 [2018-10-27 04:47:43,821 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 26 [2018-10-27 04:47:43,829 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 7 [2018-10-27 04:47:43,829 INFO L267 ElimStorePlain]: Start of recursive call 41: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:43,833 INFO L267 ElimStorePlain]: Start of recursive call 40: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:43,841 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 7 [2018-10-27 04:47:43,842 INFO L267 ElimStorePlain]: Start of recursive call 42: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:43,851 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 21 [2018-10-27 04:47:43,858 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 7 [2018-10-27 04:47:43,859 INFO L267 ElimStorePlain]: Start of recursive call 44: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:43,861 INFO L267 ElimStorePlain]: Start of recursive call 43: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:43,864 INFO L267 ElimStorePlain]: Start of recursive call 39: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:43,869 INFO L267 ElimStorePlain]: Start of recursive call 37: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:43,871 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 40 [2018-10-27 04:47:43,893 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:47:43,893 INFO L267 ElimStorePlain]: Start of recursive call 46: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:44,071 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 28 [2018-10-27 04:47:44,074 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 26 [2018-10-27 04:47:44,082 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 13 [2018-10-27 04:47:44,082 INFO L267 ElimStorePlain]: Start of recursive call 49: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:44,087 INFO L267 ElimStorePlain]: Start of recursive call 48: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:44,092 INFO L267 ElimStorePlain]: Start of recursive call 47: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:44,097 INFO L267 ElimStorePlain]: Start of recursive call 45: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:44,099 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 37 [2018-10-27 04:47:44,102 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:47:44,102 INFO L267 ElimStorePlain]: Start of recursive call 51: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:44,114 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 28 [2018-10-27 04:47:44,116 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:47:44,117 INFO L267 ElimStorePlain]: Start of recursive call 53: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:44,125 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 20 [2018-10-27 04:47:44,131 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 7 [2018-10-27 04:47:44,131 INFO L267 ElimStorePlain]: Start of recursive call 55: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:44,136 INFO L267 ElimStorePlain]: Start of recursive call 54: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:44,144 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 26 [2018-10-27 04:47:44,154 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 18 [2018-10-27 04:47:44,155 INFO L267 ElimStorePlain]: Start of recursive call 57: End of recursive call: and 2 xjuncts. [2018-10-27 04:47:44,164 INFO L267 ElimStorePlain]: Start of recursive call 56: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:47:44,172 INFO L267 ElimStorePlain]: Start of recursive call 52: 3 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:47:44,184 INFO L267 ElimStorePlain]: Start of recursive call 50: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:47:44,220 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 37 [2018-10-27 04:47:44,223 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:47:44,223 INFO L267 ElimStorePlain]: Start of recursive call 59: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:44,238 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 23 [2018-10-27 04:47:44,240 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 17 [2018-10-27 04:47:44,244 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 7 [2018-10-27 04:47:44,245 INFO L267 ElimStorePlain]: Start of recursive call 62: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:44,246 INFO L267 ElimStorePlain]: Start of recursive call 61: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:44,251 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:47:44,251 INFO L267 ElimStorePlain]: Start of recursive call 63: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:44,253 INFO L267 ElimStorePlain]: Start of recursive call 60: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:44,258 INFO L267 ElimStorePlain]: Start of recursive call 58: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:44,341 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 3 dim-2 vars, End of recursive call: 8 dim-0 vars, and 13 xjuncts. [2018-10-27 04:47:44,342 INFO L202 ElimStorePlain]: Needed 63 recursive calls to eliminate 5 variables, input treesize:107, output treesize:194 [2018-10-27 04:47:44,455 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:44,472 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-10-27 04:47:44,472 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 12, 14] total 31 [2018-10-27 04:47:44,472 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-27 04:47:44,472 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-10-27 04:47:44,473 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-10-27 04:47:44,473 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=117, Invalid=813, Unknown=0, NotChecked=0, Total=930 [2018-10-27 04:47:44,473 INFO L87 Difference]: Start difference. First operand 223 states and 248 transitions. Second operand 18 states. [2018-10-27 04:47:45,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:45,684 INFO L93 Difference]: Finished difference Result 271 states and 295 transitions. [2018-10-27 04:47:45,685 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-10-27 04:47:45,686 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 42 [2018-10-27 04:47:45,686 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:45,686 INFO L225 Difference]: With dead ends: 271 [2018-10-27 04:47:45,686 INFO L226 Difference]: Without dead ends: 271 [2018-10-27 04:47:45,687 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 62 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 390 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=365, Invalid=1705, Unknown=0, NotChecked=0, Total=2070 [2018-10-27 04:47:45,687 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 271 states. [2018-10-27 04:47:45,690 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 271 to 254. [2018-10-27 04:47:45,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 254 states. [2018-10-27 04:47:45,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 254 states to 254 states and 283 transitions. [2018-10-27 04:47:45,691 INFO L78 Accepts]: Start accepts. Automaton has 254 states and 283 transitions. Word has length 42 [2018-10-27 04:47:45,691 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:45,691 INFO L481 AbstractCegarLoop]: Abstraction has 254 states and 283 transitions. [2018-10-27 04:47:45,691 INFO L482 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-10-27 04:47:45,691 INFO L276 IsEmpty]: Start isEmpty. Operand 254 states and 283 transitions. [2018-10-27 04:47:45,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-10-27 04:47:45,692 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:45,692 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:45,692 INFO L424 AbstractCegarLoop]: === Iteration 41 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:45,692 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:45,692 INFO L82 PathProgramCache]: Analyzing trace with hash -1926925829, now seen corresponding path program 1 times [2018-10-27 04:47:45,693 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:45,693 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:45,693 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:45,693 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:45,694 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:45,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:45,871 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:45,871 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:47:45,871 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-27 04:47:45,871 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 44 with the following transitions: [2018-10-27 04:47:45,871 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [13], [34], [37], [39], [41], [43], [45], [57], [61], [63], [68], [70], [72], [74], [75], [76], [78], [80], [82], [84], [86], [88], [109], [112], [114], [116], [118], [120], [255], [256], [257] [2018-10-27 04:47:45,874 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-10-27 04:47:45,874 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-10-27 04:47:46,424 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-10-27 04:47:46,424 INFO L272 AbstractInterpreter]: Visited 37 different actions 62 times. Merged at 20 different actions 25 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 56 variables. [2018-10-27 04:47:46,433 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:46,433 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-10-27 04:47:46,434 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:47:46,434 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-27 04:47:46,442 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:46,442 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-27 04:47:46,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:46,496 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:46,714 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:46,715 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:47:46,720 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 10 [2018-10-27 04:47:46,720 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:46,734 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 16 treesize of output 20 [2018-10-27 04:47:46,735 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-10-27 04:47:46,739 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:47:46,740 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:29, output treesize:14 [2018-10-27 04:47:46,779 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:46,796 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-10-27 04:47:46,796 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5, 5] imperfect sequences [13] total 19 [2018-10-27 04:47:46,796 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:46,796 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-27 04:47:46,796 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-27 04:47:46,796 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=323, Unknown=0, NotChecked=0, Total=380 [2018-10-27 04:47:46,797 INFO L87 Difference]: Start difference. First operand 254 states and 283 transitions. Second operand 6 states. [2018-10-27 04:47:46,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:46,977 INFO L93 Difference]: Finished difference Result 257 states and 287 transitions. [2018-10-27 04:47:46,978 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-27 04:47:46,978 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2018-10-27 04:47:46,978 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:46,979 INFO L225 Difference]: With dead ends: 257 [2018-10-27 04:47:46,979 INFO L226 Difference]: Without dead ends: 257 [2018-10-27 04:47:46,979 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 81 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=89, Invalid=463, Unknown=0, NotChecked=0, Total=552 [2018-10-27 04:47:46,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 257 states. [2018-10-27 04:47:46,982 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 257 to 253. [2018-10-27 04:47:46,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 253 states. [2018-10-27 04:47:46,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 253 states to 253 states and 282 transitions. [2018-10-27 04:47:46,983 INFO L78 Accepts]: Start accepts. Automaton has 253 states and 282 transitions. Word has length 43 [2018-10-27 04:47:46,983 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:46,983 INFO L481 AbstractCegarLoop]: Abstraction has 253 states and 282 transitions. [2018-10-27 04:47:46,983 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-27 04:47:46,983 INFO L276 IsEmpty]: Start isEmpty. Operand 253 states and 282 transitions. [2018-10-27 04:47:46,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-10-27 04:47:46,984 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:46,984 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:46,984 INFO L424 AbstractCegarLoop]: === Iteration 42 === [mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:46,984 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:46,984 INFO L82 PathProgramCache]: Analyzing trace with hash 1269546043, now seen corresponding path program 1 times [2018-10-27 04:47:46,984 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:46,988 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:46,988 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:46,988 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:46,988 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:47,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:47,430 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:47,430 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:47:47,430 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-27 04:47:47,430 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 46 with the following transitions: [2018-10-27 04:47:47,430 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [13], [16], [18], [20], [22], [24], [26], [28], [30], [32], [57], [61], [63], [66], [135], [139], [145], [149], [150], [151], [153], [162], [164], [177], [179], [184], [186], [188], [194], [198], [204], [206], [208], [255], [256], [257] [2018-10-27 04:47:47,432 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-10-27 04:47:47,432 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-10-27 04:47:47,983 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-10-27 04:47:47,984 INFO L272 AbstractInterpreter]: Visited 42 different actions 71 times. Merged at 18 different actions 29 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 69 variables. [2018-10-27 04:47:48,021 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:48,021 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-10-27 04:47:48,022 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:47:48,022 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-27 04:47:48,043 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:48,043 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-27 04:47:48,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:48,094 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:48,109 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:48,109 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:48,217 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:48,217 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:19, output treesize:18 [2018-10-27 04:47:48,237 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:47:48,239 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 9 [2018-10-27 04:47:48,239 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:48,242 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:48,251 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:47:48,253 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 9 [2018-10-27 04:47:48,253 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:48,256 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:48,262 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:48,262 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:36, output treesize:32 [2018-10-27 04:47:48,284 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-10-27 04:47:48,287 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:48,290 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-10-27 04:47:48,290 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:48,295 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:48,305 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-10-27 04:47:48,307 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:48,309 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-10-27 04:47:48,309 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:48,332 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:48,338 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:48,339 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:46, output treesize:20 [2018-10-27 04:47:48,357 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:48,358 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:48,359 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-27 04:47:48,359 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:48,366 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:48,366 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:33, output treesize:27 [2018-10-27 04:47:48,445 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-10-27 04:47:48,465 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:48,505 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 25 [2018-10-27 04:47:48,506 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:48,528 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:48,540 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-10-27 04:47:48,543 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:48,545 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 25 [2018-10-27 04:47:48,545 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:48,550 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:48,560 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:48,560 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:53, output treesize:37 [2018-10-27 04:47:48,605 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 58 [2018-10-27 04:47:48,607 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-10-27 04:47:48,607 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:48,614 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:48,675 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 32 [2018-10-27 04:47:48,678 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-10-27 04:47:48,678 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:48,683 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:48,690 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:48,690 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:71, output treesize:25 [2018-10-27 04:47:48,750 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-10-27 04:47:48,752 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:48,754 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 14 [2018-10-27 04:47:48,754 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:48,758 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:48,763 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:47:48,765 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-27 04:47:48,765 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:48,769 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:48,772 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:48,772 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:39, output treesize:7 [2018-10-27 04:47:48,785 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:48,785 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:47:49,214 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 61 [2018-10-27 04:47:49,230 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:47:49,230 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:49,268 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 7 case distinctions, treesize of input 39 treesize of output 74 [2018-10-27 04:47:49,540 WARN L179 SmtUtils]: Spent 266.00 ms on a formula simplification. DAG size of input: 168 DAG size of output: 153 [2018-10-27 04:47:49,543 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 41 [2018-10-27 04:47:49,546 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:49,548 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 28 [2018-10-27 04:47:49,548 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:49,557 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:49,744 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 46 [2018-10-27 04:47:49,746 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:49,748 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 28 [2018-10-27 04:47:49,748 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:49,763 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 12 [2018-10-27 04:47:49,764 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-10-27 04:47:49,773 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:47:49,978 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 37 treesize of output 47 [2018-10-27 04:47:49,981 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:49,983 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 48 [2018-10-27 04:47:49,983 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:50,006 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:50,017 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 40 treesize of output 57 [2018-10-27 04:47:50,017 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 2 xjuncts. [2018-10-27 04:47:50,045 INFO L267 ElimStorePlain]: Start of recursive call 10: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:47:50,285 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 4 case distinctions, treesize of input 39 treesize of output 63 [2018-10-27 04:47:50,288 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:50,290 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 59 [2018-10-27 04:47:50,290 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:50,343 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:50,353 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 49 treesize of output 66 [2018-10-27 04:47:50,354 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 2 xjuncts. [2018-10-27 04:47:50,420 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:50,430 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 52 treesize of output 61 [2018-10-27 04:47:50,431 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 4 xjuncts. [2018-10-27 04:47:50,524 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:50,535 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 51 treesize of output 68 [2018-10-27 04:47:50,535 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 2 xjuncts. [2018-10-27 04:47:50,637 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:50,639 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 53 [2018-10-27 04:47:50,640 INFO L267 ElimStorePlain]: Start of recursive call 18: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:50,900 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:50,901 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 45 [2018-10-27 04:47:50,902 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:50,908 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 52 [2018-10-27 04:47:50,909 INFO L267 ElimStorePlain]: Start of recursive call 20: End of recursive call: and 2 xjuncts. [2018-10-27 04:47:51,011 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 48 [2018-10-27 04:47:51,012 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 2 xjuncts. [2018-10-27 04:47:51,097 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:51,107 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 52 treesize of output 59 [2018-10-27 04:47:51,108 INFO L267 ElimStorePlain]: Start of recursive call 22: End of recursive call: and 4 xjuncts. [2018-10-27 04:47:51,122 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 54 treesize of output 64 [2018-10-27 04:47:51,123 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 8 xjuncts. [2018-10-27 04:47:51,239 INFO L267 ElimStorePlain]: Start of recursive call 13: 8 dim-1 vars, End of recursive call: and 9 xjuncts. [2018-10-27 04:47:51,598 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 40 treesize of output 48 [2018-10-27 04:47:51,605 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 37 [2018-10-27 04:47:51,630 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:51,632 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 9 [2018-10-27 04:47:51,632 INFO L267 ElimStorePlain]: Start of recursive call 26: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:51,640 INFO L267 ElimStorePlain]: Start of recursive call 25: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:51,675 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 13 [2018-10-27 04:47:51,675 INFO L267 ElimStorePlain]: Start of recursive call 27: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:51,710 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:51,912 WARN L522 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-27 04:47:51,913 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: var is still there: v_arrayElimCell_83 term size 32 at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:221) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.elimAllRec(ElimStorePlain.java:199) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.elim(PartialQuantifierElimination.java:293) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.tryToEliminate(PartialQuantifierElimination.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer$QuantifierEliminationPostprocessor.postprocess(IterativePredicateTransformer.java:245) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:439) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:418) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:290) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:330) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:175) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:162) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructForwardBackward(TraceCheckConstructor.java:224) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructTraceCheck(TraceCheckConstructor.java:188) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:165) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseTaipanRefinementStrategy.getTraceCheck(BaseTaipanRefinementStrategy.java:216) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:223) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:197) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:70) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:429) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:435) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:376) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:312) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:123) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:316) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-10-27 04:47:51,916 INFO L168 Benchmark]: Toolchain (without parser) took 51363.74 ms. Allocated memory was 1.0 GB in the beginning and 1.6 GB in the end (delta: 595.1 MB). Free memory was 950.0 MB in the beginning and 1.6 GB in the end (delta: -605.0 MB). Peak memory consumption was 748.9 MB. Max. memory is 11.5 GB. [2018-10-27 04:47:51,917 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 980.1 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-10-27 04:47:51,917 INFO L168 Benchmark]: CACSL2BoogieTranslator took 391.18 ms. Allocated memory is still 1.0 GB. Free memory was 950.0 MB in the beginning and 925.8 MB in the end (delta: 24.2 MB). Peak memory consumption was 24.2 MB. Max. memory is 11.5 GB. [2018-10-27 04:47:51,917 INFO L168 Benchmark]: Boogie Procedure Inliner took 135.08 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 135.3 MB). Free memory was 925.8 MB in the beginning and 1.1 GB in the end (delta: -201.9 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. [2018-10-27 04:47:51,917 INFO L168 Benchmark]: Boogie Preprocessor took 63.97 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. [2018-10-27 04:47:51,918 INFO L168 Benchmark]: RCFGBuilder took 1197.47 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 58.0 MB). Peak memory consumption was 58.0 MB. Max. memory is 11.5 GB. [2018-10-27 04:47:51,918 INFO L168 Benchmark]: TraceAbstraction took 49572.95 ms. Allocated memory was 1.2 GB in the beginning and 1.6 GB in the end (delta: 459.8 MB). Free memory was 1.1 GB in the beginning and 1.6 GB in the end (delta: -488.6 MB). Peak memory consumption was 730.0 MB. Max. memory is 11.5 GB. [2018-10-27 04:47:51,919 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 980.1 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 391.18 ms. Allocated memory is still 1.0 GB. Free memory was 950.0 MB in the beginning and 925.8 MB in the end (delta: 24.2 MB). Peak memory consumption was 24.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 135.08 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 135.3 MB). Free memory was 925.8 MB in the beginning and 1.1 GB in the end (delta: -201.9 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 63.97 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 1197.47 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 58.0 MB). Peak memory consumption was 58.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 49572.95 ms. Allocated memory was 1.2 GB in the beginning and 1.6 GB in the end (delta: 459.8 MB). Free memory was 1.1 GB in the beginning and 1.6 GB in the end (delta: -488.6 MB). Peak memory consumption was 730.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: AssertionError: var is still there: v_arrayElimCell_83 term size 32 de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: var is still there: v_arrayElimCell_83 term size 32: de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-1dbac8b [2018-10-27 04:47:53,834 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-10-27 04:47:53,836 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-10-27 04:47:53,845 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-10-27 04:47:53,845 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-10-27 04:47:53,846 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-10-27 04:47:53,847 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-10-27 04:47:53,848 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-10-27 04:47:53,850 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-10-27 04:47:53,851 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-10-27 04:47:53,851 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-10-27 04:47:53,851 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-10-27 04:47:53,852 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-10-27 04:47:53,853 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-10-27 04:47:53,854 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-10-27 04:47:53,855 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-10-27 04:47:53,856 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-10-27 04:47:53,857 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-10-27 04:47:53,859 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-10-27 04:47:53,860 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-10-27 04:47:53,861 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-10-27 04:47:53,862 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-10-27 04:47:53,864 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-10-27 04:47:53,864 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-10-27 04:47:53,864 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-10-27 04:47:53,866 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-10-27 04:47:53,867 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-10-27 04:47:53,867 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-10-27 04:47:53,868 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-10-27 04:47:53,869 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-10-27 04:47:53,869 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-10-27 04:47:53,870 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-10-27 04:47:53,870 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-10-27 04:47:53,870 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-10-27 04:47:53,871 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-10-27 04:47:53,872 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-10-27 04:47:53,872 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Bitvector.epf [2018-10-27 04:47:53,884 INFO L110 SettingsManager]: Loading preferences was successful [2018-10-27 04:47:53,884 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-10-27 04:47:53,885 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-10-27 04:47:53,885 INFO L133 SettingsManager]: * User list type=DISABLED [2018-10-27 04:47:53,885 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-10-27 04:47:53,886 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-10-27 04:47:53,886 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-10-27 04:47:53,886 INFO L133 SettingsManager]: * Interval Domain=false [2018-10-27 04:47:53,886 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-10-27 04:47:53,886 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-10-27 04:47:53,887 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-10-27 04:47:53,887 INFO L133 SettingsManager]: * sizeof long=4 [2018-10-27 04:47:53,887 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-10-27 04:47:53,887 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-10-27 04:47:53,887 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-10-27 04:47:53,887 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-10-27 04:47:53,888 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-10-27 04:47:53,888 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-10-27 04:47:53,888 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-10-27 04:47:53,888 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-10-27 04:47:53,888 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-10-27 04:47:53,888 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-10-27 04:47:53,888 INFO L133 SettingsManager]: * sizeof long double=12 [2018-10-27 04:47:53,889 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-10-27 04:47:53,891 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-10-27 04:47:53,891 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-10-27 04:47:53,891 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-10-27 04:47:53,891 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-27 04:47:53,891 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-10-27 04:47:53,892 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-10-27 04:47:53,892 INFO L133 SettingsManager]: * Trace refinement strategy=WALRUS [2018-10-27 04:47:53,892 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-10-27 04:47:53,892 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-10-27 04:47:53,892 INFO L133 SettingsManager]: * Logic for external solver=AUFBV Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 497bfe83d1a123e7e085e38ee3eed2e663cc023e [2018-10-27 04:47:53,925 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-10-27 04:47:53,936 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-10-27 04:47:53,939 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-10-27 04:47:53,940 INFO L271 PluginConnector]: Initializing CDTParser... [2018-10-27 04:47:53,940 INFO L276 PluginConnector]: CDTParser initialized [2018-10-27 04:47:53,941 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/../../sv-benchmarks/c/forester-heap/dll-optional_true-unreach-call_true-valid-memsafety.i [2018-10-27 04:47:53,984 INFO L218 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/data/d972cb930/382800e6b06c45569a1b18e35603457c/FLAG4f0cc2648 [2018-10-27 04:47:54,420 INFO L298 CDTParser]: Found 1 translation units. [2018-10-27 04:47:54,421 INFO L158 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/sv-benchmarks/c/forester-heap/dll-optional_true-unreach-call_true-valid-memsafety.i [2018-10-27 04:47:54,432 INFO L346 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/data/d972cb930/382800e6b06c45569a1b18e35603457c/FLAG4f0cc2648 [2018-10-27 04:47:54,445 INFO L354 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/data/d972cb930/382800e6b06c45569a1b18e35603457c [2018-10-27 04:47:54,449 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-10-27 04:47:54,451 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-10-27 04:47:54,453 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-10-27 04:47:54,455 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-10-27 04:47:54,459 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-10-27 04:47:54,460 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.10 04:47:54" (1/1) ... [2018-10-27 04:47:54,462 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1439afcf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:54, skipping insertion in model container [2018-10-27 04:47:54,462 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.10 04:47:54" (1/1) ... [2018-10-27 04:47:54,470 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-10-27 04:47:54,505 INFO L174 MainTranslator]: Built tables and reachable declarations [2018-10-27 04:47:54,791 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-27 04:47:54,807 INFO L189 MainTranslator]: Completed pre-run [2018-10-27 04:47:54,883 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-27 04:47:54,923 INFO L193 MainTranslator]: Completed translation [2018-10-27 04:47:54,924 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:54 WrapperNode [2018-10-27 04:47:54,924 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-10-27 04:47:54,924 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-10-27 04:47:54,924 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-10-27 04:47:54,924 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-10-27 04:47:54,936 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:54" (1/1) ... [2018-10-27 04:47:54,956 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:54" (1/1) ... [2018-10-27 04:47:54,990 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-10-27 04:47:54,990 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-10-27 04:47:54,990 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-10-27 04:47:54,991 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-10-27 04:47:54,999 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:54" (1/1) ... [2018-10-27 04:47:55,000 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:54" (1/1) ... [2018-10-27 04:47:55,009 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:54" (1/1) ... [2018-10-27 04:47:55,009 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:54" (1/1) ... [2018-10-27 04:47:55,027 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:54" (1/1) ... [2018-10-27 04:47:55,112 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:54" (1/1) ... [2018-10-27 04:47:55,115 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:54" (1/1) ... [2018-10-27 04:47:55,126 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-10-27 04:47:55,126 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-10-27 04:47:55,126 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-10-27 04:47:55,126 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-10-27 04:47:55,127 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:54" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-27 04:47:55,173 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-10-27 04:47:55,174 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-10-27 04:47:55,174 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-10-27 04:47:55,174 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-10-27 04:47:55,174 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-10-27 04:47:55,174 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-10-27 04:47:56,688 INFO L341 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-10-27 04:47:56,689 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.10 04:47:56 BoogieIcfgContainer [2018-10-27 04:47:56,689 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-10-27 04:47:56,689 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-10-27 04:47:56,690 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-10-27 04:47:56,693 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-10-27 04:47:56,693 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.10 04:47:54" (1/3) ... [2018-10-27 04:47:56,693 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6b2b7fad and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.10 04:47:56, skipping insertion in model container [2018-10-27 04:47:56,694 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:54" (2/3) ... [2018-10-27 04:47:56,694 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6b2b7fad and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.10 04:47:56, skipping insertion in model container [2018-10-27 04:47:56,694 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.10 04:47:56" (3/3) ... [2018-10-27 04:47:56,695 INFO L112 eAbstractionObserver]: Analyzing ICFG dll-optional_true-unreach-call_true-valid-memsafety.i [2018-10-27 04:47:56,702 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-10-27 04:47:56,712 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 69 error locations. [2018-10-27 04:47:56,721 INFO L257 AbstractCegarLoop]: Starting to check reachability of 69 error locations. [2018-10-27 04:47:56,738 INFO L135 ementStrategyFactory]: Using default assertion order modulation [2018-10-27 04:47:56,739 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-10-27 04:47:56,739 INFO L383 AbstractCegarLoop]: Hoare is false [2018-10-27 04:47:56,739 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-10-27 04:47:56,739 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-10-27 04:47:56,739 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-10-27 04:47:56,739 INFO L387 AbstractCegarLoop]: Difference is false [2018-10-27 04:47:56,740 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-10-27 04:47:56,740 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-10-27 04:47:56,756 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states. [2018-10-27 04:47:56,763 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-10-27 04:47:56,763 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:56,764 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:56,767 INFO L424 AbstractCegarLoop]: === Iteration 1 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:56,771 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:56,771 INFO L82 PathProgramCache]: Analyzing trace with hash -455754976, now seen corresponding path program 1 times [2018-10-27 04:47:56,774 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:56,775 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:56,799 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:56,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:56,851 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:56,906 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:56,907 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:56,938 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:56,938 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-27 04:47:56,987 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:56,987 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:56,992 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:56,992 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-27 04:47:56,995 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-27 04:47:57,008 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-27 04:47:57,008 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:47:57,011 INFO L87 Difference]: Start difference. First operand 171 states. Second operand 3 states. [2018-10-27 04:47:57,870 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:57,870 INFO L93 Difference]: Finished difference Result 197 states and 209 transitions. [2018-10-27 04:47:57,871 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-27 04:47:57,872 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-10-27 04:47:57,872 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:57,882 INFO L225 Difference]: With dead ends: 197 [2018-10-27 04:47:57,882 INFO L226 Difference]: Without dead ends: 193 [2018-10-27 04:47:57,883 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:47:57,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-10-27 04:47:57,920 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 167. [2018-10-27 04:47:57,922 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-10-27 04:47:57,924 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 177 transitions. [2018-10-27 04:47:57,926 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 177 transitions. Word has length 7 [2018-10-27 04:47:57,926 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:57,926 INFO L481 AbstractCegarLoop]: Abstraction has 167 states and 177 transitions. [2018-10-27 04:47:57,926 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-27 04:47:57,926 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 177 transitions. [2018-10-27 04:47:57,927 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-10-27 04:47:57,927 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:57,927 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:57,928 INFO L424 AbstractCegarLoop]: === Iteration 2 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:57,931 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:57,932 INFO L82 PathProgramCache]: Analyzing trace with hash -1243502329, now seen corresponding path program 1 times [2018-10-27 04:47:57,932 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:57,932 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:57,957 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:57,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:57,993 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:58,022 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:58,022 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:58,070 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:58,070 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:12 [2018-10-27 04:47:58,087 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:58,087 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:58,089 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:58,089 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-27 04:47:58,090 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-27 04:47:58,090 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-27 04:47:58,090 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:47:58,091 INFO L87 Difference]: Start difference. First operand 167 states and 177 transitions. Second operand 3 states. [2018-10-27 04:47:58,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:58,597 INFO L93 Difference]: Finished difference Result 166 states and 176 transitions. [2018-10-27 04:47:58,598 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-27 04:47:58,598 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 8 [2018-10-27 04:47:58,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:58,601 INFO L225 Difference]: With dead ends: 166 [2018-10-27 04:47:58,601 INFO L226 Difference]: Without dead ends: 166 [2018-10-27 04:47:58,601 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:47:58,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states. [2018-10-27 04:47:58,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 166. [2018-10-27 04:47:58,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-10-27 04:47:58,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 176 transitions. [2018-10-27 04:47:58,611 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 176 transitions. Word has length 8 [2018-10-27 04:47:58,612 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:58,612 INFO L481 AbstractCegarLoop]: Abstraction has 166 states and 176 transitions. [2018-10-27 04:47:58,612 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-27 04:47:58,612 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 176 transitions. [2018-10-27 04:47:58,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2018-10-27 04:47:58,612 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:58,612 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:58,615 INFO L424 AbstractCegarLoop]: === Iteration 3 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:58,615 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:58,615 INFO L82 PathProgramCache]: Analyzing trace with hash 106133506, now seen corresponding path program 1 times [2018-10-27 04:47:58,616 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:58,616 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:58,631 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:58,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:58,662 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:58,690 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:58,690 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:58,696 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:58,696 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:47:58,728 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:58,728 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:58,730 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:58,730 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:58,730 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:47:58,731 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:47:58,731 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:58,731 INFO L87 Difference]: Start difference. First operand 166 states and 176 transitions. Second operand 5 states. [2018-10-27 04:47:59,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:59,420 INFO L93 Difference]: Finished difference Result 233 states and 249 transitions. [2018-10-27 04:47:59,421 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-27 04:47:59,421 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 9 [2018-10-27 04:47:59,421 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:59,422 INFO L225 Difference]: With dead ends: 233 [2018-10-27 04:47:59,422 INFO L226 Difference]: Without dead ends: 233 [2018-10-27 04:47:59,422 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2018-10-27 04:47:59,423 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233 states. [2018-10-27 04:47:59,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233 to 162. [2018-10-27 04:47:59,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-10-27 04:47:59,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 172 transitions. [2018-10-27 04:47:59,436 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 172 transitions. Word has length 9 [2018-10-27 04:47:59,436 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:59,436 INFO L481 AbstractCegarLoop]: Abstraction has 162 states and 172 transitions. [2018-10-27 04:47:59,437 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:47:59,439 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 172 transitions. [2018-10-27 04:47:59,440 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2018-10-27 04:47:59,440 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:59,440 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:59,441 INFO L424 AbstractCegarLoop]: === Iteration 4 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:59,442 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:59,442 INFO L82 PathProgramCache]: Analyzing trace with hash -1004828567, now seen corresponding path program 1 times [2018-10-27 04:47:59,442 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:59,442 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:59,467 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:59,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:59,499 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:59,502 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:59,503 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:59,508 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:59,508 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:47:59,604 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:59,604 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:59,606 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:59,606 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 04:47:59,606 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:47:59,606 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:47:59,606 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:47:59,606 INFO L87 Difference]: Start difference. First operand 162 states and 172 transitions. Second operand 4 states. [2018-10-27 04:48:00,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:00,237 INFO L93 Difference]: Finished difference Result 166 states and 176 transitions. [2018-10-27 04:48:00,238 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 04:48:00,238 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 10 [2018-10-27 04:48:00,238 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:00,239 INFO L225 Difference]: With dead ends: 166 [2018-10-27 04:48:00,239 INFO L226 Difference]: Without dead ends: 166 [2018-10-27 04:48:00,239 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:48:00,240 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states. [2018-10-27 04:48:00,246 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 161. [2018-10-27 04:48:00,247 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-10-27 04:48:00,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 171 transitions. [2018-10-27 04:48:00,250 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 171 transitions. Word has length 10 [2018-10-27 04:48:00,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:00,250 INFO L481 AbstractCegarLoop]: Abstraction has 161 states and 171 transitions. [2018-10-27 04:48:00,250 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:48:00,250 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 171 transitions. [2018-10-27 04:48:00,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-10-27 04:48:00,251 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:00,251 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:00,252 INFO L424 AbstractCegarLoop]: === Iteration 5 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:00,252 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:00,252 INFO L82 PathProgramCache]: Analyzing trace with hash 727390187, now seen corresponding path program 1 times [2018-10-27 04:48:00,256 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:00,256 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:00,270 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:00,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:00,303 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:00,312 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:00,313 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:00,317 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:00,317 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:48:00,341 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:00,341 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:00,353 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:00,353 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:48:00,353 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:48:00,354 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:48:00,354 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:48:00,354 INFO L87 Difference]: Start difference. First operand 161 states and 171 transitions. Second operand 5 states. [2018-10-27 04:48:01,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:01,111 INFO L93 Difference]: Finished difference Result 229 states and 245 transitions. [2018-10-27 04:48:01,111 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 04:48:01,111 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 12 [2018-10-27 04:48:01,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:01,112 INFO L225 Difference]: With dead ends: 229 [2018-10-27 04:48:01,112 INFO L226 Difference]: Without dead ends: 229 [2018-10-27 04:48:01,113 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:48:01,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229 states. [2018-10-27 04:48:01,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229 to 158. [2018-10-27 04:48:01,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-10-27 04:48:01,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 168 transitions. [2018-10-27 04:48:01,118 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 168 transitions. Word has length 12 [2018-10-27 04:48:01,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:01,118 INFO L481 AbstractCegarLoop]: Abstraction has 158 states and 168 transitions. [2018-10-27 04:48:01,119 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:48:01,119 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 168 transitions. [2018-10-27 04:48:01,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-10-27 04:48:01,119 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:01,119 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:01,120 INFO L424 AbstractCegarLoop]: === Iteration 6 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:01,120 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:01,121 INFO L82 PathProgramCache]: Analyzing trace with hash 1074259367, now seen corresponding path program 1 times [2018-10-27 04:48:01,125 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:01,125 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:01,142 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:01,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:01,177 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:01,189 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:01,190 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:01,194 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:01,194 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:48:01,216 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:01,216 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:01,218 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:01,218 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 04:48:01,218 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:48:01,218 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:48:01,219 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:48:01,219 INFO L87 Difference]: Start difference. First operand 158 states and 168 transitions. Second operand 4 states. [2018-10-27 04:48:01,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:01,936 INFO L93 Difference]: Finished difference Result 252 states and 270 transitions. [2018-10-27 04:48:01,937 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 04:48:01,937 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2018-10-27 04:48:01,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:01,938 INFO L225 Difference]: With dead ends: 252 [2018-10-27 04:48:01,938 INFO L226 Difference]: Without dead ends: 252 [2018-10-27 04:48:01,938 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:48:01,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 252 states. [2018-10-27 04:48:01,942 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 252 to 155. [2018-10-27 04:48:01,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155 states. [2018-10-27 04:48:01,943 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 165 transitions. [2018-10-27 04:48:01,943 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 165 transitions. Word has length 13 [2018-10-27 04:48:01,943 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:01,943 INFO L481 AbstractCegarLoop]: Abstraction has 155 states and 165 transitions. [2018-10-27 04:48:01,943 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:48:01,943 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 165 transitions. [2018-10-27 04:48:01,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-10-27 04:48:01,944 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:01,944 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:01,947 INFO L424 AbstractCegarLoop]: === Iteration 7 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:01,947 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:01,947 INFO L82 PathProgramCache]: Analyzing trace with hash 1571102313, now seen corresponding path program 1 times [2018-10-27 04:48:01,947 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:01,948 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:01,968 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:02,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:02,059 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:02,077 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:02,078 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:02,091 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:02,092 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:02,096 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:02,097 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-10-27 04:48:02,137 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:02,141 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:02,142 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-10-27 04:48:02,142 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:02,183 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-10-27 04:48:02,183 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:02,194 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:02,194 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:34, output treesize:16 [2018-10-27 04:48:02,207 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:02,207 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:02,209 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:02,209 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 04:48:02,209 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:48:02,209 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:48:02,210 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:48:02,210 INFO L87 Difference]: Start difference. First operand 155 states and 165 transitions. Second operand 4 states. [2018-10-27 04:48:02,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:02,863 INFO L93 Difference]: Finished difference Result 228 states and 244 transitions. [2018-10-27 04:48:02,864 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 04:48:02,865 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2018-10-27 04:48:02,865 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:02,865 INFO L225 Difference]: With dead ends: 228 [2018-10-27 04:48:02,865 INFO L226 Difference]: Without dead ends: 228 [2018-10-27 04:48:02,866 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:48:02,866 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228 states. [2018-10-27 04:48:02,868 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228 to 152. [2018-10-27 04:48:02,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-10-27 04:48:02,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 162 transitions. [2018-10-27 04:48:02,869 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 162 transitions. Word has length 15 [2018-10-27 04:48:02,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:02,869 INFO L481 AbstractCegarLoop]: Abstraction has 152 states and 162 transitions. [2018-10-27 04:48:02,869 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:48:02,869 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 162 transitions. [2018-10-27 04:48:02,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-10-27 04:48:02,870 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:02,870 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:02,871 INFO L424 AbstractCegarLoop]: === Iteration 8 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:02,871 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:02,871 INFO L82 PathProgramCache]: Analyzing trace with hash 1459531503, now seen corresponding path program 1 times [2018-10-27 04:48:02,872 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:02,872 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:02,887 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:02,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:02,956 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:02,970 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:02,971 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:02,978 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:02,978 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:48:02,978 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:48:02,978 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:48:02,978 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:48:02,979 INFO L87 Difference]: Start difference. First operand 152 states and 162 transitions. Second operand 5 states. [2018-10-27 04:48:04,136 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:04,136 INFO L93 Difference]: Finished difference Result 230 states and 249 transitions. [2018-10-27 04:48:04,137 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 04:48:04,137 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-10-27 04:48:04,137 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:04,137 INFO L225 Difference]: With dead ends: 230 [2018-10-27 04:48:04,138 INFO L226 Difference]: Without dead ends: 230 [2018-10-27 04:48:04,138 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:48:04,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 230 states. [2018-10-27 04:48:04,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 230 to 151. [2018-10-27 04:48:04,141 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-10-27 04:48:04,141 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 161 transitions. [2018-10-27 04:48:04,142 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 161 transitions. Word has length 16 [2018-10-27 04:48:04,142 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:04,142 INFO L481 AbstractCegarLoop]: Abstraction has 151 states and 161 transitions. [2018-10-27 04:48:04,142 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:48:04,142 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 161 transitions. [2018-10-27 04:48:04,142 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-10-27 04:48:04,142 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:04,143 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:04,144 INFO L424 AbstractCegarLoop]: === Iteration 9 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:04,144 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:04,145 INFO L82 PathProgramCache]: Analyzing trace with hash -1999163605, now seen corresponding path program 1 times [2018-10-27 04:48:04,145 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:04,145 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:04,158 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:04,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:04,227 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:04,259 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:04,260 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:04,262 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:04,262 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:48:04,263 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:48:04,263 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:48:04,263 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:48:04,263 INFO L87 Difference]: Start difference. First operand 151 states and 161 transitions. Second operand 5 states. [2018-10-27 04:48:04,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:04,910 INFO L93 Difference]: Finished difference Result 223 states and 243 transitions. [2018-10-27 04:48:04,911 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-27 04:48:04,911 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-10-27 04:48:04,911 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:04,912 INFO L225 Difference]: With dead ends: 223 [2018-10-27 04:48:04,912 INFO L226 Difference]: Without dead ends: 223 [2018-10-27 04:48:04,912 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:48:04,913 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223 states. [2018-10-27 04:48:04,915 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223 to 150. [2018-10-27 04:48:04,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-10-27 04:48:04,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 160 transitions. [2018-10-27 04:48:04,916 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 160 transitions. Word has length 17 [2018-10-27 04:48:04,916 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:04,916 INFO L481 AbstractCegarLoop]: Abstraction has 150 states and 160 transitions. [2018-10-27 04:48:04,916 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:48:04,916 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 160 transitions. [2018-10-27 04:48:04,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-10-27 04:48:04,918 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:04,918 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:04,919 INFO L424 AbstractCegarLoop]: === Iteration 10 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:04,920 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:04,920 INFO L82 PathProgramCache]: Analyzing trace with hash -1844529551, now seen corresponding path program 1 times [2018-10-27 04:48:04,920 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:04,920 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:04,942 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:05,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:05,024 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:05,030 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:05,030 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:05,038 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:05,038 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:15, output treesize:14 [2018-10-27 04:48:05,056 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:48:05,059 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:48:05,059 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:05,061 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:05,066 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:05,066 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:19, output treesize:9 [2018-10-27 04:48:05,077 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-10-27 04:48:05,079 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-10-27 04:48:05,079 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:05,081 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:05,085 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:05,085 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:17, output treesize:5 [2018-10-27 04:48:05,094 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:05,094 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:05,096 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:05,096 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:48:05,096 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:48:05,096 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:48:05,096 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:48:05,096 INFO L87 Difference]: Start difference. First operand 150 states and 160 transitions. Second operand 5 states. [2018-10-27 04:48:06,090 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:06,091 INFO L93 Difference]: Finished difference Result 175 states and 186 transitions. [2018-10-27 04:48:06,091 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 04:48:06,091 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 18 [2018-10-27 04:48:06,091 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:06,092 INFO L225 Difference]: With dead ends: 175 [2018-10-27 04:48:06,092 INFO L226 Difference]: Without dead ends: 175 [2018-10-27 04:48:06,092 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:48:06,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2018-10-27 04:48:06,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 149. [2018-10-27 04:48:06,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-10-27 04:48:06,096 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 159 transitions. [2018-10-27 04:48:06,096 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 159 transitions. Word has length 18 [2018-10-27 04:48:06,096 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:06,096 INFO L481 AbstractCegarLoop]: Abstraction has 149 states and 159 transitions. [2018-10-27 04:48:06,096 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:48:06,096 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 159 transitions. [2018-10-27 04:48:06,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-10-27 04:48:06,099 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:06,099 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:06,100 INFO L424 AbstractCegarLoop]: === Iteration 11 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:06,100 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:06,100 INFO L82 PathProgramCache]: Analyzing trace with hash -1345841171, now seen corresponding path program 1 times [2018-10-27 04:48:06,100 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:06,100 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:06,115 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:06,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:06,201 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:06,206 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:06,206 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:06,222 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:06,222 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:18, output treesize:17 [2018-10-27 04:48:06,242 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:48:06,245 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:48:06,245 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:06,247 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:06,258 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:48:06,260 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:48:06,261 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:06,263 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:06,270 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:06,270 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:30, output treesize:17 [2018-10-27 04:48:06,289 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:48:06,292 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-27 04:48:06,292 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:06,294 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:06,305 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-10-27 04:48:06,313 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-10-27 04:48:06,314 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:06,315 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:06,322 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:06,322 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:34, output treesize:12 [2018-10-27 04:48:06,335 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:06,336 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:06,337 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:06,337 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:48:06,338 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:48:06,338 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:48:06,338 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:48:06,338 INFO L87 Difference]: Start difference. First operand 149 states and 159 transitions. Second operand 5 states. [2018-10-27 04:48:07,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:07,207 INFO L93 Difference]: Finished difference Result 214 states and 230 transitions. [2018-10-27 04:48:07,209 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-27 04:48:07,209 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2018-10-27 04:48:07,209 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:07,210 INFO L225 Difference]: With dead ends: 214 [2018-10-27 04:48:07,210 INFO L226 Difference]: Without dead ends: 214 [2018-10-27 04:48:07,210 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:48:07,210 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states. [2018-10-27 04:48:07,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 148. [2018-10-27 04:48:07,213 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-10-27 04:48:07,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 158 transitions. [2018-10-27 04:48:07,213 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 158 transitions. Word has length 19 [2018-10-27 04:48:07,213 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:07,214 INFO L481 AbstractCegarLoop]: Abstraction has 148 states and 158 transitions. [2018-10-27 04:48:07,214 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:48:07,214 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 158 transitions. [2018-10-27 04:48:07,214 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-10-27 04:48:07,214 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:07,214 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:07,215 INFO L424 AbstractCegarLoop]: === Iteration 12 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:07,215 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:07,216 INFO L82 PathProgramCache]: Analyzing trace with hash 1003178870, now seen corresponding path program 1 times [2018-10-27 04:48:07,216 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:07,216 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:07,232 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:07,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:07,303 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:07,308 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:07,308 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:07,312 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:07,312 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:48:07,423 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-10-27 04:48:07,424 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:07,432 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:07,432 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:14, output treesize:11 [2018-10-27 04:48:07,451 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:07,451 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:07,452 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:07,452 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-27 04:48:07,453 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-27 04:48:07,453 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-27 04:48:07,453 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-10-27 04:48:07,453 INFO L87 Difference]: Start difference. First operand 148 states and 158 transitions. Second operand 6 states. [2018-10-27 04:48:08,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:08,488 INFO L93 Difference]: Finished difference Result 308 states and 333 transitions. [2018-10-27 04:48:08,488 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-27 04:48:08,488 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 20 [2018-10-27 04:48:08,488 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:08,489 INFO L225 Difference]: With dead ends: 308 [2018-10-27 04:48:08,489 INFO L226 Difference]: Without dead ends: 308 [2018-10-27 04:48:08,489 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=54, Unknown=0, NotChecked=0, Total=90 [2018-10-27 04:48:08,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 308 states. [2018-10-27 04:48:08,494 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 308 to 160. [2018-10-27 04:48:08,494 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-10-27 04:48:08,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 178 transitions. [2018-10-27 04:48:08,495 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 178 transitions. Word has length 20 [2018-10-27 04:48:08,495 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:08,495 INFO L481 AbstractCegarLoop]: Abstraction has 160 states and 178 transitions. [2018-10-27 04:48:08,495 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-27 04:48:08,495 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 178 transitions. [2018-10-27 04:48:08,495 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-10-27 04:48:08,495 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:08,495 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:08,496 INFO L424 AbstractCegarLoop]: === Iteration 13 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:08,496 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:08,496 INFO L82 PathProgramCache]: Analyzing trace with hash 1033773999, now seen corresponding path program 1 times [2018-10-27 04:48:08,497 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:08,500 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:08,513 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:08,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:08,602 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:08,606 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:08,606 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:08,616 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:08,617 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:08,624 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:08,624 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-10-27 04:48:08,644 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:08,645 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:08,646 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-10-27 04:48:08,646 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:08,659 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-10-27 04:48:08,660 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:08,670 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:08,671 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:32, output treesize:14 [2018-10-27 04:48:08,682 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:08,682 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:08,684 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:08,684 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:48:08,685 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:48:08,685 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:48:08,685 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:48:08,685 INFO L87 Difference]: Start difference. First operand 160 states and 178 transitions. Second operand 5 states. [2018-10-27 04:48:09,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:09,729 INFO L93 Difference]: Finished difference Result 225 states and 241 transitions. [2018-10-27 04:48:09,730 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-27 04:48:09,730 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2018-10-27 04:48:09,730 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:09,731 INFO L225 Difference]: With dead ends: 225 [2018-10-27 04:48:09,731 INFO L226 Difference]: Without dead ends: 225 [2018-10-27 04:48:09,731 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:48:09,731 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225 states. [2018-10-27 04:48:09,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225 to 161. [2018-10-27 04:48:09,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-10-27 04:48:09,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 178 transitions. [2018-10-27 04:48:09,734 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 178 transitions. Word has length 21 [2018-10-27 04:48:09,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:09,734 INFO L481 AbstractCegarLoop]: Abstraction has 161 states and 178 transitions. [2018-10-27 04:48:09,734 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:48:09,734 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 178 transitions. [2018-10-27 04:48:09,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-10-27 04:48:09,735 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:09,735 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:09,735 INFO L424 AbstractCegarLoop]: === Iteration 14 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:09,735 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:09,735 INFO L82 PathProgramCache]: Analyzing trace with hash 1982223000, now seen corresponding path program 1 times [2018-10-27 04:48:09,736 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:09,736 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:09,757 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:09,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:09,818 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:09,862 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:09,862 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:09,863 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:09,864 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:48:09,864 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:48:09,864 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:48:09,864 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:48:09,864 INFO L87 Difference]: Start difference. First operand 161 states and 178 transitions. Second operand 5 states. [2018-10-27 04:48:10,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:10,442 INFO L93 Difference]: Finished difference Result 189 states and 212 transitions. [2018-10-27 04:48:10,457 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-27 04:48:10,457 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-10-27 04:48:10,457 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:10,458 INFO L225 Difference]: With dead ends: 189 [2018-10-27 04:48:10,458 INFO L226 Difference]: Without dead ends: 189 [2018-10-27 04:48:10,458 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-10-27 04:48:10,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-10-27 04:48:10,460 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 154. [2018-10-27 04:48:10,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-10-27 04:48:10,463 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 171 transitions. [2018-10-27 04:48:10,463 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 171 transitions. Word has length 22 [2018-10-27 04:48:10,463 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:10,463 INFO L481 AbstractCegarLoop]: Abstraction has 154 states and 171 transitions. [2018-10-27 04:48:10,464 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:48:10,464 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 171 transitions. [2018-10-27 04:48:10,464 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-10-27 04:48:10,464 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:10,464 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:10,465 INFO L424 AbstractCegarLoop]: === Iteration 15 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:10,465 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:10,465 INFO L82 PathProgramCache]: Analyzing trace with hash 1319370961, now seen corresponding path program 1 times [2018-10-27 04:48:10,465 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:10,465 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:10,484 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:10,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:10,587 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:10,686 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:10,686 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:10,687 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:10,687 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-27 04:48:10,688 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-27 04:48:10,688 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-27 04:48:10,688 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-10-27 04:48:10,688 INFO L87 Difference]: Start difference. First operand 154 states and 171 transitions. Second operand 6 states. [2018-10-27 04:48:11,384 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:11,384 INFO L93 Difference]: Finished difference Result 212 states and 229 transitions. [2018-10-27 04:48:11,384 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 04:48:11,384 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 23 [2018-10-27 04:48:11,385 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:11,385 INFO L225 Difference]: With dead ends: 212 [2018-10-27 04:48:11,385 INFO L226 Difference]: Without dead ends: 212 [2018-10-27 04:48:11,386 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 18 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=35, Invalid=55, Unknown=0, NotChecked=0, Total=90 [2018-10-27 04:48:11,386 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 212 states. [2018-10-27 04:48:11,388 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 212 to 161. [2018-10-27 04:48:11,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-10-27 04:48:11,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 182 transitions. [2018-10-27 04:48:11,390 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 182 transitions. Word has length 23 [2018-10-27 04:48:11,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:11,390 INFO L481 AbstractCegarLoop]: Abstraction has 161 states and 182 transitions. [2018-10-27 04:48:11,390 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-27 04:48:11,390 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 182 transitions. [2018-10-27 04:48:11,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-10-27 04:48:11,391 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:11,391 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:11,391 INFO L424 AbstractCegarLoop]: === Iteration 16 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:11,391 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:11,392 INFO L82 PathProgramCache]: Analyzing trace with hash -2044335935, now seen corresponding path program 1 times [2018-10-27 04:48:11,392 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:11,392 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:11,422 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:11,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:11,479 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:11,484 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:11,484 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:11,489 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:11,489 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:48:11,514 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:11,514 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:11,515 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:11,516 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-27 04:48:11,516 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-27 04:48:11,516 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-27 04:48:11,516 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-10-27 04:48:11,516 INFO L87 Difference]: Start difference. First operand 161 states and 182 transitions. Second operand 6 states. [2018-10-27 04:48:13,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:13,102 INFO L93 Difference]: Finished difference Result 312 states and 337 transitions. [2018-10-27 04:48:13,103 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-10-27 04:48:13,103 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 24 [2018-10-27 04:48:13,103 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:13,104 INFO L225 Difference]: With dead ends: 312 [2018-10-27 04:48:13,104 INFO L226 Difference]: Without dead ends: 312 [2018-10-27 04:48:13,104 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=48, Invalid=84, Unknown=0, NotChecked=0, Total=132 [2018-10-27 04:48:13,105 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 312 states. [2018-10-27 04:48:13,107 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 312 to 165. [2018-10-27 04:48:13,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-10-27 04:48:13,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 186 transitions. [2018-10-27 04:48:13,108 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 186 transitions. Word has length 24 [2018-10-27 04:48:13,108 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:13,108 INFO L481 AbstractCegarLoop]: Abstraction has 165 states and 186 transitions. [2018-10-27 04:48:13,109 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-27 04:48:13,111 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 186 transitions. [2018-10-27 04:48:13,111 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-10-27 04:48:13,111 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:13,111 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:13,112 INFO L424 AbstractCegarLoop]: === Iteration 17 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:13,112 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:13,112 INFO L82 PathProgramCache]: Analyzing trace with hash -2049173062, now seen corresponding path program 1 times [2018-10-27 04:48:13,112 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:13,112 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:13,132 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:13,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:13,201 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:13,212 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:13,212 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:13,222 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:13,222 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:15 [2018-10-27 04:48:13,246 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:48:13,248 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:48:13,248 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:13,251 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:13,257 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:13,257 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:22, output treesize:13 [2018-10-27 04:48:13,271 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-10-27 04:48:13,273 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-10-27 04:48:13,273 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:13,275 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:13,276 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:13,276 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-10-27 04:48:13,283 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:13,283 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:13,285 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:13,285 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-27 04:48:13,285 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-27 04:48:13,285 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-27 04:48:13,285 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:48:13,286 INFO L87 Difference]: Start difference. First operand 165 states and 186 transitions. Second operand 7 states. [2018-10-27 04:48:14,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:14,130 INFO L93 Difference]: Finished difference Result 212 states and 228 transitions. [2018-10-27 04:48:14,130 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-10-27 04:48:14,130 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 24 [2018-10-27 04:48:14,130 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:14,131 INFO L225 Difference]: With dead ends: 212 [2018-10-27 04:48:14,131 INFO L226 Difference]: Without dead ends: 212 [2018-10-27 04:48:14,131 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 18 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=65, Invalid=117, Unknown=0, NotChecked=0, Total=182 [2018-10-27 04:48:14,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 212 states. [2018-10-27 04:48:14,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 212 to 166. [2018-10-27 04:48:14,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-10-27 04:48:14,134 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 187 transitions. [2018-10-27 04:48:14,134 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 187 transitions. Word has length 24 [2018-10-27 04:48:14,134 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:14,134 INFO L481 AbstractCegarLoop]: Abstraction has 166 states and 187 transitions. [2018-10-27 04:48:14,134 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-27 04:48:14,134 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 187 transitions. [2018-10-27 04:48:14,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-10-27 04:48:14,135 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:14,135 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:14,135 INFO L424 AbstractCegarLoop]: === Iteration 18 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:14,135 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:14,136 INFO L82 PathProgramCache]: Analyzing trace with hash 1050095637, now seen corresponding path program 1 times [2018-10-27 04:48:14,136 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:14,136 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:14,155 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:14,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:14,212 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:14,215 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:14,215 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:14,225 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:14,226 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:48:14,251 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:14,252 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:14,253 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:14,254 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:48:14,254 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:48:14,254 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:48:14,254 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:48:14,254 INFO L87 Difference]: Start difference. First operand 166 states and 187 transitions. Second operand 5 states. [2018-10-27 04:48:15,224 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:15,224 INFO L93 Difference]: Finished difference Result 235 states and 252 transitions. [2018-10-27 04:48:15,225 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 04:48:15,225 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2018-10-27 04:48:15,225 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:15,226 INFO L225 Difference]: With dead ends: 235 [2018-10-27 04:48:15,226 INFO L226 Difference]: Without dead ends: 235 [2018-10-27 04:48:15,226 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:48:15,226 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 235 states. [2018-10-27 04:48:15,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 235 to 167. [2018-10-27 04:48:15,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-10-27 04:48:15,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 187 transitions. [2018-10-27 04:48:15,230 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 187 transitions. Word has length 25 [2018-10-27 04:48:15,230 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:15,230 INFO L481 AbstractCegarLoop]: Abstraction has 167 states and 187 transitions. [2018-10-27 04:48:15,230 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:48:15,230 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 187 transitions. [2018-10-27 04:48:15,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-10-27 04:48:15,230 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:15,231 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:15,231 INFO L424 AbstractCegarLoop]: === Iteration 19 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:15,231 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:15,231 INFO L82 PathProgramCache]: Analyzing trace with hash 900144627, now seen corresponding path program 1 times [2018-10-27 04:48:15,231 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:15,232 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:15,264 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:15,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:15,358 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:15,378 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:15,378 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,472 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,472 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:19, output treesize:18 [2018-10-27 04:48:15,494 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:48:15,498 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:48:15,498 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,500 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,511 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:48:15,513 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:48:15,513 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,515 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,523 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,523 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:33, output treesize:20 [2018-10-27 04:48:15,566 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-10-27 04:48:15,571 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-10-27 04:48:15,571 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,574 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,582 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-10-27 04:48:15,585 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-10-27 04:48:15,585 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,587 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,592 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,592 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:36, output treesize:14 [2018-10-27 04:48:15,605 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:15,605 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:15,615 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:15,615 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-27 04:48:15,615 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-27 04:48:15,615 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-27 04:48:15,615 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:48:15,615 INFO L87 Difference]: Start difference. First operand 167 states and 187 transitions. Second operand 7 states. [2018-10-27 04:48:16,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:16,554 INFO L93 Difference]: Finished difference Result 206 states and 223 transitions. [2018-10-27 04:48:16,554 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-27 04:48:16,555 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 25 [2018-10-27 04:48:16,555 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:16,555 INFO L225 Difference]: With dead ends: 206 [2018-10-27 04:48:16,555 INFO L226 Difference]: Without dead ends: 206 [2018-10-27 04:48:16,556 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=44, Invalid=88, Unknown=0, NotChecked=0, Total=132 [2018-10-27 04:48:16,556 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2018-10-27 04:48:16,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 168. [2018-10-27 04:48:16,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-10-27 04:48:16,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 188 transitions. [2018-10-27 04:48:16,558 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 188 transitions. Word has length 25 [2018-10-27 04:48:16,558 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:16,558 INFO L481 AbstractCegarLoop]: Abstraction has 168 states and 188 transitions. [2018-10-27 04:48:16,558 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-27 04:48:16,559 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 188 transitions. [2018-10-27 04:48:16,559 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-10-27 04:48:16,559 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:16,559 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:16,560 INFO L424 AbstractCegarLoop]: === Iteration 20 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:16,560 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:16,560 INFO L82 PathProgramCache]: Analyzing trace with hash -1806678973, now seen corresponding path program 1 times [2018-10-27 04:48:16,560 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:16,560 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:16,575 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:16,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:16,598 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:16,612 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:16,612 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:16,613 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:16,613 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:48:16,613 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:48:16,614 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:48:16,614 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:48:16,614 INFO L87 Difference]: Start difference. First operand 168 states and 188 transitions. Second operand 4 states. [2018-10-27 04:48:16,830 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:16,830 INFO L93 Difference]: Finished difference Result 212 states and 228 transitions. [2018-10-27 04:48:16,830 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 04:48:16,831 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 26 [2018-10-27 04:48:16,831 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:16,831 INFO L225 Difference]: With dead ends: 212 [2018-10-27 04:48:16,831 INFO L226 Difference]: Without dead ends: 212 [2018-10-27 04:48:16,832 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:48:16,832 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 212 states. [2018-10-27 04:48:16,834 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 212 to 168. [2018-10-27 04:48:16,834 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-10-27 04:48:16,834 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 186 transitions. [2018-10-27 04:48:16,834 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 186 transitions. Word has length 26 [2018-10-27 04:48:16,834 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:16,835 INFO L481 AbstractCegarLoop]: Abstraction has 168 states and 186 transitions. [2018-10-27 04:48:16,835 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:48:16,835 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 186 transitions. [2018-10-27 04:48:16,835 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-10-27 04:48:16,835 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:16,835 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:16,836 INFO L424 AbstractCegarLoop]: === Iteration 21 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:16,836 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:16,836 INFO L82 PathProgramCache]: Analyzing trace with hash -175401481, now seen corresponding path program 1 times [2018-10-27 04:48:16,836 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:16,836 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:16,872 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:16,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:16,958 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:16,973 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:16,974 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:16,995 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:16,995 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:48:17,016 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:17,016 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:17,018 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:17,018 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-27 04:48:17,018 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-27 04:48:17,018 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-27 04:48:17,019 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-10-27 04:48:17,019 INFO L87 Difference]: Start difference. First operand 168 states and 186 transitions. Second operand 6 states. [2018-10-27 04:48:17,894 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:17,894 INFO L93 Difference]: Finished difference Result 284 states and 309 transitions. [2018-10-27 04:48:17,895 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-10-27 04:48:17,895 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2018-10-27 04:48:17,895 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:17,896 INFO L225 Difference]: With dead ends: 284 [2018-10-27 04:48:17,896 INFO L226 Difference]: Without dead ends: 284 [2018-10-27 04:48:17,896 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=48, Invalid=84, Unknown=0, NotChecked=0, Total=132 [2018-10-27 04:48:17,896 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 284 states. [2018-10-27 04:48:17,899 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 284 to 185. [2018-10-27 04:48:17,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 185 states. [2018-10-27 04:48:17,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 209 transitions. [2018-10-27 04:48:17,900 INFO L78 Accepts]: Start accepts. Automaton has 185 states and 209 transitions. Word has length 27 [2018-10-27 04:48:17,900 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:17,900 INFO L481 AbstractCegarLoop]: Abstraction has 185 states and 209 transitions. [2018-10-27 04:48:17,900 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-27 04:48:17,900 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 209 transitions. [2018-10-27 04:48:17,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-10-27 04:48:17,901 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:17,901 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:17,902 INFO L424 AbstractCegarLoop]: === Iteration 22 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:17,902 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:17,902 INFO L82 PathProgramCache]: Analyzing trace with hash 1750563605, now seen corresponding path program 1 times [2018-10-27 04:48:17,902 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:17,902 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:17,935 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:18,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:18,028 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:18,094 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:18,094 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:18,095 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:18,095 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-27 04:48:18,095 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-27 04:48:18,096 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-27 04:48:18,096 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:48:18,096 INFO L87 Difference]: Start difference. First operand 185 states and 209 transitions. Second operand 7 states. [2018-10-27 04:48:18,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:18,921 INFO L93 Difference]: Finished difference Result 268 states and 293 transitions. [2018-10-27 04:48:18,922 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-27 04:48:18,923 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 27 [2018-10-27 04:48:18,923 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:18,923 INFO L225 Difference]: With dead ends: 268 [2018-10-27 04:48:18,923 INFO L226 Difference]: Without dead ends: 268 [2018-10-27 04:48:18,924 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=87, Unknown=0, NotChecked=0, Total=132 [2018-10-27 04:48:18,924 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 268 states. [2018-10-27 04:48:18,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 268 to 187. [2018-10-27 04:48:18,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 187 states. [2018-10-27 04:48:18,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 187 states to 187 states and 211 transitions. [2018-10-27 04:48:18,927 INFO L78 Accepts]: Start accepts. Automaton has 187 states and 211 transitions. Word has length 27 [2018-10-27 04:48:18,927 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:18,927 INFO L481 AbstractCegarLoop]: Abstraction has 187 states and 211 transitions. [2018-10-27 04:48:18,927 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-27 04:48:18,927 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 211 transitions. [2018-10-27 04:48:18,927 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-10-27 04:48:18,927 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:18,928 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:18,928 INFO L424 AbstractCegarLoop]: === Iteration 23 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:18,928 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:18,928 INFO L82 PathProgramCache]: Analyzing trace with hash -1142478426, now seen corresponding path program 1 times [2018-10-27 04:48:18,928 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:18,929 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:18,960 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:19,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:19,025 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:19,057 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-10-27 04:48:19,059 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-10-27 04:48:19,059 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:19,061 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:19,065 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:19,065 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:17, output treesize:13 [2018-10-27 04:48:19,107 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:19,107 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:19,108 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:19,108 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-10-27 04:48:19,108 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-27 04:48:19,109 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-27 04:48:19,109 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:48:19,109 INFO L87 Difference]: Start difference. First operand 187 states and 211 transitions. Second operand 8 states. [2018-10-27 04:48:20,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:20,105 INFO L93 Difference]: Finished difference Result 362 states and 407 transitions. [2018-10-27 04:48:20,105 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-10-27 04:48:20,106 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 28 [2018-10-27 04:48:20,106 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:20,106 INFO L225 Difference]: With dead ends: 362 [2018-10-27 04:48:20,107 INFO L226 Difference]: Without dead ends: 362 [2018-10-27 04:48:20,107 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=96, Invalid=210, Unknown=0, NotChecked=0, Total=306 [2018-10-27 04:48:20,107 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 362 states. [2018-10-27 04:48:20,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 362 to 197. [2018-10-27 04:48:20,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2018-10-27 04:48:20,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 222 transitions. [2018-10-27 04:48:20,110 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 222 transitions. Word has length 28 [2018-10-27 04:48:20,110 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:20,110 INFO L481 AbstractCegarLoop]: Abstraction has 197 states and 222 transitions. [2018-10-27 04:48:20,111 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-27 04:48:20,111 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 222 transitions. [2018-10-27 04:48:20,111 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-10-27 04:48:20,111 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:20,111 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:20,111 INFO L424 AbstractCegarLoop]: === Iteration 24 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:20,112 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:20,112 INFO L82 PathProgramCache]: Analyzing trace with hash -1567102978, now seen corresponding path program 1 times [2018-10-27 04:48:20,112 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:20,112 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:20,129 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:20,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:20,293 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:20,296 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:20,296 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:20,307 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:20,308 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:12 [2018-10-27 04:48:20,334 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:20,337 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:20,338 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-10-27 04:48:20,338 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:20,353 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:20,353 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:28, output treesize:26 [2018-10-27 04:48:20,372 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:48:20,375 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:48:20,375 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:20,377 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:20,391 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:20,391 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:37, output treesize:34 [2018-10-27 04:48:20,526 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 35 [2018-10-27 04:48:20,537 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-27 04:48:20,537 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:20,636 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:20,790 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:20,790 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:49, output treesize:30 [2018-10-27 04:48:20,913 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-10-27 04:48:20,915 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-10-27 04:48:20,915 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:20,919 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:20,924 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:20,924 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:17 [2018-10-27 04:48:20,947 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:20,947 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:20,949 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:20,949 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-27 04:48:20,950 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-10-27 04:48:20,950 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-10-27 04:48:20,950 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2018-10-27 04:48:20,950 INFO L87 Difference]: Start difference. First operand 197 states and 222 transitions. Second operand 10 states. [2018-10-27 04:48:22,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:22,551 INFO L93 Difference]: Finished difference Result 297 states and 323 transitions. [2018-10-27 04:48:22,551 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-10-27 04:48:22,552 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 28 [2018-10-27 04:48:22,552 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:22,552 INFO L225 Difference]: With dead ends: 297 [2018-10-27 04:48:22,553 INFO L226 Difference]: Without dead ends: 297 [2018-10-27 04:48:22,553 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2018-10-27 04:48:22,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 297 states. [2018-10-27 04:48:22,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 297 to 198. [2018-10-27 04:48:22,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 198 states. [2018-10-27 04:48:22,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 198 states to 198 states and 223 transitions. [2018-10-27 04:48:22,556 INFO L78 Accepts]: Start accepts. Automaton has 198 states and 223 transitions. Word has length 28 [2018-10-27 04:48:22,556 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:22,556 INFO L481 AbstractCegarLoop]: Abstraction has 198 states and 223 transitions. [2018-10-27 04:48:22,556 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-10-27 04:48:22,556 INFO L276 IsEmpty]: Start isEmpty. Operand 198 states and 223 transitions. [2018-10-27 04:48:22,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-10-27 04:48:22,556 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:22,556 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:22,559 INFO L424 AbstractCegarLoop]: === Iteration 25 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:22,559 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:22,559 INFO L82 PathProgramCache]: Analyzing trace with hash 1486276656, now seen corresponding path program 1 times [2018-10-27 04:48:22,560 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:22,560 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 26 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:22,575 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:22,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:22,635 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:22,661 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-10-27 04:48:22,662 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-10-27 04:48:22,663 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:22,664 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:22,668 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:22,669 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:17, output treesize:13 [2018-10-27 04:48:22,734 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:22,734 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:22,735 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:22,735 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-10-27 04:48:22,736 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-27 04:48:22,736 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-27 04:48:22,736 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:48:22,736 INFO L87 Difference]: Start difference. First operand 198 states and 223 transitions. Second operand 8 states. [2018-10-27 04:48:23,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:23,906 INFO L93 Difference]: Finished difference Result 372 states and 418 transitions. [2018-10-27 04:48:23,907 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-10-27 04:48:23,907 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 28 [2018-10-27 04:48:23,907 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:23,908 INFO L225 Difference]: With dead ends: 372 [2018-10-27 04:48:23,908 INFO L226 Difference]: Without dead ends: 372 [2018-10-27 04:48:23,908 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=96, Invalid=210, Unknown=0, NotChecked=0, Total=306 [2018-10-27 04:48:23,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 372 states. [2018-10-27 04:48:23,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 372 to 198. [2018-10-27 04:48:23,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 198 states. [2018-10-27 04:48:23,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 198 states to 198 states and 223 transitions. [2018-10-27 04:48:23,912 INFO L78 Accepts]: Start accepts. Automaton has 198 states and 223 transitions. Word has length 28 [2018-10-27 04:48:23,912 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:23,912 INFO L481 AbstractCegarLoop]: Abstraction has 198 states and 223 transitions. [2018-10-27 04:48:23,912 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-27 04:48:23,912 INFO L276 IsEmpty]: Start isEmpty. Operand 198 states and 223 transitions. [2018-10-27 04:48:23,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-10-27 04:48:23,914 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:23,914 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:23,915 INFO L424 AbstractCegarLoop]: === Iteration 26 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:23,915 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:23,915 INFO L82 PathProgramCache]: Analyzing trace with hash -1335551945, now seen corresponding path program 1 times [2018-10-27 04:48:23,915 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:23,916 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:23,949 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:24,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:24,203 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:24,221 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:24,222 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:24,256 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:24,256 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:48:24,278 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:24,281 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:24,282 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-10-27 04:48:24,282 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:24,296 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:24,296 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:24,316 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:24,316 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:31, output treesize:22 [2018-10-27 04:48:24,338 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:48:24,340 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:48:24,341 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:24,344 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:24,362 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:48:24,367 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:48:24,367 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:24,369 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:24,383 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:24,383 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:43, output treesize:34 [2018-10-27 04:48:24,458 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-10-27 04:48:24,461 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-27 04:48:24,461 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:24,469 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:24,494 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 46 [2018-10-27 04:48:24,497 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-27 04:48:24,497 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:24,560 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:24,576 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:24,576 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:68, output treesize:30 [2018-10-27 04:48:24,599 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:48:24,602 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-27 04:48:24,602 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:24,604 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:24,615 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-10-27 04:48:24,617 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-10-27 04:48:24,618 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:24,622 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:24,629 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:24,629 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:42, output treesize:12 [2018-10-27 04:48:24,647 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:24,647 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:24,649 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:24,649 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-10-27 04:48:24,649 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-27 04:48:24,649 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-27 04:48:24,649 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-10-27 04:48:24,650 INFO L87 Difference]: Start difference. First operand 198 states and 223 transitions. Second operand 9 states. [2018-10-27 04:48:26,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:26,399 INFO L93 Difference]: Finished difference Result 225 states and 243 transitions. [2018-10-27 04:48:26,400 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-27 04:48:26,400 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-10-27 04:48:26,400 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:26,401 INFO L225 Difference]: With dead ends: 225 [2018-10-27 04:48:26,401 INFO L226 Difference]: Without dead ends: 225 [2018-10-27 04:48:26,401 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2018-10-27 04:48:26,401 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225 states. [2018-10-27 04:48:26,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225 to 199. [2018-10-27 04:48:26,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 199 states. [2018-10-27 04:48:26,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199 states to 199 states and 224 transitions. [2018-10-27 04:48:26,404 INFO L78 Accepts]: Start accepts. Automaton has 199 states and 224 transitions. Word has length 29 [2018-10-27 04:48:26,404 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:26,404 INFO L481 AbstractCegarLoop]: Abstraction has 199 states and 224 transitions. [2018-10-27 04:48:26,404 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-27 04:48:26,404 INFO L276 IsEmpty]: Start isEmpty. Operand 199 states and 224 transitions. [2018-10-27 04:48:26,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-10-27 04:48:26,405 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:26,405 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:26,405 INFO L424 AbstractCegarLoop]: === Iteration 27 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:26,405 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:26,406 INFO L82 PathProgramCache]: Analyzing trace with hash 1595593327, now seen corresponding path program 1 times [2018-10-27 04:48:26,406 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:26,406 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:26,421 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:26,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:26,446 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:26,454 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:26,454 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:26,455 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:26,455 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:48:26,456 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:48:26,456 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:48:26,456 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:48:26,456 INFO L87 Difference]: Start difference. First operand 199 states and 224 transitions. Second operand 4 states. [2018-10-27 04:48:26,478 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:26,479 INFO L93 Difference]: Finished difference Result 227 states and 258 transitions. [2018-10-27 04:48:26,479 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 04:48:26,479 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2018-10-27 04:48:26,479 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:26,480 INFO L225 Difference]: With dead ends: 227 [2018-10-27 04:48:26,480 INFO L226 Difference]: Without dead ends: 227 [2018-10-27 04:48:26,480 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:48:26,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227 states. [2018-10-27 04:48:26,482 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227 to 203. [2018-10-27 04:48:26,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 203 states. [2018-10-27 04:48:26,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 203 states to 203 states and 228 transitions. [2018-10-27 04:48:26,482 INFO L78 Accepts]: Start accepts. Automaton has 203 states and 228 transitions. Word has length 30 [2018-10-27 04:48:26,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:26,483 INFO L481 AbstractCegarLoop]: Abstraction has 203 states and 228 transitions. [2018-10-27 04:48:26,483 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:48:26,483 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 228 transitions. [2018-10-27 04:48:26,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-10-27 04:48:26,483 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:26,483 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:26,483 INFO L424 AbstractCegarLoop]: === Iteration 28 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:26,483 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:26,483 INFO L82 PathProgramCache]: Analyzing trace with hash 1621874851, now seen corresponding path program 1 times [2018-10-27 04:48:26,484 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:26,484 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:26,498 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:26,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:26,589 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:26,705 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:26,705 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:26,707 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:26,707 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-10-27 04:48:26,707 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-27 04:48:26,707 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-27 04:48:26,707 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-10-27 04:48:26,707 INFO L87 Difference]: Start difference. First operand 203 states and 228 transitions. Second operand 9 states. [2018-10-27 04:48:28,082 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:28,083 INFO L93 Difference]: Finished difference Result 243 states and 262 transitions. [2018-10-27 04:48:28,084 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-10-27 04:48:28,084 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 31 [2018-10-27 04:48:28,084 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:28,085 INFO L225 Difference]: With dead ends: 243 [2018-10-27 04:48:28,085 INFO L226 Difference]: Without dead ends: 243 [2018-10-27 04:48:28,085 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=89, Invalid=183, Unknown=0, NotChecked=0, Total=272 [2018-10-27 04:48:28,085 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 243 states. [2018-10-27 04:48:28,087 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 243 to 203. [2018-10-27 04:48:28,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 203 states. [2018-10-27 04:48:28,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 203 states to 203 states and 224 transitions. [2018-10-27 04:48:28,088 INFO L78 Accepts]: Start accepts. Automaton has 203 states and 224 transitions. Word has length 31 [2018-10-27 04:48:28,088 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:28,088 INFO L481 AbstractCegarLoop]: Abstraction has 203 states and 224 transitions. [2018-10-27 04:48:28,088 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-27 04:48:28,088 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 224 transitions. [2018-10-27 04:48:28,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-10-27 04:48:28,088 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:28,089 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:28,091 INFO L424 AbstractCegarLoop]: === Iteration 29 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:28,091 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:28,092 INFO L82 PathProgramCache]: Analyzing trace with hash 729806201, now seen corresponding path program 1 times [2018-10-27 04:48:28,092 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:28,092 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:28,114 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:28,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:28,210 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:28,217 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-10-27 04:48:28,219 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-10-27 04:48:28,219 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:28,220 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:28,222 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:28,222 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:11, output treesize:3 [2018-10-27 04:48:28,236 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:28,236 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:28,237 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:28,237 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:48:28,237 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:48:28,238 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:48:28,238 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:48:28,238 INFO L87 Difference]: Start difference. First operand 203 states and 224 transitions. Second operand 5 states. [2018-10-27 04:48:28,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:28,757 INFO L93 Difference]: Finished difference Result 207 states and 226 transitions. [2018-10-27 04:48:28,758 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-27 04:48:28,758 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2018-10-27 04:48:28,758 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:28,759 INFO L225 Difference]: With dead ends: 207 [2018-10-27 04:48:28,759 INFO L226 Difference]: Without dead ends: 207 [2018-10-27 04:48:28,759 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:48:28,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2018-10-27 04:48:28,761 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 200. [2018-10-27 04:48:28,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 200 states. [2018-10-27 04:48:28,762 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 200 states to 200 states and 221 transitions. [2018-10-27 04:48:28,762 INFO L78 Accepts]: Start accepts. Automaton has 200 states and 221 transitions. Word has length 31 [2018-10-27 04:48:28,762 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:28,762 INFO L481 AbstractCegarLoop]: Abstraction has 200 states and 221 transitions. [2018-10-27 04:48:28,762 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:48:28,762 INFO L276 IsEmpty]: Start isEmpty. Operand 200 states and 221 transitions. [2018-10-27 04:48:28,762 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-10-27 04:48:28,763 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:28,763 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:28,763 INFO L424 AbstractCegarLoop]: === Iteration 30 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:28,763 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:28,763 INFO L82 PathProgramCache]: Analyzing trace with hash 1149155875, now seen corresponding path program 1 times [2018-10-27 04:48:28,764 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:28,764 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:28,800 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:28,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:28,993 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:28,997 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:28,997 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:29,009 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:29,009 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:48:29,037 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:29,038 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:29,038 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-10-27 04:48:29,039 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:29,051 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:29,052 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:29,062 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:29,062 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:31, output treesize:22 [2018-10-27 04:48:29,085 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:48:29,088 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:48:29,088 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:29,091 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:29,110 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:48:29,112 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:48:29,112 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:29,115 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:29,128 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:29,128 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:43, output treesize:34 [2018-10-27 04:48:29,293 INFO L303 Elim1Store]: Index analysis took 121 ms [2018-10-27 04:48:29,294 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-10-27 04:48:29,305 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-27 04:48:29,305 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:29,314 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:29,341 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 46 [2018-10-27 04:48:29,344 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-27 04:48:29,344 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:29,355 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:29,371 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:29,372 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:68, output treesize:30 [2018-10-27 04:48:29,394 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:48:29,396 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-27 04:48:29,397 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:29,399 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:29,410 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-10-27 04:48:29,412 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-10-27 04:48:29,413 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:29,417 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:29,424 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:29,424 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:42, output treesize:12 [2018-10-27 04:48:29,479 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:29,479 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:29,481 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:29,482 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-10-27 04:48:29,482 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-10-27 04:48:29,482 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-10-27 04:48:29,482 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2018-10-27 04:48:29,482 INFO L87 Difference]: Start difference. First operand 200 states and 221 transitions. Second operand 11 states. [2018-10-27 04:48:32,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:32,030 INFO L93 Difference]: Finished difference Result 363 states and 393 transitions. [2018-10-27 04:48:32,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-10-27 04:48:32,031 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 32 [2018-10-27 04:48:32,032 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:32,032 INFO L225 Difference]: With dead ends: 363 [2018-10-27 04:48:32,032 INFO L226 Difference]: Without dead ends: 363 [2018-10-27 04:48:32,033 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=86, Invalid=334, Unknown=0, NotChecked=0, Total=420 [2018-10-27 04:48:32,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 363 states. [2018-10-27 04:48:32,035 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 363 to 208. [2018-10-27 04:48:32,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 208 states. [2018-10-27 04:48:32,036 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 208 states to 208 states and 231 transitions. [2018-10-27 04:48:32,036 INFO L78 Accepts]: Start accepts. Automaton has 208 states and 231 transitions. Word has length 32 [2018-10-27 04:48:32,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:32,036 INFO L481 AbstractCegarLoop]: Abstraction has 208 states and 231 transitions. [2018-10-27 04:48:32,036 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-10-27 04:48:32,036 INFO L276 IsEmpty]: Start isEmpty. Operand 208 states and 231 transitions. [2018-10-27 04:48:32,037 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-10-27 04:48:32,039 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:32,039 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:32,039 INFO L424 AbstractCegarLoop]: === Iteration 31 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:32,039 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:32,039 INFO L82 PathProgramCache]: Analyzing trace with hash 532204837, now seen corresponding path program 1 times [2018-10-27 04:48:32,040 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:32,040 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:32,057 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:32,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:32,348 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:32,351 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:32,351 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:32,361 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:32,361 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:48:32,389 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:32,393 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:32,394 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-10-27 04:48:32,394 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:32,413 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:32,414 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:32,428 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:32,428 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:37, output treesize:34 [2018-10-27 04:48:32,457 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:48:32,460 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:48:32,460 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:32,463 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:32,486 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:48:32,490 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:48:32,491 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:32,493 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:32,510 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:32,511 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:55, output treesize:50 [2018-10-27 04:48:32,632 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-10-27 04:48:32,635 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-27 04:48:32,635 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:32,644 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:32,673 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 57 [2018-10-27 04:48:32,676 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-27 04:48:32,677 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:32,690 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:32,712 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:32,712 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:86, output treesize:48 [2018-10-27 04:48:32,738 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:48:32,740 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-27 04:48:32,741 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:32,744 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:32,759 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 26 [2018-10-27 04:48:32,761 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 15 [2018-10-27 04:48:32,762 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:32,767 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:32,777 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:32,777 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:58, output treesize:28 [2018-10-27 04:48:32,840 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:32,841 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:32,842 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:32,843 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 13 [2018-10-27 04:48:32,843 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:32,866 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-10-27 04:48:32,866 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:32,884 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:32,884 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:45, output treesize:16 [2018-10-27 04:48:32,903 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:32,903 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:32,906 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:32,906 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-10-27 04:48:32,906 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-10-27 04:48:32,906 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-10-27 04:48:32,906 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=84, Unknown=0, NotChecked=0, Total=110 [2018-10-27 04:48:32,907 INFO L87 Difference]: Start difference. First operand 208 states and 231 transitions. Second operand 11 states. [2018-10-27 04:48:34,469 WARN L179 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 55 [2018-10-27 04:48:35,323 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:35,323 INFO L93 Difference]: Finished difference Result 324 states and 352 transitions. [2018-10-27 04:48:35,324 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-10-27 04:48:35,324 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 34 [2018-10-27 04:48:35,324 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:35,325 INFO L225 Difference]: With dead ends: 324 [2018-10-27 04:48:35,325 INFO L226 Difference]: Without dead ends: 324 [2018-10-27 04:48:35,326 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=136, Invalid=416, Unknown=0, NotChecked=0, Total=552 [2018-10-27 04:48:35,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 324 states. [2018-10-27 04:48:35,328 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 324 to 204. [2018-10-27 04:48:35,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204 states. [2018-10-27 04:48:35,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204 states to 204 states and 227 transitions. [2018-10-27 04:48:35,328 INFO L78 Accepts]: Start accepts. Automaton has 204 states and 227 transitions. Word has length 34 [2018-10-27 04:48:35,328 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:35,328 INFO L481 AbstractCegarLoop]: Abstraction has 204 states and 227 transitions. [2018-10-27 04:48:35,329 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-10-27 04:48:35,331 INFO L276 IsEmpty]: Start isEmpty. Operand 204 states and 227 transitions. [2018-10-27 04:48:35,331 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-10-27 04:48:35,331 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:35,331 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:35,332 INFO L424 AbstractCegarLoop]: === Iteration 32 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:35,332 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:35,332 INFO L82 PathProgramCache]: Analyzing trace with hash 1468198061, now seen corresponding path program 1 times [2018-10-27 04:48:35,332 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:35,332 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:35,364 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:35,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:35,390 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:35,397 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:35,397 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:35,398 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:35,398 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-27 04:48:35,399 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:48:35,399 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:48:35,399 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:48:35,399 INFO L87 Difference]: Start difference. First operand 204 states and 227 transitions. Second operand 5 states. [2018-10-27 04:48:35,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:35,437 INFO L93 Difference]: Finished difference Result 228 states and 251 transitions. [2018-10-27 04:48:35,438 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-27 04:48:35,438 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 35 [2018-10-27 04:48:35,438 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:35,438 INFO L225 Difference]: With dead ends: 228 [2018-10-27 04:48:35,439 INFO L226 Difference]: Without dead ends: 228 [2018-10-27 04:48:35,439 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:48:35,439 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228 states. [2018-10-27 04:48:35,441 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228 to 208. [2018-10-27 04:48:35,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 208 states. [2018-10-27 04:48:35,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 208 states to 208 states and 231 transitions. [2018-10-27 04:48:35,442 INFO L78 Accepts]: Start accepts. Automaton has 208 states and 231 transitions. Word has length 35 [2018-10-27 04:48:35,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:35,442 INFO L481 AbstractCegarLoop]: Abstraction has 208 states and 231 transitions. [2018-10-27 04:48:35,442 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:48:35,442 INFO L276 IsEmpty]: Start isEmpty. Operand 208 states and 231 transitions. [2018-10-27 04:48:35,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-10-27 04:48:35,442 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:35,442 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:35,443 INFO L424 AbstractCegarLoop]: === Iteration 33 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:35,443 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:35,443 INFO L82 PathProgramCache]: Analyzing trace with hash 169666178, now seen corresponding path program 1 times [2018-10-27 04:48:35,443 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:35,443 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:35,459 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:35,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:35,630 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:35,632 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:35,633 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:35,647 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:35,647 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:12 [2018-10-27 04:48:35,674 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:35,677 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:35,678 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-10-27 04:48:35,678 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:35,690 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:35,690 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:28, output treesize:26 [2018-10-27 04:48:35,709 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-10-27 04:48:35,712 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-10-27 04:48:35,712 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:35,714 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:35,728 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:35,728 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:41, output treesize:38 [2018-10-27 04:48:35,851 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 41 [2018-10-27 04:48:35,854 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-10-27 04:48:35,854 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:35,862 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:35,872 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:35,873 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:55, output treesize:32 [2018-10-27 04:48:35,950 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-10-27 04:48:35,952 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-10-27 04:48:35,953 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:35,956 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:35,962 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:35,962 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:17 [2018-10-27 04:48:35,985 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:35,985 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:35,990 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:35,990 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-10-27 04:48:35,990 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-10-27 04:48:35,990 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-10-27 04:48:35,991 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=81, Unknown=0, NotChecked=0, Total=110 [2018-10-27 04:48:35,991 INFO L87 Difference]: Start difference. First operand 208 states and 231 transitions. Second operand 11 states. [2018-10-27 04:48:38,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:38,061 INFO L93 Difference]: Finished difference Result 357 states and 392 transitions. [2018-10-27 04:48:38,062 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-10-27 04:48:38,062 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 36 [2018-10-27 04:48:38,062 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:38,063 INFO L225 Difference]: With dead ends: 357 [2018-10-27 04:48:38,063 INFO L226 Difference]: Without dead ends: 357 [2018-10-27 04:48:38,063 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 93 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=141, Invalid=321, Unknown=0, NotChecked=0, Total=462 [2018-10-27 04:48:38,064 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 357 states. [2018-10-27 04:48:38,066 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 357 to 222. [2018-10-27 04:48:38,066 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 222 states. [2018-10-27 04:48:38,066 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222 states to 222 states and 247 transitions. [2018-10-27 04:48:38,066 INFO L78 Accepts]: Start accepts. Automaton has 222 states and 247 transitions. Word has length 36 [2018-10-27 04:48:38,067 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:38,067 INFO L481 AbstractCegarLoop]: Abstraction has 222 states and 247 transitions. [2018-10-27 04:48:38,067 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-10-27 04:48:38,067 INFO L276 IsEmpty]: Start isEmpty. Operand 222 states and 247 transitions. [2018-10-27 04:48:38,067 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-10-27 04:48:38,067 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:38,067 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:38,068 INFO L424 AbstractCegarLoop]: === Iteration 34 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:38,068 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:38,068 INFO L82 PathProgramCache]: Analyzing trace with hash 347744295, now seen corresponding path program 1 times [2018-10-27 04:48:38,068 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:38,068 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:38,090 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:38,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:38,325 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:38,329 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-10-27 04:48:38,333 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-10-27 04:48:38,333 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:38,334 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:38,337 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:38,337 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:11, output treesize:3 [2018-10-27 04:48:38,423 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:38,423 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:38,425 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:38,425 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-27 04:48:38,425 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-27 04:48:38,425 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-27 04:48:38,425 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:48:38,425 INFO L87 Difference]: Start difference. First operand 222 states and 247 transitions. Second operand 7 states. [2018-10-27 04:48:39,242 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:39,242 INFO L93 Difference]: Finished difference Result 234 states and 261 transitions. [2018-10-27 04:48:39,244 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-10-27 04:48:39,244 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 36 [2018-10-27 04:48:39,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:39,245 INFO L225 Difference]: With dead ends: 234 [2018-10-27 04:48:39,245 INFO L226 Difference]: Without dead ends: 234 [2018-10-27 04:48:39,245 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=41, Invalid=91, Unknown=0, NotChecked=0, Total=132 [2018-10-27 04:48:39,245 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 234 states. [2018-10-27 04:48:39,246 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 234 to 221. [2018-10-27 04:48:39,246 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 221 states. [2018-10-27 04:48:39,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221 states to 221 states and 246 transitions. [2018-10-27 04:48:39,247 INFO L78 Accepts]: Start accepts. Automaton has 221 states and 246 transitions. Word has length 36 [2018-10-27 04:48:39,247 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:39,247 INFO L481 AbstractCegarLoop]: Abstraction has 221 states and 246 transitions. [2018-10-27 04:48:39,247 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-27 04:48:39,247 INFO L276 IsEmpty]: Start isEmpty. Operand 221 states and 246 transitions. [2018-10-27 04:48:39,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-10-27 04:48:39,248 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:39,248 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:39,248 INFO L424 AbstractCegarLoop]: === Iteration 35 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:39,248 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:39,249 INFO L82 PathProgramCache]: Analyzing trace with hash 964684426, now seen corresponding path program 1 times [2018-10-27 04:48:39,249 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:39,249 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 36 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:39,269 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:39,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:39,444 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:39,453 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:39,453 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:39,461 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:39,461 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:48:39,477 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:39,478 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:39,479 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-27 04:48:39,479 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:39,493 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:39,493 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:39,504 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:39,505 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:31, output treesize:24 [2018-10-27 04:48:39,530 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-10-27 04:48:39,532 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-10-27 04:48:39,532 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:39,535 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:39,554 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-10-27 04:48:39,557 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-10-27 04:48:39,557 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:39,559 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:39,575 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:39,575 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:49, output treesize:44 [2018-10-27 04:48:39,628 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 34 [2018-10-27 04:48:39,649 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-10-27 04:48:39,650 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:39,693 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:39,720 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 52 [2018-10-27 04:48:39,723 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-10-27 04:48:39,723 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:39,734 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:39,749 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:39,749 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:80, output treesize:34 [2018-10-27 04:48:39,830 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:48:39,832 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-27 04:48:39,832 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:39,834 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:39,845 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-10-27 04:48:39,864 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-10-27 04:48:39,864 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:39,868 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:39,875 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:39,875 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:42, output treesize:12 [2018-10-27 04:48:39,899 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:39,899 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:39,902 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:39,902 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-27 04:48:39,902 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-10-27 04:48:39,902 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-10-27 04:48:39,903 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2018-10-27 04:48:39,903 INFO L87 Difference]: Start difference. First operand 221 states and 246 transitions. Second operand 10 states. [2018-10-27 04:48:42,417 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:42,417 INFO L93 Difference]: Finished difference Result 312 states and 343 transitions. [2018-10-27 04:48:42,418 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-10-27 04:48:42,418 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 37 [2018-10-27 04:48:42,418 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:42,419 INFO L225 Difference]: With dead ends: 312 [2018-10-27 04:48:42,419 INFO L226 Difference]: Without dead ends: 312 [2018-10-27 04:48:42,419 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=108, Invalid=312, Unknown=0, NotChecked=0, Total=420 [2018-10-27 04:48:42,420 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 312 states. [2018-10-27 04:48:42,421 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 312 to 222. [2018-10-27 04:48:42,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 222 states. [2018-10-27 04:48:42,422 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222 states to 222 states and 247 transitions. [2018-10-27 04:48:42,422 INFO L78 Accepts]: Start accepts. Automaton has 222 states and 247 transitions. Word has length 37 [2018-10-27 04:48:42,422 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:42,422 INFO L481 AbstractCegarLoop]: Abstraction has 222 states and 247 transitions. [2018-10-27 04:48:42,422 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-10-27 04:48:42,422 INFO L276 IsEmpty]: Start isEmpty. Operand 222 states and 247 transitions. [2018-10-27 04:48:42,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-10-27 04:48:42,422 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:42,423 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:42,423 INFO L424 AbstractCegarLoop]: === Iteration 36 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:42,423 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:42,423 INFO L82 PathProgramCache]: Analyzing trace with hash -1721106615, now seen corresponding path program 1 times [2018-10-27 04:48:42,423 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:42,423 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:42,443 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:42,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:42,524 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:42,534 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:42,534 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:42,538 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:42,538 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:48:42,587 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:42,587 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:42,588 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:42,589 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:48:42,589 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:48:42,589 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:48:42,589 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:48:42,589 INFO L87 Difference]: Start difference. First operand 222 states and 247 transitions. Second operand 5 states. [2018-10-27 04:48:43,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:43,350 INFO L93 Difference]: Finished difference Result 276 states and 300 transitions. [2018-10-27 04:48:43,351 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-27 04:48:43,351 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 37 [2018-10-27 04:48:43,351 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:43,351 INFO L225 Difference]: With dead ends: 276 [2018-10-27 04:48:43,352 INFO L226 Difference]: Without dead ends: 276 [2018-10-27 04:48:43,352 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:48:43,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 276 states. [2018-10-27 04:48:43,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 276 to 223. [2018-10-27 04:48:43,353 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223 states. [2018-10-27 04:48:43,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223 states to 223 states and 247 transitions. [2018-10-27 04:48:43,354 INFO L78 Accepts]: Start accepts. Automaton has 223 states and 247 transitions. Word has length 37 [2018-10-27 04:48:43,354 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:43,354 INFO L481 AbstractCegarLoop]: Abstraction has 223 states and 247 transitions. [2018-10-27 04:48:43,354 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:48:43,354 INFO L276 IsEmpty]: Start isEmpty. Operand 223 states and 247 transitions. [2018-10-27 04:48:43,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-10-27 04:48:43,355 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:43,355 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:43,355 INFO L424 AbstractCegarLoop]: === Iteration 37 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:43,355 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:43,355 INFO L82 PathProgramCache]: Analyzing trace with hash -2104828609, now seen corresponding path program 1 times [2018-10-27 04:48:43,356 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:43,356 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 38 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:43,369 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:43,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:43,497 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:43,503 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-10-27 04:48:43,505 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-10-27 04:48:43,505 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:43,506 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:43,509 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:43,509 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:7, output treesize:1 [2018-10-27 04:48:43,512 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:43,512 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:43,526 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:43,526 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:15, output treesize:14 [2018-10-27 04:48:43,540 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:48:43,542 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:48:43,542 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:43,544 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:43,549 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:43,549 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:19, output treesize:9 [2018-10-27 04:48:43,557 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-10-27 04:48:43,559 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-10-27 04:48:43,559 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:43,560 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:43,561 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:43,561 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:17, output treesize:5 [2018-10-27 04:48:43,570 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:43,570 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:43,572 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:43,572 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:48:43,573 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:48:43,573 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:48:43,573 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:48:43,573 INFO L87 Difference]: Start difference. First operand 223 states and 247 transitions. Second operand 5 states. [2018-10-27 04:48:44,305 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:44,305 INFO L93 Difference]: Finished difference Result 224 states and 246 transitions. [2018-10-27 04:48:44,306 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 04:48:44,306 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 37 [2018-10-27 04:48:44,306 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:44,307 INFO L225 Difference]: With dead ends: 224 [2018-10-27 04:48:44,307 INFO L226 Difference]: Without dead ends: 224 [2018-10-27 04:48:44,307 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:48:44,307 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2018-10-27 04:48:44,308 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 222. [2018-10-27 04:48:44,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 222 states. [2018-10-27 04:48:44,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222 states to 222 states and 246 transitions. [2018-10-27 04:48:44,309 INFO L78 Accepts]: Start accepts. Automaton has 222 states and 246 transitions. Word has length 37 [2018-10-27 04:48:44,309 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:44,309 INFO L481 AbstractCegarLoop]: Abstraction has 222 states and 246 transitions. [2018-10-27 04:48:44,310 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:48:44,310 INFO L276 IsEmpty]: Start isEmpty. Operand 222 states and 246 transitions. [2018-10-27 04:48:44,310 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-10-27 04:48:44,310 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:44,310 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:44,311 INFO L424 AbstractCegarLoop]: === Iteration 38 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:44,311 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:44,311 INFO L82 PathProgramCache]: Analyzing trace with hash -825177303, now seen corresponding path program 1 times [2018-10-27 04:48:44,311 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:44,311 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:44,337 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:44,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:44,494 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:44,502 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-10-27 04:48:44,504 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-10-27 04:48:44,504 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:44,509 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:44,509 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:44,510 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:7, output treesize:1 [2018-10-27 04:48:44,513 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:44,513 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:44,523 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:44,523 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:18, output treesize:17 [2018-10-27 04:48:44,570 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:48:44,589 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:48:44,590 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:44,613 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:44,753 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:48:44,764 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:48:44,764 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:44,788 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:44,830 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:44,830 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:30, output treesize:17 [2018-10-27 04:48:44,843 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:48:44,845 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-27 04:48:44,845 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:44,848 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:44,857 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-10-27 04:48:44,859 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-10-27 04:48:44,859 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:44,861 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:44,916 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:44,916 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:34, output treesize:12 [2018-10-27 04:48:44,932 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:44,932 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:44,934 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:44,934 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:48:44,934 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:48:44,934 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:48:44,934 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:48:44,935 INFO L87 Difference]: Start difference. First operand 222 states and 246 transitions. Second operand 5 states. [2018-10-27 04:48:45,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:45,730 INFO L93 Difference]: Finished difference Result 331 states and 369 transitions. [2018-10-27 04:48:45,731 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-27 04:48:45,731 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 38 [2018-10-27 04:48:45,731 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:45,732 INFO L225 Difference]: With dead ends: 331 [2018-10-27 04:48:45,732 INFO L226 Difference]: Without dead ends: 331 [2018-10-27 04:48:45,732 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:48:45,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 331 states. [2018-10-27 04:48:45,734 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 331 to 221. [2018-10-27 04:48:45,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 221 states. [2018-10-27 04:48:45,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221 states to 221 states and 245 transitions. [2018-10-27 04:48:45,735 INFO L78 Accepts]: Start accepts. Automaton has 221 states and 245 transitions. Word has length 38 [2018-10-27 04:48:45,735 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:45,735 INFO L481 AbstractCegarLoop]: Abstraction has 221 states and 245 transitions. [2018-10-27 04:48:45,735 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:48:45,735 INFO L276 IsEmpty]: Start isEmpty. Operand 221 states and 245 transitions. [2018-10-27 04:48:45,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-10-27 04:48:45,736 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:45,736 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:45,736 INFO L424 AbstractCegarLoop]: === Iteration 39 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:45,736 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:45,736 INFO L82 PathProgramCache]: Analyzing trace with hash -104075696, now seen corresponding path program 1 times [2018-10-27 04:48:45,737 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:45,740 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 40 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:45,753 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:46,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:46,065 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:46,069 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:46,069 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:46,082 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:46,082 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:48:46,103 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:46,104 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:46,105 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-10-27 04:48:46,105 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:46,155 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:46,156 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:46,166 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:46,166 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:31, output treesize:22 [2018-10-27 04:48:46,188 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:48:46,190 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:48:46,190 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:46,193 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:46,212 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:48:46,214 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:48:46,214 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:46,220 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:46,234 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:46,234 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:43, output treesize:34 [2018-10-27 04:48:46,288 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-10-27 04:48:46,291 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-27 04:48:46,291 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:46,300 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:46,324 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 46 [2018-10-27 04:48:46,326 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-27 04:48:46,326 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:46,337 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:46,353 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:46,353 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:68, output treesize:30 [2018-10-27 04:48:46,380 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:48:46,382 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-27 04:48:46,382 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:46,385 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:46,398 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-10-27 04:48:46,401 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-10-27 04:48:46,402 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:46,407 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:46,415 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:46,415 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:45, output treesize:15 [2018-10-27 04:48:46,457 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:46,458 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:46,459 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-10-27 04:48:46,459 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:46,473 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-10-27 04:48:46,474 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:46,483 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:46,484 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:32, output treesize:14 [2018-10-27 04:48:46,505 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:46,505 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:48:46,681 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:48:46,700 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:48:46,701 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 11 [2018-10-27 04:48:46,701 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:46,745 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:48:46,746 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:48:46,746 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 18 [2018-10-27 04:48:46,747 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:46,787 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:48:46,788 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:48:46,788 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 13 [2018-10-27 04:48:46,789 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:46,824 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-10-27 04:48:46,824 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 7 variables, input treesize:70, output treesize:37 [2018-10-27 04:48:47,654 WARN L179 SmtUtils]: Spent 450.00 ms on a formula simplification that was a NOOP. DAG size: 42 [2018-10-27 04:48:48,658 WARN L179 SmtUtils]: Spent 666.00 ms on a formula simplification that was a NOOP. DAG size: 95 [2018-10-27 04:48:48,673 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 259 treesize of output 220 [2018-10-27 04:48:49,077 WARN L179 SmtUtils]: Spent 402.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 70 [2018-10-27 04:48:49,083 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:48:49,083 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:49,338 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 68 [2018-10-27 04:48:49,347 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 43 [2018-10-27 04:48:49,348 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:49,456 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:49,462 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 112 treesize of output 108 [2018-10-27 04:48:49,471 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 101 treesize of output 89 [2018-10-27 04:48:49,471 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:49,510 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:49,518 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 27 [2018-10-27 04:48:49,522 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:48:49,522 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:49,545 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:49,550 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 68 [2018-10-27 04:48:49,555 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 43 [2018-10-27 04:48:49,555 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:49,595 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:49,601 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 112 treesize of output 108 [2018-10-27 04:48:49,606 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 101 treesize of output 89 [2018-10-27 04:48:49,606 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:49,654 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:49,659 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 71 [2018-10-27 04:48:49,664 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 46 [2018-10-27 04:48:49,664 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:49,713 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:49,723 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 113 treesize of output 111 [2018-10-27 04:48:49,729 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 95 treesize of output 85 [2018-10-27 04:48:49,730 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:49,773 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:49,778 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 71 [2018-10-27 04:48:49,783 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-10-27 04:48:49,784 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:49,821 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:50,124 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 13 xjuncts. [2018-10-27 04:48:50,155 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 138 treesize of output 115 [2018-10-27 04:48:50,272 WARN L179 SmtUtils]: Spent 115.00 ms on a formula simplification that was a NOOP. DAG size: 55 [2018-10-27 04:48:50,277 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:48:50,277 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:50,402 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 19 [2018-10-27 04:48:50,407 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:48:50,408 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:50,476 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:50,480 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 60 [2018-10-27 04:48:50,484 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 43 [2018-10-27 04:48:50,485 INFO L267 ElimStorePlain]: Start of recursive call 25: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:50,506 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:50,510 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 63 [2018-10-27 04:48:50,515 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-10-27 04:48:50,515 INFO L267 ElimStorePlain]: Start of recursive call 27: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:50,542 INFO L267 ElimStorePlain]: Start of recursive call 26: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:50,546 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 60 [2018-10-27 04:48:50,551 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 43 [2018-10-27 04:48:50,551 INFO L267 ElimStorePlain]: Start of recursive call 29: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:50,570 INFO L267 ElimStorePlain]: Start of recursive call 28: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:50,659 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 6 xjuncts. [2018-10-27 04:48:50,680 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 262 treesize of output 223 [2018-10-27 04:48:51,125 WARN L179 SmtUtils]: Spent 443.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 67 [2018-10-27 04:48:51,132 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:48:51,132 INFO L267 ElimStorePlain]: Start of recursive call 31: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:51,585 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 112 treesize of output 107 [2018-10-27 04:48:51,591 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:48:51,591 INFO L267 ElimStorePlain]: Start of recursive call 33: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:51,648 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 43 [2018-10-27 04:48:51,649 INFO L267 ElimStorePlain]: Start of recursive call 34: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:51,671 INFO L267 ElimStorePlain]: Start of recursive call 32: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:51,681 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 75 [2018-10-27 04:48:51,687 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:48:51,687 INFO L267 ElimStorePlain]: Start of recursive call 36: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:51,720 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 51 [2018-10-27 04:48:51,721 INFO L267 ElimStorePlain]: Start of recursive call 37: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:51,753 INFO L267 ElimStorePlain]: Start of recursive call 35: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:51,761 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 71 [2018-10-27 04:48:51,766 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:48:51,766 INFO L267 ElimStorePlain]: Start of recursive call 39: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:51,813 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 51 [2018-10-27 04:48:51,814 INFO L267 ElimStorePlain]: Start of recursive call 40: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:51,850 INFO L267 ElimStorePlain]: Start of recursive call 38: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:51,860 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 117 treesize of output 114 [2018-10-27 04:48:51,871 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 85 [2018-10-27 04:48:51,872 INFO L267 ElimStorePlain]: Start of recursive call 42: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:51,932 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:48:51,932 INFO L267 ElimStorePlain]: Start of recursive call 43: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:51,971 INFO L267 ElimStorePlain]: Start of recursive call 41: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:51,976 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 27 [2018-10-27 04:48:51,982 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:48:51,982 INFO L267 ElimStorePlain]: Start of recursive call 45: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:52,005 INFO L267 ElimStorePlain]: Start of recursive call 44: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:52,015 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 116 treesize of output 111 [2018-10-27 04:48:52,022 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:48:52,022 INFO L267 ElimStorePlain]: Start of recursive call 47: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:52,065 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 95 treesize of output 89 [2018-10-27 04:48:52,066 INFO L267 ElimStorePlain]: Start of recursive call 48: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:52,119 INFO L267 ElimStorePlain]: Start of recursive call 46: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:52,129 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 66 [2018-10-27 04:48:52,135 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 38 [2018-10-27 04:48:52,135 INFO L267 ElimStorePlain]: Start of recursive call 50: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:52,184 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:48:52,184 INFO L267 ElimStorePlain]: Start of recursive call 51: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:52,214 INFO L267 ElimStorePlain]: Start of recursive call 49: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:52,223 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 78 [2018-10-27 04:48:52,230 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:48:52,230 INFO L267 ElimStorePlain]: Start of recursive call 53: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:52,295 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 46 [2018-10-27 04:48:52,296 INFO L267 ElimStorePlain]: Start of recursive call 54: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:52,329 INFO L267 ElimStorePlain]: Start of recursive call 52: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:52,718 INFO L267 ElimStorePlain]: Start of recursive call 30: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 20 dim-0 vars, and 21 xjuncts. [2018-10-27 04:48:52,738 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 262 treesize of output 223 [2018-10-27 04:48:53,188 WARN L179 SmtUtils]: Spent 448.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 67 [2018-10-27 04:48:53,196 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:48:53,196 INFO L267 ElimStorePlain]: Start of recursive call 56: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:53,458 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 116 treesize of output 116 [2018-10-27 04:48:53,466 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 111 treesize of output 105 [2018-10-27 04:48:53,466 INFO L267 ElimStorePlain]: Start of recursive call 58: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:53,577 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 108 treesize of output 99 [2018-10-27 04:48:53,578 INFO L267 ElimStorePlain]: Start of recursive call 59: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:53,687 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 99 [2018-10-27 04:48:53,687 INFO L267 ElimStorePlain]: Start of recursive call 60: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:53,784 INFO L267 ElimStorePlain]: Start of recursive call 57: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:48:53,813 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 67 treesize of output 71 [2018-10-27 04:48:53,819 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 60 [2018-10-27 04:48:53,820 INFO L267 ElimStorePlain]: Start of recursive call 62: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:53,980 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 58 [2018-10-27 04:48:53,981 INFO L267 ElimStorePlain]: Start of recursive call 63: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:54,088 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 58 [2018-10-27 04:48:54,089 INFO L267 ElimStorePlain]: Start of recursive call 64: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:54,196 INFO L267 ElimStorePlain]: Start of recursive call 61: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:48:54,228 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 78 treesize of output 80 [2018-10-27 04:48:54,235 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 69 [2018-10-27 04:48:54,235 INFO L267 ElimStorePlain]: Start of recursive call 66: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:54,344 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 65 [2018-10-27 04:48:54,345 INFO L267 ElimStorePlain]: Start of recursive call 67: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:54,450 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 65 [2018-10-27 04:48:54,451 INFO L267 ElimStorePlain]: Start of recursive call 68: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:54,535 INFO L267 ElimStorePlain]: Start of recursive call 65: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:48:54,566 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 117 treesize of output 119 [2018-10-27 04:48:54,574 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 114 treesize of output 110 [2018-10-27 04:48:54,575 INFO L267 ElimStorePlain]: Start of recursive call 70: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:54,724 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 110 treesize of output 104 [2018-10-27 04:48:54,724 INFO L267 ElimStorePlain]: Start of recursive call 71: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:54,891 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 111 treesize of output 104 [2018-10-27 04:48:54,892 INFO L267 ElimStorePlain]: Start of recursive call 72: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:55,396 INFO L267 ElimStorePlain]: Start of recursive call 69: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:48:55,507 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 74 treesize of output 76 [2018-10-27 04:48:55,513 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 65 [2018-10-27 04:48:55,513 INFO L267 ElimStorePlain]: Start of recursive call 74: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:55,619 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 61 [2018-10-27 04:48:55,620 INFO L267 ElimStorePlain]: Start of recursive call 75: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:55,729 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 61 [2018-10-27 04:48:55,730 INFO L267 ElimStorePlain]: Start of recursive call 76: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:55,816 INFO L267 ElimStorePlain]: Start of recursive call 73: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:48:55,826 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 27 [2018-10-27 04:48:55,831 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:48:55,831 INFO L267 ElimStorePlain]: Start of recursive call 78: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:55,871 INFO L267 ElimStorePlain]: Start of recursive call 77: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:55,903 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 112 treesize of output 112 [2018-10-27 04:48:55,921 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 95 [2018-10-27 04:48:55,922 INFO L267 ElimStorePlain]: Start of recursive call 80: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:56,072 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 53 [2018-10-27 04:48:56,073 INFO L267 ElimStorePlain]: Start of recursive call 81: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:56,142 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 49 [2018-10-27 04:48:56,143 INFO L267 ElimStorePlain]: Start of recursive call 82: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:56,203 INFO L267 ElimStorePlain]: Start of recursive call 79: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:48:56,235 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 79 treesize of output 83 [2018-10-27 04:48:56,241 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 72 [2018-10-27 04:48:56,242 INFO L267 ElimStorePlain]: Start of recursive call 84: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:56,436 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 70 [2018-10-27 04:48:56,436 INFO L267 ElimStorePlain]: Start of recursive call 85: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:56,552 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 70 [2018-10-27 04:48:56,553 INFO L267 ElimStorePlain]: Start of recursive call 86: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:56,659 INFO L267 ElimStorePlain]: Start of recursive call 83: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:48:57,640 INFO L267 ElimStorePlain]: Start of recursive call 55: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 40 dim-0 vars, and 41 xjuncts. [2018-10-27 04:48:57,687 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 165 treesize of output 142 [2018-10-27 04:48:57,804 WARN L179 SmtUtils]: Spent 116.00 ms on a formula simplification that was a NOOP. DAG size: 54 [2018-10-27 04:48:57,810 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:48:57,810 INFO L267 ElimStorePlain]: Start of recursive call 88: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:57,934 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 74 [2018-10-27 04:48:57,940 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:48:57,941 INFO L267 ElimStorePlain]: Start of recursive call 90: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:57,974 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 46 [2018-10-27 04:48:57,974 INFO L267 ElimStorePlain]: Start of recursive call 91: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:58,000 INFO L267 ElimStorePlain]: Start of recursive call 89: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:58,006 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 71 [2018-10-27 04:48:58,011 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:48:58,012 INFO L267 ElimStorePlain]: Start of recursive call 93: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:58,038 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 51 [2018-10-27 04:48:58,039 INFO L267 ElimStorePlain]: Start of recursive call 94: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:58,058 INFO L267 ElimStorePlain]: Start of recursive call 92: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:58,067 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 67 [2018-10-27 04:48:58,072 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:48:58,072 INFO L267 ElimStorePlain]: Start of recursive call 96: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:58,099 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 51 [2018-10-27 04:48:58,099 INFO L267 ElimStorePlain]: Start of recursive call 97: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:58,120 INFO L267 ElimStorePlain]: Start of recursive call 95: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:58,125 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 23 [2018-10-27 04:48:58,129 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:48:58,129 INFO L267 ElimStorePlain]: Start of recursive call 99: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:58,144 INFO L267 ElimStorePlain]: Start of recursive call 98: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:58,249 INFO L267 ElimStorePlain]: Start of recursive call 87: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 6 dim-0 vars, and 7 xjuncts. [2018-10-27 04:48:58,262 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 165 treesize of output 142 [2018-10-27 04:48:58,376 WARN L179 SmtUtils]: Spent 112.00 ms on a formula simplification that was a NOOP. DAG size: 54 [2018-10-27 04:48:58,382 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:48:58,382 INFO L267 ElimStorePlain]: Start of recursive call 101: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:58,513 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 79 [2018-10-27 04:48:58,524 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 66 [2018-10-27 04:48:58,524 INFO L267 ElimStorePlain]: Start of recursive call 103: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:58,617 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 68 [2018-10-27 04:48:58,617 INFO L267 ElimStorePlain]: Start of recursive call 104: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:58,695 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 66 [2018-10-27 04:48:58,695 INFO L267 ElimStorePlain]: Start of recursive call 105: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:58,819 INFO L267 ElimStorePlain]: Start of recursive call 102: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:48:58,850 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 70 treesize of output 72 [2018-10-27 04:48:58,855 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 63 [2018-10-27 04:48:58,856 INFO L267 ElimStorePlain]: Start of recursive call 107: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:58,930 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 57 [2018-10-27 04:48:58,930 INFO L267 ElimStorePlain]: Start of recursive call 108: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:59,024 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 57 [2018-10-27 04:48:59,024 INFO L267 ElimStorePlain]: Start of recursive call 109: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:59,081 INFO L267 ElimStorePlain]: Start of recursive call 106: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:48:59,106 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 74 treesize of output 76 [2018-10-27 04:48:59,114 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 61 [2018-10-27 04:48:59,115 INFO L267 ElimStorePlain]: Start of recursive call 111: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:59,185 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 65 [2018-10-27 04:48:59,186 INFO L267 ElimStorePlain]: Start of recursive call 112: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:59,258 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 61 [2018-10-27 04:48:59,259 INFO L267 ElimStorePlain]: Start of recursive call 113: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:59,315 INFO L267 ElimStorePlain]: Start of recursive call 110: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:48:59,320 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 23 [2018-10-27 04:48:59,325 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:48:59,325 INFO L267 ElimStorePlain]: Start of recursive call 115: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:59,342 INFO L267 ElimStorePlain]: Start of recursive call 114: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:59,544 INFO L267 ElimStorePlain]: Start of recursive call 100: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 12 dim-0 vars, and 13 xjuncts. [2018-10-27 04:48:59,555 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 168 treesize of output 145 [2018-10-27 04:48:59,670 WARN L179 SmtUtils]: Spent 113.00 ms on a formula simplification that was a NOOP. DAG size: 55 [2018-10-27 04:48:59,676 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:48:59,676 INFO L267 ElimStorePlain]: Start of recursive call 117: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:59,812 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 23 [2018-10-27 04:48:59,817 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:48:59,817 INFO L267 ElimStorePlain]: Start of recursive call 119: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:59,831 INFO L267 ElimStorePlain]: Start of recursive call 118: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:59,838 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 71 [2018-10-27 04:48:59,886 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 51 [2018-10-27 04:48:59,887 INFO L267 ElimStorePlain]: Start of recursive call 121: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:49:00,062 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:49:00,062 INFO L267 ElimStorePlain]: Start of recursive call 122: End of recursive call: and 1 xjuncts. [2018-10-27 04:49:00,152 INFO L267 ElimStorePlain]: Start of recursive call 120: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:49:00,160 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 74 [2018-10-27 04:49:00,165 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:49:00,165 INFO L267 ElimStorePlain]: Start of recursive call 124: End of recursive call: and 1 xjuncts. [2018-10-27 04:49:00,201 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 46 [2018-10-27 04:49:00,201 INFO L267 ElimStorePlain]: Start of recursive call 125: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:49:00,224 INFO L267 ElimStorePlain]: Start of recursive call 123: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:49:00,233 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 67 [2018-10-27 04:49:00,238 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:49:00,238 INFO L267 ElimStorePlain]: Start of recursive call 127: End of recursive call: and 1 xjuncts. [2018-10-27 04:49:00,266 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 51 [2018-10-27 04:49:00,267 INFO L267 ElimStorePlain]: Start of recursive call 128: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:49:00,288 INFO L267 ElimStorePlain]: Start of recursive call 126: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:49:00,401 INFO L267 ElimStorePlain]: Start of recursive call 116: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 6 dim-0 vars, and 7 xjuncts. [2018-10-27 04:49:42,841 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 73 [2018-10-27 04:49:42,848 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 61 [2018-10-27 04:49:42,848 INFO L267 ElimStorePlain]: Start of recursive call 130: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:49:42,866 INFO L267 ElimStorePlain]: Start of recursive call 129: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:49:42,870 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 73 [2018-10-27 04:49:42,874 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 61 [2018-10-27 04:49:42,874 INFO L267 ElimStorePlain]: Start of recursive call 132: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:49:42,889 INFO L267 ElimStorePlain]: Start of recursive call 131: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:50:26,411 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 42 [2018-10-27 04:50:26,454 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:50:26,454 INFO L267 ElimStorePlain]: Start of recursive call 134: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:26,525 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-10-27 04:50:26,528 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:50:26,528 INFO L267 ElimStorePlain]: Start of recursive call 136: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:26,534 INFO L267 ElimStorePlain]: Start of recursive call 135: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:50:26,541 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 19 [2018-10-27 04:50:26,558 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:50:26,558 INFO L267 ElimStorePlain]: Start of recursive call 138: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:26,569 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 5 [2018-10-27 04:50:26,571 INFO L267 ElimStorePlain]: Start of recursive call 139: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:26,573 INFO L267 ElimStorePlain]: Start of recursive call 137: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:50:26,585 INFO L267 ElimStorePlain]: Start of recursive call 133: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:50:26,599 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 47 [2018-10-27 04:50:26,655 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:50:26,655 INFO L267 ElimStorePlain]: Start of recursive call 141: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:26,715 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 20 [2018-10-27 04:50:26,720 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 5 [2018-10-27 04:50:26,720 INFO L267 ElimStorePlain]: Start of recursive call 143: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:26,729 INFO L267 ElimStorePlain]: Start of recursive call 142: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:50:26,732 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-10-27 04:50:26,735 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:50:26,735 INFO L267 ElimStorePlain]: Start of recursive call 145: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:26,742 INFO L267 ElimStorePlain]: Start of recursive call 144: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:50:26,783 INFO L267 ElimStorePlain]: Start of recursive call 140: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-10-27 04:50:26,791 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 42 [2018-10-27 04:50:26,871 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:50:26,872 INFO L267 ElimStorePlain]: Start of recursive call 147: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:26,923 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-10-27 04:50:26,926 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:50:26,927 INFO L267 ElimStorePlain]: Start of recursive call 149: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:26,936 INFO L267 ElimStorePlain]: Start of recursive call 148: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:50:26,950 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 24 [2018-10-27 04:50:26,954 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 13 [2018-10-27 04:50:26,955 INFO L267 ElimStorePlain]: Start of recursive call 151: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:26,982 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2018-10-27 04:50:26,984 INFO L267 ElimStorePlain]: Start of recursive call 152: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:27,004 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 9 [2018-10-27 04:50:27,006 INFO L267 ElimStorePlain]: Start of recursive call 153: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:27,008 INFO L267 ElimStorePlain]: Start of recursive call 150: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:50:27,021 INFO L267 ElimStorePlain]: Start of recursive call 146: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:50:56,096 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 142 treesize of output 110 [2018-10-27 04:50:56,678 WARN L179 SmtUtils]: Spent 578.00 ms on a formula simplification. DAG size of input: 94 DAG size of output: 61 [2018-10-27 04:50:56,683 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 57 [2018-10-27 04:50:56,684 INFO L267 ElimStorePlain]: Start of recursive call 155: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:56,897 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 58 [2018-10-27 04:50:56,897 INFO L267 ElimStorePlain]: Start of recursive call 156: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:57,088 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 49 [2018-10-27 04:50:57,110 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:50:57,110 INFO L267 ElimStorePlain]: Start of recursive call 158: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:57,153 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-10-27 04:50:57,153 INFO L267 ElimStorePlain]: Start of recursive call 159: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:50:57,189 INFO L267 ElimStorePlain]: Start of recursive call 157: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:50:57,373 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 57 treesize of output 55 [2018-10-27 04:50:57,378 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 37 [2018-10-27 04:50:57,379 INFO L267 ElimStorePlain]: Start of recursive call 161: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:50:57,485 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 34 [2018-10-27 04:50:57,485 INFO L267 ElimStorePlain]: Start of recursive call 162: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:50:57,575 INFO L267 ElimStorePlain]: Start of recursive call 160: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:50:57,788 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 50 [2018-10-27 04:50:57,808 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 27 [2018-10-27 04:50:57,809 INFO L267 ElimStorePlain]: Start of recursive call 164: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:50:57,845 INFO L267 ElimStorePlain]: Start of recursive call 163: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:50:58,039 INFO L267 ElimStorePlain]: Start of recursive call 154: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-10-27 04:50:58,097 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 107 treesize of output 93 [2018-10-27 04:50:58,623 WARN L179 SmtUtils]: Spent 522.00 ms on a formula simplification. DAG size of input: 88 DAG size of output: 66 [2018-10-27 04:50:58,628 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 54 [2018-10-27 04:50:58,628 INFO L267 ElimStorePlain]: Start of recursive call 166: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:58,813 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 55 [2018-10-27 04:50:58,814 INFO L267 ElimStorePlain]: Start of recursive call 167: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:58,999 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 54 treesize of output 52 [2018-10-27 04:50:59,004 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 34 [2018-10-27 04:50:59,005 INFO L267 ElimStorePlain]: Start of recursive call 169: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:50:59,116 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:50:59,117 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:50:59,118 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 34 [2018-10-27 04:50:59,119 INFO L267 ElimStorePlain]: Start of recursive call 170: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:50:59,202 INFO L267 ElimStorePlain]: Start of recursive call 168: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:50:59,399 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 48 [2018-10-27 04:50:59,404 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:50:59,405 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:50:59,406 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2018-10-27 04:50:59,407 INFO L267 ElimStorePlain]: Start of recursive call 172: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:50:59,448 INFO L267 ElimStorePlain]: Start of recursive call 171: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:50:59,702 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 46 [2018-10-27 04:50:59,708 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:50:59,708 INFO L267 ElimStorePlain]: Start of recursive call 174: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:59,746 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:50:59,747 INFO L267 ElimStorePlain]: Start of recursive call 175: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:50:59,786 INFO L267 ElimStorePlain]: Start of recursive call 173: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:50:59,954 INFO L267 ElimStorePlain]: Start of recursive call 165: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-10-27 04:51:00,024 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 96 treesize of output 84 [2018-10-27 04:51:00,474 WARN L179 SmtUtils]: Spent 447.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 56 [2018-10-27 04:51:00,504 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 43 [2018-10-27 04:51:00,504 INFO L267 ElimStorePlain]: Start of recursive call 177: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:00,668 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 44 [2018-10-27 04:51:00,668 INFO L267 ElimStorePlain]: Start of recursive call 178: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:00,867 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 43 [2018-10-27 04:51:00,875 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 24 [2018-10-27 04:51:00,875 INFO L267 ElimStorePlain]: Start of recursive call 180: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:00,973 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2018-10-27 04:51:00,973 INFO L267 ElimStorePlain]: Start of recursive call 181: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:01,040 INFO L267 ElimStorePlain]: Start of recursive call 179: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:51:01,229 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 37 [2018-10-27 04:51:01,235 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2018-10-27 04:51:01,235 INFO L267 ElimStorePlain]: Start of recursive call 183: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:01,279 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:01,279 INFO L267 ElimStorePlain]: Start of recursive call 184: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:01,310 INFO L267 ElimStorePlain]: Start of recursive call 182: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:01,482 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2018-10-27 04:51:01,491 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 17 [2018-10-27 04:51:01,491 INFO L267 ElimStorePlain]: Start of recursive call 186: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:01,521 INFO L267 ElimStorePlain]: Start of recursive call 185: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:01,671 INFO L267 ElimStorePlain]: Start of recursive call 176: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-10-27 04:51:01,700 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 75 [2018-10-27 04:51:01,812 WARN L179 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 44 DAG size of output: 32 [2018-10-27 04:51:01,817 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:01,817 INFO L267 ElimStorePlain]: Start of recursive call 188: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:01,869 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 32 [2018-10-27 04:51:01,882 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:01,882 INFO L267 ElimStorePlain]: Start of recursive call 190: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:01,907 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:51:01,908 INFO L267 ElimStorePlain]: Start of recursive call 191: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:01,924 INFO L267 ElimStorePlain]: Start of recursive call 189: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:01,952 INFO L267 ElimStorePlain]: Start of recursive call 187: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:01,970 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 148 treesize of output 112 [2018-10-27 04:51:02,151 WARN L179 SmtUtils]: Spent 179.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 39 [2018-10-27 04:51:02,158 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:02,158 INFO L267 ElimStorePlain]: Start of recursive call 193: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:02,243 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 48 [2018-10-27 04:51:02,250 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:02,250 INFO L267 ElimStorePlain]: Start of recursive call 195: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:02,289 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-10-27 04:51:02,290 INFO L267 ElimStorePlain]: Start of recursive call 196: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:02,318 INFO L267 ElimStorePlain]: Start of recursive call 194: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:02,370 INFO L267 ElimStorePlain]: Start of recursive call 192: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:02,396 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 138 treesize of output 99 [2018-10-27 04:51:02,546 WARN L179 SmtUtils]: Spent 149.00 ms on a formula simplification. DAG size of input: 53 DAG size of output: 35 [2018-10-27 04:51:02,552 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:02,552 INFO L267 ElimStorePlain]: Start of recursive call 198: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:02,611 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 39 [2018-10-27 04:51:02,617 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:02,617 INFO L267 ElimStorePlain]: Start of recursive call 200: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:02,646 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-10-27 04:51:02,647 INFO L267 ElimStorePlain]: Start of recursive call 201: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:02,669 INFO L267 ElimStorePlain]: Start of recursive call 199: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:02,712 INFO L267 ElimStorePlain]: Start of recursive call 197: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:02,727 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 75 [2018-10-27 04:51:02,862 WARN L179 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 45 DAG size of output: 31 [2018-10-27 04:51:02,867 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:02,867 INFO L267 ElimStorePlain]: Start of recursive call 203: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:02,917 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 32 [2018-10-27 04:51:02,922 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:02,922 INFO L267 ElimStorePlain]: Start of recursive call 205: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:02,950 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:51:02,951 INFO L267 ElimStorePlain]: Start of recursive call 206: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:02,970 INFO L267 ElimStorePlain]: Start of recursive call 204: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:03,003 INFO L267 ElimStorePlain]: Start of recursive call 202: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:03,101 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 219 treesize of output 153 [2018-10-27 04:51:04,058 WARN L179 SmtUtils]: Spent 953.00 ms on a formula simplification. DAG size of input: 110 DAG size of output: 77 [2018-10-27 04:51:04,065 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 78 [2018-10-27 04:51:04,065 INFO L267 ElimStorePlain]: Start of recursive call 208: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:04,071 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 68 [2018-10-27 04:51:04,072 INFO L267 ElimStorePlain]: Start of recursive call 209: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:04,724 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 69 [2018-10-27 04:51:04,725 INFO L267 ElimStorePlain]: Start of recursive call 210: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:04,731 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 79 [2018-10-27 04:51:04,731 INFO L267 ElimStorePlain]: Start of recursive call 211: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:05,247 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 78 treesize of output 74 [2018-10-27 04:51:05,255 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:51:05,256 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 54 [2018-10-27 04:51:05,257 INFO L267 ElimStorePlain]: Start of recursive call 213: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:05,373 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 54 [2018-10-27 04:51:05,373 INFO L267 ElimStorePlain]: Start of recursive call 214: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:05,511 INFO L267 ElimStorePlain]: Start of recursive call 212: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:51:05,550 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 68 treesize of output 64 [2018-10-27 04:51:05,555 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 44 [2018-10-27 04:51:05,556 INFO L267 ElimStorePlain]: Start of recursive call 216: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:05,670 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:51:05,672 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:51:05,673 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 44 [2018-10-27 04:51:05,674 INFO L267 ElimStorePlain]: Start of recursive call 217: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:05,790 INFO L267 ElimStorePlain]: Start of recursive call 215: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:51:06,492 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 58 [2018-10-27 04:51:06,499 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:06,499 INFO L267 ElimStorePlain]: Start of recursive call 219: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:06,555 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-10-27 04:51:06,555 INFO L267 ElimStorePlain]: Start of recursive call 220: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:06,609 INFO L267 ElimStorePlain]: Start of recursive call 218: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:06,624 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 68 [2018-10-27 04:51:06,650 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:06,651 INFO L267 ElimStorePlain]: Start of recursive call 222: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:06,757 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-10-27 04:51:06,757 INFO L267 ElimStorePlain]: Start of recursive call 223: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:06,820 INFO L267 ElimStorePlain]: Start of recursive call 221: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:07,581 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 70 [2018-10-27 04:51:07,586 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:51:07,588 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:51:07,589 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 33 [2018-10-27 04:51:07,590 INFO L267 ElimStorePlain]: Start of recursive call 225: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:07,648 INFO L267 ElimStorePlain]: Start of recursive call 224: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:07,653 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 60 [2018-10-27 04:51:07,658 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:51:07,659 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:51:07,660 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 33 [2018-10-27 04:51:07,661 INFO L267 ElimStorePlain]: Start of recursive call 227: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:07,713 INFO L267 ElimStorePlain]: Start of recursive call 226: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:08,466 INFO L267 ElimStorePlain]: Start of recursive call 207: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 8 dim-0 vars, and 8 xjuncts. [2018-10-27 04:51:08,492 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 137 treesize of output 98 [2018-10-27 04:51:08,614 WARN L179 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 34 [2018-10-27 04:51:08,619 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:08,619 INFO L267 ElimStorePlain]: Start of recursive call 229: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:08,661 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 39 [2018-10-27 04:51:08,666 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:08,666 INFO L267 ElimStorePlain]: Start of recursive call 231: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:08,690 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-10-27 04:51:08,690 INFO L267 ElimStorePlain]: Start of recursive call 232: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:08,708 INFO L267 ElimStorePlain]: Start of recursive call 230: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:08,740 INFO L267 ElimStorePlain]: Start of recursive call 228: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:08,756 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 144 treesize of output 105 [2018-10-27 04:51:08,916 WARN L179 SmtUtils]: Spent 158.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 34 [2018-10-27 04:51:08,920 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:08,920 INFO L267 ElimStorePlain]: Start of recursive call 234: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:08,977 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 44 [2018-10-27 04:51:08,983 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:08,983 INFO L267 ElimStorePlain]: Start of recursive call 236: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:09,012 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-10-27 04:51:09,012 INFO L267 ElimStorePlain]: Start of recursive call 237: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:09,033 INFO L267 ElimStorePlain]: Start of recursive call 235: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:09,069 INFO L267 ElimStorePlain]: Start of recursive call 233: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:09,090 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 118 [2018-10-27 04:51:09,406 WARN L179 SmtUtils]: Spent 314.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 46 [2018-10-27 04:51:09,411 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:09,412 INFO L267 ElimStorePlain]: Start of recursive call 239: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:09,513 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 48 [2018-10-27 04:51:09,519 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:09,519 INFO L267 ElimStorePlain]: Start of recursive call 241: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:09,556 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-10-27 04:51:09,557 INFO L267 ElimStorePlain]: Start of recursive call 242: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:09,581 INFO L267 ElimStorePlain]: Start of recursive call 240: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:09,596 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 40 [2018-10-27 04:51:09,602 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:09,602 INFO L267 ElimStorePlain]: Start of recursive call 244: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:09,641 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:51:09,642 INFO L267 ElimStorePlain]: Start of recursive call 245: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:09,664 INFO L267 ElimStorePlain]: Start of recursive call 243: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:09,789 INFO L267 ElimStorePlain]: Start of recursive call 238: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 3 xjuncts. [2018-10-27 04:51:09,815 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 145 treesize of output 106 [2018-10-27 04:51:09,964 WARN L179 SmtUtils]: Spent 147.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 34 [2018-10-27 04:51:09,969 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:09,969 INFO L267 ElimStorePlain]: Start of recursive call 247: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:10,024 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 39 [2018-10-27 04:51:10,029 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:10,029 INFO L267 ElimStorePlain]: Start of recursive call 249: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:10,056 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-10-27 04:51:10,056 INFO L267 ElimStorePlain]: Start of recursive call 250: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:10,076 INFO L267 ElimStorePlain]: Start of recursive call 248: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:10,113 INFO L267 ElimStorePlain]: Start of recursive call 246: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:10,131 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 149 treesize of output 110 [2018-10-27 04:51:10,283 WARN L179 SmtUtils]: Spent 149.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 33 [2018-10-27 04:51:10,288 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:10,289 INFO L267 ElimStorePlain]: Start of recursive call 252: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:10,347 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 44 [2018-10-27 04:51:10,352 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:10,352 INFO L267 ElimStorePlain]: Start of recursive call 254: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:10,384 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-10-27 04:51:10,384 INFO L267 ElimStorePlain]: Start of recursive call 255: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:10,407 INFO L267 ElimStorePlain]: Start of recursive call 253: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:10,445 INFO L267 ElimStorePlain]: Start of recursive call 251: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:10,466 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 145 treesize of output 106 [2018-10-27 04:51:10,601 WARN L179 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 34 [2018-10-27 04:51:10,606 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:10,607 INFO L267 ElimStorePlain]: Start of recursive call 257: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:10,668 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 39 [2018-10-27 04:51:10,673 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:10,673 INFO L267 ElimStorePlain]: Start of recursive call 259: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:10,697 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-10-27 04:51:10,697 INFO L267 ElimStorePlain]: Start of recursive call 260: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:10,718 INFO L267 ElimStorePlain]: Start of recursive call 258: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:10,753 INFO L267 ElimStorePlain]: Start of recursive call 256: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:10,817 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 103 treesize of output 89 [2018-10-27 04:51:11,530 WARN L179 SmtUtils]: Spent 710.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 60 [2018-10-27 04:51:11,535 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 50 [2018-10-27 04:51:11,536 INFO L267 ElimStorePlain]: Start of recursive call 262: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:11,716 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 51 [2018-10-27 04:51:11,716 INFO L267 ElimStorePlain]: Start of recursive call 263: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:11,896 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 43 [2018-10-27 04:51:11,905 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 20 [2018-10-27 04:51:11,905 INFO L267 ElimStorePlain]: Start of recursive call 265: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:11,939 INFO L267 ElimStorePlain]: Start of recursive call 264: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:12,082 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 42 [2018-10-27 04:51:12,086 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:12,086 INFO L267 ElimStorePlain]: Start of recursive call 267: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:12,120 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:51:12,120 INFO L267 ElimStorePlain]: Start of recursive call 268: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:12,152 INFO L267 ElimStorePlain]: Start of recursive call 266: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:12,362 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 50 treesize of output 48 [2018-10-27 04:51:12,367 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 30 [2018-10-27 04:51:12,368 INFO L267 ElimStorePlain]: Start of recursive call 270: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:12,453 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 27 [2018-10-27 04:51:12,454 INFO L267 ElimStorePlain]: Start of recursive call 271: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:12,517 INFO L267 ElimStorePlain]: Start of recursive call 269: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:51:12,689 INFO L267 ElimStorePlain]: Start of recursive call 261: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-10-27 04:51:12,711 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 222 treesize of output 154 [2018-10-27 04:51:12,962 WARN L179 SmtUtils]: Spent 248.00 ms on a formula simplification. DAG size of input: 59 DAG size of output: 45 [2018-10-27 04:51:12,968 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:12,968 INFO L267 ElimStorePlain]: Start of recursive call 273: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:13,075 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 48 [2018-10-27 04:51:13,082 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:13,082 INFO L267 ElimStorePlain]: Start of recursive call 275: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:13,116 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-10-27 04:51:13,116 INFO L267 ElimStorePlain]: Start of recursive call 276: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:13,144 INFO L267 ElimStorePlain]: Start of recursive call 274: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:13,224 INFO L267 ElimStorePlain]: Start of recursive call 272: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:51:13,239 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 100 treesize of output 77 [2018-10-27 04:51:13,335 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:13,335 INFO L267 ElimStorePlain]: Start of recursive call 278: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:13,375 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 27 [2018-10-27 04:51:13,379 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:13,380 INFO L267 ElimStorePlain]: Start of recursive call 280: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:13,396 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2018-10-27 04:51:13,396 INFO L267 ElimStorePlain]: Start of recursive call 281: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:13,408 INFO L267 ElimStorePlain]: Start of recursive call 279: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:13,433 INFO L267 ElimStorePlain]: Start of recursive call 277: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:13,524 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 88 treesize of output 80 [2018-10-27 04:51:13,931 WARN L179 SmtUtils]: Spent 404.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 56 [2018-10-27 04:51:13,936 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 43 [2018-10-27 04:51:13,936 INFO L267 ElimStorePlain]: Start of recursive call 283: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:14,079 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 44 [2018-10-27 04:51:14,079 INFO L267 ElimStorePlain]: Start of recursive call 284: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:14,216 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2018-10-27 04:51:14,224 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 17 [2018-10-27 04:51:14,224 INFO L267 ElimStorePlain]: Start of recursive call 286: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:14,251 INFO L267 ElimStorePlain]: Start of recursive call 285: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:14,406 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 43 [2018-10-27 04:51:14,411 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2018-10-27 04:51:14,411 INFO L267 ElimStorePlain]: Start of recursive call 288: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:14,473 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 24 [2018-10-27 04:51:14,474 INFO L267 ElimStorePlain]: Start of recursive call 289: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:14,529 INFO L267 ElimStorePlain]: Start of recursive call 287: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:51:14,688 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 37 [2018-10-27 04:51:14,692 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:14,692 INFO L267 ElimStorePlain]: Start of recursive call 291: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:14,721 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2018-10-27 04:51:14,721 INFO L267 ElimStorePlain]: Start of recursive call 292: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:14,746 INFO L267 ElimStorePlain]: Start of recursive call 290: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:14,877 INFO L267 ElimStorePlain]: Start of recursive call 282: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-10-27 04:51:14,935 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 105 treesize of output 91 [2018-10-27 04:51:15,331 WARN L179 SmtUtils]: Spent 392.00 ms on a formula simplification. DAG size of input: 86 DAG size of output: 57 [2018-10-27 04:51:15,335 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 44 [2018-10-27 04:51:15,336 INFO L267 ElimStorePlain]: Start of recursive call 294: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:15,484 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 45 [2018-10-27 04:51:15,484 INFO L267 ElimStorePlain]: Start of recursive call 295: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:15,659 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 46 [2018-10-27 04:51:15,669 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 25 [2018-10-27 04:51:15,670 INFO L267 ElimStorePlain]: Start of recursive call 297: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:15,734 INFO L267 ElimStorePlain]: Start of recursive call 296: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:51:15,807 INFO L267 ElimStorePlain]: Start of recursive call 293: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:51:15,828 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 176 treesize of output 124 [2018-10-27 04:51:16,166 WARN L179 SmtUtils]: Spent 336.00 ms on a formula simplification. DAG size of input: 57 DAG size of output: 47 [2018-10-27 04:51:16,172 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:16,172 INFO L267 ElimStorePlain]: Start of recursive call 299: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:16,270 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 48 [2018-10-27 04:51:16,275 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:16,275 INFO L267 ElimStorePlain]: Start of recursive call 301: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:16,309 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-10-27 04:51:16,310 INFO L267 ElimStorePlain]: Start of recursive call 302: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:16,335 INFO L267 ElimStorePlain]: Start of recursive call 300: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:16,348 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 40 [2018-10-27 04:51:16,353 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:16,353 INFO L267 ElimStorePlain]: Start of recursive call 304: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:16,384 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:51:16,385 INFO L267 ElimStorePlain]: Start of recursive call 305: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:16,409 INFO L267 ElimStorePlain]: Start of recursive call 303: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:16,527 INFO L267 ElimStorePlain]: Start of recursive call 298: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 3 xjuncts. [2018-10-27 04:51:16,560 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 126 treesize of output 87 [2018-10-27 04:51:16,682 WARN L179 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 33 [2018-10-27 04:51:16,686 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:16,687 INFO L267 ElimStorePlain]: Start of recursive call 307: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:16,732 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 39 [2018-10-27 04:51:16,736 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-10-27 04:51:16,737 INFO L267 ElimStorePlain]: Start of recursive call 309: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:16,767 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:16,767 INFO L267 ElimStorePlain]: Start of recursive call 310: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:16,785 INFO L267 ElimStorePlain]: Start of recursive call 308: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:16,812 INFO L267 ElimStorePlain]: Start of recursive call 306: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:16,826 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 83 [2018-10-27 04:51:16,932 WARN L179 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 32 [2018-10-27 04:51:16,936 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:16,936 INFO L267 ElimStorePlain]: Start of recursive call 312: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:16,980 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 32 [2018-10-27 04:51:16,985 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:16,986 INFO L267 ElimStorePlain]: Start of recursive call 314: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:17,008 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:51:17,008 INFO L267 ElimStorePlain]: Start of recursive call 315: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:17,023 INFO L267 ElimStorePlain]: Start of recursive call 313: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:17,050 INFO L267 ElimStorePlain]: Start of recursive call 311: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:17,067 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 142 treesize of output 103 [2018-10-27 04:51:17,186 WARN L179 SmtUtils]: Spent 117.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 33 [2018-10-27 04:51:17,190 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:17,190 INFO L267 ElimStorePlain]: Start of recursive call 317: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:17,238 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 39 [2018-10-27 04:51:17,244 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:17,244 INFO L267 ElimStorePlain]: Start of recursive call 319: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:17,271 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-10-27 04:51:17,271 INFO L267 ElimStorePlain]: Start of recursive call 320: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:17,290 INFO L267 ElimStorePlain]: Start of recursive call 318: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:17,321 INFO L267 ElimStorePlain]: Start of recursive call 316: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:17,327 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 62 [2018-10-27 04:51:17,412 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:17,413 INFO L267 ElimStorePlain]: Start of recursive call 322: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:17,444 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 28 [2018-10-27 04:51:17,448 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 14 [2018-10-27 04:51:17,448 INFO L267 ElimStorePlain]: Start of recursive call 324: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:17,459 INFO L267 ElimStorePlain]: Start of recursive call 323: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:51:17,481 INFO L267 ElimStorePlain]: Start of recursive call 321: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:51:17,498 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 145 treesize of output 106 [2018-10-27 04:51:17,638 WARN L179 SmtUtils]: Spent 139.00 ms on a formula simplification. DAG size of input: 53 DAG size of output: 38 [2018-10-27 04:51:17,643 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:17,643 INFO L267 ElimStorePlain]: Start of recursive call 326: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:17,705 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 48 [2018-10-27 04:51:17,711 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:17,712 INFO L267 ElimStorePlain]: Start of recursive call 328: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:17,741 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-10-27 04:51:17,742 INFO L267 ElimStorePlain]: Start of recursive call 329: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:17,762 INFO L267 ElimStorePlain]: Start of recursive call 327: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:17,798 INFO L267 ElimStorePlain]: Start of recursive call 325: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:17,866 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 207 treesize of output 145 [2018-10-27 04:51:18,676 WARN L179 SmtUtils]: Spent 807.00 ms on a formula simplification. DAG size of input: 104 DAG size of output: 79 [2018-10-27 04:51:18,682 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 64 [2018-10-27 04:51:18,682 INFO L267 ElimStorePlain]: Start of recursive call 331: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:18,688 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 84 [2018-10-27 04:51:18,689 INFO L267 ElimStorePlain]: Start of recursive call 332: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:18,695 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 64 [2018-10-27 04:51:18,695 INFO L267 ElimStorePlain]: Start of recursive call 333: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:18,701 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 78 [2018-10-27 04:51:18,702 INFO L267 ElimStorePlain]: Start of recursive call 334: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:19,479 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 65 [2018-10-27 04:51:19,479 INFO L267 ElimStorePlain]: Start of recursive call 335: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:19,486 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 79 [2018-10-27 04:51:19,487 INFO L267 ElimStorePlain]: Start of recursive call 336: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:19,503 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 65 [2018-10-27 04:51:19,504 INFO L267 ElimStorePlain]: Start of recursive call 337: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:20,185 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 70 [2018-10-27 04:51:20,192 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:20,192 INFO L267 ElimStorePlain]: Start of recursive call 339: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:20,262 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:51:20,263 INFO L267 ElimStorePlain]: Start of recursive call 340: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:20,329 INFO L267 ElimStorePlain]: Start of recursive call 338: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:20,338 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 54 [2018-10-27 04:51:20,343 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-10-27 04:51:20,344 INFO L267 ElimStorePlain]: Start of recursive call 342: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:20,395 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:20,395 INFO L267 ElimStorePlain]: Start of recursive call 343: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:20,440 INFO L267 ElimStorePlain]: Start of recursive call 341: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:20,449 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 54 [2018-10-27 04:51:20,454 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:20,455 INFO L267 ElimStorePlain]: Start of recursive call 345: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:20,498 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-10-27 04:51:20,499 INFO L267 ElimStorePlain]: Start of recursive call 346: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:20,537 INFO L267 ElimStorePlain]: Start of recursive call 344: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:21,222 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 60 [2018-10-27 04:51:21,227 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 40 [2018-10-27 04:51:21,228 INFO L267 ElimStorePlain]: Start of recursive call 348: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:21,332 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 37 [2018-10-27 04:51:21,333 INFO L267 ElimStorePlain]: Start of recursive call 349: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:21,425 INFO L267 ElimStorePlain]: Start of recursive call 347: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:51:21,449 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 60 [2018-10-27 04:51:21,457 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 37 [2018-10-27 04:51:21,458 INFO L267 ElimStorePlain]: Start of recursive call 351: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:21,553 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 40 [2018-10-27 04:51:21,554 INFO L267 ElimStorePlain]: Start of recursive call 352: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:21,645 INFO L267 ElimStorePlain]: Start of recursive call 350: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:51:21,674 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 78 treesize of output 76 [2018-10-27 04:51:21,680 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 58 [2018-10-27 04:51:21,681 INFO L267 ElimStorePlain]: Start of recursive call 354: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:21,835 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:51:21,837 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:51:21,838 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 58 [2018-10-27 04:51:21,839 INFO L267 ElimStorePlain]: Start of recursive call 355: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:21,982 INFO L267 ElimStorePlain]: Start of recursive call 353: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:51:23,021 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 55 [2018-10-27 04:51:23,031 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 30 [2018-10-27 04:51:23,032 INFO L267 ElimStorePlain]: Start of recursive call 357: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:23,073 INFO L267 ElimStorePlain]: Start of recursive call 356: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:23,079 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 68 [2018-10-27 04:51:23,085 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:51:23,086 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:51:23,088 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2018-10-27 04:51:23,088 INFO L267 ElimStorePlain]: Start of recursive call 359: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:23,159 INFO L267 ElimStorePlain]: Start of recursive call 358: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:23,165 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 55 [2018-10-27 04:51:23,174 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 30 [2018-10-27 04:51:23,174 INFO L267 ElimStorePlain]: Start of recursive call 361: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:23,215 INFO L267 ElimStorePlain]: Start of recursive call 360: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:24,292 INFO L267 ElimStorePlain]: Start of recursive call 330: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 12 dim-0 vars, and 12 xjuncts. [2018-10-27 04:51:24,308 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 103 treesize of output 80 [2018-10-27 04:51:24,401 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:24,401 INFO L267 ElimStorePlain]: Start of recursive call 363: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:24,442 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 32 [2018-10-27 04:51:24,446 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:24,446 INFO L267 ElimStorePlain]: Start of recursive call 365: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:24,465 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:51:24,465 INFO L267 ElimStorePlain]: Start of recursive call 366: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:24,480 INFO L267 ElimStorePlain]: Start of recursive call 364: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:24,506 INFO L267 ElimStorePlain]: Start of recursive call 362: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:24,536 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 129 treesize of output 90 [2018-10-27 04:51:24,666 WARN L179 SmtUtils]: Spent 128.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 34 [2018-10-27 04:51:24,671 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:24,671 INFO L267 ElimStorePlain]: Start of recursive call 368: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:24,726 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 39 [2018-10-27 04:51:24,731 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:24,732 INFO L267 ElimStorePlain]: Start of recursive call 370: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:24,757 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-10-27 04:51:24,758 INFO L267 ElimStorePlain]: Start of recursive call 371: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:24,777 INFO L267 ElimStorePlain]: Start of recursive call 369: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:24,811 INFO L267 ElimStorePlain]: Start of recursive call 367: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:24,828 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 99 treesize of output 76 [2018-10-27 04:51:24,923 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:24,923 INFO L267 ElimStorePlain]: Start of recursive call 373: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:24,964 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 27 [2018-10-27 04:51:24,968 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2018-10-27 04:51:24,969 INFO L267 ElimStorePlain]: Start of recursive call 375: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:24,991 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:24,992 INFO L267 ElimStorePlain]: Start of recursive call 376: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:25,004 INFO L267 ElimStorePlain]: Start of recursive call 374: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:25,031 INFO L267 ElimStorePlain]: Start of recursive call 372: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:25,051 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 133 treesize of output 94 [2018-10-27 04:51:25,184 WARN L179 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 34 [2018-10-27 04:51:25,189 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:25,189 INFO L267 ElimStorePlain]: Start of recursive call 378: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:25,242 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 44 [2018-10-27 04:51:25,248 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:25,248 INFO L267 ElimStorePlain]: Start of recursive call 380: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:25,277 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-10-27 04:51:25,277 INFO L267 ElimStorePlain]: Start of recursive call 381: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:25,300 INFO L267 ElimStorePlain]: Start of recursive call 379: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:25,335 INFO L267 ElimStorePlain]: Start of recursive call 377: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:25,428 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 253 treesize of output 171 [2018-10-27 04:51:26,358 WARN L179 SmtUtils]: Spent 926.00 ms on a formula simplification. DAG size of input: 109 DAG size of output: 74 [2018-10-27 04:51:26,364 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 64 [2018-10-27 04:51:26,365 INFO L267 ElimStorePlain]: Start of recursive call 383: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:26,371 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 84 [2018-10-27 04:51:26,371 INFO L267 ElimStorePlain]: Start of recursive call 384: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:26,377 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 64 [2018-10-27 04:51:26,378 INFO L267 ElimStorePlain]: Start of recursive call 385: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:27,134 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 65 [2018-10-27 04:51:27,134 INFO L267 ElimStorePlain]: Start of recursive call 386: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:27,144 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 65 [2018-10-27 04:51:27,144 INFO L267 ElimStorePlain]: Start of recursive call 387: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:27,155 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 85 [2018-10-27 04:51:27,156 INFO L267 ElimStorePlain]: Start of recursive call 388: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:27,911 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 60 [2018-10-27 04:51:27,920 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 37 [2018-10-27 04:51:27,920 INFO L267 ElimStorePlain]: Start of recursive call 390: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:28,011 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 40 [2018-10-27 04:51:28,011 INFO L267 ElimStorePlain]: Start of recursive call 391: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:28,103 INFO L267 ElimStorePlain]: Start of recursive call 389: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:51:28,134 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 84 treesize of output 80 [2018-10-27 04:51:28,140 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 60 [2018-10-27 04:51:28,141 INFO L267 ElimStorePlain]: Start of recursive call 393: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:28,281 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 57 [2018-10-27 04:51:28,281 INFO L267 ElimStorePlain]: Start of recursive call 394: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:28,403 INFO L267 ElimStorePlain]: Start of recursive call 392: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:51:28,426 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 60 [2018-10-27 04:51:28,435 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 37 [2018-10-27 04:51:28,436 INFO L267 ElimStorePlain]: Start of recursive call 396: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:28,531 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 40 [2018-10-27 04:51:28,532 INFO L267 ElimStorePlain]: Start of recursive call 397: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:28,611 INFO L267 ElimStorePlain]: Start of recursive call 395: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:51:29,623 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 55 [2018-10-27 04:51:29,633 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 30 [2018-10-27 04:51:29,633 INFO L267 ElimStorePlain]: Start of recursive call 399: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:29,675 INFO L267 ElimStorePlain]: Start of recursive call 398: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:29,680 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 55 [2018-10-27 04:51:29,692 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 30 [2018-10-27 04:51:29,693 INFO L267 ElimStorePlain]: Start of recursive call 401: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:29,732 INFO L267 ElimStorePlain]: Start of recursive call 400: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:29,738 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 75 [2018-10-27 04:51:29,748 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 30 [2018-10-27 04:51:29,748 INFO L267 ElimStorePlain]: Start of recursive call 403: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:29,802 INFO L267 ElimStorePlain]: Start of recursive call 402: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:30,998 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 54 [2018-10-27 04:51:31,004 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:31,004 INFO L267 ElimStorePlain]: Start of recursive call 405: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:31,053 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-10-27 04:51:31,054 INFO L267 ElimStorePlain]: Start of recursive call 406: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:31,097 INFO L267 ElimStorePlain]: Start of recursive call 404: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:31,107 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 74 [2018-10-27 04:51:31,114 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:31,114 INFO L267 ElimStorePlain]: Start of recursive call 408: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:31,181 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-10-27 04:51:31,181 INFO L267 ElimStorePlain]: Start of recursive call 409: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:31,257 INFO L267 ElimStorePlain]: Start of recursive call 407: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:31,267 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 54 [2018-10-27 04:51:31,272 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:31,272 INFO L267 ElimStorePlain]: Start of recursive call 411: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:31,322 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-10-27 04:51:31,323 INFO L267 ElimStorePlain]: Start of recursive call 412: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:31,367 INFO L267 ElimStorePlain]: Start of recursive call 410: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:32,617 INFO L267 ElimStorePlain]: Start of recursive call 382: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 12 dim-0 vars, and 12 xjuncts. [2018-10-27 04:51:32,626 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 67 [2018-10-27 04:51:32,732 WARN L179 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 46 DAG size of output: 35 [2018-10-27 04:51:32,736 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:32,736 INFO L267 ElimStorePlain]: Start of recursive call 414: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:32,777 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2018-10-27 04:51:32,781 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:32,781 INFO L267 ElimStorePlain]: Start of recursive call 416: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:32,786 INFO L267 ElimStorePlain]: Start of recursive call 415: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:51:32,817 INFO L267 ElimStorePlain]: Start of recursive call 413: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:51:32,876 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 103 treesize of output 89 [2018-10-27 04:51:33,341 WARN L179 SmtUtils]: Spent 462.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 60 [2018-10-27 04:51:33,346 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 50 [2018-10-27 04:51:33,346 INFO L267 ElimStorePlain]: Start of recursive call 418: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:33,509 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 51 [2018-10-27 04:51:33,509 INFO L267 ElimStorePlain]: Start of recursive call 419: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:33,685 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 50 treesize of output 48 [2018-10-27 04:51:33,690 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 30 [2018-10-27 04:51:33,691 INFO L267 ElimStorePlain]: Start of recursive call 421: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:33,777 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 27 [2018-10-27 04:51:33,778 INFO L267 ElimStorePlain]: Start of recursive call 422: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:33,841 INFO L267 ElimStorePlain]: Start of recursive call 420: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:51:34,021 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 43 [2018-10-27 04:51:34,029 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 20 [2018-10-27 04:51:34,030 INFO L267 ElimStorePlain]: Start of recursive call 424: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:34,063 INFO L267 ElimStorePlain]: Start of recursive call 423: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:34,237 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 42 [2018-10-27 04:51:34,242 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:34,242 INFO L267 ElimStorePlain]: Start of recursive call 426: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:34,278 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:51:34,279 INFO L267 ElimStorePlain]: Start of recursive call 427: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:34,313 INFO L267 ElimStorePlain]: Start of recursive call 425: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:34,460 INFO L267 ElimStorePlain]: Start of recursive call 417: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-10-27 04:51:34,483 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 210 treesize of output 139 [2018-10-27 04:51:34,791 WARN L179 SmtUtils]: Spent 306.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 47 [2018-10-27 04:51:34,798 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:34,798 INFO L267 ElimStorePlain]: Start of recursive call 429: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:34,937 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 40 [2018-10-27 04:51:34,943 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:34,943 INFO L267 ElimStorePlain]: Start of recursive call 431: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:34,982 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:51:34,982 INFO L267 ElimStorePlain]: Start of recursive call 432: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:35,012 INFO L267 ElimStorePlain]: Start of recursive call 430: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:35,024 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 44 [2018-10-27 04:51:35,031 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:35,031 INFO L267 ElimStorePlain]: Start of recursive call 434: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:35,065 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-10-27 04:51:35,065 INFO L267 ElimStorePlain]: Start of recursive call 435: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:35,096 INFO L267 ElimStorePlain]: Start of recursive call 433: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:35,256 INFO L267 ElimStorePlain]: Start of recursive call 428: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-10-27 04:51:35,280 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 68 [2018-10-27 04:51:35,375 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:35,375 INFO L267 ElimStorePlain]: Start of recursive call 437: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:35,416 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 27 [2018-10-27 04:51:35,421 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:35,421 INFO L267 ElimStorePlain]: Start of recursive call 439: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:35,462 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2018-10-27 04:51:35,462 INFO L267 ElimStorePlain]: Start of recursive call 440: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:35,477 INFO L267 ElimStorePlain]: Start of recursive call 438: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:35,504 INFO L267 ElimStorePlain]: Start of recursive call 436: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:35,520 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 103 treesize of output 80 [2018-10-27 04:51:35,623 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:35,623 INFO L267 ElimStorePlain]: Start of recursive call 442: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:35,667 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 32 [2018-10-27 04:51:35,672 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:35,672 INFO L267 ElimStorePlain]: Start of recursive call 444: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:35,694 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:51:35,694 INFO L267 ElimStorePlain]: Start of recursive call 445: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:35,712 INFO L267 ElimStorePlain]: Start of recursive call 443: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:35,739 INFO L267 ElimStorePlain]: Start of recursive call 441: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:35,751 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 103 treesize of output 80 [2018-10-27 04:51:35,837 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:35,837 INFO L267 ElimStorePlain]: Start of recursive call 447: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:35,879 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 32 [2018-10-27 04:51:35,884 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:35,884 INFO L267 ElimStorePlain]: Start of recursive call 449: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:35,906 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:51:35,906 INFO L267 ElimStorePlain]: Start of recursive call 450: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:35,921 INFO L267 ElimStorePlain]: Start of recursive call 448: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:35,946 INFO L267 ElimStorePlain]: Start of recursive call 446: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:35,960 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 103 treesize of output 80 [2018-10-27 04:51:36,061 WARN L179 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 41 DAG size of output: 31 [2018-10-27 04:51:36,065 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:36,066 INFO L267 ElimStorePlain]: Start of recursive call 452: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:36,111 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 32 [2018-10-27 04:51:36,116 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:36,116 INFO L267 ElimStorePlain]: Start of recursive call 454: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:36,137 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:51:36,138 INFO L267 ElimStorePlain]: Start of recursive call 455: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:36,156 INFO L267 ElimStorePlain]: Start of recursive call 453: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:36,183 INFO L267 ElimStorePlain]: Start of recursive call 451: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:36,197 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 83 [2018-10-27 04:51:36,305 WARN L179 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 32 [2018-10-27 04:51:36,310 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:36,310 INFO L267 ElimStorePlain]: Start of recursive call 457: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:36,355 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 32 [2018-10-27 04:51:36,360 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:36,360 INFO L267 ElimStorePlain]: Start of recursive call 459: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:36,384 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:51:36,384 INFO L267 ElimStorePlain]: Start of recursive call 460: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:36,403 INFO L267 ElimStorePlain]: Start of recursive call 458: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:36,434 INFO L267 ElimStorePlain]: Start of recursive call 456: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:36,521 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 137 treesize of output 109 [2018-10-27 04:51:37,197 WARN L179 SmtUtils]: Spent 673.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 62 [2018-10-27 04:51:37,203 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 60 [2018-10-27 04:51:37,203 INFO L267 ElimStorePlain]: Start of recursive call 462: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:37,444 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 61 [2018-10-27 04:51:37,444 INFO L267 ElimStorePlain]: Start of recursive call 463: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:37,703 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 58 [2018-10-27 04:51:37,710 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 40 [2018-10-27 04:51:37,710 INFO L267 ElimStorePlain]: Start of recursive call 465: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:37,822 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 37 [2018-10-27 04:51:37,823 INFO L267 ElimStorePlain]: Start of recursive call 466: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:37,920 INFO L267 ElimStorePlain]: Start of recursive call 464: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:51:38,211 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 52 [2018-10-27 04:51:38,218 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:38,218 INFO L267 ElimStorePlain]: Start of recursive call 468: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:38,272 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-10-27 04:51:38,273 INFO L267 ElimStorePlain]: Start of recursive call 469: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:38,320 INFO L267 ElimStorePlain]: Start of recursive call 467: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:38,573 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 53 [2018-10-27 04:51:38,582 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 27 [2018-10-27 04:51:38,582 INFO L267 ElimStorePlain]: Start of recursive call 471: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:38,630 INFO L267 ElimStorePlain]: Start of recursive call 470: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:38,872 INFO L267 ElimStorePlain]: Start of recursive call 461: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-10-27 04:51:38,892 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 99 treesize of output 76 [2018-10-27 04:51:39,001 WARN L179 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 31 [2018-10-27 04:51:39,006 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:39,006 INFO L267 ElimStorePlain]: Start of recursive call 473: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:39,048 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 27 [2018-10-27 04:51:39,053 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2018-10-27 04:51:39,053 INFO L267 ElimStorePlain]: Start of recursive call 475: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:39,086 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:39,087 INFO L267 ElimStorePlain]: Start of recursive call 476: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:39,100 INFO L267 ElimStorePlain]: Start of recursive call 474: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:39,128 INFO L267 ElimStorePlain]: Start of recursive call 472: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:39,139 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 62 [2018-10-27 04:51:39,240 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:39,240 INFO L267 ElimStorePlain]: Start of recursive call 478: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:39,279 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 28 [2018-10-27 04:51:39,284 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 14 [2018-10-27 04:51:39,284 INFO L267 ElimStorePlain]: Start of recursive call 480: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:39,298 INFO L267 ElimStorePlain]: Start of recursive call 479: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:51:39,324 INFO L267 ElimStorePlain]: Start of recursive call 477: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:51:39,337 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 83 [2018-10-27 04:51:39,452 WARN L179 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 32 [2018-10-27 04:51:39,457 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:39,457 INFO L267 ElimStorePlain]: Start of recursive call 482: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:39,518 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 32 [2018-10-27 04:51:39,523 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:39,523 INFO L267 ElimStorePlain]: Start of recursive call 484: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:39,544 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:51:39,544 INFO L267 ElimStorePlain]: Start of recursive call 485: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:39,560 INFO L267 ElimStorePlain]: Start of recursive call 483: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:39,591 INFO L267 ElimStorePlain]: Start of recursive call 481: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:39,612 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 140 treesize of output 101 [2018-10-27 04:51:39,734 WARN L179 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 35 [2018-10-27 04:51:39,738 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:39,738 INFO L267 ElimStorePlain]: Start of recursive call 487: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:39,786 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 39 [2018-10-27 04:51:39,791 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:39,791 INFO L267 ElimStorePlain]: Start of recursive call 489: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:39,817 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-10-27 04:51:39,817 INFO L267 ElimStorePlain]: Start of recursive call 490: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:39,836 INFO L267 ElimStorePlain]: Start of recursive call 488: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:39,874 INFO L267 ElimStorePlain]: Start of recursive call 486: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:39,928 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 103 treesize of output 89 [2018-10-27 04:51:40,345 WARN L179 SmtUtils]: Spent 415.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 59 [2018-10-27 04:51:40,349 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 50 [2018-10-27 04:51:40,350 INFO L267 ElimStorePlain]: Start of recursive call 492: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:40,491 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 51 [2018-10-27 04:51:40,491 INFO L267 ElimStorePlain]: Start of recursive call 493: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:40,624 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 43 [2018-10-27 04:51:40,631 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 20 [2018-10-27 04:51:40,632 INFO L267 ElimStorePlain]: Start of recursive call 495: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:40,658 INFO L267 ElimStorePlain]: Start of recursive call 494: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:40,792 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 50 treesize of output 48 [2018-10-27 04:51:40,797 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 30 [2018-10-27 04:51:40,797 INFO L267 ElimStorePlain]: Start of recursive call 497: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:40,873 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 27 [2018-10-27 04:51:40,874 INFO L267 ElimStorePlain]: Start of recursive call 498: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:40,941 INFO L267 ElimStorePlain]: Start of recursive call 496: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:51:41,095 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 42 [2018-10-27 04:51:41,101 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:41,101 INFO L267 ElimStorePlain]: Start of recursive call 500: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:41,129 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:51:41,130 INFO L267 ElimStorePlain]: Start of recursive call 501: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:41,156 INFO L267 ElimStorePlain]: Start of recursive call 499: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:41,285 INFO L267 ElimStorePlain]: Start of recursive call 491: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-10-27 04:51:41,333 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 103 treesize of output 89 [2018-10-27 04:51:41,738 WARN L179 SmtUtils]: Spent 402.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 60 [2018-10-27 04:51:41,742 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 50 [2018-10-27 04:51:41,743 INFO L267 ElimStorePlain]: Start of recursive call 503: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:41,904 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 51 [2018-10-27 04:51:41,905 INFO L267 ElimStorePlain]: Start of recursive call 504: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:42,049 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 43 [2018-10-27 04:51:42,056 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 20 [2018-10-27 04:51:42,056 INFO L267 ElimStorePlain]: Start of recursive call 506: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:42,084 INFO L267 ElimStorePlain]: Start of recursive call 505: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:42,241 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 50 treesize of output 48 [2018-10-27 04:51:42,248 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 27 [2018-10-27 04:51:42,249 INFO L267 ElimStorePlain]: Start of recursive call 508: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:42,316 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 30 [2018-10-27 04:51:42,316 INFO L267 ElimStorePlain]: Start of recursive call 509: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:42,382 INFO L267 ElimStorePlain]: Start of recursive call 507: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:51:42,536 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 42 [2018-10-27 04:51:42,540 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:42,540 INFO L267 ElimStorePlain]: Start of recursive call 511: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:42,570 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:51:42,571 INFO L267 ElimStorePlain]: Start of recursive call 512: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:42,598 INFO L267 ElimStorePlain]: Start of recursive call 510: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:42,783 INFO L267 ElimStorePlain]: Start of recursive call 502: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-10-27 04:51:42,800 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 100 treesize of output 77 [2018-10-27 04:51:42,879 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:42,880 INFO L267 ElimStorePlain]: Start of recursive call 514: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:42,908 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 32 [2018-10-27 04:51:42,912 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:42,912 INFO L267 ElimStorePlain]: Start of recursive call 516: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:42,929 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:51:42,929 INFO L267 ElimStorePlain]: Start of recursive call 517: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:42,941 INFO L267 ElimStorePlain]: Start of recursive call 515: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:42,957 INFO L267 ElimStorePlain]: Start of recursive call 513: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:43,004 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 100 treesize of output 86 [2018-10-27 04:51:43,357 WARN L179 SmtUtils]: Spent 350.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 58 [2018-10-27 04:51:43,361 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-10-27 04:51:43,361 INFO L267 ElimStorePlain]: Start of recursive call 519: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:43,489 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 48 [2018-10-27 04:51:43,489 INFO L267 ElimStorePlain]: Start of recursive call 520: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:43,617 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 47 treesize of output 45 [2018-10-27 04:51:43,624 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 24 [2018-10-27 04:51:43,625 INFO L267 ElimStorePlain]: Start of recursive call 522: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:43,682 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-10-27 04:51:43,682 INFO L267 ElimStorePlain]: Start of recursive call 523: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:43,737 INFO L267 ElimStorePlain]: Start of recursive call 521: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:51:43,871 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 40 [2018-10-27 04:51:43,877 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 20 [2018-10-27 04:51:43,878 INFO L267 ElimStorePlain]: Start of recursive call 525: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:43,902 INFO L267 ElimStorePlain]: Start of recursive call 524: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:44,037 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 39 [2018-10-27 04:51:44,056 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:44,056 INFO L267 ElimStorePlain]: Start of recursive call 527: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:44,220 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:51:44,221 INFO L267 ElimStorePlain]: Start of recursive call 528: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:44,244 INFO L267 ElimStorePlain]: Start of recursive call 526: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:44,354 INFO L267 ElimStorePlain]: Start of recursive call 518: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-10-27 04:51:44,370 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 149 treesize of output 110 [2018-10-27 04:51:44,487 WARN L179 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 33 [2018-10-27 04:51:44,492 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:44,492 INFO L267 ElimStorePlain]: Start of recursive call 530: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:44,542 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 44 [2018-10-27 04:51:44,547 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:44,547 INFO L267 ElimStorePlain]: Start of recursive call 532: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:44,576 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-10-27 04:51:44,577 INFO L267 ElimStorePlain]: Start of recursive call 533: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:44,597 INFO L267 ElimStorePlain]: Start of recursive call 531: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:44,627 INFO L267 ElimStorePlain]: Start of recursive call 529: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:44,698 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 173 treesize of output 127 [2018-10-27 04:51:45,451 WARN L179 SmtUtils]: Spent 750.00 ms on a formula simplification. DAG size of input: 104 DAG size of output: 82 [2018-10-27 04:51:45,458 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 68 [2018-10-27 04:51:45,458 INFO L267 ElimStorePlain]: Start of recursive call 535: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:45,463 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 78 [2018-10-27 04:51:45,464 INFO L267 ElimStorePlain]: Start of recursive call 536: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:45,470 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 68 [2018-10-27 04:51:45,471 INFO L267 ElimStorePlain]: Start of recursive call 537: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:46,037 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 69 [2018-10-27 04:51:46,038 INFO L267 ElimStorePlain]: Start of recursive call 538: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:46,044 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 69 [2018-10-27 04:51:46,045 INFO L267 ElimStorePlain]: Start of recursive call 539: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:46,540 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 58 [2018-10-27 04:51:46,545 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-10-27 04:51:46,545 INFO L267 ElimStorePlain]: Start of recursive call 541: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:46,603 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:46,603 INFO L267 ElimStorePlain]: Start of recursive call 542: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:46,650 INFO L267 ElimStorePlain]: Start of recursive call 540: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:46,664 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 60 [2018-10-27 04:51:46,670 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:46,670 INFO L267 ElimStorePlain]: Start of recursive call 544: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:46,731 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:51:46,731 INFO L267 ElimStorePlain]: Start of recursive call 545: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:46,792 INFO L267 ElimStorePlain]: Start of recursive call 543: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:47,229 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 68 treesize of output 64 [2018-10-27 04:51:47,235 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 44 [2018-10-27 04:51:47,235 INFO L267 ElimStorePlain]: Start of recursive call 547: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:47,340 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:51:47,342 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:51:47,343 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 44 [2018-10-27 04:51:47,344 INFO L267 ElimStorePlain]: Start of recursive call 548: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:47,431 INFO L267 ElimStorePlain]: Start of recursive call 546: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:51:47,465 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 68 treesize of output 66 [2018-10-27 04:51:47,471 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 48 [2018-10-27 04:51:47,472 INFO L267 ElimStorePlain]: Start of recursive call 550: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:47,593 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:51:47,595 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:51:47,596 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 48 [2018-10-27 04:51:47,597 INFO L267 ElimStorePlain]: Start of recursive call 551: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:47,715 INFO L267 ElimStorePlain]: Start of recursive call 549: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:51:48,306 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 60 [2018-10-27 04:51:48,313 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:51:48,314 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:51:48,315 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 33 [2018-10-27 04:51:48,315 INFO L267 ElimStorePlain]: Start of recursive call 553: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:48,368 INFO L267 ElimStorePlain]: Start of recursive call 552: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:48,373 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 62 [2018-10-27 04:51:48,379 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:51:48,380 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:51:48,382 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2018-10-27 04:51:48,382 INFO L267 ElimStorePlain]: Start of recursive call 555: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:48,440 INFO L267 ElimStorePlain]: Start of recursive call 554: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:49,016 INFO L267 ElimStorePlain]: Start of recursive call 534: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 8 dim-0 vars, and 8 xjuncts. [2018-10-27 04:51:49,086 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 149 treesize of output 115 [2018-10-27 04:51:49,610 WARN L179 SmtUtils]: Spent 521.00 ms on a formula simplification. DAG size of input: 96 DAG size of output: 64 [2018-10-27 04:51:49,619 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 64 [2018-10-27 04:51:49,620 INFO L267 ElimStorePlain]: Start of recursive call 557: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:49,813 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 65 [2018-10-27 04:51:49,814 INFO L267 ElimStorePlain]: Start of recursive call 558: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:49,990 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 54 [2018-10-27 04:51:49,994 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:49,995 INFO L267 ElimStorePlain]: Start of recursive call 560: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:50,161 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-10-27 04:51:50,162 INFO L267 ElimStorePlain]: Start of recursive call 561: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:50,201 INFO L267 ElimStorePlain]: Start of recursive call 559: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:50,398 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 60 [2018-10-27 04:51:50,407 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 37 [2018-10-27 04:51:50,407 INFO L267 ElimStorePlain]: Start of recursive call 563: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:50,489 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 40 [2018-10-27 04:51:50,489 INFO L267 ElimStorePlain]: Start of recursive call 564: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:50,571 INFO L267 ElimStorePlain]: Start of recursive call 562: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:51:50,770 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 55 [2018-10-27 04:51:50,778 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 30 [2018-10-27 04:51:50,778 INFO L267 ElimStorePlain]: Start of recursive call 566: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:50,816 INFO L267 ElimStorePlain]: Start of recursive call 565: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:51,008 INFO L267 ElimStorePlain]: Start of recursive call 556: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-10-27 04:51:51,023 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 149 treesize of output 110 [2018-10-27 04:51:51,140 WARN L179 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 33 [2018-10-27 04:51:51,146 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:51,146 INFO L267 ElimStorePlain]: Start of recursive call 568: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:51,193 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 44 [2018-10-27 04:51:51,198 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:51,198 INFO L267 ElimStorePlain]: Start of recursive call 570: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:51,225 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-10-27 04:51:51,225 INFO L267 ElimStorePlain]: Start of recursive call 571: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:51,248 INFO L267 ElimStorePlain]: Start of recursive call 569: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:51,289 INFO L267 ElimStorePlain]: Start of recursive call 567: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:51,300 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 107 treesize of output 84 [2018-10-27 04:51:51,412 WARN L179 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 45 DAG size of output: 35 [2018-10-27 04:51:51,416 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:51,416 INFO L267 ElimStorePlain]: Start of recursive call 573: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:51,472 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 36 [2018-10-27 04:51:51,476 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:51,477 INFO L267 ElimStorePlain]: Start of recursive call 575: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:51,497 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:51:51,498 INFO L267 ElimStorePlain]: Start of recursive call 576: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:51,515 INFO L267 ElimStorePlain]: Start of recursive call 574: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:51,542 INFO L267 ElimStorePlain]: Start of recursive call 572: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:51,592 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 98 treesize of output 88 [2018-10-27 04:51:52,038 WARN L179 SmtUtils]: Spent 444.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 61 [2018-10-27 04:51:52,043 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 53 [2018-10-27 04:51:52,043 INFO L267 ElimStorePlain]: Start of recursive call 578: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:52,219 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 54 [2018-10-27 04:51:52,220 INFO L267 ElimStorePlain]: Start of recursive call 579: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:52,394 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 46 [2018-10-27 04:51:52,402 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 20 [2018-10-27 04:51:52,402 INFO L267 ElimStorePlain]: Start of recursive call 581: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:52,439 INFO L267 ElimStorePlain]: Start of recursive call 580: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:52,609 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 53 treesize of output 51 [2018-10-27 04:51:52,615 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 33 [2018-10-27 04:51:52,615 INFO L267 ElimStorePlain]: Start of recursive call 583: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:52,706 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 30 [2018-10-27 04:51:52,707 INFO L267 ElimStorePlain]: Start of recursive call 584: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:52,778 INFO L267 ElimStorePlain]: Start of recursive call 582: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:51:52,968 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 45 [2018-10-27 04:51:52,972 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:52,972 INFO L267 ElimStorePlain]: Start of recursive call 586: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:53,008 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:51:53,009 INFO L267 ElimStorePlain]: Start of recursive call 587: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:53,044 INFO L267 ElimStorePlain]: Start of recursive call 585: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:53,202 INFO L267 ElimStorePlain]: Start of recursive call 577: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-10-27 04:51:53,221 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 136 treesize of output 97 [2018-10-27 04:51:53,364 WARN L179 SmtUtils]: Spent 141.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 35 [2018-10-27 04:51:53,370 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:53,370 INFO L267 ElimStorePlain]: Start of recursive call 589: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:53,427 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 44 [2018-10-27 04:51:53,432 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:53,432 INFO L267 ElimStorePlain]: Start of recursive call 591: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:53,459 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-10-27 04:51:53,460 INFO L267 ElimStorePlain]: Start of recursive call 592: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:53,481 INFO L267 ElimStorePlain]: Start of recursive call 590: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:53,518 INFO L267 ElimStorePlain]: Start of recursive call 588: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:53,537 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 141 treesize of output 105 [2018-10-27 04:51:53,686 WARN L179 SmtUtils]: Spent 147.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 36 [2018-10-27 04:51:53,691 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:53,691 INFO L267 ElimStorePlain]: Start of recursive call 594: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:53,749 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 39 [2018-10-27 04:51:53,754 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:53,754 INFO L267 ElimStorePlain]: Start of recursive call 596: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:53,778 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-10-27 04:51:53,779 INFO L267 ElimStorePlain]: Start of recursive call 597: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:53,797 INFO L267 ElimStorePlain]: Start of recursive call 595: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:53,836 INFO L267 ElimStorePlain]: Start of recursive call 593: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:53,849 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 101 treesize of output 78 [2018-10-27 04:51:53,950 WARN L179 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 45 DAG size of output: 33 [2018-10-27 04:51:53,955 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:53,955 INFO L267 ElimStorePlain]: Start of recursive call 599: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:53,999 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 32 [2018-10-27 04:51:54,004 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:54,004 INFO L267 ElimStorePlain]: Start of recursive call 601: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:54,024 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:51:54,025 INFO L267 ElimStorePlain]: Start of recursive call 602: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:54,046 INFO L267 ElimStorePlain]: Start of recursive call 600: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:54,077 INFO L267 ElimStorePlain]: Start of recursive call 598: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:54,135 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 146 treesize of output 112 [2018-10-27 04:51:54,660 WARN L179 SmtUtils]: Spent 522.00 ms on a formula simplification. DAG size of input: 94 DAG size of output: 63 [2018-10-27 04:51:54,665 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 61 [2018-10-27 04:51:54,665 INFO L267 ElimStorePlain]: Start of recursive call 604: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:54,839 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 62 [2018-10-27 04:51:54,839 INFO L267 ElimStorePlain]: Start of recursive call 605: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:55,022 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 52 [2018-10-27 04:51:55,030 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 30 [2018-10-27 04:51:55,030 INFO L267 ElimStorePlain]: Start of recursive call 607: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:55,065 INFO L267 ElimStorePlain]: Start of recursive call 606: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:55,252 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 61 treesize of output 57 [2018-10-27 04:51:55,258 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2018-10-27 04:51:55,258 INFO L267 ElimStorePlain]: Start of recursive call 609: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:55,355 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 34 [2018-10-27 04:51:55,356 INFO L267 ElimStorePlain]: Start of recursive call 610: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:55,437 INFO L267 ElimStorePlain]: Start of recursive call 608: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:51:55,628 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2018-10-27 04:51:55,633 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:55,633 INFO L267 ElimStorePlain]: Start of recursive call 612: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:55,671 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-10-27 04:51:55,671 INFO L267 ElimStorePlain]: Start of recursive call 613: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:55,707 INFO L267 ElimStorePlain]: Start of recursive call 611: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:55,907 INFO L267 ElimStorePlain]: Start of recursive call 603: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-10-27 04:51:55,920 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 83 [2018-10-27 04:51:56,029 WARN L179 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 32 [2018-10-27 04:51:56,034 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:56,034 INFO L267 ElimStorePlain]: Start of recursive call 615: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:56,085 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 32 [2018-10-27 04:51:56,089 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:56,090 INFO L267 ElimStorePlain]: Start of recursive call 617: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:56,111 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:51:56,111 INFO L267 ElimStorePlain]: Start of recursive call 618: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:56,129 INFO L267 ElimStorePlain]: Start of recursive call 616: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:56,161 INFO L267 ElimStorePlain]: Start of recursive call 614: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:56,177 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 82 [2018-10-27 04:51:56,267 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:56,268 INFO L267 ElimStorePlain]: Start of recursive call 620: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:56,307 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-10-27 04:51:56,311 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:56,312 INFO L267 ElimStorePlain]: Start of recursive call 622: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:56,325 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:56,325 INFO L267 ElimStorePlain]: Start of recursive call 623: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:56,330 INFO L267 ElimStorePlain]: Start of recursive call 621: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:51:56,350 INFO L267 ElimStorePlain]: Start of recursive call 619: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:51:56,367 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 146 treesize of output 107 [2018-10-27 04:51:56,477 WARN L179 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 32 [2018-10-27 04:51:56,481 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:56,481 INFO L267 ElimStorePlain]: Start of recursive call 625: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:56,526 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 44 [2018-10-27 04:51:56,532 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:56,532 INFO L267 ElimStorePlain]: Start of recursive call 627: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:56,561 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-10-27 04:51:56,561 INFO L267 ElimStorePlain]: Start of recursive call 628: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:56,581 INFO L267 ElimStorePlain]: Start of recursive call 626: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:56,606 INFO L267 ElimStorePlain]: Start of recursive call 624: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:56,630 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 253 treesize of output 166 [2018-10-27 04:51:56,922 WARN L179 SmtUtils]: Spent 290.00 ms on a formula simplification. DAG size of input: 56 DAG size of output: 43 [2018-10-27 04:51:56,927 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:56,928 INFO L267 ElimStorePlain]: Start of recursive call 630: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:57,042 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 44 [2018-10-27 04:51:57,048 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:57,048 INFO L267 ElimStorePlain]: Start of recursive call 632: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:57,083 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-10-27 04:51:57,083 INFO L267 ElimStorePlain]: Start of recursive call 633: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:57,108 INFO L267 ElimStorePlain]: Start of recursive call 631: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:57,192 INFO L267 ElimStorePlain]: Start of recursive call 629: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 3 xjuncts. [2018-10-27 04:51:57,208 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 103 treesize of output 80 [2018-10-27 04:51:57,557 WARN L179 SmtUtils]: Spent 347.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 30 [2018-10-27 04:51:57,562 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:51:57,562 INFO L267 ElimStorePlain]: Start of recursive call 635: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:57,611 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 32 [2018-10-27 04:51:57,616 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:57,616 INFO L267 ElimStorePlain]: Start of recursive call 637: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:57,637 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:51:57,637 INFO L267 ElimStorePlain]: Start of recursive call 638: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:57,652 INFO L267 ElimStorePlain]: Start of recursive call 636: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:57,678 INFO L267 ElimStorePlain]: Start of recursive call 634: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:57,767 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 138 treesize of output 110 [2018-10-27 04:51:58,470 WARN L179 SmtUtils]: Spent 700.00 ms on a formula simplification. DAG size of input: 100 DAG size of output: 64 [2018-10-27 04:51:58,475 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 61 [2018-10-27 04:51:58,476 INFO L267 ElimStorePlain]: Start of recursive call 640: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:58,712 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 62 [2018-10-27 04:51:58,712 INFO L267 ElimStorePlain]: Start of recursive call 641: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:58,927 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 56 [2018-10-27 04:51:58,933 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:58,933 INFO L267 ElimStorePlain]: Start of recursive call 643: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:58,988 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-10-27 04:51:58,988 INFO L267 ElimStorePlain]: Start of recursive call 644: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:59,043 INFO L267 ElimStorePlain]: Start of recursive call 642: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:59,265 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 61 treesize of output 59 [2018-10-27 04:51:59,271 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 41 [2018-10-27 04:51:59,271 INFO L267 ElimStorePlain]: Start of recursive call 646: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:59,384 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 38 [2018-10-27 04:51:59,385 INFO L267 ElimStorePlain]: Start of recursive call 647: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:59,488 INFO L267 ElimStorePlain]: Start of recursive call 645: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:51:59,725 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 58 [2018-10-27 04:51:59,737 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 27 [2018-10-27 04:51:59,737 INFO L267 ElimStorePlain]: Start of recursive call 649: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:51:59,783 INFO L267 ElimStorePlain]: Start of recursive call 648: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:00,034 INFO L267 ElimStorePlain]: Start of recursive call 639: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-10-27 04:52:00,053 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 96 treesize of output 73 [2018-10-27 04:52:00,148 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:52:00,148 INFO L267 ElimStorePlain]: Start of recursive call 651: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:00,184 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 27 [2018-10-27 04:52:00,189 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:52:00,189 INFO L267 ElimStorePlain]: Start of recursive call 653: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:00,207 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2018-10-27 04:52:00,208 INFO L267 ElimStorePlain]: Start of recursive call 654: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:00,220 INFO L267 ElimStorePlain]: Start of recursive call 652: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:00,241 INFO L267 ElimStorePlain]: Start of recursive call 650: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:00,332 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 126 treesize of output 102 [2018-10-27 04:52:00,919 WARN L179 SmtUtils]: Spent 584.00 ms on a formula simplification. DAG size of input: 93 DAG size of output: 61 [2018-10-27 04:52:00,924 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 57 [2018-10-27 04:52:00,924 INFO L267 ElimStorePlain]: Start of recursive call 656: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:01,128 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 58 [2018-10-27 04:52:01,128 INFO L267 ElimStorePlain]: Start of recursive call 657: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:01,339 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 57 treesize of output 55 [2018-10-27 04:52:01,350 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 34 [2018-10-27 04:52:01,351 INFO L267 ElimStorePlain]: Start of recursive call 659: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:01,441 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 37 [2018-10-27 04:52:01,442 INFO L267 ElimStorePlain]: Start of recursive call 660: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:01,533 INFO L267 ElimStorePlain]: Start of recursive call 658: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:52:01,742 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 49 [2018-10-27 04:52:01,748 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:52:01,748 INFO L267 ElimStorePlain]: Start of recursive call 662: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:01,791 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-10-27 04:52:01,792 INFO L267 ElimStorePlain]: Start of recursive call 663: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:01,830 INFO L267 ElimStorePlain]: Start of recursive call 661: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:02,092 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 50 [2018-10-27 04:52:02,101 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 27 [2018-10-27 04:52:02,102 INFO L267 ElimStorePlain]: Start of recursive call 665: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:02,141 INFO L267 ElimStorePlain]: Start of recursive call 664: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:02,315 INFO L267 ElimStorePlain]: Start of recursive call 655: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-10-27 04:52:02,335 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 75 [2018-10-27 04:52:02,436 WARN L179 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 45 DAG size of output: 32 [2018-10-27 04:52:02,442 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:52:02,442 INFO L267 ElimStorePlain]: Start of recursive call 667: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:02,487 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 32 [2018-10-27 04:52:02,492 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:52:02,492 INFO L267 ElimStorePlain]: Start of recursive call 669: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:02,515 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:52:02,516 INFO L267 ElimStorePlain]: Start of recursive call 670: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:02,532 INFO L267 ElimStorePlain]: Start of recursive call 668: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:02,561 INFO L267 ElimStorePlain]: Start of recursive call 666: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:02,634 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 133 treesize of output 107 [2018-10-27 04:52:03,272 WARN L179 SmtUtils]: Spent 636.00 ms on a formula simplification. DAG size of input: 94 DAG size of output: 65 [2018-10-27 04:52:03,278 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 64 [2018-10-27 04:52:03,279 INFO L267 ElimStorePlain]: Start of recursive call 672: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:03,515 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 65 [2018-10-27 04:52:03,515 INFO L267 ElimStorePlain]: Start of recursive call 673: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:03,769 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 60 [2018-10-27 04:52:03,778 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 37 [2018-10-27 04:52:03,779 INFO L267 ElimStorePlain]: Start of recursive call 675: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:03,877 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 40 [2018-10-27 04:52:03,878 INFO L267 ElimStorePlain]: Start of recursive call 676: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:03,973 INFO L267 ElimStorePlain]: Start of recursive call 674: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:52:04,227 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 54 [2018-10-27 04:52:04,233 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:52:04,233 INFO L267 ElimStorePlain]: Start of recursive call 678: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:04,284 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-10-27 04:52:04,284 INFO L267 ElimStorePlain]: Start of recursive call 679: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:04,329 INFO L267 ElimStorePlain]: Start of recursive call 677: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:04,571 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 55 [2018-10-27 04:52:04,581 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 30 [2018-10-27 04:52:04,581 INFO L267 ElimStorePlain]: Start of recursive call 681: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:04,626 INFO L267 ElimStorePlain]: Start of recursive call 680: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:04,858 INFO L267 ElimStorePlain]: Start of recursive call 671: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-10-27 04:52:04,924 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 100 treesize of output 88 [2018-10-27 04:52:05,366 WARN L179 SmtUtils]: Spent 439.00 ms on a formula simplification. DAG size of input: 88 DAG size of output: 59 [2018-10-27 04:52:05,370 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 48 [2018-10-27 04:52:05,371 INFO L267 ElimStorePlain]: Start of recursive call 683: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:05,534 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-10-27 04:52:05,535 INFO L267 ElimStorePlain]: Start of recursive call 684: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:05,704 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 46 [2018-10-27 04:52:05,711 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 17 [2018-10-27 04:52:05,711 INFO L267 ElimStorePlain]: Start of recursive call 686: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:05,746 INFO L267 ElimStorePlain]: Start of recursive call 685: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:05,918 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 47 treesize of output 47 [2018-10-27 04:52:05,927 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 28 [2018-10-27 04:52:05,927 INFO L267 ElimStorePlain]: Start of recursive call 688: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:06,005 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 31 [2018-10-27 04:52:06,006 INFO L267 ElimStorePlain]: Start of recursive call 689: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:06,078 INFO L267 ElimStorePlain]: Start of recursive call 687: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:52:06,256 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 44 [2018-10-27 04:52:06,260 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:52:06,260 INFO L267 ElimStorePlain]: Start of recursive call 691: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:06,301 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2018-10-27 04:52:06,301 INFO L267 ElimStorePlain]: Start of recursive call 692: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:06,335 INFO L267 ElimStorePlain]: Start of recursive call 690: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:06,502 INFO L267 ElimStorePlain]: Start of recursive call 682: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-10-27 04:52:06,529 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 256 treesize of output 169 [2018-10-27 04:52:06,820 WARN L179 SmtUtils]: Spent 289.00 ms on a formula simplification. DAG size of input: 57 DAG size of output: 44 [2018-10-27 04:52:06,826 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:52:06,826 INFO L267 ElimStorePlain]: Start of recursive call 694: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:06,947 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 44 [2018-10-27 04:52:06,953 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:52:06,953 INFO L267 ElimStorePlain]: Start of recursive call 696: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:06,993 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-10-27 04:52:06,994 INFO L267 ElimStorePlain]: Start of recursive call 697: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:07,023 INFO L267 ElimStorePlain]: Start of recursive call 695: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:07,131 INFO L267 ElimStorePlain]: Start of recursive call 693: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 3 xjuncts. [2018-10-27 04:52:07,145 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 110 treesize of output 90 [2018-10-27 04:52:07,265 WARN L179 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 36 [2018-10-27 04:52:07,270 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:52:07,270 INFO L267 ElimStorePlain]: Start of recursive call 699: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:07,329 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 36 [2018-10-27 04:52:07,334 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:52:07,334 INFO L267 ElimStorePlain]: Start of recursive call 701: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:07,361 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:52:07,361 INFO L267 ElimStorePlain]: Start of recursive call 702: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:07,381 INFO L267 ElimStorePlain]: Start of recursive call 700: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:07,425 INFO L267 ElimStorePlain]: Start of recursive call 698: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:07,456 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 207 treesize of output 136 [2018-10-27 04:52:07,743 WARN L179 SmtUtils]: Spent 285.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 46 [2018-10-27 04:52:07,749 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:52:07,750 INFO L267 ElimStorePlain]: Start of recursive call 704: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:07,872 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 40 [2018-10-27 04:52:07,878 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:52:07,878 INFO L267 ElimStorePlain]: Start of recursive call 706: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:07,911 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:52:07,911 INFO L267 ElimStorePlain]: Start of recursive call 707: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:07,949 INFO L267 ElimStorePlain]: Start of recursive call 705: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:07,960 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 44 [2018-10-27 04:52:07,966 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:52:07,966 INFO L267 ElimStorePlain]: Start of recursive call 709: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:08,002 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-10-27 04:52:08,002 INFO L267 ElimStorePlain]: Start of recursive call 710: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:08,028 INFO L267 ElimStorePlain]: Start of recursive call 708: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:08,177 INFO L267 ElimStorePlain]: Start of recursive call 703: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-10-27 04:52:08,197 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 103 treesize of output 83 [2018-10-27 04:52:08,325 WARN L179 SmtUtils]: Spent 126.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 33 [2018-10-27 04:52:08,330 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:52:08,330 INFO L267 ElimStorePlain]: Start of recursive call 712: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:08,386 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 27 [2018-10-27 04:52:08,391 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:52:08,391 INFO L267 ElimStorePlain]: Start of recursive call 714: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:08,415 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2018-10-27 04:52:08,416 INFO L267 ElimStorePlain]: Start of recursive call 715: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:08,430 INFO L267 ElimStorePlain]: Start of recursive call 713: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:08,465 INFO L267 ElimStorePlain]: Start of recursive call 711: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:08,491 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 219 treesize of output 148 [2018-10-27 04:52:08,734 WARN L179 SmtUtils]: Spent 241.00 ms on a formula simplification. DAG size of input: 57 DAG size of output: 44 [2018-10-27 04:52:08,740 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:52:08,740 INFO L267 ElimStorePlain]: Start of recursive call 717: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:08,837 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 48 [2018-10-27 04:52:08,843 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:52:08,844 INFO L267 ElimStorePlain]: Start of recursive call 719: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:08,876 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-10-27 04:52:08,877 INFO L267 ElimStorePlain]: Start of recursive call 720: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:08,905 INFO L267 ElimStorePlain]: Start of recursive call 718: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:08,974 INFO L267 ElimStorePlain]: Start of recursive call 716: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:52:08,997 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 65 [2018-10-27 04:52:09,087 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:52:09,087 INFO L267 ElimStorePlain]: Start of recursive call 722: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:09,120 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 27 [2018-10-27 04:52:09,125 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:52:09,125 INFO L267 ElimStorePlain]: Start of recursive call 724: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:09,143 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2018-10-27 04:52:09,143 INFO L267 ElimStorePlain]: Start of recursive call 725: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:09,156 INFO L267 ElimStorePlain]: Start of recursive call 723: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:09,179 INFO L267 ElimStorePlain]: Start of recursive call 721: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:09,192 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 103 treesize of output 80 [2018-10-27 04:52:09,286 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:52:09,286 INFO L267 ElimStorePlain]: Start of recursive call 727: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:09,322 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 32 [2018-10-27 04:52:09,327 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:52:09,327 INFO L267 ElimStorePlain]: Start of recursive call 729: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:09,347 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:52:09,348 INFO L267 ElimStorePlain]: Start of recursive call 730: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:09,361 INFO L267 ElimStorePlain]: Start of recursive call 728: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:09,383 INFO L267 ElimStorePlain]: Start of recursive call 726: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:09,449 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 145 treesize of output 115 [2018-10-27 04:52:10,054 WARN L179 SmtUtils]: Spent 602.00 ms on a formula simplification. DAG size of input: 100 DAG size of output: 71 [2018-10-27 04:52:10,059 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 68 [2018-10-27 04:52:10,060 INFO L267 ElimStorePlain]: Start of recursive call 732: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:10,315 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 69 [2018-10-27 04:52:10,315 INFO L267 ElimStorePlain]: Start of recursive call 733: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:10,526 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 58 [2018-10-27 04:52:10,533 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-10-27 04:52:10,533 INFO L267 ElimStorePlain]: Start of recursive call 735: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:10,588 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:52:10,588 INFO L267 ElimStorePlain]: Start of recursive call 736: End of recursive call: and 1 xjuncts. [2018-10-27 04:52:10,632 INFO L267 ElimStorePlain]: Start of recursive call 734: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:10,853 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 68 treesize of output 64 [2018-10-27 04:52:10,859 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 44 [2018-10-27 04:52:10,860 INFO L267 ElimStorePlain]: Start of recursive call 738: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:10,970 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:52:10,972 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:52:10,973 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 44 [2018-10-27 04:52:10,974 INFO L267 ElimStorePlain]: Start of recursive call 739: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:11,065 INFO L267 ElimStorePlain]: Start of recursive call 737: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:52:11,287 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 60 [2018-10-27 04:52:11,293 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:52:11,295 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:52:11,296 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 33 [2018-10-27 04:52:11,297 INFO L267 ElimStorePlain]: Start of recursive call 741: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:11,345 INFO L267 ElimStorePlain]: Start of recursive call 740: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:52:11,572 INFO L267 ElimStorePlain]: Start of recursive call 731: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-10-27 04:55:51,651 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 4 dim-2 vars, End of recursive call: 870 dim-0 vars, and 188 xjuncts. [2018-10-27 04:55:51,654 INFO L202 ElimStorePlain]: Needed 741 recursive calls to eliminate 11 variables, input treesize:336, output treesize:6536 [2018-10-27 04:55:53,832 WARN L854 $PredicateComparison]: unable to prove that (let ((.cse9 (= |c_main_write~$Pointer$_#value.base| c_main_~x~0.base)) (.cse13 (= |c_main_write~$Pointer$_#value.base| |c_main_write~$Pointer$_#ptr.base|)) (.cse7 (= |c_main_write~$Pointer$_#ptr.base| c_main_~x~0.base)) (.cse0 (= c_main_~x~0.offset |c_main_write~$Pointer$_#ptr.offset|))) (let ((.cse68 (not .cse0)) (.cse69 (not (bvsle (_ bv0 32) |c_main_write~$Pointer$_#value.offset|))) (.cse81 (bvsle |c_main_write~$Pointer$_#value.offset| (bvadd |c_main_write~$Pointer$_#value.offset| (_ bv4 32)))) (.cse6 (not .cse7)) (.cse4 (not .cse13)) (.cse5 (not .cse9))) (and (or .cse0 (forall ((v_prenex_274 (_ BitVec 32)) (v_prenex_273 (_ BitVec 32)) (v_prenex_70 (_ BitVec 32)) (v_arrayElimCell_493 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_70)) (= v_arrayElimCell_493 c_main_~x~0.base) (= v_arrayElimCell_493 v_prenex_273) (bvsle (bvadd v_prenex_70 (_ bv4 32)) (select (store |c_#length| v_prenex_273 v_prenex_274) v_arrayElimCell_493))))) (or .cse0 (forall ((v_prenex_681 (_ BitVec 32)) (v_prenex_680 (_ BitVec 32)) (v_arrayElimCell_248 (_ BitVec 32)) (v_prenex_679 (_ BitVec 32)) (v_prenex_678 (_ BitVec 32)) (v_prenex_677 (_ BitVec 32))) (let ((.cse2 (store |c_#length| v_prenex_681 v_prenex_679))) (let ((.cse1 (bvadd v_prenex_678 (_ bv4 32))) (.cse3 (select .cse2 v_arrayElimCell_248))) (or (bvsle .cse1 (select .cse2 v_prenex_677)) (bvsle .cse1 .cse3) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_248) (= v_prenex_677 v_prenex_681) (bvsle (bvadd v_prenex_680 (_ bv4 32)) .cse3) (= v_arrayElimCell_248 v_prenex_681) (not (bvsle (_ bv0 32) v_prenex_680)))))) .cse4 .cse5) (or .cse0 .cse6 (forall ((v_arrayElimCell_420 (_ BitVec 32)) (v_arrayElimCell_150 (_ BitVec 32)) (|v_main_#Ultimate.alloc_~size_5| (_ BitVec 32)) (v_prenex_2 (_ BitVec 32))) (or (= v_arrayElimCell_420 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_arrayElimCell_150)) (= v_arrayElimCell_420 v_prenex_2) (bvsle (bvadd v_arrayElimCell_150 (_ bv4 32)) (select (store |c_#length| v_prenex_2 |v_main_#Ultimate.alloc_~size_5|) v_arrayElimCell_420))))) (or .cse7 (forall ((v_arrayElimCell_623 (_ BitVec 32)) (v_prenex_59 (_ BitVec 32)) (v_prenex_574 (_ BitVec 32)) (v_prenex_573 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_59)) (= v_arrayElimCell_623 v_prenex_574) (bvsle (bvadd v_prenex_59 (_ bv4 32)) (select (store |c_#length| v_prenex_574 v_prenex_573) v_arrayElimCell_623))))) (or .cse0 .cse6 (forall ((v_arrayElimCell_634 (_ BitVec 32)) (v_prenex_317 (_ BitVec 32)) (v_prenex_316 (_ BitVec 32)) (v_prenex_315 (_ BitVec 32)) (v_prenex_314 (_ BitVec 32))) (let ((.cse8 (select (store |c_#length| v_prenex_314 v_prenex_316) v_arrayElimCell_634))) (or (not (bvsle (_ bv0 32) v_prenex_317)) (bvsle (bvadd v_prenex_315 (_ bv4 32)) .cse8) (= v_arrayElimCell_634 v_prenex_314) (bvsle (bvadd v_prenex_317 (_ bv4 32)) .cse8))))) (or .cse9 .cse0 (forall ((v_arrayElimCell_354 (_ BitVec 32)) (v_prenex_490 (_ BitVec 32)) (v_prenex_489 (_ BitVec 32)) (v_prenex_488 (_ BitVec 32)) (v_prenex_487 (_ BitVec 32))) (let ((.cse10 (select (store |c_#length| v_prenex_490 v_prenex_488) v_arrayElimCell_354))) (or (bvsle (bvadd v_prenex_489 (_ bv4 32)) .cse10) (= v_arrayElimCell_354 c_main_~x~0.base) (bvsle (bvadd v_prenex_487 (_ bv4 32)) .cse10) (not (bvsle (_ bv0 32) v_prenex_489)) (= v_arrayElimCell_354 v_prenex_490))))) (or .cse9 .cse0 (forall ((v_prenex_719 (_ BitVec 32)) (v_prenex_718 (_ BitVec 32)) (v_prenex_717 (_ BitVec 32)) (v_arrayElimCell_456 (_ BitVec 32)) (v_prenex_716 (_ BitVec 32))) (let ((.cse11 (select (store |c_#length| v_prenex_719 v_prenex_718) v_arrayElimCell_456))) (or (= v_arrayElimCell_456 v_prenex_719) (bvsle (bvadd v_prenex_716 (_ bv4 32)) .cse11) (not (bvsle (_ bv0 32) v_prenex_716)) (bvsle (bvadd v_prenex_717 (_ bv4 32)) .cse11))))) (or .cse0 .cse7 (forall ((v_arrayElimCell_589 (_ BitVec 32)) (v_prenex_219 (_ BitVec 32)) (v_prenex_218 (_ BitVec 32)) (v_prenex_217 (_ BitVec 32)) (v_prenex_216 (_ BitVec 32))) (let ((.cse12 (select (store |c_#length| v_prenex_217 v_prenex_219) v_arrayElimCell_589))) (or (not (bvsle (_ bv0 32) v_prenex_216)) (= v_arrayElimCell_589 c_main_~x~0.base) (= v_arrayElimCell_589 v_prenex_217) (bvsle (bvadd v_prenex_218 (_ bv4 32)) .cse12) (bvsle (bvadd v_prenex_216 (_ bv4 32)) .cse12))))) (or .cse0 .cse5 .cse13 (forall ((v_arrayElimCell_696 (_ BitVec 32)) (v_subst_2 (_ BitVec 32)) (v_arrayElimCell_118 (_ BitVec 32)) (v_prenex_168 (_ BitVec 32)) (v_prenex_167 (_ BitVec 32))) (let ((.cse14 (select (store |c_#length| v_prenex_168 v_prenex_167) v_arrayElimCell_696))) (or (= v_arrayElimCell_696 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_arrayElimCell_118)) (bvsle (bvadd v_arrayElimCell_118 (_ bv4 32)) .cse14) (= v_arrayElimCell_696 v_prenex_168) (bvsle (bvadd v_subst_2 (_ bv4 32)) .cse14))))) (or .cse0 .cse7 (forall ((v_prenex_280 (_ BitVec 32)) (v_prenex_279 (_ BitVec 32)) (v_arrayElimCell_471 (_ BitVec 32)) (v_arrayElimCell_163 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_arrayElimCell_163)) (= v_arrayElimCell_471 v_prenex_279) (bvsle (bvadd v_arrayElimCell_163 (_ bv4 32)) (select (store |c_#length| v_prenex_279 v_prenex_280) v_arrayElimCell_471)) (= v_arrayElimCell_471 c_main_~x~0.base)))) (or (forall ((v_prenex_486 (_ BitVec 32)) (v_prenex_485 (_ BitVec 32)) (v_arrayElimCell_683 (_ BitVec 32)) (v_prenex_484 (_ BitVec 32)) (v_prenex_14 (_ BitVec 32))) (let ((.cse15 (select (store |c_#length| v_prenex_486 v_prenex_485) v_arrayElimCell_683))) (or (bvsle (bvadd v_prenex_484 (_ bv4 32)) .cse15) (bvsle (bvadd v_prenex_14 (_ bv4 32)) .cse15) (not (bvsle (_ bv0 32) v_prenex_14)) (= v_arrayElimCell_683 c_main_~x~0.base) (= v_arrayElimCell_683 v_prenex_486)))) .cse7 .cse5) (or .cse0 (forall ((v_arrayElimCell_586 (_ BitVec 32)) (v_prenex_171 (_ BitVec 32)) (v_prenex_170 (_ BitVec 32)) (v_prenex_71 (_ BitVec 32)) (v_prenex_169 (_ BitVec 32))) (let ((.cse16 (select (store |c_#length| v_prenex_169 v_prenex_171) v_arrayElimCell_586))) (or (bvsle (bvadd v_prenex_71 (_ bv4 32)) .cse16) (= v_arrayElimCell_586 c_main_~x~0.base) (bvsle (bvadd v_prenex_170 (_ bv4 32)) .cse16) (= v_arrayElimCell_586 v_prenex_169) (not (bvsle (_ bv0 32) v_prenex_71)))))) (or .cse7 (forall ((v_prenex_581 (_ BitVec 32)) (v_prenex_580 (_ BitVec 32)) (v_arrayElimCell_687 (_ BitVec 32)) (v_prenex_19 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_19 (_ bv4 32)) (select (store |c_#length| v_prenex_581 v_prenex_580) v_arrayElimCell_687)) (= v_arrayElimCell_687 v_prenex_581) (not (bvsle (_ bv0 32) v_prenex_19))))) (or .cse0 .cse7 (forall ((v_arrayElimCell_629 (_ BitVec 32)) (v_prenex_499 (_ BitVec 32)) (v_prenex_498 (_ BitVec 32)) (v_prenex_497 (_ BitVec 32)) (v_prenex_496 (_ BitVec 32))) (let ((.cse17 (select (store |c_#length| v_prenex_498 v_prenex_497) v_arrayElimCell_629))) (or (bvsle (bvadd v_prenex_499 (_ bv4 32)) .cse17) (= v_arrayElimCell_629 v_prenex_498) (not (bvsle (_ bv0 32) v_prenex_499)) (bvsle (bvadd v_prenex_496 (_ bv4 32)) .cse17))))) (or (forall ((v_arrayElimCell_209 (_ BitVec 32)) (v_prenex_454 (_ BitVec 32)) (v_prenex_453 (_ BitVec 32)) (v_prenex_452 (_ BitVec 32))) (or (= v_arrayElimCell_209 v_prenex_453) (bvsle (bvadd v_prenex_454 (_ bv4 32)) (select (store |c_#length| v_prenex_453 v_prenex_452) v_arrayElimCell_209)) (not (bvsle (_ bv0 32) v_prenex_454)))) .cse0 .cse7) (or .cse9 .cse0 .cse6 (forall ((v_arrayElimCell_559 (_ BitVec 32)) (v_prenex_664 (_ BitVec 32)) (v_prenex_663 (_ BitVec 32)) (v_prenex_662 (_ BitVec 32))) (or (= v_arrayElimCell_559 v_prenex_664) (not (bvsle (_ bv0 32) v_prenex_663)) (= v_arrayElimCell_559 c_main_~x~0.base) (bvsle (bvadd v_prenex_663 (_ bv4 32)) (select (store |c_#length| v_prenex_664 v_prenex_662) v_arrayElimCell_559))))) (or .cse9 .cse0 .cse6 (forall ((v_arrayElimCell_399 (_ BitVec 32)) (v_prenex_656 (_ BitVec 32)) (v_prenex_655 (_ BitVec 32)) (v_prenex_654 (_ BitVec 32)) (v_prenex_653 (_ BitVec 32))) (let ((.cse18 (select (store |c_#length| v_prenex_655 v_prenex_654) v_arrayElimCell_399))) (or (bvsle (bvadd v_prenex_656 (_ bv4 32)) .cse18) (= v_arrayElimCell_399 v_prenex_655) (bvsle (bvadd v_prenex_653 (_ bv4 32)) .cse18) (= v_arrayElimCell_399 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_656)))))) (or .cse7 .cse5 (forall ((v_arrayElimCell_555 (_ BitVec 32)) (v_prenex_715 (_ BitVec 32)) (v_prenex_714 (_ BitVec 32)) (v_arrayElimCell_81 (_ BitVec 32))) (or (= v_arrayElimCell_555 v_prenex_715) (bvsle (bvadd v_arrayElimCell_81 (_ bv4 32)) (select (store |c_#length| v_prenex_715 v_prenex_714) v_arrayElimCell_555)) (not (bvsle (_ bv0 32) v_arrayElimCell_81)) (= v_arrayElimCell_555 c_main_~x~0.base)))) (or .cse0 .cse7 (forall ((v_prenex_362 (_ BitVec 32)) (v_prenex_361 (_ BitVec 32)) (v_arrayElimCell_102 (_ BitVec 32)) (v_prenex_360 (_ BitVec 32)) (v_prenex_359 (_ BitVec 32)) (v_prenex_159 (_ BitVec 32))) (let ((.cse23 (store |c_#length| v_prenex_359 v_prenex_362))) (let ((.cse19 (bvadd v_prenex_361 (_ bv4 32))) (.cse21 (select .cse23 v_prenex_159)) (.cse22 (bvadd v_arrayElimCell_102 (_ bv4 32))) (.cse20 (select .cse23 v_prenex_360))) (or (bvsle .cse19 .cse20) (bvsle .cse19 .cse21) (= v_prenex_159 c_main_~x~0.base) (= v_prenex_159 v_prenex_359) (bvsle .cse22 .cse21) (= v_prenex_360 v_prenex_359) (not (bvsle (_ bv0 32) v_arrayElimCell_102)) (bvsle .cse22 .cse20)))))) (or .cse0 .cse4 .cse5 (forall ((v_arrayElimCell_653 (_ BitVec 32)) (v_prenex_587 (_ BitVec 32)) (v_prenex_586 (_ BitVec 32)) (v_prenex_585 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_586 (_ bv4 32)) (select (store |c_#length| v_prenex_587 v_prenex_585) v_arrayElimCell_653)) (= v_arrayElimCell_653 v_prenex_587) (not (bvsle (_ bv0 32) v_prenex_586))))) (or .cse0 (forall ((v_prenex_252 (_ BitVec 32)) (v_prenex_251 (_ BitVec 32)) (v_prenex_39 (_ BitVec 32)) (v_arrayElimCell_373 (_ BitVec 32)) (v_prenex_253 (_ BitVec 32))) (let ((.cse24 (select (store |c_#length| v_prenex_251 v_prenex_253) v_arrayElimCell_373))) (or (= v_arrayElimCell_373 v_prenex_251) (bvsle (bvadd v_prenex_39 (_ bv4 32)) .cse24) (not (bvsle (_ bv0 32) v_prenex_39)) (bvsle (bvadd v_prenex_252 (_ bv4 32)) .cse24)))) .cse7) (or .cse7 (forall ((v_prenex_162 (_ BitVec 32)) (v_prenex_579 (_ BitVec 32)) (v_prenex_578 (_ BitVec 32)) (v_prenex_577 (_ BitVec 32)) (v_prenex_576 (_ BitVec 32)) (v_prenex_575 (_ BitVec 32))) (let ((.cse29 (store |c_#length| v_prenex_578 v_prenex_577))) (let ((.cse25 (bvadd v_prenex_576 (_ bv4 32))) (.cse26 (select .cse29 v_prenex_575)) (.cse28 (bvadd v_prenex_579 (_ bv4 32))) (.cse27 (select .cse29 v_prenex_162))) (or (bvsle .cse25 .cse26) (= v_prenex_162 c_main_~x~0.base) (bvsle .cse25 .cse27) (not (bvsle (_ bv0 32) v_prenex_579)) (bvsle .cse28 .cse26) (= v_prenex_575 v_prenex_578) (bvsle .cse28 .cse27) (= v_prenex_162 v_prenex_578)))))) (or .cse0 (forall ((v_prenex_72 (_ BitVec 32)) (v_prenex_365 (_ BitVec 32)) (v_arrayElimCell_186 (_ BitVec 32)) (v_prenex_364 (_ BitVec 32)) (v_prenex_363 (_ BitVec 32))) (let ((.cse30 (select (store |c_#length| v_prenex_363 v_prenex_365) v_arrayElimCell_186))) (or (= v_arrayElimCell_186 v_prenex_363) (bvsle (bvadd v_prenex_72 (_ bv4 32)) .cse30) (bvsle (bvadd v_prenex_364 (_ bv4 32)) .cse30) (not (bvsle (_ bv0 32) v_prenex_72))))) .cse7) (or .cse9 .cse0 (forall ((v_prenex_689 (_ BitVec 32)) (v_prenex_688 (_ BitVec 32)) (v_prenex_687 (_ BitVec 32)) (v_prenex_686 (_ BitVec 32)) (v_arrayElimCell_395 (_ BitVec 32))) (let ((.cse31 (select (store |c_#length| v_prenex_688 v_prenex_687) v_arrayElimCell_395))) (or (not (bvsle (_ bv0 32) v_prenex_689)) (= v_arrayElimCell_395 c_main_~x~0.base) (= v_arrayElimCell_395 v_prenex_688) (bvsle (bvadd v_prenex_686 (_ bv4 32)) .cse31) (bvsle (bvadd v_prenex_689 (_ bv4 32)) .cse31)))) .cse7) (or (forall ((v_arrayElimCell_613 (_ BitVec 32)) (v_prenex_668 (_ BitVec 32)) (v_prenex_667 (_ BitVec 32)) (v_prenex_666 (_ BitVec 32)) (v_prenex_665 (_ BitVec 32))) (let ((.cse32 (select (store |c_#length| v_prenex_668 v_prenex_666) v_arrayElimCell_613))) (or (bvsle (bvadd v_prenex_667 (_ bv4 32)) .cse32) (= v_arrayElimCell_613 v_prenex_668) (not (bvsle (_ bv0 32) v_prenex_667)) (bvsle (bvadd v_prenex_665 (_ bv4 32)) .cse32)))) .cse0 .cse5 .cse13) (or .cse0 .cse6 (forall ((v_prenex_780 (_ BitVec 32)) (v_prenex_779 (_ BitVec 32)) (v_prenex_782 (_ BitVec 32)) (v_prenex_781 (_ BitVec 32)) (v_arrayElimCell_397 (_ BitVec 32))) (let ((.cse33 (select (store |c_#length| v_prenex_782 v_prenex_781) v_arrayElimCell_397))) (or (= v_arrayElimCell_397 v_prenex_782) (not (bvsle (_ bv0 32) v_prenex_779)) (bvsle (bvadd v_prenex_779 (_ bv4 32)) .cse33) (bvsle (bvadd v_prenex_780 (_ bv4 32)) .cse33) (= v_arrayElimCell_397 c_main_~x~0.base))))) (or .cse0 .cse7 (forall ((v_arrayElimCell_390 (_ BitVec 32)) (v_prenex_546 (_ BitVec 32)) (v_prenex_545 (_ BitVec 32)) (v_prenex_544 (_ BitVec 32)) (v_prenex_543 (_ BitVec 32)) (v_prenex_542 (_ BitVec 32))) (let ((.cse38 (store |c_#length| v_prenex_545 v_prenex_544))) (let ((.cse34 (bvadd v_prenex_546 (_ bv4 32))) (.cse35 (select .cse38 v_arrayElimCell_390)) (.cse37 (bvadd v_prenex_543 (_ bv4 32))) (.cse36 (select .cse38 v_prenex_542))) (or (= v_prenex_542 v_prenex_545) (bvsle .cse34 .cse35) (= v_arrayElimCell_390 c_main_~x~0.base) (= v_arrayElimCell_390 v_prenex_545) (bvsle .cse34 .cse36) (bvsle .cse37 .cse35) (not (bvsle (_ bv0 32) v_prenex_546)) (bvsle .cse37 .cse36)))))) (or .cse0 .cse6 (forall ((v_prenex_197 (_ BitVec 32)) (v_prenex_196 (_ BitVec 32)) (v_arrayElimCell_582 (_ BitVec 32)) (v_prenex_199 (_ BitVec 32)) (v_prenex_198 (_ BitVec 32))) (let ((.cse39 (select (store |c_#length| v_prenex_197 v_prenex_199) v_arrayElimCell_582))) (or (= v_arrayElimCell_582 v_prenex_197) (bvsle (bvadd v_prenex_196 (_ bv4 32)) .cse39) (not (bvsle (_ bv0 32) v_prenex_196)) (bvsle (bvadd v_prenex_198 (_ bv4 32)) .cse39) (= v_arrayElimCell_582 c_main_~x~0.base))))) (or .cse0 .cse7 (forall ((v_arrayElimCell_585 (_ BitVec 32)) (v_prenex_696 (_ BitVec 32)) (v_prenex_695 (_ BitVec 32)) (v_prenex_694 (_ BitVec 32)) (v_prenex_693 (_ BitVec 32))) (let ((.cse40 (select (store |c_#length| v_prenex_696 v_prenex_694) v_arrayElimCell_585))) (or (bvsle (bvadd v_prenex_695 (_ bv4 32)) .cse40) (bvsle (bvadd v_prenex_693 (_ bv4 32)) .cse40) (not (bvsle (_ bv0 32) v_prenex_695)) (= v_arrayElimCell_585 c_main_~x~0.base) (= v_arrayElimCell_585 v_prenex_696))))) (or .cse0 .cse7 (forall ((v_prenex_439 (_ BitVec 32)) (v_prenex_438 (_ BitVec 32)) (v_prenex_437 (_ BitVec 32)) (v_prenex_68 (_ BitVec 32)) (v_arrayElimCell_551 (_ BitVec 32))) (let ((.cse41 (select (store |c_#length| v_prenex_439 v_prenex_438) v_arrayElimCell_551))) (or (bvsle (bvadd v_prenex_68 (_ bv4 32)) .cse41) (bvsle (bvadd v_prenex_437 (_ bv4 32)) .cse41) (= v_arrayElimCell_551 v_prenex_439) (not (bvsle (_ bv0 32) v_prenex_68)) (= v_arrayElimCell_551 c_main_~x~0.base))))) (or .cse0 .cse6 (forall ((v_arrayElimCell_401 (_ BitVec 32)) (v_prenex_479 (_ BitVec 32)) (v_prenex_478 (_ BitVec 32)) (v_prenex_477 (_ BitVec 32)) (v_prenex_476 (_ BitVec 32)) (v_prenex_475 (_ BitVec 32))) (let ((.cse46 (store |c_#length| v_prenex_478 v_prenex_477))) (let ((.cse42 (bvadd v_prenex_479 (_ bv4 32))) (.cse44 (select .cse46 v_arrayElimCell_401)) (.cse45 (bvadd v_prenex_476 (_ bv4 32))) (.cse43 (select .cse46 v_prenex_475))) (or (= v_prenex_475 v_prenex_478) (bvsle .cse42 .cse43) (bvsle .cse42 .cse44) (= v_arrayElimCell_401 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_479)) (bvsle .cse45 .cse44) (= v_arrayElimCell_401 v_prenex_478) (bvsle .cse45 .cse43)))))) (or .cse0 (forall ((v_arrayElimCell_497 (_ BitVec 32)) (v_prenex_571 (_ BitVec 32)) (v_prenex_570 (_ BitVec 32)) (v_prenex_572 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_571)) (= v_arrayElimCell_497 v_prenex_572) (bvsle (bvadd v_prenex_571 (_ bv4 32)) (select (store |c_#length| v_prenex_572 v_prenex_570) v_arrayElimCell_497)) (= v_arrayElimCell_497 c_main_~x~0.base))) .cse7) (or .cse7 (forall ((v_prenex_519 (_ BitVec 32)) (v_prenex_61 (_ BitVec 32)) (v_prenex_520 (_ BitVec 32)) (v_arrayElimCell_691 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_61 (_ bv4 32)) (select (store |c_#length| v_prenex_520 v_prenex_519) v_arrayElimCell_691)) (not (bvsle (_ bv0 32) v_prenex_61)) (= v_arrayElimCell_691 v_prenex_520) (= v_arrayElimCell_691 c_main_~x~0.base)))) (or .cse0 .cse6 (forall ((v_prenex_593 (_ BitVec 32)) (v_prenex_592 (_ BitVec 32)) (v_arrayElimCell_192 (_ BitVec 32)) (v_prenex_595 (_ BitVec 32)) (v_prenex_594 (_ BitVec 32))) (let ((.cse47 (select (store |c_#length| v_prenex_595 v_prenex_593) v_arrayElimCell_192))) (or (bvsle (bvadd v_prenex_594 (_ bv4 32)) .cse47) (bvsle (bvadd v_prenex_592 (_ bv4 32)) .cse47) (= v_arrayElimCell_192 v_prenex_595) (not (bvsle (_ bv0 32) v_prenex_594)))))) (or (forall ((v_arrayElimCell_322 (_ BitVec 32)) (v_arrayElimCell_78 (_ BitVec 32)) (v_prenex_699 (_ BitVec 32)) (v_prenex_698 (_ BitVec 32)) (v_prenex_697 (_ BitVec 32))) (let ((.cse48 (select (store |c_#length| v_prenex_699 v_prenex_698) v_arrayElimCell_322))) (or (bvsle (bvadd v_prenex_697 (_ bv4 32)) .cse48) (bvsle (bvadd v_arrayElimCell_78 (_ bv4 32)) .cse48) (= v_arrayElimCell_322 v_prenex_699) (not (bvsle (_ bv0 32) v_arrayElimCell_78))))) .cse7) (or (forall ((v_arrayElimCell_647 (_ BitVec 32)) (v_prenex_204 (_ BitVec 32)) (v_prenex_203 (_ BitVec 32)) (v_prenex_202 (_ BitVec 32)) (v_prenex_36 (_ BitVec 32))) (let ((.cse49 (select (store |c_#length| v_prenex_202 v_prenex_204) v_arrayElimCell_647))) (or (= v_arrayElimCell_647 v_prenex_202) (bvsle (bvadd v_prenex_203 (_ bv4 32)) .cse49) (= v_arrayElimCell_647 c_main_~x~0.base) (bvsle (bvadd v_prenex_36 (_ bv4 32)) .cse49) (not (bvsle (_ bv0 32) v_prenex_36))))) .cse0 .cse7) (or .cse0 .cse7 (forall ((v_prenex_461 (_ BitVec 32)) (v_prenex_460 (_ BitVec 32)) (v_arrayElimCell_512 (_ BitVec 32)) (v_prenex_459 (_ BitVec 32))) (or (= v_arrayElimCell_512 c_main_~x~0.base) (bvsle (bvadd v_prenex_460 (_ bv4 32)) (select (store |c_#length| v_prenex_461 v_prenex_459) v_arrayElimCell_512)) (= v_arrayElimCell_512 v_prenex_461) (not (bvsle (_ bv0 32) v_prenex_460))))) (or .cse0 .cse7 (forall ((v_prenex_609 (_ BitVec 32)) (v_prenex_608 (_ BitVec 32)) (v_arrayElimCell_212 (_ BitVec 32)) (v_prenex_610 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_610)) (bvsle (bvadd v_prenex_610 (_ bv4 32)) (select (store |c_#length| v_prenex_609 v_prenex_608) v_arrayElimCell_212)) (= v_arrayElimCell_212 v_prenex_609)))) (or .cse0 .cse6 (forall ((v_prenex_447 (_ BitVec 32)) (v_prenex_446 (_ BitVec 32)) (v_prenex_445 (_ BitVec 32)) (v_prenex_444 (_ BitVec 32)) (v_prenex_443 (_ BitVec 32)) (v_arrayElimCell_363 (_ BitVec 32))) (let ((.cse52 (store |c_#length| v_prenex_447 v_prenex_445))) (let ((.cse51 (bvadd v_prenex_446 (_ bv4 32))) (.cse50 (select .cse52 v_prenex_443))) (or (bvsle (bvadd v_prenex_444 (_ bv4 32)) .cse50) (= v_arrayElimCell_363 v_prenex_447) (= v_prenex_443 v_prenex_447) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_363) (bvsle .cse51 (select .cse52 v_arrayElimCell_363)) (not (bvsle (_ bv0 32) v_prenex_446)) (bvsle .cse51 .cse50))))) .cse5) (or .cse0 (forall ((v_prenex_536 (_ BitVec 32)) (v_prenex_535 (_ BitVec 32)) (v_prenex_534 (_ BitVec 32)) (v_arrayElimCell_660 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_535)) (= v_arrayElimCell_660 v_prenex_536) (bvsle (bvadd v_prenex_535 (_ bv4 32)) (select (store |c_#length| v_prenex_536 v_prenex_534) v_arrayElimCell_660)))) .cse5 .cse13) (or .cse0 (forall ((v_prenex_591 (_ BitVec 32)) (v_prenex_590 (_ BitVec 32)) (v_arrayElimCell_239 (_ BitVec 32)) (v_prenex_589 (_ BitVec 32)) (v_prenex_588 (_ BitVec 32))) (let ((.cse53 (select (store |c_#length| v_prenex_591 v_prenex_589) v_arrayElimCell_239))) (or (= v_arrayElimCell_239 c_main_~x~0.base) (bvsle (bvadd v_prenex_590 (_ bv4 32)) .cse53) (not (bvsle (_ bv0 32) v_prenex_590)) (= v_arrayElimCell_239 v_prenex_591) (bvsle (bvadd v_prenex_588 (_ bv4 32)) .cse53)))) .cse5 .cse13) (or .cse0 (forall ((v_arrayElimCell_532 (_ BitVec 32)) (v_prenex_539 (_ BitVec 32)) (v_prenex_538 (_ BitVec 32)) (v_prenex_537 (_ BitVec 32)) (v_prenex_541 (_ BitVec 32)) (v_prenex_540 (_ BitVec 32))) (let ((.cse54 (store |c_#length| v_prenex_541 v_prenex_539))) (or (not (bvsle (_ bv0 32) v_prenex_540)) (bvsle (bvadd v_prenex_538 (_ bv4 32)) (select .cse54 v_prenex_537)) (bvsle (bvadd v_prenex_540 (_ bv4 32)) (select .cse54 v_arrayElimCell_532)) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_532) (= v_arrayElimCell_532 v_prenex_541) (= v_prenex_537 v_prenex_541)))) .cse5) (or .cse9 .cse0 .cse7 (forall ((v_prenex_394 (_ BitVec 32)) (v_prenex_393 (_ BitVec 32)) (v_prenex_392 (_ BitVec 32)) (v_prenex_391 (_ BitVec 32)) (v_prenex_160 (_ BitVec 32))) (let ((.cse55 (select (store |c_#length| v_prenex_391 v_prenex_393) v_prenex_160))) (or (= v_prenex_160 c_main_~x~0.base) (bvsle (bvadd v_prenex_394 (_ bv4 32)) .cse55) (not (bvsle (_ bv0 32) v_prenex_394)) (bvsle (bvadd v_prenex_392 (_ bv4 32)) .cse55) (= v_prenex_160 v_prenex_391))))) (or .cse0 .cse7 (forall ((v_prenex_263 (_ BitVec 32)) (v_arrayElimCell_269 (_ BitVec 32)) (v_prenex_66 (_ BitVec 32)) (v_prenex_265 (_ BitVec 32)) (v_prenex_264 (_ BitVec 32))) (let ((.cse56 (select (store |c_#length| v_prenex_263 v_prenex_265) v_arrayElimCell_269))) (or (bvsle (bvadd v_prenex_264 (_ bv4 32)) .cse56) (not (bvsle (_ bv0 32) v_prenex_66)) (= v_arrayElimCell_269 v_prenex_263) (bvsle (bvadd v_prenex_66 (_ bv4 32)) .cse56))))) (or .cse7 (forall ((v_prenex_91 (_ BitVec 32)) (v_prenex_649 (_ BitVec 32)) (v_prenex_652 (_ BitVec 32)) (v_prenex_651 (_ BitVec 32)) (v_prenex_650 (_ BitVec 32))) (let ((.cse57 (select (store |c_#length| v_prenex_652 v_prenex_650) v_prenex_91))) (or (not (bvsle (_ bv0 32) v_prenex_651)) (= v_prenex_91 c_main_~x~0.base) (bvsle (bvadd v_prenex_649 (_ bv4 32)) .cse57) (bvsle (bvadd v_prenex_651 (_ bv4 32)) .cse57) (= v_prenex_91 v_prenex_652)))) .cse5) (or .cse7 (forall ((v_prenex_529 (_ BitVec 32)) (v_prenex_533 (_ BitVec 32)) (v_prenex_532 (_ BitVec 32)) (v_prenex_531 (_ BitVec 32)) (v_prenex_530 (_ BitVec 32)) (v_arrayElimCell_672 (_ BitVec 32))) (let ((.cse59 (store |c_#length| v_prenex_532 v_prenex_531))) (let ((.cse58 (bvadd v_prenex_533 (_ bv4 32))) (.cse60 (select .cse59 v_prenex_529))) (or (= v_prenex_529 v_prenex_532) (bvsle .cse58 (select .cse59 v_arrayElimCell_672)) (bvsle (bvadd v_prenex_530 (_ bv4 32)) .cse60) (not (bvsle (_ bv0 32) v_prenex_533)) (= v_arrayElimCell_672 v_prenex_532) (bvsle .cse58 .cse60) (= v_arrayElimCell_672 c_main_~x~0.base))))) .cse5) (or .cse0 .cse7 .cse5 (forall ((v_prenex_347 (_ BitVec 32)) (v_prenex_346 (_ BitVec 32)) (v_prenex_345 (_ BitVec 32)) (v_prenex_344 (_ BitVec 32)) (v_prenex_343 (_ BitVec 32)) (v_arrayElimCell_341 (_ BitVec 32))) (let ((.cse63 (store |c_#length| v_prenex_343 v_prenex_346))) (let ((.cse61 (bvadd v_prenex_347 (_ bv4 32))) (.cse62 (select .cse63 v_prenex_344))) (or (= v_arrayElimCell_341 v_prenex_343) (= v_arrayElimCell_341 c_main_~x~0.base) (bvsle .cse61 .cse62) (not (bvsle (_ bv0 32) v_prenex_347)) (bvsle .cse61 (select .cse63 v_arrayElimCell_341)) (bvsle (bvadd v_prenex_345 (_ bv4 32)) .cse62) (= v_prenex_344 v_prenex_343)))))) (or .cse0 (forall ((v_arrayElimCell_521 (_ BitVec 32)) (v_prenex_369 (_ BitVec 32)) (v_prenex_368 (_ BitVec 32)) (v_prenex_367 (_ BitVec 32)) (v_prenex_366 (_ BitVec 32))) (let ((.cse64 (select (store |c_#length| v_prenex_366 v_prenex_368) v_arrayElimCell_521))) (or (bvsle (bvadd v_prenex_369 (_ bv4 32)) .cse64) (not (bvsle (_ bv0 32) v_prenex_369)) (bvsle (bvadd v_prenex_367 (_ bv4 32)) .cse64) (= v_arrayElimCell_521 v_prenex_366) (= v_arrayElimCell_521 c_main_~x~0.base)))) .cse5 .cse13) (or .cse9 .cse0 (forall ((v_prenex_351 (_ BitVec 32)) (v_prenex_38 (_ BitVec 32)) (v_arrayElimCell_230 (_ BitVec 32)) (v_prenex_352 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_38)) (bvsle (bvadd v_prenex_38 (_ bv4 32)) (select (store |c_#length| v_prenex_351 v_prenex_352) v_arrayElimCell_230)) (= v_arrayElimCell_230 v_prenex_351) (= v_arrayElimCell_230 c_main_~x~0.base))) .cse7) (or .cse0 .cse6 (forall ((v_arrayElimCell_300 (_ BitVec 32)) (v_prenex_514 (_ BitVec 32)) (v_prenex_513 (_ BitVec 32)) (v_prenex_512 (_ BitVec 32))) (or (= v_arrayElimCell_300 v_prenex_514) (not (bvsle (_ bv0 32) v_prenex_513)) (bvsle (bvadd v_prenex_513 (_ bv4 32)) (select (store |c_#length| v_prenex_514 v_prenex_512) v_arrayElimCell_300))))) (or .cse7 .cse5 (forall ((v_prenex_21 (_ BitVec 32)) (v_prenex_759 (_ BitVec 32)) (v_arrayElimCell_336 (_ BitVec 32)) (v_prenex_758 (_ BitVec 32)) (v_prenex_760 (_ BitVec 32))) (let ((.cse65 (select (store |c_#length| v_prenex_760 v_prenex_759) v_arrayElimCell_336))) (or (not (bvsle (_ bv0 32) v_prenex_21)) (= v_arrayElimCell_336 c_main_~x~0.base) (= v_arrayElimCell_336 v_prenex_760) (bvsle (bvadd v_prenex_21 (_ bv4 32)) .cse65) (bvsle (bvadd v_prenex_758 (_ bv4 32)) .cse65))))) (or .cse0 (forall ((v_arrayElimCell_531 (_ BitVec 32)) (v_prenex_774 (_ BitVec 32)) (v_prenex_773 (_ BitVec 32)) (v_prenex_772 (_ BitVec 32)) (v_prenex_771 (_ BitVec 32)) (v_prenex_770 (_ BitVec 32))) (let ((.cse66 (store |c_#length| v_prenex_774 v_prenex_773))) (or (bvsle (bvadd v_prenex_772 (_ bv4 32)) (select .cse66 v_prenex_771)) (bvsle (bvadd v_prenex_770 (_ bv4 32)) (select .cse66 v_arrayElimCell_531)) (= v_arrayElimCell_531 v_prenex_774) (not (bvsle (_ bv0 32) v_prenex_770)) (= v_arrayElimCell_531 c_main_~x~0.base) (= v_prenex_771 v_prenex_774)))) .cse5 .cse13) (or .cse0 (forall ((v_prenex_629 (_ BitVec 32)) (v_prenex_628 (_ BitVec 32)) (v_arrayElimCell_638 (_ BitVec 32)) (v_prenex_46 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_46)) (= v_arrayElimCell_638 c_main_~x~0.base) (= v_arrayElimCell_638 v_prenex_629) (bvsle (bvadd v_prenex_46 (_ bv4 32)) (select (store |c_#length| v_prenex_629 v_prenex_628) v_arrayElimCell_638)))) .cse7) (or .cse9 .cse7 (forall ((v_prenex_471 (_ BitVec 32)) (v_prenex_470 (_ BitVec 32)) (v_prenex_10 (_ BitVec 32)) (v_prenex_469 (_ BitVec 32)) (v_arrayElimCell_254 (_ BitVec 32))) (let ((.cse67 (select (store |c_#length| v_prenex_471 v_prenex_470) v_arrayElimCell_254))) (or (bvsle (bvadd v_prenex_469 (_ bv4 32)) .cse67) (= v_arrayElimCell_254 v_prenex_471) (not (bvsle (_ bv0 32) v_prenex_10)) (bvsle (bvadd v_prenex_10 (_ bv4 32)) .cse67))))) (or .cse6 .cse68 (forall ((v_prenex_463 (_ BitVec 32)) (v_prenex_462 (_ BitVec 32))) (or (bvsle (bvadd |c_main_write~$Pointer$_#value.offset| (_ bv4 32)) (select (store |c_#length| v_prenex_463 v_prenex_462) |c_main_write~$Pointer$_#value.base|)) (= |c_main_write~$Pointer$_#value.base| v_prenex_463))) .cse69) (or .cse0 .cse5 .cse13 (forall ((v_arrayElimCell_222 (_ BitVec 32)) (v_prenex_40 (_ BitVec 32)) (v_prenex_422 (_ BitVec 32)) (v_prenex_421 (_ BitVec 32)) (v_prenex_420 (_ BitVec 32))) (let ((.cse70 (select (store |c_#length| v_prenex_422 v_prenex_421) v_arrayElimCell_222))) (or (bvsle (bvadd v_prenex_40 (_ bv4 32)) .cse70) (not (bvsle (_ bv0 32) v_prenex_40)) (= v_arrayElimCell_222 v_prenex_422) (= v_arrayElimCell_222 c_main_~x~0.base) (bvsle (bvadd v_prenex_420 (_ bv4 32)) .cse70))))) (or .cse9 (forall ((v_prenex_9 (_ BitVec 32)) (v_arrayElimCell_218 (_ BitVec 32)) (v_prenex_501 (_ BitVec 32)) (v_prenex_500 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_9)) (= v_arrayElimCell_218 c_main_~x~0.base) (bvsle (bvadd v_prenex_9 (_ bv4 32)) (select (store |c_#length| v_prenex_501 v_prenex_500) v_arrayElimCell_218)) (= v_arrayElimCell_218 v_prenex_501))) .cse7) (or .cse9 .cse0 .cse6 (forall ((v_prenex_54 (_ BitVec 32)) (v_arrayElimCell_547 (_ BitVec 32)) (v_prenex_388 (_ BitVec 32)) (v_prenex_387 (_ BitVec 32)) (v_prenex_386 (_ BitVec 32))) (let ((.cse71 (select (store |c_#length| v_prenex_386 v_prenex_388) v_arrayElimCell_547))) (or (= v_arrayElimCell_547 c_main_~x~0.base) (= v_arrayElimCell_547 v_prenex_386) (bvsle (bvadd v_prenex_54 (_ bv4 32)) .cse71) (bvsle (bvadd v_prenex_387 (_ bv4 32)) .cse71) (not (bvsle (_ bv0 32) v_prenex_54)))))) (or (forall ((v_arrayElimCell_277 (_ BitVec 32)) (v_prenex_639 (_ BitVec 32)) (v_prenex_76 (_ BitVec 32)) (v_prenex_638 (_ BitVec 32)) (v_prenex_637 (_ BitVec 32))) (let ((.cse72 (select (store |c_#length| v_prenex_639 v_prenex_638) v_arrayElimCell_277))) (or (bvsle (bvadd v_prenex_76 (_ bv4 32)) .cse72) (= v_arrayElimCell_277 v_prenex_639) (bvsle (bvadd v_prenex_637 (_ bv4 32)) .cse72) (not (bvsle (_ bv0 32) v_prenex_76))))) .cse0 .cse7) (or .cse7 (forall ((v_prenex_565 (_ BitVec 32)) (v_prenex_564 (_ BitVec 32)) (v_prenex_563 (_ BitVec 32)) (v_prenex_562 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_563)) (= v_prenex_562 v_prenex_565) (bvsle (bvadd v_prenex_563 (_ bv4 32)) (select (store |c_#length| v_prenex_565 v_prenex_564) v_prenex_562))))) (or .cse0 (forall ((v_arrayElimCell_702 (_ BitVec 32)) (v_prenex_426 (_ BitVec 32)) (v_prenex_425 (_ BitVec 32)) (v_prenex_424 (_ BitVec 32)) (v_prenex_423 (_ BitVec 32))) (let ((.cse73 (select (store |c_#length| v_prenex_425 v_prenex_424) v_arrayElimCell_702))) (or (bvsle (bvadd v_prenex_426 (_ bv4 32)) .cse73) (bvsle (bvadd v_prenex_423 (_ bv4 32)) .cse73) (= v_arrayElimCell_702 v_prenex_425) (not (bvsle (_ bv0 32) v_prenex_426)) (= v_arrayElimCell_702 c_main_~x~0.base)))) .cse4 .cse5) (or .cse0 .cse7 (forall ((v_arrayElimCell_344 (_ BitVec 32)) (v_prenex_328 (_ BitVec 32)) (v_prenex_327 (_ BitVec 32)) (v_prenex_326 (_ BitVec 32)) (v_prenex_325 (_ BitVec 32))) (let ((.cse74 (select (store |c_#length| v_prenex_325 v_prenex_327) v_arrayElimCell_344))) (or (= v_arrayElimCell_344 c_main_~x~0.base) (bvsle (bvadd v_prenex_328 (_ bv4 32)) .cse74) (bvsle (bvadd v_prenex_326 (_ bv4 32)) .cse74) (not (bvsle (_ bv0 32) v_prenex_328)) (= v_arrayElimCell_344 v_prenex_325))))) (or .cse9 .cse0 (forall ((v_prenex_607 (_ BitVec 32)) (v_prenex_606 (_ BitVec 32)) (v_prenex_605 (_ BitVec 32)) (v_arrayElimCell_347 (_ BitVec 32)) (v_prenex_604 (_ BitVec 32))) (let ((.cse75 (select (store |c_#length| v_prenex_607 v_prenex_605) v_arrayElimCell_347))) (or (bvsle (bvadd v_prenex_604 (_ bv4 32)) .cse75) (= v_arrayElimCell_347 v_prenex_607) (= v_arrayElimCell_347 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_606)) (bvsle (bvadd v_prenex_606 (_ bv4 32)) .cse75)))) .cse7) (or (forall ((v_arrayElimCell_387 (_ BitVec 32)) (v_prenex_518 (_ BitVec 32)) (v_prenex_517 (_ BitVec 32)) (v_prenex_516 (_ BitVec 32)) (v_prenex_515 (_ BitVec 32))) (let ((.cse76 (select (store |c_#length| v_prenex_517 v_prenex_516) v_arrayElimCell_387))) (or (bvsle (bvadd v_prenex_518 (_ bv4 32)) .cse76) (not (bvsle (_ bv0 32) v_prenex_518)) (bvsle (bvadd v_prenex_515 (_ bv4 32)) .cse76) (= v_arrayElimCell_387 c_main_~x~0.base) (= v_arrayElimCell_387 v_prenex_517)))) .cse0 .cse7) (or .cse0 (forall ((v_arrayElimCell_574 (_ BitVec 32)) (v_prenex_186 (_ BitVec 32)) (v_prenex_185 (_ BitVec 32)) (v_prenex_184 (_ BitVec 32)) (v_arrayElimCell_117 (_ BitVec 32))) (let ((.cse77 (select (store |c_#length| v_prenex_185 v_prenex_184) v_arrayElimCell_574))) (or (bvsle (bvadd v_arrayElimCell_117 (_ bv4 32)) .cse77) (= v_arrayElimCell_574 v_prenex_185) (not (bvsle (_ bv0 32) v_arrayElimCell_117)) (bvsle (bvadd v_prenex_186 (_ bv4 32)) .cse77)))) .cse5 .cse13) (or .cse7 (forall ((v_arrayElimCell_134 (_ BitVec 32)) (v_arrayElimCell_501 (_ BitVec 32)) (v_prenex_658 (_ BitVec 32)) (v_prenex_657 (_ BitVec 32))) (or (= v_arrayElimCell_501 v_prenex_658) (not (bvsle (_ bv0 32) v_arrayElimCell_134)) (bvsle (bvadd v_arrayElimCell_134 (_ bv4 32)) (select (store |c_#length| v_prenex_658 v_prenex_657) v_arrayElimCell_501)) (= v_arrayElimCell_501 c_main_~x~0.base)))) (or .cse0 .cse7 (forall ((v_arrayElimCell_189 (_ BitVec 32)) (v_prenex_713 (_ BitVec 32)) (v_prenex_712 (_ BitVec 32)) (v_prenex_711 (_ BitVec 32)) (v_prenex_710 (_ BitVec 32))) (let ((.cse78 (select (store |c_#length| v_prenex_713 v_prenex_712) v_arrayElimCell_189))) (or (not (bvsle (_ bv0 32) v_prenex_710)) (= v_arrayElimCell_189 v_prenex_713) (bvsle (bvadd v_prenex_710 (_ bv4 32)) .cse78) (bvsle (bvadd v_prenex_711 (_ bv4 32)) .cse78))))) (or .cse0 .cse7 (forall ((v_prenex_31 (_ BitVec 32)) (v_prenex_335 (_ BitVec 32)) (v_prenex_334 (_ BitVec 32)) (v_arrayElimCell_287 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_31 (_ bv4 32)) (select (store |c_#length| v_prenex_334 v_prenex_335) v_arrayElimCell_287)) (not (bvsle (_ bv0 32) v_prenex_31)) (= v_arrayElimCell_287 v_prenex_334) (= v_arrayElimCell_287 c_main_~x~0.base)))) (or (forall ((v_prenex_269 (_ BitVec 32)) (v_prenex_268 (_ BitVec 32)) (v_prenex_267 (_ BitVec 32)) (v_prenex_266 (_ BitVec 32))) (or (= v_prenex_267 v_prenex_266) (not (bvsle (_ bv0 32) v_prenex_268)) (bvsle (bvadd v_prenex_268 (_ bv4 32)) (select (store |c_#length| v_prenex_266 v_prenex_269) v_prenex_267)))) .cse5) (or .cse9 (forall ((v_arrayElimCell_675 (_ BitVec 32)) (v_prenex_468 (_ BitVec 32)) (v_prenex_467 (_ BitVec 32)) (v_prenex_466 (_ BitVec 32)) (v_arrayElimCell_91 (_ BitVec 32))) (let ((.cse79 (select (store |c_#length| v_prenex_468 v_prenex_467) v_arrayElimCell_675))) (or (bvsle (bvadd v_prenex_466 (_ bv4 32)) .cse79) (not (bvsle (_ bv0 32) v_arrayElimCell_91)) (= v_arrayElimCell_675 v_prenex_468) (= v_arrayElimCell_675 c_main_~x~0.base) (bvsle (bvadd v_arrayElimCell_91 (_ bv4 32)) .cse79)))) .cse7) (or .cse7 (forall ((v_prenex_319 (_ BitVec 32)) (v_prenex_318 (_ BitVec 32)) (v_prenex_16 (_ BitVec 32)) (v_prenex_320 (_ BitVec 32)) (v_prenex_143 (_ BitVec 32))) (let ((.cse80 (select (store |c_#length| v_prenex_318 v_prenex_320) v_prenex_143))) (or (= v_prenex_143 v_prenex_318) (bvsle (bvadd v_prenex_16 (_ bv4 32)) .cse80) (bvsle (bvadd v_prenex_319 (_ bv4 32)) .cse80) (= v_prenex_143 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_16)))))) (or .cse9 .cse6 .cse68 .cse81) (or .cse9 .cse0 .cse6 (forall ((v_arrayElimCell_479 (_ BitVec 32)) (v_prenex_378 (_ BitVec 32)) (v_prenex_377 (_ BitVec 32)) (v_prenex_376 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_378 (_ bv4 32)) (select (store |c_#length| v_prenex_376 v_prenex_377) v_arrayElimCell_479)) (= v_arrayElimCell_479 c_main_~x~0.base) (= v_arrayElimCell_479 v_prenex_376) (not (bvsle (_ bv0 32) v_prenex_378))))) (or .cse9 .cse0 .cse7 (forall ((v_arrayElimCell_578 (_ BitVec 32)) (v_prenex_329 (_ BitVec 32)) (v_prenex_35 (_ BitVec 32)) (v_prenex_330 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_35 (_ bv4 32)) (select (store |c_#length| v_prenex_329 v_prenex_330) v_arrayElimCell_578)) (= v_arrayElimCell_578 v_prenex_329) (not (bvsle (_ bv0 32) v_prenex_35)) (= v_arrayElimCell_578 c_main_~x~0.base)))) (or .cse9 .cse0 (forall ((v_arrayElimCell_410 (_ BitVec 32)) (v_prenex_309 (_ BitVec 32)) (v_prenex_308 (_ BitVec 32)) (v_prenex_307 (_ BitVec 32)) (v_prenex_306 (_ BitVec 32))) (let ((.cse82 (select (store |c_#length| v_prenex_306 v_prenex_308) v_arrayElimCell_410))) (or (bvsle (bvadd v_prenex_307 (_ bv4 32)) .cse82) (= v_arrayElimCell_410 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_309)) (= v_arrayElimCell_410 v_prenex_306) (bvsle (bvadd v_prenex_309 (_ bv4 32)) .cse82)))) .cse7) (or .cse0 .cse6 (forall ((v_arrayElimCell_365 (_ BitVec 32)) (v_prenex_262 (_ BitVec 32)) (v_prenex_42 (_ BitVec 32)) (v_prenex_261 (_ BitVec 32)) (v_prenex_260 (_ BitVec 32))) (let ((.cse83 (select (store |c_#length| v_prenex_260 v_prenex_262) v_arrayElimCell_365))) (or (= v_arrayElimCell_365 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_42)) (bvsle (bvadd v_prenex_42 (_ bv4 32)) .cse83) (bvsle (bvadd v_prenex_261 (_ bv4 32)) .cse83) (= v_arrayElimCell_365 v_prenex_260))))) (or .cse0 (forall ((v_arrayElimCell_288 (_ BitVec 32)) (v_prenex_402 (_ BitVec 32)) (v_prenex_401 (_ BitVec 32)) (v_prenex_400 (_ BitVec 32))) (or (= v_arrayElimCell_288 v_prenex_400) (not (bvsle (_ bv0 32) v_prenex_402)) (bvsle (bvadd v_prenex_402 (_ bv4 32)) (select (store |c_#length| v_prenex_400 v_prenex_401) v_arrayElimCell_288)) (= v_arrayElimCell_288 c_main_~x~0.base)))) (or .cse0 .cse7 (forall ((v_arrayElimCell_404 (_ BitVec 32)) (v_prenex_569 (_ BitVec 32)) (v_prenex_568 (_ BitVec 32)) (v_prenex_567 (_ BitVec 32)) (v_prenex_566 (_ BitVec 32))) (let ((.cse84 (select (store |c_#length| v_prenex_568 v_prenex_567) v_arrayElimCell_404))) (or (= v_arrayElimCell_404 v_prenex_568) (bvsle (bvadd v_prenex_569 (_ bv4 32)) .cse84) (= v_arrayElimCell_404 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_569)) (bvsle (bvadd v_prenex_566 (_ bv4 32)) .cse84))))) (or (forall ((v_prenex_294 (_ BitVec 32)) (v_prenex_293 (_ BitVec 32)) (v_prenex_292 (_ BitVec 32)) (v_prenex_291 (_ BitVec 32)) (v_prenex_290 (_ BitVec 32)) (v_prenex_116 (_ BitVec 32))) (let ((.cse89 (store |c_#length| v_prenex_290 v_prenex_293))) (let ((.cse85 (bvadd v_prenex_292 (_ bv4 32))) (.cse88 (select .cse89 v_prenex_291)) (.cse87 (bvadd v_prenex_294 (_ bv4 32))) (.cse86 (select .cse89 v_prenex_116))) (or (not (bvsle (_ bv0 32) v_prenex_294)) (= v_prenex_291 v_prenex_290) (bvsle .cse85 .cse86) (= v_prenex_116 v_prenex_290) (bvsle .cse87 .cse88) (= v_prenex_116 c_main_~x~0.base) (bvsle .cse85 .cse88) (bvsle .cse87 .cse86))))) .cse0 .cse7) (or .cse0 .cse7 (forall ((v_prenex_528 (_ BitVec 32)) (v_prenex_527 (_ BitVec 32)) (v_prenex_526 (_ BitVec 32)) (v_arrayElimCell_284 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_527)) (= v_arrayElimCell_284 c_main_~x~0.base) (= v_arrayElimCell_284 v_prenex_528) (bvsle (bvadd v_prenex_527 (_ bv4 32)) (select (store |c_#length| v_prenex_528 v_prenex_526) v_arrayElimCell_284))))) (or .cse0 .cse7 (forall ((v_arrayElimCell_146 (_ BitVec 32)) (v_arrayElimCell_326 (_ BitVec 32)) (v_prenex_337 (_ BitVec 32)) (v_prenex_336 (_ BitVec 32))) (or (= v_arrayElimCell_326 c_main_~x~0.base) (bvsle (bvadd v_arrayElimCell_146 (_ bv4 32)) (select (store |c_#length| v_prenex_336 v_prenex_337) v_arrayElimCell_326)) (= v_arrayElimCell_326 v_prenex_336) (not (bvsle (_ bv0 32) v_arrayElimCell_146))))) (or .cse9 .cse0 (forall ((v_prenex_483 (_ BitVec 32)) (v_prenex_482 (_ BitVec 32)) (v_prenex_481 (_ BitVec 32)) (v_arrayElimCell_544 (_ BitVec 32)) (v_prenex_480 (_ BitVec 32))) (let ((.cse90 (select (store |c_#length| v_prenex_483 v_prenex_481) v_arrayElimCell_544))) (or (= v_arrayElimCell_544 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_482)) (= v_arrayElimCell_544 v_prenex_483) (bvsle (bvadd v_prenex_480 (_ bv4 32)) .cse90) (bvsle (bvadd v_prenex_482 (_ bv4 32)) .cse90))))) (or .cse0 .cse7 (forall ((v_prenex_305 (_ BitVec 32)) (v_prenex_304 (_ BitVec 32)) (v_arrayElimCell_608 (_ BitVec 32)) (v_prenex_67 (_ BitVec 32))) (or (= v_arrayElimCell_608 v_prenex_304) (bvsle (bvadd v_prenex_67 (_ bv4 32)) (select (store |c_#length| v_prenex_304 v_prenex_305) v_arrayElimCell_608)) (= v_arrayElimCell_608 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_67))))) (or (forall ((v_prenex_442 (_ BitVec 32)) (v_arrayElimCell_494 (_ BitVec 32)) (v_prenex_441 (_ BitVec 32)) (v_prenex_440 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_441 (_ bv4 32)) (select (store |c_#length| v_prenex_442 v_prenex_440) v_arrayElimCell_494)) (= v_arrayElimCell_494 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_441)) (= v_arrayElimCell_494 v_prenex_442))) .cse0 .cse7) (or .cse0 .cse7 (forall ((v_prenex_51 (_ BitVec 32)) (v_prenex_181 (_ BitVec 32)) (v_prenex_180 (_ BitVec 32)) (v_prenex_179 (_ BitVec 32)) (v_arrayElimCell_570 (_ BitVec 32))) (let ((.cse91 (select (store |c_#length| v_prenex_180 v_prenex_179) v_arrayElimCell_570))) (or (= v_arrayElimCell_570 v_prenex_180) (bvsle (bvadd v_prenex_181 (_ bv4 32)) .cse91) (bvsle (bvadd v_prenex_51 (_ bv4 32)) .cse91) (= v_arrayElimCell_570 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_51)))))) (or .cse0 (forall ((v_prenex_619 (_ BitVec 32)) (v_prenex_618 (_ BitVec 32)) (v_arrayElimCell_643 (_ BitVec 32)) (v_prenex_617 (_ BitVec 32)) (v_prenex_620 (_ BitVec 32))) (let ((.cse92 (select (store |c_#length| v_prenex_620 v_prenex_618) v_arrayElimCell_643))) (or (not (bvsle (_ bv0 32) v_prenex_619)) (bvsle (bvadd v_prenex_619 (_ bv4 32)) .cse92) (bvsle (bvadd v_prenex_617 (_ bv4 32)) .cse92) (= v_arrayElimCell_643 v_prenex_620) (= v_arrayElimCell_643 c_main_~x~0.base))))) (or .cse0 .cse5 (forall ((v_prenex_778 (_ BitVec 32)) (v_prenex_777 (_ BitVec 32)) (v_prenex_776 (_ BitVec 32)) (v_prenex_775 (_ BitVec 32)) (v_arrayElimCell_240 (_ BitVec 32))) (let ((.cse93 (select (store |c_#length| v_prenex_778 v_prenex_777) v_arrayElimCell_240))) (or (bvsle (bvadd v_prenex_776 (_ bv4 32)) .cse93) (bvsle (bvadd v_prenex_775 (_ bv4 32)) .cse93) (not (bvsle (_ bv0 32) v_prenex_775)) (= v_arrayElimCell_240 v_prenex_778) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_240))))) (or .cse0 (forall ((v_arrayElimCell_208 (_ BitVec 32)) (v_prenex_333 (_ BitVec 32)) (v_prenex_332 (_ BitVec 32)) (v_prenex_331 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_333)) (bvsle (bvadd v_prenex_333 (_ bv4 32)) (select (store |c_#length| v_prenex_331 v_prenex_332) v_arrayElimCell_208)) (= v_arrayElimCell_208 v_prenex_331)))) (or .cse0 .cse5 (forall ((v_prenex_230 (_ BitVec 32)) (v_subst_3 (_ BitVec 32)) (v_arrayElimCell_524 (_ BitVec 32)) (v_prenex_229 (_ BitVec 32)) (v_prenex_228 (_ BitVec 32)) (v_prenex_227 (_ BitVec 32))) (let ((.cse94 (store |c_#length| v_prenex_227 v_prenex_230))) (or (not (bvsle (_ bv0 32) v_prenex_228)) (= v_subst_3 v_prenex_227) (bvsle (bvadd v_prenex_229 (_ bv4 32)) (select .cse94 v_subst_3)) (= v_arrayElimCell_524 v_prenex_227) (bvsle (bvadd v_prenex_228 (_ bv4 32)) (select .cse94 v_arrayElimCell_524)) (= v_arrayElimCell_524 c_main_~x~0.base)))) .cse13) (or (forall ((v_prenex_723 (_ BitVec 32)) (v_prenex_722 (_ BitVec 32)) (v_prenex_721 (_ BitVec 32)) (v_prenex_720 (_ BitVec 32)) (v_arrayElimCell_619 (_ BitVec 32))) (let ((.cse95 (select (store |c_#length| v_prenex_723 v_prenex_722) v_arrayElimCell_619))) (or (bvsle (bvadd v_prenex_721 (_ bv4 32)) .cse95) (bvsle (bvadd v_prenex_720 (_ bv4 32)) .cse95) (= v_arrayElimCell_619 v_prenex_723) (not (bvsle (_ bv0 32) v_prenex_720))))) .cse0 .cse4 .cse5) (or .cse9 .cse0 .cse7 (forall ((v_prenex_509 (_ BitVec 32)) (v_arrayElimCell_258 (_ BitVec 32)) (v_prenex_50 (_ BitVec 32)) (v_prenex_511 (_ BitVec 32)) (v_prenex_510 (_ BitVec 32))) (let ((.cse96 (select (store |c_#length| v_prenex_511 v_prenex_510) v_arrayElimCell_258))) (or (bvsle (bvadd v_prenex_50 (_ bv4 32)) .cse96) (= v_arrayElimCell_258 v_prenex_511) (= v_arrayElimCell_258 c_main_~x~0.base) (bvsle (bvadd v_prenex_509 (_ bv4 32)) .cse96) (not (bvsle (_ bv0 32) v_prenex_50)))))) (or .cse0 (forall ((v_prenex_358 (_ BitVec 32)) (v_prenex_357 (_ BitVec 32)) (v_arrayElimCell_628 (_ BitVec 32)) (v_prenex_356 (_ BitVec 32)) (v_prenex_355 (_ BitVec 32))) (let ((.cse97 (select (store |c_#length| v_prenex_355 v_prenex_357) v_arrayElimCell_628))) (or (not (bvsle (_ bv0 32) v_prenex_358)) (bvsle (bvadd v_prenex_356 (_ bv4 32)) .cse97) (= v_arrayElimCell_628 v_prenex_355) (bvsle (bvadd v_prenex_358 (_ bv4 32)) .cse97))))) (or .cse0 (forall ((v_prenex_670 (_ BitVec 32)) (v_arrayElimCell_358 (_ BitVec 32)) (v_prenex_669 (_ BitVec 32)) (v_prenex_673 (_ BitVec 32)) (v_prenex_672 (_ BitVec 32)) (v_prenex_671 (_ BitVec 32))) (let ((.cse100 (store |c_#length| v_prenex_673 v_prenex_671))) (let ((.cse98 (bvadd v_prenex_672 (_ bv4 32))) (.cse99 (select .cse100 v_prenex_669))) (or (= v_prenex_669 v_prenex_673) (bvsle .cse98 .cse99) (= v_arrayElimCell_358 c_main_~x~0.base) (bvsle .cse98 (select .cse100 v_arrayElimCell_358)) (bvsle (bvadd v_prenex_670 (_ bv4 32)) .cse99) (= v_arrayElimCell_358 v_prenex_673) (not (bvsle (_ bv0 32) v_prenex_672)))))) .cse5 .cse13) (or .cse9 (forall ((v_arrayElimCell_355 (_ BitVec 32)) (v_prenex_313 (_ BitVec 32)) (v_prenex_312 (_ BitVec 32)) (v_prenex_311 (_ BitVec 32)) (v_prenex_310 (_ BitVec 32))) (let ((.cse101 (select (store |c_#length| v_prenex_310 v_prenex_312) v_arrayElimCell_355))) (or (= v_arrayElimCell_355 v_prenex_310) (not (bvsle (_ bv0 32) v_prenex_313)) (bvsle (bvadd v_prenex_313 (_ bv4 32)) .cse101) (= v_arrayElimCell_355 c_main_~x~0.base) (bvsle (bvadd v_prenex_311 (_ bv4 32)) .cse101)))) .cse0 .cse7) (or .cse0 .cse5 (forall ((v_prenex_749 (_ BitVec 32)) (v_prenex_748 (_ BitVec 32)) (v_arrayElimCell_656 (_ BitVec 32)) (v_prenex_750 (_ BitVec 32))) (or (= v_arrayElimCell_656 v_prenex_750) (bvsle (bvadd v_prenex_748 (_ bv4 32)) (select (store |c_#length| v_prenex_750 v_prenex_749) v_arrayElimCell_656)) (not (bvsle (_ bv0 32) v_prenex_748))))) (or .cse0 .cse6 (forall ((v_prenex_613 (_ BitVec 32)) (v_prenex_612 (_ BitVec 32)) (v_prenex_611 (_ BitVec 32)) (v_arrayElimCell_281 (_ BitVec 32))) (or (= v_arrayElimCell_281 v_prenex_613) (not (bvsle (_ bv0 32) v_prenex_612)) (bvsle (bvadd v_prenex_612 (_ bv4 32)) (select (store |c_#length| v_prenex_613 v_prenex_611) v_arrayElimCell_281)) (= v_arrayElimCell_281 c_main_~x~0.base)))) (or .cse9 .cse6 .cse68 .cse69 (forall ((v_prenex_178 (_ BitVec 32)) (v_prenex_177 (_ BitVec 32))) (or (bvsle (bvadd |c_main_write~$Pointer$_#value.offset| (_ bv4 32)) (select (store |c_#length| v_prenex_178 v_prenex_177) |c_main_write~$Pointer$_#value.base|)) (= |c_main_write~$Pointer$_#value.base| v_prenex_178)))) (or .cse9 (forall ((v_arrayElimCell_516 (_ BitVec 32)) (v_prenex_289 (_ BitVec 32)) (v_prenex_288 (_ BitVec 32)) (v_prenex_287 (_ BitVec 32)) (v_prenex_13 (_ BitVec 32))) (let ((.cse102 (select (store |c_#length| v_prenex_287 v_prenex_289) v_arrayElimCell_516))) (or (bvsle (bvadd v_prenex_13 (_ bv4 32)) .cse102) (= v_arrayElimCell_516 c_main_~x~0.base) (bvsle (bvadd v_prenex_288 (_ bv4 32)) .cse102) (= v_arrayElimCell_516 v_prenex_287) (not (bvsle (_ bv0 32) v_prenex_13))))) .cse7) (or (forall ((v_prenex_390 (_ BitVec 32)) (v_arrayElimCell_668 (_ BitVec 32)) (v_prenex_389 (_ BitVec 32)) (v_arrayElimCell_110 (_ BitVec 32))) (or (= v_arrayElimCell_668 c_main_~x~0.base) (= v_arrayElimCell_668 v_prenex_389) (not (bvsle (_ bv0 32) v_arrayElimCell_110)) (bvsle (bvadd v_arrayElimCell_110 (_ bv4 32)) (select (store |c_#length| v_prenex_389 v_prenex_390) v_arrayElimCell_668)))) .cse0 .cse5 .cse13) (or (forall ((v_prenex_409 (_ BitVec 32)) (v_prenex_408 (_ BitVec 32)) (v_arrayElimCell_381 (_ BitVec 32)) (v_prenex_410 (_ BitVec 32)) (v_prenex_22 (_ BitVec 32))) (let ((.cse103 (select (store |c_#length| v_prenex_408 v_prenex_410) v_arrayElimCell_381))) (or (= v_arrayElimCell_381 c_main_~x~0.base) (bvsle (bvadd v_prenex_409 (_ bv4 32)) .cse103) (= v_arrayElimCell_381 v_prenex_408) (bvsle (bvadd v_prenex_22 (_ bv4 32)) .cse103) (not (bvsle (_ bv0 32) v_prenex_22))))) .cse7) (or .cse0 (forall ((v_arrayElimCell_157 (_ BitVec 32)) (v_arrayElimCell_369 (_ BitVec 32)) (v_prenex_255 (_ BitVec 32)) (v_prenex_254 (_ BitVec 32))) (or (= v_arrayElimCell_369 v_prenex_254) (not (bvsle (_ bv0 32) v_arrayElimCell_157)) (= v_arrayElimCell_369 c_main_~x~0.base) (bvsle (bvadd v_arrayElimCell_157 (_ bv4 32)) (select (store |c_#length| v_prenex_254 v_prenex_255) v_arrayElimCell_369)))) .cse7) (or .cse0 .cse7 (forall ((v_prenex_685 (_ BitVec 32)) (v_arrayElimCell_350 (_ BitVec 32)) (v_prenex_684 (_ BitVec 32)) (v_prenex_683 (_ BitVec 32)) (v_prenex_682 (_ BitVec 32))) (let ((.cse104 (select (store |c_#length| v_prenex_685 v_prenex_683) v_arrayElimCell_350))) (or (bvsle (bvadd v_prenex_684 (_ bv4 32)) .cse104) (= v_arrayElimCell_350 v_prenex_685) (bvsle (bvadd v_prenex_682 (_ bv4 32)) .cse104) (not (bvsle (_ bv0 32) v_prenex_684)) (= v_arrayElimCell_350 c_main_~x~0.base))))) (or (forall ((v_prenex_549 (_ BitVec 32)) (v_prenex_548 (_ BitVec 32)) (v_prenex_547 (_ BitVec 32)) (v_arrayElimCell_351 (_ BitVec 32)) (v_prenex_550 (_ BitVec 32))) (let ((.cse105 (select (store |c_#length| v_prenex_550 v_prenex_548) v_arrayElimCell_351))) (or (not (bvsle (_ bv0 32) v_prenex_549)) (bvsle (bvadd v_prenex_549 (_ bv4 32)) .cse105) (bvsle (bvadd v_prenex_547 (_ bv4 32)) .cse105) (= v_arrayElimCell_351 v_prenex_550) (= v_arrayElimCell_351 c_main_~x~0.base)))) .cse0) (or .cse9 .cse0 .cse7 (forall ((v_arrayElimCell_455 (_ BitVec 32)) (v_prenex_554 (_ BitVec 32)) (v_prenex_553 (_ BitVec 32)) (v_prenex_552 (_ BitVec 32)) (v_prenex_551 (_ BitVec 32))) (let ((.cse106 (select (store |c_#length| v_prenex_554 v_prenex_552) v_arrayElimCell_455))) (or (bvsle (bvadd v_prenex_551 (_ bv4 32)) .cse106) (= v_arrayElimCell_455 v_prenex_554) (not (bvsle (_ bv0 32) v_prenex_553)) (bvsle (bvadd v_prenex_553 (_ bv4 32)) .cse106))))) (or .cse0 (forall ((v_prenex_659 (_ BitVec 32)) (v_arrayElimCell_507 (_ BitVec 32)) (v_prenex_661 (_ BitVec 32)) (v_prenex_660 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_660 (_ bv4 32)) (select (store |c_#length| v_prenex_661 v_prenex_659) v_arrayElimCell_507)) (= v_arrayElimCell_507 v_prenex_661) (not (bvsle (_ bv0 32) v_prenex_660)) (= v_arrayElimCell_507 c_main_~x~0.base))) .cse7) (or .cse7 (forall ((v_prenex_20 (_ BitVec 32)) (v_prenex_380 (_ BitVec 32)) (v_arrayElimCell_438 (_ BitVec 32)) (v_prenex_379 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_20)) (bvsle (bvadd v_prenex_20 (_ bv4 32)) (select (store |c_#length| v_prenex_379 v_prenex_380) v_arrayElimCell_438)) (= v_arrayElimCell_438 v_prenex_379) (= v_arrayElimCell_438 c_main_~x~0.base)))) (or .cse0 .cse7 (forall ((v_prenex_350 (_ BitVec 32)) (v_prenex_349 (_ BitVec 32)) (v_prenex_348 (_ BitVec 32)) (v_arrayElimCell_417 (_ BitVec 32))) (or (= v_arrayElimCell_417 v_prenex_348) (= v_arrayElimCell_417 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_350)) (bvsle (bvadd v_prenex_350 (_ bv4 32)) (select (store |c_#length| v_prenex_348 v_prenex_349) v_arrayElimCell_417))))) (or .cse0 .cse7 (forall ((v_arrayElimCell_303 (_ BitVec 32)) (v_prenex_48 (_ BitVec 32)) (v_prenex_354 (_ BitVec 32)) (v_prenex_353 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_48)) (= v_arrayElimCell_303 v_prenex_353) (bvsle (bvadd v_prenex_48 (_ bv4 32)) (select (store |c_#length| v_prenex_353 v_prenex_354) v_arrayElimCell_303))))) (or .cse7 (forall ((v_prenex_296 (_ BitVec 32)) (v_prenex_295 (_ BitVec 32)) (v_arrayElimCell_330 (_ BitVec 32)) (v_prenex_297 (_ BitVec 32)) (v_prenex_58 (_ BitVec 32))) (let ((.cse107 (select (store |c_#length| v_prenex_295 v_prenex_297) v_arrayElimCell_330))) (or (= v_arrayElimCell_330 v_prenex_295) (bvsle (bvadd v_prenex_58 (_ bv4 32)) .cse107) (bvsle (bvadd v_prenex_296 (_ bv4 32)) .cse107) (not (bvsle (_ bv0 32) v_prenex_58)))))) (or .cse9 .cse0 .cse7 (forall ((v_arrayElimCell_545 (_ BitVec 32)) (v_prenex_757 (_ BitVec 32)) (v_prenex_756 (_ BitVec 32)) (v_prenex_755 (_ BitVec 32)) (v_prenex_754 (_ BitVec 32))) (let ((.cse108 (select (store |c_#length| v_prenex_757 v_prenex_756) v_arrayElimCell_545))) (or (= v_arrayElimCell_545 c_main_~x~0.base) (= v_arrayElimCell_545 v_prenex_757) (not (bvsle (_ bv0 32) v_prenex_754)) (bvsle (bvadd v_prenex_754 (_ bv4 32)) .cse108) (bvsle (bvadd v_prenex_755 (_ bv4 32)) .cse108))))) (or .cse0 .cse7 (forall ((v_prenex_582 (_ BitVec 32)) (v_arrayElimCell_307 (_ BitVec 32)) (v_prenex_584 (_ BitVec 32)) (v_prenex_583 (_ BitVec 32))) (or (= v_arrayElimCell_307 v_prenex_584) (bvsle (bvadd v_prenex_583 (_ bv4 32)) (select (store |c_#length| v_prenex_584 v_prenex_582) v_arrayElimCell_307)) (not (bvsle (_ bv0 32) v_prenex_583))))) (or .cse0 .cse7 .cse5 (forall ((v_prenex_704 (_ BitVec 32)) (v_prenex_703 (_ BitVec 32)) (v_prenex_702 (_ BitVec 32)) (v_prenex_701 (_ BitVec 32)) (v_arrayElimCell_427 (_ BitVec 32)) (v_prenex_700 (_ BitVec 32))) (let ((.cse111 (store |c_#length| v_prenex_704 v_prenex_703))) (let ((.cse109 (bvadd v_prenex_700 (_ bv4 32))) (.cse110 (select .cse111 v_prenex_701))) (or (= v_arrayElimCell_427 v_prenex_704) (= v_prenex_701 v_prenex_704) (bvsle .cse109 .cse110) (not (bvsle (_ bv0 32) v_prenex_700)) (bvsle .cse109 (select .cse111 v_arrayElimCell_427)) (= v_arrayElimCell_427 c_main_~x~0.base) (bvsle (bvadd v_prenex_702 (_ bv4 32)) .cse110)))))) (or .cse0 .cse6 (forall ((v_prenex_676 (_ BitVec 32)) (v_prenex_675 (_ BitVec 32)) (v_prenex_674 (_ BitVec 32)) (v_arrayElimCell_509 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_675)) (bvsle (bvadd v_prenex_675 (_ bv4 32)) (select (store |c_#length| v_prenex_676 v_prenex_674) v_arrayElimCell_509)) (= v_arrayElimCell_509 v_prenex_676) (= v_arrayElimCell_509 c_main_~x~0.base)))) (or .cse0 .cse5 (forall ((v_prenex_32 (_ BitVec 32)) (v_arrayElimCell_292 (_ BitVec 32)) (v_prenex_212 (_ BitVec 32)) (v_prenex_211 (_ BitVec 32)) (v_prenex_210 (_ BitVec 32))) (let ((.cse112 (select (store |c_#length| v_prenex_210 v_prenex_212) v_arrayElimCell_292))) (or (= v_arrayElimCell_292 v_prenex_210) (bvsle (bvadd v_prenex_32 (_ bv4 32)) .cse112) (bvsle (bvadd v_prenex_211 (_ bv4 32)) .cse112) (= v_arrayElimCell_292 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_32))))) .cse13) (or .cse9 .cse0 .cse7 (forall ((v_prenex_627 (_ BitVec 32)) (v_prenex_626 (_ BitVec 32)) (v_prenex_625 (_ BitVec 32)) (v_arrayElimCell_562 (_ BitVec 32))) (or (= v_arrayElimCell_562 v_prenex_627) (not (bvsle (_ bv0 32) v_prenex_626)) (= v_arrayElimCell_562 c_main_~x~0.base) (bvsle (bvadd v_prenex_626 (_ bv4 32)) (select (store |c_#length| v_prenex_627 v_prenex_625) v_arrayElimCell_562))))) (or .cse0 (forall ((v_prenex_458 (_ BitVec 32)) (v_prenex_457 (_ BitVec 32)) (v_prenex_456 (_ BitVec 32)) (v_prenex_455 (_ BitVec 32)) (v_arrayElimCell_243 (_ BitVec 32))) (let ((.cse113 (select (store |c_#length| v_prenex_458 v_prenex_456) v_arrayElimCell_243))) (or (bvsle (bvadd v_prenex_455 (_ bv4 32)) .cse113) (bvsle (bvadd v_prenex_457 (_ bv4 32)) .cse113) (= v_arrayElimCell_243 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_457)) (= v_arrayElimCell_243 v_prenex_458)))) .cse5 .cse13) (or .cse0 .cse4 (forall ((v_arrayElimCell_200 (_ BitVec 32)) (v_prenex_303 (_ BitVec 32)) (v_prenex_302 (_ BitVec 32)) (v_prenex_301 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_303 (_ bv4 32)) (select (store |c_#length| v_prenex_301 v_prenex_302) v_arrayElimCell_200)) (= v_arrayElimCell_200 v_prenex_301) (not (bvsle (_ bv0 32) v_prenex_303)) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_200))) .cse5) (or .cse0 .cse5 .cse13 (forall ((v_prenex_95 (_ BitVec 32)) (v_prenex_765 (_ BitVec 32)) (v_prenex_764 (_ BitVec 32)) (v_prenex_763 (_ BitVec 32)) (v_prenex_762 (_ BitVec 32)) (v_prenex_761 (_ BitVec 32))) (let ((.cse115 (store |c_#length| v_prenex_765 v_prenex_764))) (let ((.cse114 (bvadd v_prenex_763 (_ bv4 32))) (.cse116 (select .cse115 v_prenex_95))) (or (bvsle .cse114 (select .cse115 v_prenex_762)) (= v_prenex_95 c_main_~x~0.base) (= v_prenex_762 v_prenex_765) (= v_prenex_95 v_prenex_765) (not (bvsle (_ bv0 32) v_prenex_761)) (bvsle .cse114 .cse116) (bvsle (bvadd v_prenex_761 (_ bv4 32)) .cse116)))))) (or .cse9 .cse7 (forall ((v_prenex_142 (_ BitVec 32)) (v_prenex_643 (_ BitVec 32)) (v_prenex_642 (_ BitVec 32)) (v_prenex_641 (_ BitVec 32)) (v_prenex_640 (_ BitVec 32))) (let ((.cse117 (select (store |c_#length| v_prenex_643 v_prenex_641) v_prenex_142))) (or (= v_prenex_142 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_642)) (= v_prenex_142 v_prenex_643) (bvsle (bvadd v_prenex_640 (_ bv4 32)) .cse117) (bvsle (bvadd v_prenex_642 (_ bv4 32)) .cse117))))) (or .cse7 .cse5 (forall ((v_prenex_747 (_ BitVec 32)) (v_prenex_746 (_ BitVec 32)) (v_prenex_745 (_ BitVec 32)) (v_prenex_744 (_ BitVec 32)) (v_prenex_743 (_ BitVec 32)) (v_arrayElimCell_265 (_ BitVec 32))) (let ((.cse118 (store |c_#length| v_prenex_747 v_prenex_746))) (or (bvsle (bvadd v_prenex_745 (_ bv4 32)) (select .cse118 v_prenex_744)) (= v_arrayElimCell_265 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_743)) (bvsle (bvadd v_prenex_743 (_ bv4 32)) (select .cse118 v_arrayElimCell_265)) (= v_prenex_744 v_prenex_747) (= v_arrayElimCell_265 v_prenex_747))))) (or .cse0 (forall ((v_prenex_340 (_ BitVec 32)) (v_arrayElimCell_246 (_ BitVec 32)) (v_prenex_339 (_ BitVec 32)) (v_prenex_338 (_ BitVec 32)) (v_prenex_342 (_ BitVec 32)) (v_prenex_341 (_ BitVec 32))) (let ((.cse121 (store |c_#length| v_prenex_338 v_prenex_341))) (let ((.cse119 (bvadd v_prenex_340 (_ bv4 32))) (.cse120 (select .cse121 v_arrayElimCell_246))) (or (not (bvsle (_ bv0 32) v_prenex_342)) (= v_prenex_339 v_prenex_338) (bvsle .cse119 .cse120) (= v_arrayElimCell_246 c_main_~x~0.base) (bvsle .cse119 (select .cse121 v_prenex_339)) (= v_arrayElimCell_246 v_prenex_338) (bvsle (bvadd v_prenex_342 (_ bv4 32)) .cse120))))) .cse5 .cse13) (or .cse0 .cse7 (forall ((v_prenex_75 (_ BitVec 32)) (v_prenex_223 (_ BitVec 32)) (v_prenex_222 (_ BitVec 32)) (v_arrayElimCell_450 (_ BitVec 32))) (or (= v_arrayElimCell_450 v_prenex_222) (= v_arrayElimCell_450 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_75)) (bvsle (bvadd v_prenex_75 (_ bv4 32)) (select (store |c_#length| v_prenex_222 v_prenex_223) v_arrayElimCell_450))))) .cse0 (or (forall ((v_arrayElimCell_527 (_ BitVec 32)) (v_prenex_259 (_ BitVec 32)) (v_prenex_258 (_ BitVec 32)) (v_prenex_257 (_ BitVec 32)) (v_prenex_256 (_ BitVec 32))) (let ((.cse122 (select (store |c_#length| v_prenex_256 v_prenex_259) v_arrayElimCell_527))) (or (bvsle (bvadd v_prenex_257 (_ bv4 32)) .cse122) (= v_arrayElimCell_527 v_prenex_256) (= v_arrayElimCell_527 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_257)) (bvsle (bvadd v_prenex_258 (_ bv4 32)) .cse122)))) .cse0 .cse5 .cse13) (or .cse0 (forall ((v_prenex_384 (_ BitVec 32)) (v_prenex_383 (_ BitVec 32)) (v_prenex_382 (_ BitVec 32)) (v_prenex_381 (_ BitVec 32)) (v_arrayElimCell_359 (_ BitVec 32)) (v_prenex_385 (_ BitVec 32))) (let ((.cse125 (store |c_#length| v_prenex_381 v_prenex_384))) (let ((.cse123 (select .cse125 v_prenex_382)) (.cse124 (bvadd v_prenex_385 (_ bv4 32)))) (or (= v_prenex_382 v_prenex_381) (= v_arrayElimCell_359 v_prenex_381) (bvsle (bvadd v_prenex_383 (_ bv4 32)) .cse123) (not (bvsle (_ bv0 32) v_prenex_385)) (bvsle .cse124 .cse123) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_359) (bvsle .cse124 (select .cse125 v_arrayElimCell_359)))))) .cse5) (or .cse0 (forall ((v_arrayElimCell_203 (_ BitVec 32)) (v_arrayElimCell_109 (_ BitVec 32)) (v_prenex_248 (_ BitVec 32)) (v_prenex_247 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_arrayElimCell_109)) (= v_arrayElimCell_203 c_main_~x~0.base) (bvsle (bvadd v_arrayElimCell_109 (_ bv4 32)) (select (store |c_#length| v_prenex_247 v_prenex_248) v_arrayElimCell_203)) (= v_arrayElimCell_203 v_prenex_247))) .cse5 .cse13) (or .cse7 (forall ((v_arrayElimCell_137 (_ BitVec 32)) (v_prenex_407 (_ BitVec 32)) (v_arrayElimCell_446 (_ BitVec 32)) (v_prenex_406 (_ BitVec 32))) (or (= v_arrayElimCell_446 v_prenex_406) (bvsle (bvadd v_arrayElimCell_137 (_ bv4 32)) (select (store |c_#length| v_prenex_406 v_prenex_407) v_arrayElimCell_446)) (= v_arrayElimCell_446 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_arrayElimCell_137))))) (or (forall ((v_prenex_285 (_ BitVec 32)) (v_prenex_15 (_ BitVec 32)) (v_arrayElimCell_296 (_ BitVec 32)) (v_prenex_286 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_15 (_ bv4 32)) (select (store |c_#length| v_prenex_285 v_prenex_286) v_arrayElimCell_296)) (= v_arrayElimCell_296 v_prenex_285) (not (bvsle (_ bv0 32) v_prenex_15)))) .cse7 .cse5) (or .cse0 .cse7 (forall ((v_arrayElimCell_644 (_ BitVec 32)) (v_prenex_324 (_ BitVec 32)) (v_prenex_323 (_ BitVec 32)) (v_prenex_322 (_ BitVec 32)) (v_prenex_321 (_ BitVec 32))) (let ((.cse126 (select (store |c_#length| v_prenex_321 v_prenex_323) v_arrayElimCell_644))) (or (= v_arrayElimCell_644 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_324)) (= v_arrayElimCell_644 v_prenex_321) (bvsle (bvadd v_prenex_322 (_ bv4 32)) .cse126) (bvsle (bvadd v_prenex_324 (_ bv4 32)) .cse126))))) (or .cse9 .cse7 (forall ((v_arrayElimCell_442 (_ BitVec 32)) (v_prenex_556 (_ BitVec 32)) (v_prenex_555 (_ BitVec 32)) (v_prenex_11 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_11 (_ bv4 32)) (select (store |c_#length| v_prenex_556 v_prenex_555) v_arrayElimCell_442)) (not (bvsle (_ bv0 32) v_prenex_11)) (= v_arrayElimCell_442 c_main_~x~0.base) (= v_arrayElimCell_442 v_prenex_556)))) (or .cse7 .cse5 (forall ((v_prenex_708 (_ BitVec 32)) (v_prenex_163 (_ BitVec 32)) (v_prenex_707 (_ BitVec 32)) (v_prenex_706 (_ BitVec 32)) (v_prenex_705 (_ BitVec 32)) (v_prenex_709 (_ BitVec 32))) (let ((.cse129 (store |c_#length| v_prenex_709 v_prenex_708))) (let ((.cse128 (bvadd v_prenex_707 (_ bv4 32))) (.cse127 (select .cse129 v_prenex_163))) (or (= v_prenex_163 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_705)) (bvsle (bvadd v_prenex_705 (_ bv4 32)) .cse127) (= v_prenex_163 v_prenex_709) (= v_prenex_706 v_prenex_709) (bvsle .cse128 (select .cse129 v_prenex_706)) (bvsle .cse128 .cse127)))))) (or .cse0 .cse7 (forall ((v_prenex_73 (_ BitVec 32)) (v_prenex_246 (_ BitVec 32)) (v_arrayElimCell_273 (_ BitVec 32)) (v_prenex_245 (_ BitVec 32)) (v_prenex_244 (_ BitVec 32))) (let ((.cse130 (select (store |c_#length| v_prenex_244 v_prenex_246) v_arrayElimCell_273))) (or (bvsle (bvadd v_prenex_73 (_ bv4 32)) .cse130) (bvsle (bvadd v_prenex_245 (_ bv4 32)) .cse130) (= v_arrayElimCell_273 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_73)) (= v_arrayElimCell_273 v_prenex_244))))) (or .cse9 .cse0 (forall ((v_prenex_284 (_ BitVec 32)) (v_prenex_283 (_ BitVec 32)) (v_prenex_282 (_ BitVec 32)) (v_prenex_281 (_ BitVec 32)) (v_arrayElimCell_394 (_ BitVec 32))) (let ((.cse131 (select (store |c_#length| v_prenex_281 v_prenex_283) v_arrayElimCell_394))) (or (= v_arrayElimCell_394 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_284)) (bvsle (bvadd v_prenex_284 (_ bv4 32)) .cse131) (bvsle (bvadd v_prenex_282 (_ bv4 32)) .cse131) (= v_arrayElimCell_394 v_prenex_281))))) (or .cse9 .cse0 .cse6 (forall ((v_prenex_300 (_ BitVec 32)) (v_arrayElimCell_461 (_ BitVec 32)) (v_prenex_34 (_ BitVec 32)) (v_prenex_299 (_ BitVec 32)) (v_prenex_298 (_ BitVec 32))) (let ((.cse132 (select (store |c_#length| v_prenex_298 v_prenex_300) v_arrayElimCell_461))) (or (= v_arrayElimCell_461 v_prenex_298) (not (bvsle (_ bv0 32) v_prenex_34)) (bvsle (bvadd v_prenex_34 (_ bv4 32)) .cse132) (bvsle (bvadd v_prenex_299 (_ bv4 32)) .cse132))))) (or .cse9 .cse0 (forall ((v_arrayElimCell_563 (_ BitVec 32)) (v_prenex_209 (_ BitVec 32)) (v_prenex_208 (_ BitVec 32)) (v_prenex_207 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_208)) (= v_arrayElimCell_563 c_main_~x~0.base) (= v_arrayElimCell_563 v_prenex_207) (bvsle (bvadd v_prenex_208 (_ bv4 32)) (select (store |c_#length| v_prenex_207 v_prenex_209) v_arrayElimCell_563))))) (or .cse0 .cse6 (forall ((v_arrayElimCell_147 (_ BitVec 32)) (v_arrayElimCell_214 (_ BitVec 32)) (v_prenex_201 (_ BitVec 32)) (v_prenex_200 (_ BitVec 32))) (or (= v_arrayElimCell_214 v_prenex_200) (bvsle (bvadd v_arrayElimCell_147 (_ bv4 32)) (select (store |c_#length| v_prenex_200 v_prenex_201) v_arrayElimCell_214)) (not (bvsle (_ bv0 32) v_arrayElimCell_147))))) (or .cse9 .cse0 .cse6 (forall ((v_prenex_373 (_ BitVec 32)) (v_prenex_372 (_ BitVec 32)) (v_prenex_371 (_ BitVec 32)) (v_prenex_370 (_ BitVec 32)) (v_arrayElimCell_361 (_ BitVec 32))) (let ((.cse133 (select (store |c_#length| v_prenex_370 v_prenex_372) v_arrayElimCell_361))) (or (bvsle (bvadd v_prenex_373 (_ bv4 32)) .cse133) (bvsle (bvadd v_prenex_371 (_ bv4 32)) .cse133) (not (bvsle (_ bv0 32) v_prenex_373)) (= v_arrayElimCell_361 c_main_~x~0.base) (= v_arrayElimCell_361 v_prenex_370))))) (or .cse0 (forall ((v_arrayElimCell_465 (_ BitVec 32)) (v_prenex_183 (_ BitVec 32)) (v_prenex_65 (_ BitVec 32)) (v_prenex_182 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_65)) (bvsle (bvadd v_prenex_65 (_ bv4 32)) (select (store |c_#length| v_prenex_183 v_prenex_182) v_arrayElimCell_465)) (= v_arrayElimCell_465 v_prenex_183))) .cse7) .cse81 (or .cse0 .cse5 .cse13 (forall ((v_prenex_395 (_ BitVec 32)) (v_arrayElimCell_657 (_ BitVec 32)) (v_prenex_45 (_ BitVec 32)) (v_prenex_396 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_45)) (= v_arrayElimCell_657 v_prenex_395) (bvsle (bvadd v_prenex_45 (_ bv4 32)) (select (store |c_#length| v_prenex_395 v_prenex_396) v_arrayElimCell_657))))) (or .cse0 (forall ((v_arrayElimCell_101 (_ BitVec 32)) (v_prenex_215 (_ BitVec 32)) (v_prenex_214 (_ BitVec 32)) (v_prenex_213 (_ BitVec 32)) (v_arrayElimCell_386 (_ BitVec 32))) (let ((.cse134 (select (store |c_#length| v_prenex_213 v_prenex_215) v_arrayElimCell_386))) (or (= v_arrayElimCell_386 v_prenex_213) (bvsle (bvadd v_prenex_214 (_ bv4 32)) .cse134) (bvsle (bvadd v_arrayElimCell_101 (_ bv4 32)) .cse134) (not (bvsle (_ bv0 32) v_arrayElimCell_101)) (= v_arrayElimCell_386 c_main_~x~0.base))))) (or .cse0 (forall ((v_prenex_117 (_ BitVec 32)) (v_prenex_226 (_ BitVec 32)) (v_prenex_49 (_ BitVec 32)) (v_prenex_225 (_ BitVec 32)) (v_prenex_224 (_ BitVec 32))) (let ((.cse135 (select (store |c_#length| v_prenex_224 v_prenex_226) v_prenex_117))) (or (bvsle (bvadd v_prenex_49 (_ bv4 32)) .cse135) (= v_prenex_117 v_prenex_224) (= v_prenex_117 c_main_~x~0.base) (bvsle (bvadd v_prenex_225 (_ bv4 32)) .cse135) (not (bvsle (_ bv0 32) v_prenex_49))))) .cse7) (or (forall ((v_arrayElimCell_434 (_ BitVec 32)) (v_prenex_465 (_ BitVec 32)) (v_prenex_464 (_ BitVec 32)) (v_prenex_47 (_ BitVec 32))) (or (= v_arrayElimCell_434 v_prenex_465) (not (bvsle (_ bv0 32) v_prenex_47)) (bvsle (bvadd v_prenex_47 (_ bv4 32)) (select (store |c_#length| v_prenex_465 v_prenex_464) v_arrayElimCell_434)))) .cse0 .cse7) (or .cse7 .cse5 (forall ((v_prenex_18 (_ BitVec 32)) (v_prenex_278 (_ BitVec 32)) (v_arrayElimCell_262 (_ BitVec 32)) (v_prenex_277 (_ BitVec 32)) (v_prenex_276 (_ BitVec 32)) (v_prenex_275 (_ BitVec 32))) (let ((.cse137 (store |c_#length| v_prenex_275 v_prenex_278))) (let ((.cse136 (bvadd v_prenex_277 (_ bv4 32))) (.cse138 (select .cse137 v_arrayElimCell_262))) (or (= v_arrayElimCell_262 v_prenex_275) (not (bvsle (_ bv0 32) v_prenex_18)) (= v_arrayElimCell_262 c_main_~x~0.base) (= v_prenex_276 v_prenex_275) (bvsle .cse136 (select .cse137 v_prenex_276)) (bvsle .cse136 .cse138) (bvsle (bvadd v_prenex_18 (_ bv4 32)) .cse138)))))) (or .cse9 .cse0 .cse7 (forall ((v_prenex_173 (_ BitVec 32)) (v_prenex_172 (_ BitVec 32)) (v_arrayElimCell_566 (_ BitVec 32)) (v_prenex_44 (_ BitVec 32))) (or (= v_arrayElimCell_566 c_main_~x~0.base) (= v_arrayElimCell_566 v_prenex_172) (bvsle (bvadd v_prenex_44 (_ bv4 32)) (select (store |c_#length| v_prenex_172 v_prenex_173) v_arrayElimCell_566)) (not (bvsle (_ bv0 32) v_prenex_44))))) (or .cse0 (forall ((v_prenex_494 (_ BitVec 32)) (v_prenex_493 (_ BitVec 32)) (v_prenex_492 (_ BitVec 32)) (v_prenex_491 (_ BitVec 32)) (v_arrayElimCell_391 (_ BitVec 32)) (v_prenex_495 (_ BitVec 32))) (let ((.cse143 (store |c_#length| v_prenex_494 v_prenex_493))) (let ((.cse139 (bvadd v_prenex_492 (_ bv4 32))) (.cse141 (select .cse143 v_prenex_491)) (.cse142 (bvadd v_prenex_495 (_ bv4 32))) (.cse140 (select .cse143 v_arrayElimCell_391))) (or (bvsle .cse139 .cse140) (not (bvsle (_ bv0 32) v_prenex_495)) (= v_arrayElimCell_391 c_main_~x~0.base) (bvsle .cse139 .cse141) (= v_arrayElimCell_391 v_prenex_494) (bvsle .cse142 .cse141) (= v_prenex_491 v_prenex_494) (bvsle .cse142 .cse140)))))) (or .cse7 .cse5 (forall ((v_prenex_616 (_ BitVec 32)) (v_arrayElimCell_226 (_ BitVec 32)) (v_prenex_615 (_ BitVec 32)) (v_prenex_614 (_ BitVec 32)) (v_arrayElimCell_84 (_ BitVec 32))) (let ((.cse144 (select (store |c_#length| v_prenex_616 v_prenex_615) v_arrayElimCell_226))) (or (= v_arrayElimCell_226 v_prenex_616) (bvsle (bvadd v_prenex_614 (_ bv4 32)) .cse144) (bvsle (bvadd v_arrayElimCell_84 (_ bv4 32)) .cse144) (not (bvsle (_ bv0 32) v_arrayElimCell_84)))))) (or .cse0 .cse5 (forall ((v_prenex_405 (_ BitVec 32)) (v_prenex_404 (_ BitVec 32)) (v_prenex_403 (_ BitVec 32)) (v_arrayElimCell_617 (_ BitVec 32)) (v_prenex_33 (_ BitVec 32))) (let ((.cse145 (select (store |c_#length| v_prenex_403 v_prenex_405) v_arrayElimCell_617))) (or (bvsle (bvadd v_prenex_404 (_ bv4 32)) .cse145) (= v_arrayElimCell_617 v_prenex_403) (bvsle (bvadd v_prenex_33 (_ bv4 32)) .cse145) (not (bvsle (_ bv0 32) v_prenex_33)))))) (or .cse0 (forall ((v_prenex_175 (_ BitVec 32)) (v_prenex_174 (_ BitVec 32)) (v_arrayElimCell_632 (_ BitVec 32)) (v_arrayElimCell_122 (_ BitVec 32)) (v_prenex_176 (_ BitVec 32))) (let ((.cse146 (select (store |c_#length| v_prenex_175 v_prenex_174) v_arrayElimCell_632))) (or (= v_arrayElimCell_632 v_prenex_175) (bvsle (bvadd v_arrayElimCell_122 (_ bv4 32)) .cse146) (not (bvsle (_ bv0 32) v_arrayElimCell_122)) (bvsle (bvadd v_prenex_176 (_ bv4 32)) .cse146)))) .cse7) (or .cse0 .cse5 (forall ((v_prenex_41 (_ BitVec 32)) (v_arrayElimCell_528 (_ BitVec 32)) (v_prenex_189 (_ BitVec 32)) (v_prenex_188 (_ BitVec 32)) (v_prenex_187 (_ BitVec 32))) (let ((.cse147 (select (store |c_#length| v_prenex_188 v_prenex_187) v_arrayElimCell_528))) (or (= v_arrayElimCell_528 v_prenex_188) (not (bvsle (_ bv0 32) v_prenex_41)) (bvsle (bvadd v_prenex_41 (_ bv4 32)) .cse147) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_528) (bvsle (bvadd v_prenex_189 (_ bv4 32)) .cse147))))) (or .cse0 (forall ((v_prenex_241 (_ BitVec 32)) (v_arrayElimCell_315 (_ BitVec 32)) (v_prenex_56 (_ BitVec 32)) (v_prenex_243 (_ BitVec 32)) (v_prenex_242 (_ BitVec 32))) (let ((.cse148 (select (store |c_#length| v_prenex_241 v_prenex_243) v_arrayElimCell_315))) (or (= v_arrayElimCell_315 c_main_~x~0.base) (= v_arrayElimCell_315 v_prenex_241) (not (bvsle (_ bv0 32) v_prenex_56)) (bvsle (bvadd v_prenex_56 (_ bv4 32)) .cse148) (bvsle (bvadd v_prenex_242 (_ bv4 32)) .cse148)))) .cse5 .cse13) (or .cse9 .cse0 .cse7 (forall ((v_arrayElimCell_541 (_ BitVec 32)) (v_prenex_450 (_ BitVec 32)) (v_prenex_449 (_ BitVec 32)) (v_prenex_448 (_ BitVec 32)) (v_prenex_451 (_ BitVec 32))) (let ((.cse149 (select (store |c_#length| v_prenex_451 v_prenex_449) v_arrayElimCell_541))) (or (not (bvsle (_ bv0 32) v_prenex_450)) (= v_arrayElimCell_541 c_main_~x~0.base) (bvsle (bvadd v_prenex_450 (_ bv4 32)) .cse149) (bvsle (bvadd v_prenex_448 (_ bv4 32)) .cse149) (= v_arrayElimCell_541 v_prenex_451))))) (or .cse0 .cse5 (forall ((v_arrayElimCell_699 (_ BitVec 32)) (v_prenex_624 (_ BitVec 32)) (v_prenex_623 (_ BitVec 32)) (v_prenex_622 (_ BitVec 32)) (v_prenex_621 (_ BitVec 32))) (let ((.cse150 (select (store |c_#length| v_prenex_623 v_prenex_622) v_arrayElimCell_699))) (or (= v_arrayElimCell_699 c_main_~x~0.base) (bvsle (bvadd v_prenex_624 (_ bv4 32)) .cse150) (not (bvsle (_ bv0 32) v_prenex_624)) (= v_arrayElimCell_699 v_prenex_623) (bvsle (bvadd v_prenex_621 (_ bv4 32)) .cse150)))) .cse13) (or .cse9 .cse0 (forall ((v_prenex_508 (_ BitVec 32)) (v_prenex_507 (_ BitVec 32)) (v_prenex_506 (_ BitVec 32)) (v_prenex_505 (_ BitVec 32)) (v_arrayElimCell_459 (_ BitVec 32))) (let ((.cse151 (select (store |c_#length| v_prenex_508 v_prenex_506) v_arrayElimCell_459))) (or (bvsle (bvadd v_prenex_505 (_ bv4 32)) .cse151) (= v_arrayElimCell_459 v_prenex_508) (not (bvsle (_ bv0 32) v_prenex_507)) (bvsle (bvadd v_prenex_507 (_ bv4 32)) .cse151)))) .cse7) (or .cse7 (forall ((v_prenex_161 (_ BitVec 32)) (v_prenex_636 (_ BitVec 32)) (v_prenex_635 (_ BitVec 32)) (v_prenex_634 (_ BitVec 32)) (v_prenex_633 (_ BitVec 32))) (let ((.cse152 (select (store |c_#length| v_prenex_635 v_prenex_634) v_prenex_161))) (or (bvsle (bvadd v_prenex_633 (_ bv4 32)) .cse152) (not (bvsle (_ bv0 32) v_prenex_636)) (bvsle (bvadd v_prenex_636 (_ bv4 32)) .cse152) (= v_prenex_161 v_prenex_635) (= v_prenex_161 c_main_~x~0.base))))) (or (forall ((v_arrayElimCell_490 (_ BitVec 32)) (v_prenex_632 (_ BitVec 32)) (v_prenex_631 (_ BitVec 32)) (v_prenex_630 (_ BitVec 32))) (or (= v_arrayElimCell_490 v_prenex_632) (= v_arrayElimCell_490 c_main_~x~0.base) (bvsle (bvadd v_prenex_631 (_ bv4 32)) (select (store |c_#length| v_prenex_632 v_prenex_630) v_arrayElimCell_490)) (not (bvsle (_ bv0 32) v_prenex_631)))) .cse0 .cse6) (or .cse0 (forall ((v_prenex_429 (_ BitVec 32)) (v_prenex_428 (_ BitVec 32)) (v_arrayElimCell_536 (_ BitVec 32)) (v_prenex_427 (_ BitVec 32)) (v_prenex_431 (_ BitVec 32)) (v_prenex_430 (_ BitVec 32))) (let ((.cse153 (store |c_#length| v_prenex_431 v_prenex_429))) (or (= v_prenex_427 v_prenex_431) (bvsle (bvadd v_prenex_430 (_ bv4 32)) (select .cse153 v_arrayElimCell_536)) (bvsle (bvadd v_prenex_428 (_ bv4 32)) (select .cse153 v_prenex_427)) (not (bvsle (_ bv0 32) v_prenex_430)) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_536) (= v_arrayElimCell_536 v_prenex_431)))) .cse4 .cse5) (or .cse0 (forall ((v_prenex_742 (_ BitVec 32)) (v_prenex_741 (_ BitVec 32)) (v_prenex_740 (_ BitVec 32)) (v_arrayElimCell_197 (_ BitVec 32))) (or (= v_arrayElimCell_197 c_main_~x~0.base) (bvsle (bvadd v_prenex_740 (_ bv4 32)) (select (store |c_#length| v_prenex_742 v_prenex_741) v_arrayElimCell_197)) (= v_arrayElimCell_197 v_prenex_742) (not (bvsle (_ bv0 32) v_prenex_740)))) .cse5 .cse13) (or .cse7 (forall ((v_prenex_739 (_ BitVec 32)) (v_prenex_738 (_ BitVec 32)) (v_prenex_737 (_ BitVec 32)) (v_prenex_736 (_ BitVec 32)) (v_prenex_735 (_ BitVec 32)) (v_arrayElimCell_604 (_ BitVec 32))) (let ((.cse158 (store |c_#length| v_prenex_739 v_prenex_738))) (let ((.cse156 (bvadd v_prenex_737 (_ bv4 32))) (.cse155 (select .cse158 v_arrayElimCell_604)) (.cse154 (bvadd v_prenex_735 (_ bv4 32))) (.cse157 (select .cse158 v_prenex_736))) (or (= v_arrayElimCell_604 c_main_~x~0.base) (bvsle .cse154 .cse155) (= v_prenex_736 v_prenex_739) (= v_arrayElimCell_604 v_prenex_739) (bvsle .cse156 .cse157) (bvsle .cse156 .cse155) (bvsle .cse154 .cse157) (not (bvsle (_ bv0 32) v_prenex_735))))))) (or .cse0 (forall ((v_arrayElimCell_534 (_ BitVec 32)) (v_prenex_237 (_ BitVec 32)) (v_prenex_236 (_ BitVec 32)) (v_prenex_235 (_ BitVec 32)) (v_prenex_234 (_ BitVec 32))) (let ((.cse159 (select (store |c_#length| v_prenex_234 v_prenex_237) v_arrayElimCell_534))) (or (bvsle (bvadd v_prenex_235 (_ bv4 32)) .cse159) (not (bvsle (_ bv0 32) v_prenex_235)) (= v_arrayElimCell_534 c_main_~x~0.base) (= v_arrayElimCell_534 v_prenex_234) (bvsle (bvadd v_prenex_236 (_ bv4 32)) .cse159)))) .cse4 .cse5) (or .cse9 .cse0 .cse7 (forall ((v_prenex_692 (_ BitVec 32)) (v_arrayElimCell_486 (_ BitVec 32)) (v_prenex_691 (_ BitVec 32)) (v_prenex_690 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_691)) (= v_arrayElimCell_486 c_main_~x~0.base) (= v_arrayElimCell_486 v_prenex_692) (bvsle (bvadd v_prenex_691 (_ bv4 32)) (select (store |c_#length| v_prenex_692 v_prenex_690) v_arrayElimCell_486))))) (or .cse0 (forall ((v_prenex_603 (_ BitVec 32)) (v_arrayElimCell_190 (_ BitVec 32)) (v_prenex_602 (_ BitVec 32)) (v_prenex_601 (_ BitVec 32)) (v_prenex_600 (_ BitVec 32))) (let ((.cse160 (select (store |c_#length| v_prenex_603 v_prenex_601) v_arrayElimCell_190))) (or (= v_arrayElimCell_190 v_prenex_603) (bvsle (bvadd v_prenex_600 (_ bv4 32)) .cse160) (bvsle (bvadd v_prenex_602 (_ bv4 32)) .cse160) (not (bvsle (_ bv0 32) v_prenex_602)))))) (or .cse0 .cse7 (forall ((v_arrayElimCell_377 (_ BitVec 32)) (v_prenex_74 (_ BitVec 32)) (v_prenex_221 (_ BitVec 32)) (v_prenex_220 (_ BitVec 32))) (or (= v_arrayElimCell_377 v_prenex_220) (not (bvsle (_ bv0 32) v_prenex_74)) (bvsle (bvadd v_prenex_74 (_ bv4 32)) (select (store |c_#length| v_prenex_220 v_prenex_221) v_arrayElimCell_377))))) (or .cse0 (forall ((v_prenex_52 (_ BitVec 32)) (v_arrayElimCell_679 (_ BitVec 32)) (v_prenex_206 (_ BitVec 32)) (v_prenex_205 (_ BitVec 32))) (or (= v_arrayElimCell_679 v_prenex_205) (bvsle (bvadd v_prenex_52 (_ bv4 32)) (select (store |c_#length| v_prenex_205 v_prenex_206) v_arrayElimCell_679)) (not (bvsle (_ bv0 32) v_prenex_52)))) .cse5 .cse13) (or .cse0 .cse6 (forall ((v_prenex_727 (_ BitVec 32)) (v_prenex_726 (_ BitVec 32)) (v_prenex_725 (_ BitVec 32)) (v_prenex_724 (_ BitVec 32)) (v_arrayElimCell_649 (_ BitVec 32))) (let ((.cse161 (select (store |c_#length| v_prenex_727 v_prenex_726) v_arrayElimCell_649))) (or (= v_arrayElimCell_649 c_main_~x~0.base) (= v_arrayElimCell_649 v_prenex_727) (bvsle (bvadd v_prenex_724 (_ bv4 32)) .cse161) (bvsle (bvadd v_prenex_725 (_ bv4 32)) .cse161) (not (bvsle (_ bv0 32) v_prenex_724)))))) (or .cse0 .cse7 (forall ((v_prenex_648 (_ BitVec 32)) (v_prenex_647 (_ BitVec 32)) (v_prenex_646 (_ BitVec 32)) (v_prenex_645 (_ BitVec 32)) (v_arrayElimCell_407 (_ BitVec 32)) (v_prenex_644 (_ BitVec 32))) (let ((.cse166 (store |c_#length| v_prenex_647 v_prenex_646))) (let ((.cse162 (bvadd v_prenex_648 (_ bv4 32))) (.cse164 (select .cse166 v_prenex_644)) (.cse165 (bvadd v_prenex_645 (_ bv4 32))) (.cse163 (select .cse166 v_arrayElimCell_407))) (or (bvsle .cse162 .cse163) (bvsle .cse162 .cse164) (= v_arrayElimCell_407 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_648)) (= v_arrayElimCell_407 v_prenex_647) (= v_prenex_644 v_prenex_647) (bvsle .cse165 .cse164) (bvsle .cse165 .cse163)))))) (or .cse0 (forall ((v_prenex_272 (_ BitVec 32)) (v_arrayElimCell_423 (_ BitVec 32)) (v_prenex_271 (_ BitVec 32)) (v_prenex_270 (_ BitVec 32))) (or (= v_arrayElimCell_423 c_main_~x~0.base) (= v_arrayElimCell_423 v_prenex_270) (not (bvsle (_ bv0 32) v_prenex_271)) (bvsle (bvadd v_prenex_271 (_ bv4 32)) (select (store |c_#length| v_prenex_270 v_prenex_272) v_arrayElimCell_423)))) .cse7) (or .cse0 .cse7 (forall ((v_prenex_195 (_ BitVec 32)) (v_prenex_194 (_ BitVec 32)) (v_arrayElimCell_151 (_ BitVec 32)) (v_arrayElimCell_593 (_ BitVec 32))) (or (= v_arrayElimCell_593 c_main_~x~0.base) (bvsle (bvadd v_arrayElimCell_151 (_ bv4 32)) (select (store |c_#length| v_prenex_194 v_prenex_195) v_arrayElimCell_593)) (not (bvsle (_ bv0 32) v_arrayElimCell_151)) (= v_arrayElimCell_593 v_prenex_194)))) .cse5 (or (forall ((v_arrayElimCell_235 (_ BitVec 32)) (v_prenex_415 (_ BitVec 32)) (v_prenex_414 (_ BitVec 32)) (v_prenex_413 (_ BitVec 32)) (v_prenex_412 (_ BitVec 32)) (v_prenex_411 (_ BitVec 32))) (let ((.cse169 (store |c_#length| v_prenex_415 v_prenex_413))) (let ((.cse168 (select .cse169 v_arrayElimCell_235)) (.cse167 (bvadd v_prenex_412 (_ bv4 32)))) (or (= v_prenex_411 v_prenex_415) (= v_arrayElimCell_235 v_prenex_415) (not (bvsle (_ bv0 32) v_prenex_414)) (bvsle .cse167 .cse168) (= v_arrayElimCell_235 c_main_~x~0.base) (bvsle (bvadd v_prenex_414 (_ bv4 32)) .cse168) (bvsle .cse167 (select .cse169 v_prenex_411)))))) .cse0 .cse5) (or .cse0 (forall ((v_prenex_729 (_ BitVec 32)) (v_prenex_728 (_ BitVec 32)) (v_prenex_730 (_ BitVec 32)) (v_arrayElimCell_198 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_728 (_ bv4 32)) (select (store |c_#length| v_prenex_730 v_prenex_729) v_arrayElimCell_198)) (= v_arrayElimCell_198 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_728)) (= v_arrayElimCell_198 v_prenex_730))) .cse5) (or .cse0 (forall ((v_prenex_419 (_ BitVec 32)) (v_prenex_418 (_ BitVec 32)) (v_prenex_417 (_ BitVec 32)) (v_prenex_416 (_ BitVec 32)) (v_arrayElimCell_616 (_ BitVec 32))) (let ((.cse170 (select (store |c_#length| v_prenex_419 v_prenex_417) v_arrayElimCell_616))) (or (= v_arrayElimCell_616 v_prenex_419) (not (bvsle (_ bv0 32) v_prenex_418)) (bvsle (bvadd v_prenex_416 (_ bv4 32)) .cse170) (bvsle (bvadd v_prenex_418 (_ bv4 32)) .cse170)))) .cse5 .cse13) (or .cse0 .cse4 .cse5 (forall ((v_prenex_240 (_ BitVec 32)) (v_prenex_239 (_ BitVec 32)) (v_prenex_238 (_ BitVec 32)) (v_arrayElimCell_250 (_ BitVec 32)) (v_prenex_55 (_ BitVec 32))) (let ((.cse171 (select (store |c_#length| v_prenex_238 v_prenex_240) v_arrayElimCell_250))) (or (not (bvsle (_ bv0 32) v_prenex_55)) (= v_arrayElimCell_250 c_main_~x~0.base) (bvsle (bvadd v_prenex_55 (_ bv4 32)) .cse171) (bvsle (bvadd v_prenex_239 (_ bv4 32)) .cse171) (= v_arrayElimCell_250 v_prenex_238))))) (or .cse9 .cse0 .cse7 (forall ((v_prenex_250 (_ BitVec 32)) (v_prenex_43 (_ BitVec 32)) (v_prenex_249 (_ BitVec 32)) (v_arrayElimCell_482 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_43)) (bvsle (bvadd v_prenex_43 (_ bv4 32)) (select (store |c_#length| v_prenex_249 v_prenex_250) v_arrayElimCell_482)) (= v_arrayElimCell_482 c_main_~x~0.base) (= v_arrayElimCell_482 v_prenex_249)))) (or .cse9 .cse0 .cse7 (forall ((v_prenex_599 (_ BitVec 32)) (v_prenex_598 (_ BitVec 32)) (v_prenex_597 (_ BitVec 32)) (v_prenex_596 (_ BitVec 32)) (v_arrayElimCell_430 (_ BitVec 32))) (let ((.cse172 (select (store |c_#length| v_prenex_599 v_prenex_597) v_arrayElimCell_430))) (or (bvsle (bvadd v_prenex_598 (_ bv4 32)) .cse172) (bvsle (bvadd v_prenex_596 (_ bv4 32)) .cse172) (not (bvsle (_ bv0 32) v_prenex_598)) (= v_arrayElimCell_430 v_prenex_599) (= v_arrayElimCell_430 c_main_~x~0.base))))) (or .cse9 .cse0 (forall ((v_prenex_399 (_ BitVec 32)) (v_prenex_398 (_ BitVec 32)) (v_arrayElimCell_483 (_ BitVec 32)) (v_prenex_397 (_ BitVec 32))) (or (= v_arrayElimCell_483 c_main_~x~0.base) (bvsle (bvadd v_prenex_399 (_ bv4 32)) (select (store |c_#length| v_prenex_397 v_prenex_398) v_arrayElimCell_483)) (not (bvsle (_ bv0 32) v_prenex_399)) (= v_arrayElimCell_483 v_prenex_397)))) (or .cse0 (forall ((v_arrayElimCell_506 (_ BitVec 32)) (v_prenex_375 (_ BitVec 32)) (v_prenex_374 (_ BitVec 32)) (v_prenex_69 (_ BitVec 32))) (or (= v_arrayElimCell_506 v_prenex_374) (bvsle (bvadd v_prenex_69 (_ bv4 32)) (select (store |c_#length| v_prenex_374 v_prenex_375) v_arrayElimCell_506)) (= v_arrayElimCell_506 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_69))))) (or .cse0 (forall ((v_arrayElimCell_664 (_ BitVec 32)) (v_prenex_769 (_ BitVec 32)) (v_prenex_768 (_ BitVec 32)) (v_prenex_767 (_ BitVec 32)) (v_prenex_766 (_ BitVec 32))) (let ((.cse173 (select (store |c_#length| v_prenex_769 v_prenex_768) v_arrayElimCell_664))) (or (= v_arrayElimCell_664 c_main_~x~0.base) (= v_arrayElimCell_664 v_prenex_769) (bvsle (bvadd v_prenex_766 (_ bv4 32)) .cse173) (not (bvsle (_ bv0 32) v_prenex_766)) (bvsle (bvadd v_prenex_767 (_ bv4 32)) .cse173)))) .cse7) (or .cse0 (forall ((v_prenex_734 (_ BitVec 32)) (v_prenex_733 (_ BitVec 32)) (v_prenex_732 (_ BitVec 32)) (v_prenex_731 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_732)) (= v_prenex_731 v_prenex_734) (bvsle (bvadd v_prenex_732 (_ bv4 32)) (select (store |c_#length| v_prenex_734 v_prenex_733) v_prenex_731))))) .cse7 (or .cse0 .cse5 (forall ((v_prenex_193 (_ BitVec 32)) (v_arrayElimCell_700 (_ BitVec 32)) (v_prenex_192 (_ BitVec 32)) (v_prenex_191 (_ BitVec 32)) (v_prenex_190 (_ BitVec 32))) (let ((.cse174 (select (store |c_#length| v_prenex_191 v_prenex_193) v_arrayElimCell_700))) (or (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_700) (= v_arrayElimCell_700 v_prenex_191) (not (bvsle (_ bv0 32) v_prenex_190)) (bvsle (bvadd v_prenex_192 (_ bv4 32)) .cse174) (bvsle (bvadd v_prenex_190 (_ bv4 32)) .cse174))))) (or .cse0 (forall ((v_arrayElimCell_418 (_ BitVec 32)) (v_prenex_233 (_ BitVec 32)) (v_prenex_232 (_ BitVec 32)) (v_prenex_231 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_232)) (= v_arrayElimCell_418 c_main_~x~0.base) (bvsle (bvadd v_prenex_232 (_ bv4 32)) (select (store |c_#length| v_prenex_231 v_prenex_233) v_arrayElimCell_418)) (= v_arrayElimCell_418 v_prenex_231)))) (or (forall ((v_arrayElimCell_304 (_ BitVec 32)) (v_prenex_504 (_ BitVec 32)) (v_prenex_503 (_ BitVec 32)) (v_prenex_502 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_503)) (bvsle (bvadd v_prenex_503 (_ bv4 32)) (select (store |c_#length| v_prenex_504 v_prenex_502) v_arrayElimCell_304)) (= v_arrayElimCell_304 v_prenex_504))) .cse0) (or .cse0 (forall ((v_prenex_436 (_ BitVec 32)) (v_arrayElimCell_318 (_ BitVec 32)) (v_prenex_435 (_ BitVec 32)) (v_prenex_434 (_ BitVec 32)) (v_prenex_433 (_ BitVec 32)) (v_prenex_432 (_ BitVec 32))) (let ((.cse175 (store |c_#length| v_prenex_436 v_prenex_434))) (or (= v_arrayElimCell_318 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_435)) (bvsle (bvadd v_prenex_433 (_ bv4 32)) (select .cse175 v_prenex_432)) (= v_arrayElimCell_318 v_prenex_436) (bvsle (bvadd v_prenex_435 (_ bv4 32)) (select .cse175 v_arrayElimCell_318)) (= v_prenex_432 v_prenex_436)))) .cse5 .cse13) (or (forall ((v_prenex_472 (_ BitVec 32)) (v_arrayElimCell_600 (_ BitVec 32)) (v_prenex_60 (_ BitVec 32)) (v_prenex_474 (_ BitVec 32)) (v_prenex_473 (_ BitVec 32))) (let ((.cse176 (select (store |c_#length| v_prenex_474 v_prenex_473) v_arrayElimCell_600))) (or (not (bvsle (_ bv0 32) v_prenex_60)) (bvsle (bvadd v_prenex_60 (_ bv4 32)) .cse176) (= v_arrayElimCell_600 v_prenex_474) (bvsle (bvadd v_prenex_472 (_ bv4 32)) .cse176) (= v_arrayElimCell_600 c_main_~x~0.base)))) .cse7) (or .cse0 .cse5 (forall ((v_arrayElimCell_236 (_ BitVec 32)) (v_prenex_525 (_ BitVec 32)) (v_prenex_524 (_ BitVec 32)) (v_prenex_523 (_ BitVec 32)) (v_prenex_522 (_ BitVec 32)) (v_prenex_521 (_ BitVec 32))) (let ((.cse179 (store |c_#length| v_prenex_525 v_prenex_523))) (let ((.cse178 (bvadd v_prenex_522 (_ bv4 32))) (.cse177 (select .cse179 v_arrayElimCell_236))) (or (= v_prenex_521 v_prenex_525) (bvsle (bvadd v_prenex_524 (_ bv4 32)) .cse177) (bvsle .cse178 (select .cse179 v_prenex_521)) (not (bvsle (_ bv0 32) v_prenex_524)) (= v_arrayElimCell_236 v_prenex_525) (= v_arrayElimCell_236 c_main_~x~0.base) (bvsle .cse178 .cse177))))) .cse13) (or .cse9 .cse0 .cse7 (forall ((v_arrayElimCell_475 (_ BitVec 32)) (v_arrayElimCell_123 (_ BitVec 32)) (v_prenex_753 (_ BitVec 32)) (v_prenex_752 (_ BitVec 32)) (v_prenex_751 (_ BitVec 32))) (let ((.cse180 (select (store |c_#length| v_prenex_753 v_prenex_752) v_arrayElimCell_475))) (or (bvsle (bvadd v_arrayElimCell_123 (_ bv4 32)) .cse180) (not (bvsle (_ bv0 32) v_arrayElimCell_123)) (= v_arrayElimCell_475 v_prenex_753) (bvsle (bvadd v_prenex_751 (_ bv4 32)) .cse180))))) (or .cse0 (forall ((v_prenex_560 (_ BitVec 32)) (v_prenex_559 (_ BitVec 32)) (v_prenex_558 (_ BitVec 32)) (v_prenex_557 (_ BitVec 32)) (v_prenex_102 (_ BitVec 32)) (v_prenex_561 (_ BitVec 32))) (let ((.cse183 (store |c_#length| v_prenex_561 v_prenex_559))) (let ((.cse182 (bvadd v_prenex_558 (_ bv4 32))) (.cse181 (select .cse183 v_prenex_102))) (or (bvsle (bvadd v_prenex_560 (_ bv4 32)) .cse181) (= v_prenex_102 v_prenex_561) (= v_prenex_102 c_main_~x~0.base) (= v_prenex_557 v_prenex_561) (bvsle .cse182 (select .cse183 v_prenex_557)) (bvsle .cse182 .cse181) (not (bvsle (_ bv0 32) v_prenex_560)))))) .cse5 .cse13)))) is different from true [2018-10-27 04:55:54,359 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 30 [2018-10-27 04:55:54,786 WARN L179 SmtUtils]: Spent 425.00 ms on a formula simplification. DAG size of input: 29 DAG size of output: 24 [2018-10-27 04:55:54,930 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 16 treesize of output 14 [2018-10-27 04:55:54,930 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:55:55,004 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:55:55,025 INFO L267 ElimStorePlain]: Start of recursive call 1: 10 dim-0 vars, 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:55:55,025 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 13 variables, input treesize:79, output treesize:6 [2018-10-27 04:55:55,184 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-10-27 04:55:55,186 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:55:55,186 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/z3 Starting monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-27 04:55:55,196 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:55:55,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:55:55,268 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:55:55,275 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:55:55,275 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:55:55,279 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:55:55,279 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-27 04:55:55,327 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 9 [2018-10-27 04:55:55,327 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:55:55,342 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:55:55,342 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:55:55,356 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:55:55,356 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:27, output treesize:19 [2018-10-27 04:55:55,421 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:55:55,427 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:55:55,427 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:55:55,432 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:55:55,453 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:55:55,456 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:55:55,456 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:55:55,460 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:55:55,476 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:55:55,476 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:40, output treesize:31 [2018-10-27 04:55:55,634 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-10-27 04:55:55,637 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-27 04:55:55,637 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:55:55,649 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:55:55,675 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 46 [2018-10-27 04:55:55,679 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-27 04:55:55,679 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:55:55,693 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:55:55,709 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:55:55,710 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:65, output treesize:27 [2018-10-27 04:55:55,780 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:55:55,783 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-27 04:55:55,783 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:55:55,787 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:55:55,805 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-10-27 04:55:55,808 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-10-27 04:55:55,808 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:55:55,826 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:55:55,838 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:55:55,838 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:48, output treesize:18 [2018-10-27 04:55:55,946 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:55:55,948 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:55:55,948 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-10-27 04:55:55,948 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:55:55,967 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-10-27 04:55:55,967 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:55:55,981 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:55:55,981 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:32, output treesize:14 [2018-10-27 04:55:55,985 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:55:55,985 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:55:56,386 WARN L179 SmtUtils]: Spent 128.00 ms on a formula simplification that was a NOOP. DAG size: 45 [2018-10-27 04:55:56,392 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:55:56,393 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:55:56,394 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 27 [2018-10-27 04:55:56,395 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:55:56,484 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:55:56,487 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:55:56,488 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 32 [2018-10-27 04:55:56,488 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:55:56,576 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:55:56,578 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:55:56,579 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 25 [2018-10-27 04:55:56,580 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-10-27 04:55:56,676 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-10-27 04:55:56,676 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 7 variables, input treesize:112, output treesize:79 [2018-10-27 04:55:56,962 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:55:56,980 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 3 imperfect interpolant sequences. [2018-10-27 04:55:56,980 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [10, 10, 11] total 27 [2018-10-27 04:55:56,980 INFO L460 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-10-27 04:55:56,981 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-10-27 04:55:56,981 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=96, Invalid=609, Unknown=1, NotChecked=50, Total=756 [2018-10-27 04:55:56,981 INFO L87 Difference]: Start difference. First operand 221 states and 245 transitions. Second operand 28 states. [2018-10-27 04:56:00,910 WARN L854 $PredicateComparison]: unable to prove that (let ((.cse3 (= |c_main_write~$Pointer$_#value.base| c_main_~x~0.base)) (.cse6 (= |c_main_write~$Pointer$_#ptr.base| c_main_~x~0.base)) (.cse189 (bvadd |c_main_write~$Pointer$_#ptr.offset| |c_main_write~$Pointer$_#sizeOfWrittenType|)) (.cse20 (= |c_main_write~$Pointer$_#value.base| |c_main_write~$Pointer$_#ptr.base|)) (.cse0 (= c_main_~x~0.offset |c_main_write~$Pointer$_#ptr.offset|))) (let ((.cse51 (bvsle |c_main_write~$Pointer$_#value.offset| (bvadd |c_main_write~$Pointer$_#value.offset| (_ bv4 32)))) (.cse50 (not .cse0)) (.cse68 (not (bvsle (_ bv0 32) |c_main_write~$Pointer$_#value.offset|))) (.cse11 (not .cse20)) (.cse150 (bvsle c_main_~x~0.offset (bvadd c_main_~x~0.offset (_ bv4 32)))) (.cse58 (not (bvsle .cse189 (select |c_#length| |c_main_write~$Pointer$_#ptr.base|)))) (.cse59 (bvsle (_ bv0 32) c_main_~x~0.offset)) (.cse60 (not (bvsle (_ bv0 32) |c_main_write~$Pointer$_#ptr.offset|))) (.cse61 (not (bvsle |c_main_write~$Pointer$_#ptr.offset| .cse189))) (.cse1 (not .cse6)) (.cse12 (not .cse3))) (and (or .cse0 (forall ((v_prenex_274 (_ BitVec 32)) (v_prenex_273 (_ BitVec 32)) (v_prenex_70 (_ BitVec 32)) (v_arrayElimCell_493 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_70)) (= v_arrayElimCell_493 c_main_~x~0.base) (= v_arrayElimCell_493 v_prenex_273) (bvsle (bvadd v_prenex_70 (_ bv4 32)) (select (store |c_#length| v_prenex_273 v_prenex_274) v_arrayElimCell_493))))) (or .cse0 .cse1 (forall ((v_arrayElimCell_420 (_ BitVec 32)) (v_arrayElimCell_150 (_ BitVec 32)) (|v_main_#Ultimate.alloc_~size_5| (_ BitVec 32)) (v_prenex_2 (_ BitVec 32))) (or (= v_arrayElimCell_420 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_arrayElimCell_150)) (= v_arrayElimCell_420 v_prenex_2) (bvsle (bvadd v_arrayElimCell_150 (_ bv4 32)) (select (store |c_#length| v_prenex_2 |v_main_#Ultimate.alloc_~size_5|) v_arrayElimCell_420))))) (or .cse0 .cse1 (forall ((v_arrayElimCell_634 (_ BitVec 32)) (v_prenex_317 (_ BitVec 32)) (v_prenex_316 (_ BitVec 32)) (v_prenex_315 (_ BitVec 32)) (v_prenex_314 (_ BitVec 32))) (let ((.cse2 (select (store |c_#length| v_prenex_314 v_prenex_316) v_arrayElimCell_634))) (or (not (bvsle (_ bv0 32) v_prenex_317)) (bvsle (bvadd v_prenex_315 (_ bv4 32)) .cse2) (= v_arrayElimCell_634 v_prenex_314) (bvsle (bvadd v_prenex_317 (_ bv4 32)) .cse2))))) (or .cse3 .cse0 (forall ((v_arrayElimCell_354 (_ BitVec 32)) (v_prenex_490 (_ BitVec 32)) (v_prenex_489 (_ BitVec 32)) (v_prenex_488 (_ BitVec 32)) (v_prenex_487 (_ BitVec 32))) (let ((.cse4 (select (store |c_#length| v_prenex_490 v_prenex_488) v_arrayElimCell_354))) (or (bvsle (bvadd v_prenex_489 (_ bv4 32)) .cse4) (= v_arrayElimCell_354 c_main_~x~0.base) (bvsle (bvadd v_prenex_487 (_ bv4 32)) .cse4) (not (bvsle (_ bv0 32) v_prenex_489)) (= v_arrayElimCell_354 v_prenex_490))))) (or .cse3 .cse0 (forall ((v_prenex_719 (_ BitVec 32)) (v_prenex_718 (_ BitVec 32)) (v_prenex_717 (_ BitVec 32)) (v_arrayElimCell_456 (_ BitVec 32)) (v_prenex_716 (_ BitVec 32))) (let ((.cse5 (select (store |c_#length| v_prenex_719 v_prenex_718) v_arrayElimCell_456))) (or (= v_arrayElimCell_456 v_prenex_719) (bvsle (bvadd v_prenex_716 (_ bv4 32)) .cse5) (not (bvsle (_ bv0 32) v_prenex_716)) (bvsle (bvadd v_prenex_717 (_ bv4 32)) .cse5))))) (or .cse0 .cse6 (forall ((v_arrayElimCell_589 (_ BitVec 32)) (v_prenex_219 (_ BitVec 32)) (v_prenex_218 (_ BitVec 32)) (v_prenex_217 (_ BitVec 32)) (v_prenex_216 (_ BitVec 32))) (let ((.cse7 (select (store |c_#length| v_prenex_217 v_prenex_219) v_arrayElimCell_589))) (or (not (bvsle (_ bv0 32) v_prenex_216)) (= v_arrayElimCell_589 c_main_~x~0.base) (= v_arrayElimCell_589 v_prenex_217) (bvsle (bvadd v_prenex_218 (_ bv4 32)) .cse7) (bvsle (bvadd v_prenex_216 (_ bv4 32)) .cse7))))) (or .cse0 .cse6 (forall ((v_prenex_280 (_ BitVec 32)) (v_prenex_279 (_ BitVec 32)) (v_arrayElimCell_471 (_ BitVec 32)) (v_arrayElimCell_163 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_arrayElimCell_163)) (= v_arrayElimCell_471 v_prenex_279) (bvsle (bvadd v_arrayElimCell_163 (_ bv4 32)) (select (store |c_#length| v_prenex_279 v_prenex_280) v_arrayElimCell_471)) (= v_arrayElimCell_471 c_main_~x~0.base)))) (or .cse0 (forall ((v_arrayElimCell_586 (_ BitVec 32)) (v_prenex_171 (_ BitVec 32)) (v_prenex_170 (_ BitVec 32)) (v_prenex_71 (_ BitVec 32)) (v_prenex_169 (_ BitVec 32))) (let ((.cse8 (select (store |c_#length| v_prenex_169 v_prenex_171) v_arrayElimCell_586))) (or (bvsle (bvadd v_prenex_71 (_ bv4 32)) .cse8) (= v_arrayElimCell_586 c_main_~x~0.base) (bvsle (bvadd v_prenex_170 (_ bv4 32)) .cse8) (= v_arrayElimCell_586 v_prenex_169) (not (bvsle (_ bv0 32) v_prenex_71)))))) (or .cse0 .cse6 (forall ((v_arrayElimCell_629 (_ BitVec 32)) (v_prenex_499 (_ BitVec 32)) (v_prenex_498 (_ BitVec 32)) (v_prenex_497 (_ BitVec 32)) (v_prenex_496 (_ BitVec 32))) (let ((.cse9 (select (store |c_#length| v_prenex_498 v_prenex_497) v_arrayElimCell_629))) (or (bvsle (bvadd v_prenex_499 (_ bv4 32)) .cse9) (= v_arrayElimCell_629 v_prenex_498) (not (bvsle (_ bv0 32) v_prenex_499)) (bvsle (bvadd v_prenex_496 (_ bv4 32)) .cse9))))) (or .cse3 .cse0 .cse1 (forall ((v_arrayElimCell_399 (_ BitVec 32)) (v_prenex_656 (_ BitVec 32)) (v_prenex_655 (_ BitVec 32)) (v_prenex_654 (_ BitVec 32)) (v_prenex_653 (_ BitVec 32))) (let ((.cse10 (select (store |c_#length| v_prenex_655 v_prenex_654) v_arrayElimCell_399))) (or (bvsle (bvadd v_prenex_656 (_ bv4 32)) .cse10) (= v_arrayElimCell_399 v_prenex_655) (bvsle (bvadd v_prenex_653 (_ bv4 32)) .cse10) (= v_arrayElimCell_399 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_656)))))) (or .cse0 .cse11 .cse12 (forall ((v_arrayElimCell_653 (_ BitVec 32)) (v_prenex_587 (_ BitVec 32)) (v_prenex_586 (_ BitVec 32)) (v_prenex_585 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_586 (_ bv4 32)) (select (store |c_#length| v_prenex_587 v_prenex_585) v_arrayElimCell_653)) (= v_arrayElimCell_653 v_prenex_587) (not (bvsle (_ bv0 32) v_prenex_586))))) (or .cse0 (forall ((v_prenex_252 (_ BitVec 32)) (v_prenex_251 (_ BitVec 32)) (v_prenex_39 (_ BitVec 32)) (v_arrayElimCell_373 (_ BitVec 32)) (v_prenex_253 (_ BitVec 32))) (let ((.cse13 (select (store |c_#length| v_prenex_251 v_prenex_253) v_arrayElimCell_373))) (or (= v_arrayElimCell_373 v_prenex_251) (bvsle (bvadd v_prenex_39 (_ bv4 32)) .cse13) (not (bvsle (_ bv0 32) v_prenex_39)) (bvsle (bvadd v_prenex_252 (_ bv4 32)) .cse13)))) .cse6) (or .cse6 (forall ((v_prenex_162 (_ BitVec 32)) (v_prenex_579 (_ BitVec 32)) (v_prenex_578 (_ BitVec 32)) (v_prenex_577 (_ BitVec 32)) (v_prenex_576 (_ BitVec 32)) (v_prenex_575 (_ BitVec 32))) (let ((.cse18 (store |c_#length| v_prenex_578 v_prenex_577))) (let ((.cse14 (bvadd v_prenex_576 (_ bv4 32))) (.cse15 (select .cse18 v_prenex_575)) (.cse17 (bvadd v_prenex_579 (_ bv4 32))) (.cse16 (select .cse18 v_prenex_162))) (or (bvsle .cse14 .cse15) (= v_prenex_162 c_main_~x~0.base) (bvsle .cse14 .cse16) (not (bvsle (_ bv0 32) v_prenex_579)) (bvsle .cse17 .cse15) (= v_prenex_575 v_prenex_578) (bvsle .cse17 .cse16) (= v_prenex_162 v_prenex_578)))))) (or (forall ((v_arrayElimCell_613 (_ BitVec 32)) (v_prenex_668 (_ BitVec 32)) (v_prenex_667 (_ BitVec 32)) (v_prenex_666 (_ BitVec 32)) (v_prenex_665 (_ BitVec 32))) (let ((.cse19 (select (store |c_#length| v_prenex_668 v_prenex_666) v_arrayElimCell_613))) (or (bvsle (bvadd v_prenex_667 (_ bv4 32)) .cse19) (= v_arrayElimCell_613 v_prenex_668) (not (bvsle (_ bv0 32) v_prenex_667)) (bvsle (bvadd v_prenex_665 (_ bv4 32)) .cse19)))) .cse0 .cse12 .cse20) (or .cse0 .cse6 (forall ((v_arrayElimCell_390 (_ BitVec 32)) (v_prenex_546 (_ BitVec 32)) (v_prenex_545 (_ BitVec 32)) (v_prenex_544 (_ BitVec 32)) (v_prenex_543 (_ BitVec 32)) (v_prenex_542 (_ BitVec 32))) (let ((.cse25 (store |c_#length| v_prenex_545 v_prenex_544))) (let ((.cse21 (bvadd v_prenex_546 (_ bv4 32))) (.cse22 (select .cse25 v_arrayElimCell_390)) (.cse24 (bvadd v_prenex_543 (_ bv4 32))) (.cse23 (select .cse25 v_prenex_542))) (or (= v_prenex_542 v_prenex_545) (bvsle .cse21 .cse22) (= v_arrayElimCell_390 c_main_~x~0.base) (= v_arrayElimCell_390 v_prenex_545) (bvsle .cse21 .cse23) (bvsle .cse24 .cse22) (not (bvsle (_ bv0 32) v_prenex_546)) (bvsle .cse24 .cse23)))))) (or .cse0 .cse1 (forall ((v_arrayElimCell_401 (_ BitVec 32)) (v_prenex_479 (_ BitVec 32)) (v_prenex_478 (_ BitVec 32)) (v_prenex_477 (_ BitVec 32)) (v_prenex_476 (_ BitVec 32)) (v_prenex_475 (_ BitVec 32))) (let ((.cse30 (store |c_#length| v_prenex_478 v_prenex_477))) (let ((.cse26 (bvadd v_prenex_479 (_ bv4 32))) (.cse28 (select .cse30 v_arrayElimCell_401)) (.cse29 (bvadd v_prenex_476 (_ bv4 32))) (.cse27 (select .cse30 v_prenex_475))) (or (= v_prenex_475 v_prenex_478) (bvsle .cse26 .cse27) (bvsle .cse26 .cse28) (= v_arrayElimCell_401 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_479)) (bvsle .cse29 .cse28) (= v_arrayElimCell_401 v_prenex_478) (bvsle .cse29 .cse27)))))) (or .cse0 .cse1 (forall ((v_prenex_593 (_ BitVec 32)) (v_prenex_592 (_ BitVec 32)) (v_arrayElimCell_192 (_ BitVec 32)) (v_prenex_595 (_ BitVec 32)) (v_prenex_594 (_ BitVec 32))) (let ((.cse31 (select (store |c_#length| v_prenex_595 v_prenex_593) v_arrayElimCell_192))) (or (bvsle (bvadd v_prenex_594 (_ bv4 32)) .cse31) (bvsle (bvadd v_prenex_592 (_ bv4 32)) .cse31) (= v_arrayElimCell_192 v_prenex_595) (not (bvsle (_ bv0 32) v_prenex_594)))))) (or (forall ((v_arrayElimCell_322 (_ BitVec 32)) (v_arrayElimCell_78 (_ BitVec 32)) (v_prenex_699 (_ BitVec 32)) (v_prenex_698 (_ BitVec 32)) (v_prenex_697 (_ BitVec 32))) (let ((.cse32 (select (store |c_#length| v_prenex_699 v_prenex_698) v_arrayElimCell_322))) (or (bvsle (bvadd v_prenex_697 (_ bv4 32)) .cse32) (bvsle (bvadd v_arrayElimCell_78 (_ bv4 32)) .cse32) (= v_arrayElimCell_322 v_prenex_699) (not (bvsle (_ bv0 32) v_arrayElimCell_78))))) .cse6) (or (forall ((v_arrayElimCell_647 (_ BitVec 32)) (v_prenex_204 (_ BitVec 32)) (v_prenex_203 (_ BitVec 32)) (v_prenex_202 (_ BitVec 32)) (v_prenex_36 (_ BitVec 32))) (let ((.cse33 (select (store |c_#length| v_prenex_202 v_prenex_204) v_arrayElimCell_647))) (or (= v_arrayElimCell_647 v_prenex_202) (bvsle (bvadd v_prenex_203 (_ bv4 32)) .cse33) (= v_arrayElimCell_647 c_main_~x~0.base) (bvsle (bvadd v_prenex_36 (_ bv4 32)) .cse33) (not (bvsle (_ bv0 32) v_prenex_36))))) .cse0 .cse6) (or .cse0 (forall ((v_prenex_536 (_ BitVec 32)) (v_prenex_535 (_ BitVec 32)) (v_prenex_534 (_ BitVec 32)) (v_arrayElimCell_660 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_535)) (= v_arrayElimCell_660 v_prenex_536) (bvsle (bvadd v_prenex_535 (_ bv4 32)) (select (store |c_#length| v_prenex_536 v_prenex_534) v_arrayElimCell_660)))) .cse12 .cse20) (or .cse0 (forall ((v_prenex_591 (_ BitVec 32)) (v_prenex_590 (_ BitVec 32)) (v_arrayElimCell_239 (_ BitVec 32)) (v_prenex_589 (_ BitVec 32)) (v_prenex_588 (_ BitVec 32))) (let ((.cse34 (select (store |c_#length| v_prenex_591 v_prenex_589) v_arrayElimCell_239))) (or (= v_arrayElimCell_239 c_main_~x~0.base) (bvsle (bvadd v_prenex_590 (_ bv4 32)) .cse34) (not (bvsle (_ bv0 32) v_prenex_590)) (= v_arrayElimCell_239 v_prenex_591) (bvsle (bvadd v_prenex_588 (_ bv4 32)) .cse34)))) .cse12 .cse20) (or .cse3 .cse0 .cse6 (forall ((v_prenex_394 (_ BitVec 32)) (v_prenex_393 (_ BitVec 32)) (v_prenex_392 (_ BitVec 32)) (v_prenex_391 (_ BitVec 32)) (v_prenex_160 (_ BitVec 32))) (let ((.cse35 (select (store |c_#length| v_prenex_391 v_prenex_393) v_prenex_160))) (or (= v_prenex_160 c_main_~x~0.base) (bvsle (bvadd v_prenex_394 (_ bv4 32)) .cse35) (not (bvsle (_ bv0 32) v_prenex_394)) (bvsle (bvadd v_prenex_392 (_ bv4 32)) .cse35) (= v_prenex_160 v_prenex_391))))) (or .cse0 .cse6 .cse12 (forall ((v_prenex_347 (_ BitVec 32)) (v_prenex_346 (_ BitVec 32)) (v_prenex_345 (_ BitVec 32)) (v_prenex_344 (_ BitVec 32)) (v_prenex_343 (_ BitVec 32)) (v_arrayElimCell_341 (_ BitVec 32))) (let ((.cse38 (store |c_#length| v_prenex_343 v_prenex_346))) (let ((.cse36 (bvadd v_prenex_347 (_ bv4 32))) (.cse37 (select .cse38 v_prenex_344))) (or (= v_arrayElimCell_341 v_prenex_343) (= v_arrayElimCell_341 c_main_~x~0.base) (bvsle .cse36 .cse37) (not (bvsle (_ bv0 32) v_prenex_347)) (bvsle .cse36 (select .cse38 v_arrayElimCell_341)) (bvsle (bvadd v_prenex_345 (_ bv4 32)) .cse37) (= v_prenex_344 v_prenex_343)))))) (or .cse0 (forall ((v_arrayElimCell_521 (_ BitVec 32)) (v_prenex_369 (_ BitVec 32)) (v_prenex_368 (_ BitVec 32)) (v_prenex_367 (_ BitVec 32)) (v_prenex_366 (_ BitVec 32))) (let ((.cse39 (select (store |c_#length| v_prenex_366 v_prenex_368) v_arrayElimCell_521))) (or (bvsle (bvadd v_prenex_369 (_ bv4 32)) .cse39) (not (bvsle (_ bv0 32) v_prenex_369)) (bvsle (bvadd v_prenex_367 (_ bv4 32)) .cse39) (= v_arrayElimCell_521 v_prenex_366) (= v_arrayElimCell_521 c_main_~x~0.base)))) .cse12 .cse20) (or .cse3 .cse0 (forall ((v_prenex_351 (_ BitVec 32)) (v_prenex_38 (_ BitVec 32)) (v_arrayElimCell_230 (_ BitVec 32)) (v_prenex_352 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_38)) (bvsle (bvadd v_prenex_38 (_ bv4 32)) (select (store |c_#length| v_prenex_351 v_prenex_352) v_arrayElimCell_230)) (= v_arrayElimCell_230 v_prenex_351) (= v_arrayElimCell_230 c_main_~x~0.base))) .cse6) (or .cse0 (forall ((v_arrayElimCell_531 (_ BitVec 32)) (v_prenex_774 (_ BitVec 32)) (v_prenex_773 (_ BitVec 32)) (v_prenex_772 (_ BitVec 32)) (v_prenex_771 (_ BitVec 32)) (v_prenex_770 (_ BitVec 32))) (let ((.cse40 (store |c_#length| v_prenex_774 v_prenex_773))) (or (bvsle (bvadd v_prenex_772 (_ bv4 32)) (select .cse40 v_prenex_771)) (bvsle (bvadd v_prenex_770 (_ bv4 32)) (select .cse40 v_arrayElimCell_531)) (= v_arrayElimCell_531 v_prenex_774) (not (bvsle (_ bv0 32) v_prenex_770)) (= v_arrayElimCell_531 c_main_~x~0.base) (= v_prenex_771 v_prenex_774)))) .cse12 .cse20) (or .cse0 (forall ((v_prenex_629 (_ BitVec 32)) (v_prenex_628 (_ BitVec 32)) (v_arrayElimCell_638 (_ BitVec 32)) (v_prenex_46 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_46)) (= v_arrayElimCell_638 c_main_~x~0.base) (= v_arrayElimCell_638 v_prenex_629) (bvsle (bvadd v_prenex_46 (_ bv4 32)) (select (store |c_#length| v_prenex_629 v_prenex_628) v_arrayElimCell_638)))) .cse6) (or .cse3 .cse6 (forall ((v_prenex_471 (_ BitVec 32)) (v_prenex_470 (_ BitVec 32)) (v_prenex_10 (_ BitVec 32)) (v_prenex_469 (_ BitVec 32)) (v_arrayElimCell_254 (_ BitVec 32))) (let ((.cse41 (select (store |c_#length| v_prenex_471 v_prenex_470) v_arrayElimCell_254))) (or (bvsle (bvadd v_prenex_469 (_ bv4 32)) .cse41) (= v_arrayElimCell_254 v_prenex_471) (not (bvsle (_ bv0 32) v_prenex_10)) (bvsle (bvadd v_prenex_10 (_ bv4 32)) .cse41))))) (or .cse3 (forall ((v_prenex_9 (_ BitVec 32)) (v_arrayElimCell_218 (_ BitVec 32)) (v_prenex_501 (_ BitVec 32)) (v_prenex_500 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_9)) (= v_arrayElimCell_218 c_main_~x~0.base) (bvsle (bvadd v_prenex_9 (_ bv4 32)) (select (store |c_#length| v_prenex_501 v_prenex_500) v_arrayElimCell_218)) (= v_arrayElimCell_218 v_prenex_501))) .cse6) (or .cse3 .cse0 .cse1 (forall ((v_prenex_54 (_ BitVec 32)) (v_arrayElimCell_547 (_ BitVec 32)) (v_prenex_388 (_ BitVec 32)) (v_prenex_387 (_ BitVec 32)) (v_prenex_386 (_ BitVec 32))) (let ((.cse42 (select (store |c_#length| v_prenex_386 v_prenex_388) v_arrayElimCell_547))) (or (= v_arrayElimCell_547 c_main_~x~0.base) (= v_arrayElimCell_547 v_prenex_386) (bvsle (bvadd v_prenex_54 (_ bv4 32)) .cse42) (bvsle (bvadd v_prenex_387 (_ bv4 32)) .cse42) (not (bvsle (_ bv0 32) v_prenex_54)))))) (or .cse0 (forall ((v_arrayElimCell_702 (_ BitVec 32)) (v_prenex_426 (_ BitVec 32)) (v_prenex_425 (_ BitVec 32)) (v_prenex_424 (_ BitVec 32)) (v_prenex_423 (_ BitVec 32))) (let ((.cse43 (select (store |c_#length| v_prenex_425 v_prenex_424) v_arrayElimCell_702))) (or (bvsle (bvadd v_prenex_426 (_ bv4 32)) .cse43) (bvsle (bvadd v_prenex_423 (_ bv4 32)) .cse43) (= v_arrayElimCell_702 v_prenex_425) (not (bvsle (_ bv0 32) v_prenex_426)) (= v_arrayElimCell_702 c_main_~x~0.base)))) .cse11 .cse12) (or .cse0 .cse6 (forall ((v_arrayElimCell_344 (_ BitVec 32)) (v_prenex_328 (_ BitVec 32)) (v_prenex_327 (_ BitVec 32)) (v_prenex_326 (_ BitVec 32)) (v_prenex_325 (_ BitVec 32))) (let ((.cse44 (select (store |c_#length| v_prenex_325 v_prenex_327) v_arrayElimCell_344))) (or (= v_arrayElimCell_344 c_main_~x~0.base) (bvsle (bvadd v_prenex_328 (_ bv4 32)) .cse44) (bvsle (bvadd v_prenex_326 (_ bv4 32)) .cse44) (not (bvsle (_ bv0 32) v_prenex_328)) (= v_arrayElimCell_344 v_prenex_325))))) (or .cse3 .cse0 (forall ((v_prenex_607 (_ BitVec 32)) (v_prenex_606 (_ BitVec 32)) (v_prenex_605 (_ BitVec 32)) (v_arrayElimCell_347 (_ BitVec 32)) (v_prenex_604 (_ BitVec 32))) (let ((.cse45 (select (store |c_#length| v_prenex_607 v_prenex_605) v_arrayElimCell_347))) (or (bvsle (bvadd v_prenex_604 (_ bv4 32)) .cse45) (= v_arrayElimCell_347 v_prenex_607) (= v_arrayElimCell_347 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_606)) (bvsle (bvadd v_prenex_606 (_ bv4 32)) .cse45)))) .cse6) (or (forall ((v_arrayElimCell_387 (_ BitVec 32)) (v_prenex_518 (_ BitVec 32)) (v_prenex_517 (_ BitVec 32)) (v_prenex_516 (_ BitVec 32)) (v_prenex_515 (_ BitVec 32))) (let ((.cse46 (select (store |c_#length| v_prenex_517 v_prenex_516) v_arrayElimCell_387))) (or (bvsle (bvadd v_prenex_518 (_ bv4 32)) .cse46) (not (bvsle (_ bv0 32) v_prenex_518)) (bvsle (bvadd v_prenex_515 (_ bv4 32)) .cse46) (= v_arrayElimCell_387 c_main_~x~0.base) (= v_arrayElimCell_387 v_prenex_517)))) .cse0 .cse6) (or .cse0 (forall ((v_arrayElimCell_574 (_ BitVec 32)) (v_prenex_186 (_ BitVec 32)) (v_prenex_185 (_ BitVec 32)) (v_prenex_184 (_ BitVec 32)) (v_arrayElimCell_117 (_ BitVec 32))) (let ((.cse47 (select (store |c_#length| v_prenex_185 v_prenex_184) v_arrayElimCell_574))) (or (bvsle (bvadd v_arrayElimCell_117 (_ bv4 32)) .cse47) (= v_arrayElimCell_574 v_prenex_185) (not (bvsle (_ bv0 32) v_arrayElimCell_117)) (bvsle (bvadd v_prenex_186 (_ bv4 32)) .cse47)))) .cse12 .cse20) (or .cse6 (forall ((v_arrayElimCell_134 (_ BitVec 32)) (v_arrayElimCell_501 (_ BitVec 32)) (v_prenex_658 (_ BitVec 32)) (v_prenex_657 (_ BitVec 32))) (or (= v_arrayElimCell_501 v_prenex_658) (not (bvsle (_ bv0 32) v_arrayElimCell_134)) (bvsle (bvadd v_arrayElimCell_134 (_ bv4 32)) (select (store |c_#length| v_prenex_658 v_prenex_657) v_arrayElimCell_501)) (= v_arrayElimCell_501 c_main_~x~0.base)))) (or .cse0 .cse6 (forall ((v_arrayElimCell_189 (_ BitVec 32)) (v_prenex_713 (_ BitVec 32)) (v_prenex_712 (_ BitVec 32)) (v_prenex_711 (_ BitVec 32)) (v_prenex_710 (_ BitVec 32))) (let ((.cse48 (select (store |c_#length| v_prenex_713 v_prenex_712) v_arrayElimCell_189))) (or (not (bvsle (_ bv0 32) v_prenex_710)) (= v_arrayElimCell_189 v_prenex_713) (bvsle (bvadd v_prenex_710 (_ bv4 32)) .cse48) (bvsle (bvadd v_prenex_711 (_ bv4 32)) .cse48))))) (or (forall ((v_prenex_269 (_ BitVec 32)) (v_prenex_268 (_ BitVec 32)) (v_prenex_267 (_ BitVec 32)) (v_prenex_266 (_ BitVec 32))) (or (= v_prenex_267 v_prenex_266) (not (bvsle (_ bv0 32) v_prenex_268)) (bvsle (bvadd v_prenex_268 (_ bv4 32)) (select (store |c_#length| v_prenex_266 v_prenex_269) v_prenex_267)))) .cse12) (or .cse6 (forall ((v_prenex_319 (_ BitVec 32)) (v_prenex_318 (_ BitVec 32)) (v_prenex_16 (_ BitVec 32)) (v_prenex_320 (_ BitVec 32)) (v_prenex_143 (_ BitVec 32))) (let ((.cse49 (select (store |c_#length| v_prenex_318 v_prenex_320) v_prenex_143))) (or (= v_prenex_143 v_prenex_318) (bvsle (bvadd v_prenex_16 (_ bv4 32)) .cse49) (bvsle (bvadd v_prenex_319 (_ bv4 32)) .cse49) (= v_prenex_143 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_16)))))) (or .cse3 .cse1 .cse50 .cse51) (or .cse3 .cse0 .cse1 (forall ((v_arrayElimCell_479 (_ BitVec 32)) (v_prenex_378 (_ BitVec 32)) (v_prenex_377 (_ BitVec 32)) (v_prenex_376 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_378 (_ bv4 32)) (select (store |c_#length| v_prenex_376 v_prenex_377) v_arrayElimCell_479)) (= v_arrayElimCell_479 c_main_~x~0.base) (= v_arrayElimCell_479 v_prenex_376) (not (bvsle (_ bv0 32) v_prenex_378))))) (or .cse3 .cse0 .cse6 (forall ((v_arrayElimCell_578 (_ BitVec 32)) (v_prenex_329 (_ BitVec 32)) (v_prenex_35 (_ BitVec 32)) (v_prenex_330 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_35 (_ bv4 32)) (select (store |c_#length| v_prenex_329 v_prenex_330) v_arrayElimCell_578)) (= v_arrayElimCell_578 v_prenex_329) (not (bvsle (_ bv0 32) v_prenex_35)) (= v_arrayElimCell_578 c_main_~x~0.base)))) (or .cse0 .cse1 (forall ((v_arrayElimCell_365 (_ BitVec 32)) (v_prenex_262 (_ BitVec 32)) (v_prenex_42 (_ BitVec 32)) (v_prenex_261 (_ BitVec 32)) (v_prenex_260 (_ BitVec 32))) (let ((.cse52 (select (store |c_#length| v_prenex_260 v_prenex_262) v_arrayElimCell_365))) (or (= v_arrayElimCell_365 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_42)) (bvsle (bvadd v_prenex_42 (_ bv4 32)) .cse52) (bvsle (bvadd v_prenex_261 (_ bv4 32)) .cse52) (= v_arrayElimCell_365 v_prenex_260))))) (or (forall ((v_prenex_294 (_ BitVec 32)) (v_prenex_293 (_ BitVec 32)) (v_prenex_292 (_ BitVec 32)) (v_prenex_291 (_ BitVec 32)) (v_prenex_290 (_ BitVec 32)) (v_prenex_116 (_ BitVec 32))) (let ((.cse57 (store |c_#length| v_prenex_290 v_prenex_293))) (let ((.cse53 (bvadd v_prenex_292 (_ bv4 32))) (.cse56 (select .cse57 v_prenex_291)) (.cse55 (bvadd v_prenex_294 (_ bv4 32))) (.cse54 (select .cse57 v_prenex_116))) (or (not (bvsle (_ bv0 32) v_prenex_294)) (= v_prenex_291 v_prenex_290) (bvsle .cse53 .cse54) (= v_prenex_116 v_prenex_290) (bvsle .cse55 .cse56) (= v_prenex_116 c_main_~x~0.base) (bvsle .cse53 .cse56) (bvsle .cse55 .cse54))))) .cse0 .cse6) (or .cse0 .cse6 (forall ((v_prenex_528 (_ BitVec 32)) (v_prenex_527 (_ BitVec 32)) (v_prenex_526 (_ BitVec 32)) (v_arrayElimCell_284 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_527)) (= v_arrayElimCell_284 c_main_~x~0.base) (= v_arrayElimCell_284 v_prenex_528) (bvsle (bvadd v_prenex_527 (_ bv4 32)) (select (store |c_#length| v_prenex_528 v_prenex_526) v_arrayElimCell_284))))) (or .cse0 .cse6 (forall ((v_arrayElimCell_146 (_ BitVec 32)) (v_arrayElimCell_326 (_ BitVec 32)) (v_prenex_337 (_ BitVec 32)) (v_prenex_336 (_ BitVec 32))) (or (= v_arrayElimCell_326 c_main_~x~0.base) (bvsle (bvadd v_arrayElimCell_146 (_ bv4 32)) (select (store |c_#length| v_prenex_336 v_prenex_337) v_arrayElimCell_326)) (= v_arrayElimCell_326 v_prenex_336) (not (bvsle (_ bv0 32) v_arrayElimCell_146))))) (or .cse58 .cse59 (forall ((|v_main_#Ultimate.alloc_#res.base_5| (_ BitVec 32))) (not (= (_ bv0 1) (select |c_#valid| |v_main_#Ultimate.alloc_#res.base_5|)))) .cse60 .cse61) (or (forall ((v_prenex_442 (_ BitVec 32)) (v_arrayElimCell_494 (_ BitVec 32)) (v_prenex_441 (_ BitVec 32)) (v_prenex_440 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_441 (_ bv4 32)) (select (store |c_#length| v_prenex_442 v_prenex_440) v_arrayElimCell_494)) (= v_arrayElimCell_494 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_441)) (= v_arrayElimCell_494 v_prenex_442))) .cse0 .cse6) (or .cse0 .cse6 (forall ((v_prenex_51 (_ BitVec 32)) (v_prenex_181 (_ BitVec 32)) (v_prenex_180 (_ BitVec 32)) (v_prenex_179 (_ BitVec 32)) (v_arrayElimCell_570 (_ BitVec 32))) (let ((.cse62 (select (store |c_#length| v_prenex_180 v_prenex_179) v_arrayElimCell_570))) (or (= v_arrayElimCell_570 v_prenex_180) (bvsle (bvadd v_prenex_181 (_ bv4 32)) .cse62) (bvsle (bvadd v_prenex_51 (_ bv4 32)) .cse62) (= v_arrayElimCell_570 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_51)))))) (or .cse3 .cse0 .cse6 (forall ((v_prenex_509 (_ BitVec 32)) (v_arrayElimCell_258 (_ BitVec 32)) (v_prenex_50 (_ BitVec 32)) (v_prenex_511 (_ BitVec 32)) (v_prenex_510 (_ BitVec 32))) (let ((.cse63 (select (store |c_#length| v_prenex_511 v_prenex_510) v_arrayElimCell_258))) (or (bvsle (bvadd v_prenex_50 (_ bv4 32)) .cse63) (= v_arrayElimCell_258 v_prenex_511) (= v_arrayElimCell_258 c_main_~x~0.base) (bvsle (bvadd v_prenex_509 (_ bv4 32)) .cse63) (not (bvsle (_ bv0 32) v_prenex_50)))))) (or .cse0 (forall ((v_prenex_670 (_ BitVec 32)) (v_arrayElimCell_358 (_ BitVec 32)) (v_prenex_669 (_ BitVec 32)) (v_prenex_673 (_ BitVec 32)) (v_prenex_672 (_ BitVec 32)) (v_prenex_671 (_ BitVec 32))) (let ((.cse66 (store |c_#length| v_prenex_673 v_prenex_671))) (let ((.cse64 (bvadd v_prenex_672 (_ bv4 32))) (.cse65 (select .cse66 v_prenex_669))) (or (= v_prenex_669 v_prenex_673) (bvsle .cse64 .cse65) (= v_arrayElimCell_358 c_main_~x~0.base) (bvsle .cse64 (select .cse66 v_arrayElimCell_358)) (bvsle (bvadd v_prenex_670 (_ bv4 32)) .cse65) (= v_arrayElimCell_358 v_prenex_673) (not (bvsle (_ bv0 32) v_prenex_672)))))) .cse12 .cse20) (or .cse3 (forall ((v_arrayElimCell_355 (_ BitVec 32)) (v_prenex_313 (_ BitVec 32)) (v_prenex_312 (_ BitVec 32)) (v_prenex_311 (_ BitVec 32)) (v_prenex_310 (_ BitVec 32))) (let ((.cse67 (select (store |c_#length| v_prenex_310 v_prenex_312) v_arrayElimCell_355))) (or (= v_arrayElimCell_355 v_prenex_310) (not (bvsle (_ bv0 32) v_prenex_313)) (bvsle (bvadd v_prenex_313 (_ bv4 32)) .cse67) (= v_arrayElimCell_355 c_main_~x~0.base) (bvsle (bvadd v_prenex_311 (_ bv4 32)) .cse67)))) .cse0 .cse6) (or .cse0 .cse12 (forall ((v_prenex_749 (_ BitVec 32)) (v_prenex_748 (_ BitVec 32)) (v_arrayElimCell_656 (_ BitVec 32)) (v_prenex_750 (_ BitVec 32))) (or (= v_arrayElimCell_656 v_prenex_750) (bvsle (bvadd v_prenex_748 (_ bv4 32)) (select (store |c_#length| v_prenex_750 v_prenex_749) v_arrayElimCell_656)) (not (bvsle (_ bv0 32) v_prenex_748))))) (or .cse3 .cse1 .cse50 .cse68 (forall ((v_prenex_178 (_ BitVec 32)) (v_prenex_177 (_ BitVec 32))) (or (bvsle (bvadd |c_main_write~$Pointer$_#value.offset| (_ bv4 32)) (select (store |c_#length| v_prenex_178 v_prenex_177) |c_main_write~$Pointer$_#value.base|)) (= |c_main_write~$Pointer$_#value.base| v_prenex_178)))) (or .cse3 (forall ((v_arrayElimCell_516 (_ BitVec 32)) (v_prenex_289 (_ BitVec 32)) (v_prenex_288 (_ BitVec 32)) (v_prenex_287 (_ BitVec 32)) (v_prenex_13 (_ BitVec 32))) (let ((.cse69 (select (store |c_#length| v_prenex_287 v_prenex_289) v_arrayElimCell_516))) (or (bvsle (bvadd v_prenex_13 (_ bv4 32)) .cse69) (= v_arrayElimCell_516 c_main_~x~0.base) (bvsle (bvadd v_prenex_288 (_ bv4 32)) .cse69) (= v_arrayElimCell_516 v_prenex_287) (not (bvsle (_ bv0 32) v_prenex_13))))) .cse6) (or (forall ((v_prenex_409 (_ BitVec 32)) (v_prenex_408 (_ BitVec 32)) (v_arrayElimCell_381 (_ BitVec 32)) (v_prenex_410 (_ BitVec 32)) (v_prenex_22 (_ BitVec 32))) (let ((.cse70 (select (store |c_#length| v_prenex_408 v_prenex_410) v_arrayElimCell_381))) (or (= v_arrayElimCell_381 c_main_~x~0.base) (bvsle (bvadd v_prenex_409 (_ bv4 32)) .cse70) (= v_arrayElimCell_381 v_prenex_408) (bvsle (bvadd v_prenex_22 (_ bv4 32)) .cse70) (not (bvsle (_ bv0 32) v_prenex_22))))) .cse6) (or (forall ((v_prenex_549 (_ BitVec 32)) (v_prenex_548 (_ BitVec 32)) (v_prenex_547 (_ BitVec 32)) (v_arrayElimCell_351 (_ BitVec 32)) (v_prenex_550 (_ BitVec 32))) (let ((.cse71 (select (store |c_#length| v_prenex_550 v_prenex_548) v_arrayElimCell_351))) (or (not (bvsle (_ bv0 32) v_prenex_549)) (bvsle (bvadd v_prenex_549 (_ bv4 32)) .cse71) (bvsle (bvadd v_prenex_547 (_ bv4 32)) .cse71) (= v_arrayElimCell_351 v_prenex_550) (= v_arrayElimCell_351 c_main_~x~0.base)))) .cse0) (or .cse0 (forall ((v_prenex_659 (_ BitVec 32)) (v_arrayElimCell_507 (_ BitVec 32)) (v_prenex_661 (_ BitVec 32)) (v_prenex_660 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_660 (_ bv4 32)) (select (store |c_#length| v_prenex_661 v_prenex_659) v_arrayElimCell_507)) (= v_arrayElimCell_507 v_prenex_661) (not (bvsle (_ bv0 32) v_prenex_660)) (= v_arrayElimCell_507 c_main_~x~0.base))) .cse6) (or .cse0 .cse6 (forall ((v_prenex_350 (_ BitVec 32)) (v_prenex_349 (_ BitVec 32)) (v_prenex_348 (_ BitVec 32)) (v_arrayElimCell_417 (_ BitVec 32))) (or (= v_arrayElimCell_417 v_prenex_348) (= v_arrayElimCell_417 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_350)) (bvsle (bvadd v_prenex_350 (_ bv4 32)) (select (store |c_#length| v_prenex_348 v_prenex_349) v_arrayElimCell_417))))) (or .cse0 .cse6 (forall ((v_arrayElimCell_303 (_ BitVec 32)) (v_prenex_48 (_ BitVec 32)) (v_prenex_354 (_ BitVec 32)) (v_prenex_353 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_48)) (= v_arrayElimCell_303 v_prenex_353) (bvsle (bvadd v_prenex_48 (_ bv4 32)) (select (store |c_#length| v_prenex_353 v_prenex_354) v_arrayElimCell_303))))) (or .cse0 .cse6 (forall ((v_prenex_582 (_ BitVec 32)) (v_arrayElimCell_307 (_ BitVec 32)) (v_prenex_584 (_ BitVec 32)) (v_prenex_583 (_ BitVec 32))) (or (= v_arrayElimCell_307 v_prenex_584) (bvsle (bvadd v_prenex_583 (_ bv4 32)) (select (store |c_#length| v_prenex_584 v_prenex_582) v_arrayElimCell_307)) (not (bvsle (_ bv0 32) v_prenex_583))))) (or .cse0 (forall ((v_prenex_458 (_ BitVec 32)) (v_prenex_457 (_ BitVec 32)) (v_prenex_456 (_ BitVec 32)) (v_prenex_455 (_ BitVec 32)) (v_arrayElimCell_243 (_ BitVec 32))) (let ((.cse72 (select (store |c_#length| v_prenex_458 v_prenex_456) v_arrayElimCell_243))) (or (bvsle (bvadd v_prenex_455 (_ bv4 32)) .cse72) (bvsle (bvadd v_prenex_457 (_ bv4 32)) .cse72) (= v_arrayElimCell_243 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_457)) (= v_arrayElimCell_243 v_prenex_458)))) .cse12 .cse20) (or .cse58 (forall ((|v_main_#Ultimate.alloc_~size_5| (_ BitVec 32)) (v_prenex_2 (_ BitVec 32))) (or (= |c_main_write~$Pointer$_#ptr.base| v_prenex_2) (bvsle (bvadd c_main_~x~0.offset (_ bv4 32)) (select (store |c_#length| v_prenex_2 |v_main_#Ultimate.alloc_~size_5|) c_main_~x~0.base)))) .cse60 .cse61) (or .cse3 .cse6 (forall ((v_prenex_142 (_ BitVec 32)) (v_prenex_643 (_ BitVec 32)) (v_prenex_642 (_ BitVec 32)) (v_prenex_641 (_ BitVec 32)) (v_prenex_640 (_ BitVec 32))) (let ((.cse73 (select (store |c_#length| v_prenex_643 v_prenex_641) v_prenex_142))) (or (= v_prenex_142 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_642)) (= v_prenex_142 v_prenex_643) (bvsle (bvadd v_prenex_640 (_ bv4 32)) .cse73) (bvsle (bvadd v_prenex_642 (_ bv4 32)) .cse73))))) (or .cse6 .cse12 (forall ((v_prenex_747 (_ BitVec 32)) (v_prenex_746 (_ BitVec 32)) (v_prenex_745 (_ BitVec 32)) (v_prenex_744 (_ BitVec 32)) (v_prenex_743 (_ BitVec 32)) (v_arrayElimCell_265 (_ BitVec 32))) (let ((.cse74 (store |c_#length| v_prenex_747 v_prenex_746))) (or (bvsle (bvadd v_prenex_745 (_ bv4 32)) (select .cse74 v_prenex_744)) (= v_arrayElimCell_265 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_743)) (bvsle (bvadd v_prenex_743 (_ bv4 32)) (select .cse74 v_arrayElimCell_265)) (= v_prenex_744 v_prenex_747) (= v_arrayElimCell_265 v_prenex_747))))) (or .cse0 (forall ((v_prenex_340 (_ BitVec 32)) (v_arrayElimCell_246 (_ BitVec 32)) (v_prenex_339 (_ BitVec 32)) (v_prenex_338 (_ BitVec 32)) (v_prenex_342 (_ BitVec 32)) (v_prenex_341 (_ BitVec 32))) (let ((.cse77 (store |c_#length| v_prenex_338 v_prenex_341))) (let ((.cse75 (bvadd v_prenex_340 (_ bv4 32))) (.cse76 (select .cse77 v_arrayElimCell_246))) (or (not (bvsle (_ bv0 32) v_prenex_342)) (= v_prenex_339 v_prenex_338) (bvsle .cse75 .cse76) (= v_arrayElimCell_246 c_main_~x~0.base) (bvsle .cse75 (select .cse77 v_prenex_339)) (= v_arrayElimCell_246 v_prenex_338) (bvsle (bvadd v_prenex_342 (_ bv4 32)) .cse76))))) .cse12 .cse20) (or .cse0 .cse6 (forall ((v_prenex_75 (_ BitVec 32)) (v_prenex_223 (_ BitVec 32)) (v_prenex_222 (_ BitVec 32)) (v_arrayElimCell_450 (_ BitVec 32))) (or (= v_arrayElimCell_450 v_prenex_222) (= v_arrayElimCell_450 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_75)) (bvsle (bvadd v_prenex_75 (_ bv4 32)) (select (store |c_#length| v_prenex_222 v_prenex_223) v_arrayElimCell_450))))) (or .cse0 (forall ((v_prenex_384 (_ BitVec 32)) (v_prenex_383 (_ BitVec 32)) (v_prenex_382 (_ BitVec 32)) (v_prenex_381 (_ BitVec 32)) (v_arrayElimCell_359 (_ BitVec 32)) (v_prenex_385 (_ BitVec 32))) (let ((.cse80 (store |c_#length| v_prenex_381 v_prenex_384))) (let ((.cse78 (select .cse80 v_prenex_382)) (.cse79 (bvadd v_prenex_385 (_ bv4 32)))) (or (= v_prenex_382 v_prenex_381) (= v_arrayElimCell_359 v_prenex_381) (bvsle (bvadd v_prenex_383 (_ bv4 32)) .cse78) (not (bvsle (_ bv0 32) v_prenex_385)) (bvsle .cse79 .cse78) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_359) (bvsle .cse79 (select .cse80 v_arrayElimCell_359)))))) .cse12) (or (forall ((v_prenex_285 (_ BitVec 32)) (v_prenex_15 (_ BitVec 32)) (v_arrayElimCell_296 (_ BitVec 32)) (v_prenex_286 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_15 (_ bv4 32)) (select (store |c_#length| v_prenex_285 v_prenex_286) v_arrayElimCell_296)) (= v_arrayElimCell_296 v_prenex_285) (not (bvsle (_ bv0 32) v_prenex_15)))) .cse6 .cse12) (or .cse0 .cse6 (forall ((v_arrayElimCell_644 (_ BitVec 32)) (v_prenex_324 (_ BitVec 32)) (v_prenex_323 (_ BitVec 32)) (v_prenex_322 (_ BitVec 32)) (v_prenex_321 (_ BitVec 32))) (let ((.cse81 (select (store |c_#length| v_prenex_321 v_prenex_323) v_arrayElimCell_644))) (or (= v_arrayElimCell_644 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_324)) (= v_arrayElimCell_644 v_prenex_321) (bvsle (bvadd v_prenex_322 (_ bv4 32)) .cse81) (bvsle (bvadd v_prenex_324 (_ bv4 32)) .cse81))))) (or .cse3 .cse6 (forall ((v_arrayElimCell_442 (_ BitVec 32)) (v_prenex_556 (_ BitVec 32)) (v_prenex_555 (_ BitVec 32)) (v_prenex_11 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_11 (_ bv4 32)) (select (store |c_#length| v_prenex_556 v_prenex_555) v_arrayElimCell_442)) (not (bvsle (_ bv0 32) v_prenex_11)) (= v_arrayElimCell_442 c_main_~x~0.base) (= v_arrayElimCell_442 v_prenex_556)))) (or .cse6 .cse12 (forall ((v_prenex_708 (_ BitVec 32)) (v_prenex_163 (_ BitVec 32)) (v_prenex_707 (_ BitVec 32)) (v_prenex_706 (_ BitVec 32)) (v_prenex_705 (_ BitVec 32)) (v_prenex_709 (_ BitVec 32))) (let ((.cse84 (store |c_#length| v_prenex_709 v_prenex_708))) (let ((.cse83 (bvadd v_prenex_707 (_ bv4 32))) (.cse82 (select .cse84 v_prenex_163))) (or (= v_prenex_163 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_705)) (bvsle (bvadd v_prenex_705 (_ bv4 32)) .cse82) (= v_prenex_163 v_prenex_709) (= v_prenex_706 v_prenex_709) (bvsle .cse83 (select .cse84 v_prenex_706)) (bvsle .cse83 .cse82)))))) (or .cse3 .cse0 .cse1 (forall ((v_prenex_300 (_ BitVec 32)) (v_arrayElimCell_461 (_ BitVec 32)) (v_prenex_34 (_ BitVec 32)) (v_prenex_299 (_ BitVec 32)) (v_prenex_298 (_ BitVec 32))) (let ((.cse85 (select (store |c_#length| v_prenex_298 v_prenex_300) v_arrayElimCell_461))) (or (= v_arrayElimCell_461 v_prenex_298) (not (bvsle (_ bv0 32) v_prenex_34)) (bvsle (bvadd v_prenex_34 (_ bv4 32)) .cse85) (bvsle (bvadd v_prenex_299 (_ bv4 32)) .cse85))))) (or .cse3 .cse0 (forall ((v_arrayElimCell_563 (_ BitVec 32)) (v_prenex_209 (_ BitVec 32)) (v_prenex_208 (_ BitVec 32)) (v_prenex_207 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_208)) (= v_arrayElimCell_563 c_main_~x~0.base) (= v_arrayElimCell_563 v_prenex_207) (bvsle (bvadd v_prenex_208 (_ bv4 32)) (select (store |c_#length| v_prenex_207 v_prenex_209) v_arrayElimCell_563))))) (or .cse0 .cse1 (forall ((v_arrayElimCell_147 (_ BitVec 32)) (v_arrayElimCell_214 (_ BitVec 32)) (v_prenex_201 (_ BitVec 32)) (v_prenex_200 (_ BitVec 32))) (or (= v_arrayElimCell_214 v_prenex_200) (bvsle (bvadd v_arrayElimCell_147 (_ bv4 32)) (select (store |c_#length| v_prenex_200 v_prenex_201) v_arrayElimCell_214)) (not (bvsle (_ bv0 32) v_arrayElimCell_147))))) .cse51 (or .cse0 .cse12 .cse20 (forall ((v_prenex_395 (_ BitVec 32)) (v_arrayElimCell_657 (_ BitVec 32)) (v_prenex_45 (_ BitVec 32)) (v_prenex_396 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_45)) (= v_arrayElimCell_657 v_prenex_395) (bvsle (bvadd v_prenex_45 (_ bv4 32)) (select (store |c_#length| v_prenex_395 v_prenex_396) v_arrayElimCell_657))))) (or .cse0 (forall ((v_arrayElimCell_101 (_ BitVec 32)) (v_prenex_215 (_ BitVec 32)) (v_prenex_214 (_ BitVec 32)) (v_prenex_213 (_ BitVec 32)) (v_arrayElimCell_386 (_ BitVec 32))) (let ((.cse86 (select (store |c_#length| v_prenex_213 v_prenex_215) v_arrayElimCell_386))) (or (= v_arrayElimCell_386 v_prenex_213) (bvsle (bvadd v_prenex_214 (_ bv4 32)) .cse86) (bvsle (bvadd v_arrayElimCell_101 (_ bv4 32)) .cse86) (not (bvsle (_ bv0 32) v_arrayElimCell_101)) (= v_arrayElimCell_386 c_main_~x~0.base))))) (or .cse0 (forall ((v_prenex_117 (_ BitVec 32)) (v_prenex_226 (_ BitVec 32)) (v_prenex_49 (_ BitVec 32)) (v_prenex_225 (_ BitVec 32)) (v_prenex_224 (_ BitVec 32))) (let ((.cse87 (select (store |c_#length| v_prenex_224 v_prenex_226) v_prenex_117))) (or (bvsle (bvadd v_prenex_49 (_ bv4 32)) .cse87) (= v_prenex_117 v_prenex_224) (= v_prenex_117 c_main_~x~0.base) (bvsle (bvadd v_prenex_225 (_ bv4 32)) .cse87) (not (bvsle (_ bv0 32) v_prenex_49))))) .cse6) (or .cse3 .cse0 .cse6 (forall ((v_prenex_173 (_ BitVec 32)) (v_prenex_172 (_ BitVec 32)) (v_arrayElimCell_566 (_ BitVec 32)) (v_prenex_44 (_ BitVec 32))) (or (= v_arrayElimCell_566 c_main_~x~0.base) (= v_arrayElimCell_566 v_prenex_172) (bvsle (bvadd v_prenex_44 (_ bv4 32)) (select (store |c_#length| v_prenex_172 v_prenex_173) v_arrayElimCell_566)) (not (bvsle (_ bv0 32) v_prenex_44))))) (or .cse0 (forall ((v_prenex_494 (_ BitVec 32)) (v_prenex_493 (_ BitVec 32)) (v_prenex_492 (_ BitVec 32)) (v_prenex_491 (_ BitVec 32)) (v_arrayElimCell_391 (_ BitVec 32)) (v_prenex_495 (_ BitVec 32))) (let ((.cse92 (store |c_#length| v_prenex_494 v_prenex_493))) (let ((.cse88 (bvadd v_prenex_492 (_ bv4 32))) (.cse90 (select .cse92 v_prenex_491)) (.cse91 (bvadd v_prenex_495 (_ bv4 32))) (.cse89 (select .cse92 v_arrayElimCell_391))) (or (bvsle .cse88 .cse89) (not (bvsle (_ bv0 32) v_prenex_495)) (= v_arrayElimCell_391 c_main_~x~0.base) (bvsle .cse88 .cse90) (= v_arrayElimCell_391 v_prenex_494) (bvsle .cse91 .cse90) (= v_prenex_491 v_prenex_494) (bvsle .cse91 .cse89)))))) (or .cse0 (forall ((v_prenex_175 (_ BitVec 32)) (v_prenex_174 (_ BitVec 32)) (v_arrayElimCell_632 (_ BitVec 32)) (v_arrayElimCell_122 (_ BitVec 32)) (v_prenex_176 (_ BitVec 32))) (let ((.cse93 (select (store |c_#length| v_prenex_175 v_prenex_174) v_arrayElimCell_632))) (or (= v_arrayElimCell_632 v_prenex_175) (bvsle (bvadd v_arrayElimCell_122 (_ bv4 32)) .cse93) (not (bvsle (_ bv0 32) v_arrayElimCell_122)) (bvsle (bvadd v_prenex_176 (_ bv4 32)) .cse93)))) .cse6) (or .cse0 (forall ((v_prenex_241 (_ BitVec 32)) (v_arrayElimCell_315 (_ BitVec 32)) (v_prenex_56 (_ BitVec 32)) (v_prenex_243 (_ BitVec 32)) (v_prenex_242 (_ BitVec 32))) (let ((.cse94 (select (store |c_#length| v_prenex_241 v_prenex_243) v_arrayElimCell_315))) (or (= v_arrayElimCell_315 c_main_~x~0.base) (= v_arrayElimCell_315 v_prenex_241) (not (bvsle (_ bv0 32) v_prenex_56)) (bvsle (bvadd v_prenex_56 (_ bv4 32)) .cse94) (bvsle (bvadd v_prenex_242 (_ bv4 32)) .cse94)))) .cse12 .cse20) (or .cse3 .cse0 .cse6 (forall ((v_arrayElimCell_541 (_ BitVec 32)) (v_prenex_450 (_ BitVec 32)) (v_prenex_449 (_ BitVec 32)) (v_prenex_448 (_ BitVec 32)) (v_prenex_451 (_ BitVec 32))) (let ((.cse95 (select (store |c_#length| v_prenex_451 v_prenex_449) v_arrayElimCell_541))) (or (not (bvsle (_ bv0 32) v_prenex_450)) (= v_arrayElimCell_541 c_main_~x~0.base) (bvsle (bvadd v_prenex_450 (_ bv4 32)) .cse95) (bvsle (bvadd v_prenex_448 (_ bv4 32)) .cse95) (= v_arrayElimCell_541 v_prenex_451))))) (= |c_main_write~$Pointer$_#value.offset| (_ bv0 32)) (or .cse0 (forall ((v_prenex_429 (_ BitVec 32)) (v_prenex_428 (_ BitVec 32)) (v_arrayElimCell_536 (_ BitVec 32)) (v_prenex_427 (_ BitVec 32)) (v_prenex_431 (_ BitVec 32)) (v_prenex_430 (_ BitVec 32))) (let ((.cse96 (store |c_#length| v_prenex_431 v_prenex_429))) (or (= v_prenex_427 v_prenex_431) (bvsle (bvadd v_prenex_430 (_ bv4 32)) (select .cse96 v_arrayElimCell_536)) (bvsle (bvadd v_prenex_428 (_ bv4 32)) (select .cse96 v_prenex_427)) (not (bvsle (_ bv0 32) v_prenex_430)) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_536) (= v_arrayElimCell_536 v_prenex_431)))) .cse11 .cse12) (or .cse0 (forall ((v_prenex_742 (_ BitVec 32)) (v_prenex_741 (_ BitVec 32)) (v_prenex_740 (_ BitVec 32)) (v_arrayElimCell_197 (_ BitVec 32))) (or (= v_arrayElimCell_197 c_main_~x~0.base) (bvsle (bvadd v_prenex_740 (_ bv4 32)) (select (store |c_#length| v_prenex_742 v_prenex_741) v_arrayElimCell_197)) (= v_arrayElimCell_197 v_prenex_742) (not (bvsle (_ bv0 32) v_prenex_740)))) .cse12 .cse20) (or .cse6 (forall ((v_prenex_739 (_ BitVec 32)) (v_prenex_738 (_ BitVec 32)) (v_prenex_737 (_ BitVec 32)) (v_prenex_736 (_ BitVec 32)) (v_prenex_735 (_ BitVec 32)) (v_arrayElimCell_604 (_ BitVec 32))) (let ((.cse101 (store |c_#length| v_prenex_739 v_prenex_738))) (let ((.cse99 (bvadd v_prenex_737 (_ bv4 32))) (.cse98 (select .cse101 v_arrayElimCell_604)) (.cse97 (bvadd v_prenex_735 (_ bv4 32))) (.cse100 (select .cse101 v_prenex_736))) (or (= v_arrayElimCell_604 c_main_~x~0.base) (bvsle .cse97 .cse98) (= v_prenex_736 v_prenex_739) (= v_arrayElimCell_604 v_prenex_739) (bvsle .cse99 .cse100) (bvsle .cse99 .cse98) (bvsle .cse97 .cse100) (not (bvsle (_ bv0 32) v_prenex_735))))))) (or .cse0 (forall ((v_arrayElimCell_534 (_ BitVec 32)) (v_prenex_237 (_ BitVec 32)) (v_prenex_236 (_ BitVec 32)) (v_prenex_235 (_ BitVec 32)) (v_prenex_234 (_ BitVec 32))) (let ((.cse102 (select (store |c_#length| v_prenex_234 v_prenex_237) v_arrayElimCell_534))) (or (bvsle (bvadd v_prenex_235 (_ bv4 32)) .cse102) (not (bvsle (_ bv0 32) v_prenex_235)) (= v_arrayElimCell_534 c_main_~x~0.base) (= v_arrayElimCell_534 v_prenex_234) (bvsle (bvadd v_prenex_236 (_ bv4 32)) .cse102)))) .cse11 .cse12) (or .cse0 .cse6 (forall ((v_arrayElimCell_377 (_ BitVec 32)) (v_prenex_74 (_ BitVec 32)) (v_prenex_221 (_ BitVec 32)) (v_prenex_220 (_ BitVec 32))) (or (= v_arrayElimCell_377 v_prenex_220) (not (bvsle (_ bv0 32) v_prenex_74)) (bvsle (bvadd v_prenex_74 (_ bv4 32)) (select (store |c_#length| v_prenex_220 v_prenex_221) v_arrayElimCell_377))))) (or .cse0 (forall ((v_prenex_52 (_ BitVec 32)) (v_arrayElimCell_679 (_ BitVec 32)) (v_prenex_206 (_ BitVec 32)) (v_prenex_205 (_ BitVec 32))) (or (= v_arrayElimCell_679 v_prenex_205) (bvsle (bvadd v_prenex_52 (_ bv4 32)) (select (store |c_#length| v_prenex_205 v_prenex_206) v_arrayElimCell_679)) (not (bvsle (_ bv0 32) v_prenex_52)))) .cse12 .cse20) (or .cse0 .cse6 (forall ((v_prenex_195 (_ BitVec 32)) (v_prenex_194 (_ BitVec 32)) (v_arrayElimCell_151 (_ BitVec 32)) (v_arrayElimCell_593 (_ BitVec 32))) (or (= v_arrayElimCell_593 c_main_~x~0.base) (bvsle (bvadd v_arrayElimCell_151 (_ bv4 32)) (select (store |c_#length| v_prenex_194 v_prenex_195) v_arrayElimCell_593)) (not (bvsle (_ bv0 32) v_arrayElimCell_151)) (= v_arrayElimCell_593 v_prenex_194)))) (or (forall ((v_arrayElimCell_235 (_ BitVec 32)) (v_prenex_415 (_ BitVec 32)) (v_prenex_414 (_ BitVec 32)) (v_prenex_413 (_ BitVec 32)) (v_prenex_412 (_ BitVec 32)) (v_prenex_411 (_ BitVec 32))) (let ((.cse105 (store |c_#length| v_prenex_415 v_prenex_413))) (let ((.cse104 (select .cse105 v_arrayElimCell_235)) (.cse103 (bvadd v_prenex_412 (_ bv4 32)))) (or (= v_prenex_411 v_prenex_415) (= v_arrayElimCell_235 v_prenex_415) (not (bvsle (_ bv0 32) v_prenex_414)) (bvsle .cse103 .cse104) (= v_arrayElimCell_235 c_main_~x~0.base) (bvsle (bvadd v_prenex_414 (_ bv4 32)) .cse104) (bvsle .cse103 (select .cse105 v_prenex_411)))))) .cse0 .cse12) (or .cse0 (forall ((v_prenex_419 (_ BitVec 32)) (v_prenex_418 (_ BitVec 32)) (v_prenex_417 (_ BitVec 32)) (v_prenex_416 (_ BitVec 32)) (v_arrayElimCell_616 (_ BitVec 32))) (let ((.cse106 (select (store |c_#length| v_prenex_419 v_prenex_417) v_arrayElimCell_616))) (or (= v_arrayElimCell_616 v_prenex_419) (not (bvsle (_ bv0 32) v_prenex_418)) (bvsle (bvadd v_prenex_416 (_ bv4 32)) .cse106) (bvsle (bvadd v_prenex_418 (_ bv4 32)) .cse106)))) .cse12 .cse20) (or .cse0 .cse11 .cse12 (forall ((v_prenex_240 (_ BitVec 32)) (v_prenex_239 (_ BitVec 32)) (v_prenex_238 (_ BitVec 32)) (v_arrayElimCell_250 (_ BitVec 32)) (v_prenex_55 (_ BitVec 32))) (let ((.cse107 (select (store |c_#length| v_prenex_238 v_prenex_240) v_arrayElimCell_250))) (or (not (bvsle (_ bv0 32) v_prenex_55)) (= v_arrayElimCell_250 c_main_~x~0.base) (bvsle (bvadd v_prenex_55 (_ bv4 32)) .cse107) (bvsle (bvadd v_prenex_239 (_ bv4 32)) .cse107) (= v_arrayElimCell_250 v_prenex_238))))) (or .cse3 .cse0 .cse6 (forall ((v_prenex_250 (_ BitVec 32)) (v_prenex_43 (_ BitVec 32)) (v_prenex_249 (_ BitVec 32)) (v_arrayElimCell_482 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_43)) (bvsle (bvadd v_prenex_43 (_ bv4 32)) (select (store |c_#length| v_prenex_249 v_prenex_250) v_arrayElimCell_482)) (= v_arrayElimCell_482 c_main_~x~0.base) (= v_arrayElimCell_482 v_prenex_249)))) (or .cse0 (forall ((v_arrayElimCell_506 (_ BitVec 32)) (v_prenex_375 (_ BitVec 32)) (v_prenex_374 (_ BitVec 32)) (v_prenex_69 (_ BitVec 32))) (or (= v_arrayElimCell_506 v_prenex_374) (bvsle (bvadd v_prenex_69 (_ bv4 32)) (select (store |c_#length| v_prenex_374 v_prenex_375) v_arrayElimCell_506)) (= v_arrayElimCell_506 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_69))))) (or .cse0 (forall ((v_prenex_734 (_ BitVec 32)) (v_prenex_733 (_ BitVec 32)) (v_prenex_732 (_ BitVec 32)) (v_prenex_731 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_732)) (= v_prenex_731 v_prenex_734) (bvsle (bvadd v_prenex_732 (_ bv4 32)) (select (store |c_#length| v_prenex_734 v_prenex_733) v_prenex_731))))) .cse6 (or .cse0 .cse12 (forall ((v_prenex_193 (_ BitVec 32)) (v_arrayElimCell_700 (_ BitVec 32)) (v_prenex_192 (_ BitVec 32)) (v_prenex_191 (_ BitVec 32)) (v_prenex_190 (_ BitVec 32))) (let ((.cse108 (select (store |c_#length| v_prenex_191 v_prenex_193) v_arrayElimCell_700))) (or (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_700) (= v_arrayElimCell_700 v_prenex_191) (not (bvsle (_ bv0 32) v_prenex_190)) (bvsle (bvadd v_prenex_192 (_ bv4 32)) .cse108) (bvsle (bvadd v_prenex_190 (_ bv4 32)) .cse108))))) (or .cse0 (forall ((v_arrayElimCell_418 (_ BitVec 32)) (v_prenex_233 (_ BitVec 32)) (v_prenex_232 (_ BitVec 32)) (v_prenex_231 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_232)) (= v_arrayElimCell_418 c_main_~x~0.base) (bvsle (bvadd v_prenex_232 (_ bv4 32)) (select (store |c_#length| v_prenex_231 v_prenex_233) v_arrayElimCell_418)) (= v_arrayElimCell_418 v_prenex_231)))) (or (forall ((v_arrayElimCell_304 (_ BitVec 32)) (v_prenex_504 (_ BitVec 32)) (v_prenex_503 (_ BitVec 32)) (v_prenex_502 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_503)) (bvsle (bvadd v_prenex_503 (_ bv4 32)) (select (store |c_#length| v_prenex_504 v_prenex_502) v_arrayElimCell_304)) (= v_arrayElimCell_304 v_prenex_504))) .cse0) (or .cse0 (forall ((v_prenex_436 (_ BitVec 32)) (v_arrayElimCell_318 (_ BitVec 32)) (v_prenex_435 (_ BitVec 32)) (v_prenex_434 (_ BitVec 32)) (v_prenex_433 (_ BitVec 32)) (v_prenex_432 (_ BitVec 32))) (let ((.cse109 (store |c_#length| v_prenex_436 v_prenex_434))) (or (= v_arrayElimCell_318 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_435)) (bvsle (bvadd v_prenex_433 (_ bv4 32)) (select .cse109 v_prenex_432)) (= v_arrayElimCell_318 v_prenex_436) (bvsle (bvadd v_prenex_435 (_ bv4 32)) (select .cse109 v_arrayElimCell_318)) (= v_prenex_432 v_prenex_436)))) .cse12 .cse20) (or (forall ((v_prenex_472 (_ BitVec 32)) (v_arrayElimCell_600 (_ BitVec 32)) (v_prenex_60 (_ BitVec 32)) (v_prenex_474 (_ BitVec 32)) (v_prenex_473 (_ BitVec 32))) (let ((.cse110 (select (store |c_#length| v_prenex_474 v_prenex_473) v_arrayElimCell_600))) (or (not (bvsle (_ bv0 32) v_prenex_60)) (bvsle (bvadd v_prenex_60 (_ bv4 32)) .cse110) (= v_arrayElimCell_600 v_prenex_474) (bvsle (bvadd v_prenex_472 (_ bv4 32)) .cse110) (= v_arrayElimCell_600 c_main_~x~0.base)))) .cse6) (or .cse0 .cse12 (forall ((v_arrayElimCell_236 (_ BitVec 32)) (v_prenex_525 (_ BitVec 32)) (v_prenex_524 (_ BitVec 32)) (v_prenex_523 (_ BitVec 32)) (v_prenex_522 (_ BitVec 32)) (v_prenex_521 (_ BitVec 32))) (let ((.cse113 (store |c_#length| v_prenex_525 v_prenex_523))) (let ((.cse112 (bvadd v_prenex_522 (_ bv4 32))) (.cse111 (select .cse113 v_arrayElimCell_236))) (or (= v_prenex_521 v_prenex_525) (bvsle (bvadd v_prenex_524 (_ bv4 32)) .cse111) (bvsle .cse112 (select .cse113 v_prenex_521)) (not (bvsle (_ bv0 32) v_prenex_524)) (= v_arrayElimCell_236 v_prenex_525) (= v_arrayElimCell_236 c_main_~x~0.base) (bvsle .cse112 .cse111))))) .cse20) (or .cse3 .cse0 .cse6 (forall ((v_arrayElimCell_475 (_ BitVec 32)) (v_arrayElimCell_123 (_ BitVec 32)) (v_prenex_753 (_ BitVec 32)) (v_prenex_752 (_ BitVec 32)) (v_prenex_751 (_ BitVec 32))) (let ((.cse114 (select (store |c_#length| v_prenex_753 v_prenex_752) v_arrayElimCell_475))) (or (bvsle (bvadd v_arrayElimCell_123 (_ bv4 32)) .cse114) (not (bvsle (_ bv0 32) v_arrayElimCell_123)) (= v_arrayElimCell_475 v_prenex_753) (bvsle (bvadd v_prenex_751 (_ bv4 32)) .cse114))))) (or .cse0 (forall ((v_prenex_560 (_ BitVec 32)) (v_prenex_559 (_ BitVec 32)) (v_prenex_558 (_ BitVec 32)) (v_prenex_557 (_ BitVec 32)) (v_prenex_102 (_ BitVec 32)) (v_prenex_561 (_ BitVec 32))) (let ((.cse117 (store |c_#length| v_prenex_561 v_prenex_559))) (let ((.cse116 (bvadd v_prenex_558 (_ bv4 32))) (.cse115 (select .cse117 v_prenex_102))) (or (bvsle (bvadd v_prenex_560 (_ bv4 32)) .cse115) (= v_prenex_102 v_prenex_561) (= v_prenex_102 c_main_~x~0.base) (= v_prenex_557 v_prenex_561) (bvsle .cse116 (select .cse117 v_prenex_557)) (bvsle .cse116 .cse115) (not (bvsle (_ bv0 32) v_prenex_560)))))) .cse12 .cse20) (or .cse0 (forall ((v_prenex_681 (_ BitVec 32)) (v_prenex_680 (_ BitVec 32)) (v_arrayElimCell_248 (_ BitVec 32)) (v_prenex_679 (_ BitVec 32)) (v_prenex_678 (_ BitVec 32)) (v_prenex_677 (_ BitVec 32))) (let ((.cse119 (store |c_#length| v_prenex_681 v_prenex_679))) (let ((.cse118 (bvadd v_prenex_678 (_ bv4 32))) (.cse120 (select .cse119 v_arrayElimCell_248))) (or (bvsle .cse118 (select .cse119 v_prenex_677)) (bvsle .cse118 .cse120) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_248) (= v_prenex_677 v_prenex_681) (bvsle (bvadd v_prenex_680 (_ bv4 32)) .cse120) (= v_arrayElimCell_248 v_prenex_681) (not (bvsle (_ bv0 32) v_prenex_680)))))) .cse11 .cse12) (or .cse6 (forall ((v_arrayElimCell_623 (_ BitVec 32)) (v_prenex_59 (_ BitVec 32)) (v_prenex_574 (_ BitVec 32)) (v_prenex_573 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_59)) (= v_arrayElimCell_623 v_prenex_574) (bvsle (bvadd v_prenex_59 (_ bv4 32)) (select (store |c_#length| v_prenex_574 v_prenex_573) v_arrayElimCell_623))))) (or .cse0 .cse12 .cse20 (forall ((v_arrayElimCell_696 (_ BitVec 32)) (v_subst_2 (_ BitVec 32)) (v_arrayElimCell_118 (_ BitVec 32)) (v_prenex_168 (_ BitVec 32)) (v_prenex_167 (_ BitVec 32))) (let ((.cse121 (select (store |c_#length| v_prenex_168 v_prenex_167) v_arrayElimCell_696))) (or (= v_arrayElimCell_696 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_arrayElimCell_118)) (bvsle (bvadd v_arrayElimCell_118 (_ bv4 32)) .cse121) (= v_arrayElimCell_696 v_prenex_168) (bvsle (bvadd v_subst_2 (_ bv4 32)) .cse121))))) (or (forall ((v_prenex_486 (_ BitVec 32)) (v_prenex_485 (_ BitVec 32)) (v_arrayElimCell_683 (_ BitVec 32)) (v_prenex_484 (_ BitVec 32)) (v_prenex_14 (_ BitVec 32))) (let ((.cse122 (select (store |c_#length| v_prenex_486 v_prenex_485) v_arrayElimCell_683))) (or (bvsle (bvadd v_prenex_484 (_ bv4 32)) .cse122) (bvsle (bvadd v_prenex_14 (_ bv4 32)) .cse122) (not (bvsle (_ bv0 32) v_prenex_14)) (= v_arrayElimCell_683 c_main_~x~0.base) (= v_arrayElimCell_683 v_prenex_486)))) .cse6 .cse12) (or .cse6 (forall ((v_prenex_581 (_ BitVec 32)) (v_prenex_580 (_ BitVec 32)) (v_arrayElimCell_687 (_ BitVec 32)) (v_prenex_19 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_19 (_ bv4 32)) (select (store |c_#length| v_prenex_581 v_prenex_580) v_arrayElimCell_687)) (= v_arrayElimCell_687 v_prenex_581) (not (bvsle (_ bv0 32) v_prenex_19))))) (or (forall ((v_arrayElimCell_209 (_ BitVec 32)) (v_prenex_454 (_ BitVec 32)) (v_prenex_453 (_ BitVec 32)) (v_prenex_452 (_ BitVec 32))) (or (= v_arrayElimCell_209 v_prenex_453) (bvsle (bvadd v_prenex_454 (_ bv4 32)) (select (store |c_#length| v_prenex_453 v_prenex_452) v_arrayElimCell_209)) (not (bvsle (_ bv0 32) v_prenex_454)))) .cse0 .cse6) (or .cse3 .cse0 .cse1 (forall ((v_arrayElimCell_559 (_ BitVec 32)) (v_prenex_664 (_ BitVec 32)) (v_prenex_663 (_ BitVec 32)) (v_prenex_662 (_ BitVec 32))) (or (= v_arrayElimCell_559 v_prenex_664) (not (bvsle (_ bv0 32) v_prenex_663)) (= v_arrayElimCell_559 c_main_~x~0.base) (bvsle (bvadd v_prenex_663 (_ bv4 32)) (select (store |c_#length| v_prenex_664 v_prenex_662) v_arrayElimCell_559))))) (or .cse6 .cse12 (forall ((v_arrayElimCell_555 (_ BitVec 32)) (v_prenex_715 (_ BitVec 32)) (v_prenex_714 (_ BitVec 32)) (v_arrayElimCell_81 (_ BitVec 32))) (or (= v_arrayElimCell_555 v_prenex_715) (bvsle (bvadd v_arrayElimCell_81 (_ bv4 32)) (select (store |c_#length| v_prenex_715 v_prenex_714) v_arrayElimCell_555)) (not (bvsle (_ bv0 32) v_arrayElimCell_81)) (= v_arrayElimCell_555 c_main_~x~0.base)))) (or .cse0 .cse6 (forall ((v_prenex_362 (_ BitVec 32)) (v_prenex_361 (_ BitVec 32)) (v_arrayElimCell_102 (_ BitVec 32)) (v_prenex_360 (_ BitVec 32)) (v_prenex_359 (_ BitVec 32)) (v_prenex_159 (_ BitVec 32))) (let ((.cse127 (store |c_#length| v_prenex_359 v_prenex_362))) (let ((.cse123 (bvadd v_prenex_361 (_ bv4 32))) (.cse125 (select .cse127 v_prenex_159)) (.cse126 (bvadd v_arrayElimCell_102 (_ bv4 32))) (.cse124 (select .cse127 v_prenex_360))) (or (bvsle .cse123 .cse124) (bvsle .cse123 .cse125) (= v_prenex_159 c_main_~x~0.base) (= v_prenex_159 v_prenex_359) (bvsle .cse126 .cse125) (= v_prenex_360 v_prenex_359) (not (bvsle (_ bv0 32) v_arrayElimCell_102)) (bvsle .cse126 .cse124)))))) (or .cse0 (forall ((v_prenex_72 (_ BitVec 32)) (v_prenex_365 (_ BitVec 32)) (v_arrayElimCell_186 (_ BitVec 32)) (v_prenex_364 (_ BitVec 32)) (v_prenex_363 (_ BitVec 32))) (let ((.cse128 (select (store |c_#length| v_prenex_363 v_prenex_365) v_arrayElimCell_186))) (or (= v_arrayElimCell_186 v_prenex_363) (bvsle (bvadd v_prenex_72 (_ bv4 32)) .cse128) (bvsle (bvadd v_prenex_364 (_ bv4 32)) .cse128) (not (bvsle (_ bv0 32) v_prenex_72))))) .cse6) (or .cse3 .cse0 (forall ((v_prenex_689 (_ BitVec 32)) (v_prenex_688 (_ BitVec 32)) (v_prenex_687 (_ BitVec 32)) (v_prenex_686 (_ BitVec 32)) (v_arrayElimCell_395 (_ BitVec 32))) (let ((.cse129 (select (store |c_#length| v_prenex_688 v_prenex_687) v_arrayElimCell_395))) (or (not (bvsle (_ bv0 32) v_prenex_689)) (= v_arrayElimCell_395 c_main_~x~0.base) (= v_arrayElimCell_395 v_prenex_688) (bvsle (bvadd v_prenex_686 (_ bv4 32)) .cse129) (bvsle (bvadd v_prenex_689 (_ bv4 32)) .cse129)))) .cse6) (or .cse0 .cse1 (forall ((v_prenex_780 (_ BitVec 32)) (v_prenex_779 (_ BitVec 32)) (v_prenex_782 (_ BitVec 32)) (v_prenex_781 (_ BitVec 32)) (v_arrayElimCell_397 (_ BitVec 32))) (let ((.cse130 (select (store |c_#length| v_prenex_782 v_prenex_781) v_arrayElimCell_397))) (or (= v_arrayElimCell_397 v_prenex_782) (not (bvsle (_ bv0 32) v_prenex_779)) (bvsle (bvadd v_prenex_779 (_ bv4 32)) .cse130) (bvsle (bvadd v_prenex_780 (_ bv4 32)) .cse130) (= v_arrayElimCell_397 c_main_~x~0.base))))) (or .cse0 .cse1 (forall ((v_prenex_197 (_ BitVec 32)) (v_prenex_196 (_ BitVec 32)) (v_arrayElimCell_582 (_ BitVec 32)) (v_prenex_199 (_ BitVec 32)) (v_prenex_198 (_ BitVec 32))) (let ((.cse131 (select (store |c_#length| v_prenex_197 v_prenex_199) v_arrayElimCell_582))) (or (= v_arrayElimCell_582 v_prenex_197) (bvsle (bvadd v_prenex_196 (_ bv4 32)) .cse131) (not (bvsle (_ bv0 32) v_prenex_196)) (bvsle (bvadd v_prenex_198 (_ bv4 32)) .cse131) (= v_arrayElimCell_582 c_main_~x~0.base))))) (or .cse0 .cse6 (forall ((v_arrayElimCell_585 (_ BitVec 32)) (v_prenex_696 (_ BitVec 32)) (v_prenex_695 (_ BitVec 32)) (v_prenex_694 (_ BitVec 32)) (v_prenex_693 (_ BitVec 32))) (let ((.cse132 (select (store |c_#length| v_prenex_696 v_prenex_694) v_arrayElimCell_585))) (or (bvsle (bvadd v_prenex_695 (_ bv4 32)) .cse132) (bvsle (bvadd v_prenex_693 (_ bv4 32)) .cse132) (not (bvsle (_ bv0 32) v_prenex_695)) (= v_arrayElimCell_585 c_main_~x~0.base) (= v_arrayElimCell_585 v_prenex_696))))) (or .cse0 .cse6 (forall ((v_prenex_439 (_ BitVec 32)) (v_prenex_438 (_ BitVec 32)) (v_prenex_437 (_ BitVec 32)) (v_prenex_68 (_ BitVec 32)) (v_arrayElimCell_551 (_ BitVec 32))) (let ((.cse133 (select (store |c_#length| v_prenex_439 v_prenex_438) v_arrayElimCell_551))) (or (bvsle (bvadd v_prenex_68 (_ bv4 32)) .cse133) (bvsle (bvadd v_prenex_437 (_ bv4 32)) .cse133) (= v_arrayElimCell_551 v_prenex_439) (not (bvsle (_ bv0 32) v_prenex_68)) (= v_arrayElimCell_551 c_main_~x~0.base))))) (or .cse0 (forall ((v_arrayElimCell_497 (_ BitVec 32)) (v_prenex_571 (_ BitVec 32)) (v_prenex_570 (_ BitVec 32)) (v_prenex_572 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_571)) (= v_arrayElimCell_497 v_prenex_572) (bvsle (bvadd v_prenex_571 (_ bv4 32)) (select (store |c_#length| v_prenex_572 v_prenex_570) v_arrayElimCell_497)) (= v_arrayElimCell_497 c_main_~x~0.base))) .cse6) (= (_ bv0 32) c_main_~head~0.offset) (or .cse6 (forall ((v_prenex_519 (_ BitVec 32)) (v_prenex_61 (_ BitVec 32)) (v_prenex_520 (_ BitVec 32)) (v_arrayElimCell_691 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_61 (_ bv4 32)) (select (store |c_#length| v_prenex_520 v_prenex_519) v_arrayElimCell_691)) (not (bvsle (_ bv0 32) v_prenex_61)) (= v_arrayElimCell_691 v_prenex_520) (= v_arrayElimCell_691 c_main_~x~0.base)))) (or .cse0 .cse6 (forall ((v_prenex_461 (_ BitVec 32)) (v_prenex_460 (_ BitVec 32)) (v_arrayElimCell_512 (_ BitVec 32)) (v_prenex_459 (_ BitVec 32))) (or (= v_arrayElimCell_512 c_main_~x~0.base) (bvsle (bvadd v_prenex_460 (_ bv4 32)) (select (store |c_#length| v_prenex_461 v_prenex_459) v_arrayElimCell_512)) (= v_arrayElimCell_512 v_prenex_461) (not (bvsle (_ bv0 32) v_prenex_460))))) (or .cse0 .cse6 (forall ((v_prenex_609 (_ BitVec 32)) (v_prenex_608 (_ BitVec 32)) (v_arrayElimCell_212 (_ BitVec 32)) (v_prenex_610 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_610)) (bvsle (bvadd v_prenex_610 (_ bv4 32)) (select (store |c_#length| v_prenex_609 v_prenex_608) v_arrayElimCell_212)) (= v_arrayElimCell_212 v_prenex_609)))) (or .cse0 .cse1 (forall ((v_prenex_447 (_ BitVec 32)) (v_prenex_446 (_ BitVec 32)) (v_prenex_445 (_ BitVec 32)) (v_prenex_444 (_ BitVec 32)) (v_prenex_443 (_ BitVec 32)) (v_arrayElimCell_363 (_ BitVec 32))) (let ((.cse136 (store |c_#length| v_prenex_447 v_prenex_445))) (let ((.cse135 (bvadd v_prenex_446 (_ bv4 32))) (.cse134 (select .cse136 v_prenex_443))) (or (bvsle (bvadd v_prenex_444 (_ bv4 32)) .cse134) (= v_arrayElimCell_363 v_prenex_447) (= v_prenex_443 v_prenex_447) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_363) (bvsle .cse135 (select .cse136 v_arrayElimCell_363)) (not (bvsle (_ bv0 32) v_prenex_446)) (bvsle .cse135 .cse134))))) .cse12) (or .cse0 (forall ((v_arrayElimCell_532 (_ BitVec 32)) (v_prenex_539 (_ BitVec 32)) (v_prenex_538 (_ BitVec 32)) (v_prenex_537 (_ BitVec 32)) (v_prenex_541 (_ BitVec 32)) (v_prenex_540 (_ BitVec 32))) (let ((.cse137 (store |c_#length| v_prenex_541 v_prenex_539))) (or (not (bvsle (_ bv0 32) v_prenex_540)) (bvsle (bvadd v_prenex_538 (_ bv4 32)) (select .cse137 v_prenex_537)) (bvsle (bvadd v_prenex_540 (_ bv4 32)) (select .cse137 v_arrayElimCell_532)) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_532) (= v_arrayElimCell_532 v_prenex_541) (= v_prenex_537 v_prenex_541)))) .cse12) (or .cse0 .cse6 (forall ((v_prenex_263 (_ BitVec 32)) (v_arrayElimCell_269 (_ BitVec 32)) (v_prenex_66 (_ BitVec 32)) (v_prenex_265 (_ BitVec 32)) (v_prenex_264 (_ BitVec 32))) (let ((.cse138 (select (store |c_#length| v_prenex_263 v_prenex_265) v_arrayElimCell_269))) (or (bvsle (bvadd v_prenex_264 (_ bv4 32)) .cse138) (not (bvsle (_ bv0 32) v_prenex_66)) (= v_arrayElimCell_269 v_prenex_263) (bvsle (bvadd v_prenex_66 (_ bv4 32)) .cse138))))) (or .cse6 (forall ((v_prenex_91 (_ BitVec 32)) (v_prenex_649 (_ BitVec 32)) (v_prenex_652 (_ BitVec 32)) (v_prenex_651 (_ BitVec 32)) (v_prenex_650 (_ BitVec 32))) (let ((.cse139 (select (store |c_#length| v_prenex_652 v_prenex_650) v_prenex_91))) (or (not (bvsle (_ bv0 32) v_prenex_651)) (= v_prenex_91 c_main_~x~0.base) (bvsle (bvadd v_prenex_649 (_ bv4 32)) .cse139) (bvsle (bvadd v_prenex_651 (_ bv4 32)) .cse139) (= v_prenex_91 v_prenex_652)))) .cse12) (or .cse6 (forall ((v_prenex_529 (_ BitVec 32)) (v_prenex_533 (_ BitVec 32)) (v_prenex_532 (_ BitVec 32)) (v_prenex_531 (_ BitVec 32)) (v_prenex_530 (_ BitVec 32)) (v_arrayElimCell_672 (_ BitVec 32))) (let ((.cse141 (store |c_#length| v_prenex_532 v_prenex_531))) (let ((.cse140 (bvadd v_prenex_533 (_ bv4 32))) (.cse142 (select .cse141 v_prenex_529))) (or (= v_prenex_529 v_prenex_532) (bvsle .cse140 (select .cse141 v_arrayElimCell_672)) (bvsle (bvadd v_prenex_530 (_ bv4 32)) .cse142) (not (bvsle (_ bv0 32) v_prenex_533)) (= v_arrayElimCell_672 v_prenex_532) (bvsle .cse140 .cse142) (= v_arrayElimCell_672 c_main_~x~0.base))))) .cse12) (or .cse0 .cse1 (forall ((v_arrayElimCell_300 (_ BitVec 32)) (v_prenex_514 (_ BitVec 32)) (v_prenex_513 (_ BitVec 32)) (v_prenex_512 (_ BitVec 32))) (or (= v_arrayElimCell_300 v_prenex_514) (not (bvsle (_ bv0 32) v_prenex_513)) (bvsle (bvadd v_prenex_513 (_ bv4 32)) (select (store |c_#length| v_prenex_514 v_prenex_512) v_arrayElimCell_300))))) (or .cse6 .cse12 (forall ((v_prenex_21 (_ BitVec 32)) (v_prenex_759 (_ BitVec 32)) (v_arrayElimCell_336 (_ BitVec 32)) (v_prenex_758 (_ BitVec 32)) (v_prenex_760 (_ BitVec 32))) (let ((.cse143 (select (store |c_#length| v_prenex_760 v_prenex_759) v_arrayElimCell_336))) (or (not (bvsle (_ bv0 32) v_prenex_21)) (= v_arrayElimCell_336 c_main_~x~0.base) (= v_arrayElimCell_336 v_prenex_760) (bvsle (bvadd v_prenex_21 (_ bv4 32)) .cse143) (bvsle (bvadd v_prenex_758 (_ bv4 32)) .cse143))))) (or .cse1 .cse50 (forall ((v_prenex_463 (_ BitVec 32)) (v_prenex_462 (_ BitVec 32))) (or (bvsle (bvadd |c_main_write~$Pointer$_#value.offset| (_ bv4 32)) (select (store |c_#length| v_prenex_463 v_prenex_462) |c_main_write~$Pointer$_#value.base|)) (= |c_main_write~$Pointer$_#value.base| v_prenex_463))) .cse68) (or .cse0 .cse12 .cse20 (forall ((v_arrayElimCell_222 (_ BitVec 32)) (v_prenex_40 (_ BitVec 32)) (v_prenex_422 (_ BitVec 32)) (v_prenex_421 (_ BitVec 32)) (v_prenex_420 (_ BitVec 32))) (let ((.cse144 (select (store |c_#length| v_prenex_422 v_prenex_421) v_arrayElimCell_222))) (or (bvsle (bvadd v_prenex_40 (_ bv4 32)) .cse144) (not (bvsle (_ bv0 32) v_prenex_40)) (= v_arrayElimCell_222 v_prenex_422) (= v_arrayElimCell_222 c_main_~x~0.base) (bvsle (bvadd v_prenex_420 (_ bv4 32)) .cse144))))) (or (forall ((v_arrayElimCell_277 (_ BitVec 32)) (v_prenex_639 (_ BitVec 32)) (v_prenex_76 (_ BitVec 32)) (v_prenex_638 (_ BitVec 32)) (v_prenex_637 (_ BitVec 32))) (let ((.cse145 (select (store |c_#length| v_prenex_639 v_prenex_638) v_arrayElimCell_277))) (or (bvsle (bvadd v_prenex_76 (_ bv4 32)) .cse145) (= v_arrayElimCell_277 v_prenex_639) (bvsle (bvadd v_prenex_637 (_ bv4 32)) .cse145) (not (bvsle (_ bv0 32) v_prenex_76))))) .cse0 .cse6) (or .cse6 (forall ((v_prenex_565 (_ BitVec 32)) (v_prenex_564 (_ BitVec 32)) (v_prenex_563 (_ BitVec 32)) (v_prenex_562 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_563)) (= v_prenex_562 v_prenex_565) (bvsle (bvadd v_prenex_563 (_ bv4 32)) (select (store |c_#length| v_prenex_565 v_prenex_564) v_prenex_562))))) (or .cse0 .cse6 (forall ((v_prenex_31 (_ BitVec 32)) (v_prenex_335 (_ BitVec 32)) (v_prenex_334 (_ BitVec 32)) (v_arrayElimCell_287 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_31 (_ bv4 32)) (select (store |c_#length| v_prenex_334 v_prenex_335) v_arrayElimCell_287)) (not (bvsle (_ bv0 32) v_prenex_31)) (= v_arrayElimCell_287 v_prenex_334) (= v_arrayElimCell_287 c_main_~x~0.base)))) (or .cse58 (forall ((|v_main_#Ultimate.alloc_~size_5| (_ BitVec 32)) (v_prenex_2 (_ BitVec 32))) (or (not (= (_ bv0 1) (select |c_#valid| v_prenex_2))) (bvsle (bvadd c_main_~x~0.offset (_ bv4 32)) (select (store |c_#length| v_prenex_2 |v_main_#Ultimate.alloc_~size_5|) c_main_~x~0.base)))) .cse60 .cse61) (or .cse3 (forall ((v_arrayElimCell_675 (_ BitVec 32)) (v_prenex_468 (_ BitVec 32)) (v_prenex_467 (_ BitVec 32)) (v_prenex_466 (_ BitVec 32)) (v_arrayElimCell_91 (_ BitVec 32))) (let ((.cse146 (select (store |c_#length| v_prenex_468 v_prenex_467) v_arrayElimCell_675))) (or (bvsle (bvadd v_prenex_466 (_ bv4 32)) .cse146) (not (bvsle (_ bv0 32) v_arrayElimCell_91)) (= v_arrayElimCell_675 v_prenex_468) (= v_arrayElimCell_675 c_main_~x~0.base) (bvsle (bvadd v_arrayElimCell_91 (_ bv4 32)) .cse146)))) .cse6) (or .cse3 .cse0 (forall ((v_arrayElimCell_410 (_ BitVec 32)) (v_prenex_309 (_ BitVec 32)) (v_prenex_308 (_ BitVec 32)) (v_prenex_307 (_ BitVec 32)) (v_prenex_306 (_ BitVec 32))) (let ((.cse147 (select (store |c_#length| v_prenex_306 v_prenex_308) v_arrayElimCell_410))) (or (bvsle (bvadd v_prenex_307 (_ bv4 32)) .cse147) (= v_arrayElimCell_410 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_309)) (= v_arrayElimCell_410 v_prenex_306) (bvsle (bvadd v_prenex_309 (_ bv4 32)) .cse147)))) .cse6) (or .cse0 (forall ((v_arrayElimCell_288 (_ BitVec 32)) (v_prenex_402 (_ BitVec 32)) (v_prenex_401 (_ BitVec 32)) (v_prenex_400 (_ BitVec 32))) (or (= v_arrayElimCell_288 v_prenex_400) (not (bvsle (_ bv0 32) v_prenex_402)) (bvsle (bvadd v_prenex_402 (_ bv4 32)) (select (store |c_#length| v_prenex_400 v_prenex_401) v_arrayElimCell_288)) (= v_arrayElimCell_288 c_main_~x~0.base)))) (or .cse0 .cse6 (forall ((v_arrayElimCell_404 (_ BitVec 32)) (v_prenex_569 (_ BitVec 32)) (v_prenex_568 (_ BitVec 32)) (v_prenex_567 (_ BitVec 32)) (v_prenex_566 (_ BitVec 32))) (let ((.cse148 (select (store |c_#length| v_prenex_568 v_prenex_567) v_arrayElimCell_404))) (or (= v_arrayElimCell_404 v_prenex_568) (bvsle (bvadd v_prenex_569 (_ bv4 32)) .cse148) (= v_arrayElimCell_404 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_569)) (bvsle (bvadd v_prenex_566 (_ bv4 32)) .cse148))))) (= (bvadd (select |c_#valid| c_main_~x~0.base) (_ bv1 1)) (_ bv0 1)) (or .cse3 .cse0 (forall ((v_prenex_483 (_ BitVec 32)) (v_prenex_482 (_ BitVec 32)) (v_prenex_481 (_ BitVec 32)) (v_arrayElimCell_544 (_ BitVec 32)) (v_prenex_480 (_ BitVec 32))) (let ((.cse149 (select (store |c_#length| v_prenex_483 v_prenex_481) v_arrayElimCell_544))) (or (= v_arrayElimCell_544 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_482)) (= v_arrayElimCell_544 v_prenex_483) (bvsle (bvadd v_prenex_480 (_ bv4 32)) .cse149) (bvsle (bvadd v_prenex_482 (_ bv4 32)) .cse149))))) (or .cse0 .cse6 (forall ((v_prenex_305 (_ BitVec 32)) (v_prenex_304 (_ BitVec 32)) (v_arrayElimCell_608 (_ BitVec 32)) (v_prenex_67 (_ BitVec 32))) (or (= v_arrayElimCell_608 v_prenex_304) (bvsle (bvadd v_prenex_67 (_ bv4 32)) (select (store |c_#length| v_prenex_304 v_prenex_305) v_arrayElimCell_608)) (= v_arrayElimCell_608 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_67))))) (or .cse58 .cse150 .cse60 .cse61) (or .cse0 (forall ((v_prenex_619 (_ BitVec 32)) (v_prenex_618 (_ BitVec 32)) (v_arrayElimCell_643 (_ BitVec 32)) (v_prenex_617 (_ BitVec 32)) (v_prenex_620 (_ BitVec 32))) (let ((.cse151 (select (store |c_#length| v_prenex_620 v_prenex_618) v_arrayElimCell_643))) (or (not (bvsle (_ bv0 32) v_prenex_619)) (bvsle (bvadd v_prenex_619 (_ bv4 32)) .cse151) (bvsle (bvadd v_prenex_617 (_ bv4 32)) .cse151) (= v_arrayElimCell_643 v_prenex_620) (= v_arrayElimCell_643 c_main_~x~0.base))))) (or .cse0 .cse12 (forall ((v_prenex_778 (_ BitVec 32)) (v_prenex_777 (_ BitVec 32)) (v_prenex_776 (_ BitVec 32)) (v_prenex_775 (_ BitVec 32)) (v_arrayElimCell_240 (_ BitVec 32))) (let ((.cse152 (select (store |c_#length| v_prenex_778 v_prenex_777) v_arrayElimCell_240))) (or (bvsle (bvadd v_prenex_776 (_ bv4 32)) .cse152) (bvsle (bvadd v_prenex_775 (_ bv4 32)) .cse152) (not (bvsle (_ bv0 32) v_prenex_775)) (= v_arrayElimCell_240 v_prenex_778) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_240))))) (or .cse0 (forall ((v_arrayElimCell_208 (_ BitVec 32)) (v_prenex_333 (_ BitVec 32)) (v_prenex_332 (_ BitVec 32)) (v_prenex_331 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_333)) (bvsle (bvadd v_prenex_333 (_ bv4 32)) (select (store |c_#length| v_prenex_331 v_prenex_332) v_arrayElimCell_208)) (= v_arrayElimCell_208 v_prenex_331)))) (or .cse0 .cse12 (forall ((v_prenex_230 (_ BitVec 32)) (v_subst_3 (_ BitVec 32)) (v_arrayElimCell_524 (_ BitVec 32)) (v_prenex_229 (_ BitVec 32)) (v_prenex_228 (_ BitVec 32)) (v_prenex_227 (_ BitVec 32))) (let ((.cse153 (store |c_#length| v_prenex_227 v_prenex_230))) (or (not (bvsle (_ bv0 32) v_prenex_228)) (= v_subst_3 v_prenex_227) (bvsle (bvadd v_prenex_229 (_ bv4 32)) (select .cse153 v_subst_3)) (= v_arrayElimCell_524 v_prenex_227) (bvsle (bvadd v_prenex_228 (_ bv4 32)) (select .cse153 v_arrayElimCell_524)) (= v_arrayElimCell_524 c_main_~x~0.base)))) .cse20) (or (forall ((v_prenex_723 (_ BitVec 32)) (v_prenex_722 (_ BitVec 32)) (v_prenex_721 (_ BitVec 32)) (v_prenex_720 (_ BitVec 32)) (v_arrayElimCell_619 (_ BitVec 32))) (let ((.cse154 (select (store |c_#length| v_prenex_723 v_prenex_722) v_arrayElimCell_619))) (or (bvsle (bvadd v_prenex_721 (_ bv4 32)) .cse154) (bvsle (bvadd v_prenex_720 (_ bv4 32)) .cse154) (= v_arrayElimCell_619 v_prenex_723) (not (bvsle (_ bv0 32) v_prenex_720))))) .cse0 .cse11 .cse12) (or .cse0 (forall ((v_prenex_358 (_ BitVec 32)) (v_prenex_357 (_ BitVec 32)) (v_arrayElimCell_628 (_ BitVec 32)) (v_prenex_356 (_ BitVec 32)) (v_prenex_355 (_ BitVec 32))) (let ((.cse155 (select (store |c_#length| v_prenex_355 v_prenex_357) v_arrayElimCell_628))) (or (not (bvsle (_ bv0 32) v_prenex_358)) (bvsle (bvadd v_prenex_356 (_ bv4 32)) .cse155) (= v_arrayElimCell_628 v_prenex_355) (bvsle (bvadd v_prenex_358 (_ bv4 32)) .cse155))))) (or .cse0 .cse1 (forall ((v_prenex_613 (_ BitVec 32)) (v_prenex_612 (_ BitVec 32)) (v_prenex_611 (_ BitVec 32)) (v_arrayElimCell_281 (_ BitVec 32))) (or (= v_arrayElimCell_281 v_prenex_613) (not (bvsle (_ bv0 32) v_prenex_612)) (bvsle (bvadd v_prenex_612 (_ bv4 32)) (select (store |c_#length| v_prenex_613 v_prenex_611) v_arrayElimCell_281)) (= v_arrayElimCell_281 c_main_~x~0.base)))) (or (forall ((v_prenex_390 (_ BitVec 32)) (v_arrayElimCell_668 (_ BitVec 32)) (v_prenex_389 (_ BitVec 32)) (v_arrayElimCell_110 (_ BitVec 32))) (or (= v_arrayElimCell_668 c_main_~x~0.base) (= v_arrayElimCell_668 v_prenex_389) (not (bvsle (_ bv0 32) v_arrayElimCell_110)) (bvsle (bvadd v_arrayElimCell_110 (_ bv4 32)) (select (store |c_#length| v_prenex_389 v_prenex_390) v_arrayElimCell_668)))) .cse0 .cse12 .cse20) (or .cse0 (forall ((v_arrayElimCell_157 (_ BitVec 32)) (v_arrayElimCell_369 (_ BitVec 32)) (v_prenex_255 (_ BitVec 32)) (v_prenex_254 (_ BitVec 32))) (or (= v_arrayElimCell_369 v_prenex_254) (not (bvsle (_ bv0 32) v_arrayElimCell_157)) (= v_arrayElimCell_369 c_main_~x~0.base) (bvsle (bvadd v_arrayElimCell_157 (_ bv4 32)) (select (store |c_#length| v_prenex_254 v_prenex_255) v_arrayElimCell_369)))) .cse6) (or .cse0 .cse6 (forall ((v_prenex_685 (_ BitVec 32)) (v_arrayElimCell_350 (_ BitVec 32)) (v_prenex_684 (_ BitVec 32)) (v_prenex_683 (_ BitVec 32)) (v_prenex_682 (_ BitVec 32))) (let ((.cse156 (select (store |c_#length| v_prenex_685 v_prenex_683) v_arrayElimCell_350))) (or (bvsle (bvadd v_prenex_684 (_ bv4 32)) .cse156) (= v_arrayElimCell_350 v_prenex_685) (bvsle (bvadd v_prenex_682 (_ bv4 32)) .cse156) (not (bvsle (_ bv0 32) v_prenex_684)) (= v_arrayElimCell_350 c_main_~x~0.base))))) (or .cse3 .cse0 .cse6 (forall ((v_arrayElimCell_455 (_ BitVec 32)) (v_prenex_554 (_ BitVec 32)) (v_prenex_553 (_ BitVec 32)) (v_prenex_552 (_ BitVec 32)) (v_prenex_551 (_ BitVec 32))) (let ((.cse157 (select (store |c_#length| v_prenex_554 v_prenex_552) v_arrayElimCell_455))) (or (bvsle (bvadd v_prenex_551 (_ bv4 32)) .cse157) (= v_arrayElimCell_455 v_prenex_554) (not (bvsle (_ bv0 32) v_prenex_553)) (bvsle (bvadd v_prenex_553 (_ bv4 32)) .cse157))))) (or .cse6 (forall ((v_prenex_20 (_ BitVec 32)) (v_prenex_380 (_ BitVec 32)) (v_arrayElimCell_438 (_ BitVec 32)) (v_prenex_379 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_20)) (bvsle (bvadd v_prenex_20 (_ bv4 32)) (select (store |c_#length| v_prenex_379 v_prenex_380) v_arrayElimCell_438)) (= v_arrayElimCell_438 v_prenex_379) (= v_arrayElimCell_438 c_main_~x~0.base)))) (or .cse6 (forall ((v_prenex_296 (_ BitVec 32)) (v_prenex_295 (_ BitVec 32)) (v_arrayElimCell_330 (_ BitVec 32)) (v_prenex_297 (_ BitVec 32)) (v_prenex_58 (_ BitVec 32))) (let ((.cse158 (select (store |c_#length| v_prenex_295 v_prenex_297) v_arrayElimCell_330))) (or (= v_arrayElimCell_330 v_prenex_295) (bvsle (bvadd v_prenex_58 (_ bv4 32)) .cse158) (bvsle (bvadd v_prenex_296 (_ bv4 32)) .cse158) (not (bvsle (_ bv0 32) v_prenex_58)))))) (or .cse3 .cse0 .cse6 (forall ((v_arrayElimCell_545 (_ BitVec 32)) (v_prenex_757 (_ BitVec 32)) (v_prenex_756 (_ BitVec 32)) (v_prenex_755 (_ BitVec 32)) (v_prenex_754 (_ BitVec 32))) (let ((.cse159 (select (store |c_#length| v_prenex_757 v_prenex_756) v_arrayElimCell_545))) (or (= v_arrayElimCell_545 c_main_~x~0.base) (= v_arrayElimCell_545 v_prenex_757) (not (bvsle (_ bv0 32) v_prenex_754)) (bvsle (bvadd v_prenex_754 (_ bv4 32)) .cse159) (bvsle (bvadd v_prenex_755 (_ bv4 32)) .cse159))))) (or .cse0 .cse6 .cse12 (forall ((v_prenex_704 (_ BitVec 32)) (v_prenex_703 (_ BitVec 32)) (v_prenex_702 (_ BitVec 32)) (v_prenex_701 (_ BitVec 32)) (v_arrayElimCell_427 (_ BitVec 32)) (v_prenex_700 (_ BitVec 32))) (let ((.cse162 (store |c_#length| v_prenex_704 v_prenex_703))) (let ((.cse160 (bvadd v_prenex_700 (_ bv4 32))) (.cse161 (select .cse162 v_prenex_701))) (or (= v_arrayElimCell_427 v_prenex_704) (= v_prenex_701 v_prenex_704) (bvsle .cse160 .cse161) (not (bvsle (_ bv0 32) v_prenex_700)) (bvsle .cse160 (select .cse162 v_arrayElimCell_427)) (= v_arrayElimCell_427 c_main_~x~0.base) (bvsle (bvadd v_prenex_702 (_ bv4 32)) .cse161)))))) (or .cse0 .cse1 (forall ((v_prenex_676 (_ BitVec 32)) (v_prenex_675 (_ BitVec 32)) (v_prenex_674 (_ BitVec 32)) (v_arrayElimCell_509 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_675)) (bvsle (bvadd v_prenex_675 (_ bv4 32)) (select (store |c_#length| v_prenex_676 v_prenex_674) v_arrayElimCell_509)) (= v_arrayElimCell_509 v_prenex_676) (= v_arrayElimCell_509 c_main_~x~0.base)))) (or .cse0 .cse12 (forall ((v_prenex_32 (_ BitVec 32)) (v_arrayElimCell_292 (_ BitVec 32)) (v_prenex_212 (_ BitVec 32)) (v_prenex_211 (_ BitVec 32)) (v_prenex_210 (_ BitVec 32))) (let ((.cse163 (select (store |c_#length| v_prenex_210 v_prenex_212) v_arrayElimCell_292))) (or (= v_arrayElimCell_292 v_prenex_210) (bvsle (bvadd v_prenex_32 (_ bv4 32)) .cse163) (bvsle (bvadd v_prenex_211 (_ bv4 32)) .cse163) (= v_arrayElimCell_292 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_32))))) .cse20) (or .cse3 .cse0 .cse6 (forall ((v_prenex_627 (_ BitVec 32)) (v_prenex_626 (_ BitVec 32)) (v_prenex_625 (_ BitVec 32)) (v_arrayElimCell_562 (_ BitVec 32))) (or (= v_arrayElimCell_562 v_prenex_627) (not (bvsle (_ bv0 32) v_prenex_626)) (= v_arrayElimCell_562 c_main_~x~0.base) (bvsle (bvadd v_prenex_626 (_ bv4 32)) (select (store |c_#length| v_prenex_627 v_prenex_625) v_arrayElimCell_562))))) (or .cse0 .cse11 (forall ((v_arrayElimCell_200 (_ BitVec 32)) (v_prenex_303 (_ BitVec 32)) (v_prenex_302 (_ BitVec 32)) (v_prenex_301 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_303 (_ bv4 32)) (select (store |c_#length| v_prenex_301 v_prenex_302) v_arrayElimCell_200)) (= v_arrayElimCell_200 v_prenex_301) (not (bvsle (_ bv0 32) v_prenex_303)) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_200))) .cse12) (or .cse0 .cse12 .cse20 (forall ((v_prenex_95 (_ BitVec 32)) (v_prenex_765 (_ BitVec 32)) (v_prenex_764 (_ BitVec 32)) (v_prenex_763 (_ BitVec 32)) (v_prenex_762 (_ BitVec 32)) (v_prenex_761 (_ BitVec 32))) (let ((.cse165 (store |c_#length| v_prenex_765 v_prenex_764))) (let ((.cse164 (bvadd v_prenex_763 (_ bv4 32))) (.cse166 (select .cse165 v_prenex_95))) (or (bvsle .cse164 (select .cse165 v_prenex_762)) (= v_prenex_95 c_main_~x~0.base) (= v_prenex_762 v_prenex_765) (= v_prenex_95 v_prenex_765) (not (bvsle (_ bv0 32) v_prenex_761)) (bvsle .cse164 .cse166) (bvsle (bvadd v_prenex_761 (_ bv4 32)) .cse166)))))) .cse0 (= (bvadd (select |c_#valid| c_main_~head~0.base) (_ bv1 1)) (_ bv0 1)) (or (forall ((v_arrayElimCell_527 (_ BitVec 32)) (v_prenex_259 (_ BitVec 32)) (v_prenex_258 (_ BitVec 32)) (v_prenex_257 (_ BitVec 32)) (v_prenex_256 (_ BitVec 32))) (let ((.cse167 (select (store |c_#length| v_prenex_256 v_prenex_259) v_arrayElimCell_527))) (or (bvsle (bvadd v_prenex_257 (_ bv4 32)) .cse167) (= v_arrayElimCell_527 v_prenex_256) (= v_arrayElimCell_527 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_257)) (bvsle (bvadd v_prenex_258 (_ bv4 32)) .cse167)))) .cse0 .cse12 .cse20) (or .cse0 (forall ((v_arrayElimCell_203 (_ BitVec 32)) (v_arrayElimCell_109 (_ BitVec 32)) (v_prenex_248 (_ BitVec 32)) (v_prenex_247 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_arrayElimCell_109)) (= v_arrayElimCell_203 c_main_~x~0.base) (bvsle (bvadd v_arrayElimCell_109 (_ bv4 32)) (select (store |c_#length| v_prenex_247 v_prenex_248) v_arrayElimCell_203)) (= v_arrayElimCell_203 v_prenex_247))) .cse12 .cse20) (or .cse6 (forall ((v_arrayElimCell_137 (_ BitVec 32)) (v_prenex_407 (_ BitVec 32)) (v_arrayElimCell_446 (_ BitVec 32)) (v_prenex_406 (_ BitVec 32))) (or (= v_arrayElimCell_446 v_prenex_406) (bvsle (bvadd v_arrayElimCell_137 (_ bv4 32)) (select (store |c_#length| v_prenex_406 v_prenex_407) v_arrayElimCell_446)) (= v_arrayElimCell_446 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_arrayElimCell_137))))) (or .cse0 .cse6 (forall ((v_prenex_73 (_ BitVec 32)) (v_prenex_246 (_ BitVec 32)) (v_arrayElimCell_273 (_ BitVec 32)) (v_prenex_245 (_ BitVec 32)) (v_prenex_244 (_ BitVec 32))) (let ((.cse168 (select (store |c_#length| v_prenex_244 v_prenex_246) v_arrayElimCell_273))) (or (bvsle (bvadd v_prenex_73 (_ bv4 32)) .cse168) (bvsle (bvadd v_prenex_245 (_ bv4 32)) .cse168) (= v_arrayElimCell_273 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_73)) (= v_arrayElimCell_273 v_prenex_244))))) (or .cse3 .cse0 (forall ((v_prenex_284 (_ BitVec 32)) (v_prenex_283 (_ BitVec 32)) (v_prenex_282 (_ BitVec 32)) (v_prenex_281 (_ BitVec 32)) (v_arrayElimCell_394 (_ BitVec 32))) (let ((.cse169 (select (store |c_#length| v_prenex_281 v_prenex_283) v_arrayElimCell_394))) (or (= v_arrayElimCell_394 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_284)) (bvsle (bvadd v_prenex_284 (_ bv4 32)) .cse169) (bvsle (bvadd v_prenex_282 (_ bv4 32)) .cse169) (= v_arrayElimCell_394 v_prenex_281))))) (or .cse58 .cse150 .cse60 .cse61 (forall ((v_prenex_1 (_ BitVec 32))) (not (= (_ bv0 1) (select |c_#valid| v_prenex_1))))) (or .cse58 .cse59 .cse60 .cse61) (or .cse3 .cse0 .cse1 (forall ((v_prenex_373 (_ BitVec 32)) (v_prenex_372 (_ BitVec 32)) (v_prenex_371 (_ BitVec 32)) (v_prenex_370 (_ BitVec 32)) (v_arrayElimCell_361 (_ BitVec 32))) (let ((.cse170 (select (store |c_#length| v_prenex_370 v_prenex_372) v_arrayElimCell_361))) (or (bvsle (bvadd v_prenex_373 (_ bv4 32)) .cse170) (bvsle (bvadd v_prenex_371 (_ bv4 32)) .cse170) (not (bvsle (_ bv0 32) v_prenex_373)) (= v_arrayElimCell_361 c_main_~x~0.base) (= v_arrayElimCell_361 v_prenex_370))))) (or .cse0 (forall ((v_arrayElimCell_465 (_ BitVec 32)) (v_prenex_183 (_ BitVec 32)) (v_prenex_65 (_ BitVec 32)) (v_prenex_182 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_65)) (bvsle (bvadd v_prenex_65 (_ bv4 32)) (select (store |c_#length| v_prenex_183 v_prenex_182) v_arrayElimCell_465)) (= v_arrayElimCell_465 v_prenex_183))) .cse6) (or (forall ((v_arrayElimCell_434 (_ BitVec 32)) (v_prenex_465 (_ BitVec 32)) (v_prenex_464 (_ BitVec 32)) (v_prenex_47 (_ BitVec 32))) (or (= v_arrayElimCell_434 v_prenex_465) (not (bvsle (_ bv0 32) v_prenex_47)) (bvsle (bvadd v_prenex_47 (_ bv4 32)) (select (store |c_#length| v_prenex_465 v_prenex_464) v_arrayElimCell_434)))) .cse0 .cse6) (or .cse6 .cse12 (forall ((v_prenex_18 (_ BitVec 32)) (v_prenex_278 (_ BitVec 32)) (v_arrayElimCell_262 (_ BitVec 32)) (v_prenex_277 (_ BitVec 32)) (v_prenex_276 (_ BitVec 32)) (v_prenex_275 (_ BitVec 32))) (let ((.cse172 (store |c_#length| v_prenex_275 v_prenex_278))) (let ((.cse171 (bvadd v_prenex_277 (_ bv4 32))) (.cse173 (select .cse172 v_arrayElimCell_262))) (or (= v_arrayElimCell_262 v_prenex_275) (not (bvsle (_ bv0 32) v_prenex_18)) (= v_arrayElimCell_262 c_main_~x~0.base) (= v_prenex_276 v_prenex_275) (bvsle .cse171 (select .cse172 v_prenex_276)) (bvsle .cse171 .cse173) (bvsle (bvadd v_prenex_18 (_ bv4 32)) .cse173)))))) (or .cse6 .cse12 (forall ((v_prenex_616 (_ BitVec 32)) (v_arrayElimCell_226 (_ BitVec 32)) (v_prenex_615 (_ BitVec 32)) (v_prenex_614 (_ BitVec 32)) (v_arrayElimCell_84 (_ BitVec 32))) (let ((.cse174 (select (store |c_#length| v_prenex_616 v_prenex_615) v_arrayElimCell_226))) (or (= v_arrayElimCell_226 v_prenex_616) (bvsle (bvadd v_prenex_614 (_ bv4 32)) .cse174) (bvsle (bvadd v_arrayElimCell_84 (_ bv4 32)) .cse174) (not (bvsle (_ bv0 32) v_arrayElimCell_84)))))) (or .cse0 .cse12 (forall ((v_prenex_405 (_ BitVec 32)) (v_prenex_404 (_ BitVec 32)) (v_prenex_403 (_ BitVec 32)) (v_arrayElimCell_617 (_ BitVec 32)) (v_prenex_33 (_ BitVec 32))) (let ((.cse175 (select (store |c_#length| v_prenex_403 v_prenex_405) v_arrayElimCell_617))) (or (bvsle (bvadd v_prenex_404 (_ bv4 32)) .cse175) (= v_arrayElimCell_617 v_prenex_403) (bvsle (bvadd v_prenex_33 (_ bv4 32)) .cse175) (not (bvsle (_ bv0 32) v_prenex_33)))))) (or .cse0 .cse12 (forall ((v_prenex_41 (_ BitVec 32)) (v_arrayElimCell_528 (_ BitVec 32)) (v_prenex_189 (_ BitVec 32)) (v_prenex_188 (_ BitVec 32)) (v_prenex_187 (_ BitVec 32))) (let ((.cse176 (select (store |c_#length| v_prenex_188 v_prenex_187) v_arrayElimCell_528))) (or (= v_arrayElimCell_528 v_prenex_188) (not (bvsle (_ bv0 32) v_prenex_41)) (bvsle (bvadd v_prenex_41 (_ bv4 32)) .cse176) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_528) (bvsle (bvadd v_prenex_189 (_ bv4 32)) .cse176))))) (or .cse0 .cse12 (forall ((v_arrayElimCell_699 (_ BitVec 32)) (v_prenex_624 (_ BitVec 32)) (v_prenex_623 (_ BitVec 32)) (v_prenex_622 (_ BitVec 32)) (v_prenex_621 (_ BitVec 32))) (let ((.cse177 (select (store |c_#length| v_prenex_623 v_prenex_622) v_arrayElimCell_699))) (or (= v_arrayElimCell_699 c_main_~x~0.base) (bvsle (bvadd v_prenex_624 (_ bv4 32)) .cse177) (not (bvsle (_ bv0 32) v_prenex_624)) (= v_arrayElimCell_699 v_prenex_623) (bvsle (bvadd v_prenex_621 (_ bv4 32)) .cse177)))) .cse20) (or .cse3 .cse0 (forall ((v_prenex_508 (_ BitVec 32)) (v_prenex_507 (_ BitVec 32)) (v_prenex_506 (_ BitVec 32)) (v_prenex_505 (_ BitVec 32)) (v_arrayElimCell_459 (_ BitVec 32))) (let ((.cse178 (select (store |c_#length| v_prenex_508 v_prenex_506) v_arrayElimCell_459))) (or (bvsle (bvadd v_prenex_505 (_ bv4 32)) .cse178) (= v_arrayElimCell_459 v_prenex_508) (not (bvsle (_ bv0 32) v_prenex_507)) (bvsle (bvadd v_prenex_507 (_ bv4 32)) .cse178)))) .cse6) (or .cse6 (forall ((v_prenex_161 (_ BitVec 32)) (v_prenex_636 (_ BitVec 32)) (v_prenex_635 (_ BitVec 32)) (v_prenex_634 (_ BitVec 32)) (v_prenex_633 (_ BitVec 32))) (let ((.cse179 (select (store |c_#length| v_prenex_635 v_prenex_634) v_prenex_161))) (or (bvsle (bvadd v_prenex_633 (_ bv4 32)) .cse179) (not (bvsle (_ bv0 32) v_prenex_636)) (bvsle (bvadd v_prenex_636 (_ bv4 32)) .cse179) (= v_prenex_161 v_prenex_635) (= v_prenex_161 c_main_~x~0.base))))) (or (forall ((v_arrayElimCell_490 (_ BitVec 32)) (v_prenex_632 (_ BitVec 32)) (v_prenex_631 (_ BitVec 32)) (v_prenex_630 (_ BitVec 32))) (or (= v_arrayElimCell_490 v_prenex_632) (= v_arrayElimCell_490 c_main_~x~0.base) (bvsle (bvadd v_prenex_631 (_ bv4 32)) (select (store |c_#length| v_prenex_632 v_prenex_630) v_arrayElimCell_490)) (not (bvsle (_ bv0 32) v_prenex_631)))) .cse0 .cse1) (or .cse3 .cse0 .cse6 (forall ((v_prenex_692 (_ BitVec 32)) (v_arrayElimCell_486 (_ BitVec 32)) (v_prenex_691 (_ BitVec 32)) (v_prenex_690 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_691)) (= v_arrayElimCell_486 c_main_~x~0.base) (= v_arrayElimCell_486 v_prenex_692) (bvsle (bvadd v_prenex_691 (_ bv4 32)) (select (store |c_#length| v_prenex_692 v_prenex_690) v_arrayElimCell_486))))) (or .cse0 (forall ((v_prenex_603 (_ BitVec 32)) (v_arrayElimCell_190 (_ BitVec 32)) (v_prenex_602 (_ BitVec 32)) (v_prenex_601 (_ BitVec 32)) (v_prenex_600 (_ BitVec 32))) (let ((.cse180 (select (store |c_#length| v_prenex_603 v_prenex_601) v_arrayElimCell_190))) (or (= v_arrayElimCell_190 v_prenex_603) (bvsle (bvadd v_prenex_600 (_ bv4 32)) .cse180) (bvsle (bvadd v_prenex_602 (_ bv4 32)) .cse180) (not (bvsle (_ bv0 32) v_prenex_602)))))) (= (bvadd (select |c_#length| |c_main_write~$Pointer$_#value.base|) (_ bv4294967280 32)) (_ bv0 32)) (or .cse0 .cse1 (forall ((v_prenex_727 (_ BitVec 32)) (v_prenex_726 (_ BitVec 32)) (v_prenex_725 (_ BitVec 32)) (v_prenex_724 (_ BitVec 32)) (v_arrayElimCell_649 (_ BitVec 32))) (let ((.cse181 (select (store |c_#length| v_prenex_727 v_prenex_726) v_arrayElimCell_649))) (or (= v_arrayElimCell_649 c_main_~x~0.base) (= v_arrayElimCell_649 v_prenex_727) (bvsle (bvadd v_prenex_724 (_ bv4 32)) .cse181) (bvsle (bvadd v_prenex_725 (_ bv4 32)) .cse181) (not (bvsle (_ bv0 32) v_prenex_724)))))) (or .cse0 .cse6 (forall ((v_prenex_648 (_ BitVec 32)) (v_prenex_647 (_ BitVec 32)) (v_prenex_646 (_ BitVec 32)) (v_prenex_645 (_ BitVec 32)) (v_arrayElimCell_407 (_ BitVec 32)) (v_prenex_644 (_ BitVec 32))) (let ((.cse186 (store |c_#length| v_prenex_647 v_prenex_646))) (let ((.cse182 (bvadd v_prenex_648 (_ bv4 32))) (.cse184 (select .cse186 v_prenex_644)) (.cse185 (bvadd v_prenex_645 (_ bv4 32))) (.cse183 (select .cse186 v_arrayElimCell_407))) (or (bvsle .cse182 .cse183) (bvsle .cse182 .cse184) (= v_arrayElimCell_407 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_648)) (= v_arrayElimCell_407 v_prenex_647) (= v_prenex_644 v_prenex_647) (bvsle .cse185 .cse184) (bvsle .cse185 .cse183)))))) (or .cse0 (forall ((v_prenex_272 (_ BitVec 32)) (v_arrayElimCell_423 (_ BitVec 32)) (v_prenex_271 (_ BitVec 32)) (v_prenex_270 (_ BitVec 32))) (or (= v_arrayElimCell_423 c_main_~x~0.base) (= v_arrayElimCell_423 v_prenex_270) (not (bvsle (_ bv0 32) v_prenex_271)) (bvsle (bvadd v_prenex_271 (_ bv4 32)) (select (store |c_#length| v_prenex_270 v_prenex_272) v_arrayElimCell_423)))) .cse6) .cse12 (or .cse0 (forall ((v_prenex_729 (_ BitVec 32)) (v_prenex_728 (_ BitVec 32)) (v_prenex_730 (_ BitVec 32)) (v_arrayElimCell_198 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_728 (_ bv4 32)) (select (store |c_#length| v_prenex_730 v_prenex_729) v_arrayElimCell_198)) (= v_arrayElimCell_198 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_728)) (= v_arrayElimCell_198 v_prenex_730))) .cse12) (or .cse3 .cse0 .cse6 (forall ((v_prenex_599 (_ BitVec 32)) (v_prenex_598 (_ BitVec 32)) (v_prenex_597 (_ BitVec 32)) (v_prenex_596 (_ BitVec 32)) (v_arrayElimCell_430 (_ BitVec 32))) (let ((.cse187 (select (store |c_#length| v_prenex_599 v_prenex_597) v_arrayElimCell_430))) (or (bvsle (bvadd v_prenex_598 (_ bv4 32)) .cse187) (bvsle (bvadd v_prenex_596 (_ bv4 32)) .cse187) (not (bvsle (_ bv0 32) v_prenex_598)) (= v_arrayElimCell_430 v_prenex_599) (= v_arrayElimCell_430 c_main_~x~0.base))))) (or .cse3 .cse0 (forall ((v_prenex_399 (_ BitVec 32)) (v_prenex_398 (_ BitVec 32)) (v_arrayElimCell_483 (_ BitVec 32)) (v_prenex_397 (_ BitVec 32))) (or (= v_arrayElimCell_483 c_main_~x~0.base) (bvsle (bvadd v_prenex_399 (_ bv4 32)) (select (store |c_#length| v_prenex_397 v_prenex_398) v_arrayElimCell_483)) (not (bvsle (_ bv0 32) v_prenex_399)) (= v_arrayElimCell_483 v_prenex_397)))) (or .cse0 (forall ((v_arrayElimCell_664 (_ BitVec 32)) (v_prenex_769 (_ BitVec 32)) (v_prenex_768 (_ BitVec 32)) (v_prenex_767 (_ BitVec 32)) (v_prenex_766 (_ BitVec 32))) (let ((.cse188 (select (store |c_#length| v_prenex_769 v_prenex_768) v_arrayElimCell_664))) (or (= v_arrayElimCell_664 c_main_~x~0.base) (= v_arrayElimCell_664 v_prenex_769) (bvsle (bvadd v_prenex_766 (_ bv4 32)) .cse188) (not (bvsle (_ bv0 32) v_prenex_766)) (bvsle (bvadd v_prenex_767 (_ bv4 32)) .cse188)))) .cse6) (= c_main_~x~0.offset (_ bv0 32))))) is different from true [2018-10-27 04:56:03,271 WARN L179 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 46 [2018-10-27 04:56:04,554 WARN L179 SmtUtils]: Spent 151.00 ms on a formula simplification. DAG size of input: 38 DAG size of output: 32 [2018-10-27 04:56:07,813 WARN L854 $PredicateComparison]: unable to prove that (let ((.cse3 (= |c_main_write~$Pointer$_#value.base| c_main_~x~0.base)) (.cse6 (= |c_main_write~$Pointer$_#ptr.base| c_main_~x~0.base)) (.cse20 (= |c_main_write~$Pointer$_#value.base| |c_main_write~$Pointer$_#ptr.base|)) (.cse0 (= c_main_~x~0.offset |c_main_write~$Pointer$_#ptr.offset|))) (let ((.cse51 (bvsle |c_main_write~$Pointer$_#value.offset| (bvadd |c_main_write~$Pointer$_#value.offset| (_ bv4 32)))) (.cse50 (not .cse0)) (.cse64 (not (bvsle (_ bv0 32) |c_main_write~$Pointer$_#value.offset|))) (.cse11 (not .cse20)) (.cse1 (not .cse6)) (.cse12 (not .cse3))) (and (or .cse0 (forall ((v_prenex_274 (_ BitVec 32)) (v_prenex_273 (_ BitVec 32)) (v_prenex_70 (_ BitVec 32)) (v_arrayElimCell_493 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_70)) (= v_arrayElimCell_493 c_main_~x~0.base) (= v_arrayElimCell_493 v_prenex_273) (bvsle (bvadd v_prenex_70 (_ bv4 32)) (select (store |c_#length| v_prenex_273 v_prenex_274) v_arrayElimCell_493))))) (or .cse0 .cse1 (forall ((v_arrayElimCell_420 (_ BitVec 32)) (v_arrayElimCell_150 (_ BitVec 32)) (|v_main_#Ultimate.alloc_~size_5| (_ BitVec 32)) (v_prenex_2 (_ BitVec 32))) (or (= v_arrayElimCell_420 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_arrayElimCell_150)) (= v_arrayElimCell_420 v_prenex_2) (bvsle (bvadd v_arrayElimCell_150 (_ bv4 32)) (select (store |c_#length| v_prenex_2 |v_main_#Ultimate.alloc_~size_5|) v_arrayElimCell_420))))) (or .cse0 .cse1 (forall ((v_arrayElimCell_634 (_ BitVec 32)) (v_prenex_317 (_ BitVec 32)) (v_prenex_316 (_ BitVec 32)) (v_prenex_315 (_ BitVec 32)) (v_prenex_314 (_ BitVec 32))) (let ((.cse2 (select (store |c_#length| v_prenex_314 v_prenex_316) v_arrayElimCell_634))) (or (not (bvsle (_ bv0 32) v_prenex_317)) (bvsle (bvadd v_prenex_315 (_ bv4 32)) .cse2) (= v_arrayElimCell_634 v_prenex_314) (bvsle (bvadd v_prenex_317 (_ bv4 32)) .cse2))))) (or .cse3 .cse0 (forall ((v_arrayElimCell_354 (_ BitVec 32)) (v_prenex_490 (_ BitVec 32)) (v_prenex_489 (_ BitVec 32)) (v_prenex_488 (_ BitVec 32)) (v_prenex_487 (_ BitVec 32))) (let ((.cse4 (select (store |c_#length| v_prenex_490 v_prenex_488) v_arrayElimCell_354))) (or (bvsle (bvadd v_prenex_489 (_ bv4 32)) .cse4) (= v_arrayElimCell_354 c_main_~x~0.base) (bvsle (bvadd v_prenex_487 (_ bv4 32)) .cse4) (not (bvsle (_ bv0 32) v_prenex_489)) (= v_arrayElimCell_354 v_prenex_490))))) (or .cse3 .cse0 (forall ((v_prenex_719 (_ BitVec 32)) (v_prenex_718 (_ BitVec 32)) (v_prenex_717 (_ BitVec 32)) (v_arrayElimCell_456 (_ BitVec 32)) (v_prenex_716 (_ BitVec 32))) (let ((.cse5 (select (store |c_#length| v_prenex_719 v_prenex_718) v_arrayElimCell_456))) (or (= v_arrayElimCell_456 v_prenex_719) (bvsle (bvadd v_prenex_716 (_ bv4 32)) .cse5) (not (bvsle (_ bv0 32) v_prenex_716)) (bvsle (bvadd v_prenex_717 (_ bv4 32)) .cse5))))) (or .cse0 .cse6 (forall ((v_arrayElimCell_589 (_ BitVec 32)) (v_prenex_219 (_ BitVec 32)) (v_prenex_218 (_ BitVec 32)) (v_prenex_217 (_ BitVec 32)) (v_prenex_216 (_ BitVec 32))) (let ((.cse7 (select (store |c_#length| v_prenex_217 v_prenex_219) v_arrayElimCell_589))) (or (not (bvsle (_ bv0 32) v_prenex_216)) (= v_arrayElimCell_589 c_main_~x~0.base) (= v_arrayElimCell_589 v_prenex_217) (bvsle (bvadd v_prenex_218 (_ bv4 32)) .cse7) (bvsle (bvadd v_prenex_216 (_ bv4 32)) .cse7))))) (or .cse0 .cse6 (forall ((v_prenex_280 (_ BitVec 32)) (v_prenex_279 (_ BitVec 32)) (v_arrayElimCell_471 (_ BitVec 32)) (v_arrayElimCell_163 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_arrayElimCell_163)) (= v_arrayElimCell_471 v_prenex_279) (bvsle (bvadd v_arrayElimCell_163 (_ bv4 32)) (select (store |c_#length| v_prenex_279 v_prenex_280) v_arrayElimCell_471)) (= v_arrayElimCell_471 c_main_~x~0.base)))) (or .cse0 (forall ((v_arrayElimCell_586 (_ BitVec 32)) (v_prenex_171 (_ BitVec 32)) (v_prenex_170 (_ BitVec 32)) (v_prenex_71 (_ BitVec 32)) (v_prenex_169 (_ BitVec 32))) (let ((.cse8 (select (store |c_#length| v_prenex_169 v_prenex_171) v_arrayElimCell_586))) (or (bvsle (bvadd v_prenex_71 (_ bv4 32)) .cse8) (= v_arrayElimCell_586 c_main_~x~0.base) (bvsle (bvadd v_prenex_170 (_ bv4 32)) .cse8) (= v_arrayElimCell_586 v_prenex_169) (not (bvsle (_ bv0 32) v_prenex_71)))))) (or .cse0 .cse6 (forall ((v_arrayElimCell_629 (_ BitVec 32)) (v_prenex_499 (_ BitVec 32)) (v_prenex_498 (_ BitVec 32)) (v_prenex_497 (_ BitVec 32)) (v_prenex_496 (_ BitVec 32))) (let ((.cse9 (select (store |c_#length| v_prenex_498 v_prenex_497) v_arrayElimCell_629))) (or (bvsle (bvadd v_prenex_499 (_ bv4 32)) .cse9) (= v_arrayElimCell_629 v_prenex_498) (not (bvsle (_ bv0 32) v_prenex_499)) (bvsle (bvadd v_prenex_496 (_ bv4 32)) .cse9))))) (or .cse3 .cse0 .cse1 (forall ((v_arrayElimCell_399 (_ BitVec 32)) (v_prenex_656 (_ BitVec 32)) (v_prenex_655 (_ BitVec 32)) (v_prenex_654 (_ BitVec 32)) (v_prenex_653 (_ BitVec 32))) (let ((.cse10 (select (store |c_#length| v_prenex_655 v_prenex_654) v_arrayElimCell_399))) (or (bvsle (bvadd v_prenex_656 (_ bv4 32)) .cse10) (= v_arrayElimCell_399 v_prenex_655) (bvsle (bvadd v_prenex_653 (_ bv4 32)) .cse10) (= v_arrayElimCell_399 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_656)))))) (or .cse0 .cse11 .cse12 (forall ((v_arrayElimCell_653 (_ BitVec 32)) (v_prenex_587 (_ BitVec 32)) (v_prenex_586 (_ BitVec 32)) (v_prenex_585 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_586 (_ bv4 32)) (select (store |c_#length| v_prenex_587 v_prenex_585) v_arrayElimCell_653)) (= v_arrayElimCell_653 v_prenex_587) (not (bvsle (_ bv0 32) v_prenex_586))))) (or .cse0 (forall ((v_prenex_252 (_ BitVec 32)) (v_prenex_251 (_ BitVec 32)) (v_prenex_39 (_ BitVec 32)) (v_arrayElimCell_373 (_ BitVec 32)) (v_prenex_253 (_ BitVec 32))) (let ((.cse13 (select (store |c_#length| v_prenex_251 v_prenex_253) v_arrayElimCell_373))) (or (= v_arrayElimCell_373 v_prenex_251) (bvsle (bvadd v_prenex_39 (_ bv4 32)) .cse13) (not (bvsle (_ bv0 32) v_prenex_39)) (bvsle (bvadd v_prenex_252 (_ bv4 32)) .cse13)))) .cse6) (or .cse6 (forall ((v_prenex_162 (_ BitVec 32)) (v_prenex_579 (_ BitVec 32)) (v_prenex_578 (_ BitVec 32)) (v_prenex_577 (_ BitVec 32)) (v_prenex_576 (_ BitVec 32)) (v_prenex_575 (_ BitVec 32))) (let ((.cse18 (store |c_#length| v_prenex_578 v_prenex_577))) (let ((.cse14 (bvadd v_prenex_576 (_ bv4 32))) (.cse15 (select .cse18 v_prenex_575)) (.cse17 (bvadd v_prenex_579 (_ bv4 32))) (.cse16 (select .cse18 v_prenex_162))) (or (bvsle .cse14 .cse15) (= v_prenex_162 c_main_~x~0.base) (bvsle .cse14 .cse16) (not (bvsle (_ bv0 32) v_prenex_579)) (bvsle .cse17 .cse15) (= v_prenex_575 v_prenex_578) (bvsle .cse17 .cse16) (= v_prenex_162 v_prenex_578)))))) (or (forall ((v_arrayElimCell_613 (_ BitVec 32)) (v_prenex_668 (_ BitVec 32)) (v_prenex_667 (_ BitVec 32)) (v_prenex_666 (_ BitVec 32)) (v_prenex_665 (_ BitVec 32))) (let ((.cse19 (select (store |c_#length| v_prenex_668 v_prenex_666) v_arrayElimCell_613))) (or (bvsle (bvadd v_prenex_667 (_ bv4 32)) .cse19) (= v_arrayElimCell_613 v_prenex_668) (not (bvsle (_ bv0 32) v_prenex_667)) (bvsle (bvadd v_prenex_665 (_ bv4 32)) .cse19)))) .cse0 .cse12 .cse20) (or .cse0 .cse6 (forall ((v_arrayElimCell_390 (_ BitVec 32)) (v_prenex_546 (_ BitVec 32)) (v_prenex_545 (_ BitVec 32)) (v_prenex_544 (_ BitVec 32)) (v_prenex_543 (_ BitVec 32)) (v_prenex_542 (_ BitVec 32))) (let ((.cse25 (store |c_#length| v_prenex_545 v_prenex_544))) (let ((.cse21 (bvadd v_prenex_546 (_ bv4 32))) (.cse22 (select .cse25 v_arrayElimCell_390)) (.cse24 (bvadd v_prenex_543 (_ bv4 32))) (.cse23 (select .cse25 v_prenex_542))) (or (= v_prenex_542 v_prenex_545) (bvsle .cse21 .cse22) (= v_arrayElimCell_390 c_main_~x~0.base) (= v_arrayElimCell_390 v_prenex_545) (bvsle .cse21 .cse23) (bvsle .cse24 .cse22) (not (bvsle (_ bv0 32) v_prenex_546)) (bvsle .cse24 .cse23)))))) (or .cse0 .cse1 (forall ((v_arrayElimCell_401 (_ BitVec 32)) (v_prenex_479 (_ BitVec 32)) (v_prenex_478 (_ BitVec 32)) (v_prenex_477 (_ BitVec 32)) (v_prenex_476 (_ BitVec 32)) (v_prenex_475 (_ BitVec 32))) (let ((.cse30 (store |c_#length| v_prenex_478 v_prenex_477))) (let ((.cse26 (bvadd v_prenex_479 (_ bv4 32))) (.cse28 (select .cse30 v_arrayElimCell_401)) (.cse29 (bvadd v_prenex_476 (_ bv4 32))) (.cse27 (select .cse30 v_prenex_475))) (or (= v_prenex_475 v_prenex_478) (bvsle .cse26 .cse27) (bvsle .cse26 .cse28) (= v_arrayElimCell_401 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_479)) (bvsle .cse29 .cse28) (= v_arrayElimCell_401 v_prenex_478) (bvsle .cse29 .cse27)))))) (or .cse0 .cse1 (forall ((v_prenex_593 (_ BitVec 32)) (v_prenex_592 (_ BitVec 32)) (v_arrayElimCell_192 (_ BitVec 32)) (v_prenex_595 (_ BitVec 32)) (v_prenex_594 (_ BitVec 32))) (let ((.cse31 (select (store |c_#length| v_prenex_595 v_prenex_593) v_arrayElimCell_192))) (or (bvsle (bvadd v_prenex_594 (_ bv4 32)) .cse31) (bvsle (bvadd v_prenex_592 (_ bv4 32)) .cse31) (= v_arrayElimCell_192 v_prenex_595) (not (bvsle (_ bv0 32) v_prenex_594)))))) (or (forall ((v_arrayElimCell_322 (_ BitVec 32)) (v_arrayElimCell_78 (_ BitVec 32)) (v_prenex_699 (_ BitVec 32)) (v_prenex_698 (_ BitVec 32)) (v_prenex_697 (_ BitVec 32))) (let ((.cse32 (select (store |c_#length| v_prenex_699 v_prenex_698) v_arrayElimCell_322))) (or (bvsle (bvadd v_prenex_697 (_ bv4 32)) .cse32) (bvsle (bvadd v_arrayElimCell_78 (_ bv4 32)) .cse32) (= v_arrayElimCell_322 v_prenex_699) (not (bvsle (_ bv0 32) v_arrayElimCell_78))))) .cse6) (or (forall ((v_arrayElimCell_647 (_ BitVec 32)) (v_prenex_204 (_ BitVec 32)) (v_prenex_203 (_ BitVec 32)) (v_prenex_202 (_ BitVec 32)) (v_prenex_36 (_ BitVec 32))) (let ((.cse33 (select (store |c_#length| v_prenex_202 v_prenex_204) v_arrayElimCell_647))) (or (= v_arrayElimCell_647 v_prenex_202) (bvsle (bvadd v_prenex_203 (_ bv4 32)) .cse33) (= v_arrayElimCell_647 c_main_~x~0.base) (bvsle (bvadd v_prenex_36 (_ bv4 32)) .cse33) (not (bvsle (_ bv0 32) v_prenex_36))))) .cse0 .cse6) (or .cse0 (forall ((v_prenex_536 (_ BitVec 32)) (v_prenex_535 (_ BitVec 32)) (v_prenex_534 (_ BitVec 32)) (v_arrayElimCell_660 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_535)) (= v_arrayElimCell_660 v_prenex_536) (bvsle (bvadd v_prenex_535 (_ bv4 32)) (select (store |c_#length| v_prenex_536 v_prenex_534) v_arrayElimCell_660)))) .cse12 .cse20) (or .cse0 (forall ((v_prenex_591 (_ BitVec 32)) (v_prenex_590 (_ BitVec 32)) (v_arrayElimCell_239 (_ BitVec 32)) (v_prenex_589 (_ BitVec 32)) (v_prenex_588 (_ BitVec 32))) (let ((.cse34 (select (store |c_#length| v_prenex_591 v_prenex_589) v_arrayElimCell_239))) (or (= v_arrayElimCell_239 c_main_~x~0.base) (bvsle (bvadd v_prenex_590 (_ bv4 32)) .cse34) (not (bvsle (_ bv0 32) v_prenex_590)) (= v_arrayElimCell_239 v_prenex_591) (bvsle (bvadd v_prenex_588 (_ bv4 32)) .cse34)))) .cse12 .cse20) (or .cse3 .cse0 .cse6 (forall ((v_prenex_394 (_ BitVec 32)) (v_prenex_393 (_ BitVec 32)) (v_prenex_392 (_ BitVec 32)) (v_prenex_391 (_ BitVec 32)) (v_prenex_160 (_ BitVec 32))) (let ((.cse35 (select (store |c_#length| v_prenex_391 v_prenex_393) v_prenex_160))) (or (= v_prenex_160 c_main_~x~0.base) (bvsle (bvadd v_prenex_394 (_ bv4 32)) .cse35) (not (bvsle (_ bv0 32) v_prenex_394)) (bvsle (bvadd v_prenex_392 (_ bv4 32)) .cse35) (= v_prenex_160 v_prenex_391))))) (or .cse0 .cse6 .cse12 (forall ((v_prenex_347 (_ BitVec 32)) (v_prenex_346 (_ BitVec 32)) (v_prenex_345 (_ BitVec 32)) (v_prenex_344 (_ BitVec 32)) (v_prenex_343 (_ BitVec 32)) (v_arrayElimCell_341 (_ BitVec 32))) (let ((.cse38 (store |c_#length| v_prenex_343 v_prenex_346))) (let ((.cse36 (bvadd v_prenex_347 (_ bv4 32))) (.cse37 (select .cse38 v_prenex_344))) (or (= v_arrayElimCell_341 v_prenex_343) (= v_arrayElimCell_341 c_main_~x~0.base) (bvsle .cse36 .cse37) (not (bvsle (_ bv0 32) v_prenex_347)) (bvsle .cse36 (select .cse38 v_arrayElimCell_341)) (bvsle (bvadd v_prenex_345 (_ bv4 32)) .cse37) (= v_prenex_344 v_prenex_343)))))) (or .cse0 (forall ((v_arrayElimCell_521 (_ BitVec 32)) (v_prenex_369 (_ BitVec 32)) (v_prenex_368 (_ BitVec 32)) (v_prenex_367 (_ BitVec 32)) (v_prenex_366 (_ BitVec 32))) (let ((.cse39 (select (store |c_#length| v_prenex_366 v_prenex_368) v_arrayElimCell_521))) (or (bvsle (bvadd v_prenex_369 (_ bv4 32)) .cse39) (not (bvsle (_ bv0 32) v_prenex_369)) (bvsle (bvadd v_prenex_367 (_ bv4 32)) .cse39) (= v_arrayElimCell_521 v_prenex_366) (= v_arrayElimCell_521 c_main_~x~0.base)))) .cse12 .cse20) (or .cse3 .cse0 (forall ((v_prenex_351 (_ BitVec 32)) (v_prenex_38 (_ BitVec 32)) (v_arrayElimCell_230 (_ BitVec 32)) (v_prenex_352 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_38)) (bvsle (bvadd v_prenex_38 (_ bv4 32)) (select (store |c_#length| v_prenex_351 v_prenex_352) v_arrayElimCell_230)) (= v_arrayElimCell_230 v_prenex_351) (= v_arrayElimCell_230 c_main_~x~0.base))) .cse6) (or .cse0 (forall ((v_arrayElimCell_531 (_ BitVec 32)) (v_prenex_774 (_ BitVec 32)) (v_prenex_773 (_ BitVec 32)) (v_prenex_772 (_ BitVec 32)) (v_prenex_771 (_ BitVec 32)) (v_prenex_770 (_ BitVec 32))) (let ((.cse40 (store |c_#length| v_prenex_774 v_prenex_773))) (or (bvsle (bvadd v_prenex_772 (_ bv4 32)) (select .cse40 v_prenex_771)) (bvsle (bvadd v_prenex_770 (_ bv4 32)) (select .cse40 v_arrayElimCell_531)) (= v_arrayElimCell_531 v_prenex_774) (not (bvsle (_ bv0 32) v_prenex_770)) (= v_arrayElimCell_531 c_main_~x~0.base) (= v_prenex_771 v_prenex_774)))) .cse12 .cse20) (or .cse0 (forall ((v_prenex_629 (_ BitVec 32)) (v_prenex_628 (_ BitVec 32)) (v_arrayElimCell_638 (_ BitVec 32)) (v_prenex_46 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_46)) (= v_arrayElimCell_638 c_main_~x~0.base) (= v_arrayElimCell_638 v_prenex_629) (bvsle (bvadd v_prenex_46 (_ bv4 32)) (select (store |c_#length| v_prenex_629 v_prenex_628) v_arrayElimCell_638)))) .cse6) (or .cse3 .cse6 (forall ((v_prenex_471 (_ BitVec 32)) (v_prenex_470 (_ BitVec 32)) (v_prenex_10 (_ BitVec 32)) (v_prenex_469 (_ BitVec 32)) (v_arrayElimCell_254 (_ BitVec 32))) (let ((.cse41 (select (store |c_#length| v_prenex_471 v_prenex_470) v_arrayElimCell_254))) (or (bvsle (bvadd v_prenex_469 (_ bv4 32)) .cse41) (= v_arrayElimCell_254 v_prenex_471) (not (bvsle (_ bv0 32) v_prenex_10)) (bvsle (bvadd v_prenex_10 (_ bv4 32)) .cse41))))) (= (bvadd (select |c_#length| c_main_~x~0.base) (_ bv4294967280 32)) (_ bv0 32)) (or .cse3 (forall ((v_prenex_9 (_ BitVec 32)) (v_arrayElimCell_218 (_ BitVec 32)) (v_prenex_501 (_ BitVec 32)) (v_prenex_500 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_9)) (= v_arrayElimCell_218 c_main_~x~0.base) (bvsle (bvadd v_prenex_9 (_ bv4 32)) (select (store |c_#length| v_prenex_501 v_prenex_500) v_arrayElimCell_218)) (= v_arrayElimCell_218 v_prenex_501))) .cse6) (or .cse3 .cse0 .cse1 (forall ((v_prenex_54 (_ BitVec 32)) (v_arrayElimCell_547 (_ BitVec 32)) (v_prenex_388 (_ BitVec 32)) (v_prenex_387 (_ BitVec 32)) (v_prenex_386 (_ BitVec 32))) (let ((.cse42 (select (store |c_#length| v_prenex_386 v_prenex_388) v_arrayElimCell_547))) (or (= v_arrayElimCell_547 c_main_~x~0.base) (= v_arrayElimCell_547 v_prenex_386) (bvsle (bvadd v_prenex_54 (_ bv4 32)) .cse42) (bvsle (bvadd v_prenex_387 (_ bv4 32)) .cse42) (not (bvsle (_ bv0 32) v_prenex_54)))))) (or .cse0 (forall ((v_arrayElimCell_702 (_ BitVec 32)) (v_prenex_426 (_ BitVec 32)) (v_prenex_425 (_ BitVec 32)) (v_prenex_424 (_ BitVec 32)) (v_prenex_423 (_ BitVec 32))) (let ((.cse43 (select (store |c_#length| v_prenex_425 v_prenex_424) v_arrayElimCell_702))) (or (bvsle (bvadd v_prenex_426 (_ bv4 32)) .cse43) (bvsle (bvadd v_prenex_423 (_ bv4 32)) .cse43) (= v_arrayElimCell_702 v_prenex_425) (not (bvsle (_ bv0 32) v_prenex_426)) (= v_arrayElimCell_702 c_main_~x~0.base)))) .cse11 .cse12) (or .cse0 .cse6 (forall ((v_arrayElimCell_344 (_ BitVec 32)) (v_prenex_328 (_ BitVec 32)) (v_prenex_327 (_ BitVec 32)) (v_prenex_326 (_ BitVec 32)) (v_prenex_325 (_ BitVec 32))) (let ((.cse44 (select (store |c_#length| v_prenex_325 v_prenex_327) v_arrayElimCell_344))) (or (= v_arrayElimCell_344 c_main_~x~0.base) (bvsle (bvadd v_prenex_328 (_ bv4 32)) .cse44) (bvsle (bvadd v_prenex_326 (_ bv4 32)) .cse44) (not (bvsle (_ bv0 32) v_prenex_328)) (= v_arrayElimCell_344 v_prenex_325))))) (or .cse3 .cse0 (forall ((v_prenex_607 (_ BitVec 32)) (v_prenex_606 (_ BitVec 32)) (v_prenex_605 (_ BitVec 32)) (v_arrayElimCell_347 (_ BitVec 32)) (v_prenex_604 (_ BitVec 32))) (let ((.cse45 (select (store |c_#length| v_prenex_607 v_prenex_605) v_arrayElimCell_347))) (or (bvsle (bvadd v_prenex_604 (_ bv4 32)) .cse45) (= v_arrayElimCell_347 v_prenex_607) (= v_arrayElimCell_347 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_606)) (bvsle (bvadd v_prenex_606 (_ bv4 32)) .cse45)))) .cse6) (or (forall ((v_arrayElimCell_387 (_ BitVec 32)) (v_prenex_518 (_ BitVec 32)) (v_prenex_517 (_ BitVec 32)) (v_prenex_516 (_ BitVec 32)) (v_prenex_515 (_ BitVec 32))) (let ((.cse46 (select (store |c_#length| v_prenex_517 v_prenex_516) v_arrayElimCell_387))) (or (bvsle (bvadd v_prenex_518 (_ bv4 32)) .cse46) (not (bvsle (_ bv0 32) v_prenex_518)) (bvsle (bvadd v_prenex_515 (_ bv4 32)) .cse46) (= v_arrayElimCell_387 c_main_~x~0.base) (= v_arrayElimCell_387 v_prenex_517)))) .cse0 .cse6) (or .cse0 (forall ((v_arrayElimCell_574 (_ BitVec 32)) (v_prenex_186 (_ BitVec 32)) (v_prenex_185 (_ BitVec 32)) (v_prenex_184 (_ BitVec 32)) (v_arrayElimCell_117 (_ BitVec 32))) (let ((.cse47 (select (store |c_#length| v_prenex_185 v_prenex_184) v_arrayElimCell_574))) (or (bvsle (bvadd v_arrayElimCell_117 (_ bv4 32)) .cse47) (= v_arrayElimCell_574 v_prenex_185) (not (bvsle (_ bv0 32) v_arrayElimCell_117)) (bvsle (bvadd v_prenex_186 (_ bv4 32)) .cse47)))) .cse12 .cse20) (or .cse6 (forall ((v_arrayElimCell_134 (_ BitVec 32)) (v_arrayElimCell_501 (_ BitVec 32)) (v_prenex_658 (_ BitVec 32)) (v_prenex_657 (_ BitVec 32))) (or (= v_arrayElimCell_501 v_prenex_658) (not (bvsle (_ bv0 32) v_arrayElimCell_134)) (bvsle (bvadd v_arrayElimCell_134 (_ bv4 32)) (select (store |c_#length| v_prenex_658 v_prenex_657) v_arrayElimCell_501)) (= v_arrayElimCell_501 c_main_~x~0.base)))) (or .cse0 .cse6 (forall ((v_arrayElimCell_189 (_ BitVec 32)) (v_prenex_713 (_ BitVec 32)) (v_prenex_712 (_ BitVec 32)) (v_prenex_711 (_ BitVec 32)) (v_prenex_710 (_ BitVec 32))) (let ((.cse48 (select (store |c_#length| v_prenex_713 v_prenex_712) v_arrayElimCell_189))) (or (not (bvsle (_ bv0 32) v_prenex_710)) (= v_arrayElimCell_189 v_prenex_713) (bvsle (bvadd v_prenex_710 (_ bv4 32)) .cse48) (bvsle (bvadd v_prenex_711 (_ bv4 32)) .cse48))))) (or (forall ((v_prenex_269 (_ BitVec 32)) (v_prenex_268 (_ BitVec 32)) (v_prenex_267 (_ BitVec 32)) (v_prenex_266 (_ BitVec 32))) (or (= v_prenex_267 v_prenex_266) (not (bvsle (_ bv0 32) v_prenex_268)) (bvsle (bvadd v_prenex_268 (_ bv4 32)) (select (store |c_#length| v_prenex_266 v_prenex_269) v_prenex_267)))) .cse12) (or .cse6 (forall ((v_prenex_319 (_ BitVec 32)) (v_prenex_318 (_ BitVec 32)) (v_prenex_16 (_ BitVec 32)) (v_prenex_320 (_ BitVec 32)) (v_prenex_143 (_ BitVec 32))) (let ((.cse49 (select (store |c_#length| v_prenex_318 v_prenex_320) v_prenex_143))) (or (= v_prenex_143 v_prenex_318) (bvsle (bvadd v_prenex_16 (_ bv4 32)) .cse49) (bvsle (bvadd v_prenex_319 (_ bv4 32)) .cse49) (= v_prenex_143 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_16)))))) (or .cse3 .cse1 .cse50 .cse51) (or .cse3 .cse0 .cse1 (forall ((v_arrayElimCell_479 (_ BitVec 32)) (v_prenex_378 (_ BitVec 32)) (v_prenex_377 (_ BitVec 32)) (v_prenex_376 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_378 (_ bv4 32)) (select (store |c_#length| v_prenex_376 v_prenex_377) v_arrayElimCell_479)) (= v_arrayElimCell_479 c_main_~x~0.base) (= v_arrayElimCell_479 v_prenex_376) (not (bvsle (_ bv0 32) v_prenex_378))))) (or .cse3 .cse0 .cse6 (forall ((v_arrayElimCell_578 (_ BitVec 32)) (v_prenex_329 (_ BitVec 32)) (v_prenex_35 (_ BitVec 32)) (v_prenex_330 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_35 (_ bv4 32)) (select (store |c_#length| v_prenex_329 v_prenex_330) v_arrayElimCell_578)) (= v_arrayElimCell_578 v_prenex_329) (not (bvsle (_ bv0 32) v_prenex_35)) (= v_arrayElimCell_578 c_main_~x~0.base)))) (or .cse0 .cse1 (forall ((v_arrayElimCell_365 (_ BitVec 32)) (v_prenex_262 (_ BitVec 32)) (v_prenex_42 (_ BitVec 32)) (v_prenex_261 (_ BitVec 32)) (v_prenex_260 (_ BitVec 32))) (let ((.cse52 (select (store |c_#length| v_prenex_260 v_prenex_262) v_arrayElimCell_365))) (or (= v_arrayElimCell_365 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_42)) (bvsle (bvadd v_prenex_42 (_ bv4 32)) .cse52) (bvsle (bvadd v_prenex_261 (_ bv4 32)) .cse52) (= v_arrayElimCell_365 v_prenex_260))))) (or (forall ((v_prenex_294 (_ BitVec 32)) (v_prenex_293 (_ BitVec 32)) (v_prenex_292 (_ BitVec 32)) (v_prenex_291 (_ BitVec 32)) (v_prenex_290 (_ BitVec 32)) (v_prenex_116 (_ BitVec 32))) (let ((.cse57 (store |c_#length| v_prenex_290 v_prenex_293))) (let ((.cse53 (bvadd v_prenex_292 (_ bv4 32))) (.cse56 (select .cse57 v_prenex_291)) (.cse55 (bvadd v_prenex_294 (_ bv4 32))) (.cse54 (select .cse57 v_prenex_116))) (or (not (bvsle (_ bv0 32) v_prenex_294)) (= v_prenex_291 v_prenex_290) (bvsle .cse53 .cse54) (= v_prenex_116 v_prenex_290) (bvsle .cse55 .cse56) (= v_prenex_116 c_main_~x~0.base) (bvsle .cse53 .cse56) (bvsle .cse55 .cse54))))) .cse0 .cse6) (or .cse0 .cse6 (forall ((v_prenex_528 (_ BitVec 32)) (v_prenex_527 (_ BitVec 32)) (v_prenex_526 (_ BitVec 32)) (v_arrayElimCell_284 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_527)) (= v_arrayElimCell_284 c_main_~x~0.base) (= v_arrayElimCell_284 v_prenex_528) (bvsle (bvadd v_prenex_527 (_ bv4 32)) (select (store |c_#length| v_prenex_528 v_prenex_526) v_arrayElimCell_284))))) (or .cse0 .cse6 (forall ((v_arrayElimCell_146 (_ BitVec 32)) (v_arrayElimCell_326 (_ BitVec 32)) (v_prenex_337 (_ BitVec 32)) (v_prenex_336 (_ BitVec 32))) (or (= v_arrayElimCell_326 c_main_~x~0.base) (bvsle (bvadd v_arrayElimCell_146 (_ bv4 32)) (select (store |c_#length| v_prenex_336 v_prenex_337) v_arrayElimCell_326)) (= v_arrayElimCell_326 v_prenex_336) (not (bvsle (_ bv0 32) v_arrayElimCell_146))))) (or (forall ((v_prenex_442 (_ BitVec 32)) (v_arrayElimCell_494 (_ BitVec 32)) (v_prenex_441 (_ BitVec 32)) (v_prenex_440 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_441 (_ bv4 32)) (select (store |c_#length| v_prenex_442 v_prenex_440) v_arrayElimCell_494)) (= v_arrayElimCell_494 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_441)) (= v_arrayElimCell_494 v_prenex_442))) .cse0 .cse6) (= (_ bv4 32) |c_main_write~$Pointer$_#sizeOfWrittenType|) (or .cse0 .cse6 (forall ((v_prenex_51 (_ BitVec 32)) (v_prenex_181 (_ BitVec 32)) (v_prenex_180 (_ BitVec 32)) (v_prenex_179 (_ BitVec 32)) (v_arrayElimCell_570 (_ BitVec 32))) (let ((.cse58 (select (store |c_#length| v_prenex_180 v_prenex_179) v_arrayElimCell_570))) (or (= v_arrayElimCell_570 v_prenex_180) (bvsle (bvadd v_prenex_181 (_ bv4 32)) .cse58) (bvsle (bvadd v_prenex_51 (_ bv4 32)) .cse58) (= v_arrayElimCell_570 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_51)))))) (or .cse3 .cse0 .cse6 (forall ((v_prenex_509 (_ BitVec 32)) (v_arrayElimCell_258 (_ BitVec 32)) (v_prenex_50 (_ BitVec 32)) (v_prenex_511 (_ BitVec 32)) (v_prenex_510 (_ BitVec 32))) (let ((.cse59 (select (store |c_#length| v_prenex_511 v_prenex_510) v_arrayElimCell_258))) (or (bvsle (bvadd v_prenex_50 (_ bv4 32)) .cse59) (= v_arrayElimCell_258 v_prenex_511) (= v_arrayElimCell_258 c_main_~x~0.base) (bvsle (bvadd v_prenex_509 (_ bv4 32)) .cse59) (not (bvsle (_ bv0 32) v_prenex_50)))))) (or .cse0 (forall ((v_prenex_670 (_ BitVec 32)) (v_arrayElimCell_358 (_ BitVec 32)) (v_prenex_669 (_ BitVec 32)) (v_prenex_673 (_ BitVec 32)) (v_prenex_672 (_ BitVec 32)) (v_prenex_671 (_ BitVec 32))) (let ((.cse62 (store |c_#length| v_prenex_673 v_prenex_671))) (let ((.cse60 (bvadd v_prenex_672 (_ bv4 32))) (.cse61 (select .cse62 v_prenex_669))) (or (= v_prenex_669 v_prenex_673) (bvsle .cse60 .cse61) (= v_arrayElimCell_358 c_main_~x~0.base) (bvsle .cse60 (select .cse62 v_arrayElimCell_358)) (bvsle (bvadd v_prenex_670 (_ bv4 32)) .cse61) (= v_arrayElimCell_358 v_prenex_673) (not (bvsle (_ bv0 32) v_prenex_672)))))) .cse12 .cse20) (or .cse3 (forall ((v_arrayElimCell_355 (_ BitVec 32)) (v_prenex_313 (_ BitVec 32)) (v_prenex_312 (_ BitVec 32)) (v_prenex_311 (_ BitVec 32)) (v_prenex_310 (_ BitVec 32))) (let ((.cse63 (select (store |c_#length| v_prenex_310 v_prenex_312) v_arrayElimCell_355))) (or (= v_arrayElimCell_355 v_prenex_310) (not (bvsle (_ bv0 32) v_prenex_313)) (bvsle (bvadd v_prenex_313 (_ bv4 32)) .cse63) (= v_arrayElimCell_355 c_main_~x~0.base) (bvsle (bvadd v_prenex_311 (_ bv4 32)) .cse63)))) .cse0 .cse6) (or .cse0 .cse12 (forall ((v_prenex_749 (_ BitVec 32)) (v_prenex_748 (_ BitVec 32)) (v_arrayElimCell_656 (_ BitVec 32)) (v_prenex_750 (_ BitVec 32))) (or (= v_arrayElimCell_656 v_prenex_750) (bvsle (bvadd v_prenex_748 (_ bv4 32)) (select (store |c_#length| v_prenex_750 v_prenex_749) v_arrayElimCell_656)) (not (bvsle (_ bv0 32) v_prenex_748))))) (or .cse3 .cse1 .cse50 .cse64 (forall ((v_prenex_178 (_ BitVec 32)) (v_prenex_177 (_ BitVec 32))) (or (bvsle (bvadd |c_main_write~$Pointer$_#value.offset| (_ bv4 32)) (select (store |c_#length| v_prenex_178 v_prenex_177) |c_main_write~$Pointer$_#value.base|)) (= |c_main_write~$Pointer$_#value.base| v_prenex_178)))) (or .cse3 (forall ((v_arrayElimCell_516 (_ BitVec 32)) (v_prenex_289 (_ BitVec 32)) (v_prenex_288 (_ BitVec 32)) (v_prenex_287 (_ BitVec 32)) (v_prenex_13 (_ BitVec 32))) (let ((.cse65 (select (store |c_#length| v_prenex_287 v_prenex_289) v_arrayElimCell_516))) (or (bvsle (bvadd v_prenex_13 (_ bv4 32)) .cse65) (= v_arrayElimCell_516 c_main_~x~0.base) (bvsle (bvadd v_prenex_288 (_ bv4 32)) .cse65) (= v_arrayElimCell_516 v_prenex_287) (not (bvsle (_ bv0 32) v_prenex_13))))) .cse6) (or (forall ((v_prenex_409 (_ BitVec 32)) (v_prenex_408 (_ BitVec 32)) (v_arrayElimCell_381 (_ BitVec 32)) (v_prenex_410 (_ BitVec 32)) (v_prenex_22 (_ BitVec 32))) (let ((.cse66 (select (store |c_#length| v_prenex_408 v_prenex_410) v_arrayElimCell_381))) (or (= v_arrayElimCell_381 c_main_~x~0.base) (bvsle (bvadd v_prenex_409 (_ bv4 32)) .cse66) (= v_arrayElimCell_381 v_prenex_408) (bvsle (bvadd v_prenex_22 (_ bv4 32)) .cse66) (not (bvsle (_ bv0 32) v_prenex_22))))) .cse6) (or (forall ((v_prenex_549 (_ BitVec 32)) (v_prenex_548 (_ BitVec 32)) (v_prenex_547 (_ BitVec 32)) (v_arrayElimCell_351 (_ BitVec 32)) (v_prenex_550 (_ BitVec 32))) (let ((.cse67 (select (store |c_#length| v_prenex_550 v_prenex_548) v_arrayElimCell_351))) (or (not (bvsle (_ bv0 32) v_prenex_549)) (bvsle (bvadd v_prenex_549 (_ bv4 32)) .cse67) (bvsle (bvadd v_prenex_547 (_ bv4 32)) .cse67) (= v_arrayElimCell_351 v_prenex_550) (= v_arrayElimCell_351 c_main_~x~0.base)))) .cse0) (or .cse0 (forall ((v_prenex_659 (_ BitVec 32)) (v_arrayElimCell_507 (_ BitVec 32)) (v_prenex_661 (_ BitVec 32)) (v_prenex_660 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_660 (_ bv4 32)) (select (store |c_#length| v_prenex_661 v_prenex_659) v_arrayElimCell_507)) (= v_arrayElimCell_507 v_prenex_661) (not (bvsle (_ bv0 32) v_prenex_660)) (= v_arrayElimCell_507 c_main_~x~0.base))) .cse6) (or .cse0 .cse6 (forall ((v_prenex_350 (_ BitVec 32)) (v_prenex_349 (_ BitVec 32)) (v_prenex_348 (_ BitVec 32)) (v_arrayElimCell_417 (_ BitVec 32))) (or (= v_arrayElimCell_417 v_prenex_348) (= v_arrayElimCell_417 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_350)) (bvsle (bvadd v_prenex_350 (_ bv4 32)) (select (store |c_#length| v_prenex_348 v_prenex_349) v_arrayElimCell_417))))) (or .cse0 .cse6 (forall ((v_arrayElimCell_303 (_ BitVec 32)) (v_prenex_48 (_ BitVec 32)) (v_prenex_354 (_ BitVec 32)) (v_prenex_353 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_48)) (= v_arrayElimCell_303 v_prenex_353) (bvsle (bvadd v_prenex_48 (_ bv4 32)) (select (store |c_#length| v_prenex_353 v_prenex_354) v_arrayElimCell_303))))) (or .cse0 .cse6 (forall ((v_prenex_582 (_ BitVec 32)) (v_arrayElimCell_307 (_ BitVec 32)) (v_prenex_584 (_ BitVec 32)) (v_prenex_583 (_ BitVec 32))) (or (= v_arrayElimCell_307 v_prenex_584) (bvsle (bvadd v_prenex_583 (_ bv4 32)) (select (store |c_#length| v_prenex_584 v_prenex_582) v_arrayElimCell_307)) (not (bvsle (_ bv0 32) v_prenex_583))))) (or .cse0 (forall ((v_prenex_458 (_ BitVec 32)) (v_prenex_457 (_ BitVec 32)) (v_prenex_456 (_ BitVec 32)) (v_prenex_455 (_ BitVec 32)) (v_arrayElimCell_243 (_ BitVec 32))) (let ((.cse68 (select (store |c_#length| v_prenex_458 v_prenex_456) v_arrayElimCell_243))) (or (bvsle (bvadd v_prenex_455 (_ bv4 32)) .cse68) (bvsle (bvadd v_prenex_457 (_ bv4 32)) .cse68) (= v_arrayElimCell_243 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_457)) (= v_arrayElimCell_243 v_prenex_458)))) .cse12 .cse20) (or .cse3 .cse6 (forall ((v_prenex_142 (_ BitVec 32)) (v_prenex_643 (_ BitVec 32)) (v_prenex_642 (_ BitVec 32)) (v_prenex_641 (_ BitVec 32)) (v_prenex_640 (_ BitVec 32))) (let ((.cse69 (select (store |c_#length| v_prenex_643 v_prenex_641) v_prenex_142))) (or (= v_prenex_142 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_642)) (= v_prenex_142 v_prenex_643) (bvsle (bvadd v_prenex_640 (_ bv4 32)) .cse69) (bvsle (bvadd v_prenex_642 (_ bv4 32)) .cse69))))) (or .cse6 .cse12 (forall ((v_prenex_747 (_ BitVec 32)) (v_prenex_746 (_ BitVec 32)) (v_prenex_745 (_ BitVec 32)) (v_prenex_744 (_ BitVec 32)) (v_prenex_743 (_ BitVec 32)) (v_arrayElimCell_265 (_ BitVec 32))) (let ((.cse70 (store |c_#length| v_prenex_747 v_prenex_746))) (or (bvsle (bvadd v_prenex_745 (_ bv4 32)) (select .cse70 v_prenex_744)) (= v_arrayElimCell_265 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_743)) (bvsle (bvadd v_prenex_743 (_ bv4 32)) (select .cse70 v_arrayElimCell_265)) (= v_prenex_744 v_prenex_747) (= v_arrayElimCell_265 v_prenex_747))))) (or .cse0 (forall ((v_prenex_340 (_ BitVec 32)) (v_arrayElimCell_246 (_ BitVec 32)) (v_prenex_339 (_ BitVec 32)) (v_prenex_338 (_ BitVec 32)) (v_prenex_342 (_ BitVec 32)) (v_prenex_341 (_ BitVec 32))) (let ((.cse73 (store |c_#length| v_prenex_338 v_prenex_341))) (let ((.cse71 (bvadd v_prenex_340 (_ bv4 32))) (.cse72 (select .cse73 v_arrayElimCell_246))) (or (not (bvsle (_ bv0 32) v_prenex_342)) (= v_prenex_339 v_prenex_338) (bvsle .cse71 .cse72) (= v_arrayElimCell_246 c_main_~x~0.base) (bvsle .cse71 (select .cse73 v_prenex_339)) (= v_arrayElimCell_246 v_prenex_338) (bvsle (bvadd v_prenex_342 (_ bv4 32)) .cse72))))) .cse12 .cse20) (or .cse0 .cse6 (forall ((v_prenex_75 (_ BitVec 32)) (v_prenex_223 (_ BitVec 32)) (v_prenex_222 (_ BitVec 32)) (v_arrayElimCell_450 (_ BitVec 32))) (or (= v_arrayElimCell_450 v_prenex_222) (= v_arrayElimCell_450 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_75)) (bvsle (bvadd v_prenex_75 (_ bv4 32)) (select (store |c_#length| v_prenex_222 v_prenex_223) v_arrayElimCell_450))))) (or .cse0 (forall ((v_prenex_384 (_ BitVec 32)) (v_prenex_383 (_ BitVec 32)) (v_prenex_382 (_ BitVec 32)) (v_prenex_381 (_ BitVec 32)) (v_arrayElimCell_359 (_ BitVec 32)) (v_prenex_385 (_ BitVec 32))) (let ((.cse76 (store |c_#length| v_prenex_381 v_prenex_384))) (let ((.cse74 (select .cse76 v_prenex_382)) (.cse75 (bvadd v_prenex_385 (_ bv4 32)))) (or (= v_prenex_382 v_prenex_381) (= v_arrayElimCell_359 v_prenex_381) (bvsle (bvadd v_prenex_383 (_ bv4 32)) .cse74) (not (bvsle (_ bv0 32) v_prenex_385)) (bvsle .cse75 .cse74) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_359) (bvsle .cse75 (select .cse76 v_arrayElimCell_359)))))) .cse12) (or (forall ((v_prenex_285 (_ BitVec 32)) (v_prenex_15 (_ BitVec 32)) (v_arrayElimCell_296 (_ BitVec 32)) (v_prenex_286 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_15 (_ bv4 32)) (select (store |c_#length| v_prenex_285 v_prenex_286) v_arrayElimCell_296)) (= v_arrayElimCell_296 v_prenex_285) (not (bvsle (_ bv0 32) v_prenex_15)))) .cse6 .cse12) (or .cse0 .cse6 (forall ((v_arrayElimCell_644 (_ BitVec 32)) (v_prenex_324 (_ BitVec 32)) (v_prenex_323 (_ BitVec 32)) (v_prenex_322 (_ BitVec 32)) (v_prenex_321 (_ BitVec 32))) (let ((.cse77 (select (store |c_#length| v_prenex_321 v_prenex_323) v_arrayElimCell_644))) (or (= v_arrayElimCell_644 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_324)) (= v_arrayElimCell_644 v_prenex_321) (bvsle (bvadd v_prenex_322 (_ bv4 32)) .cse77) (bvsle (bvadd v_prenex_324 (_ bv4 32)) .cse77))))) (or .cse3 .cse6 (forall ((v_arrayElimCell_442 (_ BitVec 32)) (v_prenex_556 (_ BitVec 32)) (v_prenex_555 (_ BitVec 32)) (v_prenex_11 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_11 (_ bv4 32)) (select (store |c_#length| v_prenex_556 v_prenex_555) v_arrayElimCell_442)) (not (bvsle (_ bv0 32) v_prenex_11)) (= v_arrayElimCell_442 c_main_~x~0.base) (= v_arrayElimCell_442 v_prenex_556)))) (or .cse6 .cse12 (forall ((v_prenex_708 (_ BitVec 32)) (v_prenex_163 (_ BitVec 32)) (v_prenex_707 (_ BitVec 32)) (v_prenex_706 (_ BitVec 32)) (v_prenex_705 (_ BitVec 32)) (v_prenex_709 (_ BitVec 32))) (let ((.cse80 (store |c_#length| v_prenex_709 v_prenex_708))) (let ((.cse79 (bvadd v_prenex_707 (_ bv4 32))) (.cse78 (select .cse80 v_prenex_163))) (or (= v_prenex_163 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_705)) (bvsle (bvadd v_prenex_705 (_ bv4 32)) .cse78) (= v_prenex_163 v_prenex_709) (= v_prenex_706 v_prenex_709) (bvsle .cse79 (select .cse80 v_prenex_706)) (bvsle .cse79 .cse78)))))) (or .cse3 .cse0 .cse1 (forall ((v_prenex_300 (_ BitVec 32)) (v_arrayElimCell_461 (_ BitVec 32)) (v_prenex_34 (_ BitVec 32)) (v_prenex_299 (_ BitVec 32)) (v_prenex_298 (_ BitVec 32))) (let ((.cse81 (select (store |c_#length| v_prenex_298 v_prenex_300) v_arrayElimCell_461))) (or (= v_arrayElimCell_461 v_prenex_298) (not (bvsle (_ bv0 32) v_prenex_34)) (bvsle (bvadd v_prenex_34 (_ bv4 32)) .cse81) (bvsle (bvadd v_prenex_299 (_ bv4 32)) .cse81))))) (or .cse3 .cse0 (forall ((v_arrayElimCell_563 (_ BitVec 32)) (v_prenex_209 (_ BitVec 32)) (v_prenex_208 (_ BitVec 32)) (v_prenex_207 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_208)) (= v_arrayElimCell_563 c_main_~x~0.base) (= v_arrayElimCell_563 v_prenex_207) (bvsle (bvadd v_prenex_208 (_ bv4 32)) (select (store |c_#length| v_prenex_207 v_prenex_209) v_arrayElimCell_563))))) (or .cse0 .cse1 (forall ((v_arrayElimCell_147 (_ BitVec 32)) (v_arrayElimCell_214 (_ BitVec 32)) (v_prenex_201 (_ BitVec 32)) (v_prenex_200 (_ BitVec 32))) (or (= v_arrayElimCell_214 v_prenex_200) (bvsle (bvadd v_arrayElimCell_147 (_ bv4 32)) (select (store |c_#length| v_prenex_200 v_prenex_201) v_arrayElimCell_214)) (not (bvsle (_ bv0 32) v_arrayElimCell_147))))) .cse51 (or .cse0 .cse12 .cse20 (forall ((v_prenex_395 (_ BitVec 32)) (v_arrayElimCell_657 (_ BitVec 32)) (v_prenex_45 (_ BitVec 32)) (v_prenex_396 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_45)) (= v_arrayElimCell_657 v_prenex_395) (bvsle (bvadd v_prenex_45 (_ bv4 32)) (select (store |c_#length| v_prenex_395 v_prenex_396) v_arrayElimCell_657))))) (or .cse0 (forall ((v_arrayElimCell_101 (_ BitVec 32)) (v_prenex_215 (_ BitVec 32)) (v_prenex_214 (_ BitVec 32)) (v_prenex_213 (_ BitVec 32)) (v_arrayElimCell_386 (_ BitVec 32))) (let ((.cse82 (select (store |c_#length| v_prenex_213 v_prenex_215) v_arrayElimCell_386))) (or (= v_arrayElimCell_386 v_prenex_213) (bvsle (bvadd v_prenex_214 (_ bv4 32)) .cse82) (bvsle (bvadd v_arrayElimCell_101 (_ bv4 32)) .cse82) (not (bvsle (_ bv0 32) v_arrayElimCell_101)) (= v_arrayElimCell_386 c_main_~x~0.base))))) (or .cse0 (forall ((v_prenex_117 (_ BitVec 32)) (v_prenex_226 (_ BitVec 32)) (v_prenex_49 (_ BitVec 32)) (v_prenex_225 (_ BitVec 32)) (v_prenex_224 (_ BitVec 32))) (let ((.cse83 (select (store |c_#length| v_prenex_224 v_prenex_226) v_prenex_117))) (or (bvsle (bvadd v_prenex_49 (_ bv4 32)) .cse83) (= v_prenex_117 v_prenex_224) (= v_prenex_117 c_main_~x~0.base) (bvsle (bvadd v_prenex_225 (_ bv4 32)) .cse83) (not (bvsle (_ bv0 32) v_prenex_49))))) .cse6) (or .cse3 .cse0 .cse6 (forall ((v_prenex_173 (_ BitVec 32)) (v_prenex_172 (_ BitVec 32)) (v_arrayElimCell_566 (_ BitVec 32)) (v_prenex_44 (_ BitVec 32))) (or (= v_arrayElimCell_566 c_main_~x~0.base) (= v_arrayElimCell_566 v_prenex_172) (bvsle (bvadd v_prenex_44 (_ bv4 32)) (select (store |c_#length| v_prenex_172 v_prenex_173) v_arrayElimCell_566)) (not (bvsle (_ bv0 32) v_prenex_44))))) (or .cse0 (forall ((v_prenex_494 (_ BitVec 32)) (v_prenex_493 (_ BitVec 32)) (v_prenex_492 (_ BitVec 32)) (v_prenex_491 (_ BitVec 32)) (v_arrayElimCell_391 (_ BitVec 32)) (v_prenex_495 (_ BitVec 32))) (let ((.cse88 (store |c_#length| v_prenex_494 v_prenex_493))) (let ((.cse84 (bvadd v_prenex_492 (_ bv4 32))) (.cse86 (select .cse88 v_prenex_491)) (.cse87 (bvadd v_prenex_495 (_ bv4 32))) (.cse85 (select .cse88 v_arrayElimCell_391))) (or (bvsle .cse84 .cse85) (not (bvsle (_ bv0 32) v_prenex_495)) (= v_arrayElimCell_391 c_main_~x~0.base) (bvsle .cse84 .cse86) (= v_arrayElimCell_391 v_prenex_494) (bvsle .cse87 .cse86) (= v_prenex_491 v_prenex_494) (bvsle .cse87 .cse85)))))) (= (bvadd (select |c_#valid| |c_main_write~$Pointer$_#ptr.base|) (_ bv1 1)) (_ bv0 1)) (or .cse0 (forall ((v_prenex_175 (_ BitVec 32)) (v_prenex_174 (_ BitVec 32)) (v_arrayElimCell_632 (_ BitVec 32)) (v_arrayElimCell_122 (_ BitVec 32)) (v_prenex_176 (_ BitVec 32))) (let ((.cse89 (select (store |c_#length| v_prenex_175 v_prenex_174) v_arrayElimCell_632))) (or (= v_arrayElimCell_632 v_prenex_175) (bvsle (bvadd v_arrayElimCell_122 (_ bv4 32)) .cse89) (not (bvsle (_ bv0 32) v_arrayElimCell_122)) (bvsle (bvadd v_prenex_176 (_ bv4 32)) .cse89)))) .cse6) (or .cse0 (forall ((v_prenex_241 (_ BitVec 32)) (v_arrayElimCell_315 (_ BitVec 32)) (v_prenex_56 (_ BitVec 32)) (v_prenex_243 (_ BitVec 32)) (v_prenex_242 (_ BitVec 32))) (let ((.cse90 (select (store |c_#length| v_prenex_241 v_prenex_243) v_arrayElimCell_315))) (or (= v_arrayElimCell_315 c_main_~x~0.base) (= v_arrayElimCell_315 v_prenex_241) (not (bvsle (_ bv0 32) v_prenex_56)) (bvsle (bvadd v_prenex_56 (_ bv4 32)) .cse90) (bvsle (bvadd v_prenex_242 (_ bv4 32)) .cse90)))) .cse12 .cse20) (or .cse3 .cse0 .cse6 (forall ((v_arrayElimCell_541 (_ BitVec 32)) (v_prenex_450 (_ BitVec 32)) (v_prenex_449 (_ BitVec 32)) (v_prenex_448 (_ BitVec 32)) (v_prenex_451 (_ BitVec 32))) (let ((.cse91 (select (store |c_#length| v_prenex_451 v_prenex_449) v_arrayElimCell_541))) (or (not (bvsle (_ bv0 32) v_prenex_450)) (= v_arrayElimCell_541 c_main_~x~0.base) (bvsle (bvadd v_prenex_450 (_ bv4 32)) .cse91) (bvsle (bvadd v_prenex_448 (_ bv4 32)) .cse91) (= v_arrayElimCell_541 v_prenex_451))))) (= |c_main_write~$Pointer$_#value.offset| (_ bv0 32)) (or .cse0 (forall ((v_prenex_429 (_ BitVec 32)) (v_prenex_428 (_ BitVec 32)) (v_arrayElimCell_536 (_ BitVec 32)) (v_prenex_427 (_ BitVec 32)) (v_prenex_431 (_ BitVec 32)) (v_prenex_430 (_ BitVec 32))) (let ((.cse92 (store |c_#length| v_prenex_431 v_prenex_429))) (or (= v_prenex_427 v_prenex_431) (bvsle (bvadd v_prenex_430 (_ bv4 32)) (select .cse92 v_arrayElimCell_536)) (bvsle (bvadd v_prenex_428 (_ bv4 32)) (select .cse92 v_prenex_427)) (not (bvsle (_ bv0 32) v_prenex_430)) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_536) (= v_arrayElimCell_536 v_prenex_431)))) .cse11 .cse12) (or .cse0 (forall ((v_prenex_742 (_ BitVec 32)) (v_prenex_741 (_ BitVec 32)) (v_prenex_740 (_ BitVec 32)) (v_arrayElimCell_197 (_ BitVec 32))) (or (= v_arrayElimCell_197 c_main_~x~0.base) (bvsle (bvadd v_prenex_740 (_ bv4 32)) (select (store |c_#length| v_prenex_742 v_prenex_741) v_arrayElimCell_197)) (= v_arrayElimCell_197 v_prenex_742) (not (bvsle (_ bv0 32) v_prenex_740)))) .cse12 .cse20) (or .cse6 (forall ((v_prenex_739 (_ BitVec 32)) (v_prenex_738 (_ BitVec 32)) (v_prenex_737 (_ BitVec 32)) (v_prenex_736 (_ BitVec 32)) (v_prenex_735 (_ BitVec 32)) (v_arrayElimCell_604 (_ BitVec 32))) (let ((.cse97 (store |c_#length| v_prenex_739 v_prenex_738))) (let ((.cse95 (bvadd v_prenex_737 (_ bv4 32))) (.cse94 (select .cse97 v_arrayElimCell_604)) (.cse93 (bvadd v_prenex_735 (_ bv4 32))) (.cse96 (select .cse97 v_prenex_736))) (or (= v_arrayElimCell_604 c_main_~x~0.base) (bvsle .cse93 .cse94) (= v_prenex_736 v_prenex_739) (= v_arrayElimCell_604 v_prenex_739) (bvsle .cse95 .cse96) (bvsle .cse95 .cse94) (bvsle .cse93 .cse96) (not (bvsle (_ bv0 32) v_prenex_735))))))) (or .cse0 (forall ((v_arrayElimCell_534 (_ BitVec 32)) (v_prenex_237 (_ BitVec 32)) (v_prenex_236 (_ BitVec 32)) (v_prenex_235 (_ BitVec 32)) (v_prenex_234 (_ BitVec 32))) (let ((.cse98 (select (store |c_#length| v_prenex_234 v_prenex_237) v_arrayElimCell_534))) (or (bvsle (bvadd v_prenex_235 (_ bv4 32)) .cse98) (not (bvsle (_ bv0 32) v_prenex_235)) (= v_arrayElimCell_534 c_main_~x~0.base) (= v_arrayElimCell_534 v_prenex_234) (bvsle (bvadd v_prenex_236 (_ bv4 32)) .cse98)))) .cse11 .cse12) (or .cse0 .cse6 (forall ((v_arrayElimCell_377 (_ BitVec 32)) (v_prenex_74 (_ BitVec 32)) (v_prenex_221 (_ BitVec 32)) (v_prenex_220 (_ BitVec 32))) (or (= v_arrayElimCell_377 v_prenex_220) (not (bvsle (_ bv0 32) v_prenex_74)) (bvsle (bvadd v_prenex_74 (_ bv4 32)) (select (store |c_#length| v_prenex_220 v_prenex_221) v_arrayElimCell_377))))) (or .cse0 (forall ((v_prenex_52 (_ BitVec 32)) (v_arrayElimCell_679 (_ BitVec 32)) (v_prenex_206 (_ BitVec 32)) (v_prenex_205 (_ BitVec 32))) (or (= v_arrayElimCell_679 v_prenex_205) (bvsle (bvadd v_prenex_52 (_ bv4 32)) (select (store |c_#length| v_prenex_205 v_prenex_206) v_arrayElimCell_679)) (not (bvsle (_ bv0 32) v_prenex_52)))) .cse12 .cse20) (or .cse0 .cse6 (forall ((v_prenex_195 (_ BitVec 32)) (v_prenex_194 (_ BitVec 32)) (v_arrayElimCell_151 (_ BitVec 32)) (v_arrayElimCell_593 (_ BitVec 32))) (or (= v_arrayElimCell_593 c_main_~x~0.base) (bvsle (bvadd v_arrayElimCell_151 (_ bv4 32)) (select (store |c_#length| v_prenex_194 v_prenex_195) v_arrayElimCell_593)) (not (bvsle (_ bv0 32) v_arrayElimCell_151)) (= v_arrayElimCell_593 v_prenex_194)))) (or (forall ((v_arrayElimCell_235 (_ BitVec 32)) (v_prenex_415 (_ BitVec 32)) (v_prenex_414 (_ BitVec 32)) (v_prenex_413 (_ BitVec 32)) (v_prenex_412 (_ BitVec 32)) (v_prenex_411 (_ BitVec 32))) (let ((.cse101 (store |c_#length| v_prenex_415 v_prenex_413))) (let ((.cse100 (select .cse101 v_arrayElimCell_235)) (.cse99 (bvadd v_prenex_412 (_ bv4 32)))) (or (= v_prenex_411 v_prenex_415) (= v_arrayElimCell_235 v_prenex_415) (not (bvsle (_ bv0 32) v_prenex_414)) (bvsle .cse99 .cse100) (= v_arrayElimCell_235 c_main_~x~0.base) (bvsle (bvadd v_prenex_414 (_ bv4 32)) .cse100) (bvsle .cse99 (select .cse101 v_prenex_411)))))) .cse0 .cse12) (or .cse0 (forall ((v_prenex_419 (_ BitVec 32)) (v_prenex_418 (_ BitVec 32)) (v_prenex_417 (_ BitVec 32)) (v_prenex_416 (_ BitVec 32)) (v_arrayElimCell_616 (_ BitVec 32))) (let ((.cse102 (select (store |c_#length| v_prenex_419 v_prenex_417) v_arrayElimCell_616))) (or (= v_arrayElimCell_616 v_prenex_419) (not (bvsle (_ bv0 32) v_prenex_418)) (bvsle (bvadd v_prenex_416 (_ bv4 32)) .cse102) (bvsle (bvadd v_prenex_418 (_ bv4 32)) .cse102)))) .cse12 .cse20) (or .cse0 .cse11 .cse12 (forall ((v_prenex_240 (_ BitVec 32)) (v_prenex_239 (_ BitVec 32)) (v_prenex_238 (_ BitVec 32)) (v_arrayElimCell_250 (_ BitVec 32)) (v_prenex_55 (_ BitVec 32))) (let ((.cse103 (select (store |c_#length| v_prenex_238 v_prenex_240) v_arrayElimCell_250))) (or (not (bvsle (_ bv0 32) v_prenex_55)) (= v_arrayElimCell_250 c_main_~x~0.base) (bvsle (bvadd v_prenex_55 (_ bv4 32)) .cse103) (bvsle (bvadd v_prenex_239 (_ bv4 32)) .cse103) (= v_arrayElimCell_250 v_prenex_238))))) (or .cse3 .cse0 .cse6 (forall ((v_prenex_250 (_ BitVec 32)) (v_prenex_43 (_ BitVec 32)) (v_prenex_249 (_ BitVec 32)) (v_arrayElimCell_482 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_43)) (bvsle (bvadd v_prenex_43 (_ bv4 32)) (select (store |c_#length| v_prenex_249 v_prenex_250) v_arrayElimCell_482)) (= v_arrayElimCell_482 c_main_~x~0.base) (= v_arrayElimCell_482 v_prenex_249)))) (or .cse0 (forall ((v_arrayElimCell_506 (_ BitVec 32)) (v_prenex_375 (_ BitVec 32)) (v_prenex_374 (_ BitVec 32)) (v_prenex_69 (_ BitVec 32))) (or (= v_arrayElimCell_506 v_prenex_374) (bvsle (bvadd v_prenex_69 (_ bv4 32)) (select (store |c_#length| v_prenex_374 v_prenex_375) v_arrayElimCell_506)) (= v_arrayElimCell_506 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_69))))) (or .cse0 (forall ((v_prenex_734 (_ BitVec 32)) (v_prenex_733 (_ BitVec 32)) (v_prenex_732 (_ BitVec 32)) (v_prenex_731 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_732)) (= v_prenex_731 v_prenex_734) (bvsle (bvadd v_prenex_732 (_ bv4 32)) (select (store |c_#length| v_prenex_734 v_prenex_733) v_prenex_731))))) .cse6 (or .cse0 .cse12 (forall ((v_prenex_193 (_ BitVec 32)) (v_arrayElimCell_700 (_ BitVec 32)) (v_prenex_192 (_ BitVec 32)) (v_prenex_191 (_ BitVec 32)) (v_prenex_190 (_ BitVec 32))) (let ((.cse104 (select (store |c_#length| v_prenex_191 v_prenex_193) v_arrayElimCell_700))) (or (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_700) (= v_arrayElimCell_700 v_prenex_191) (not (bvsle (_ bv0 32) v_prenex_190)) (bvsle (bvadd v_prenex_192 (_ bv4 32)) .cse104) (bvsle (bvadd v_prenex_190 (_ bv4 32)) .cse104))))) (or .cse0 (forall ((v_arrayElimCell_418 (_ BitVec 32)) (v_prenex_233 (_ BitVec 32)) (v_prenex_232 (_ BitVec 32)) (v_prenex_231 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_232)) (= v_arrayElimCell_418 c_main_~x~0.base) (bvsle (bvadd v_prenex_232 (_ bv4 32)) (select (store |c_#length| v_prenex_231 v_prenex_233) v_arrayElimCell_418)) (= v_arrayElimCell_418 v_prenex_231)))) (or (forall ((v_arrayElimCell_304 (_ BitVec 32)) (v_prenex_504 (_ BitVec 32)) (v_prenex_503 (_ BitVec 32)) (v_prenex_502 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_503)) (bvsle (bvadd v_prenex_503 (_ bv4 32)) (select (store |c_#length| v_prenex_504 v_prenex_502) v_arrayElimCell_304)) (= v_arrayElimCell_304 v_prenex_504))) .cse0) (or .cse0 (forall ((v_prenex_436 (_ BitVec 32)) (v_arrayElimCell_318 (_ BitVec 32)) (v_prenex_435 (_ BitVec 32)) (v_prenex_434 (_ BitVec 32)) (v_prenex_433 (_ BitVec 32)) (v_prenex_432 (_ BitVec 32))) (let ((.cse105 (store |c_#length| v_prenex_436 v_prenex_434))) (or (= v_arrayElimCell_318 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_435)) (bvsle (bvadd v_prenex_433 (_ bv4 32)) (select .cse105 v_prenex_432)) (= v_arrayElimCell_318 v_prenex_436) (bvsle (bvadd v_prenex_435 (_ bv4 32)) (select .cse105 v_arrayElimCell_318)) (= v_prenex_432 v_prenex_436)))) .cse12 .cse20) (or (forall ((v_prenex_472 (_ BitVec 32)) (v_arrayElimCell_600 (_ BitVec 32)) (v_prenex_60 (_ BitVec 32)) (v_prenex_474 (_ BitVec 32)) (v_prenex_473 (_ BitVec 32))) (let ((.cse106 (select (store |c_#length| v_prenex_474 v_prenex_473) v_arrayElimCell_600))) (or (not (bvsle (_ bv0 32) v_prenex_60)) (bvsle (bvadd v_prenex_60 (_ bv4 32)) .cse106) (= v_arrayElimCell_600 v_prenex_474) (bvsle (bvadd v_prenex_472 (_ bv4 32)) .cse106) (= v_arrayElimCell_600 c_main_~x~0.base)))) .cse6) (or .cse0 .cse12 (forall ((v_arrayElimCell_236 (_ BitVec 32)) (v_prenex_525 (_ BitVec 32)) (v_prenex_524 (_ BitVec 32)) (v_prenex_523 (_ BitVec 32)) (v_prenex_522 (_ BitVec 32)) (v_prenex_521 (_ BitVec 32))) (let ((.cse109 (store |c_#length| v_prenex_525 v_prenex_523))) (let ((.cse108 (bvadd v_prenex_522 (_ bv4 32))) (.cse107 (select .cse109 v_arrayElimCell_236))) (or (= v_prenex_521 v_prenex_525) (bvsle (bvadd v_prenex_524 (_ bv4 32)) .cse107) (bvsle .cse108 (select .cse109 v_prenex_521)) (not (bvsle (_ bv0 32) v_prenex_524)) (= v_arrayElimCell_236 v_prenex_525) (= v_arrayElimCell_236 c_main_~x~0.base) (bvsle .cse108 .cse107))))) .cse20) (or .cse3 .cse0 .cse6 (forall ((v_arrayElimCell_475 (_ BitVec 32)) (v_arrayElimCell_123 (_ BitVec 32)) (v_prenex_753 (_ BitVec 32)) (v_prenex_752 (_ BitVec 32)) (v_prenex_751 (_ BitVec 32))) (let ((.cse110 (select (store |c_#length| v_prenex_753 v_prenex_752) v_arrayElimCell_475))) (or (bvsle (bvadd v_arrayElimCell_123 (_ bv4 32)) .cse110) (not (bvsle (_ bv0 32) v_arrayElimCell_123)) (= v_arrayElimCell_475 v_prenex_753) (bvsle (bvadd v_prenex_751 (_ bv4 32)) .cse110))))) (or .cse0 (forall ((v_prenex_560 (_ BitVec 32)) (v_prenex_559 (_ BitVec 32)) (v_prenex_558 (_ BitVec 32)) (v_prenex_557 (_ BitVec 32)) (v_prenex_102 (_ BitVec 32)) (v_prenex_561 (_ BitVec 32))) (let ((.cse113 (store |c_#length| v_prenex_561 v_prenex_559))) (let ((.cse112 (bvadd v_prenex_558 (_ bv4 32))) (.cse111 (select .cse113 v_prenex_102))) (or (bvsle (bvadd v_prenex_560 (_ bv4 32)) .cse111) (= v_prenex_102 v_prenex_561) (= v_prenex_102 c_main_~x~0.base) (= v_prenex_557 v_prenex_561) (bvsle .cse112 (select .cse113 v_prenex_557)) (bvsle .cse112 .cse111) (not (bvsle (_ bv0 32) v_prenex_560)))))) .cse12 .cse20) (or .cse0 (forall ((v_prenex_681 (_ BitVec 32)) (v_prenex_680 (_ BitVec 32)) (v_arrayElimCell_248 (_ BitVec 32)) (v_prenex_679 (_ BitVec 32)) (v_prenex_678 (_ BitVec 32)) (v_prenex_677 (_ BitVec 32))) (let ((.cse115 (store |c_#length| v_prenex_681 v_prenex_679))) (let ((.cse114 (bvadd v_prenex_678 (_ bv4 32))) (.cse116 (select .cse115 v_arrayElimCell_248))) (or (bvsle .cse114 (select .cse115 v_prenex_677)) (bvsle .cse114 .cse116) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_248) (= v_prenex_677 v_prenex_681) (bvsle (bvadd v_prenex_680 (_ bv4 32)) .cse116) (= v_arrayElimCell_248 v_prenex_681) (not (bvsle (_ bv0 32) v_prenex_680)))))) .cse11 .cse12) (or .cse6 (forall ((v_arrayElimCell_623 (_ BitVec 32)) (v_prenex_59 (_ BitVec 32)) (v_prenex_574 (_ BitVec 32)) (v_prenex_573 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_59)) (= v_arrayElimCell_623 v_prenex_574) (bvsle (bvadd v_prenex_59 (_ bv4 32)) (select (store |c_#length| v_prenex_574 v_prenex_573) v_arrayElimCell_623))))) (or .cse0 .cse12 .cse20 (forall ((v_arrayElimCell_696 (_ BitVec 32)) (v_subst_2 (_ BitVec 32)) (v_arrayElimCell_118 (_ BitVec 32)) (v_prenex_168 (_ BitVec 32)) (v_prenex_167 (_ BitVec 32))) (let ((.cse117 (select (store |c_#length| v_prenex_168 v_prenex_167) v_arrayElimCell_696))) (or (= v_arrayElimCell_696 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_arrayElimCell_118)) (bvsle (bvadd v_arrayElimCell_118 (_ bv4 32)) .cse117) (= v_arrayElimCell_696 v_prenex_168) (bvsle (bvadd v_subst_2 (_ bv4 32)) .cse117))))) (or (forall ((v_prenex_486 (_ BitVec 32)) (v_prenex_485 (_ BitVec 32)) (v_arrayElimCell_683 (_ BitVec 32)) (v_prenex_484 (_ BitVec 32)) (v_prenex_14 (_ BitVec 32))) (let ((.cse118 (select (store |c_#length| v_prenex_486 v_prenex_485) v_arrayElimCell_683))) (or (bvsle (bvadd v_prenex_484 (_ bv4 32)) .cse118) (bvsle (bvadd v_prenex_14 (_ bv4 32)) .cse118) (not (bvsle (_ bv0 32) v_prenex_14)) (= v_arrayElimCell_683 c_main_~x~0.base) (= v_arrayElimCell_683 v_prenex_486)))) .cse6 .cse12) (or .cse6 (forall ((v_prenex_581 (_ BitVec 32)) (v_prenex_580 (_ BitVec 32)) (v_arrayElimCell_687 (_ BitVec 32)) (v_prenex_19 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_19 (_ bv4 32)) (select (store |c_#length| v_prenex_581 v_prenex_580) v_arrayElimCell_687)) (= v_arrayElimCell_687 v_prenex_581) (not (bvsle (_ bv0 32) v_prenex_19))))) (or (forall ((v_arrayElimCell_209 (_ BitVec 32)) (v_prenex_454 (_ BitVec 32)) (v_prenex_453 (_ BitVec 32)) (v_prenex_452 (_ BitVec 32))) (or (= v_arrayElimCell_209 v_prenex_453) (bvsle (bvadd v_prenex_454 (_ bv4 32)) (select (store |c_#length| v_prenex_453 v_prenex_452) v_arrayElimCell_209)) (not (bvsle (_ bv0 32) v_prenex_454)))) .cse0 .cse6) (or .cse3 .cse0 .cse1 (forall ((v_arrayElimCell_559 (_ BitVec 32)) (v_prenex_664 (_ BitVec 32)) (v_prenex_663 (_ BitVec 32)) (v_prenex_662 (_ BitVec 32))) (or (= v_arrayElimCell_559 v_prenex_664) (not (bvsle (_ bv0 32) v_prenex_663)) (= v_arrayElimCell_559 c_main_~x~0.base) (bvsle (bvadd v_prenex_663 (_ bv4 32)) (select (store |c_#length| v_prenex_664 v_prenex_662) v_arrayElimCell_559))))) (or .cse6 .cse12 (forall ((v_arrayElimCell_555 (_ BitVec 32)) (v_prenex_715 (_ BitVec 32)) (v_prenex_714 (_ BitVec 32)) (v_arrayElimCell_81 (_ BitVec 32))) (or (= v_arrayElimCell_555 v_prenex_715) (bvsle (bvadd v_arrayElimCell_81 (_ bv4 32)) (select (store |c_#length| v_prenex_715 v_prenex_714) v_arrayElimCell_555)) (not (bvsle (_ bv0 32) v_arrayElimCell_81)) (= v_arrayElimCell_555 c_main_~x~0.base)))) (or .cse0 .cse6 (forall ((v_prenex_362 (_ BitVec 32)) (v_prenex_361 (_ BitVec 32)) (v_arrayElimCell_102 (_ BitVec 32)) (v_prenex_360 (_ BitVec 32)) (v_prenex_359 (_ BitVec 32)) (v_prenex_159 (_ BitVec 32))) (let ((.cse123 (store |c_#length| v_prenex_359 v_prenex_362))) (let ((.cse119 (bvadd v_prenex_361 (_ bv4 32))) (.cse121 (select .cse123 v_prenex_159)) (.cse122 (bvadd v_arrayElimCell_102 (_ bv4 32))) (.cse120 (select .cse123 v_prenex_360))) (or (bvsle .cse119 .cse120) (bvsle .cse119 .cse121) (= v_prenex_159 c_main_~x~0.base) (= v_prenex_159 v_prenex_359) (bvsle .cse122 .cse121) (= v_prenex_360 v_prenex_359) (not (bvsle (_ bv0 32) v_arrayElimCell_102)) (bvsle .cse122 .cse120)))))) (or .cse0 (forall ((v_prenex_72 (_ BitVec 32)) (v_prenex_365 (_ BitVec 32)) (v_arrayElimCell_186 (_ BitVec 32)) (v_prenex_364 (_ BitVec 32)) (v_prenex_363 (_ BitVec 32))) (let ((.cse124 (select (store |c_#length| v_prenex_363 v_prenex_365) v_arrayElimCell_186))) (or (= v_arrayElimCell_186 v_prenex_363) (bvsle (bvadd v_prenex_72 (_ bv4 32)) .cse124) (bvsle (bvadd v_prenex_364 (_ bv4 32)) .cse124) (not (bvsle (_ bv0 32) v_prenex_72))))) .cse6) (or .cse3 .cse0 (forall ((v_prenex_689 (_ BitVec 32)) (v_prenex_688 (_ BitVec 32)) (v_prenex_687 (_ BitVec 32)) (v_prenex_686 (_ BitVec 32)) (v_arrayElimCell_395 (_ BitVec 32))) (let ((.cse125 (select (store |c_#length| v_prenex_688 v_prenex_687) v_arrayElimCell_395))) (or (not (bvsle (_ bv0 32) v_prenex_689)) (= v_arrayElimCell_395 c_main_~x~0.base) (= v_arrayElimCell_395 v_prenex_688) (bvsle (bvadd v_prenex_686 (_ bv4 32)) .cse125) (bvsle (bvadd v_prenex_689 (_ bv4 32)) .cse125)))) .cse6) (or .cse0 .cse1 (forall ((v_prenex_780 (_ BitVec 32)) (v_prenex_779 (_ BitVec 32)) (v_prenex_782 (_ BitVec 32)) (v_prenex_781 (_ BitVec 32)) (v_arrayElimCell_397 (_ BitVec 32))) (let ((.cse126 (select (store |c_#length| v_prenex_782 v_prenex_781) v_arrayElimCell_397))) (or (= v_arrayElimCell_397 v_prenex_782) (not (bvsle (_ bv0 32) v_prenex_779)) (bvsle (bvadd v_prenex_779 (_ bv4 32)) .cse126) (bvsle (bvadd v_prenex_780 (_ bv4 32)) .cse126) (= v_arrayElimCell_397 c_main_~x~0.base))))) (or .cse0 .cse1 (forall ((v_prenex_197 (_ BitVec 32)) (v_prenex_196 (_ BitVec 32)) (v_arrayElimCell_582 (_ BitVec 32)) (v_prenex_199 (_ BitVec 32)) (v_prenex_198 (_ BitVec 32))) (let ((.cse127 (select (store |c_#length| v_prenex_197 v_prenex_199) v_arrayElimCell_582))) (or (= v_arrayElimCell_582 v_prenex_197) (bvsle (bvadd v_prenex_196 (_ bv4 32)) .cse127) (not (bvsle (_ bv0 32) v_prenex_196)) (bvsle (bvadd v_prenex_198 (_ bv4 32)) .cse127) (= v_arrayElimCell_582 c_main_~x~0.base))))) (or .cse0 .cse6 (forall ((v_arrayElimCell_585 (_ BitVec 32)) (v_prenex_696 (_ BitVec 32)) (v_prenex_695 (_ BitVec 32)) (v_prenex_694 (_ BitVec 32)) (v_prenex_693 (_ BitVec 32))) (let ((.cse128 (select (store |c_#length| v_prenex_696 v_prenex_694) v_arrayElimCell_585))) (or (bvsle (bvadd v_prenex_695 (_ bv4 32)) .cse128) (bvsle (bvadd v_prenex_693 (_ bv4 32)) .cse128) (not (bvsle (_ bv0 32) v_prenex_695)) (= v_arrayElimCell_585 c_main_~x~0.base) (= v_arrayElimCell_585 v_prenex_696))))) (or .cse0 .cse6 (forall ((v_prenex_439 (_ BitVec 32)) (v_prenex_438 (_ BitVec 32)) (v_prenex_437 (_ BitVec 32)) (v_prenex_68 (_ BitVec 32)) (v_arrayElimCell_551 (_ BitVec 32))) (let ((.cse129 (select (store |c_#length| v_prenex_439 v_prenex_438) v_arrayElimCell_551))) (or (bvsle (bvadd v_prenex_68 (_ bv4 32)) .cse129) (bvsle (bvadd v_prenex_437 (_ bv4 32)) .cse129) (= v_arrayElimCell_551 v_prenex_439) (not (bvsle (_ bv0 32) v_prenex_68)) (= v_arrayElimCell_551 c_main_~x~0.base))))) (or .cse0 (forall ((v_arrayElimCell_497 (_ BitVec 32)) (v_prenex_571 (_ BitVec 32)) (v_prenex_570 (_ BitVec 32)) (v_prenex_572 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_571)) (= v_arrayElimCell_497 v_prenex_572) (bvsle (bvadd v_prenex_571 (_ bv4 32)) (select (store |c_#length| v_prenex_572 v_prenex_570) v_arrayElimCell_497)) (= v_arrayElimCell_497 c_main_~x~0.base))) .cse6) (or .cse6 (forall ((v_prenex_519 (_ BitVec 32)) (v_prenex_61 (_ BitVec 32)) (v_prenex_520 (_ BitVec 32)) (v_arrayElimCell_691 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_61 (_ bv4 32)) (select (store |c_#length| v_prenex_520 v_prenex_519) v_arrayElimCell_691)) (not (bvsle (_ bv0 32) v_prenex_61)) (= v_arrayElimCell_691 v_prenex_520) (= v_arrayElimCell_691 c_main_~x~0.base)))) (or .cse0 .cse6 (forall ((v_prenex_461 (_ BitVec 32)) (v_prenex_460 (_ BitVec 32)) (v_arrayElimCell_512 (_ BitVec 32)) (v_prenex_459 (_ BitVec 32))) (or (= v_arrayElimCell_512 c_main_~x~0.base) (bvsle (bvadd v_prenex_460 (_ bv4 32)) (select (store |c_#length| v_prenex_461 v_prenex_459) v_arrayElimCell_512)) (= v_arrayElimCell_512 v_prenex_461) (not (bvsle (_ bv0 32) v_prenex_460))))) (or .cse0 .cse6 (forall ((v_prenex_609 (_ BitVec 32)) (v_prenex_608 (_ BitVec 32)) (v_arrayElimCell_212 (_ BitVec 32)) (v_prenex_610 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_610)) (bvsle (bvadd v_prenex_610 (_ bv4 32)) (select (store |c_#length| v_prenex_609 v_prenex_608) v_arrayElimCell_212)) (= v_arrayElimCell_212 v_prenex_609)))) (or .cse0 .cse1 (forall ((v_prenex_447 (_ BitVec 32)) (v_prenex_446 (_ BitVec 32)) (v_prenex_445 (_ BitVec 32)) (v_prenex_444 (_ BitVec 32)) (v_prenex_443 (_ BitVec 32)) (v_arrayElimCell_363 (_ BitVec 32))) (let ((.cse132 (store |c_#length| v_prenex_447 v_prenex_445))) (let ((.cse131 (bvadd v_prenex_446 (_ bv4 32))) (.cse130 (select .cse132 v_prenex_443))) (or (bvsle (bvadd v_prenex_444 (_ bv4 32)) .cse130) (= v_arrayElimCell_363 v_prenex_447) (= v_prenex_443 v_prenex_447) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_363) (bvsle .cse131 (select .cse132 v_arrayElimCell_363)) (not (bvsle (_ bv0 32) v_prenex_446)) (bvsle .cse131 .cse130))))) .cse12) (or .cse0 (forall ((v_arrayElimCell_532 (_ BitVec 32)) (v_prenex_539 (_ BitVec 32)) (v_prenex_538 (_ BitVec 32)) (v_prenex_537 (_ BitVec 32)) (v_prenex_541 (_ BitVec 32)) (v_prenex_540 (_ BitVec 32))) (let ((.cse133 (store |c_#length| v_prenex_541 v_prenex_539))) (or (not (bvsle (_ bv0 32) v_prenex_540)) (bvsle (bvadd v_prenex_538 (_ bv4 32)) (select .cse133 v_prenex_537)) (bvsle (bvadd v_prenex_540 (_ bv4 32)) (select .cse133 v_arrayElimCell_532)) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_532) (= v_arrayElimCell_532 v_prenex_541) (= v_prenex_537 v_prenex_541)))) .cse12) (or .cse0 .cse6 (forall ((v_prenex_263 (_ BitVec 32)) (v_arrayElimCell_269 (_ BitVec 32)) (v_prenex_66 (_ BitVec 32)) (v_prenex_265 (_ BitVec 32)) (v_prenex_264 (_ BitVec 32))) (let ((.cse134 (select (store |c_#length| v_prenex_263 v_prenex_265) v_arrayElimCell_269))) (or (bvsle (bvadd v_prenex_264 (_ bv4 32)) .cse134) (not (bvsle (_ bv0 32) v_prenex_66)) (= v_arrayElimCell_269 v_prenex_263) (bvsle (bvadd v_prenex_66 (_ bv4 32)) .cse134))))) (or .cse6 (forall ((v_prenex_91 (_ BitVec 32)) (v_prenex_649 (_ BitVec 32)) (v_prenex_652 (_ BitVec 32)) (v_prenex_651 (_ BitVec 32)) (v_prenex_650 (_ BitVec 32))) (let ((.cse135 (select (store |c_#length| v_prenex_652 v_prenex_650) v_prenex_91))) (or (not (bvsle (_ bv0 32) v_prenex_651)) (= v_prenex_91 c_main_~x~0.base) (bvsle (bvadd v_prenex_649 (_ bv4 32)) .cse135) (bvsle (bvadd v_prenex_651 (_ bv4 32)) .cse135) (= v_prenex_91 v_prenex_652)))) .cse12) (or .cse6 (forall ((v_prenex_529 (_ BitVec 32)) (v_prenex_533 (_ BitVec 32)) (v_prenex_532 (_ BitVec 32)) (v_prenex_531 (_ BitVec 32)) (v_prenex_530 (_ BitVec 32)) (v_arrayElimCell_672 (_ BitVec 32))) (let ((.cse137 (store |c_#length| v_prenex_532 v_prenex_531))) (let ((.cse136 (bvadd v_prenex_533 (_ bv4 32))) (.cse138 (select .cse137 v_prenex_529))) (or (= v_prenex_529 v_prenex_532) (bvsle .cse136 (select .cse137 v_arrayElimCell_672)) (bvsle (bvadd v_prenex_530 (_ bv4 32)) .cse138) (not (bvsle (_ bv0 32) v_prenex_533)) (= v_arrayElimCell_672 v_prenex_532) (bvsle .cse136 .cse138) (= v_arrayElimCell_672 c_main_~x~0.base))))) .cse12) (or .cse0 .cse1 (forall ((v_arrayElimCell_300 (_ BitVec 32)) (v_prenex_514 (_ BitVec 32)) (v_prenex_513 (_ BitVec 32)) (v_prenex_512 (_ BitVec 32))) (or (= v_arrayElimCell_300 v_prenex_514) (not (bvsle (_ bv0 32) v_prenex_513)) (bvsle (bvadd v_prenex_513 (_ bv4 32)) (select (store |c_#length| v_prenex_514 v_prenex_512) v_arrayElimCell_300))))) (or .cse6 .cse12 (forall ((v_prenex_21 (_ BitVec 32)) (v_prenex_759 (_ BitVec 32)) (v_arrayElimCell_336 (_ BitVec 32)) (v_prenex_758 (_ BitVec 32)) (v_prenex_760 (_ BitVec 32))) (let ((.cse139 (select (store |c_#length| v_prenex_760 v_prenex_759) v_arrayElimCell_336))) (or (not (bvsle (_ bv0 32) v_prenex_21)) (= v_arrayElimCell_336 c_main_~x~0.base) (= v_arrayElimCell_336 v_prenex_760) (bvsle (bvadd v_prenex_21 (_ bv4 32)) .cse139) (bvsle (bvadd v_prenex_758 (_ bv4 32)) .cse139))))) (or .cse1 .cse50 (forall ((v_prenex_463 (_ BitVec 32)) (v_prenex_462 (_ BitVec 32))) (or (bvsle (bvadd |c_main_write~$Pointer$_#value.offset| (_ bv4 32)) (select (store |c_#length| v_prenex_463 v_prenex_462) |c_main_write~$Pointer$_#value.base|)) (= |c_main_write~$Pointer$_#value.base| v_prenex_463))) .cse64) (or .cse0 .cse12 .cse20 (forall ((v_arrayElimCell_222 (_ BitVec 32)) (v_prenex_40 (_ BitVec 32)) (v_prenex_422 (_ BitVec 32)) (v_prenex_421 (_ BitVec 32)) (v_prenex_420 (_ BitVec 32))) (let ((.cse140 (select (store |c_#length| v_prenex_422 v_prenex_421) v_arrayElimCell_222))) (or (bvsle (bvadd v_prenex_40 (_ bv4 32)) .cse140) (not (bvsle (_ bv0 32) v_prenex_40)) (= v_arrayElimCell_222 v_prenex_422) (= v_arrayElimCell_222 c_main_~x~0.base) (bvsle (bvadd v_prenex_420 (_ bv4 32)) .cse140))))) (or (forall ((v_arrayElimCell_277 (_ BitVec 32)) (v_prenex_639 (_ BitVec 32)) (v_prenex_76 (_ BitVec 32)) (v_prenex_638 (_ BitVec 32)) (v_prenex_637 (_ BitVec 32))) (let ((.cse141 (select (store |c_#length| v_prenex_639 v_prenex_638) v_arrayElimCell_277))) (or (bvsle (bvadd v_prenex_76 (_ bv4 32)) .cse141) (= v_arrayElimCell_277 v_prenex_639) (bvsle (bvadd v_prenex_637 (_ bv4 32)) .cse141) (not (bvsle (_ bv0 32) v_prenex_76))))) .cse0 .cse6) (or .cse6 (forall ((v_prenex_565 (_ BitVec 32)) (v_prenex_564 (_ BitVec 32)) (v_prenex_563 (_ BitVec 32)) (v_prenex_562 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_563)) (= v_prenex_562 v_prenex_565) (bvsle (bvadd v_prenex_563 (_ bv4 32)) (select (store |c_#length| v_prenex_565 v_prenex_564) v_prenex_562))))) (or .cse0 .cse6 (forall ((v_prenex_31 (_ BitVec 32)) (v_prenex_335 (_ BitVec 32)) (v_prenex_334 (_ BitVec 32)) (v_arrayElimCell_287 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_31 (_ bv4 32)) (select (store |c_#length| v_prenex_334 v_prenex_335) v_arrayElimCell_287)) (not (bvsle (_ bv0 32) v_prenex_31)) (= v_arrayElimCell_287 v_prenex_334) (= v_arrayElimCell_287 c_main_~x~0.base)))) (or .cse3 (forall ((v_arrayElimCell_675 (_ BitVec 32)) (v_prenex_468 (_ BitVec 32)) (v_prenex_467 (_ BitVec 32)) (v_prenex_466 (_ BitVec 32)) (v_arrayElimCell_91 (_ BitVec 32))) (let ((.cse142 (select (store |c_#length| v_prenex_468 v_prenex_467) v_arrayElimCell_675))) (or (bvsle (bvadd v_prenex_466 (_ bv4 32)) .cse142) (not (bvsle (_ bv0 32) v_arrayElimCell_91)) (= v_arrayElimCell_675 v_prenex_468) (= v_arrayElimCell_675 c_main_~x~0.base) (bvsle (bvadd v_arrayElimCell_91 (_ bv4 32)) .cse142)))) .cse6) (or .cse3 .cse0 (forall ((v_arrayElimCell_410 (_ BitVec 32)) (v_prenex_309 (_ BitVec 32)) (v_prenex_308 (_ BitVec 32)) (v_prenex_307 (_ BitVec 32)) (v_prenex_306 (_ BitVec 32))) (let ((.cse143 (select (store |c_#length| v_prenex_306 v_prenex_308) v_arrayElimCell_410))) (or (bvsle (bvadd v_prenex_307 (_ bv4 32)) .cse143) (= v_arrayElimCell_410 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_309)) (= v_arrayElimCell_410 v_prenex_306) (bvsle (bvadd v_prenex_309 (_ bv4 32)) .cse143)))) .cse6) (or .cse0 (forall ((v_arrayElimCell_288 (_ BitVec 32)) (v_prenex_402 (_ BitVec 32)) (v_prenex_401 (_ BitVec 32)) (v_prenex_400 (_ BitVec 32))) (or (= v_arrayElimCell_288 v_prenex_400) (not (bvsle (_ bv0 32) v_prenex_402)) (bvsle (bvadd v_prenex_402 (_ bv4 32)) (select (store |c_#length| v_prenex_400 v_prenex_401) v_arrayElimCell_288)) (= v_arrayElimCell_288 c_main_~x~0.base)))) (or .cse0 .cse6 (forall ((v_arrayElimCell_404 (_ BitVec 32)) (v_prenex_569 (_ BitVec 32)) (v_prenex_568 (_ BitVec 32)) (v_prenex_567 (_ BitVec 32)) (v_prenex_566 (_ BitVec 32))) (let ((.cse144 (select (store |c_#length| v_prenex_568 v_prenex_567) v_arrayElimCell_404))) (or (= v_arrayElimCell_404 v_prenex_568) (bvsle (bvadd v_prenex_569 (_ bv4 32)) .cse144) (= v_arrayElimCell_404 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_569)) (bvsle (bvadd v_prenex_566 (_ bv4 32)) .cse144))))) (or .cse3 .cse0 (forall ((v_prenex_483 (_ BitVec 32)) (v_prenex_482 (_ BitVec 32)) (v_prenex_481 (_ BitVec 32)) (v_arrayElimCell_544 (_ BitVec 32)) (v_prenex_480 (_ BitVec 32))) (let ((.cse145 (select (store |c_#length| v_prenex_483 v_prenex_481) v_arrayElimCell_544))) (or (= v_arrayElimCell_544 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_482)) (= v_arrayElimCell_544 v_prenex_483) (bvsle (bvadd v_prenex_480 (_ bv4 32)) .cse145) (bvsle (bvadd v_prenex_482 (_ bv4 32)) .cse145))))) (or .cse0 .cse6 (forall ((v_prenex_305 (_ BitVec 32)) (v_prenex_304 (_ BitVec 32)) (v_arrayElimCell_608 (_ BitVec 32)) (v_prenex_67 (_ BitVec 32))) (or (= v_arrayElimCell_608 v_prenex_304) (bvsle (bvadd v_prenex_67 (_ bv4 32)) (select (store |c_#length| v_prenex_304 v_prenex_305) v_arrayElimCell_608)) (= v_arrayElimCell_608 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_67))))) (or .cse0 (forall ((v_prenex_619 (_ BitVec 32)) (v_prenex_618 (_ BitVec 32)) (v_arrayElimCell_643 (_ BitVec 32)) (v_prenex_617 (_ BitVec 32)) (v_prenex_620 (_ BitVec 32))) (let ((.cse146 (select (store |c_#length| v_prenex_620 v_prenex_618) v_arrayElimCell_643))) (or (not (bvsle (_ bv0 32) v_prenex_619)) (bvsle (bvadd v_prenex_619 (_ bv4 32)) .cse146) (bvsle (bvadd v_prenex_617 (_ bv4 32)) .cse146) (= v_arrayElimCell_643 v_prenex_620) (= v_arrayElimCell_643 c_main_~x~0.base))))) (or .cse0 .cse12 (forall ((v_prenex_778 (_ BitVec 32)) (v_prenex_777 (_ BitVec 32)) (v_prenex_776 (_ BitVec 32)) (v_prenex_775 (_ BitVec 32)) (v_arrayElimCell_240 (_ BitVec 32))) (let ((.cse147 (select (store |c_#length| v_prenex_778 v_prenex_777) v_arrayElimCell_240))) (or (bvsle (bvadd v_prenex_776 (_ bv4 32)) .cse147) (bvsle (bvadd v_prenex_775 (_ bv4 32)) .cse147) (not (bvsle (_ bv0 32) v_prenex_775)) (= v_arrayElimCell_240 v_prenex_778) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_240))))) (or .cse0 (forall ((v_arrayElimCell_208 (_ BitVec 32)) (v_prenex_333 (_ BitVec 32)) (v_prenex_332 (_ BitVec 32)) (v_prenex_331 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_333)) (bvsle (bvadd v_prenex_333 (_ bv4 32)) (select (store |c_#length| v_prenex_331 v_prenex_332) v_arrayElimCell_208)) (= v_arrayElimCell_208 v_prenex_331)))) (or .cse0 .cse12 (forall ((v_prenex_230 (_ BitVec 32)) (v_subst_3 (_ BitVec 32)) (v_arrayElimCell_524 (_ BitVec 32)) (v_prenex_229 (_ BitVec 32)) (v_prenex_228 (_ BitVec 32)) (v_prenex_227 (_ BitVec 32))) (let ((.cse148 (store |c_#length| v_prenex_227 v_prenex_230))) (or (not (bvsle (_ bv0 32) v_prenex_228)) (= v_subst_3 v_prenex_227) (bvsle (bvadd v_prenex_229 (_ bv4 32)) (select .cse148 v_subst_3)) (= v_arrayElimCell_524 v_prenex_227) (bvsle (bvadd v_prenex_228 (_ bv4 32)) (select .cse148 v_arrayElimCell_524)) (= v_arrayElimCell_524 c_main_~x~0.base)))) .cse20) (or (forall ((v_prenex_723 (_ BitVec 32)) (v_prenex_722 (_ BitVec 32)) (v_prenex_721 (_ BitVec 32)) (v_prenex_720 (_ BitVec 32)) (v_arrayElimCell_619 (_ BitVec 32))) (let ((.cse149 (select (store |c_#length| v_prenex_723 v_prenex_722) v_arrayElimCell_619))) (or (bvsle (bvadd v_prenex_721 (_ bv4 32)) .cse149) (bvsle (bvadd v_prenex_720 (_ bv4 32)) .cse149) (= v_arrayElimCell_619 v_prenex_723) (not (bvsle (_ bv0 32) v_prenex_720))))) .cse0 .cse11 .cse12) (or .cse0 (forall ((v_prenex_358 (_ BitVec 32)) (v_prenex_357 (_ BitVec 32)) (v_arrayElimCell_628 (_ BitVec 32)) (v_prenex_356 (_ BitVec 32)) (v_prenex_355 (_ BitVec 32))) (let ((.cse150 (select (store |c_#length| v_prenex_355 v_prenex_357) v_arrayElimCell_628))) (or (not (bvsle (_ bv0 32) v_prenex_358)) (bvsle (bvadd v_prenex_356 (_ bv4 32)) .cse150) (= v_arrayElimCell_628 v_prenex_355) (bvsle (bvadd v_prenex_358 (_ bv4 32)) .cse150))))) (or .cse0 .cse1 (forall ((v_prenex_613 (_ BitVec 32)) (v_prenex_612 (_ BitVec 32)) (v_prenex_611 (_ BitVec 32)) (v_arrayElimCell_281 (_ BitVec 32))) (or (= v_arrayElimCell_281 v_prenex_613) (not (bvsle (_ bv0 32) v_prenex_612)) (bvsle (bvadd v_prenex_612 (_ bv4 32)) (select (store |c_#length| v_prenex_613 v_prenex_611) v_arrayElimCell_281)) (= v_arrayElimCell_281 c_main_~x~0.base)))) (or (forall ((v_prenex_390 (_ BitVec 32)) (v_arrayElimCell_668 (_ BitVec 32)) (v_prenex_389 (_ BitVec 32)) (v_arrayElimCell_110 (_ BitVec 32))) (or (= v_arrayElimCell_668 c_main_~x~0.base) (= v_arrayElimCell_668 v_prenex_389) (not (bvsle (_ bv0 32) v_arrayElimCell_110)) (bvsle (bvadd v_arrayElimCell_110 (_ bv4 32)) (select (store |c_#length| v_prenex_389 v_prenex_390) v_arrayElimCell_668)))) .cse0 .cse12 .cse20) (or .cse0 (forall ((v_arrayElimCell_157 (_ BitVec 32)) (v_arrayElimCell_369 (_ BitVec 32)) (v_prenex_255 (_ BitVec 32)) (v_prenex_254 (_ BitVec 32))) (or (= v_arrayElimCell_369 v_prenex_254) (not (bvsle (_ bv0 32) v_arrayElimCell_157)) (= v_arrayElimCell_369 c_main_~x~0.base) (bvsle (bvadd v_arrayElimCell_157 (_ bv4 32)) (select (store |c_#length| v_prenex_254 v_prenex_255) v_arrayElimCell_369)))) .cse6) (or .cse0 .cse6 (forall ((v_prenex_685 (_ BitVec 32)) (v_arrayElimCell_350 (_ BitVec 32)) (v_prenex_684 (_ BitVec 32)) (v_prenex_683 (_ BitVec 32)) (v_prenex_682 (_ BitVec 32))) (let ((.cse151 (select (store |c_#length| v_prenex_685 v_prenex_683) v_arrayElimCell_350))) (or (bvsle (bvadd v_prenex_684 (_ bv4 32)) .cse151) (= v_arrayElimCell_350 v_prenex_685) (bvsle (bvadd v_prenex_682 (_ bv4 32)) .cse151) (not (bvsle (_ bv0 32) v_prenex_684)) (= v_arrayElimCell_350 c_main_~x~0.base))))) (or .cse3 .cse0 .cse6 (forall ((v_arrayElimCell_455 (_ BitVec 32)) (v_prenex_554 (_ BitVec 32)) (v_prenex_553 (_ BitVec 32)) (v_prenex_552 (_ BitVec 32)) (v_prenex_551 (_ BitVec 32))) (let ((.cse152 (select (store |c_#length| v_prenex_554 v_prenex_552) v_arrayElimCell_455))) (or (bvsle (bvadd v_prenex_551 (_ bv4 32)) .cse152) (= v_arrayElimCell_455 v_prenex_554) (not (bvsle (_ bv0 32) v_prenex_553)) (bvsle (bvadd v_prenex_553 (_ bv4 32)) .cse152))))) (or .cse6 (forall ((v_prenex_20 (_ BitVec 32)) (v_prenex_380 (_ BitVec 32)) (v_arrayElimCell_438 (_ BitVec 32)) (v_prenex_379 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_20)) (bvsle (bvadd v_prenex_20 (_ bv4 32)) (select (store |c_#length| v_prenex_379 v_prenex_380) v_arrayElimCell_438)) (= v_arrayElimCell_438 v_prenex_379) (= v_arrayElimCell_438 c_main_~x~0.base)))) (or .cse6 (forall ((v_prenex_296 (_ BitVec 32)) (v_prenex_295 (_ BitVec 32)) (v_arrayElimCell_330 (_ BitVec 32)) (v_prenex_297 (_ BitVec 32)) (v_prenex_58 (_ BitVec 32))) (let ((.cse153 (select (store |c_#length| v_prenex_295 v_prenex_297) v_arrayElimCell_330))) (or (= v_arrayElimCell_330 v_prenex_295) (bvsle (bvadd v_prenex_58 (_ bv4 32)) .cse153) (bvsle (bvadd v_prenex_296 (_ bv4 32)) .cse153) (not (bvsle (_ bv0 32) v_prenex_58)))))) (or .cse3 .cse0 .cse6 (forall ((v_arrayElimCell_545 (_ BitVec 32)) (v_prenex_757 (_ BitVec 32)) (v_prenex_756 (_ BitVec 32)) (v_prenex_755 (_ BitVec 32)) (v_prenex_754 (_ BitVec 32))) (let ((.cse154 (select (store |c_#length| v_prenex_757 v_prenex_756) v_arrayElimCell_545))) (or (= v_arrayElimCell_545 c_main_~x~0.base) (= v_arrayElimCell_545 v_prenex_757) (not (bvsle (_ bv0 32) v_prenex_754)) (bvsle (bvadd v_prenex_754 (_ bv4 32)) .cse154) (bvsle (bvadd v_prenex_755 (_ bv4 32)) .cse154))))) (or .cse0 .cse6 .cse12 (forall ((v_prenex_704 (_ BitVec 32)) (v_prenex_703 (_ BitVec 32)) (v_prenex_702 (_ BitVec 32)) (v_prenex_701 (_ BitVec 32)) (v_arrayElimCell_427 (_ BitVec 32)) (v_prenex_700 (_ BitVec 32))) (let ((.cse157 (store |c_#length| v_prenex_704 v_prenex_703))) (let ((.cse155 (bvadd v_prenex_700 (_ bv4 32))) (.cse156 (select .cse157 v_prenex_701))) (or (= v_arrayElimCell_427 v_prenex_704) (= v_prenex_701 v_prenex_704) (bvsle .cse155 .cse156) (not (bvsle (_ bv0 32) v_prenex_700)) (bvsle .cse155 (select .cse157 v_arrayElimCell_427)) (= v_arrayElimCell_427 c_main_~x~0.base) (bvsle (bvadd v_prenex_702 (_ bv4 32)) .cse156)))))) (or .cse0 .cse1 (forall ((v_prenex_676 (_ BitVec 32)) (v_prenex_675 (_ BitVec 32)) (v_prenex_674 (_ BitVec 32)) (v_arrayElimCell_509 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_675)) (bvsle (bvadd v_prenex_675 (_ bv4 32)) (select (store |c_#length| v_prenex_676 v_prenex_674) v_arrayElimCell_509)) (= v_arrayElimCell_509 v_prenex_676) (= v_arrayElimCell_509 c_main_~x~0.base)))) (or .cse0 .cse12 (forall ((v_prenex_32 (_ BitVec 32)) (v_arrayElimCell_292 (_ BitVec 32)) (v_prenex_212 (_ BitVec 32)) (v_prenex_211 (_ BitVec 32)) (v_prenex_210 (_ BitVec 32))) (let ((.cse158 (select (store |c_#length| v_prenex_210 v_prenex_212) v_arrayElimCell_292))) (or (= v_arrayElimCell_292 v_prenex_210) (bvsle (bvadd v_prenex_32 (_ bv4 32)) .cse158) (bvsle (bvadd v_prenex_211 (_ bv4 32)) .cse158) (= v_arrayElimCell_292 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_32))))) .cse20) (or .cse3 .cse0 .cse6 (forall ((v_prenex_627 (_ BitVec 32)) (v_prenex_626 (_ BitVec 32)) (v_prenex_625 (_ BitVec 32)) (v_arrayElimCell_562 (_ BitVec 32))) (or (= v_arrayElimCell_562 v_prenex_627) (not (bvsle (_ bv0 32) v_prenex_626)) (= v_arrayElimCell_562 c_main_~x~0.base) (bvsle (bvadd v_prenex_626 (_ bv4 32)) (select (store |c_#length| v_prenex_627 v_prenex_625) v_arrayElimCell_562))))) (or .cse0 .cse11 (forall ((v_arrayElimCell_200 (_ BitVec 32)) (v_prenex_303 (_ BitVec 32)) (v_prenex_302 (_ BitVec 32)) (v_prenex_301 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_303 (_ bv4 32)) (select (store |c_#length| v_prenex_301 v_prenex_302) v_arrayElimCell_200)) (= v_arrayElimCell_200 v_prenex_301) (not (bvsle (_ bv0 32) v_prenex_303)) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_200))) .cse12) (or .cse0 .cse12 .cse20 (forall ((v_prenex_95 (_ BitVec 32)) (v_prenex_765 (_ BitVec 32)) (v_prenex_764 (_ BitVec 32)) (v_prenex_763 (_ BitVec 32)) (v_prenex_762 (_ BitVec 32)) (v_prenex_761 (_ BitVec 32))) (let ((.cse160 (store |c_#length| v_prenex_765 v_prenex_764))) (let ((.cse159 (bvadd v_prenex_763 (_ bv4 32))) (.cse161 (select .cse160 v_prenex_95))) (or (bvsle .cse159 (select .cse160 v_prenex_762)) (= v_prenex_95 c_main_~x~0.base) (= v_prenex_762 v_prenex_765) (= v_prenex_95 v_prenex_765) (not (bvsle (_ bv0 32) v_prenex_761)) (bvsle .cse159 .cse161) (bvsle (bvadd v_prenex_761 (_ bv4 32)) .cse161)))))) .cse0 (or (forall ((v_arrayElimCell_527 (_ BitVec 32)) (v_prenex_259 (_ BitVec 32)) (v_prenex_258 (_ BitVec 32)) (v_prenex_257 (_ BitVec 32)) (v_prenex_256 (_ BitVec 32))) (let ((.cse162 (select (store |c_#length| v_prenex_256 v_prenex_259) v_arrayElimCell_527))) (or (bvsle (bvadd v_prenex_257 (_ bv4 32)) .cse162) (= v_arrayElimCell_527 v_prenex_256) (= v_arrayElimCell_527 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_257)) (bvsle (bvadd v_prenex_258 (_ bv4 32)) .cse162)))) .cse0 .cse12 .cse20) (or .cse0 (forall ((v_arrayElimCell_203 (_ BitVec 32)) (v_arrayElimCell_109 (_ BitVec 32)) (v_prenex_248 (_ BitVec 32)) (v_prenex_247 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_arrayElimCell_109)) (= v_arrayElimCell_203 c_main_~x~0.base) (bvsle (bvadd v_arrayElimCell_109 (_ bv4 32)) (select (store |c_#length| v_prenex_247 v_prenex_248) v_arrayElimCell_203)) (= v_arrayElimCell_203 v_prenex_247))) .cse12 .cse20) (or .cse6 (forall ((v_arrayElimCell_137 (_ BitVec 32)) (v_prenex_407 (_ BitVec 32)) (v_arrayElimCell_446 (_ BitVec 32)) (v_prenex_406 (_ BitVec 32))) (or (= v_arrayElimCell_446 v_prenex_406) (bvsle (bvadd v_arrayElimCell_137 (_ bv4 32)) (select (store |c_#length| v_prenex_406 v_prenex_407) v_arrayElimCell_446)) (= v_arrayElimCell_446 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_arrayElimCell_137))))) (or .cse0 .cse6 (forall ((v_prenex_73 (_ BitVec 32)) (v_prenex_246 (_ BitVec 32)) (v_arrayElimCell_273 (_ BitVec 32)) (v_prenex_245 (_ BitVec 32)) (v_prenex_244 (_ BitVec 32))) (let ((.cse163 (select (store |c_#length| v_prenex_244 v_prenex_246) v_arrayElimCell_273))) (or (bvsle (bvadd v_prenex_73 (_ bv4 32)) .cse163) (bvsle (bvadd v_prenex_245 (_ bv4 32)) .cse163) (= v_arrayElimCell_273 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_73)) (= v_arrayElimCell_273 v_prenex_244))))) (or .cse3 .cse0 (forall ((v_prenex_284 (_ BitVec 32)) (v_prenex_283 (_ BitVec 32)) (v_prenex_282 (_ BitVec 32)) (v_prenex_281 (_ BitVec 32)) (v_arrayElimCell_394 (_ BitVec 32))) (let ((.cse164 (select (store |c_#length| v_prenex_281 v_prenex_283) v_arrayElimCell_394))) (or (= v_arrayElimCell_394 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_284)) (bvsle (bvadd v_prenex_284 (_ bv4 32)) .cse164) (bvsle (bvadd v_prenex_282 (_ bv4 32)) .cse164) (= v_arrayElimCell_394 v_prenex_281))))) (or .cse3 .cse0 .cse1 (forall ((v_prenex_373 (_ BitVec 32)) (v_prenex_372 (_ BitVec 32)) (v_prenex_371 (_ BitVec 32)) (v_prenex_370 (_ BitVec 32)) (v_arrayElimCell_361 (_ BitVec 32))) (let ((.cse165 (select (store |c_#length| v_prenex_370 v_prenex_372) v_arrayElimCell_361))) (or (bvsle (bvadd v_prenex_373 (_ bv4 32)) .cse165) (bvsle (bvadd v_prenex_371 (_ bv4 32)) .cse165) (not (bvsle (_ bv0 32) v_prenex_373)) (= v_arrayElimCell_361 c_main_~x~0.base) (= v_arrayElimCell_361 v_prenex_370))))) (or .cse0 (forall ((v_arrayElimCell_465 (_ BitVec 32)) (v_prenex_183 (_ BitVec 32)) (v_prenex_65 (_ BitVec 32)) (v_prenex_182 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_65)) (bvsle (bvadd v_prenex_65 (_ bv4 32)) (select (store |c_#length| v_prenex_183 v_prenex_182) v_arrayElimCell_465)) (= v_arrayElimCell_465 v_prenex_183))) .cse6) (or (forall ((v_arrayElimCell_434 (_ BitVec 32)) (v_prenex_465 (_ BitVec 32)) (v_prenex_464 (_ BitVec 32)) (v_prenex_47 (_ BitVec 32))) (or (= v_arrayElimCell_434 v_prenex_465) (not (bvsle (_ bv0 32) v_prenex_47)) (bvsle (bvadd v_prenex_47 (_ bv4 32)) (select (store |c_#length| v_prenex_465 v_prenex_464) v_arrayElimCell_434)))) .cse0 .cse6) (or .cse6 .cse12 (forall ((v_prenex_18 (_ BitVec 32)) (v_prenex_278 (_ BitVec 32)) (v_arrayElimCell_262 (_ BitVec 32)) (v_prenex_277 (_ BitVec 32)) (v_prenex_276 (_ BitVec 32)) (v_prenex_275 (_ BitVec 32))) (let ((.cse167 (store |c_#length| v_prenex_275 v_prenex_278))) (let ((.cse166 (bvadd v_prenex_277 (_ bv4 32))) (.cse168 (select .cse167 v_arrayElimCell_262))) (or (= v_arrayElimCell_262 v_prenex_275) (not (bvsle (_ bv0 32) v_prenex_18)) (= v_arrayElimCell_262 c_main_~x~0.base) (= v_prenex_276 v_prenex_275) (bvsle .cse166 (select .cse167 v_prenex_276)) (bvsle .cse166 .cse168) (bvsle (bvadd v_prenex_18 (_ bv4 32)) .cse168)))))) (or .cse6 .cse12 (forall ((v_prenex_616 (_ BitVec 32)) (v_arrayElimCell_226 (_ BitVec 32)) (v_prenex_615 (_ BitVec 32)) (v_prenex_614 (_ BitVec 32)) (v_arrayElimCell_84 (_ BitVec 32))) (let ((.cse169 (select (store |c_#length| v_prenex_616 v_prenex_615) v_arrayElimCell_226))) (or (= v_arrayElimCell_226 v_prenex_616) (bvsle (bvadd v_prenex_614 (_ bv4 32)) .cse169) (bvsle (bvadd v_arrayElimCell_84 (_ bv4 32)) .cse169) (not (bvsle (_ bv0 32) v_arrayElimCell_84)))))) (or .cse0 .cse12 (forall ((v_prenex_405 (_ BitVec 32)) (v_prenex_404 (_ BitVec 32)) (v_prenex_403 (_ BitVec 32)) (v_arrayElimCell_617 (_ BitVec 32)) (v_prenex_33 (_ BitVec 32))) (let ((.cse170 (select (store |c_#length| v_prenex_403 v_prenex_405) v_arrayElimCell_617))) (or (bvsle (bvadd v_prenex_404 (_ bv4 32)) .cse170) (= v_arrayElimCell_617 v_prenex_403) (bvsle (bvadd v_prenex_33 (_ bv4 32)) .cse170) (not (bvsle (_ bv0 32) v_prenex_33)))))) (or .cse0 .cse12 (forall ((v_prenex_41 (_ BitVec 32)) (v_arrayElimCell_528 (_ BitVec 32)) (v_prenex_189 (_ BitVec 32)) (v_prenex_188 (_ BitVec 32)) (v_prenex_187 (_ BitVec 32))) (let ((.cse171 (select (store |c_#length| v_prenex_188 v_prenex_187) v_arrayElimCell_528))) (or (= v_arrayElimCell_528 v_prenex_188) (not (bvsle (_ bv0 32) v_prenex_41)) (bvsle (bvadd v_prenex_41 (_ bv4 32)) .cse171) (= |c_main_write~$Pointer$_#value.base| v_arrayElimCell_528) (bvsle (bvadd v_prenex_189 (_ bv4 32)) .cse171))))) (or .cse0 .cse12 (forall ((v_arrayElimCell_699 (_ BitVec 32)) (v_prenex_624 (_ BitVec 32)) (v_prenex_623 (_ BitVec 32)) (v_prenex_622 (_ BitVec 32)) (v_prenex_621 (_ BitVec 32))) (let ((.cse172 (select (store |c_#length| v_prenex_623 v_prenex_622) v_arrayElimCell_699))) (or (= v_arrayElimCell_699 c_main_~x~0.base) (bvsle (bvadd v_prenex_624 (_ bv4 32)) .cse172) (not (bvsle (_ bv0 32) v_prenex_624)) (= v_arrayElimCell_699 v_prenex_623) (bvsle (bvadd v_prenex_621 (_ bv4 32)) .cse172)))) .cse20) (or .cse3 .cse0 (forall ((v_prenex_508 (_ BitVec 32)) (v_prenex_507 (_ BitVec 32)) (v_prenex_506 (_ BitVec 32)) (v_prenex_505 (_ BitVec 32)) (v_arrayElimCell_459 (_ BitVec 32))) (let ((.cse173 (select (store |c_#length| v_prenex_508 v_prenex_506) v_arrayElimCell_459))) (or (bvsle (bvadd v_prenex_505 (_ bv4 32)) .cse173) (= v_arrayElimCell_459 v_prenex_508) (not (bvsle (_ bv0 32) v_prenex_507)) (bvsle (bvadd v_prenex_507 (_ bv4 32)) .cse173)))) .cse6) (or .cse6 (forall ((v_prenex_161 (_ BitVec 32)) (v_prenex_636 (_ BitVec 32)) (v_prenex_635 (_ BitVec 32)) (v_prenex_634 (_ BitVec 32)) (v_prenex_633 (_ BitVec 32))) (let ((.cse174 (select (store |c_#length| v_prenex_635 v_prenex_634) v_prenex_161))) (or (bvsle (bvadd v_prenex_633 (_ bv4 32)) .cse174) (not (bvsle (_ bv0 32) v_prenex_636)) (bvsle (bvadd v_prenex_636 (_ bv4 32)) .cse174) (= v_prenex_161 v_prenex_635) (= v_prenex_161 c_main_~x~0.base))))) (or (forall ((v_arrayElimCell_490 (_ BitVec 32)) (v_prenex_632 (_ BitVec 32)) (v_prenex_631 (_ BitVec 32)) (v_prenex_630 (_ BitVec 32))) (or (= v_arrayElimCell_490 v_prenex_632) (= v_arrayElimCell_490 c_main_~x~0.base) (bvsle (bvadd v_prenex_631 (_ bv4 32)) (select (store |c_#length| v_prenex_632 v_prenex_630) v_arrayElimCell_490)) (not (bvsle (_ bv0 32) v_prenex_631)))) .cse0 .cse1) (or .cse3 .cse0 .cse6 (forall ((v_prenex_692 (_ BitVec 32)) (v_arrayElimCell_486 (_ BitVec 32)) (v_prenex_691 (_ BitVec 32)) (v_prenex_690 (_ BitVec 32))) (or (not (bvsle (_ bv0 32) v_prenex_691)) (= v_arrayElimCell_486 c_main_~x~0.base) (= v_arrayElimCell_486 v_prenex_692) (bvsle (bvadd v_prenex_691 (_ bv4 32)) (select (store |c_#length| v_prenex_692 v_prenex_690) v_arrayElimCell_486))))) (or .cse0 (forall ((v_prenex_603 (_ BitVec 32)) (v_arrayElimCell_190 (_ BitVec 32)) (v_prenex_602 (_ BitVec 32)) (v_prenex_601 (_ BitVec 32)) (v_prenex_600 (_ BitVec 32))) (let ((.cse175 (select (store |c_#length| v_prenex_603 v_prenex_601) v_arrayElimCell_190))) (or (= v_arrayElimCell_190 v_prenex_603) (bvsle (bvadd v_prenex_600 (_ bv4 32)) .cse175) (bvsle (bvadd v_prenex_602 (_ bv4 32)) .cse175) (not (bvsle (_ bv0 32) v_prenex_602)))))) (= (bvadd (select |c_#length| |c_main_write~$Pointer$_#value.base|) (_ bv4294967280 32)) (_ bv0 32)) (or .cse0 .cse1 (forall ((v_prenex_727 (_ BitVec 32)) (v_prenex_726 (_ BitVec 32)) (v_prenex_725 (_ BitVec 32)) (v_prenex_724 (_ BitVec 32)) (v_arrayElimCell_649 (_ BitVec 32))) (let ((.cse176 (select (store |c_#length| v_prenex_727 v_prenex_726) v_arrayElimCell_649))) (or (= v_arrayElimCell_649 c_main_~x~0.base) (= v_arrayElimCell_649 v_prenex_727) (bvsle (bvadd v_prenex_724 (_ bv4 32)) .cse176) (bvsle (bvadd v_prenex_725 (_ bv4 32)) .cse176) (not (bvsle (_ bv0 32) v_prenex_724)))))) (or .cse0 .cse6 (forall ((v_prenex_648 (_ BitVec 32)) (v_prenex_647 (_ BitVec 32)) (v_prenex_646 (_ BitVec 32)) (v_prenex_645 (_ BitVec 32)) (v_arrayElimCell_407 (_ BitVec 32)) (v_prenex_644 (_ BitVec 32))) (let ((.cse181 (store |c_#length| v_prenex_647 v_prenex_646))) (let ((.cse177 (bvadd v_prenex_648 (_ bv4 32))) (.cse179 (select .cse181 v_prenex_644)) (.cse180 (bvadd v_prenex_645 (_ bv4 32))) (.cse178 (select .cse181 v_arrayElimCell_407))) (or (bvsle .cse177 .cse178) (bvsle .cse177 .cse179) (= v_arrayElimCell_407 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_648)) (= v_arrayElimCell_407 v_prenex_647) (= v_prenex_644 v_prenex_647) (bvsle .cse180 .cse179) (bvsle .cse180 .cse178)))))) (or .cse0 (forall ((v_prenex_272 (_ BitVec 32)) (v_arrayElimCell_423 (_ BitVec 32)) (v_prenex_271 (_ BitVec 32)) (v_prenex_270 (_ BitVec 32))) (or (= v_arrayElimCell_423 c_main_~x~0.base) (= v_arrayElimCell_423 v_prenex_270) (not (bvsle (_ bv0 32) v_prenex_271)) (bvsle (bvadd v_prenex_271 (_ bv4 32)) (select (store |c_#length| v_prenex_270 v_prenex_272) v_arrayElimCell_423)))) .cse6) .cse12 (or .cse0 (forall ((v_prenex_729 (_ BitVec 32)) (v_prenex_728 (_ BitVec 32)) (v_prenex_730 (_ BitVec 32)) (v_arrayElimCell_198 (_ BitVec 32))) (or (bvsle (bvadd v_prenex_728 (_ bv4 32)) (select (store |c_#length| v_prenex_730 v_prenex_729) v_arrayElimCell_198)) (= v_arrayElimCell_198 c_main_~x~0.base) (not (bvsle (_ bv0 32) v_prenex_728)) (= v_arrayElimCell_198 v_prenex_730))) .cse12) (or .cse3 .cse0 .cse6 (forall ((v_prenex_599 (_ BitVec 32)) (v_prenex_598 (_ BitVec 32)) (v_prenex_597 (_ BitVec 32)) (v_prenex_596 (_ BitVec 32)) (v_arrayElimCell_430 (_ BitVec 32))) (let ((.cse182 (select (store |c_#length| v_prenex_599 v_prenex_597) v_arrayElimCell_430))) (or (bvsle (bvadd v_prenex_598 (_ bv4 32)) .cse182) (bvsle (bvadd v_prenex_596 (_ bv4 32)) .cse182) (not (bvsle (_ bv0 32) v_prenex_598)) (= v_arrayElimCell_430 v_prenex_599) (= v_arrayElimCell_430 c_main_~x~0.base))))) (or .cse3 .cse0 (forall ((v_prenex_399 (_ BitVec 32)) (v_prenex_398 (_ BitVec 32)) (v_arrayElimCell_483 (_ BitVec 32)) (v_prenex_397 (_ BitVec 32))) (or (= v_arrayElimCell_483 c_main_~x~0.base) (bvsle (bvadd v_prenex_399 (_ bv4 32)) (select (store |c_#length| v_prenex_397 v_prenex_398) v_arrayElimCell_483)) (not (bvsle (_ bv0 32) v_prenex_399)) (= v_arrayElimCell_483 v_prenex_397)))) (or .cse0 (forall ((v_arrayElimCell_664 (_ BitVec 32)) (v_prenex_769 (_ BitVec 32)) (v_prenex_768 (_ BitVec 32)) (v_prenex_767 (_ BitVec 32)) (v_prenex_766 (_ BitVec 32))) (let ((.cse183 (select (store |c_#length| v_prenex_769 v_prenex_768) v_arrayElimCell_664))) (or (= v_arrayElimCell_664 c_main_~x~0.base) (= v_arrayElimCell_664 v_prenex_769) (bvsle (bvadd v_prenex_766 (_ bv4 32)) .cse183) (not (bvsle (_ bv0 32) v_prenex_766)) (bvsle (bvadd v_prenex_767 (_ bv4 32)) .cse183)))) .cse6) (= c_main_~x~0.offset (_ bv0 32))))) is different from true [2018-10-27 04:56:14,200 WARN L179 SmtUtils]: Spent 4.35 s on a formula simplification. DAG size of input: 3177 DAG size of output: 25 [2018-10-27 04:56:16,202 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:56:16,202 INFO L93 Difference]: Finished difference Result 289 states and 320 transitions. [2018-10-27 04:56:16,203 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-10-27 04:56:16,203 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 39 [2018-10-27 04:56:16,204 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:56:16,204 INFO L225 Difference]: With dead ends: 289 [2018-10-27 04:56:16,204 INFO L226 Difference]: Without dead ends: 289 [2018-10-27 04:56:16,205 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 130 SyntacticMatches, 5 SemanticMatches, 40 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 320 ImplicationChecksByTransitivity, 18.6s TimeCoverageRelationStatistics Valid=256, Invalid=1235, Unknown=3, NotChecked=228, Total=1722 [2018-10-27 04:56:16,205 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 289 states. [2018-10-27 04:56:16,207 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 289 to 218. [2018-10-27 04:56:16,207 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 218 states. [2018-10-27 04:56:16,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 218 states to 218 states and 242 transitions. [2018-10-27 04:56:16,208 INFO L78 Accepts]: Start accepts. Automaton has 218 states and 242 transitions. Word has length 39 [2018-10-27 04:56:16,208 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:56:16,208 INFO L481 AbstractCegarLoop]: Abstraction has 218 states and 242 transitions. [2018-10-27 04:56:16,208 INFO L482 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-10-27 04:56:16,208 INFO L276 IsEmpty]: Start isEmpty. Operand 218 states and 242 transitions. [2018-10-27 04:56:16,208 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-10-27 04:56:16,208 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:56:16,209 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:56:16,209 INFO L424 AbstractCegarLoop]: === Iteration 40 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:56:16,209 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:56:16,209 INFO L82 PathProgramCache]: Analyzing trace with hash -895077231, now seen corresponding path program 1 times [2018-10-27 04:56:16,209 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:56:16,209 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 42 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:56:16,247 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:56:16,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:56:16,356 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:56:16,374 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:56:16,376 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:56:16,376 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:16,382 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:16,397 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:56:16,401 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:56:16,401 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:16,405 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:16,417 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:16,417 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:34, output treesize:26 [2018-10-27 04:56:16,441 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-10-27 04:56:16,446 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:56:16,449 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-10-27 04:56:16,449 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:16,459 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:16,480 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-10-27 04:56:16,483 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:56:16,487 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-10-27 04:56:16,487 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:16,496 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:16,508 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:16,508 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:44, output treesize:18 [2018-10-27 04:56:16,546 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-10-27 04:56:16,550 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:56:16,553 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-10-27 04:56:16,554 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:16,563 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:16,587 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-10-27 04:56:16,590 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:56:16,594 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-10-27 04:56:16,594 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:16,603 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:16,619 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:16,619 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:44, output treesize:18 [2018-10-27 04:56:16,661 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:56:16,663 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-27 04:56:16,663 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:16,668 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:16,674 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:56:16,677 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-27 04:56:16,677 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:16,681 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:16,686 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:16,686 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:29, output treesize:7 [2018-10-27 04:56:16,708 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:56:16,708 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:56:16,975 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 22 [2018-10-27 04:56:16,978 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:56:16,978 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:16,998 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 25 [2018-10-27 04:56:17,024 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 12 [2018-10-27 04:56:17,024 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-10-27 04:56:17,042 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 9 [2018-10-27 04:56:17,042 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:17,056 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-10-27 04:56:17,056 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:17,067 INFO L267 ElimStorePlain]: Start of recursive call 4: 3 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:56:17,074 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:56:17,088 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 22 [2018-10-27 04:56:17,111 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:56:17,112 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:17,350 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 25 [2018-10-27 04:56:17,569 WARN L179 SmtUtils]: Spent 218.00 ms on a formula simplification that was a NOOP. DAG size: 23 [2018-10-27 04:56:17,582 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 13 [2018-10-27 04:56:17,582 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:17,773 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 3 [2018-10-27 04:56:17,774 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:17,838 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 12 [2018-10-27 04:56:17,838 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 2 xjuncts. [2018-10-27 04:56:17,848 INFO L267 ElimStorePlain]: Start of recursive call 10: 3 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:56:17,856 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:56:17,865 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-10-27 04:56:17,865 INFO L202 ElimStorePlain]: Needed 13 recursive calls to eliminate 4 variables, input treesize:41, output treesize:13 [2018-10-27 04:56:17,900 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:56:17,901 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:56:17,901 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/z3 Starting monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-27 04:56:17,913 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:56:17,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:56:17,942 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:56:17,982 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:56:17,995 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:56:17,996 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:18,004 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:18,019 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:56:18,023 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:56:18,023 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:18,030 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:18,041 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:18,041 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:31, output treesize:23 [2018-10-27 04:56:18,088 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-10-27 04:56:18,092 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:56:18,095 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-10-27 04:56:18,095 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:18,210 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:18,257 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-10-27 04:56:18,261 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:56:18,265 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-10-27 04:56:18,265 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:18,275 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:18,289 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:18,289 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:41, output treesize:15 [2018-10-27 04:56:18,345 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-10-27 04:56:18,349 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:56:18,352 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-10-27 04:56:18,352 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:18,362 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:18,382 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-10-27 04:56:18,386 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:56:18,389 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-10-27 04:56:18,390 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:18,399 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:18,413 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:18,413 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:41, output treesize:15 [2018-10-27 04:56:18,417 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:56:18,420 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-27 04:56:18,420 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:18,424 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:18,431 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:56:18,433 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-27 04:56:18,433 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:18,437 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:18,442 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:18,442 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:29, output treesize:7 [2018-10-27 04:56:18,446 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:56:18,446 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:56:18,479 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 22 [2018-10-27 04:56:18,482 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:56:18,482 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:18,502 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 25 [2018-10-27 04:56:18,529 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 9 [2018-10-27 04:56:18,529 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:18,548 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-10-27 04:56:18,548 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:18,568 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 12 [2018-10-27 04:56:18,569 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-10-27 04:56:18,578 INFO L267 ElimStorePlain]: Start of recursive call 4: 3 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:56:18,586 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:56:18,600 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 22 [2018-10-27 04:56:18,603 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:56:18,603 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:18,625 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 25 [2018-10-27 04:56:18,644 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 9 [2018-10-27 04:56:18,645 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:18,668 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 12 [2018-10-27 04:56:18,669 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 2 xjuncts. [2018-10-27 04:56:18,682 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-10-27 04:56:18,682 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:18,690 INFO L267 ElimStorePlain]: Start of recursive call 10: 3 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:56:18,698 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:56:18,707 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-10-27 04:56:18,708 INFO L202 ElimStorePlain]: Needed 13 recursive calls to eliminate 4 variables, input treesize:41, output treesize:13 [2018-10-27 04:56:18,716 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:56:18,733 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-10-27 04:56:18,733 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 9, 8] total 16 [2018-10-27 04:56:18,733 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-10-27 04:56:18,734 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-10-27 04:56:18,734 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=201, Unknown=0, NotChecked=0, Total=240 [2018-10-27 04:56:18,734 INFO L87 Difference]: Start difference. First operand 218 states and 242 transitions. Second operand 16 states. [2018-10-27 04:56:20,473 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:56:20,473 INFO L93 Difference]: Finished difference Result 262 states and 285 transitions. [2018-10-27 04:56:20,477 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-10-27 04:56:20,477 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 41 [2018-10-27 04:56:20,477 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:56:20,478 INFO L225 Difference]: With dead ends: 262 [2018-10-27 04:56:20,478 INFO L226 Difference]: Without dead ends: 262 [2018-10-27 04:56:20,478 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 146 SyntacticMatches, 2 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=120, Invalid=480, Unknown=0, NotChecked=0, Total=600 [2018-10-27 04:56:20,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 262 states. [2018-10-27 04:56:20,480 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 262 to 249. [2018-10-27 04:56:20,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 249 states. [2018-10-27 04:56:20,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 249 states to 249 states and 277 transitions. [2018-10-27 04:56:20,481 INFO L78 Accepts]: Start accepts. Automaton has 249 states and 277 transitions. Word has length 41 [2018-10-27 04:56:20,481 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:56:20,481 INFO L481 AbstractCegarLoop]: Abstraction has 249 states and 277 transitions. [2018-10-27 04:56:20,481 INFO L482 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-10-27 04:56:20,481 INFO L276 IsEmpty]: Start isEmpty. Operand 249 states and 277 transitions. [2018-10-27 04:56:20,482 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-10-27 04:56:20,482 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:56:20,482 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:56:20,482 INFO L424 AbstractCegarLoop]: === Iteration 41 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:56:20,482 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:56:20,483 INFO L82 PathProgramCache]: Analyzing trace with hash -1232492750, now seen corresponding path program 1 times [2018-10-27 04:56:20,483 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:56:20,483 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 44 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:56:20,534 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:56:20,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:56:20,831 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:56:20,853 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-10-27 04:56:20,873 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-10-27 04:56:20,873 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:20,901 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:20,925 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:20,925 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:11, output treesize:3 [2018-10-27 04:56:21,253 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:56:21,253 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:56:21,257 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:56:21,257 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-27 04:56:21,258 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-27 04:56:21,258 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-27 04:56:21,258 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-10-27 04:56:21,258 INFO L87 Difference]: Start difference. First operand 249 states and 277 transitions. Second operand 6 states. [2018-10-27 04:56:22,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:56:22,057 INFO L93 Difference]: Finished difference Result 248 states and 276 transitions. [2018-10-27 04:56:22,062 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-27 04:56:22,062 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 41 [2018-10-27 04:56:22,062 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:56:22,063 INFO L225 Difference]: With dead ends: 248 [2018-10-27 04:56:22,063 INFO L226 Difference]: Without dead ends: 248 [2018-10-27 04:56:22,063 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2018-10-27 04:56:22,063 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 248 states. [2018-10-27 04:56:22,065 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 248 to 248. [2018-10-27 04:56:22,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 248 states. [2018-10-27 04:56:22,066 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 248 states to 248 states and 276 transitions. [2018-10-27 04:56:22,066 INFO L78 Accepts]: Start accepts. Automaton has 248 states and 276 transitions. Word has length 41 [2018-10-27 04:56:22,066 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:56:22,066 INFO L481 AbstractCegarLoop]: Abstraction has 248 states and 276 transitions. [2018-10-27 04:56:22,066 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-27 04:56:22,067 INFO L276 IsEmpty]: Start isEmpty. Operand 248 states and 276 transitions. [2018-10-27 04:56:22,067 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-10-27 04:56:22,067 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:56:22,067 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:56:22,068 INFO L424 AbstractCegarLoop]: === Iteration 42 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:56:22,068 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:56:22,068 INFO L82 PathProgramCache]: Analyzing trace with hash -73627468, now seen corresponding path program 1 times [2018-10-27 04:56:22,068 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:56:22,068 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:56:22,089 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:56:22,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:56:22,251 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:56:22,267 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-10-27 04:56:22,273 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-10-27 04:56:22,273 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:22,277 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:22,283 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:22,283 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:17, output treesize:13 [2018-10-27 04:56:22,322 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:56:22,322 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:56:22,326 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:56:22,327 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-10-27 04:56:22,327 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-27 04:56:22,327 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-27 04:56:22,327 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:56:22,327 INFO L87 Difference]: Start difference. First operand 248 states and 276 transitions. Second operand 8 states. [2018-10-27 04:56:23,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:56:23,588 INFO L93 Difference]: Finished difference Result 352 states and 388 transitions. [2018-10-27 04:56:23,590 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-10-27 04:56:23,590 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 44 [2018-10-27 04:56:23,590 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:56:23,591 INFO L225 Difference]: With dead ends: 352 [2018-10-27 04:56:23,591 INFO L226 Difference]: Without dead ends: 352 [2018-10-27 04:56:23,591 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=96, Invalid=210, Unknown=0, NotChecked=0, Total=306 [2018-10-27 04:56:23,591 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 352 states. [2018-10-27 04:56:23,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 352 to 248. [2018-10-27 04:56:23,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 248 states. [2018-10-27 04:56:23,594 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 248 states to 248 states and 275 transitions. [2018-10-27 04:56:23,594 INFO L78 Accepts]: Start accepts. Automaton has 248 states and 275 transitions. Word has length 44 [2018-10-27 04:56:23,594 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:56:23,594 INFO L481 AbstractCegarLoop]: Abstraction has 248 states and 275 transitions. [2018-10-27 04:56:23,594 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-27 04:56:23,594 INFO L276 IsEmpty]: Start isEmpty. Operand 248 states and 275 transitions. [2018-10-27 04:56:23,595 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-10-27 04:56:23,595 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:56:23,595 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:56:23,595 INFO L424 AbstractCegarLoop]: === Iteration 43 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:56:23,596 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:56:23,596 INFO L82 PathProgramCache]: Analyzing trace with hash 2119239926, now seen corresponding path program 1 times [2018-10-27 04:56:23,596 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:56:23,596 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 46 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:56:23,623 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:56:23,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:56:23,964 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:56:23,968 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-10-27 04:56:23,971 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-10-27 04:56:23,971 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:23,977 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:23,979 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:23,979 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:11, output treesize:3 [2018-10-27 04:56:24,097 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:56:24,097 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:56:24,100 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:56:24,101 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-27 04:56:24,101 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-27 04:56:24,101 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-27 04:56:24,101 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:56:24,101 INFO L87 Difference]: Start difference. First operand 248 states and 275 transitions. Second operand 8 states. [2018-10-27 04:56:25,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:56:25,224 INFO L93 Difference]: Finished difference Result 264 states and 293 transitions. [2018-10-27 04:56:25,226 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-10-27 04:56:25,226 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 45 [2018-10-27 04:56:25,226 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:56:25,227 INFO L225 Difference]: With dead ends: 264 [2018-10-27 04:56:25,227 INFO L226 Difference]: Without dead ends: 264 [2018-10-27 04:56:25,227 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 40 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=53, Invalid=103, Unknown=0, NotChecked=0, Total=156 [2018-10-27 04:56:25,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 264 states. [2018-10-27 04:56:25,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 264 to 247. [2018-10-27 04:56:25,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 247 states. [2018-10-27 04:56:25,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 247 states to 247 states and 274 transitions. [2018-10-27 04:56:25,230 INFO L78 Accepts]: Start accepts. Automaton has 247 states and 274 transitions. Word has length 45 [2018-10-27 04:56:25,230 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:56:25,230 INFO L481 AbstractCegarLoop]: Abstraction has 247 states and 274 transitions. [2018-10-27 04:56:25,230 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-27 04:56:25,230 INFO L276 IsEmpty]: Start isEmpty. Operand 247 states and 274 transitions. [2018-10-27 04:56:25,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-10-27 04:56:25,231 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:56:25,231 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:56:25,231 INFO L424 AbstractCegarLoop]: === Iteration 44 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:56:25,231 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:56:25,231 INFO L82 PathProgramCache]: Analyzing trace with hash 1572123160, now seen corresponding path program 1 times [2018-10-27 04:56:25,232 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:56:25,232 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:56:25,255 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:56:25,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:56:25,447 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:56:25,456 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:56:25,456 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:25,462 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:25,462 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:56:25,473 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:56:25,477 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:56:25,477 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-27 04:56:25,478 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:25,491 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:25,491 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:22, output treesize:16 [2018-10-27 04:56:25,509 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-10-27 04:56:25,512 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-10-27 04:56:25,512 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:25,519 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:25,531 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:25,531 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:29, output treesize:22 [2018-10-27 04:56:25,573 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 28 [2018-10-27 04:56:25,576 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-10-27 04:56:25,576 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:25,585 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:25,595 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:25,595 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:37, output treesize:14 [2018-10-27 04:56:25,652 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 6 [2018-10-27 04:56:25,655 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-10-27 04:56:25,655 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:25,659 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:25,660 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:25,661 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:10, output treesize:1 [2018-10-27 04:56:25,688 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:56:25,688 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:56:25,692 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:56:25,692 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-10-27 04:56:25,692 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-10-27 04:56:25,692 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-10-27 04:56:25,693 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2018-10-27 04:56:25,693 INFO L87 Difference]: Start difference. First operand 247 states and 274 transitions. Second operand 11 states. [2018-10-27 04:56:28,012 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:56:28,012 INFO L93 Difference]: Finished difference Result 329 states and 361 transitions. [2018-10-27 04:56:28,013 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-10-27 04:56:28,013 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 46 [2018-10-27 04:56:28,013 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:56:28,014 INFO L225 Difference]: With dead ends: 329 [2018-10-27 04:56:28,014 INFO L226 Difference]: Without dead ends: 329 [2018-10-27 04:56:28,014 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 36 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 196 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=211, Invalid=659, Unknown=0, NotChecked=0, Total=870 [2018-10-27 04:56:28,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 329 states. [2018-10-27 04:56:28,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 329 to 247. [2018-10-27 04:56:28,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 247 states. [2018-10-27 04:56:28,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 247 states to 247 states and 273 transitions. [2018-10-27 04:56:28,017 INFO L78 Accepts]: Start accepts. Automaton has 247 states and 273 transitions. Word has length 46 [2018-10-27 04:56:28,018 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:56:28,018 INFO L481 AbstractCegarLoop]: Abstraction has 247 states and 273 transitions. [2018-10-27 04:56:28,018 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-10-27 04:56:28,018 INFO L276 IsEmpty]: Start isEmpty. Operand 247 states and 273 transitions. [2018-10-27 04:56:28,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-10-27 04:56:28,018 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:56:28,018 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:56:28,019 INFO L424 AbstractCegarLoop]: === Iteration 45 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:56:28,019 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:56:28,019 INFO L82 PathProgramCache]: Analyzing trace with hash 1271928381, now seen corresponding path program 1 times [2018-10-27 04:56:28,019 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:56:28,019 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 48 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:56:28,050 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:56:28,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:56:28,444 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:56:28,453 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-10-27 04:56:28,456 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-10-27 04:56:28,456 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:28,465 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:28,473 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-10-27 04:56:28,477 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-10-27 04:56:28,477 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:28,483 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:28,489 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:28,490 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:18, output treesize:3 [2018-10-27 04:56:28,505 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:56:28,507 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:56:28,507 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-10-27 04:56:28,507 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:28,524 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:28,524 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:25, output treesize:23 [2018-10-27 04:56:28,579 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:56:28,583 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:56:28,583 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:28,589 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:28,603 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:28,604 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:34, output treesize:31 [2018-10-27 04:56:28,665 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 35 [2018-10-27 04:56:28,669 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-27 04:56:28,669 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:28,679 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:28,691 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:28,691 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:46, output treesize:27 [2018-10-27 04:56:28,711 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-10-27 04:56:28,713 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-10-27 04:56:28,713 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:28,721 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:28,729 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:28,729 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:32, output treesize:17 [2018-10-27 04:56:28,748 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 10 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:56:28,748 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:56:30,916 WARN L179 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 19 [2018-10-27 04:56:31,018 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 35 [2018-10-27 04:56:31,429 WARN L179 SmtUtils]: Spent 410.00 ms on a formula simplification that was a NOOP. DAG size: 34 [2018-10-27 04:56:31,443 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:56:31,443 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:31,855 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-10-27 04:56:31,873 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:56:31,873 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:31,953 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:31,966 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 20 [2018-10-27 04:56:31,983 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 7 [2018-10-27 04:56:31,983 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:31,991 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:32,019 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-10-27 04:56:32,066 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 45 treesize of output 53 [2018-10-27 04:56:32,216 WARN L179 SmtUtils]: Spent 147.00 ms on a formula simplification that was a NOOP. DAG size: 68 [2018-10-27 04:56:32,219 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 31 [2018-10-27 04:56:32,219 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:32,223 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 31 [2018-10-27 04:56:32,223 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:32,229 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 34 [2018-10-27 04:56:32,229 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:32,234 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2018-10-27 04:56:32,234 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:32,464 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 28 [2018-10-27 04:56:32,464 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:32,472 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 33 [2018-10-27 04:56:32,472 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:32,480 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 32 [2018-10-27 04:56:32,480 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:32,693 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 36 [2018-10-27 04:56:32,696 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-10-27 04:56:32,696 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:32,732 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 15 [2018-10-27 04:56:32,732 INFO L267 ElimStorePlain]: Start of recursive call 18: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:32,749 INFO L267 ElimStorePlain]: Start of recursive call 16: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:32,763 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 29 treesize of output 31 [2018-10-27 04:56:32,767 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 17 [2018-10-27 04:56:32,768 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:32,799 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 14 [2018-10-27 04:56:32,800 INFO L267 ElimStorePlain]: Start of recursive call 21: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:32,824 INFO L267 ElimStorePlain]: Start of recursive call 19: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:56:32,838 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 33 [2018-10-27 04:56:32,843 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-10-27 04:56:32,843 INFO L267 ElimStorePlain]: Start of recursive call 23: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:32,873 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 14 [2018-10-27 04:56:32,873 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:32,895 INFO L267 ElimStorePlain]: Start of recursive call 22: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:56:33,036 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 26 [2018-10-27 04:56:33,041 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 12 [2018-10-27 04:56:33,042 INFO L267 ElimStorePlain]: Start of recursive call 26: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:33,055 INFO L267 ElimStorePlain]: Start of recursive call 25: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:33,058 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2018-10-27 04:56:33,063 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 9 [2018-10-27 04:56:33,063 INFO L267 ElimStorePlain]: Start of recursive call 28: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:33,076 INFO L267 ElimStorePlain]: Start of recursive call 27: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:33,198 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-10-27 04:56:33,225 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:56:33,226 INFO L267 ElimStorePlain]: Start of recursive call 30: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:33,248 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2018-10-27 04:56:33,248 INFO L267 ElimStorePlain]: Start of recursive call 31: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:33,261 INFO L267 ElimStorePlain]: Start of recursive call 29: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:33,266 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2018-10-27 04:56:33,270 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:56:33,270 INFO L267 ElimStorePlain]: Start of recursive call 33: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:33,284 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-10-27 04:56:33,284 INFO L267 ElimStorePlain]: Start of recursive call 34: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:33,298 INFO L267 ElimStorePlain]: Start of recursive call 32: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:33,395 INFO L267 ElimStorePlain]: Start of recursive call 8: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 8 dim-0 vars, and 9 xjuncts. [2018-10-27 04:56:33,448 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 75 treesize of output 67 [2018-10-27 04:56:33,806 WARN L179 SmtUtils]: Spent 356.00 ms on a formula simplification. DAG size of input: 73 DAG size of output: 70 [2018-10-27 04:56:33,811 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2018-10-27 04:56:33,811 INFO L267 ElimStorePlain]: Start of recursive call 36: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:33,816 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2018-10-27 04:56:33,816 INFO L267 ElimStorePlain]: Start of recursive call 37: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:33,821 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 31 [2018-10-27 04:56:33,821 INFO L267 ElimStorePlain]: Start of recursive call 38: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:33,828 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 33 [2018-10-27 04:56:33,828 INFO L267 ElimStorePlain]: Start of recursive call 39: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:34,126 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 33 treesize of output 43 [2018-10-27 04:56:34,126 INFO L267 ElimStorePlain]: Start of recursive call 40: End of recursive call: and 2 xjuncts. [2018-10-27 04:56:34,132 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 29 [2018-10-27 04:56:34,132 INFO L267 ElimStorePlain]: Start of recursive call 41: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:34,140 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 34 [2018-10-27 04:56:34,140 INFO L267 ElimStorePlain]: Start of recursive call 42: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:34,146 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2018-10-27 04:56:34,147 INFO L267 ElimStorePlain]: Start of recursive call 43: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:34,412 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 30 [2018-10-27 04:56:34,417 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 1 [2018-10-27 04:56:34,418 INFO L267 ElimStorePlain]: Start of recursive call 45: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:34,430 INFO L267 ElimStorePlain]: Start of recursive call 44: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:34,440 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 28 [2018-10-27 04:56:34,451 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 19 [2018-10-27 04:56:34,452 INFO L267 ElimStorePlain]: Start of recursive call 47: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:56:34,477 INFO L267 ElimStorePlain]: Start of recursive call 46: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:56:34,480 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 25 [2018-10-27 04:56:34,491 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 16 treesize of output 16 [2018-10-27 04:56:34,491 INFO L267 ElimStorePlain]: Start of recursive call 49: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:56:34,510 INFO L267 ElimStorePlain]: Start of recursive call 48: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:56:34,513 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2018-10-27 04:56:34,524 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 16 treesize of output 16 [2018-10-27 04:56:34,524 INFO L267 ElimStorePlain]: Start of recursive call 51: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:56:34,542 INFO L267 ElimStorePlain]: Start of recursive call 50: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:56:34,795 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2018-10-27 04:56:34,799 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:56:34,800 INFO L267 ElimStorePlain]: Start of recursive call 53: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:34,812 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-10-27 04:56:34,812 INFO L267 ElimStorePlain]: Start of recursive call 54: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:34,823 INFO L267 ElimStorePlain]: Start of recursive call 52: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:34,829 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-10-27 04:56:34,833 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:56:34,833 INFO L267 ElimStorePlain]: Start of recursive call 56: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:34,848 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2018-10-27 04:56:34,848 INFO L267 ElimStorePlain]: Start of recursive call 57: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:34,860 INFO L267 ElimStorePlain]: Start of recursive call 55: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:34,875 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 34 [2018-10-27 04:56:34,880 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2018-10-27 04:56:34,880 INFO L267 ElimStorePlain]: Start of recursive call 59: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:34,918 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:56:34,918 INFO L267 ElimStorePlain]: Start of recursive call 60: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:34,954 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:56:34,954 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 14 [2018-10-27 04:56:34,954 INFO L267 ElimStorePlain]: Start of recursive call 61: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:34,972 INFO L267 ElimStorePlain]: Start of recursive call 58: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:34,977 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 22 [2018-10-27 04:56:34,980 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:56:34,980 INFO L267 ElimStorePlain]: Start of recursive call 63: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:34,990 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-10-27 04:56:34,991 INFO L267 ElimStorePlain]: Start of recursive call 64: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:35,006 INFO L267 ElimStorePlain]: Start of recursive call 62: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:35,217 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 33 [2018-10-27 04:56:35,221 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-10-27 04:56:35,221 INFO L267 ElimStorePlain]: Start of recursive call 66: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:35,260 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 22 [2018-10-27 04:56:35,260 INFO L267 ElimStorePlain]: Start of recursive call 67: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:56:35,291 INFO L267 ElimStorePlain]: Start of recursive call 65: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-10-27 04:56:35,305 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 30 [2018-10-27 04:56:35,308 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2018-10-27 04:56:35,309 INFO L267 ElimStorePlain]: Start of recursive call 69: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:35,340 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 19 [2018-10-27 04:56:35,340 INFO L267 ElimStorePlain]: Start of recursive call 70: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:56:35,367 INFO L267 ElimStorePlain]: Start of recursive call 68: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-10-27 04:56:35,381 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 26 treesize of output 28 [2018-10-27 04:56:35,385 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2018-10-27 04:56:35,385 INFO L267 ElimStorePlain]: Start of recursive call 72: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:35,416 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 19 [2018-10-27 04:56:35,417 INFO L267 ElimStorePlain]: Start of recursive call 73: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:56:35,443 INFO L267 ElimStorePlain]: Start of recursive call 71: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-10-27 04:56:35,709 INFO L267 ElimStorePlain]: Start of recursive call 35: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 12 dim-0 vars, and 15 xjuncts. [2018-10-27 04:56:35,722 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 38 [2018-10-27 04:56:35,754 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:56:35,754 INFO L267 ElimStorePlain]: Start of recursive call 75: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:35,789 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2018-10-27 04:56:35,792 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:56:35,792 INFO L267 ElimStorePlain]: Start of recursive call 77: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:35,802 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-10-27 04:56:35,802 INFO L267 ElimStorePlain]: Start of recursive call 78: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:35,810 INFO L267 ElimStorePlain]: Start of recursive call 76: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:35,815 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 24 [2018-10-27 04:56:35,817 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:56:35,818 INFO L267 ElimStorePlain]: Start of recursive call 80: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:35,828 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:56:35,828 INFO L267 ElimStorePlain]: Start of recursive call 81: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:35,839 INFO L267 ElimStorePlain]: Start of recursive call 79: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:35,844 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2018-10-27 04:56:35,847 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:56:35,848 INFO L267 ElimStorePlain]: Start of recursive call 83: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:35,859 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-10-27 04:56:35,859 INFO L267 ElimStorePlain]: Start of recursive call 84: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:35,868 INFO L267 ElimStorePlain]: Start of recursive call 82: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:35,874 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-10-27 04:56:35,877 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:56:35,877 INFO L267 ElimStorePlain]: Start of recursive call 86: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:35,891 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:56:35,891 INFO L267 ElimStorePlain]: Start of recursive call 87: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:35,900 INFO L267 ElimStorePlain]: Start of recursive call 85: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:35,931 INFO L267 ElimStorePlain]: Start of recursive call 74: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 4 xjuncts. [2018-10-27 04:56:36,469 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 31 dim-0 vars, and 28 xjuncts. [2018-10-27 04:56:36,469 INFO L202 ElimStorePlain]: Needed 87 recursive calls to eliminate 3 variables, input treesize:57, output treesize:382 [2018-10-27 04:56:36,647 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:56:36,649 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:56:36,650 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 10 [2018-10-27 04:56:36,650 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:36,660 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:36,661 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:21, output treesize:3 [2018-10-27 04:56:36,669 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 10 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:56:36,672 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:56:36,672 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/z3 Starting monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-27 04:56:36,680 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:56:36,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:56:36,732 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:56:36,737 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:56:36,739 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:56:36,739 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-10-27 04:56:36,740 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:36,762 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:36,763 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:25, output treesize:23 [2018-10-27 04:56:36,771 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:56:36,774 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:56:36,774 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:36,781 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:36,797 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:36,797 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:34, output treesize:31 [2018-10-27 04:56:36,832 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 35 [2018-10-27 04:56:36,835 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-27 04:56:36,835 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:36,847 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:36,858 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:36,858 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:46, output treesize:27 [2018-10-27 04:56:36,863 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-10-27 04:56:36,866 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-10-27 04:56:36,866 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:36,872 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:36,879 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:36,879 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:32, output treesize:17 [2018-10-27 04:56:36,882 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 10 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:56:36,882 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:56:36,981 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 38 [2018-10-27 04:56:37,012 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:56:37,013 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:37,047 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2018-10-27 04:56:37,050 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:56:37,051 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:37,063 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:56:37,063 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:37,072 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:37,078 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2018-10-27 04:56:37,081 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:56:37,081 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:37,093 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-10-27 04:56:37,093 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:37,102 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:37,107 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2018-10-27 04:56:37,110 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:56:37,110 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:37,120 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-10-27 04:56:37,120 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:37,127 INFO L267 ElimStorePlain]: Start of recursive call 10: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:37,132 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 24 [2018-10-27 04:56:37,135 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:56:37,135 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:37,145 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:56:37,145 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:37,152 INFO L267 ElimStorePlain]: Start of recursive call 13: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:37,183 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 4 xjuncts. [2018-10-27 04:56:37,192 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 37 [2018-10-27 04:56:37,225 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:56:37,225 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:37,257 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 20 [2018-10-27 04:56:37,260 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 7 [2018-10-27 04:56:37,260 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:37,269 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:37,272 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-10-27 04:56:37,275 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:56:37,275 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:37,285 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:37,310 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-10-27 04:56:37,355 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 45 treesize of output 53 [2018-10-27 04:56:37,496 WARN L179 SmtUtils]: Spent 139.00 ms on a formula simplification that was a NOOP. DAG size: 69 [2018-10-27 04:56:37,499 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 29 [2018-10-27 04:56:37,500 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:37,505 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 33 [2018-10-27 04:56:37,505 INFO L267 ElimStorePlain]: Start of recursive call 24: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:37,511 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 34 [2018-10-27 04:56:37,512 INFO L267 ElimStorePlain]: Start of recursive call 25: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:37,517 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 33 [2018-10-27 04:56:37,517 INFO L267 ElimStorePlain]: Start of recursive call 26: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:37,732 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 34 [2018-10-27 04:56:37,732 INFO L267 ElimStorePlain]: Start of recursive call 27: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:37,738 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 30 [2018-10-27 04:56:37,738 INFO L267 ElimStorePlain]: Start of recursive call 28: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:37,746 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 35 [2018-10-27 04:56:37,746 INFO L267 ElimStorePlain]: Start of recursive call 29: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:37,970 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 28 [2018-10-27 04:56:37,976 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 14 [2018-10-27 04:56:37,976 INFO L267 ElimStorePlain]: Start of recursive call 31: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:38,000 INFO L267 ElimStorePlain]: Start of recursive call 30: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:38,003 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 26 [2018-10-27 04:56:38,008 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2018-10-27 04:56:38,009 INFO L267 ElimStorePlain]: Start of recursive call 33: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:38,022 INFO L267 ElimStorePlain]: Start of recursive call 32: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:38,026 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 31 [2018-10-27 04:56:38,064 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 3 [2018-10-27 04:56:38,064 INFO L267 ElimStorePlain]: Start of recursive call 35: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:38,078 INFO L267 ElimStorePlain]: Start of recursive call 34: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:38,257 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 29 treesize of output 31 [2018-10-27 04:56:38,262 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 14 [2018-10-27 04:56:38,263 INFO L267 ElimStorePlain]: Start of recursive call 37: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:38,289 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 17 [2018-10-27 04:56:38,289 INFO L267 ElimStorePlain]: Start of recursive call 38: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:38,314 INFO L267 ElimStorePlain]: Start of recursive call 36: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:56:38,331 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 36 [2018-10-27 04:56:38,337 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 15 [2018-10-27 04:56:38,337 INFO L267 ElimStorePlain]: Start of recursive call 40: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:38,361 INFO L267 ElimStorePlain]: Start of recursive call 39: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:38,376 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 33 [2018-10-27 04:56:38,382 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 14 [2018-10-27 04:56:38,382 INFO L267 ElimStorePlain]: Start of recursive call 42: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:38,406 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-10-27 04:56:38,406 INFO L267 ElimStorePlain]: Start of recursive call 43: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:38,428 INFO L267 ElimStorePlain]: Start of recursive call 41: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:56:38,555 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 25 [2018-10-27 04:56:38,560 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:56:38,560 INFO L267 ElimStorePlain]: Start of recursive call 45: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:38,575 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-10-27 04:56:38,575 INFO L267 ElimStorePlain]: Start of recursive call 46: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:38,589 INFO L267 ElimStorePlain]: Start of recursive call 44: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:38,595 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-10-27 04:56:38,600 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:56:38,600 INFO L267 ElimStorePlain]: Start of recursive call 48: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:38,615 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:56:38,615 INFO L267 ElimStorePlain]: Start of recursive call 49: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:38,628 INFO L267 ElimStorePlain]: Start of recursive call 47: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:38,729 INFO L267 ElimStorePlain]: Start of recursive call 22: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 8 dim-0 vars, and 9 xjuncts. [2018-10-27 04:56:38,789 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 77 treesize of output 69 [2018-10-27 04:56:39,143 WARN L179 SmtUtils]: Spent 351.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 71 [2018-10-27 04:56:39,148 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 29 [2018-10-27 04:56:39,148 INFO L267 ElimStorePlain]: Start of recursive call 51: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:39,154 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 34 [2018-10-27 04:56:39,154 INFO L267 ElimStorePlain]: Start of recursive call 52: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:39,160 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2018-10-27 04:56:39,160 INFO L267 ElimStorePlain]: Start of recursive call 53: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:39,182 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 33 treesize of output 43 [2018-10-27 04:56:39,182 INFO L267 ElimStorePlain]: Start of recursive call 54: End of recursive call: and 2 xjuncts. [2018-10-27 04:56:39,480 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 28 [2018-10-27 04:56:39,480 INFO L267 ElimStorePlain]: Start of recursive call 55: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:39,486 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 33 [2018-10-27 04:56:39,487 INFO L267 ElimStorePlain]: Start of recursive call 56: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:39,493 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 33 [2018-10-27 04:56:39,494 INFO L267 ElimStorePlain]: Start of recursive call 57: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:39,500 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2018-10-27 04:56:39,500 INFO L267 ElimStorePlain]: Start of recursive call 58: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:39,760 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2018-10-27 04:56:39,764 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:56:39,764 INFO L267 ElimStorePlain]: Start of recursive call 60: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:39,776 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-10-27 04:56:39,777 INFO L267 ElimStorePlain]: Start of recursive call 61: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:39,788 INFO L267 ElimStorePlain]: Start of recursive call 59: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:39,794 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 22 [2018-10-27 04:56:39,798 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:56:39,799 INFO L267 ElimStorePlain]: Start of recursive call 63: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:39,811 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-10-27 04:56:39,812 INFO L267 ElimStorePlain]: Start of recursive call 64: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:39,965 INFO L267 ElimStorePlain]: Start of recursive call 62: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:39,997 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2018-10-27 04:56:40,001 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:56:40,001 INFO L267 ElimStorePlain]: Start of recursive call 66: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:40,017 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:56:40,017 INFO L267 ElimStorePlain]: Start of recursive call 67: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:40,030 INFO L267 ElimStorePlain]: Start of recursive call 65: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:40,035 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-10-27 04:56:40,041 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:56:40,042 INFO L267 ElimStorePlain]: Start of recursive call 69: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:40,059 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:56:40,059 INFO L267 ElimStorePlain]: Start of recursive call 70: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:40,071 INFO L267 ElimStorePlain]: Start of recursive call 68: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:40,292 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 30 [2018-10-27 04:56:40,303 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 21 [2018-10-27 04:56:40,304 INFO L267 ElimStorePlain]: Start of recursive call 72: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:56:40,331 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2018-10-27 04:56:40,331 INFO L267 ElimStorePlain]: Start of recursive call 73: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:40,358 INFO L267 ElimStorePlain]: Start of recursive call 71: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-10-27 04:56:40,373 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 26 treesize of output 28 [2018-10-27 04:56:40,384 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 19 [2018-10-27 04:56:40,384 INFO L267 ElimStorePlain]: Start of recursive call 75: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:56:40,414 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2018-10-27 04:56:40,415 INFO L267 ElimStorePlain]: Start of recursive call 76: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:40,442 INFO L267 ElimStorePlain]: Start of recursive call 74: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-10-27 04:56:40,457 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 35 [2018-10-27 04:56:40,460 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:56:40,461 INFO L267 ElimStorePlain]: Start of recursive call 78: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:40,497 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:56:40,497 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 14 [2018-10-27 04:56:40,498 INFO L267 ElimStorePlain]: Start of recursive call 79: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:40,516 INFO L267 ElimStorePlain]: Start of recursive call 77: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:40,530 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 33 [2018-10-27 04:56:40,533 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-10-27 04:56:40,533 INFO L267 ElimStorePlain]: Start of recursive call 81: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:56:40,571 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 22 [2018-10-27 04:56:40,572 INFO L267 ElimStorePlain]: Start of recursive call 82: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:56:40,600 INFO L267 ElimStorePlain]: Start of recursive call 80: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-10-27 04:56:40,818 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 25 [2018-10-27 04:56:40,829 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 16 treesize of output 16 [2018-10-27 04:56:40,830 INFO L267 ElimStorePlain]: Start of recursive call 84: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:56:40,848 INFO L267 ElimStorePlain]: Start of recursive call 83: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:56:40,851 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2018-10-27 04:56:40,861 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 16 treesize of output 16 [2018-10-27 04:56:40,861 INFO L267 ElimStorePlain]: Start of recursive call 86: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:56:40,878 INFO L267 ElimStorePlain]: Start of recursive call 85: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:56:40,882 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 28 [2018-10-27 04:56:40,892 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 19 [2018-10-27 04:56:40,893 INFO L267 ElimStorePlain]: Start of recursive call 88: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:56:40,917 INFO L267 ElimStorePlain]: Start of recursive call 87: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:56:41,113 INFO L267 ElimStorePlain]: Start of recursive call 50: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: 12 dim-0 vars, and 15 xjuncts. [2018-10-27 04:56:41,637 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 31 dim-0 vars, and 28 xjuncts. [2018-10-27 04:56:41,637 INFO L202 ElimStorePlain]: Needed 88 recursive calls to eliminate 3 variables, input treesize:57, output treesize:402 [2018-10-27 04:56:41,713 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:56:41,715 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:56:41,716 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 10 [2018-10-27 04:56:41,716 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:41,728 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:41,728 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:21, output treesize:3 [2018-10-27 04:56:41,736 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 10 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:56:41,754 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-10-27 04:56:41,754 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8] total 14 [2018-10-27 04:56:41,755 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-10-27 04:56:41,755 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-10-27 04:56:41,755 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=164, Unknown=0, NotChecked=0, Total=210 [2018-10-27 04:56:41,755 INFO L87 Difference]: Start difference. First operand 247 states and 273 transitions. Second operand 15 states. [2018-10-27 04:56:44,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:56:44,724 INFO L93 Difference]: Finished difference Result 340 states and 376 transitions. [2018-10-27 04:56:44,726 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-10-27 04:56:44,726 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 46 [2018-10-27 04:56:44,726 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:56:44,727 INFO L225 Difference]: With dead ends: 340 [2018-10-27 04:56:44,727 INFO L226 Difference]: Without dead ends: 340 [2018-10-27 04:56:44,727 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 170 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 79 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=113, Invalid=307, Unknown=0, NotChecked=0, Total=420 [2018-10-27 04:56:44,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 340 states. [2018-10-27 04:56:44,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 340 to 246. [2018-10-27 04:56:44,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 246 states. [2018-10-27 04:56:44,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 246 states to 246 states and 272 transitions. [2018-10-27 04:56:44,730 INFO L78 Accepts]: Start accepts. Automaton has 246 states and 272 transitions. Word has length 46 [2018-10-27 04:56:44,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:56:44,731 INFO L481 AbstractCegarLoop]: Abstraction has 246 states and 272 transitions. [2018-10-27 04:56:44,731 INFO L482 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-10-27 04:56:44,731 INFO L276 IsEmpty]: Start isEmpty. Operand 246 states and 272 transitions. [2018-10-27 04:56:44,731 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-10-27 04:56:44,731 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:56:44,731 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:56:44,732 INFO L424 AbstractCegarLoop]: === Iteration 46 === [mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr68ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr67ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:56:44,732 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:56:44,732 INFO L82 PathProgramCache]: Analyzing trace with hash 311917698, now seen corresponding path program 1 times [2018-10-27 04:56:44,732 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:56:44,732 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_56f3eec6-fdf8-442f-b799-7873109f8119/bin-2019/utaipan/cvc4nyu Starting monitored process 50 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:56:44,772 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:56:44,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:56:44,992 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:56:44,996 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:56:44,996 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:45,016 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:45,016 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:22, output treesize:21 [2018-10-27 04:56:45,218 WARN L179 SmtUtils]: Spent 191.00 ms on a formula simplification that was a NOOP. DAG size: 19 [2018-10-27 04:56:45,262 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:56:45,278 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:56:45,278 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:45,314 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:45,369 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:56:45,372 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:56:45,372 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:45,379 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:45,390 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:45,390 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:39, output treesize:31 [2018-10-27 04:56:45,415 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-10-27 04:56:45,420 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:56:45,423 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-10-27 04:56:45,424 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:45,435 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:45,457 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-10-27 04:56:45,460 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:56:45,464 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-10-27 04:56:45,464 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:45,474 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:45,488 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:45,488 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:49, output treesize:23 [2018-10-27 04:56:45,506 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:56:45,508 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:56:45,508 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-27 04:56:45,508 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:45,527 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:45,527 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:36, output treesize:30 [2018-10-27 04:56:45,560 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-10-27 04:56:45,565 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:56:45,569 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 25 [2018-10-27 04:56:45,570 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:45,583 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:45,614 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-10-27 04:56:45,618 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:56:45,621 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 25 [2018-10-27 04:56:45,622 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:45,630 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:45,654 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:45,654 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:56, output treesize:40 [2018-10-27 04:56:45,722 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 32 [2018-10-27 04:56:45,725 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-10-27 04:56:45,725 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:45,738 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:45,766 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 48 [2018-10-27 04:56:45,769 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-10-27 04:56:45,769 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:45,782 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:45,801 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:45,801 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:74, output treesize:28 [2018-10-27 04:56:45,897 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:56:45,900 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-27 04:56:45,900 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:45,907 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:45,917 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-10-27 04:56:45,921 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 8 [2018-10-27 04:56:45,921 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:45,928 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:45,933 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:45,933 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:37, output treesize:7 [2018-10-27 04:56:45,964 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:56:45,964 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:56:49,152 WARN L179 SmtUtils]: Spent 213.00 ms on a formula simplification that was a NOOP. DAG size: 45 [2018-10-27 04:56:51,165 WARN L832 $PredicateComparison]: unable to prove that (and (forall ((|main_write~$Pointer$_#value.base| (_ BitVec 32)) (v_subst_14 (_ BitVec 32)) (v_subst_12 (_ BitVec 32)) (|v_main_#Ultimate.alloc_#res.base_13| (_ BitVec 32))) (or (not (= (_ bv0 1) (select |c_#valid| |v_main_#Ultimate.alloc_#res.base_13|))) (= (select (select (let ((.cse0 (let ((.cse1 (store |c_main_write~$Pointer$_old_#memory_$Pointer$.base| |c_main_write~$Pointer$_#ptr.base| (store (select |c_main_write~$Pointer$_old_#memory_$Pointer$.base| |c_main_write~$Pointer$_#ptr.base|) |c_main_write~$Pointer$_#ptr.offset| |main_write~$Pointer$_#value.base|)))) (store .cse1 c_main_~head~0.base (store (select .cse1 c_main_~head~0.base) (bvadd c_main_~head~0.offset (_ bv8 32)) |v_main_#Ultimate.alloc_#res.base_13|))))) (store .cse0 |v_main_#Ultimate.alloc_#res.base_13| (store (select .cse0 |v_main_#Ultimate.alloc_#res.base_13|) v_subst_12 v_subst_14))) c_main_~head~0.base) c_main_~head~0.offset) (_ bv0 32)))) (forall ((v_prenex_829 (_ BitVec 32)) (|main_write~$Pointer$_#value.offset| (_ BitVec 32)) (v_subst_15 (_ BitVec 32)) (v_prenex_830 (_ BitVec 32)) (v_subst_13 (_ BitVec 32))) (or (= (select (select (let ((.cse2 (let ((.cse3 (store |c_main_write~$Pointer$_old_#memory_$Pointer$.offset| |c_main_write~$Pointer$_#ptr.base| (store (select |c_main_write~$Pointer$_old_#memory_$Pointer$.offset| |c_main_write~$Pointer$_#ptr.base|) |c_main_write~$Pointer$_#ptr.offset| |main_write~$Pointer$_#value.offset|)))) (store .cse3 c_main_~head~0.base (store (select .cse3 c_main_~head~0.base) (bvadd c_main_~head~0.offset (_ bv8 32)) v_subst_15))))) (store .cse2 v_prenex_830 (store (select .cse2 v_prenex_830) v_prenex_829 v_subst_13))) c_main_~head~0.base) c_main_~head~0.offset) (_ bv0 32)) (not (= (_ bv0 1) (select |c_#valid| v_prenex_830)))))) is different from false [2018-10-27 04:56:51,195 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 61 [2018-10-27 04:56:51,269 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:56:51,270 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:51,427 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 7 case distinctions, treesize of input 39 treesize of output 74 [2018-10-27 04:56:53,019 WARN L179 SmtUtils]: Spent 1.59 s on a formula simplification. DAG size of input: 169 DAG size of output: 154 [2018-10-27 04:56:53,028 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 41 [2018-10-27 04:56:53,033 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:56:53,038 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 28 [2018-10-27 04:56:53,038 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:53,070 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:56:54,436 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 4 case distinctions, treesize of input 39 treesize of output 63 [2018-10-27 04:56:54,493 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 51 treesize of output 61 [2018-10-27 04:56:54,495 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 8 xjuncts. [2018-10-27 04:56:54,929 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:56:55,087 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 44 treesize of output 61 [2018-10-27 04:56:55,088 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-10-27 04:56:55,099 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:56:55,191 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 41 treesize of output 58 [2018-10-27 04:56:55,192 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 2 xjuncts. [2018-10-27 04:56:55,202 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:56:55,346 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 43 treesize of output 60 [2018-10-27 04:56:55,346 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 2 xjuncts. [2018-10-27 04:56:55,359 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:56:55,453 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 43 treesize of output 60 [2018-10-27 04:56:55,453 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 2 xjuncts. [2018-10-27 04:56:56,047 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 49 treesize of output 49 [2018-10-27 04:56:56,048 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 2 xjuncts. [2018-10-27 04:56:56,659 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:56:56,916 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 41 treesize of output 58 [2018-10-27 04:56:56,917 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 2 xjuncts. [2018-10-27 04:56:56,928 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:56:57,028 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 41 treesize of output 58 [2018-10-27 04:56:57,029 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 2 xjuncts. [2018-10-27 04:56:57,516 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:56:57,521 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 59 [2018-10-27 04:56:57,522 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:57,829 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:56:57,834 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 44 [2018-10-27 04:56:57,834 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:58,222 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:56:58,253 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 52 treesize of output 57 [2018-10-27 04:56:58,254 INFO L267 ElimStorePlain]: Start of recursive call 18: End of recursive call: and 4 xjuncts. [2018-10-27 04:56:58,602 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:56:58,607 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 46 [2018-10-27 04:56:58,607 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-10-27 04:56:59,031 INFO L267 ElimStorePlain]: Start of recursive call 7: 8 dim-1 vars, End of recursive call: and 9 xjuncts. [2018-10-27 04:57:00,895 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 46 [2018-10-27 04:57:00,900 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:57:00,911 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 28 [2018-10-27 04:57:00,911 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-10-27 04:57:00,960 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 12 [2018-10-27 04:57:00,960 INFO L267 ElimStorePlain]: Start of recursive call 22: End of recursive call: and 2 xjuncts. [2018-10-27 04:57:00,994 INFO L267 ElimStorePlain]: Start of recursive call 20: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:57:02,976 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 37 treesize of output 47 [2018-10-27 04:57:02,981 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:57:02,985 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 48 [2018-10-27 04:57:02,986 INFO L267 ElimStorePlain]: Start of recursive call 24: End of recursive call: and 1 xjuncts. [2018-10-27 04:57:03,074 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:57:03,275 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 40 treesize of output 57 [2018-10-27 04:57:03,276 INFO L267 ElimStorePlain]: Start of recursive call 25: End of recursive call: and 2 xjuncts. [2018-10-27 04:57:03,401 INFO L267 ElimStorePlain]: Start of recursive call 23: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:57:05,645 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2018-10-27 04:57:05,659 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:57:05,660 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:57:05,663 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:57:05,702 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 4 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 28 treesize of output 49 [2018-10-27 04:57:05,703 INFO L267 ElimStorePlain]: Start of recursive call 27: End of recursive call: and 8 xjuncts. [2018-10-27 04:57:05,793 INFO L267 ElimStorePlain]: Start of recursive call 26: 1 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-10-27 04:57:05,797 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 35 [2018-10-27 04:57:05,802 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:57:05,803 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:57:05,806 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:57:05,817 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-10-27 04:57:05,817 INFO L267 ElimStorePlain]: Start of recursive call 29: End of recursive call: and 1 xjuncts. [2018-10-27 04:57:05,833 INFO L267 ElimStorePlain]: Start of recursive call 28: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:57:05,838 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 35 [2018-10-27 04:57:05,842 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:57:05,845 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:57:05,846 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:57:05,857 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-10-27 04:57:05,858 INFO L267 ElimStorePlain]: Start of recursive call 31: End of recursive call: and 1 xjuncts. [2018-10-27 04:57:05,874 INFO L267 ElimStorePlain]: Start of recursive call 30: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:57:07,727 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 33 [2018-10-27 04:57:07,731 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:57:07,731 INFO L267 ElimStorePlain]: Start of recursive call 33: End of recursive call: and 1 xjuncts. [2018-10-27 04:57:07,758 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:57:07,763 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 7 [2018-10-27 04:57:07,764 INFO L267 ElimStorePlain]: Start of recursive call 34: End of recursive call: and 1 xjuncts. [2018-10-27 04:57:07,776 INFO L267 ElimStorePlain]: Start of recursive call 32: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:57:07,784 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 33 [2018-10-27 04:57:07,788 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:57:07,788 INFO L267 ElimStorePlain]: Start of recursive call 36: End of recursive call: and 1 xjuncts. [2018-10-27 04:57:07,815 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:57:07,820 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 7 [2018-10-27 04:57:07,820 INFO L267 ElimStorePlain]: Start of recursive call 37: End of recursive call: and 1 xjuncts. [2018-10-27 04:57:07,831 INFO L267 ElimStorePlain]: Start of recursive call 35: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:57:09,288 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 39 [2018-10-27 04:57:09,301 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:57:09,303 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:57:09,306 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:57:09,346 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 4 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 31 treesize of output 52 [2018-10-27 04:57:09,347 INFO L267 ElimStorePlain]: Start of recursive call 39: End of recursive call: and 8 xjuncts. [2018-10-27 04:57:09,483 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 28 [2018-10-27 04:57:09,483 INFO L267 ElimStorePlain]: Start of recursive call 40: End of recursive call: and 1 xjuncts. [2018-10-27 04:57:09,587 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:57:09,588 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:57:09,591 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:57:09,601 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2018-10-27 04:57:09,602 INFO L267 ElimStorePlain]: Start of recursive call 41: End of recursive call: and 1 xjuncts. [2018-10-27 04:57:09,673 INFO L267 ElimStorePlain]: Start of recursive call 38: 3 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-10-27 04:57:10,792 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 32 [2018-10-27 04:57:11,058 WARN L522 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 50 cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:57:11,058 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: var is still there: v_arrayElimCell_938 term size 24 at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:221) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.elimAllRec(ElimStorePlain.java:199) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.elim(PartialQuantifierElimination.java:293) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.tryToEliminate(PartialQuantifierElimination.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer$QuantifierEliminationPostprocessor.postprocess(IterativePredicateTransformer.java:245) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:439) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:418) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:290) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:330) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:175) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:162) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructForwardBackward(TraceCheckConstructor.java:224) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructTraceCheck(TraceCheckConstructor.java:188) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:165) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.MultiTrackRefinementStrategy.getTraceCheck(MultiTrackRefinementStrategy.java:234) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:223) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:197) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:70) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:429) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:435) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:376) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:312) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:123) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:316) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-10-27 04:57:11,062 INFO L168 Benchmark]: Toolchain (without parser) took 556611.38 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 185.1 MB). Free memory was 947.8 MB in the beginning and 1.1 GB in the end (delta: -189.8 MB). Peak memory consumption was 319.0 MB. Max. memory is 11.5 GB. [2018-10-27 04:57:11,062 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-10-27 04:57:11,063 INFO L168 Benchmark]: CACSL2BoogieTranslator took 471.07 ms. Allocated memory is still 1.0 GB. Free memory was 947.8 MB in the beginning and 926.4 MB in the end (delta: 21.5 MB). Peak memory consumption was 21.5 MB. Max. memory is 11.5 GB. [2018-10-27 04:57:11,063 INFO L168 Benchmark]: Boogie Procedure Inliner took 65.79 ms. Allocated memory is still 1.0 GB. Free memory was 926.4 MB in the beginning and 921.0 MB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2018-10-27 04:57:11,063 INFO L168 Benchmark]: Boogie Preprocessor took 135.75 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 170.9 MB). Free memory was 921.0 MB in the beginning and 1.2 GB in the end (delta: -236.0 MB). Peak memory consumption was 20.0 MB. Max. memory is 11.5 GB. [2018-10-27 04:57:11,063 INFO L168 Benchmark]: RCFGBuilder took 1562.56 ms. Allocated memory is still 1.2 GB. Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 65.7 MB). Peak memory consumption was 65.7 MB. Max. memory is 11.5 GB. [2018-10-27 04:57:11,063 INFO L168 Benchmark]: TraceAbstraction took 554372.13 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 14.2 MB). Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: -46.3 MB). Peak memory consumption was 291.5 MB. Max. memory is 11.5 GB. [2018-10-27 04:57:11,065 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 471.07 ms. Allocated memory is still 1.0 GB. Free memory was 947.8 MB in the beginning and 926.4 MB in the end (delta: 21.5 MB). Peak memory consumption was 21.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 65.79 ms. Allocated memory is still 1.0 GB. Free memory was 926.4 MB in the beginning and 921.0 MB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 135.75 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 170.9 MB). Free memory was 921.0 MB in the beginning and 1.2 GB in the end (delta: -236.0 MB). Peak memory consumption was 20.0 MB. Max. memory is 11.5 GB. * RCFGBuilder took 1562.56 ms. Allocated memory is still 1.2 GB. Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 65.7 MB). Peak memory consumption was 65.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 554372.13 ms. Allocated memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 14.2 MB). Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: -46.3 MB). Peak memory consumption was 291.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: AssertionError: var is still there: v_arrayElimCell_938 term size 24 de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: var is still there: v_arrayElimCell_938 term size 24: de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request...