./Ultimate.py --spec ../../sv-benchmarks/c/MemSafety.prp --file ../../sv-benchmarks/c/forester-heap/dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 1dbac8bc Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/config/TaipanMemDerefMemtrack.xml -i ../../sv-benchmarks/c/forester-heap/dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i -s /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash b9633ec6dc7e01a7231c1be5ed310faef61ba6b0 ......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/config/TaipanMemDerefMemtrack.xml -i ../../sv-benchmarks/c/forester-heap/dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i -s /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash b9633ec6dc7e01a7231c1be5ed310faef61ba6b0 ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Result: UNKNOWN: Overapproximated counterexample --- Real Ultimate output --- This is Ultimate 0.1.23-1dbac8b [2018-10-27 04:46:28,864 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-10-27 04:46:28,865 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-10-27 04:46:28,874 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-10-27 04:46:28,874 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-10-27 04:46:28,875 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-10-27 04:46:28,876 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-10-27 04:46:28,877 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-10-27 04:46:28,878 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-10-27 04:46:28,878 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-10-27 04:46:28,879 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-10-27 04:46:28,879 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-10-27 04:46:28,880 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-10-27 04:46:28,880 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-10-27 04:46:28,881 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-10-27 04:46:28,882 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-10-27 04:46:28,882 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-10-27 04:46:28,883 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-10-27 04:46:28,884 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-10-27 04:46:28,885 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-10-27 04:46:28,886 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-10-27 04:46:28,887 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-10-27 04:46:28,889 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-10-27 04:46:28,889 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-10-27 04:46:28,890 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-10-27 04:46:28,890 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-10-27 04:46:28,891 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-10-27 04:46:28,891 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-10-27 04:46:28,892 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-10-27 04:46:28,893 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-10-27 04:46:28,893 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-10-27 04:46:28,893 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-10-27 04:46:28,893 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-10-27 04:46:28,893 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-10-27 04:46:28,894 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-10-27 04:46:28,895 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-10-27 04:46:28,895 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Default.epf [2018-10-27 04:46:28,911 INFO L110 SettingsManager]: Loading preferences was successful [2018-10-27 04:46:28,913 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-10-27 04:46:28,914 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-10-27 04:46:28,915 INFO L133 SettingsManager]: * User list type=DISABLED [2018-10-27 04:46:28,915 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-10-27 04:46:28,915 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-10-27 04:46:28,915 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-10-27 04:46:28,916 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-10-27 04:46:28,916 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-10-27 04:46:28,916 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-10-27 04:46:28,916 INFO L133 SettingsManager]: * Interval Domain=false [2018-10-27 04:46:28,917 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-10-27 04:46:28,918 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-10-27 04:46:28,919 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-10-27 04:46:28,919 INFO L133 SettingsManager]: * sizeof long=4 [2018-10-27 04:46:28,919 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-10-27 04:46:28,919 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-10-27 04:46:28,919 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-10-27 04:46:28,919 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-10-27 04:46:28,920 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-10-27 04:46:28,920 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-10-27 04:46:28,920 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-10-27 04:46:28,920 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-10-27 04:46:28,920 INFO L133 SettingsManager]: * sizeof long double=12 [2018-10-27 04:46:28,920 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-10-27 04:46:28,920 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-10-27 04:46:28,921 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-10-27 04:46:28,921 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-10-27 04:46:28,921 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-27 04:46:28,921 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-10-27 04:46:28,921 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-10-27 04:46:28,921 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-10-27 04:46:28,921 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-10-27 04:46:28,922 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-10-27 04:46:28,922 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> b9633ec6dc7e01a7231c1be5ed310faef61ba6b0 [2018-10-27 04:46:28,966 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-10-27 04:46:28,980 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-10-27 04:46:28,983 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-10-27 04:46:28,985 INFO L271 PluginConnector]: Initializing CDTParser... [2018-10-27 04:46:28,985 INFO L276 PluginConnector]: CDTParser initialized [2018-10-27 04:46:28,986 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/../../sv-benchmarks/c/forester-heap/dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-10-27 04:46:29,034 INFO L218 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/data/81892c85f/eb25c6a1827a487aa019706f64ecb79c/FLAG63c48a08c [2018-10-27 04:46:29,483 INFO L298 CDTParser]: Found 1 translation units. [2018-10-27 04:46:29,486 INFO L158 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/sv-benchmarks/c/forester-heap/dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-10-27 04:46:29,502 INFO L346 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/data/81892c85f/eb25c6a1827a487aa019706f64ecb79c/FLAG63c48a08c [2018-10-27 04:46:29,515 INFO L354 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/data/81892c85f/eb25c6a1827a487aa019706f64ecb79c [2018-10-27 04:46:29,522 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-10-27 04:46:29,524 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-10-27 04:46:29,524 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-10-27 04:46:29,525 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-10-27 04:46:29,527 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-10-27 04:46:29,532 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.10 04:46:29" (1/1) ... [2018-10-27 04:46:29,534 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@45c90e0c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:46:29, skipping insertion in model container [2018-10-27 04:46:29,534 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.10 04:46:29" (1/1) ... [2018-10-27 04:46:29,544 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-10-27 04:46:29,591 INFO L174 MainTranslator]: Built tables and reachable declarations [2018-10-27 04:46:29,847 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-27 04:46:29,857 INFO L189 MainTranslator]: Completed pre-run [2018-10-27 04:46:29,913 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-27 04:46:29,951 INFO L193 MainTranslator]: Completed translation [2018-10-27 04:46:29,952 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:46:29 WrapperNode [2018-10-27 04:46:29,952 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-10-27 04:46:29,953 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-10-27 04:46:29,956 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-10-27 04:46:29,956 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-10-27 04:46:29,963 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:46:29" (1/1) ... [2018-10-27 04:46:29,980 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:46:29" (1/1) ... [2018-10-27 04:46:30,089 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-10-27 04:46:30,089 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-10-27 04:46:30,089 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-10-27 04:46:30,089 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-10-27 04:46:30,100 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:46:29" (1/1) ... [2018-10-27 04:46:30,100 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:46:29" (1/1) ... [2018-10-27 04:46:30,106 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:46:29" (1/1) ... [2018-10-27 04:46:30,107 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:46:29" (1/1) ... [2018-10-27 04:46:30,119 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:46:29" (1/1) ... [2018-10-27 04:46:30,125 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:46:29" (1/1) ... [2018-10-27 04:46:30,128 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:46:29" (1/1) ... [2018-10-27 04:46:30,131 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-10-27 04:46:30,132 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-10-27 04:46:30,132 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-10-27 04:46:30,133 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-10-27 04:46:30,133 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:46:29" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-27 04:46:30,205 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-10-27 04:46:30,206 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-10-27 04:46:30,206 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-10-27 04:46:30,206 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-10-27 04:46:30,206 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-10-27 04:46:30,206 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-10-27 04:46:31,414 INFO L341 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-10-27 04:46:31,414 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.10 04:46:31 BoogieIcfgContainer [2018-10-27 04:46:31,415 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-10-27 04:46:31,416 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-10-27 04:46:31,416 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-10-27 04:46:31,419 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-10-27 04:46:31,419 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.10 04:46:29" (1/3) ... [2018-10-27 04:46:31,419 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3960c598 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.10 04:46:31, skipping insertion in model container [2018-10-27 04:46:31,419 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:46:29" (2/3) ... [2018-10-27 04:46:31,420 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3960c598 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.10 04:46:31, skipping insertion in model container [2018-10-27 04:46:31,420 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.10 04:46:31" (3/3) ... [2018-10-27 04:46:31,421 INFO L112 eAbstractionObserver]: Analyzing ICFG dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-10-27 04:46:31,427 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-10-27 04:46:31,432 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 67 error locations. [2018-10-27 04:46:31,441 INFO L257 AbstractCegarLoop]: Starting to check reachability of 67 error locations. [2018-10-27 04:46:31,458 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-10-27 04:46:31,459 INFO L383 AbstractCegarLoop]: Hoare is false [2018-10-27 04:46:31,459 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-10-27 04:46:31,459 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-10-27 04:46:31,459 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-10-27 04:46:31,460 INFO L387 AbstractCegarLoop]: Difference is false [2018-10-27 04:46:31,460 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-10-27 04:46:31,460 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-10-27 04:46:31,475 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states. [2018-10-27 04:46:31,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-10-27 04:46:31,483 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:31,484 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:31,487 INFO L424 AbstractCegarLoop]: === Iteration 1 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:31,494 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:31,494 INFO L82 PathProgramCache]: Analyzing trace with hash -2008024542, now seen corresponding path program 1 times [2018-10-27 04:46:31,496 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:31,540 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:31,540 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:31,540 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:31,541 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:31,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:31,622 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:31,623 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:31,624 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-27 04:46:31,624 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:31,627 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-27 04:46:31,635 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-27 04:46:31,635 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:46:31,637 INFO L87 Difference]: Start difference. First operand 177 states. Second operand 3 states. [2018-10-27 04:46:32,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:32,406 INFO L93 Difference]: Finished difference Result 202 states and 209 transitions. [2018-10-27 04:46:32,407 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-27 04:46:32,408 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-10-27 04:46:32,408 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:32,418 INFO L225 Difference]: With dead ends: 202 [2018-10-27 04:46:32,418 INFO L226 Difference]: Without dead ends: 198 [2018-10-27 04:46:32,420 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:46:32,436 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 198 states. [2018-10-27 04:46:32,457 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 198 to 172. [2018-10-27 04:46:32,458 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-10-27 04:46:32,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 177 transitions. [2018-10-27 04:46:32,461 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 177 transitions. Word has length 7 [2018-10-27 04:46:32,462 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:32,462 INFO L481 AbstractCegarLoop]: Abstraction has 172 states and 177 transitions. [2018-10-27 04:46:32,462 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-27 04:46:32,462 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 177 transitions. [2018-10-27 04:46:32,462 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-10-27 04:46:32,462 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:32,463 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:32,465 INFO L424 AbstractCegarLoop]: === Iteration 2 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:32,465 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:32,466 INFO L82 PathProgramCache]: Analyzing trace with hash -2119218619, now seen corresponding path program 1 times [2018-10-27 04:46:32,466 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:32,467 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:32,467 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:32,467 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:32,467 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:32,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:32,532 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:32,533 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:32,533 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-27 04:46:32,533 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:32,534 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-27 04:46:32,534 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-27 04:46:32,534 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:46:32,535 INFO L87 Difference]: Start difference. First operand 172 states and 177 transitions. Second operand 3 states. [2018-10-27 04:46:32,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:32,684 INFO L93 Difference]: Finished difference Result 170 states and 175 transitions. [2018-10-27 04:46:32,685 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-27 04:46:32,686 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 8 [2018-10-27 04:46:32,686 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:32,687 INFO L225 Difference]: With dead ends: 170 [2018-10-27 04:46:32,687 INFO L226 Difference]: Without dead ends: 170 [2018-10-27 04:46:32,689 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:46:32,689 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states. [2018-10-27 04:46:32,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 170. [2018-10-27 04:46:32,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170 states. [2018-10-27 04:46:32,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 175 transitions. [2018-10-27 04:46:32,699 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 175 transitions. Word has length 8 [2018-10-27 04:46:32,699 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:32,699 INFO L481 AbstractCegarLoop]: Abstraction has 170 states and 175 transitions. [2018-10-27 04:46:32,700 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-27 04:46:32,700 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 175 transitions. [2018-10-27 04:46:32,702 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2018-10-27 04:46:32,702 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:32,702 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:32,703 INFO L424 AbstractCegarLoop]: === Iteration 3 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:32,704 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:32,704 INFO L82 PathProgramCache]: Analyzing trace with hash -1271267708, now seen corresponding path program 1 times [2018-10-27 04:46:32,704 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:32,706 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:32,706 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:32,706 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:32,706 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:32,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:32,760 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:32,760 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:32,761 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:46:32,761 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:32,761 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:46:32,761 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:46:32,762 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:46:32,762 INFO L87 Difference]: Start difference. First operand 170 states and 175 transitions. Second operand 5 states. [2018-10-27 04:46:33,134 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:33,134 INFO L93 Difference]: Finished difference Result 195 states and 201 transitions. [2018-10-27 04:46:33,136 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 04:46:33,136 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 9 [2018-10-27 04:46:33,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:33,138 INFO L225 Difference]: With dead ends: 195 [2018-10-27 04:46:33,139 INFO L226 Difference]: Without dead ends: 195 [2018-10-27 04:46:33,139 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:46:33,140 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states. [2018-10-27 04:46:33,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 169. [2018-10-27 04:46:33,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-10-27 04:46:33,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 174 transitions. [2018-10-27 04:46:33,149 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 174 transitions. Word has length 9 [2018-10-27 04:46:33,149 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:33,150 INFO L481 AbstractCegarLoop]: Abstraction has 169 states and 174 transitions. [2018-10-27 04:46:33,150 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:46:33,150 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 174 transitions. [2018-10-27 04:46:33,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2018-10-27 04:46:33,150 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:33,150 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:33,153 INFO L424 AbstractCegarLoop]: === Iteration 4 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:33,153 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:33,153 INFO L82 PathProgramCache]: Analyzing trace with hash -754593241, now seen corresponding path program 1 times [2018-10-27 04:46:33,153 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:33,154 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:33,155 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:33,155 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:33,155 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:33,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:33,208 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:33,209 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:33,209 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 04:46:33,209 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:33,210 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:46:33,210 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:46:33,210 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:46:33,210 INFO L87 Difference]: Start difference. First operand 169 states and 174 transitions. Second operand 4 states. [2018-10-27 04:46:33,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:33,373 INFO L93 Difference]: Finished difference Result 168 states and 173 transitions. [2018-10-27 04:46:33,373 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 04:46:33,373 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 10 [2018-10-27 04:46:33,373 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:33,374 INFO L225 Difference]: With dead ends: 168 [2018-10-27 04:46:33,374 INFO L226 Difference]: Without dead ends: 168 [2018-10-27 04:46:33,375 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:46:33,375 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states. [2018-10-27 04:46:33,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 168. [2018-10-27 04:46:33,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-10-27 04:46:33,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 173 transitions. [2018-10-27 04:46:33,385 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 173 transitions. Word has length 10 [2018-10-27 04:46:33,385 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:33,385 INFO L481 AbstractCegarLoop]: Abstraction has 168 states and 173 transitions. [2018-10-27 04:46:33,385 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:46:33,385 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 173 transitions. [2018-10-27 04:46:33,385 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-10-27 04:46:33,386 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:33,386 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:33,387 INFO L424 AbstractCegarLoop]: === Iteration 5 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:33,387 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:33,387 INFO L82 PathProgramCache]: Analyzing trace with hash -1917553946, now seen corresponding path program 1 times [2018-10-27 04:46:33,387 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:33,392 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:33,392 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:33,392 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:33,392 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:33,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:33,457 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:33,457 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:33,457 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-27 04:46:33,457 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:33,458 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-27 04:46:33,458 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-27 04:46:33,458 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-10-27 04:46:33,458 INFO L87 Difference]: Start difference. First operand 168 states and 173 transitions. Second operand 6 states. [2018-10-27 04:46:33,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:33,808 INFO L93 Difference]: Finished difference Result 193 states and 199 transitions. [2018-10-27 04:46:33,808 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-27 04:46:33,809 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 11 [2018-10-27 04:46:33,809 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:33,809 INFO L225 Difference]: With dead ends: 193 [2018-10-27 04:46:33,809 INFO L226 Difference]: Without dead ends: 193 [2018-10-27 04:46:33,810 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:46:33,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-10-27 04:46:33,813 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 167. [2018-10-27 04:46:33,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-10-27 04:46:33,815 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 172 transitions. [2018-10-27 04:46:33,815 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 172 transitions. Word has length 11 [2018-10-27 04:46:33,815 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:33,815 INFO L481 AbstractCegarLoop]: Abstraction has 167 states and 172 transitions. [2018-10-27 04:46:33,815 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-27 04:46:33,815 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 172 transitions. [2018-10-27 04:46:33,816 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-10-27 04:46:33,817 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:33,817 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:33,818 INFO L424 AbstractCegarLoop]: === Iteration 6 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:33,818 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:33,819 INFO L82 PathProgramCache]: Analyzing trace with hash 685369865, now seen corresponding path program 1 times [2018-10-27 04:46:33,819 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:33,820 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:33,820 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:33,820 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:33,820 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:33,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:33,905 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:33,905 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:33,905 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 04:46:33,906 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:33,906 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:46:33,906 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:46:33,906 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:46:33,906 INFO L87 Difference]: Start difference. First operand 167 states and 172 transitions. Second operand 4 states. [2018-10-27 04:46:34,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:34,053 INFO L93 Difference]: Finished difference Result 166 states and 171 transitions. [2018-10-27 04:46:34,054 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 04:46:34,054 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 12 [2018-10-27 04:46:34,054 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:34,055 INFO L225 Difference]: With dead ends: 166 [2018-10-27 04:46:34,055 INFO L226 Difference]: Without dead ends: 166 [2018-10-27 04:46:34,055 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:46:34,056 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states. [2018-10-27 04:46:34,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 166. [2018-10-27 04:46:34,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-10-27 04:46:34,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 171 transitions. [2018-10-27 04:46:34,059 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 171 transitions. Word has length 12 [2018-10-27 04:46:34,059 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:34,059 INFO L481 AbstractCegarLoop]: Abstraction has 166 states and 171 transitions. [2018-10-27 04:46:34,060 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:46:34,060 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 171 transitions. [2018-10-27 04:46:34,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-10-27 04:46:34,061 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:34,061 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:34,062 INFO L424 AbstractCegarLoop]: === Iteration 7 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:34,062 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:34,063 INFO L82 PathProgramCache]: Analyzing trace with hash -420828246, now seen corresponding path program 1 times [2018-10-27 04:46:34,063 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:34,067 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:34,068 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:34,068 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:34,068 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:34,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:34,113 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:34,113 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:34,114 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:46:34,114 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:34,114 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:46:34,114 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:46:34,114 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:46:34,115 INFO L87 Difference]: Start difference. First operand 166 states and 171 transitions. Second operand 5 states. [2018-10-27 04:46:34,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:34,306 INFO L93 Difference]: Finished difference Result 259 states and 269 transitions. [2018-10-27 04:46:34,307 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 04:46:34,307 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 15 [2018-10-27 04:46:34,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:34,309 INFO L225 Difference]: With dead ends: 259 [2018-10-27 04:46:34,309 INFO L226 Difference]: Without dead ends: 259 [2018-10-27 04:46:34,309 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:46:34,310 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 259 states. [2018-10-27 04:46:34,313 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 259 to 208. [2018-10-27 04:46:34,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 208 states. [2018-10-27 04:46:34,315 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 208 states to 208 states and 236 transitions. [2018-10-27 04:46:34,315 INFO L78 Accepts]: Start accepts. Automaton has 208 states and 236 transitions. Word has length 15 [2018-10-27 04:46:34,315 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:34,315 INFO L481 AbstractCegarLoop]: Abstraction has 208 states and 236 transitions. [2018-10-27 04:46:34,315 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:46:34,315 INFO L276 IsEmpty]: Start isEmpty. Operand 208 states and 236 transitions. [2018-10-27 04:46:34,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-10-27 04:46:34,317 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:34,317 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:34,318 INFO L424 AbstractCegarLoop]: === Iteration 8 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:34,318 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:34,319 INFO L82 PathProgramCache]: Analyzing trace with hash -160773683, now seen corresponding path program 1 times [2018-10-27 04:46:34,319 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:34,320 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:34,320 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:34,320 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:34,320 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:34,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:34,391 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:34,391 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:34,391 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 04:46:34,392 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:34,392 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:46:34,392 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:46:34,392 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:46:34,392 INFO L87 Difference]: Start difference. First operand 208 states and 236 transitions. Second operand 4 states. [2018-10-27 04:46:34,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:34,559 INFO L93 Difference]: Finished difference Result 292 states and 303 transitions. [2018-10-27 04:46:34,560 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 04:46:34,560 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2018-10-27 04:46:34,560 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:34,561 INFO L225 Difference]: With dead ends: 292 [2018-10-27 04:46:34,561 INFO L226 Difference]: Without dead ends: 292 [2018-10-27 04:46:34,561 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:46:34,562 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 292 states. [2018-10-27 04:46:34,567 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 292 to 218. [2018-10-27 04:46:34,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 218 states. [2018-10-27 04:46:34,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 218 states to 218 states and 252 transitions. [2018-10-27 04:46:34,571 INFO L78 Accepts]: Start accepts. Automaton has 218 states and 252 transitions. Word has length 16 [2018-10-27 04:46:34,571 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:34,572 INFO L481 AbstractCegarLoop]: Abstraction has 218 states and 252 transitions. [2018-10-27 04:46:34,572 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:46:34,572 INFO L276 IsEmpty]: Start isEmpty. Operand 218 states and 252 transitions. [2018-10-27 04:46:34,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-10-27 04:46:34,572 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:34,572 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:34,573 INFO L424 AbstractCegarLoop]: === Iteration 9 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:34,573 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:34,574 INFO L82 PathProgramCache]: Analyzing trace with hash -689016820, now seen corresponding path program 1 times [2018-10-27 04:46:34,574 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:34,575 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:34,575 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:34,575 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:34,575 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:34,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:35,000 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:35,001 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:35,001 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-27 04:46:35,001 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:35,001 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-27 04:46:35,001 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-27 04:46:35,001 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-10-27 04:46:35,002 INFO L87 Difference]: Start difference. First operand 218 states and 252 transitions. Second operand 6 states. [2018-10-27 04:46:35,390 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:35,390 INFO L93 Difference]: Finished difference Result 251 states and 261 transitions. [2018-10-27 04:46:35,391 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 04:46:35,391 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 17 [2018-10-27 04:46:35,391 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:35,392 INFO L225 Difference]: With dead ends: 251 [2018-10-27 04:46:35,392 INFO L226 Difference]: Without dead ends: 251 [2018-10-27 04:46:35,392 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:46:35,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 251 states. [2018-10-27 04:46:35,395 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 251 to 176. [2018-10-27 04:46:35,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-10-27 04:46:35,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 189 transitions. [2018-10-27 04:46:35,397 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 189 transitions. Word has length 17 [2018-10-27 04:46:35,397 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:35,398 INFO L481 AbstractCegarLoop]: Abstraction has 176 states and 189 transitions. [2018-10-27 04:46:35,398 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-27 04:46:35,398 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 189 transitions. [2018-10-27 04:46:35,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-10-27 04:46:35,399 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:35,399 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:35,400 INFO L424 AbstractCegarLoop]: === Iteration 10 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:35,400 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:35,400 INFO L82 PathProgramCache]: Analyzing trace with hash 115315119, now seen corresponding path program 1 times [2018-10-27 04:46:35,400 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:35,401 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:35,401 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:35,401 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:35,401 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:35,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:35,566 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:35,567 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:35,567 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:46:35,567 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:35,567 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:46:35,567 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:46:35,571 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:46:35,571 INFO L87 Difference]: Start difference. First operand 176 states and 189 transitions. Second operand 5 states. [2018-10-27 04:46:35,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:35,778 INFO L93 Difference]: Finished difference Result 288 states and 299 transitions. [2018-10-27 04:46:35,779 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-27 04:46:35,779 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 18 [2018-10-27 04:46:35,779 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:35,780 INFO L225 Difference]: With dead ends: 288 [2018-10-27 04:46:35,780 INFO L226 Difference]: Without dead ends: 288 [2018-10-27 04:46:35,780 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-10-27 04:46:35,780 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 288 states. [2018-10-27 04:46:35,783 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 288 to 175. [2018-10-27 04:46:35,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-10-27 04:46:35,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 188 transitions. [2018-10-27 04:46:35,785 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 188 transitions. Word has length 18 [2018-10-27 04:46:35,785 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:35,785 INFO L481 AbstractCegarLoop]: Abstraction has 175 states and 188 transitions. [2018-10-27 04:46:35,786 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:46:35,786 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 188 transitions. [2018-10-27 04:46:35,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-10-27 04:46:35,786 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:35,786 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:35,787 INFO L424 AbstractCegarLoop]: === Iteration 11 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:35,787 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:35,787 INFO L82 PathProgramCache]: Analyzing trace with hash -2073116077, now seen corresponding path program 1 times [2018-10-27 04:46:35,787 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:35,796 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:35,796 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:35,796 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:35,796 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:35,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:36,344 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:36,345 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:36,345 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-27 04:46:36,345 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:36,345 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-27 04:46:36,345 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-27 04:46:36,345 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:46:36,346 INFO L87 Difference]: Start difference. First operand 175 states and 188 transitions. Second operand 7 states. [2018-10-27 04:46:36,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:36,778 INFO L93 Difference]: Finished difference Result 333 states and 349 transitions. [2018-10-27 04:46:36,779 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-10-27 04:46:36,779 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 22 [2018-10-27 04:46:36,779 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:36,780 INFO L225 Difference]: With dead ends: 333 [2018-10-27 04:46:36,780 INFO L226 Difference]: Without dead ends: 333 [2018-10-27 04:46:36,780 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2018-10-27 04:46:36,781 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 333 states. [2018-10-27 04:46:36,783 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 333 to 179. [2018-10-27 04:46:36,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-10-27 04:46:36,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 193 transitions. [2018-10-27 04:46:36,786 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 193 transitions. Word has length 22 [2018-10-27 04:46:36,786 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:36,786 INFO L481 AbstractCegarLoop]: Abstraction has 179 states and 193 transitions. [2018-10-27 04:46:36,786 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-27 04:46:36,786 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 193 transitions. [2018-10-27 04:46:36,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-10-27 04:46:36,787 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:36,787 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:36,788 INFO L424 AbstractCegarLoop]: === Iteration 12 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:36,788 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:36,788 INFO L82 PathProgramCache]: Analyzing trace with hash 157911127, now seen corresponding path program 1 times [2018-10-27 04:46:36,788 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:36,789 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:36,789 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:36,789 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:36,789 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:36,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:36,997 WARN L179 SmtUtils]: Spent 107.00 ms on a formula simplification that was a NOOP. DAG size: 11 [2018-10-27 04:46:37,159 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:37,159 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:37,159 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-27 04:46:37,160 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:37,160 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-27 04:46:37,160 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-27 04:46:37,160 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-10-27 04:46:37,160 INFO L87 Difference]: Start difference. First operand 179 states and 193 transitions. Second operand 6 states. [2018-10-27 04:46:37,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:37,683 INFO L93 Difference]: Finished difference Result 336 states and 352 transitions. [2018-10-27 04:46:37,683 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-27 04:46:37,683 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 23 [2018-10-27 04:46:37,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:37,685 INFO L225 Difference]: With dead ends: 336 [2018-10-27 04:46:37,685 INFO L226 Difference]: Without dead ends: 336 [2018-10-27 04:46:37,685 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=31, Invalid=59, Unknown=0, NotChecked=0, Total=90 [2018-10-27 04:46:37,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 336 states. [2018-10-27 04:46:37,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 336 to 180. [2018-10-27 04:46:37,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-10-27 04:46:37,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 194 transitions. [2018-10-27 04:46:37,689 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 194 transitions. Word has length 23 [2018-10-27 04:46:37,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:37,689 INFO L481 AbstractCegarLoop]: Abstraction has 180 states and 194 transitions. [2018-10-27 04:46:37,689 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-27 04:46:37,689 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 194 transitions. [2018-10-27 04:46:37,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-10-27 04:46:37,690 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:37,690 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:37,691 INFO L424 AbstractCegarLoop]: === Iteration 13 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:37,691 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:37,691 INFO L82 PathProgramCache]: Analyzing trace with hash 600277717, now seen corresponding path program 1 times [2018-10-27 04:46:37,691 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:37,698 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:37,698 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:37,698 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:37,698 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:37,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:37,751 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:37,752 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:37,752 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:46:37,752 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:37,752 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:46:37,752 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:46:37,752 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:46:37,753 INFO L87 Difference]: Start difference. First operand 180 states and 194 transitions. Second operand 5 states. [2018-10-27 04:46:37,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:37,903 INFO L93 Difference]: Finished difference Result 204 states and 221 transitions. [2018-10-27 04:46:37,904 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 04:46:37,904 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 24 [2018-10-27 04:46:37,904 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:37,905 INFO L225 Difference]: With dead ends: 204 [2018-10-27 04:46:37,905 INFO L226 Difference]: Without dead ends: 204 [2018-10-27 04:46:37,905 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:46:37,906 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 204 states. [2018-10-27 04:46:37,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 204 to 175. [2018-10-27 04:46:37,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-10-27 04:46:37,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 189 transitions. [2018-10-27 04:46:37,910 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 189 transitions. Word has length 24 [2018-10-27 04:46:37,910 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:37,910 INFO L481 AbstractCegarLoop]: Abstraction has 175 states and 189 transitions. [2018-10-27 04:46:37,910 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:46:37,910 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 189 transitions. [2018-10-27 04:46:37,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-10-27 04:46:37,911 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:37,911 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:37,911 INFO L424 AbstractCegarLoop]: === Iteration 14 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:37,912 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:37,912 INFO L82 PathProgramCache]: Analyzing trace with hash 1428740121, now seen corresponding path program 1 times [2018-10-27 04:46:37,912 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:37,913 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:37,913 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:37,913 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:37,913 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:37,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:37,977 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:37,978 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:37,978 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-27 04:46:37,978 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:37,978 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-27 04:46:37,978 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-27 04:46:37,978 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-10-27 04:46:37,979 INFO L87 Difference]: Start difference. First operand 175 states and 189 transitions. Second operand 6 states. [2018-10-27 04:46:38,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:38,289 INFO L93 Difference]: Finished difference Result 247 states and 258 transitions. [2018-10-27 04:46:38,290 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-27 04:46:38,290 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2018-10-27 04:46:38,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:38,291 INFO L225 Difference]: With dead ends: 247 [2018-10-27 04:46:38,291 INFO L226 Difference]: Without dead ends: 247 [2018-10-27 04:46:38,291 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=35, Invalid=55, Unknown=0, NotChecked=0, Total=90 [2018-10-27 04:46:38,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 247 states. [2018-10-27 04:46:38,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 247 to 177. [2018-10-27 04:46:38,293 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-10-27 04:46:38,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 191 transitions. [2018-10-27 04:46:38,294 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 191 transitions. Word has length 25 [2018-10-27 04:46:38,294 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:38,294 INFO L481 AbstractCegarLoop]: Abstraction has 177 states and 191 transitions. [2018-10-27 04:46:38,295 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-27 04:46:38,295 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 191 transitions. [2018-10-27 04:46:38,295 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-10-27 04:46:38,295 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:38,295 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:38,298 INFO L424 AbstractCegarLoop]: === Iteration 15 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:38,298 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:38,298 INFO L82 PathProgramCache]: Analyzing trace with hash 1341270871, now seen corresponding path program 1 times [2018-10-27 04:46:38,299 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:38,299 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:38,299 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:38,300 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:38,300 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:38,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:38,593 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:38,593 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:38,593 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:46:38,593 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:38,594 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:46:38,594 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:46:38,594 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:46:38,594 INFO L87 Difference]: Start difference. First operand 177 states and 191 transitions. Second operand 5 states. [2018-10-27 04:46:39,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:39,024 INFO L93 Difference]: Finished difference Result 184 states and 191 transitions. [2018-10-27 04:46:39,025 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 04:46:39,025 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2018-10-27 04:46:39,025 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:39,026 INFO L225 Difference]: With dead ends: 184 [2018-10-27 04:46:39,026 INFO L226 Difference]: Without dead ends: 184 [2018-10-27 04:46:39,026 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:46:39,027 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-10-27 04:46:39,028 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 175. [2018-10-27 04:46:39,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-10-27 04:46:39,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 189 transitions. [2018-10-27 04:46:39,029 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 189 transitions. Word has length 26 [2018-10-27 04:46:39,029 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:39,029 INFO L481 AbstractCegarLoop]: Abstraction has 175 states and 189 transitions. [2018-10-27 04:46:39,029 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:46:39,030 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 189 transitions. [2018-10-27 04:46:39,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-10-27 04:46:39,030 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:39,030 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:39,030 INFO L424 AbstractCegarLoop]: === Iteration 16 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:39,031 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:39,031 INFO L82 PathProgramCache]: Analyzing trace with hash 377151165, now seen corresponding path program 1 times [2018-10-27 04:46:39,031 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:39,032 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:39,039 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:39,040 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:39,040 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:39,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:39,524 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:39,525 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:39,525 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-27 04:46:39,525 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:39,525 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-27 04:46:39,525 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-27 04:46:39,525 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:46:39,526 INFO L87 Difference]: Start difference. First operand 175 states and 189 transitions. Second operand 7 states. [2018-10-27 04:46:39,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:39,839 INFO L93 Difference]: Finished difference Result 349 states and 366 transitions. [2018-10-27 04:46:39,839 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-10-27 04:46:39,839 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 27 [2018-10-27 04:46:39,840 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:39,841 INFO L225 Difference]: With dead ends: 349 [2018-10-27 04:46:39,841 INFO L226 Difference]: Without dead ends: 349 [2018-10-27 04:46:39,841 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2018-10-27 04:46:39,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 349 states. [2018-10-27 04:46:39,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 349 to 177. [2018-10-27 04:46:39,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-10-27 04:46:39,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 191 transitions. [2018-10-27 04:46:39,844 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 191 transitions. Word has length 27 [2018-10-27 04:46:39,844 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:39,844 INFO L481 AbstractCegarLoop]: Abstraction has 177 states and 191 transitions. [2018-10-27 04:46:39,844 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-27 04:46:39,844 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 191 transitions. [2018-10-27 04:46:39,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-10-27 04:46:39,845 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:39,845 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:39,845 INFO L424 AbstractCegarLoop]: === Iteration 17 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:39,845 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:39,845 INFO L82 PathProgramCache]: Analyzing trace with hash -1370275877, now seen corresponding path program 1 times [2018-10-27 04:46:39,846 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:39,846 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:39,846 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:39,846 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:39,847 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:39,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:40,044 WARN L179 SmtUtils]: Spent 139.00 ms on a formula simplification that was a NOOP. DAG size: 15 [2018-10-27 04:46:40,082 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:40,082 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:40,082 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:46:40,082 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:40,083 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:46:40,083 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:46:40,083 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:46:40,083 INFO L87 Difference]: Start difference. First operand 177 states and 191 transitions. Second operand 5 states. [2018-10-27 04:46:40,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:40,242 INFO L93 Difference]: Finished difference Result 175 states and 189 transitions. [2018-10-27 04:46:40,242 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-27 04:46:40,243 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2018-10-27 04:46:40,243 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:40,243 INFO L225 Difference]: With dead ends: 175 [2018-10-27 04:46:40,243 INFO L226 Difference]: Without dead ends: 175 [2018-10-27 04:46:40,244 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:46:40,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2018-10-27 04:46:40,246 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 175. [2018-10-27 04:46:40,246 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-10-27 04:46:40,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 189 transitions. [2018-10-27 04:46:40,247 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 189 transitions. Word has length 27 [2018-10-27 04:46:40,247 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:40,247 INFO L481 AbstractCegarLoop]: Abstraction has 175 states and 189 transitions. [2018-10-27 04:46:40,247 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:46:40,247 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 189 transitions. [2018-10-27 04:46:40,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-10-27 04:46:40,248 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:40,248 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:40,248 INFO L424 AbstractCegarLoop]: === Iteration 18 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:40,248 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:40,249 INFO L82 PathProgramCache]: Analyzing trace with hash -1193215557, now seen corresponding path program 1 times [2018-10-27 04:46:40,249 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:40,249 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:40,249 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:40,250 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:40,250 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:40,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:40,635 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:40,635 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:40,635 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:46:40,635 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:40,636 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:46:40,636 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:46:40,636 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:46:40,636 INFO L87 Difference]: Start difference. First operand 175 states and 189 transitions. Second operand 5 states. [2018-10-27 04:46:40,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:40,844 INFO L93 Difference]: Finished difference Result 239 states and 250 transitions. [2018-10-27 04:46:40,845 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 04:46:40,845 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2018-10-27 04:46:40,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:40,846 INFO L225 Difference]: With dead ends: 239 [2018-10-27 04:46:40,846 INFO L226 Difference]: Without dead ends: 239 [2018-10-27 04:46:40,846 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:46:40,846 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 239 states. [2018-10-27 04:46:40,848 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 239 to 175. [2018-10-27 04:46:40,849 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-10-27 04:46:40,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 188 transitions. [2018-10-27 04:46:40,849 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 188 transitions. Word has length 28 [2018-10-27 04:46:40,850 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:40,850 INFO L481 AbstractCegarLoop]: Abstraction has 175 states and 188 transitions. [2018-10-27 04:46:40,850 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:46:40,850 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 188 transitions. [2018-10-27 04:46:40,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-10-27 04:46:40,850 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:40,850 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:40,851 INFO L424 AbstractCegarLoop]: === Iteration 19 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:40,851 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:40,851 INFO L82 PathProgramCache]: Analyzing trace with hash 471120857, now seen corresponding path program 1 times [2018-10-27 04:46:40,851 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:40,859 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:40,859 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:40,859 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:40,859 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:40,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:41,245 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:41,245 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:41,245 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-27 04:46:41,245 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:41,246 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-27 04:46:41,246 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-27 04:46:41,246 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-10-27 04:46:41,246 INFO L87 Difference]: Start difference. First operand 175 states and 188 transitions. Second operand 6 states. [2018-10-27 04:46:41,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:41,472 INFO L93 Difference]: Finished difference Result 196 states and 212 transitions. [2018-10-27 04:46:41,473 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-27 04:46:41,473 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 28 [2018-10-27 04:46:41,473 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:41,474 INFO L225 Difference]: With dead ends: 196 [2018-10-27 04:46:41,474 INFO L226 Difference]: Without dead ends: 196 [2018-10-27 04:46:41,474 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-10-27 04:46:41,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states. [2018-10-27 04:46:41,476 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 173. [2018-10-27 04:46:41,476 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-10-27 04:46:41,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 186 transitions. [2018-10-27 04:46:41,477 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 186 transitions. Word has length 28 [2018-10-27 04:46:41,477 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:41,477 INFO L481 AbstractCegarLoop]: Abstraction has 173 states and 186 transitions. [2018-10-27 04:46:41,477 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-27 04:46:41,477 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 186 transitions. [2018-10-27 04:46:41,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-10-27 04:46:41,478 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:41,478 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:41,478 INFO L424 AbstractCegarLoop]: === Iteration 20 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:41,479 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:41,479 INFO L82 PathProgramCache]: Analyzing trace with hash 1719844765, now seen corresponding path program 1 times [2018-10-27 04:46:41,479 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:41,487 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:41,487 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:41,487 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:41,487 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:41,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:41,558 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:41,558 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:41,558 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-27 04:46:41,558 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:41,559 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-27 04:46:41,559 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-27 04:46:41,559 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:46:41,559 INFO L87 Difference]: Start difference. First operand 173 states and 186 transitions. Second operand 7 states. [2018-10-27 04:46:41,737 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:41,737 INFO L93 Difference]: Finished difference Result 276 states and 291 transitions. [2018-10-27 04:46:41,738 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-27 04:46:41,738 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 29 [2018-10-27 04:46:41,738 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:41,739 INFO L225 Difference]: With dead ends: 276 [2018-10-27 04:46:41,739 INFO L226 Difference]: Without dead ends: 276 [2018-10-27 04:46:41,739 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=73, Unknown=0, NotChecked=0, Total=110 [2018-10-27 04:46:41,744 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 276 states. [2018-10-27 04:46:41,746 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 276 to 177. [2018-10-27 04:46:41,747 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-10-27 04:46:41,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 190 transitions. [2018-10-27 04:46:41,748 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 190 transitions. Word has length 29 [2018-10-27 04:46:41,750 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:41,751 INFO L481 AbstractCegarLoop]: Abstraction has 177 states and 190 transitions. [2018-10-27 04:46:41,751 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-27 04:46:41,751 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 190 transitions. [2018-10-27 04:46:41,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-10-27 04:46:41,753 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:41,753 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:41,754 INFO L424 AbstractCegarLoop]: === Iteration 21 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:41,754 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:41,754 INFO L82 PathProgramCache]: Analyzing trace with hash 1775580251, now seen corresponding path program 1 times [2018-10-27 04:46:41,754 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:41,755 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:41,755 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:41,755 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:41,755 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:41,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:41,893 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:41,893 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:41,893 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-10-27 04:46:41,893 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:41,893 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-10-27 04:46:41,893 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-10-27 04:46:41,894 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2018-10-27 04:46:41,894 INFO L87 Difference]: Start difference. First operand 177 states and 190 transitions. Second operand 11 states. [2018-10-27 04:46:42,444 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:42,444 INFO L93 Difference]: Finished difference Result 297 states and 313 transitions. [2018-10-27 04:46:42,445 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-10-27 04:46:42,445 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 30 [2018-10-27 04:46:42,445 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:42,446 INFO L225 Difference]: With dead ends: 297 [2018-10-27 04:46:42,446 INFO L226 Difference]: Without dead ends: 297 [2018-10-27 04:46:42,446 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=92, Invalid=250, Unknown=0, NotChecked=0, Total=342 [2018-10-27 04:46:42,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 297 states. [2018-10-27 04:46:42,448 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 297 to 175. [2018-10-27 04:46:42,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-10-27 04:46:42,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 188 transitions. [2018-10-27 04:46:42,449 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 188 transitions. Word has length 30 [2018-10-27 04:46:42,449 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:42,449 INFO L481 AbstractCegarLoop]: Abstraction has 175 states and 188 transitions. [2018-10-27 04:46:42,449 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-10-27 04:46:42,449 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 188 transitions. [2018-10-27 04:46:42,450 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-10-27 04:46:42,450 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:42,450 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:42,450 INFO L424 AbstractCegarLoop]: === Iteration 22 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:42,451 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:42,451 INFO L82 PathProgramCache]: Analyzing trace with hash -791586977, now seen corresponding path program 1 times [2018-10-27 04:46:42,451 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:42,459 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:42,459 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:42,459 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:42,459 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:42,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:42,660 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:42,660 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:42,660 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-10-27 04:46:42,660 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:42,660 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-10-27 04:46:42,661 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-10-27 04:46:42,661 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2018-10-27 04:46:42,661 INFO L87 Difference]: Start difference. First operand 175 states and 188 transitions. Second operand 11 states. [2018-10-27 04:46:43,462 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:43,462 INFO L93 Difference]: Finished difference Result 446 states and 471 transitions. [2018-10-27 04:46:43,464 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-10-27 04:46:43,464 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 31 [2018-10-27 04:46:43,464 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:43,465 INFO L225 Difference]: With dead ends: 446 [2018-10-27 04:46:43,465 INFO L226 Difference]: Without dead ends: 446 [2018-10-27 04:46:43,466 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=87, Invalid=333, Unknown=0, NotChecked=0, Total=420 [2018-10-27 04:46:43,466 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 446 states. [2018-10-27 04:46:43,468 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 446 to 177. [2018-10-27 04:46:43,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-10-27 04:46:43,468 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 190 transitions. [2018-10-27 04:46:43,468 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 190 transitions. Word has length 31 [2018-10-27 04:46:43,469 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:43,469 INFO L481 AbstractCegarLoop]: Abstraction has 177 states and 190 transitions. [2018-10-27 04:46:43,469 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-10-27 04:46:43,469 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 190 transitions. [2018-10-27 04:46:43,469 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-10-27 04:46:43,469 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:43,469 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:43,470 INFO L424 AbstractCegarLoop]: === Iteration 23 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:43,470 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:43,470 INFO L82 PathProgramCache]: Analyzing trace with hash -505870335, now seen corresponding path program 1 times [2018-10-27 04:46:43,470 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:43,471 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:43,471 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:43,471 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:43,471 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:43,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:43,627 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:43,627 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:43,627 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-27 04:46:43,627 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:43,627 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-27 04:46:43,627 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-27 04:46:43,628 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-10-27 04:46:43,628 INFO L87 Difference]: Start difference. First operand 177 states and 190 transitions. Second operand 6 states. [2018-10-27 04:46:43,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:43,776 INFO L93 Difference]: Finished difference Result 182 states and 190 transitions. [2018-10-27 04:46:43,776 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-27 04:46:43,777 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2018-10-27 04:46:43,777 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:43,777 INFO L225 Difference]: With dead ends: 182 [2018-10-27 04:46:43,777 INFO L226 Difference]: Without dead ends: 182 [2018-10-27 04:46:43,778 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-10-27 04:46:43,778 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-10-27 04:46:43,779 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 174. [2018-10-27 04:46:43,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-10-27 04:46:43,780 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 187 transitions. [2018-10-27 04:46:43,780 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 187 transitions. Word has length 33 [2018-10-27 04:46:43,780 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:43,780 INFO L481 AbstractCegarLoop]: Abstraction has 174 states and 187 transitions. [2018-10-27 04:46:43,780 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-27 04:46:43,780 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 187 transitions. [2018-10-27 04:46:43,781 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-10-27 04:46:43,781 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:43,781 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:43,781 INFO L424 AbstractCegarLoop]: === Iteration 24 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:43,781 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:43,781 INFO L82 PathProgramCache]: Analyzing trace with hash 1497888902, now seen corresponding path program 1 times [2018-10-27 04:46:43,782 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:43,782 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:43,782 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:43,783 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:43,783 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:43,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:44,030 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:44,030 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:44,030 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-10-27 04:46:44,030 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:44,031 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-10-27 04:46:44,031 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-10-27 04:46:44,031 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=109, Unknown=0, NotChecked=0, Total=132 [2018-10-27 04:46:44,031 INFO L87 Difference]: Start difference. First operand 174 states and 187 transitions. Second operand 12 states. [2018-10-27 04:46:44,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:44,875 INFO L93 Difference]: Finished difference Result 468 states and 494 transitions. [2018-10-27 04:46:44,884 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-10-27 04:46:44,884 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 34 [2018-10-27 04:46:44,884 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:44,885 INFO L225 Difference]: With dead ends: 468 [2018-10-27 04:46:44,885 INFO L226 Difference]: Without dead ends: 468 [2018-10-27 04:46:44,886 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=93, Invalid=413, Unknown=0, NotChecked=0, Total=506 [2018-10-27 04:46:44,886 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 468 states. [2018-10-27 04:46:44,889 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 468 to 179. [2018-10-27 04:46:44,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-10-27 04:46:44,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 193 transitions. [2018-10-27 04:46:44,889 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 193 transitions. Word has length 34 [2018-10-27 04:46:44,889 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:44,890 INFO L481 AbstractCegarLoop]: Abstraction has 179 states and 193 transitions. [2018-10-27 04:46:44,890 INFO L482 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-10-27 04:46:44,890 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 193 transitions. [2018-10-27 04:46:44,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-10-27 04:46:44,890 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:44,890 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:44,891 INFO L424 AbstractCegarLoop]: === Iteration 25 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:44,891 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:44,891 INFO L82 PathProgramCache]: Analyzing trace with hash 2110076393, now seen corresponding path program 1 times [2018-10-27 04:46:44,891 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:44,901 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:44,901 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:44,901 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:44,901 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:44,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:45,046 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:45,047 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:45,047 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-27 04:46:45,047 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:45,047 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-27 04:46:45,047 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-27 04:46:45,047 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-10-27 04:46:45,048 INFO L87 Difference]: Start difference. First operand 179 states and 193 transitions. Second operand 6 states. [2018-10-27 04:46:45,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:45,267 INFO L93 Difference]: Finished difference Result 219 states and 236 transitions. [2018-10-27 04:46:45,267 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-27 04:46:45,267 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 36 [2018-10-27 04:46:45,268 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:45,268 INFO L225 Difference]: With dead ends: 219 [2018-10-27 04:46:45,268 INFO L226 Difference]: Without dead ends: 219 [2018-10-27 04:46:45,269 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-10-27 04:46:45,269 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219 states. [2018-10-27 04:46:45,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219 to 177. [2018-10-27 04:46:45,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-10-27 04:46:45,271 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 191 transitions. [2018-10-27 04:46:45,271 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 191 transitions. Word has length 36 [2018-10-27 04:46:45,271 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:45,271 INFO L481 AbstractCegarLoop]: Abstraction has 177 states and 191 transitions. [2018-10-27 04:46:45,271 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-27 04:46:45,271 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 191 transitions. [2018-10-27 04:46:45,272 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-10-27 04:46:45,276 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:45,276 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:45,276 INFO L424 AbstractCegarLoop]: === Iteration 26 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:45,276 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:45,277 INFO L82 PathProgramCache]: Analyzing trace with hash 2110141130, now seen corresponding path program 1 times [2018-10-27 04:46:45,277 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:45,281 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:45,282 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:45,282 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:45,282 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:45,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:45,709 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:45,709 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:45,709 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-27 04:46:45,709 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:45,710 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-27 04:46:45,710 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-27 04:46:45,710 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-10-27 04:46:45,710 INFO L87 Difference]: Start difference. First operand 177 states and 191 transitions. Second operand 6 states. [2018-10-27 04:46:45,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:45,848 INFO L93 Difference]: Finished difference Result 208 states and 219 transitions. [2018-10-27 04:46:45,848 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 04:46:45,848 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 36 [2018-10-27 04:46:45,849 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:45,849 INFO L225 Difference]: With dead ends: 208 [2018-10-27 04:46:45,849 INFO L226 Difference]: Without dead ends: 208 [2018-10-27 04:46:45,850 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-10-27 04:46:45,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 208 states. [2018-10-27 04:46:45,851 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 208 to 177. [2018-10-27 04:46:45,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-10-27 04:46:45,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 190 transitions. [2018-10-27 04:46:45,852 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 190 transitions. Word has length 36 [2018-10-27 04:46:45,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:45,852 INFO L481 AbstractCegarLoop]: Abstraction has 177 states and 190 transitions. [2018-10-27 04:46:45,852 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-27 04:46:45,852 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 190 transitions. [2018-10-27 04:46:45,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-10-27 04:46:45,853 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:45,853 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:45,853 INFO L424 AbstractCegarLoop]: === Iteration 27 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:45,853 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:45,853 INFO L82 PathProgramCache]: Analyzing trace with hash 657194024, now seen corresponding path program 1 times [2018-10-27 04:46:45,853 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:45,854 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:45,854 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:45,854 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:45,854 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:45,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:46,010 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:46,010 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:46,010 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-27 04:46:46,011 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:46,011 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-27 04:46:46,011 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-27 04:46:46,011 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:46:46,011 INFO L87 Difference]: Start difference. First operand 177 states and 190 transitions. Second operand 7 states. [2018-10-27 04:46:46,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:46,195 INFO L93 Difference]: Finished difference Result 177 states and 190 transitions. [2018-10-27 04:46:46,196 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-10-27 04:46:46,196 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 36 [2018-10-27 04:46:46,196 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:46,197 INFO L225 Difference]: With dead ends: 177 [2018-10-27 04:46:46,197 INFO L226 Difference]: Without dead ends: 177 [2018-10-27 04:46:46,197 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=34, Invalid=56, Unknown=0, NotChecked=0, Total=90 [2018-10-27 04:46:46,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2018-10-27 04:46:46,199 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 176. [2018-10-27 04:46:46,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-10-27 04:46:46,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 189 transitions. [2018-10-27 04:46:46,199 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 189 transitions. Word has length 36 [2018-10-27 04:46:46,199 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:46,200 INFO L481 AbstractCegarLoop]: Abstraction has 176 states and 189 transitions. [2018-10-27 04:46:46,204 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-27 04:46:46,204 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 189 transitions. [2018-10-27 04:46:46,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-10-27 04:46:46,204 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:46,204 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:46,205 INFO L424 AbstractCegarLoop]: === Iteration 28 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:46,208 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:46,208 INFO L82 PathProgramCache]: Analyzing trace with hash 651469218, now seen corresponding path program 1 times [2018-10-27 04:46:46,208 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:46,208 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:46,209 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:46,209 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:46,209 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:46,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:46,617 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:46,617 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:46,617 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-27 04:46:46,617 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:46,618 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-27 04:46:46,618 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-27 04:46:46,618 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-10-27 04:46:46,618 INFO L87 Difference]: Start difference. First operand 176 states and 189 transitions. Second operand 6 states. [2018-10-27 04:46:46,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:46,897 INFO L93 Difference]: Finished difference Result 200 states and 212 transitions. [2018-10-27 04:46:46,898 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-27 04:46:46,898 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 36 [2018-10-27 04:46:46,898 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:46,899 INFO L225 Difference]: With dead ends: 200 [2018-10-27 04:46:46,899 INFO L226 Difference]: Without dead ends: 200 [2018-10-27 04:46:46,899 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-10-27 04:46:46,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 200 states. [2018-10-27 04:46:46,901 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 200 to 175. [2018-10-27 04:46:46,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-10-27 04:46:46,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 188 transitions. [2018-10-27 04:46:46,902 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 188 transitions. Word has length 36 [2018-10-27 04:46:46,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:46,902 INFO L481 AbstractCegarLoop]: Abstraction has 175 states and 188 transitions. [2018-10-27 04:46:46,902 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-27 04:46:46,902 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 188 transitions. [2018-10-27 04:46:46,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-10-27 04:46:46,902 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:46,902 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:46,903 INFO L424 AbstractCegarLoop]: === Iteration 29 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:46,903 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:46,903 INFO L82 PathProgramCache]: Analyzing trace with hash 987858993, now seen corresponding path program 1 times [2018-10-27 04:46:46,903 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:46,904 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:46,904 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:46,904 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:46,904 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:46,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:47,169 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:47,170 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:47,170 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:46:47,170 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:47,170 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:46:47,170 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:46:47,170 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:46:47,170 INFO L87 Difference]: Start difference. First operand 175 states and 188 transitions. Second operand 5 states. [2018-10-27 04:46:47,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:47,359 INFO L93 Difference]: Finished difference Result 236 states and 249 transitions. [2018-10-27 04:46:47,360 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 04:46:47,360 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 37 [2018-10-27 04:46:47,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:47,361 INFO L225 Difference]: With dead ends: 236 [2018-10-27 04:46:47,361 INFO L226 Difference]: Without dead ends: 236 [2018-10-27 04:46:47,361 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:46:47,361 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 236 states. [2018-10-27 04:46:47,363 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 236 to 181. [2018-10-27 04:46:47,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181 states. [2018-10-27 04:46:47,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 193 transitions. [2018-10-27 04:46:47,364 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 193 transitions. Word has length 37 [2018-10-27 04:46:47,364 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:47,364 INFO L481 AbstractCegarLoop]: Abstraction has 181 states and 193 transitions. [2018-10-27 04:46:47,364 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:46:47,364 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 193 transitions. [2018-10-27 04:46:47,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-10-27 04:46:47,364 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:47,365 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:47,365 INFO L424 AbstractCegarLoop]: === Iteration 30 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:47,365 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:47,365 INFO L82 PathProgramCache]: Analyzing trace with hash -1279290587, now seen corresponding path program 1 times [2018-10-27 04:46:47,365 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:47,366 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:47,366 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:47,366 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:47,366 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:47,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:47,562 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:47,562 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:47,562 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-10-27 04:46:47,562 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:47,563 INFO L460 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-10-27 04:46:47,563 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-10-27 04:46:47,563 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=153, Unknown=0, NotChecked=0, Total=182 [2018-10-27 04:46:47,563 INFO L87 Difference]: Start difference. First operand 181 states and 193 transitions. Second operand 14 states. [2018-10-27 04:46:48,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:48,612 INFO L93 Difference]: Finished difference Result 268 states and 282 transitions. [2018-10-27 04:46:48,613 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-10-27 04:46:48,613 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 37 [2018-10-27 04:46:48,613 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:48,614 INFO L225 Difference]: With dead ends: 268 [2018-10-27 04:46:48,614 INFO L226 Difference]: Without dead ends: 268 [2018-10-27 04:46:48,614 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 163 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=195, Invalid=735, Unknown=0, NotChecked=0, Total=930 [2018-10-27 04:46:48,615 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 268 states. [2018-10-27 04:46:48,616 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 268 to 180. [2018-10-27 04:46:48,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-10-27 04:46:48,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 192 transitions. [2018-10-27 04:46:48,617 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 192 transitions. Word has length 37 [2018-10-27 04:46:48,617 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:48,617 INFO L481 AbstractCegarLoop]: Abstraction has 180 states and 192 transitions. [2018-10-27 04:46:48,617 INFO L482 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-10-27 04:46:48,617 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 192 transitions. [2018-10-27 04:46:48,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-10-27 04:46:48,618 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:48,618 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:48,624 INFO L424 AbstractCegarLoop]: === Iteration 31 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:48,624 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:48,624 INFO L82 PathProgramCache]: Analyzing trace with hash 203268042, now seen corresponding path program 1 times [2018-10-27 04:46:48,624 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:48,625 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:48,625 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:48,625 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:48,625 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:48,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:49,023 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:49,023 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:49,023 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-27 04:46:49,023 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:49,024 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-27 04:46:49,024 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-27 04:46:49,024 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:46:49,024 INFO L87 Difference]: Start difference. First operand 180 states and 192 transitions. Second operand 8 states. [2018-10-27 04:46:49,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:49,223 INFO L93 Difference]: Finished difference Result 180 states and 192 transitions. [2018-10-27 04:46:49,224 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-10-27 04:46:49,224 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 38 [2018-10-27 04:46:49,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:49,224 INFO L225 Difference]: With dead ends: 180 [2018-10-27 04:46:49,225 INFO L226 Difference]: Without dead ends: 180 [2018-10-27 04:46:49,225 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=47, Invalid=85, Unknown=0, NotChecked=0, Total=132 [2018-10-27 04:46:49,225 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-10-27 04:46:49,227 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 179. [2018-10-27 04:46:49,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-10-27 04:46:49,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 191 transitions. [2018-10-27 04:46:49,227 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 191 transitions. Word has length 38 [2018-10-27 04:46:49,227 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:49,227 INFO L481 AbstractCegarLoop]: Abstraction has 179 states and 191 transitions. [2018-10-27 04:46:49,228 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-27 04:46:49,228 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 191 transitions. [2018-10-27 04:46:49,228 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-10-27 04:46:49,228 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:49,228 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:49,229 INFO L424 AbstractCegarLoop]: === Iteration 32 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:49,229 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:49,229 INFO L82 PathProgramCache]: Analyzing trace with hash -36228480, now seen corresponding path program 1 times [2018-10-27 04:46:49,229 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:49,229 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:49,230 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:49,230 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:49,230 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:49,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:49,423 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:49,423 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:46:49,423 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-27 04:46:49,424 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 42 with the following transitions: [2018-10-27 04:46:49,425 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [13], [15], [17], [19], [21], [23], [25], [27], [29], [33], [35], [38], [161], [165], [170], [174], [182], [184], [186], [191], [195], [203], [209], [210], [211], [213], [261], [263], [265], [267], [320], [321], [322] [2018-10-27 04:46:49,467 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-10-27 04:46:49,467 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-10-27 04:46:50,490 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-10-27 04:46:50,491 INFO L272 AbstractInterpreter]: Visited 39 different actions 55 times. Merged at 9 different actions 16 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 60 variables. [2018-10-27 04:46:50,501 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:50,502 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-10-27 04:46:50,502 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:46:50,502 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-27 04:46:50,511 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:50,511 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-27 04:46:50,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:50,603 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:46:50,634 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:46:50,637 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:46:50,652 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:46:50,652 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:46:50,712 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-27 04:46:50,712 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:46:50,726 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:46:50,726 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:27, output treesize:26 [2018-10-27 04:46:50,884 WARN L179 SmtUtils]: Spent 125.00 ms on a formula simplification that was a NOOP. DAG size: 20 [2018-10-27 04:46:50,929 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:46:50,943 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:46:50,944 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:46:50,972 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:46:51,023 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:46:51,023 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:34, output treesize:30 [2018-10-27 04:46:51,085 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 14 [2018-10-27 04:46:51,121 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 15 [2018-10-27 04:46:51,121 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:46:51,134 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:46:51,141 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:46:51,142 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:35, output treesize:31 [2018-10-27 04:46:51,329 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-10-27 04:46:51,332 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-10-27 04:46:51,332 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:46:51,336 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:46:51,340 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:46:51,340 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:30, output treesize:15 [2018-10-27 04:46:51,422 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:51,422 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:46:51,653 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 25 [2018-10-27 04:46:51,655 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:46:51,656 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:46:51,665 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 25 [2018-10-27 04:46:51,708 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2018-10-27 04:46:51,709 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:46:51,712 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 20 [2018-10-27 04:46:51,713 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:46:51,760 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 12 [2018-10-27 04:46:51,761 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-10-27 04:46:51,780 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 13 [2018-10-27 04:46:51,781 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-10-27 04:46:51,792 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 14 [2018-10-27 04:46:51,792 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-10-27 04:46:51,920 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 17 [2018-10-27 04:46:51,921 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:46:51,924 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 10 [2018-10-27 04:46:51,924 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-10-27 04:46:51,963 INFO L267 ElimStorePlain]: Start of recursive call 4: 3 dim-1 vars, End of recursive call: 3 dim-0 vars, and 5 xjuncts. [2018-10-27 04:46:51,983 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 5 xjuncts. [2018-10-27 04:46:52,024 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 25 [2018-10-27 04:46:52,026 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:46:52,027 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-10-27 04:46:52,039 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 25 [2018-10-27 04:46:52,061 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 19 [2018-10-27 04:46:52,062 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:46:52,065 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 10 [2018-10-27 04:46:52,065 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-10-27 04:46:52,079 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 17 [2018-10-27 04:46:52,080 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:46:52,105 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2018-10-27 04:46:52,106 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:46:52,130 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 12 [2018-10-27 04:46:52,130 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-10-27 04:46:52,148 INFO L267 ElimStorePlain]: Start of recursive call 14: 3 dim-1 vars, End of recursive call: 3 dim-0 vars, and 5 xjuncts. [2018-10-27 04:46:52,168 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 5 xjuncts. [2018-10-27 04:46:52,216 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 6 dim-0 vars, and 10 xjuncts. [2018-10-27 04:46:52,217 INFO L202 ElimStorePlain]: Needed 19 recursive calls to eliminate 4 variables, input treesize:49, output treesize:119 [2018-10-27 04:47:00,483 WARN L179 SmtUtils]: Spent 6.10 s on a formula simplification that was a NOOP. DAG size: 20 [2018-10-27 04:47:00,532 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:00,549 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-10-27 04:47:00,549 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 10, 10] total 27 [2018-10-27 04:47:00,549 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-27 04:47:00,549 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-10-27 04:47:00,550 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-10-27 04:47:00,550 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=615, Unknown=1, NotChecked=0, Total=702 [2018-10-27 04:47:00,550 INFO L87 Difference]: Start difference. First operand 179 states and 191 transitions. Second operand 18 states. [2018-10-27 04:47:01,173 WARN L179 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 51 [2018-10-27 04:47:03,073 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:03,074 INFO L93 Difference]: Finished difference Result 260 states and 272 transitions. [2018-10-27 04:47:03,074 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-10-27 04:47:03,075 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 41 [2018-10-27 04:47:03,075 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:03,076 INFO L225 Difference]: With dead ends: 260 [2018-10-27 04:47:03,076 INFO L226 Difference]: Without dead ends: 256 [2018-10-27 04:47:03,076 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 64 SyntacticMatches, 1 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 286 ImplicationChecksByTransitivity, 10.0s TimeCoverageRelationStatistics Valid=323, Invalid=1316, Unknown=1, NotChecked=0, Total=1640 [2018-10-27 04:47:03,077 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 256 states. [2018-10-27 04:47:03,079 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 256 to 210. [2018-10-27 04:47:03,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 210 states. [2018-10-27 04:47:03,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210 states to 210 states and 227 transitions. [2018-10-27 04:47:03,080 INFO L78 Accepts]: Start accepts. Automaton has 210 states and 227 transitions. Word has length 41 [2018-10-27 04:47:03,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:03,080 INFO L481 AbstractCegarLoop]: Abstraction has 210 states and 227 transitions. [2018-10-27 04:47:03,080 INFO L482 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-10-27 04:47:03,080 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 227 transitions. [2018-10-27 04:47:03,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-10-27 04:47:03,088 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:03,088 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:03,088 INFO L424 AbstractCegarLoop]: === Iteration 33 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:03,089 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:03,089 INFO L82 PathProgramCache]: Analyzing trace with hash -2121677042, now seen corresponding path program 1 times [2018-10-27 04:47:03,089 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:03,100 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:03,100 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:03,101 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:03,101 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:03,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:03,261 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:03,261 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:03,262 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-27 04:47:03,262 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:03,262 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-10-27 04:47:03,262 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-10-27 04:47:03,262 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-10-27 04:47:03,262 INFO L87 Difference]: Start difference. First operand 210 states and 227 transitions. Second operand 10 states. [2018-10-27 04:47:03,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:03,797 INFO L93 Difference]: Finished difference Result 213 states and 230 transitions. [2018-10-27 04:47:03,798 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-10-27 04:47:03,798 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 42 [2018-10-27 04:47:03,798 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:03,799 INFO L225 Difference]: With dead ends: 213 [2018-10-27 04:47:03,799 INFO L226 Difference]: Without dead ends: 213 [2018-10-27 04:47:03,800 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=135, Invalid=371, Unknown=0, NotChecked=0, Total=506 [2018-10-27 04:47:03,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states. [2018-10-27 04:47:03,802 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 207. [2018-10-27 04:47:03,802 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2018-10-27 04:47:03,803 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 224 transitions. [2018-10-27 04:47:03,803 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 224 transitions. Word has length 42 [2018-10-27 04:47:03,803 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:03,803 INFO L481 AbstractCegarLoop]: Abstraction has 207 states and 224 transitions. [2018-10-27 04:47:03,803 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-10-27 04:47:03,803 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 224 transitions. [2018-10-27 04:47:03,803 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-10-27 04:47:03,804 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:03,808 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:03,808 INFO L424 AbstractCegarLoop]: === Iteration 34 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:03,808 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:03,808 INFO L82 PathProgramCache]: Analyzing trace with hash -350209583, now seen corresponding path program 1 times [2018-10-27 04:47:03,809 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:03,809 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:03,809 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:03,809 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:03,810 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:03,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:04,129 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:04,129 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:04,130 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-10-27 04:47:04,130 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:04,130 INFO L460 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-10-27 04:47:04,130 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-10-27 04:47:04,130 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=153, Unknown=0, NotChecked=0, Total=182 [2018-10-27 04:47:04,130 INFO L87 Difference]: Start difference. First operand 207 states and 224 transitions. Second operand 14 states. [2018-10-27 04:47:04,881 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:04,882 INFO L93 Difference]: Finished difference Result 246 states and 257 transitions. [2018-10-27 04:47:04,883 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-10-27 04:47:04,883 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 42 [2018-10-27 04:47:04,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:04,884 INFO L225 Difference]: With dead ends: 246 [2018-10-27 04:47:04,884 INFO L226 Difference]: Without dead ends: 246 [2018-10-27 04:47:04,884 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 235 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=257, Invalid=933, Unknown=0, NotChecked=0, Total=1190 [2018-10-27 04:47:04,885 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246 states. [2018-10-27 04:47:04,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246 to 206. [2018-10-27 04:47:04,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 206 states. [2018-10-27 04:47:04,887 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 223 transitions. [2018-10-27 04:47:04,887 INFO L78 Accepts]: Start accepts. Automaton has 206 states and 223 transitions. Word has length 42 [2018-10-27 04:47:04,888 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:04,888 INFO L481 AbstractCegarLoop]: Abstraction has 206 states and 223 transitions. [2018-10-27 04:47:04,888 INFO L482 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-10-27 04:47:04,888 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 223 transitions. [2018-10-27 04:47:04,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-10-27 04:47:04,888 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:04,888 INFO L375 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:04,889 INFO L424 AbstractCegarLoop]: === Iteration 35 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:04,889 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:04,889 INFO L82 PathProgramCache]: Analyzing trace with hash -1245550250, now seen corresponding path program 1 times [2018-10-27 04:47:04,889 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:04,890 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:04,890 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:04,890 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:04,890 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:04,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:05,431 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:05,431 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:47:05,432 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-27 04:47:05,432 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 45 with the following transitions: [2018-10-27 04:47:05,432 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [13], [15], [17], [19], [21], [23], [25], [27], [29], [33], [35], [38], [161], [165], [170], [174], [182], [184], [186], [191], [195], [203], [207], [209], [211], [213], [261], [263], [265], [267], [273], [277], [317], [319], [320], [321], [322] [2018-10-27 04:47:05,434 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-10-27 04:47:05,435 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-10-27 04:47:06,042 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-10-27 04:47:06,042 INFO L272 AbstractInterpreter]: Visited 43 different actions 67 times. Merged at 13 different actions 24 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 61 variables. [2018-10-27 04:47:06,084 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:06,085 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-10-27 04:47:06,085 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:47:06,085 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-27 04:47:06,102 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:06,102 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-27 04:47:06,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:06,143 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:06,160 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:06,161 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:06,172 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:06,172 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-27 04:47:06,185 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:06,186 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:06,186 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-27 04:47:06,186 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:06,192 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:06,192 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-10-27 04:47:06,195 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-10-27 04:47:06,196 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:47:06,209 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-10-27 04:47:06,225 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-10-27 04:47:06,225 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4, 4] imperfect sequences [7] total 9 [2018-10-27 04:47:06,225 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:06,226 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:47:06,226 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:47:06,226 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-10-27 04:47:06,226 INFO L87 Difference]: Start difference. First operand 206 states and 223 transitions. Second operand 4 states. [2018-10-27 04:47:06,323 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:06,323 INFO L93 Difference]: Finished difference Result 242 states and 256 transitions. [2018-10-27 04:47:06,324 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 04:47:06,324 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 44 [2018-10-27 04:47:06,325 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:06,325 INFO L225 Difference]: With dead ends: 242 [2018-10-27 04:47:06,325 INFO L226 Difference]: Without dead ends: 242 [2018-10-27 04:47:06,325 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 87 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2018-10-27 04:47:06,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 242 states. [2018-10-27 04:47:06,328 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 242 to 206. [2018-10-27 04:47:06,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 206 states. [2018-10-27 04:47:06,329 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 221 transitions. [2018-10-27 04:47:06,329 INFO L78 Accepts]: Start accepts. Automaton has 206 states and 221 transitions. Word has length 44 [2018-10-27 04:47:06,329 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:06,329 INFO L481 AbstractCegarLoop]: Abstraction has 206 states and 221 transitions. [2018-10-27 04:47:06,329 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:47:06,329 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 221 transitions. [2018-10-27 04:47:06,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-10-27 04:47:06,329 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:06,330 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:06,330 INFO L424 AbstractCegarLoop]: === Iteration 36 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:06,330 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:06,330 INFO L82 PathProgramCache]: Analyzing trace with hash 1177832112, now seen corresponding path program 1 times [2018-10-27 04:47:06,330 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:06,331 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:06,331 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:06,331 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:06,331 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:06,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:06,467 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:06,467 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:06,467 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-27 04:47:06,467 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:06,467 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-10-27 04:47:06,467 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-10-27 04:47:06,468 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-10-27 04:47:06,468 INFO L87 Difference]: Start difference. First operand 206 states and 221 transitions. Second operand 10 states. [2018-10-27 04:47:06,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:06,945 INFO L93 Difference]: Finished difference Result 310 states and 333 transitions. [2018-10-27 04:47:06,946 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-10-27 04:47:06,946 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 44 [2018-10-27 04:47:06,946 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:06,947 INFO L225 Difference]: With dead ends: 310 [2018-10-27 04:47:06,947 INFO L226 Difference]: Without dead ends: 310 [2018-10-27 04:47:06,947 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=67, Invalid=205, Unknown=0, NotChecked=0, Total=272 [2018-10-27 04:47:06,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 310 states. [2018-10-27 04:47:06,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 310 to 204. [2018-10-27 04:47:06,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204 states. [2018-10-27 04:47:06,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204 states to 204 states and 219 transitions. [2018-10-27 04:47:06,951 INFO L78 Accepts]: Start accepts. Automaton has 204 states and 219 transitions. Word has length 44 [2018-10-27 04:47:06,951 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:06,951 INFO L481 AbstractCegarLoop]: Abstraction has 204 states and 219 transitions. [2018-10-27 04:47:06,951 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-10-27 04:47:06,951 INFO L276 IsEmpty]: Start isEmpty. Operand 204 states and 219 transitions. [2018-10-27 04:47:06,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-10-27 04:47:06,951 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:06,952 INFO L375 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:06,952 INFO L424 AbstractCegarLoop]: === Iteration 37 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:06,952 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:06,952 INFO L82 PathProgramCache]: Analyzing trace with hash 1322835033, now seen corresponding path program 1 times [2018-10-27 04:47:06,952 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:06,953 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:06,953 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:06,953 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:06,953 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:06,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:07,495 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-10-27 04:47:07,495 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:07,495 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-27 04:47:07,495 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:07,495 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-27 04:47:07,495 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-27 04:47:07,495 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:47:07,496 INFO L87 Difference]: Start difference. First operand 204 states and 219 transitions. Second operand 7 states. [2018-10-27 04:47:07,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:07,714 INFO L93 Difference]: Finished difference Result 224 states and 238 transitions. [2018-10-27 04:47:07,715 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-10-27 04:47:07,715 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 46 [2018-10-27 04:47:07,716 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:07,716 INFO L225 Difference]: With dead ends: 224 [2018-10-27 04:47:07,716 INFO L226 Difference]: Without dead ends: 224 [2018-10-27 04:47:07,716 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=66, Invalid=144, Unknown=0, NotChecked=0, Total=210 [2018-10-27 04:47:07,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2018-10-27 04:47:07,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 198. [2018-10-27 04:47:07,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 198 states. [2018-10-27 04:47:07,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 198 states to 198 states and 210 transitions. [2018-10-27 04:47:07,719 INFO L78 Accepts]: Start accepts. Automaton has 198 states and 210 transitions. Word has length 46 [2018-10-27 04:47:07,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:07,719 INFO L481 AbstractCegarLoop]: Abstraction has 198 states and 210 transitions. [2018-10-27 04:47:07,719 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-27 04:47:07,720 INFO L276 IsEmpty]: Start isEmpty. Operand 198 states and 210 transitions. [2018-10-27 04:47:07,724 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-10-27 04:47:07,724 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:07,724 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:07,725 INFO L424 AbstractCegarLoop]: === Iteration 38 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:07,725 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:07,725 INFO L82 PathProgramCache]: Analyzing trace with hash -1974702510, now seen corresponding path program 1 times [2018-10-27 04:47:07,725 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:07,732 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:07,732 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:07,732 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:07,732 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:07,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:07,884 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:07,884 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:07,884 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-10-27 04:47:07,884 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:07,884 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-10-27 04:47:07,884 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-10-27 04:47:07,885 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2018-10-27 04:47:07,885 INFO L87 Difference]: Start difference. First operand 198 states and 210 transitions. Second operand 11 states. [2018-10-27 04:47:08,685 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:08,685 INFO L93 Difference]: Finished difference Result 317 states and 336 transitions. [2018-10-27 04:47:08,686 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-10-27 04:47:08,687 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 46 [2018-10-27 04:47:08,687 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:08,687 INFO L225 Difference]: With dead ends: 317 [2018-10-27 04:47:08,688 INFO L226 Difference]: Without dead ends: 317 [2018-10-27 04:47:08,688 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=144, Invalid=456, Unknown=0, NotChecked=0, Total=600 [2018-10-27 04:47:08,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 317 states. [2018-10-27 04:47:08,690 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 317 to 182. [2018-10-27 04:47:08,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-10-27 04:47:08,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 193 transitions. [2018-10-27 04:47:08,691 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 193 transitions. Word has length 46 [2018-10-27 04:47:08,691 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:08,691 INFO L481 AbstractCegarLoop]: Abstraction has 182 states and 193 transitions. [2018-10-27 04:47:08,691 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-10-27 04:47:08,691 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 193 transitions. [2018-10-27 04:47:08,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-10-27 04:47:08,691 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:08,700 INFO L375 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:08,700 INFO L424 AbstractCegarLoop]: === Iteration 39 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:08,700 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:08,700 INFO L82 PathProgramCache]: Analyzing trace with hash 617774493, now seen corresponding path program 1 times [2018-10-27 04:47:08,700 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:08,705 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:08,705 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:08,705 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:08,705 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:08,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:08,896 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:08,896 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:47:08,897 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-27 04:47:08,897 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 51 with the following transitions: [2018-10-27 04:47:08,897 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [13], [15], [17], [19], [21], [23], [25], [27], [29], [33], [35], [38], [161], [165], [170], [174], [182], [184], [186], [191], [195], [203], [207], [209], [211], [213], [261], [263], [265], [267], [273], [279], [281], [283], [286], [288], [290], [292], [294], [295], [320], [321], [322] [2018-10-27 04:47:08,899 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-10-27 04:47:08,899 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-10-27 04:47:09,474 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-10-27 04:47:09,474 INFO L272 AbstractInterpreter]: Visited 49 different actions 72 times. Merged at 13 different actions 21 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 66 variables. [2018-10-27 04:47:09,480 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:09,480 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-10-27 04:47:09,480 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:47:09,480 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-27 04:47:09,488 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:09,489 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-27 04:47:09,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:09,519 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:09,538 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-10-27 04:47:09,560 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-10-27 04:47:09,560 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:09,588 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:09,612 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:09,612 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-10-27 04:47:09,780 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-10-27 04:47:09,781 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-10-27 04:47:09,781 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:09,783 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:09,800 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:09,800 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:19, output treesize:3 [2018-10-27 04:47:09,814 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-10-27 04:47:09,814 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:47:09,903 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2018-10-27 04:47:09,905 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-10-27 04:47:09,905 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:09,906 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:09,908 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2018-10-27 04:47:09,910 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-10-27 04:47:09,910 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:09,912 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:09,919 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:47:09,920 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 1 variables, input treesize:23, output treesize:28 [2018-10-27 04:47:09,952 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-10-27 04:47:09,968 INFO L312 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-10-27 04:47:09,968 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6, 7] imperfect sequences [13] total 23 [2018-10-27 04:47:09,968 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:09,968 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-27 04:47:09,969 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-27 04:47:09,969 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=453, Unknown=0, NotChecked=0, Total=506 [2018-10-27 04:47:09,969 INFO L87 Difference]: Start difference. First operand 182 states and 193 transitions. Second operand 6 states. [2018-10-27 04:47:10,117 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:10,117 INFO L93 Difference]: Finished difference Result 192 states and 201 transitions. [2018-10-27 04:47:10,118 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 04:47:10,118 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 50 [2018-10-27 04:47:10,119 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:10,119 INFO L225 Difference]: With dead ends: 192 [2018-10-27 04:47:10,119 INFO L226 Difference]: Without dead ends: 192 [2018-10-27 04:47:10,120 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 90 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=80, Invalid=570, Unknown=0, NotChecked=0, Total=650 [2018-10-27 04:47:10,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 192 states. [2018-10-27 04:47:10,121 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 192 to 175. [2018-10-27 04:47:10,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-10-27 04:47:10,122 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 183 transitions. [2018-10-27 04:47:10,122 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 183 transitions. Word has length 50 [2018-10-27 04:47:10,122 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:10,122 INFO L481 AbstractCegarLoop]: Abstraction has 175 states and 183 transitions. [2018-10-27 04:47:10,122 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-27 04:47:10,122 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 183 transitions. [2018-10-27 04:47:10,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-10-27 04:47:10,123 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:10,123 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:10,123 INFO L424 AbstractCegarLoop]: === Iteration 40 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:10,123 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:10,132 INFO L82 PathProgramCache]: Analyzing trace with hash 1609285078, now seen corresponding path program 1 times [2018-10-27 04:47:10,132 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:10,132 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:10,133 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:10,133 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:10,133 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:10,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:10,836 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:10,836 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:47:10,836 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-27 04:47:10,836 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 53 with the following transitions: [2018-10-27 04:47:10,837 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [13], [15], [17], [19], [21], [23], [25], [27], [29], [33], [35], [38], [161], [165], [170], [174], [182], [184], [186], [191], [195], [203], [207], [209], [211], [213], [261], [263], [265], [267], [273], [279], [280], [281], [283], [304], [306], [308], [310], [312], [320], [321], [322] [2018-10-27 04:47:10,839 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-10-27 04:47:10,839 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-10-27 04:47:11,731 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-10-27 04:47:11,731 INFO L272 AbstractInterpreter]: Visited 49 different actions 93 times. Merged at 19 different actions 42 times. Never widened. Found 3 fixpoints after 3 different actions. Largest state had 66 variables. [2018-10-27 04:47:11,740 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:11,740 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-10-27 04:47:11,740 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:47:11,740 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-27 04:47:11,764 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:11,764 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-27 04:47:11,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:11,807 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:11,899 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:47:11,902 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:11,902 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:11,905 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:11,911 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:47:11,924 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:11,924 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:11,926 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:11,929 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:11,929 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:23, output treesize:1 [2018-10-27 04:47:11,968 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:47:11,979 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-27 04:47:11,979 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:12,004 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:12,060 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:47:12,064 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-27 04:47:12,065 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:12,066 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:12,073 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:12,073 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:29, output treesize:7 [2018-10-27 04:47:12,087 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:12,087 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:47:12,204 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:12,230 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-10-27 04:47:12,231 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 10, 10] total 17 [2018-10-27 04:47:12,231 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-27 04:47:12,231 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-10-27 04:47:12,231 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-10-27 04:47:12,231 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2018-10-27 04:47:12,231 INFO L87 Difference]: Start difference. First operand 175 states and 183 transitions. Second operand 11 states. [2018-10-27 04:47:12,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:12,757 INFO L93 Difference]: Finished difference Result 279 states and 293 transitions. [2018-10-27 04:47:12,758 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-10-27 04:47:12,758 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 52 [2018-10-27 04:47:12,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:12,759 INFO L225 Difference]: With dead ends: 279 [2018-10-27 04:47:12,760 INFO L226 Difference]: Without dead ends: 279 [2018-10-27 04:47:12,760 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 91 SyntacticMatches, 7 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 84 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=139, Invalid=617, Unknown=0, NotChecked=0, Total=756 [2018-10-27 04:47:12,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 279 states. [2018-10-27 04:47:12,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 279 to 188. [2018-10-27 04:47:12,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-10-27 04:47:12,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 198 transitions. [2018-10-27 04:47:12,763 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 198 transitions. Word has length 52 [2018-10-27 04:47:12,763 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:12,763 INFO L481 AbstractCegarLoop]: Abstraction has 188 states and 198 transitions. [2018-10-27 04:47:12,763 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-10-27 04:47:12,763 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 198 transitions. [2018-10-27 04:47:12,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-10-27 04:47:12,764 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:12,764 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:12,764 INFO L424 AbstractCegarLoop]: === Iteration 41 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:12,764 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:12,764 INFO L82 PathProgramCache]: Analyzing trace with hash 1700234314, now seen corresponding path program 1 times [2018-10-27 04:47:12,764 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:12,765 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:12,765 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:12,765 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:12,765 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:12,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:12,937 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:12,937 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:12,937 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-27 04:47:12,937 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:12,937 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-27 04:47:12,937 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-27 04:47:12,938 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:47:12,938 INFO L87 Difference]: Start difference. First operand 188 states and 198 transitions. Second operand 8 states. [2018-10-27 04:47:13,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:13,201 INFO L93 Difference]: Finished difference Result 193 states and 203 transitions. [2018-10-27 04:47:13,202 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-10-27 04:47:13,203 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 52 [2018-10-27 04:47:13,203 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:13,203 INFO L225 Difference]: With dead ends: 193 [2018-10-27 04:47:13,203 INFO L226 Difference]: Without dead ends: 193 [2018-10-27 04:47:13,204 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=64, Invalid=118, Unknown=0, NotChecked=0, Total=182 [2018-10-27 04:47:13,204 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-10-27 04:47:13,206 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 185. [2018-10-27 04:47:13,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 185 states. [2018-10-27 04:47:13,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 195 transitions. [2018-10-27 04:47:13,206 INFO L78 Accepts]: Start accepts. Automaton has 185 states and 195 transitions. Word has length 52 [2018-10-27 04:47:13,206 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:13,206 INFO L481 AbstractCegarLoop]: Abstraction has 185 states and 195 transitions. [2018-10-27 04:47:13,206 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-27 04:47:13,207 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 195 transitions. [2018-10-27 04:47:13,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-10-27 04:47:13,207 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:13,207 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:13,207 INFO L424 AbstractCegarLoop]: === Iteration 42 === [mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:13,208 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:13,208 INFO L82 PathProgramCache]: Analyzing trace with hash -1651770590, now seen corresponding path program 1 times [2018-10-27 04:47:13,208 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:13,208 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:13,208 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:13,209 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:13,209 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:13,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-10-27 04:47:13,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-10-27 04:47:13,249 INFO L442 BasicCegarLoop]: Counterexample might be feasible [2018-10-27 04:47:13,264 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,265 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,266 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,266 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,266 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,266 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,266 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,267 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,267 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,267 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,267 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,267 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,270 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,270 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,271 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,271 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,271 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,271 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,271 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,272 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,272 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,272 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,272 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,272 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,273 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,273 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,273 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,273 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,274 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,274 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,274 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,274 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,274 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,275 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,275 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,275 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,275 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,275 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,279 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,279 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,280 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,280 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,280 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,280 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,280 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,281 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,281 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,281 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,281 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,282 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,282 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,282 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,282 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,282 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,282 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,283 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,283 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,283 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,283 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,283 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,285 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,286 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,286 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,286 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,286 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,287 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,287 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,287 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,287 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,287 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,288 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,288 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,288 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,288 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,288 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,289 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,289 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,289 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,289 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,289 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,290 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,290 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,290 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,290 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,290 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,291 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,291 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled [2018-10-27 04:47:13,291 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,291 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,291 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled [2018-10-27 04:47:13,291 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled [2018-10-27 04:47:13,296 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,296 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,296 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled [2018-10-27 04:47:13,297 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled [2018-10-27 04:47:13,297 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,297 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,297 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled [2018-10-27 04:47:13,297 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled [2018-10-27 04:47:13,297 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,298 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,298 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled [2018-10-27 04:47:13,298 WARN L387 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-10-27 04:47:13,298 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled [2018-10-27 04:47:13,298 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,298 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:47:13,298 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled [2018-10-27 04:47:13,316 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.10 04:47:13 BoogieIcfgContainer [2018-10-27 04:47:13,316 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-10-27 04:47:13,317 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-10-27 04:47:13,317 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-10-27 04:47:13,317 INFO L276 PluginConnector]: Witness Printer initialized [2018-10-27 04:47:13,317 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.10 04:46:31" (3/4) ... [2018-10-27 04:47:13,323 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-10-27 04:47:13,323 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-10-27 04:47:13,324 INFO L168 Benchmark]: Toolchain (without parser) took 43801.02 ms. Allocated memory was 1.0 GB in the beginning and 1.8 GB in the end (delta: 764.4 MB). Free memory was 951.8 MB in the beginning and 1.4 GB in the end (delta: -479.2 MB). Peak memory consumption was 285.2 MB. Max. memory is 11.5 GB. [2018-10-27 04:47:13,325 INFO L168 Benchmark]: CDTParser took 0.59 ms. Allocated memory is still 1.0 GB. Free memory is still 980.0 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-10-27 04:47:13,325 INFO L168 Benchmark]: CACSL2BoogieTranslator took 428.07 ms. Allocated memory is still 1.0 GB. Free memory was 951.8 MB in the beginning and 927.6 MB in the end (delta: 24.2 MB). Peak memory consumption was 24.2 MB. Max. memory is 11.5 GB. [2018-10-27 04:47:13,325 INFO L168 Benchmark]: Boogie Procedure Inliner took 135.48 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 157.3 MB). Free memory was 927.6 MB in the beginning and 1.1 GB in the end (delta: -221.7 MB). Peak memory consumption was 16.2 MB. Max. memory is 11.5 GB. [2018-10-27 04:47:13,325 INFO L168 Benchmark]: Boogie Preprocessor took 43.12 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. [2018-10-27 04:47:13,326 INFO L168 Benchmark]: RCFGBuilder took 1282.40 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 62.6 MB). Peak memory consumption was 62.6 MB. Max. memory is 11.5 GB. [2018-10-27 04:47:13,326 INFO L168 Benchmark]: TraceAbstraction took 41900.27 ms. Allocated memory was 1.2 GB in the beginning and 1.8 GB in the end (delta: 607.1 MB). Free memory was 1.1 GB in the beginning and 1.4 GB in the end (delta: -347.8 MB). Peak memory consumption was 259.3 MB. Max. memory is 11.5 GB. [2018-10-27 04:47:13,326 INFO L168 Benchmark]: Witness Printer took 6.71 ms. Allocated memory is still 1.8 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-10-27 04:47:13,334 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.59 ms. Allocated memory is still 1.0 GB. Free memory is still 980.0 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 428.07 ms. Allocated memory is still 1.0 GB. Free memory was 951.8 MB in the beginning and 927.6 MB in the end (delta: 24.2 MB). Peak memory consumption was 24.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 135.48 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 157.3 MB). Free memory was 927.6 MB in the beginning and 1.1 GB in the end (delta: -221.7 MB). Peak memory consumption was 16.2 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 43.12 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 1282.40 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 62.6 MB). Peak memory consumption was 62.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 41900.27 ms. Allocated memory was 1.2 GB in the beginning and 1.8 GB in the end (delta: 607.1 MB). Free memory was 1.1 GB in the beginning and 1.4 GB in the end (delta: -347.8 MB). Peak memory consumption was 259.3 MB. Max. memory is 11.5 GB. * Witness Printer took 6.71 ms. Allocated memory is still 1.8 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 985]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: overapproximation of memtrack at line 985. Possible FailurePath: [L987] EXPR, FCALL malloc(sizeof(struct TSLL)) [L987] struct TSLL* null = malloc(sizeof(struct TSLL)); [L988] CALL null->next = ((void*)0) [L988] RET null->next = ((void*)0) [L989] CALL null->prev = ((void*)0) [L989] RET null->prev = ((void*)0) [L990] CALL null->colour = BLACK [L990] RET null->colour = BLACK [L992] EXPR, FCALL malloc(sizeof(struct TSLL)) [L992] struct TSLL* list = malloc(sizeof(struct TSLL)); [L993] CALL list->next = null [L993] RET list->next = null [L994] CALL list->prev = null [L994] RET list->prev = null [L995] CALL list->colour = BLACK [L995] RET list->colour = BLACK [L997] struct TSLL* end = list; [L1000] COND FALSE !(__VERIFIER_nondet_int()) [L1026] end = null [L1027] end = list [L1030] COND FALSE !(!(null != end)) [L1030] COND FALSE !(0) [L1031] CALL, EXPR end->colour [L1031] RET, EXPR end->colour [L1031] COND FALSE !(!(BLACK == end->colour)) [L1031] COND FALSE !(0) [L1032] COND TRUE null != end [L1034] CALL, EXPR end->colour [L1034] RET, EXPR end->colour [L1034] COND FALSE !(RED == end->colour) [L1041] CALL, EXPR end->next [L1041] RET, EXPR end->next [L1041] end = end->next [L1032] COND FALSE !(null != end) [L1045] COND TRUE null != list [L1047] CALL, EXPR list->colour [L1047] RET, EXPR list->colour [L1047] COND FALSE !(RED == list->colour) [L1056] CALL, EXPR list->next [L1056] RET, EXPR list->next [L1056] end = list->next [L1057] free(list) [L1057] free(list) [L1057] FCALL free(list) [L1058] list = end [L1045] COND FALSE !(null != list) [L1062] return 0; - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 177 locations, 67 error locations. UNSAFE Result, 41.8s OverallTime, 42 OverallIterations, 2 TraceHistogramMax, 16.9s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 4024 SDtfs, 12425 SDslu, 9862 SDs, 0 SdLazy, 17159 SolverSat, 1327 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 11.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 873 GetRequests, 401 SyntacticMatches, 10 SemanticMatches, 462 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1393 ImplicationChecksByTransitivity, 21.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=218occurred in iteration=8, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 3.2s AbstIntTime, 4 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 41 MinimizatonAttempts, 2609 StatesRemovedByMinimization, 37 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 0.6s SatisfiabilityAnalysisTime, 19.9s InterpolantComputationTime, 1465 NumberOfCodeBlocks, 1465 NumberOfCodeBlocksAsserted, 46 NumberOfCheckSat, 1550 ConstructedInterpolants, 13 QuantifiedInterpolants, 391327 SizeOfPredicates, 79 NumberOfNonLiveVariables, 1233 ConjunctsInSsa, 132 ConjunctsInUnsatCore, 49 InterpolantComputations, 41 PerfectInterpolantSequences, 19/43 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-1dbac8b [2018-10-27 04:47:15,192 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-10-27 04:47:15,193 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-10-27 04:47:15,202 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-10-27 04:47:15,202 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-10-27 04:47:15,203 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-10-27 04:47:15,204 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-10-27 04:47:15,205 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-10-27 04:47:15,206 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-10-27 04:47:15,207 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-10-27 04:47:15,207 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-10-27 04:47:15,208 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-10-27 04:47:15,208 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-10-27 04:47:15,209 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-10-27 04:47:15,210 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-10-27 04:47:15,210 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-10-27 04:47:15,211 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-10-27 04:47:15,214 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-10-27 04:47:15,215 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-10-27 04:47:15,216 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-10-27 04:47:15,217 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-10-27 04:47:15,218 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-10-27 04:47:15,232 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-10-27 04:47:15,232 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-10-27 04:47:15,232 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-10-27 04:47:15,233 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-10-27 04:47:15,234 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-10-27 04:47:15,234 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-10-27 04:47:15,235 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-10-27 04:47:15,238 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-10-27 04:47:15,238 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-10-27 04:47:15,239 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-10-27 04:47:15,239 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-10-27 04:47:15,239 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-10-27 04:47:15,240 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-10-27 04:47:15,241 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-10-27 04:47:15,241 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Bitvector.epf [2018-10-27 04:47:15,251 INFO L110 SettingsManager]: Loading preferences was successful [2018-10-27 04:47:15,251 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-10-27 04:47:15,252 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-10-27 04:47:15,252 INFO L133 SettingsManager]: * User list type=DISABLED [2018-10-27 04:47:15,252 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-10-27 04:47:15,253 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-10-27 04:47:15,253 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-10-27 04:47:15,253 INFO L133 SettingsManager]: * Interval Domain=false [2018-10-27 04:47:15,253 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-10-27 04:47:15,254 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-10-27 04:47:15,254 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-10-27 04:47:15,254 INFO L133 SettingsManager]: * sizeof long=4 [2018-10-27 04:47:15,254 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-10-27 04:47:15,254 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-10-27 04:47:15,254 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-10-27 04:47:15,254 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-10-27 04:47:15,255 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-10-27 04:47:15,255 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-10-27 04:47:15,255 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-10-27 04:47:15,255 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-10-27 04:47:15,255 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-10-27 04:47:15,255 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-10-27 04:47:15,255 INFO L133 SettingsManager]: * sizeof long double=12 [2018-10-27 04:47:15,257 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-10-27 04:47:15,258 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-10-27 04:47:15,258 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-10-27 04:47:15,258 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-10-27 04:47:15,258 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-27 04:47:15,258 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-10-27 04:47:15,258 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-10-27 04:47:15,258 INFO L133 SettingsManager]: * Trace refinement strategy=WALRUS [2018-10-27 04:47:15,259 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-10-27 04:47:15,259 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-10-27 04:47:15,259 INFO L133 SettingsManager]: * Logic for external solver=AUFBV Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> b9633ec6dc7e01a7231c1be5ed310faef61ba6b0 [2018-10-27 04:47:15,291 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-10-27 04:47:15,304 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-10-27 04:47:15,307 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-10-27 04:47:15,309 INFO L271 PluginConnector]: Initializing CDTParser... [2018-10-27 04:47:15,309 INFO L276 PluginConnector]: CDTParser initialized [2018-10-27 04:47:15,310 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/../../sv-benchmarks/c/forester-heap/dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-10-27 04:47:15,358 INFO L218 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/data/04b540637/b2766665580f476bb53df8ed94d0332a/FLAGf27385289 [2018-10-27 04:47:15,813 INFO L298 CDTParser]: Found 1 translation units. [2018-10-27 04:47:15,814 INFO L158 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/sv-benchmarks/c/forester-heap/dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-10-27 04:47:15,822 INFO L346 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/data/04b540637/b2766665580f476bb53df8ed94d0332a/FLAGf27385289 [2018-10-27 04:47:15,835 INFO L354 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/data/04b540637/b2766665580f476bb53df8ed94d0332a [2018-10-27 04:47:15,838 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-10-27 04:47:15,839 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-10-27 04:47:15,840 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-10-27 04:47:15,840 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-10-27 04:47:15,843 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-10-27 04:47:15,844 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.10 04:47:15" (1/1) ... [2018-10-27 04:47:15,846 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@508f90a4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:15, skipping insertion in model container [2018-10-27 04:47:15,846 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.10 04:47:15" (1/1) ... [2018-10-27 04:47:15,855 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-10-27 04:47:15,898 INFO L174 MainTranslator]: Built tables and reachable declarations [2018-10-27 04:47:16,134 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-27 04:47:16,146 INFO L189 MainTranslator]: Completed pre-run [2018-10-27 04:47:16,207 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-27 04:47:16,258 INFO L193 MainTranslator]: Completed translation [2018-10-27 04:47:16,259 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:16 WrapperNode [2018-10-27 04:47:16,259 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-10-27 04:47:16,260 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-10-27 04:47:16,260 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-10-27 04:47:16,260 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-10-27 04:47:16,268 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:16" (1/1) ... [2018-10-27 04:47:16,288 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:16" (1/1) ... [2018-10-27 04:47:16,322 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-10-27 04:47:16,323 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-10-27 04:47:16,323 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-10-27 04:47:16,323 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-10-27 04:47:16,331 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:16" (1/1) ... [2018-10-27 04:47:16,332 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:16" (1/1) ... [2018-10-27 04:47:16,341 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:16" (1/1) ... [2018-10-27 04:47:16,342 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:16" (1/1) ... [2018-10-27 04:47:16,355 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:16" (1/1) ... [2018-10-27 04:47:16,433 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:16" (1/1) ... [2018-10-27 04:47:16,438 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:16" (1/1) ... [2018-10-27 04:47:16,443 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-10-27 04:47:16,443 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-10-27 04:47:16,448 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-10-27 04:47:16,448 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-10-27 04:47:16,449 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:16" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-27 04:47:16,499 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-10-27 04:47:16,500 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-10-27 04:47:16,500 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-10-27 04:47:16,500 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-10-27 04:47:16,500 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-10-27 04:47:16,500 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-10-27 04:47:17,865 INFO L341 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-10-27 04:47:17,865 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.10 04:47:17 BoogieIcfgContainer [2018-10-27 04:47:17,865 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-10-27 04:47:17,866 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-10-27 04:47:17,866 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-10-27 04:47:17,869 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-10-27 04:47:17,869 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.10 04:47:15" (1/3) ... [2018-10-27 04:47:17,869 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@14364332 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.10 04:47:17, skipping insertion in model container [2018-10-27 04:47:17,870 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:16" (2/3) ... [2018-10-27 04:47:17,870 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@14364332 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.10 04:47:17, skipping insertion in model container [2018-10-27 04:47:17,870 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.10 04:47:17" (3/3) ... [2018-10-27 04:47:17,871 INFO L112 eAbstractionObserver]: Analyzing ICFG dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-10-27 04:47:17,881 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-10-27 04:47:17,887 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 67 error locations. [2018-10-27 04:47:17,898 INFO L257 AbstractCegarLoop]: Starting to check reachability of 67 error locations. [2018-10-27 04:47:17,918 INFO L135 ementStrategyFactory]: Using default assertion order modulation [2018-10-27 04:47:17,918 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-10-27 04:47:17,918 INFO L383 AbstractCegarLoop]: Hoare is false [2018-10-27 04:47:17,919 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-10-27 04:47:17,919 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-10-27 04:47:17,919 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-10-27 04:47:17,919 INFO L387 AbstractCegarLoop]: Difference is false [2018-10-27 04:47:17,923 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-10-27 04:47:17,923 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-10-27 04:47:17,938 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states. [2018-10-27 04:47:17,945 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-10-27 04:47:17,946 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:17,947 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:17,950 INFO L424 AbstractCegarLoop]: === Iteration 1 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:17,956 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:17,956 INFO L82 PathProgramCache]: Analyzing trace with hash 1399408321, now seen corresponding path program 1 times [2018-10-27 04:47:17,959 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:17,959 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:17,974 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:18,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:18,027 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:18,063 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:18,065 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:18,094 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:18,095 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-27 04:47:18,119 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:18,119 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:18,122 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:18,123 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-27 04:47:18,125 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-27 04:47:18,134 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-27 04:47:18,135 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:47:18,137 INFO L87 Difference]: Start difference. First operand 176 states. Second operand 3 states. [2018-10-27 04:47:18,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:18,928 INFO L93 Difference]: Finished difference Result 201 states and 208 transitions. [2018-10-27 04:47:18,929 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-27 04:47:18,930 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-10-27 04:47:18,930 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:18,938 INFO L225 Difference]: With dead ends: 201 [2018-10-27 04:47:18,938 INFO L226 Difference]: Without dead ends: 197 [2018-10-27 04:47:18,940 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:47:18,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2018-10-27 04:47:18,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 171. [2018-10-27 04:47:18,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171 states. [2018-10-27 04:47:18,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 176 transitions. [2018-10-27 04:47:18,981 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 176 transitions. Word has length 7 [2018-10-27 04:47:18,981 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:18,981 INFO L481 AbstractCegarLoop]: Abstraction has 171 states and 176 transitions. [2018-10-27 04:47:18,981 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-27 04:47:18,981 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 176 transitions. [2018-10-27 04:47:18,982 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-10-27 04:47:18,982 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:18,982 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:18,983 INFO L424 AbstractCegarLoop]: === Iteration 2 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:18,986 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:18,986 INFO L82 PathProgramCache]: Analyzing trace with hash 431985030, now seen corresponding path program 1 times [2018-10-27 04:47:18,987 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:18,987 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:19,016 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:19,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:19,048 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:19,076 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:19,077 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:19,163 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:19,163 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:12 [2018-10-27 04:47:19,181 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:19,181 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:19,184 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:19,184 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-27 04:47:19,185 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-27 04:47:19,185 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-27 04:47:19,186 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:47:19,186 INFO L87 Difference]: Start difference. First operand 171 states and 176 transitions. Second operand 3 states. [2018-10-27 04:47:19,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:19,544 INFO L93 Difference]: Finished difference Result 169 states and 174 transitions. [2018-10-27 04:47:19,545 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-27 04:47:19,545 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 8 [2018-10-27 04:47:19,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:19,547 INFO L225 Difference]: With dead ends: 169 [2018-10-27 04:47:19,547 INFO L226 Difference]: Without dead ends: 169 [2018-10-27 04:47:19,547 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:47:19,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2018-10-27 04:47:19,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 169. [2018-10-27 04:47:19,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-10-27 04:47:19,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 174 transitions. [2018-10-27 04:47:19,561 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 174 transitions. Word has length 8 [2018-10-27 04:47:19,561 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:19,561 INFO L481 AbstractCegarLoop]: Abstraction has 169 states and 174 transitions. [2018-10-27 04:47:19,561 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-27 04:47:19,562 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 174 transitions. [2018-10-27 04:47:19,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2018-10-27 04:47:19,562 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:19,562 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:19,563 INFO L424 AbstractCegarLoop]: === Iteration 3 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:19,564 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:19,564 INFO L82 PathProgramCache]: Analyzing trace with hash 506634083, now seen corresponding path program 1 times [2018-10-27 04:47:19,564 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:19,564 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:19,583 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:19,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:19,613 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:19,625 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:19,625 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:19,629 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:19,629 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:47:19,653 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:19,653 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:19,656 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:19,656 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:19,656 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:47:19,656 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:47:19,657 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:19,657 INFO L87 Difference]: Start difference. First operand 169 states and 174 transitions. Second operand 5 states. [2018-10-27 04:47:20,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:20,245 INFO L93 Difference]: Finished difference Result 194 states and 200 transitions. [2018-10-27 04:47:20,245 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 04:47:20,245 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 9 [2018-10-27 04:47:20,246 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:20,246 INFO L225 Difference]: With dead ends: 194 [2018-10-27 04:47:20,246 INFO L226 Difference]: Without dead ends: 194 [2018-10-27 04:47:20,247 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2018-10-27 04:47:20,247 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2018-10-27 04:47:20,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 168. [2018-10-27 04:47:20,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-10-27 04:47:20,254 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 173 transitions. [2018-10-27 04:47:20,254 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 173 transitions. Word has length 9 [2018-10-27 04:47:20,255 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:20,255 INFO L481 AbstractCegarLoop]: Abstraction has 168 states and 173 transitions. [2018-10-27 04:47:20,255 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:47:20,255 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 173 transitions. [2018-10-27 04:47:20,256 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2018-10-27 04:47:20,256 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:20,256 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:20,258 INFO L424 AbstractCegarLoop]: === Iteration 4 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:20,258 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:20,258 INFO L82 PathProgramCache]: Analyzing trace with hash -1474212568, now seen corresponding path program 1 times [2018-10-27 04:47:20,258 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:20,258 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:20,273 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:20,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:20,308 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:20,317 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:20,318 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:20,353 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:20,353 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:47:20,430 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:20,430 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:20,439 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:20,440 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 04:47:20,440 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:47:20,440 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:47:20,440 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:47:20,440 INFO L87 Difference]: Start difference. First operand 168 states and 173 transitions. Second operand 4 states. [2018-10-27 04:47:21,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:21,016 INFO L93 Difference]: Finished difference Result 167 states and 172 transitions. [2018-10-27 04:47:21,016 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 04:47:21,016 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 10 [2018-10-27 04:47:21,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:21,018 INFO L225 Difference]: With dead ends: 167 [2018-10-27 04:47:21,018 INFO L226 Difference]: Without dead ends: 167 [2018-10-27 04:47:21,018 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:21,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2018-10-27 04:47:21,024 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 167. [2018-10-27 04:47:21,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-10-27 04:47:21,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 172 transitions. [2018-10-27 04:47:21,026 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 172 transitions. Word has length 10 [2018-10-27 04:47:21,027 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:21,027 INFO L481 AbstractCegarLoop]: Abstraction has 167 states and 172 transitions. [2018-10-27 04:47:21,027 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:47:21,027 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 172 transitions. [2018-10-27 04:47:21,027 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-10-27 04:47:21,027 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:21,028 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:21,029 INFO L424 AbstractCegarLoop]: === Iteration 5 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:21,029 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:21,029 INFO L82 PathProgramCache]: Analyzing trace with hash 1544050693, now seen corresponding path program 1 times [2018-10-27 04:47:21,029 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:21,030 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:21,047 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:21,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:21,093 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:21,096 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:21,096 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:21,100 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:21,100 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:47:21,117 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:21,117 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:21,120 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:21,120 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:21,121 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:47:21,121 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:47:21,121 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:21,121 INFO L87 Difference]: Start difference. First operand 167 states and 172 transitions. Second operand 5 states. [2018-10-27 04:47:21,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:21,756 INFO L93 Difference]: Finished difference Result 192 states and 198 transitions. [2018-10-27 04:47:21,756 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-27 04:47:21,756 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 11 [2018-10-27 04:47:21,757 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:21,757 INFO L225 Difference]: With dead ends: 192 [2018-10-27 04:47:21,757 INFO L226 Difference]: Without dead ends: 192 [2018-10-27 04:47:21,757 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:47:21,758 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 192 states. [2018-10-27 04:47:21,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 192 to 166. [2018-10-27 04:47:21,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-10-27 04:47:21,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 171 transitions. [2018-10-27 04:47:21,768 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 171 transitions. Word has length 11 [2018-10-27 04:47:21,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:21,769 INFO L481 AbstractCegarLoop]: Abstraction has 166 states and 171 transitions. [2018-10-27 04:47:21,769 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:47:21,769 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 171 transitions. [2018-10-27 04:47:21,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-10-27 04:47:21,769 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:21,769 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:21,770 INFO L424 AbstractCegarLoop]: === Iteration 6 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:21,770 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:21,770 INFO L82 PathProgramCache]: Analyzing trace with hash 620931274, now seen corresponding path program 1 times [2018-10-27 04:47:21,771 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:21,771 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:21,803 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:21,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:21,841 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:21,848 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:21,848 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:21,861 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:21,861 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:47:21,905 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:21,905 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:21,914 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:21,914 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 04:47:21,915 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:47:21,915 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:47:21,915 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:47:21,915 INFO L87 Difference]: Start difference. First operand 166 states and 171 transitions. Second operand 4 states. [2018-10-27 04:47:22,357 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:22,357 INFO L93 Difference]: Finished difference Result 165 states and 170 transitions. [2018-10-27 04:47:22,357 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 04:47:22,357 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 12 [2018-10-27 04:47:22,357 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:22,358 INFO L225 Difference]: With dead ends: 165 [2018-10-27 04:47:22,358 INFO L226 Difference]: Without dead ends: 165 [2018-10-27 04:47:22,358 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:22,359 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-10-27 04:47:22,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 165. [2018-10-27 04:47:22,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-10-27 04:47:22,363 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 170 transitions. [2018-10-27 04:47:22,363 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 170 transitions. Word has length 12 [2018-10-27 04:47:22,363 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:22,363 INFO L481 AbstractCegarLoop]: Abstraction has 165 states and 170 transitions. [2018-10-27 04:47:22,363 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:47:22,363 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 170 transitions. [2018-10-27 04:47:22,365 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-10-27 04:47:22,365 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:22,365 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:22,366 INFO L424 AbstractCegarLoop]: === Iteration 7 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:22,367 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:22,367 INFO L82 PathProgramCache]: Analyzing trace with hash -260511415, now seen corresponding path program 1 times [2018-10-27 04:47:22,367 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:22,367 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:22,384 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:22,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:22,459 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:22,463 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:22,463 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:22,465 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:22,465 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-27 04:47:22,471 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:22,471 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:22,475 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:22,475 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 04:47:22,475 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:47:22,475 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:47:22,475 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:47:22,476 INFO L87 Difference]: Start difference. First operand 165 states and 170 transitions. Second operand 4 states. [2018-10-27 04:47:22,862 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:22,862 INFO L93 Difference]: Finished difference Result 188 states and 194 transitions. [2018-10-27 04:47:22,862 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 04:47:22,862 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2018-10-27 04:47:22,863 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:22,863 INFO L225 Difference]: With dead ends: 188 [2018-10-27 04:47:22,863 INFO L226 Difference]: Without dead ends: 188 [2018-10-27 04:47:22,863 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:22,864 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states. [2018-10-27 04:47:22,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 177. [2018-10-27 04:47:22,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-10-27 04:47:22,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 192 transitions. [2018-10-27 04:47:22,867 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 192 transitions. Word has length 15 [2018-10-27 04:47:22,867 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:22,867 INFO L481 AbstractCegarLoop]: Abstraction has 177 states and 192 transitions. [2018-10-27 04:47:22,867 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:47:22,867 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 192 transitions. [2018-10-27 04:47:22,869 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-10-27 04:47:22,869 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:22,869 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:22,871 INFO L424 AbstractCegarLoop]: === Iteration 8 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:22,871 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:22,871 INFO L82 PathProgramCache]: Analyzing trace with hash 514080782, now seen corresponding path program 1 times [2018-10-27 04:47:22,871 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:22,871 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:22,886 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:22,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:22,958 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:22,965 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:22,965 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:22,969 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:22,969 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:47:22,987 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:22,987 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:22,989 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:22,989 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 04:47:22,989 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:47:22,990 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:47:22,990 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:47:22,990 INFO L87 Difference]: Start difference. First operand 177 states and 192 transitions. Second operand 4 states. [2018-10-27 04:47:23,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:23,635 INFO L93 Difference]: Finished difference Result 288 states and 299 transitions. [2018-10-27 04:47:23,636 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 04:47:23,636 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2018-10-27 04:47:23,637 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:23,637 INFO L225 Difference]: With dead ends: 288 [2018-10-27 04:47:23,637 INFO L226 Difference]: Without dead ends: 288 [2018-10-27 04:47:23,637 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:23,638 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 288 states. [2018-10-27 04:47:23,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 288 to 176. [2018-10-27 04:47:23,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-10-27 04:47:23,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 189 transitions. [2018-10-27 04:47:23,641 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 189 transitions. Word has length 16 [2018-10-27 04:47:23,641 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:23,641 INFO L481 AbstractCegarLoop]: Abstraction has 176 states and 189 transitions. [2018-10-27 04:47:23,641 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:47:23,641 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 189 transitions. [2018-10-27 04:47:23,641 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-10-27 04:47:23,641 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:23,641 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:23,642 INFO L424 AbstractCegarLoop]: === Iteration 9 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:23,643 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:23,643 INFO L82 PathProgramCache]: Analyzing trace with hash -1243364885, now seen corresponding path program 1 times [2018-10-27 04:47:23,643 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:23,643 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:23,659 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:23,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:23,731 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:23,740 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:23,740 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:23,742 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:23,743 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-27 04:47:23,759 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:23,759 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:23,761 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:23,761 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 04:47:23,761 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:47:23,761 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:47:23,761 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:47:23,762 INFO L87 Difference]: Start difference. First operand 176 states and 189 transitions. Second operand 4 states. [2018-10-27 04:47:24,132 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:24,132 INFO L93 Difference]: Finished difference Result 184 states and 190 transitions. [2018-10-27 04:47:24,133 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 04:47:24,133 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 17 [2018-10-27 04:47:24,133 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:24,133 INFO L225 Difference]: With dead ends: 184 [2018-10-27 04:47:24,134 INFO L226 Difference]: Without dead ends: 184 [2018-10-27 04:47:24,134 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:24,134 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-10-27 04:47:24,136 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 175. [2018-10-27 04:47:24,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-10-27 04:47:24,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 188 transitions. [2018-10-27 04:47:24,137 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 188 transitions. Word has length 17 [2018-10-27 04:47:24,137 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:24,137 INFO L481 AbstractCegarLoop]: Abstraction has 175 states and 188 transitions. [2018-10-27 04:47:24,137 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:47:24,138 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 188 transitions. [2018-10-27 04:47:24,138 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-10-27 04:47:24,138 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:24,138 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:24,139 INFO L424 AbstractCegarLoop]: === Iteration 10 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:24,139 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:24,139 INFO L82 PathProgramCache]: Analyzing trace with hash 110394288, now seen corresponding path program 1 times [2018-10-27 04:47:24,143 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:24,144 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:24,157 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:24,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:24,253 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:24,257 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:24,258 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:24,261 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:24,262 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:47:24,275 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:24,275 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:24,278 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:24,278 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 04:47:24,279 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:47:24,279 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:47:24,279 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:47:24,279 INFO L87 Difference]: Start difference. First operand 175 states and 188 transitions. Second operand 4 states. [2018-10-27 04:47:25,427 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:25,427 INFO L93 Difference]: Finished difference Result 307 states and 319 transitions. [2018-10-27 04:47:25,428 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 04:47:25,429 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 18 [2018-10-27 04:47:25,429 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:25,430 INFO L225 Difference]: With dead ends: 307 [2018-10-27 04:47:25,430 INFO L226 Difference]: Without dead ends: 307 [2018-10-27 04:47:25,430 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:25,430 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 307 states. [2018-10-27 04:47:25,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 307 to 174. [2018-10-27 04:47:25,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-10-27 04:47:25,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 187 transitions. [2018-10-27 04:47:25,434 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 187 transitions. Word has length 18 [2018-10-27 04:47:25,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:25,434 INFO L481 AbstractCegarLoop]: Abstraction has 174 states and 187 transitions. [2018-10-27 04:47:25,434 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:47:25,435 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 187 transitions. [2018-10-27 04:47:25,435 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-10-27 04:47:25,435 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:25,435 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:25,438 INFO L424 AbstractCegarLoop]: === Iteration 11 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:25,438 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:25,438 INFO L82 PathProgramCache]: Analyzing trace with hash -1188652175, now seen corresponding path program 1 times [2018-10-27 04:47:25,439 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:25,439 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:25,453 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:25,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:25,584 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:25,623 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:25,623 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:25,648 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:25,649 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-27 04:47:25,781 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-10-27 04:47:25,781 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:25,785 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:47:25,785 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:14, output treesize:11 [2018-10-27 04:47:25,807 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:25,807 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:25,809 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:25,809 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:25,809 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:47:25,809 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:47:25,809 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:25,810 INFO L87 Difference]: Start difference. First operand 174 states and 187 transitions. Second operand 5 states. [2018-10-27 04:47:26,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:26,544 INFO L93 Difference]: Finished difference Result 235 states and 245 transitions. [2018-10-27 04:47:26,545 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 04:47:26,545 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2018-10-27 04:47:26,545 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:26,546 INFO L225 Difference]: With dead ends: 235 [2018-10-27 04:47:26,546 INFO L226 Difference]: Without dead ends: 235 [2018-10-27 04:47:26,546 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:47:26,547 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 235 states. [2018-10-27 04:47:26,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 235 to 177. [2018-10-27 04:47:26,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-10-27 04:47:26,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 191 transitions. [2018-10-27 04:47:26,549 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 191 transitions. Word has length 21 [2018-10-27 04:47:26,550 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:26,550 INFO L481 AbstractCegarLoop]: Abstraction has 177 states and 191 transitions. [2018-10-27 04:47:26,550 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:47:26,550 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 191 transitions. [2018-10-27 04:47:26,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-10-27 04:47:26,550 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:26,550 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:26,551 INFO L424 AbstractCegarLoop]: === Iteration 12 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:26,551 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:26,555 INFO L82 PathProgramCache]: Analyzing trace with hash 1806488312, now seen corresponding path program 1 times [2018-10-27 04:47:26,555 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:26,555 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:26,575 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:26,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:26,711 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:26,717 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:26,717 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:26,730 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:26,730 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:26,736 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:26,736 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-10-27 04:47:26,801 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:26,802 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:26,803 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-10-27 04:47:26,803 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:26,818 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-10-27 04:47:26,819 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:26,846 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:26,846 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:32, output treesize:14 [2018-10-27 04:47:26,858 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:26,858 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:26,863 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:26,863 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:26,863 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:47:26,863 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:47:26,863 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:26,864 INFO L87 Difference]: Start difference. First operand 177 states and 191 transitions. Second operand 5 states. [2018-10-27 04:47:27,872 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:27,872 INFO L93 Difference]: Finished difference Result 234 states and 244 transitions. [2018-10-27 04:47:27,873 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 04:47:27,873 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-10-27 04:47:27,873 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:27,874 INFO L225 Difference]: With dead ends: 234 [2018-10-27 04:47:27,874 INFO L226 Difference]: Without dead ends: 234 [2018-10-27 04:47:27,874 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 18 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:47:27,875 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 234 states. [2018-10-27 04:47:27,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 234 to 178. [2018-10-27 04:47:27,877 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-10-27 04:47:27,878 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 192 transitions. [2018-10-27 04:47:27,878 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 192 transitions. Word has length 22 [2018-10-27 04:47:27,878 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:27,878 INFO L481 AbstractCegarLoop]: Abstraction has 178 states and 192 transitions. [2018-10-27 04:47:27,878 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:47:27,878 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 192 transitions. [2018-10-27 04:47:27,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-10-27 04:47:27,879 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:27,879 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:27,882 INFO L424 AbstractCegarLoop]: === Iteration 13 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:27,882 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:27,882 INFO L82 PathProgramCache]: Analyzing trace with hash 166562899, now seen corresponding path program 1 times [2018-10-27 04:47:27,882 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:27,882 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:27,897 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:27,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:27,977 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:27,992 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:27,992 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:27,994 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:27,994 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 04:47:27,994 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:47:27,994 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:47:27,994 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:47:27,994 INFO L87 Difference]: Start difference. First operand 178 states and 192 transitions. Second operand 4 states. [2018-10-27 04:47:28,463 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:28,463 INFO L93 Difference]: Finished difference Result 205 states and 222 transitions. [2018-10-27 04:47:28,464 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 04:47:28,464 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2018-10-27 04:47:28,464 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:28,465 INFO L225 Difference]: With dead ends: 205 [2018-10-27 04:47:28,465 INFO L226 Difference]: Without dead ends: 205 [2018-10-27 04:47:28,465 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:28,465 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states. [2018-10-27 04:47:28,467 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 176. [2018-10-27 04:47:28,467 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-10-27 04:47:28,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 190 transitions. [2018-10-27 04:47:28,467 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 190 transitions. Word has length 23 [2018-10-27 04:47:28,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:28,468 INFO L481 AbstractCegarLoop]: Abstraction has 176 states and 190 transitions. [2018-10-27 04:47:28,472 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:47:28,472 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 190 transitions. [2018-10-27 04:47:28,472 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-10-27 04:47:28,472 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:28,472 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:28,473 INFO L424 AbstractCegarLoop]: === Iteration 14 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:28,473 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:28,473 INFO L82 PathProgramCache]: Analyzing trace with hash 868482650, now seen corresponding path program 1 times [2018-10-27 04:47:28,474 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:28,474 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:28,489 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:28,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:28,587 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:28,627 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:28,627 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:28,629 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:28,629 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-27 04:47:28,629 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-27 04:47:28,629 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-27 04:47:28,629 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-10-27 04:47:28,630 INFO L87 Difference]: Start difference. First operand 176 states and 190 transitions. Second operand 6 states. [2018-10-27 04:47:29,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:29,225 INFO L93 Difference]: Finished difference Result 248 states and 259 transitions. [2018-10-27 04:47:29,227 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-27 04:47:29,227 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 24 [2018-10-27 04:47:29,227 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:29,228 INFO L225 Difference]: With dead ends: 248 [2018-10-27 04:47:29,228 INFO L226 Difference]: Without dead ends: 248 [2018-10-27 04:47:29,228 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=35, Invalid=55, Unknown=0, NotChecked=0, Total=90 [2018-10-27 04:47:29,229 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 248 states. [2018-10-27 04:47:29,231 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 248 to 178. [2018-10-27 04:47:29,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-10-27 04:47:29,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 192 transitions. [2018-10-27 04:47:29,234 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 192 transitions. Word has length 24 [2018-10-27 04:47:29,234 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:29,234 INFO L481 AbstractCegarLoop]: Abstraction has 178 states and 192 transitions. [2018-10-27 04:47:29,234 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-27 04:47:29,234 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 192 transitions. [2018-10-27 04:47:29,234 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-10-27 04:47:29,235 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:29,235 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:29,235 INFO L424 AbstractCegarLoop]: === Iteration 15 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:29,235 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:29,236 INFO L82 PathProgramCache]: Analyzing trace with hash 1153158453, now seen corresponding path program 1 times [2018-10-27 04:47:29,239 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:29,239 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:29,268 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:29,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:29,401 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:29,420 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:29,420 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:29,458 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:29,458 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:15 [2018-10-27 04:47:29,482 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:47:29,484 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:29,484 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:29,486 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:29,493 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:29,493 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:22, output treesize:13 [2018-10-27 04:47:29,505 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-10-27 04:47:29,507 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-10-27 04:47:29,507 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:29,512 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:29,514 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:29,514 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-10-27 04:47:29,529 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:29,529 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:29,533 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:29,534 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-27 04:47:29,534 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-27 04:47:29,534 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-27 04:47:29,534 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:47:29,534 INFO L87 Difference]: Start difference. First operand 178 states and 192 transitions. Second operand 7 states. [2018-10-27 04:47:30,799 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:30,799 INFO L93 Difference]: Finished difference Result 247 states and 258 transitions. [2018-10-27 04:47:30,800 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-10-27 04:47:30,800 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 25 [2018-10-27 04:47:30,800 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:30,801 INFO L225 Difference]: With dead ends: 247 [2018-10-27 04:47:30,801 INFO L226 Difference]: Without dead ends: 247 [2018-10-27 04:47:30,801 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=56, Invalid=100, Unknown=0, NotChecked=0, Total=156 [2018-10-27 04:47:30,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 247 states. [2018-10-27 04:47:30,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 247 to 179. [2018-10-27 04:47:30,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-10-27 04:47:30,805 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 193 transitions. [2018-10-27 04:47:30,805 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 193 transitions. Word has length 25 [2018-10-27 04:47:30,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:30,805 INFO L481 AbstractCegarLoop]: Abstraction has 179 states and 193 transitions. [2018-10-27 04:47:30,806 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-27 04:47:30,806 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 193 transitions. [2018-10-27 04:47:30,806 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-10-27 04:47:30,806 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:30,806 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:30,807 INFO L424 AbstractCegarLoop]: === Iteration 16 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:30,807 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:30,807 INFO L82 PathProgramCache]: Analyzing trace with hash -1159366498, now seen corresponding path program 1 times [2018-10-27 04:47:30,807 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:30,807 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:30,829 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:30,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:30,901 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:30,906 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:30,906 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:30,908 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:30,908 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-27 04:47:30,920 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:30,920 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:30,921 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:30,921 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:30,922 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:47:30,922 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:47:30,922 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:30,922 INFO L87 Difference]: Start difference. First operand 179 states and 193 transitions. Second operand 5 states. [2018-10-27 04:47:32,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:32,385 INFO L93 Difference]: Finished difference Result 266 states and 277 transitions. [2018-10-27 04:47:32,386 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 04:47:32,386 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2018-10-27 04:47:32,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:32,387 INFO L225 Difference]: With dead ends: 266 [2018-10-27 04:47:32,388 INFO L226 Difference]: Without dead ends: 266 [2018-10-27 04:47:32,388 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:47:32,388 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 266 states. [2018-10-27 04:47:32,396 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 266 to 181. [2018-10-27 04:47:32,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181 states. [2018-10-27 04:47:32,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 195 transitions. [2018-10-27 04:47:32,397 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 195 transitions. Word has length 26 [2018-10-27 04:47:32,397 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:32,397 INFO L481 AbstractCegarLoop]: Abstraction has 181 states and 195 transitions. [2018-10-27 04:47:32,397 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:47:32,397 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 195 transitions. [2018-10-27 04:47:32,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-10-27 04:47:32,398 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:32,398 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:32,398 INFO L424 AbstractCegarLoop]: === Iteration 17 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:32,398 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:32,399 INFO L82 PathProgramCache]: Analyzing trace with hash 1388173756, now seen corresponding path program 1 times [2018-10-27 04:47:32,399 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:32,399 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:32,413 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:32,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:32,533 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:32,600 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:32,601 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:32,647 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:32,647 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:19, output treesize:18 [2018-10-27 04:47:32,671 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:47:32,673 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:32,674 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:32,678 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:32,691 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:47:32,693 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:32,693 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:32,698 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:32,706 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:32,706 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:33, output treesize:20 [2018-10-27 04:47:32,734 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-10-27 04:47:32,741 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-10-27 04:47:32,742 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:32,744 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:32,754 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-10-27 04:47:32,756 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-10-27 04:47:32,756 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:32,766 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:32,771 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:32,772 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:36, output treesize:14 [2018-10-27 04:47:32,784 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:32,784 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:32,786 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:32,786 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-27 04:47:32,786 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-27 04:47:32,787 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-27 04:47:32,787 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:47:32,787 INFO L87 Difference]: Start difference. First operand 181 states and 195 transitions. Second operand 7 states. [2018-10-27 04:47:33,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:33,595 INFO L93 Difference]: Finished difference Result 242 states and 253 transitions. [2018-10-27 04:47:33,596 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-27 04:47:33,596 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 26 [2018-10-27 04:47:33,596 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:33,597 INFO L225 Difference]: With dead ends: 242 [2018-10-27 04:47:33,597 INFO L226 Difference]: Without dead ends: 242 [2018-10-27 04:47:33,597 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=44, Invalid=88, Unknown=0, NotChecked=0, Total=132 [2018-10-27 04:47:33,598 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 242 states. [2018-10-27 04:47:33,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 242 to 182. [2018-10-27 04:47:33,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-10-27 04:47:33,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 196 transitions. [2018-10-27 04:47:33,602 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 196 transitions. Word has length 26 [2018-10-27 04:47:33,602 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:33,602 INFO L481 AbstractCegarLoop]: Abstraction has 182 states and 196 transitions. [2018-10-27 04:47:33,602 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-27 04:47:33,602 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 196 transitions. [2018-10-27 04:47:33,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-10-27 04:47:33,603 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:33,603 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:33,604 INFO L424 AbstractCegarLoop]: === Iteration 18 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:33,606 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:33,606 INFO L82 PathProgramCache]: Analyzing trace with hash -1580622855, now seen corresponding path program 1 times [2018-10-27 04:47:33,606 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:33,606 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:33,637 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:33,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:33,788 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:33,809 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:33,809 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,880 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,880 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:47:33,962 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:33,962 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:33,964 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:33,965 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:33,965 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:47:33,965 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:47:33,965 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:33,965 INFO L87 Difference]: Start difference. First operand 182 states and 196 transitions. Second operand 5 states. [2018-10-27 04:47:34,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:34,679 INFO L93 Difference]: Finished difference Result 244 states and 255 transitions. [2018-10-27 04:47:34,680 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 04:47:34,680 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2018-10-27 04:47:34,680 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:34,681 INFO L225 Difference]: With dead ends: 244 [2018-10-27 04:47:34,681 INFO L226 Difference]: Without dead ends: 244 [2018-10-27 04:47:34,681 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:47:34,682 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 244 states. [2018-10-27 04:47:34,684 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 244 to 182. [2018-10-27 04:47:34,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-10-27 04:47:34,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 195 transitions. [2018-10-27 04:47:34,684 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 195 transitions. Word has length 27 [2018-10-27 04:47:34,685 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:34,685 INFO L481 AbstractCegarLoop]: Abstraction has 182 states and 195 transitions. [2018-10-27 04:47:34,685 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:47:34,685 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 195 transitions. [2018-10-27 04:47:34,685 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-10-27 04:47:34,685 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:34,685 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:34,686 INFO L424 AbstractCegarLoop]: === Iteration 19 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:34,686 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:34,686 INFO L82 PathProgramCache]: Analyzing trace with hash 83713559, now seen corresponding path program 1 times [2018-10-27 04:47:34,686 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:34,686 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:34,721 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:34,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:34,826 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:34,855 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:34,856 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:34,857 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:34,857 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:34,857 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:47:34,858 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:47:34,858 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:34,858 INFO L87 Difference]: Start difference. First operand 182 states and 195 transitions. Second operand 5 states. [2018-10-27 04:47:35,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:35,549 INFO L93 Difference]: Finished difference Result 200 states and 216 transitions. [2018-10-27 04:47:35,550 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-27 04:47:35,550 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2018-10-27 04:47:35,550 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:35,550 INFO L225 Difference]: With dead ends: 200 [2018-10-27 04:47:35,550 INFO L226 Difference]: Without dead ends: 200 [2018-10-27 04:47:35,551 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-10-27 04:47:35,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 200 states. [2018-10-27 04:47:35,552 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 200 to 177. [2018-10-27 04:47:35,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-10-27 04:47:35,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 190 transitions. [2018-10-27 04:47:35,553 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 190 transitions. Word has length 27 [2018-10-27 04:47:35,553 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:35,553 INFO L481 AbstractCegarLoop]: Abstraction has 177 states and 190 transitions. [2018-10-27 04:47:35,553 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:47:35,553 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 190 transitions. [2018-10-27 04:47:35,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-10-27 04:47:35,554 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:35,554 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:35,554 INFO L424 AbstractCegarLoop]: === Iteration 20 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:35,554 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:35,554 INFO L82 PathProgramCache]: Analyzing trace with hash -1699846882, now seen corresponding path program 1 times [2018-10-27 04:47:35,555 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:35,555 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:35,588 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:35,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:35,721 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:35,795 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:35,795 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:35,797 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:35,797 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-27 04:47:35,797 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-27 04:47:35,797 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-27 04:47:35,797 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:47:35,798 INFO L87 Difference]: Start difference. First operand 177 states and 190 transitions. Second operand 7 states. [2018-10-27 04:47:36,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:36,729 INFO L93 Difference]: Finished difference Result 281 states and 296 transitions. [2018-10-27 04:47:36,730 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-27 04:47:36,730 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 28 [2018-10-27 04:47:36,730 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:36,730 INFO L225 Difference]: With dead ends: 281 [2018-10-27 04:47:36,730 INFO L226 Difference]: Without dead ends: 281 [2018-10-27 04:47:36,731 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=73, Unknown=0, NotChecked=0, Total=110 [2018-10-27 04:47:36,731 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 281 states. [2018-10-27 04:47:36,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 281 to 179. [2018-10-27 04:47:36,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-10-27 04:47:36,733 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 192 transitions. [2018-10-27 04:47:36,734 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 192 transitions. Word has length 28 [2018-10-27 04:47:36,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:36,734 INFO L481 AbstractCegarLoop]: Abstraction has 179 states and 192 transitions. [2018-10-27 04:47:36,734 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-27 04:47:36,734 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 192 transitions. [2018-10-27 04:47:36,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-10-27 04:47:36,734 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:36,735 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:36,735 INFO L424 AbstractCegarLoop]: === Iteration 21 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:36,735 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:36,735 INFO L82 PathProgramCache]: Analyzing trace with hash -1155645703, now seen corresponding path program 1 times [2018-10-27 04:47:36,735 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:36,739 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:36,752 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:36,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:36,969 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:36,980 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:36,980 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:36,989 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:36,989 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:47:37,013 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:37,014 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:37,015 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-10-27 04:47:37,015 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:37,026 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:37,026 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:26, output treesize:24 [2018-10-27 04:47:37,050 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:47:37,052 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:37,052 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:37,055 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:37,069 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:37,069 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:37, output treesize:32 [2018-10-27 04:47:37,208 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2018-10-27 04:47:37,210 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-27 04:47:37,210 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:37,218 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:37,229 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:37,229 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:47, output treesize:28 [2018-10-27 04:47:37,247 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-10-27 04:47:37,249 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-10-27 04:47:37,249 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:37,253 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:37,259 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:47:37,259 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:17 [2018-10-27 04:47:37,276 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:37,276 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:37,278 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:37,278 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-10-27 04:47:37,278 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-27 04:47:37,278 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-27 04:47:37,278 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-10-27 04:47:37,279 INFO L87 Difference]: Start difference. First operand 179 states and 192 transitions. Second operand 9 states. [2018-10-27 04:47:38,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:38,679 INFO L93 Difference]: Finished difference Result 328 states and 346 transitions. [2018-10-27 04:47:38,684 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-10-27 04:47:38,684 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-10-27 04:47:38,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:38,687 INFO L225 Difference]: With dead ends: 328 [2018-10-27 04:47:38,687 INFO L226 Difference]: Without dead ends: 328 [2018-10-27 04:47:38,687 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=76, Invalid=164, Unknown=0, NotChecked=0, Total=240 [2018-10-27 04:47:38,687 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 328 states. [2018-10-27 04:47:38,692 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 328 to 180. [2018-10-27 04:47:38,692 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-10-27 04:47:38,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 193 transitions. [2018-10-27 04:47:38,693 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 193 transitions. Word has length 29 [2018-10-27 04:47:38,693 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:38,693 INFO L481 AbstractCegarLoop]: Abstraction has 180 states and 193 transitions. [2018-10-27 04:47:38,693 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-27 04:47:38,693 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 193 transitions. [2018-10-27 04:47:38,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-10-27 04:47:38,694 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:38,694 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:38,694 INFO L424 AbstractCegarLoop]: === Iteration 22 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:38,694 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:38,695 INFO L82 PathProgramCache]: Analyzing trace with hash -1465278336, now seen corresponding path program 1 times [2018-10-27 04:47:38,695 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:38,695 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:38,718 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:38,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:38,941 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:38,960 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:38,960 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:39,021 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:39,022 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:47:39,036 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:39,037 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:39,037 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-27 04:47:39,038 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:39,059 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:39,060 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:39,075 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:39,075 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:29, output treesize:22 [2018-10-27 04:47:39,111 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:47:39,114 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:39,114 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:39,117 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:39,137 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:47:39,141 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:39,141 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:39,143 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:39,158 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:39,158 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:43, output treesize:34 [2018-10-27 04:47:39,228 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-10-27 04:47:39,231 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-27 04:47:39,231 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:39,262 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:39,286 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 46 [2018-10-27 04:47:39,288 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-27 04:47:39,289 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:39,302 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:39,317 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:39,318 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:68, output treesize:30 [2018-10-27 04:47:39,360 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:47:39,384 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-27 04:47:39,385 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:39,412 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:39,451 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-10-27 04:47:39,453 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-10-27 04:47:39,454 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:39,458 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:39,465 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:39,465 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:42, output treesize:12 [2018-10-27 04:47:39,483 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:39,483 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:39,485 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:39,485 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-10-27 04:47:39,486 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-27 04:47:39,486 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-27 04:47:39,486 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-10-27 04:47:39,486 INFO L87 Difference]: Start difference. First operand 180 states and 193 transitions. Second operand 9 states. [2018-10-27 04:47:41,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:41,232 INFO L93 Difference]: Finished difference Result 361 states and 380 transitions. [2018-10-27 04:47:41,233 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-10-27 04:47:41,233 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 30 [2018-10-27 04:47:41,233 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:41,234 INFO L225 Difference]: With dead ends: 361 [2018-10-27 04:47:41,234 INFO L226 Difference]: Without dead ends: 361 [2018-10-27 04:47:41,234 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=60, Invalid=180, Unknown=0, NotChecked=0, Total=240 [2018-10-27 04:47:41,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 361 states. [2018-10-27 04:47:41,236 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 361 to 181. [2018-10-27 04:47:41,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181 states. [2018-10-27 04:47:41,237 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 194 transitions. [2018-10-27 04:47:41,237 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 194 transitions. Word has length 30 [2018-10-27 04:47:41,237 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:41,237 INFO L481 AbstractCegarLoop]: Abstraction has 181 states and 194 transitions. [2018-10-27 04:47:41,237 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-27 04:47:41,238 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 194 transitions. [2018-10-27 04:47:41,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-10-27 04:47:41,238 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:41,238 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:41,239 INFO L424 AbstractCegarLoop]: === Iteration 23 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:41,239 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:41,239 INFO L82 PathProgramCache]: Analyzing trace with hash 616795330, now seen corresponding path program 1 times [2018-10-27 04:47:41,239 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:41,239 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:41,254 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:41,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:41,378 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:41,381 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-10-27 04:47:41,383 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-10-27 04:47:41,383 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:41,388 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:41,392 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:41,392 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:11, output treesize:3 [2018-10-27 04:47:41,408 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:41,408 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:41,409 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:41,410 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:41,410 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:47:41,410 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:47:41,410 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:41,410 INFO L87 Difference]: Start difference. First operand 181 states and 194 transitions. Second operand 5 states. [2018-10-27 04:47:41,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:41,873 INFO L93 Difference]: Finished difference Result 186 states and 194 transitions. [2018-10-27 04:47:41,874 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-27 04:47:41,874 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 32 [2018-10-27 04:47:41,874 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:41,875 INFO L225 Difference]: With dead ends: 186 [2018-10-27 04:47:41,875 INFO L226 Difference]: Without dead ends: 186 [2018-10-27 04:47:41,875 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:47:41,875 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states. [2018-10-27 04:47:41,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 178. [2018-10-27 04:47:41,877 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-10-27 04:47:41,878 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 191 transitions. [2018-10-27 04:47:41,878 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 191 transitions. Word has length 32 [2018-10-27 04:47:41,878 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:41,878 INFO L481 AbstractCegarLoop]: Abstraction has 178 states and 191 transitions. [2018-10-27 04:47:41,878 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:47:41,878 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 191 transitions. [2018-10-27 04:47:41,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-10-27 04:47:41,879 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:41,879 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:41,879 INFO L424 AbstractCegarLoop]: === Iteration 24 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:41,879 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:41,879 INFO L82 PathProgramCache]: Analyzing trace with hash 1940786148, now seen corresponding path program 1 times [2018-10-27 04:47:41,884 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:41,884 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:41,912 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:42,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:42,165 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:42,168 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:42,168 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:42,180 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:42,180 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:47:42,209 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:42,212 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:42,213 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-27 04:47:42,213 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:42,227 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:42,227 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:42,238 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:42,238 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:29, output treesize:22 [2018-10-27 04:47:42,269 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:47:42,271 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:42,271 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:42,275 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:42,293 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:47:42,316 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:42,317 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:42,340 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:42,363 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:42,363 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:43, output treesize:34 [2018-10-27 04:47:42,415 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-10-27 04:47:42,420 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-27 04:47:42,420 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:42,428 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:42,461 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 46 [2018-10-27 04:47:42,464 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-27 04:47:42,464 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:42,475 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:42,489 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:42,489 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:68, output treesize:30 [2018-10-27 04:47:42,528 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:47:42,548 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-27 04:47:42,549 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:42,563 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:42,574 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-10-27 04:47:42,578 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-10-27 04:47:42,578 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:42,583 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:42,593 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:42,593 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:42, output treesize:12 [2018-10-27 04:47:42,646 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:42,646 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:42,648 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:42,648 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-10-27 04:47:42,648 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-10-27 04:47:42,648 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-10-27 04:47:42,648 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2018-10-27 04:47:42,649 INFO L87 Difference]: Start difference. First operand 178 states and 191 transitions. Second operand 11 states. [2018-10-27 04:47:43,413 WARN L179 SmtUtils]: Spent 127.00 ms on a formula simplification that was a NOOP. DAG size: 34 [2018-10-27 04:47:45,276 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:45,276 INFO L93 Difference]: Finished difference Result 389 states and 409 transitions. [2018-10-27 04:47:45,277 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-10-27 04:47:45,277 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 33 [2018-10-27 04:47:45,277 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:45,278 INFO L225 Difference]: With dead ends: 389 [2018-10-27 04:47:45,278 INFO L226 Difference]: Without dead ends: 389 [2018-10-27 04:47:45,278 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=86, Invalid=334, Unknown=0, NotChecked=0, Total=420 [2018-10-27 04:47:45,279 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 389 states. [2018-10-27 04:47:45,281 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 389 to 183. [2018-10-27 04:47:45,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2018-10-27 04:47:45,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 197 transitions. [2018-10-27 04:47:45,282 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 197 transitions. Word has length 33 [2018-10-27 04:47:45,282 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:45,282 INFO L481 AbstractCegarLoop]: Abstraction has 183 states and 197 transitions. [2018-10-27 04:47:45,282 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-10-27 04:47:45,282 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 197 transitions. [2018-10-27 04:47:45,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-10-27 04:47:45,283 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:45,283 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:45,283 INFO L424 AbstractCegarLoop]: === Iteration 25 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:45,283 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:45,283 INFO L82 PathProgramCache]: Analyzing trace with hash -1762399833, now seen corresponding path program 1 times [2018-10-27 04:47:45,288 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:45,288 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 26 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:45,306 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:45,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:45,396 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:45,422 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:47:45,424 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:45,424 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:45,426 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:45,433 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:45,433 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:11, output treesize:1 [2018-10-27 04:47:45,478 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:47:45,480 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-27 04:47:45,480 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:45,481 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:45,482 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:45,482 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:15, output treesize:3 [2018-10-27 04:47:45,493 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:45,493 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:45,501 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:45,501 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-10-27 04:47:45,501 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-27 04:47:45,501 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-27 04:47:45,501 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:47:45,501 INFO L87 Difference]: Start difference. First operand 183 states and 197 transitions. Second operand 8 states. [2018-10-27 04:47:46,560 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:46,560 INFO L93 Difference]: Finished difference Result 304 states and 326 transitions. [2018-10-27 04:47:46,561 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-10-27 04:47:46,561 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 35 [2018-10-27 04:47:46,561 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:46,562 INFO L225 Difference]: With dead ends: 304 [2018-10-27 04:47:46,562 INFO L226 Difference]: Without dead ends: 304 [2018-10-27 04:47:46,562 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 27 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=71, Invalid=201, Unknown=0, NotChecked=0, Total=272 [2018-10-27 04:47:46,563 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 304 states. [2018-10-27 04:47:46,564 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 304 to 184. [2018-10-27 04:47:46,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-10-27 04:47:46,565 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 198 transitions. [2018-10-27 04:47:46,565 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 198 transitions. Word has length 35 [2018-10-27 04:47:46,565 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:46,565 INFO L481 AbstractCegarLoop]: Abstraction has 184 states and 198 transitions. [2018-10-27 04:47:46,565 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-27 04:47:46,565 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 198 transitions. [2018-10-27 04:47:46,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-10-27 04:47:46,566 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:46,566 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:46,566 INFO L424 AbstractCegarLoop]: === Iteration 26 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:46,566 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:46,567 INFO L82 PathProgramCache]: Analyzing trace with hash -1762335096, now seen corresponding path program 1 times [2018-10-27 04:47:46,567 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:46,567 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:46,587 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:46,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:46,619 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:46,631 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:46,631 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:46,636 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:46,636 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 04:47:46,636 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-27 04:47:46,637 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-27 04:47:46,637 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:47:46,637 INFO L87 Difference]: Start difference. First operand 184 states and 198 transitions. Second operand 3 states. [2018-10-27 04:47:46,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:46,829 INFO L93 Difference]: Finished difference Result 185 states and 198 transitions. [2018-10-27 04:47:46,830 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-27 04:47:46,830 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 35 [2018-10-27 04:47:46,831 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:46,831 INFO L225 Difference]: With dead ends: 185 [2018-10-27 04:47:46,831 INFO L226 Difference]: Without dead ends: 185 [2018-10-27 04:47:46,831 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:47:46,831 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states. [2018-10-27 04:47:46,833 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 184. [2018-10-27 04:47:46,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-10-27 04:47:46,834 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 197 transitions. [2018-10-27 04:47:46,834 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 197 transitions. Word has length 35 [2018-10-27 04:47:46,834 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:46,834 INFO L481 AbstractCegarLoop]: Abstraction has 184 states and 197 transitions. [2018-10-27 04:47:46,834 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-27 04:47:46,834 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 197 transitions. [2018-10-27 04:47:46,835 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-10-27 04:47:46,835 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:46,835 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:46,835 INFO L424 AbstractCegarLoop]: === Iteration 27 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:46,835 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:46,835 INFO L82 PathProgramCache]: Analyzing trace with hash 1079685094, now seen corresponding path program 1 times [2018-10-27 04:47:46,841 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:46,841 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:46,864 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:47,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:47,168 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:47,189 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:47,189 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:47,193 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:47,193 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:47:47,209 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:47,212 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:47,213 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-10-27 04:47:47,213 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:47,232 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:47,232 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:47,247 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:47,247 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:35, output treesize:32 [2018-10-27 04:47:47,273 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:47:47,275 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:47,275 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:47,278 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:47,344 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:47:47,356 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:47,356 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:47,368 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:47,386 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:47,386 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:55, output treesize:48 [2018-10-27 04:47:47,451 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-10-27 04:47:47,454 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-27 04:47:47,454 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:47,463 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:47,494 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 55 [2018-10-27 04:47:47,497 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-27 04:47:47,497 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:47,510 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:47,530 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:47,530 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:84, output treesize:46 [2018-10-27 04:47:47,552 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:47:47,555 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-27 04:47:47,555 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:47,558 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:47,573 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 26 [2018-10-27 04:47:47,575 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 15 [2018-10-27 04:47:47,575 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:47,581 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:47,591 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:47:47,591 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:58, output treesize:28 [2018-10-27 04:47:47,664 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:47,665 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:47,666 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:47,667 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 13 [2018-10-27 04:47:47,667 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:47,690 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-10-27 04:47:47,691 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:47,707 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:47,708 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:43, output treesize:14 [2018-10-27 04:47:47,725 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:47,725 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:47,727 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:47,727 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-10-27 04:47:47,727 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-10-27 04:47:47,728 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-10-27 04:47:47,728 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=84, Unknown=0, NotChecked=0, Total=110 [2018-10-27 04:47:47,728 INFO L87 Difference]: Start difference. First operand 184 states and 197 transitions. Second operand 11 states. [2018-10-27 04:47:48,742 WARN L179 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 57 [2018-10-27 04:47:49,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:49,738 INFO L93 Difference]: Finished difference Result 289 states and 301 transitions. [2018-10-27 04:47:49,739 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-10-27 04:47:49,739 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 35 [2018-10-27 04:47:49,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:49,740 INFO L225 Difference]: With dead ends: 289 [2018-10-27 04:47:49,740 INFO L226 Difference]: Without dead ends: 289 [2018-10-27 04:47:49,740 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=127, Invalid=335, Unknown=0, NotChecked=0, Total=462 [2018-10-27 04:47:49,741 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 289 states. [2018-10-27 04:47:49,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 289 to 178. [2018-10-27 04:47:49,743 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-10-27 04:47:49,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 191 transitions. [2018-10-27 04:47:49,743 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 191 transitions. Word has length 35 [2018-10-27 04:47:49,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:49,745 INFO L481 AbstractCegarLoop]: Abstraction has 178 states and 191 transitions. [2018-10-27 04:47:49,746 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-10-27 04:47:49,746 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 191 transitions. [2018-10-27 04:47:49,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-10-27 04:47:49,746 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:49,746 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:49,747 INFO L424 AbstractCegarLoop]: === Iteration 28 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:49,747 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:49,747 INFO L82 PathProgramCache]: Analyzing trace with hash 1073960288, now seen corresponding path program 1 times [2018-10-27 04:47:49,747 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:49,747 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:49,762 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:49,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:49,904 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:49,910 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-10-27 04:47:49,916 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-10-27 04:47:49,916 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:49,917 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:49,920 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:49,921 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:11, output treesize:3 [2018-10-27 04:47:49,940 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:49,940 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:49,942 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:49,942 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:49,942 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:47:49,942 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:47:49,942 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:49,943 INFO L87 Difference]: Start difference. First operand 178 states and 191 transitions. Second operand 5 states. [2018-10-27 04:47:50,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:50,580 INFO L93 Difference]: Finished difference Result 203 states and 215 transitions. [2018-10-27 04:47:50,581 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-27 04:47:50,581 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 35 [2018-10-27 04:47:50,581 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:50,582 INFO L225 Difference]: With dead ends: 203 [2018-10-27 04:47:50,582 INFO L226 Difference]: Without dead ends: 203 [2018-10-27 04:47:50,582 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-10-27 04:47:50,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 203 states. [2018-10-27 04:47:50,583 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 203 to 177. [2018-10-27 04:47:50,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-10-27 04:47:50,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 190 transitions. [2018-10-27 04:47:50,584 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 190 transitions. Word has length 35 [2018-10-27 04:47:50,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:50,584 INFO L481 AbstractCegarLoop]: Abstraction has 177 states and 190 transitions. [2018-10-27 04:47:50,584 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:47:50,584 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 190 transitions. [2018-10-27 04:47:50,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-10-27 04:47:50,585 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:50,585 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:50,585 INFO L424 AbstractCegarLoop]: === Iteration 29 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:50,585 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:50,586 INFO L82 PathProgramCache]: Analyzing trace with hash 1200224959, now seen corresponding path program 1 times [2018-10-27 04:47:50,586 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:50,586 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:50,600 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:50,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:50,689 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:50,692 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:50,692 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:50,696 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:50,696 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-27 04:47:50,738 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:50,738 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:50,740 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:50,740 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:50,740 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:47:50,740 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:47:50,740 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:50,741 INFO L87 Difference]: Start difference. First operand 177 states and 190 transitions. Second operand 5 states. [2018-10-27 04:47:51,303 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:51,303 INFO L93 Difference]: Finished difference Result 201 states and 209 transitions. [2018-10-27 04:47:51,303 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 04:47:51,304 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 36 [2018-10-27 04:47:51,304 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:51,304 INFO L225 Difference]: With dead ends: 201 [2018-10-27 04:47:51,304 INFO L226 Difference]: Without dead ends: 201 [2018-10-27 04:47:51,305 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 32 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:47:51,305 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201 states. [2018-10-27 04:47:51,306 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201 to 179. [2018-10-27 04:47:51,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-10-27 04:47:51,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 190 transitions. [2018-10-27 04:47:51,307 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 190 transitions. Word has length 36 [2018-10-27 04:47:51,307 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:51,307 INFO L481 AbstractCegarLoop]: Abstraction has 179 states and 190 transitions. [2018-10-27 04:47:51,307 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:47:51,307 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 190 transitions. [2018-10-27 04:47:51,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-10-27 04:47:51,307 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:51,310 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:51,310 INFO L424 AbstractCegarLoop]: === Iteration 30 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:51,310 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:51,310 INFO L82 PathProgramCache]: Analyzing trace with hash -1066969306, now seen corresponding path program 1 times [2018-10-27 04:47:51,311 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:51,311 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:51,324 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:51,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:51,570 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:51,576 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-10-27 04:47:51,578 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-10-27 04:47:51,578 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:51,580 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:51,580 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:51,581 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:7, output treesize:1 [2018-10-27 04:47:51,646 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:51,646 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:51,648 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:51,648 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:51,649 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:47:51,649 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:47:51,649 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:51,649 INFO L87 Difference]: Start difference. First operand 179 states and 190 transitions. Second operand 5 states. [2018-10-27 04:47:52,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:52,539 INFO L93 Difference]: Finished difference Result 183 states and 194 transitions. [2018-10-27 04:47:52,540 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-27 04:47:52,540 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 36 [2018-10-27 04:47:52,540 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:52,541 INFO L225 Difference]: With dead ends: 183 [2018-10-27 04:47:52,541 INFO L226 Difference]: Without dead ends: 183 [2018-10-27 04:47:52,541 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:47:52,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2018-10-27 04:47:52,543 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 178. [2018-10-27 04:47:52,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-10-27 04:47:52,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 189 transitions. [2018-10-27 04:47:52,544 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 189 transitions. Word has length 36 [2018-10-27 04:47:52,544 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:52,544 INFO L481 AbstractCegarLoop]: Abstraction has 178 states and 189 transitions. [2018-10-27 04:47:52,544 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:47:52,545 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 189 transitions. [2018-10-27 04:47:52,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-10-27 04:47:52,545 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:52,545 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:52,545 INFO L424 AbstractCegarLoop]: === Iteration 31 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:52,546 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:52,546 INFO L82 PathProgramCache]: Analyzing trace with hash -1447731639, now seen corresponding path program 1 times [2018-10-27 04:47:52,546 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:52,546 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:52,566 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:52,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:52,666 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:52,676 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:52,676 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:52,682 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:52,682 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:47:53,022 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:53,023 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:53,028 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:53,028 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:53,028 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:47:53,028 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:47:53,028 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:53,029 INFO L87 Difference]: Start difference. First operand 178 states and 189 transitions. Second operand 5 states. [2018-10-27 04:47:53,747 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:53,747 INFO L93 Difference]: Finished difference Result 221 states and 233 transitions. [2018-10-27 04:47:53,749 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 04:47:53,749 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 37 [2018-10-27 04:47:53,749 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:53,749 INFO L225 Difference]: With dead ends: 221 [2018-10-27 04:47:53,750 INFO L226 Difference]: Without dead ends: 221 [2018-10-27 04:47:53,750 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:47:53,750 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states. [2018-10-27 04:47:53,752 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 179. [2018-10-27 04:47:53,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-10-27 04:47:53,752 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 188 transitions. [2018-10-27 04:47:53,752 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 188 transitions. Word has length 37 [2018-10-27 04:47:53,753 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:53,753 INFO L481 AbstractCegarLoop]: Abstraction has 179 states and 188 transitions. [2018-10-27 04:47:53,753 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:47:53,753 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 188 transitions. [2018-10-27 04:47:53,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-10-27 04:47:53,753 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:53,753 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:53,756 INFO L424 AbstractCegarLoop]: === Iteration 32 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:53,756 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:53,756 INFO L82 PathProgramCache]: Analyzing trace with hash -1804706840, now seen corresponding path program 1 times [2018-10-27 04:47:53,757 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:53,757 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:53,779 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:54,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:54,060 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:54,064 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-10-27 04:47:54,067 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-10-27 04:47:54,067 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:54,069 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:54,072 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:54,072 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:11, output treesize:3 [2018-10-27 04:47:54,154 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:54,154 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:54,156 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:54,157 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-27 04:47:54,157 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-27 04:47:54,157 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-27 04:47:54,157 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:47:54,157 INFO L87 Difference]: Start difference. First operand 179 states and 188 transitions. Second operand 7 states. [2018-10-27 04:47:54,624 WARN L179 SmtUtils]: Spent 107.00 ms on a formula simplification that was a NOOP. DAG size: 30 [2018-10-27 04:47:54,963 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:54,963 INFO L93 Difference]: Finished difference Result 197 states and 207 transitions. [2018-10-27 04:47:54,969 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-10-27 04:47:54,969 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 37 [2018-10-27 04:47:54,969 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:54,970 INFO L225 Difference]: With dead ends: 197 [2018-10-27 04:47:54,970 INFO L226 Difference]: Without dead ends: 197 [2018-10-27 04:47:54,970 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=49, Invalid=83, Unknown=0, NotChecked=0, Total=132 [2018-10-27 04:47:54,970 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2018-10-27 04:47:54,972 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 178. [2018-10-27 04:47:54,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-10-27 04:47:54,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 187 transitions. [2018-10-27 04:47:54,973 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 187 transitions. Word has length 37 [2018-10-27 04:47:54,973 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:54,973 INFO L481 AbstractCegarLoop]: Abstraction has 178 states and 187 transitions. [2018-10-27 04:47:54,973 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-27 04:47:54,973 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 187 transitions. [2018-10-27 04:47:54,973 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-10-27 04:47:54,973 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:54,974 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:54,974 INFO L424 AbstractCegarLoop]: === Iteration 33 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:54,974 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:54,974 INFO L82 PathProgramCache]: Analyzing trace with hash 843517930, now seen corresponding path program 1 times [2018-10-27 04:47:54,974 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:54,975 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:54,997 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:55,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:55,203 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:55,208 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-10-27 04:47:55,210 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-10-27 04:47:55,210 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:55,216 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:55,222 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-10-27 04:47:55,223 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-10-27 04:47:55,223 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:55,228 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:55,228 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:55,228 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:15, output treesize:1 [2018-10-27 04:47:55,232 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:55,232 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:55,241 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:55,241 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:15 [2018-10-27 04:47:55,258 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:47:55,260 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:55,260 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:55,262 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:55,272 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:47:55,274 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:55,275 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:55,277 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:55,284 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:55,284 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:30, output treesize:17 [2018-10-27 04:47:55,299 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-10-27 04:47:55,301 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-10-27 04:47:55,301 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:55,304 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:55,313 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-10-27 04:47:55,315 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-10-27 04:47:55,315 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:55,317 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:55,322 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:55,322 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:36, output treesize:14 [2018-10-27 04:47:55,333 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:55,333 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:55,334 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:55,335 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:55,335 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:47:55,335 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:47:55,335 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:55,335 INFO L87 Difference]: Start difference. First operand 178 states and 187 transitions. Second operand 5 states. [2018-10-27 04:47:55,883 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:55,883 INFO L93 Difference]: Finished difference Result 176 states and 185 transitions. [2018-10-27 04:47:55,884 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-27 04:47:55,884 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 39 [2018-10-27 04:47:55,884 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:55,885 INFO L225 Difference]: With dead ends: 176 [2018-10-27 04:47:55,885 INFO L226 Difference]: Without dead ends: 176 [2018-10-27 04:47:55,885 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:47:55,885 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-10-27 04:47:55,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 176. [2018-10-27 04:47:55,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-10-27 04:47:55,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 185 transitions. [2018-10-27 04:47:55,888 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 185 transitions. Word has length 39 [2018-10-27 04:47:55,888 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:55,888 INFO L481 AbstractCegarLoop]: Abstraction has 176 states and 185 transitions. [2018-10-27 04:47:55,888 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:47:55,888 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 185 transitions. [2018-10-27 04:47:55,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-10-27 04:47:55,888 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:55,889 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:55,889 INFO L424 AbstractCegarLoop]: === Iteration 34 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:55,889 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:55,889 INFO L82 PathProgramCache]: Analyzing trace with hash 688559553, now seen corresponding path program 1 times [2018-10-27 04:47:55,889 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:55,890 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:55,906 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:56,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:56,074 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:56,076 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:56,076 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:56,088 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:56,088 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:47:56,108 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-27 04:47:56,109 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:56,117 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:56,117 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:21, output treesize:20 [2018-10-27 04:47:56,144 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:47:56,146 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:56,147 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:56,149 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:56,161 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:56,161 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:37, output treesize:28 [2018-10-27 04:47:56,187 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-10-27 04:47:56,190 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:56,192 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-10-27 04:47:56,193 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:56,198 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:56,212 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:56,212 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:35, output treesize:22 [2018-10-27 04:47:56,286 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-10-27 04:47:56,288 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-10-27 04:47:56,289 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:56,291 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:56,294 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:47:56,295 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:13 [2018-10-27 04:47:56,327 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:56,327 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:47:56,464 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 24 [2018-10-27 04:47:56,473 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:47:56,474 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:56,490 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 27 [2018-10-27 04:47:56,518 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 11 [2018-10-27 04:47:56,518 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:56,539 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 14 treesize of output 14 [2018-10-27 04:47:56,540 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:47:56,556 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 9 [2018-10-27 04:47:56,556 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:47:56,572 INFO L267 ElimStorePlain]: Start of recursive call 4: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-10-27 04:47:56,586 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-10-27 04:47:56,600 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-10-27 04:47:56,600 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 2 variables, input treesize:22, output treesize:26 [2018-10-27 04:47:56,700 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:56,702 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:47:56,702 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-27 04:47:56,725 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:56,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:56,770 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:56,813 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:47:56,816 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:56,816 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:56,819 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:56,835 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:47:56,839 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:56,839 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:56,842 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:56,853 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:56,854 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:31, output treesize:23 [2018-10-27 04:47:56,908 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-10-27 04:47:56,913 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:56,916 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-10-27 04:47:56,916 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:56,927 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:56,954 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-10-27 04:47:56,958 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:56,961 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-10-27 04:47:56,961 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:56,971 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:56,985 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:56,986 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:41, output treesize:15 [2018-10-27 04:47:57,110 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:47:57,112 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-27 04:47:57,112 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:57,114 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:57,123 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:47:57,126 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-27 04:47:57,126 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:57,128 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:57,132 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:57,132 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:29, output treesize:7 [2018-10-27 04:47:57,170 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:57,170 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:47:57,331 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 22 [2018-10-27 04:47:57,334 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:47:57,334 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:57,352 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 25 [2018-10-27 04:47:57,373 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 9 [2018-10-27 04:47:57,373 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:57,389 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-10-27 04:47:57,389 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:57,410 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 12 [2018-10-27 04:47:57,411 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-10-27 04:47:57,417 INFO L267 ElimStorePlain]: Start of recursive call 4: 3 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:47:57,424 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:47:57,438 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 22 [2018-10-27 04:47:57,441 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 8 [2018-10-27 04:47:57,441 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:57,460 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 25 [2018-10-27 04:47:57,481 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 9 [2018-10-27 04:47:57,481 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:57,504 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 12 [2018-10-27 04:47:57,504 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 2 xjuncts. [2018-10-27 04:47:57,516 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-10-27 04:47:57,517 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:57,523 INFO L267 ElimStorePlain]: Start of recursive call 10: 3 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:47:57,530 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:47:57,540 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-10-27 04:47:57,540 INFO L202 ElimStorePlain]: Needed 13 recursive calls to eliminate 4 variables, input treesize:41, output treesize:13 [2018-10-27 04:47:57,546 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:57,563 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-10-27 04:47:57,563 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 8, 8] total 24 [2018-10-27 04:47:57,564 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-10-27 04:47:57,564 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-10-27 04:47:57,564 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=497, Unknown=0, NotChecked=0, Total=552 [2018-10-27 04:47:57,564 INFO L87 Difference]: Start difference. First operand 176 states and 185 transitions. Second operand 24 states. [2018-10-27 04:47:58,456 WARN L179 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 48 [2018-10-27 04:47:59,672 WARN L179 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 73 DAG size of output: 64 [2018-10-27 04:47:59,993 WARN L179 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 57 [2018-10-27 04:48:00,318 WARN L179 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 55 [2018-10-27 04:48:03,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:03,551 INFO L93 Difference]: Finished difference Result 282 states and 293 transitions. [2018-10-27 04:48:03,552 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-10-27 04:48:03,552 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 40 [2018-10-27 04:48:03,552 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:03,553 INFO L225 Difference]: With dead ends: 282 [2018-10-27 04:48:03,553 INFO L226 Difference]: Without dead ends: 282 [2018-10-27 04:48:03,554 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 177 GetRequests, 135 SyntacticMatches, 1 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 250 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=296, Invalid=1510, Unknown=0, NotChecked=0, Total=1806 [2018-10-27 04:48:03,554 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 282 states. [2018-10-27 04:48:03,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 282 to 195. [2018-10-27 04:48:03,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 195 states. [2018-10-27 04:48:03,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 204 transitions. [2018-10-27 04:48:03,557 INFO L78 Accepts]: Start accepts. Automaton has 195 states and 204 transitions. Word has length 40 [2018-10-27 04:48:03,557 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:03,557 INFO L481 AbstractCegarLoop]: Abstraction has 195 states and 204 transitions. [2018-10-27 04:48:03,557 INFO L482 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-10-27 04:48:03,557 INFO L276 IsEmpty]: Start isEmpty. Operand 195 states and 204 transitions. [2018-10-27 04:48:03,557 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-10-27 04:48:03,557 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:03,558 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:03,558 INFO L424 AbstractCegarLoop]: === Iteration 35 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:03,558 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:03,558 INFO L82 PathProgramCache]: Analyzing trace with hash -1128084500, now seen corresponding path program 1 times [2018-10-27 04:48:03,558 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:03,559 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:03,592 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:03,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:03,901 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:03,912 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-10-27 04:48:03,914 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-10-27 04:48:03,914 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:03,915 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:03,917 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:03,917 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:11, output treesize:3 [2018-10-27 04:48:04,025 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:04,025 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:04,027 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:04,027 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-10-27 04:48:04,027 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-27 04:48:04,027 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-27 04:48:04,027 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-10-27 04:48:04,027 INFO L87 Difference]: Start difference. First operand 195 states and 204 transitions. Second operand 9 states. [2018-10-27 04:48:05,407 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:05,407 INFO L93 Difference]: Finished difference Result 217 states and 227 transitions. [2018-10-27 04:48:05,408 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-10-27 04:48:05,408 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 41 [2018-10-27 04:48:05,409 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:05,409 INFO L225 Difference]: With dead ends: 217 [2018-10-27 04:48:05,409 INFO L226 Difference]: Without dead ends: 217 [2018-10-27 04:48:05,410 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 40 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=109, Invalid=233, Unknown=0, NotChecked=0, Total=342 [2018-10-27 04:48:05,410 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 217 states. [2018-10-27 04:48:05,411 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 217 to 193. [2018-10-27 04:48:05,411 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193 states. [2018-10-27 04:48:05,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193 states to 193 states and 202 transitions. [2018-10-27 04:48:05,412 INFO L78 Accepts]: Start accepts. Automaton has 193 states and 202 transitions. Word has length 41 [2018-10-27 04:48:05,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:05,412 INFO L481 AbstractCegarLoop]: Abstraction has 193 states and 202 transitions. [2018-10-27 04:48:05,412 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-27 04:48:05,412 INFO L276 IsEmpty]: Start isEmpty. Operand 193 states and 202 transitions. [2018-10-27 04:48:05,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-10-27 04:48:05,413 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:05,413 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:05,413 INFO L424 AbstractCegarLoop]: === Iteration 36 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:05,413 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:05,413 INFO L82 PathProgramCache]: Analyzing trace with hash 643382959, now seen corresponding path program 1 times [2018-10-27 04:48:05,414 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:05,414 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 38 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:05,428 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:05,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:05,683 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:05,692 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-10-27 04:48:05,695 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-10-27 04:48:05,695 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:05,696 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:05,703 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:05,703 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:17, output treesize:10 [2018-10-27 04:48:06,064 WARN L179 SmtUtils]: Spent 131.00 ms on a formula simplification that was a NOOP. DAG size: 17 [2018-10-27 04:48:06,067 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:06,067 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:06,073 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:06,073 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-27 04:48:06,073 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-27 04:48:06,073 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-27 04:48:06,074 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:48:06,074 INFO L87 Difference]: Start difference. First operand 193 states and 202 transitions. Second operand 7 states. [2018-10-27 04:48:07,000 WARN L179 SmtUtils]: Spent 173.00 ms on a formula simplification. DAG size of input: 43 DAG size of output: 40 [2018-10-27 04:48:07,211 WARN L179 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 37 DAG size of output: 34 [2018-10-27 04:48:07,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:07,902 INFO L93 Difference]: Finished difference Result 198 states and 207 transitions. [2018-10-27 04:48:07,903 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-10-27 04:48:07,903 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 41 [2018-10-27 04:48:07,903 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:07,904 INFO L225 Difference]: With dead ends: 198 [2018-10-27 04:48:07,904 INFO L226 Difference]: Without dead ends: 198 [2018-10-27 04:48:07,904 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=63, Invalid=119, Unknown=0, NotChecked=0, Total=182 [2018-10-27 04:48:07,905 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 198 states. [2018-10-27 04:48:07,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 198 to 192. [2018-10-27 04:48:07,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192 states. [2018-10-27 04:48:07,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192 states to 192 states and 201 transitions. [2018-10-27 04:48:07,907 INFO L78 Accepts]: Start accepts. Automaton has 192 states and 201 transitions. Word has length 41 [2018-10-27 04:48:07,907 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:07,907 INFO L481 AbstractCegarLoop]: Abstraction has 192 states and 201 transitions. [2018-10-27 04:48:07,907 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-27 04:48:07,907 INFO L276 IsEmpty]: Start isEmpty. Operand 192 states and 201 transitions. [2018-10-27 04:48:07,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-10-27 04:48:07,908 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:07,908 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:07,908 INFO L424 AbstractCegarLoop]: === Iteration 37 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:07,908 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:07,909 INFO L82 PathProgramCache]: Analyzing trace with hash -610881012, now seen corresponding path program 1 times [2018-10-27 04:48:07,909 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:07,909 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:07,940 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:08,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:08,432 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:08,437 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-10-27 04:48:08,440 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-10-27 04:48:08,440 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:08,441 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:08,482 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-10-27 04:48:08,484 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-10-27 04:48:08,484 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:08,485 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:08,486 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:08,486 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:18, output treesize:3 [2018-10-27 04:48:08,500 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:08,501 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:08,502 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-10-27 04:48:08,502 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:08,513 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:08,513 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:23, output treesize:21 [2018-10-27 04:48:08,531 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:48:08,534 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:48:08,534 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:08,536 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:08,549 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:08,549 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:34, output treesize:29 [2018-10-27 04:48:08,589 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 35 [2018-10-27 04:48:08,591 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-27 04:48:08,591 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:08,599 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:08,608 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:08,608 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:46, output treesize:27 [2018-10-27 04:48:08,625 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-10-27 04:48:08,627 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-10-27 04:48:08,628 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:08,632 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:08,637 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:08,637 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:32, output treesize:17 [2018-10-27 04:48:08,652 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:08,652 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:08,654 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:08,654 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-10-27 04:48:08,654 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-27 04:48:08,655 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-27 04:48:08,655 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2018-10-27 04:48:08,655 INFO L87 Difference]: Start difference. First operand 192 states and 201 transitions. Second operand 9 states. [2018-10-27 04:48:09,763 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:09,764 INFO L93 Difference]: Finished difference Result 264 states and 277 transitions. [2018-10-27 04:48:09,766 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-10-27 04:48:09,766 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 42 [2018-10-27 04:48:09,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:09,767 INFO L225 Difference]: With dead ends: 264 [2018-10-27 04:48:09,767 INFO L226 Difference]: Without dead ends: 264 [2018-10-27 04:48:09,767 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 38 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=60, Invalid=122, Unknown=0, NotChecked=0, Total=182 [2018-10-27 04:48:09,767 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 264 states. [2018-10-27 04:48:09,769 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 264 to 190. [2018-10-27 04:48:09,769 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-10-27 04:48:09,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 199 transitions. [2018-10-27 04:48:09,770 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 199 transitions. Word has length 42 [2018-10-27 04:48:09,770 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:09,770 INFO L481 AbstractCegarLoop]: Abstraction has 190 states and 199 transitions. [2018-10-27 04:48:09,770 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-27 04:48:09,770 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 199 transitions. [2018-10-27 04:48:09,771 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-10-27 04:48:09,771 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:09,771 INFO L375 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:09,771 INFO L424 AbstractCegarLoop]: === Iteration 38 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:09,771 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:09,771 INFO L82 PathProgramCache]: Analyzing trace with hash 114142868, now seen corresponding path program 1 times [2018-10-27 04:48:09,777 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:09,777 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 40 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:09,794 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:09,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:09,944 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:09,960 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:09,960 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:09,963 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:09,964 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-27 04:48:10,003 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:10,028 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:10,028 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-27 04:48:10,029 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:10,032 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:10,033 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-10-27 04:48:10,043 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-10-27 04:48:10,043 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:10,045 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:10,045 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:48:10,045 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:48:10,045 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:48:10,045 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:48:10,045 INFO L87 Difference]: Start difference. First operand 190 states and 199 transitions. Second operand 4 states. [2018-10-27 04:48:10,364 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:10,365 INFO L93 Difference]: Finished difference Result 224 states and 233 transitions. [2018-10-27 04:48:10,366 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 04:48:10,366 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 43 [2018-10-27 04:48:10,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:10,367 INFO L225 Difference]: With dead ends: 224 [2018-10-27 04:48:10,367 INFO L226 Difference]: Without dead ends: 224 [2018-10-27 04:48:10,367 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 40 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:48:10,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2018-10-27 04:48:10,369 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 190. [2018-10-27 04:48:10,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-10-27 04:48:10,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 198 transitions. [2018-10-27 04:48:10,370 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 198 transitions. Word has length 43 [2018-10-27 04:48:10,370 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:10,370 INFO L481 AbstractCegarLoop]: Abstraction has 190 states and 198 transitions. [2018-10-27 04:48:10,370 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:48:10,370 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 198 transitions. [2018-10-27 04:48:10,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-10-27 04:48:10,371 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:10,371 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:10,371 INFO L424 AbstractCegarLoop]: === Iteration 39 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:10,371 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:10,371 INFO L82 PathProgramCache]: Analyzing trace with hash -979674128, now seen corresponding path program 1 times [2018-10-27 04:48:10,384 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:10,384 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:10,408 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:10,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:10,889 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:10,904 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-10-27 04:48:10,907 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-10-27 04:48:10,907 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:10,912 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:10,919 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-10-27 04:48:10,924 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-10-27 04:48:10,924 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:10,926 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:10,928 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:10,928 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:18, output treesize:3 [2018-10-27 04:48:10,972 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:10,984 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:10,985 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-27 04:48:10,985 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:10,999 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:10,999 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:11,176 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:11,177 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:26, output treesize:19 [2018-10-27 04:48:11,388 WARN L179 SmtUtils]: Spent 136.00 ms on a formula simplification that was a NOOP. DAG size: 18 [2018-10-27 04:48:11,399 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:48:11,402 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:48:11,402 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:11,406 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:11,424 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:48:11,428 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:48:11,428 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:11,437 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:11,451 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:11,451 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:40, output treesize:31 [2018-10-27 04:48:11,582 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-10-27 04:48:11,608 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-27 04:48:11,609 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:11,622 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:11,647 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 44 [2018-10-27 04:48:11,650 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-10-27 04:48:11,650 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:11,661 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:11,675 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:11,675 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:63, output treesize:25 [2018-10-27 04:48:11,698 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:48:11,701 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-27 04:48:11,702 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:11,705 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:11,719 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-10-27 04:48:11,721 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-10-27 04:48:11,722 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:11,727 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:11,736 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:11,736 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:45, output treesize:15 [2018-10-27 04:48:11,786 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:11,786 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:11,788 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:11,789 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-27 04:48:11,789 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-10-27 04:48:11,789 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-10-27 04:48:11,789 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-10-27 04:48:11,789 INFO L87 Difference]: Start difference. First operand 190 states and 198 transitions. Second operand 10 states. [2018-10-27 04:48:13,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:13,758 INFO L93 Difference]: Finished difference Result 314 states and 328 transitions. [2018-10-27 04:48:13,759 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-10-27 04:48:13,760 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 45 [2018-10-27 04:48:13,760 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:13,761 INFO L225 Difference]: With dead ends: 314 [2018-10-27 04:48:13,761 INFO L226 Difference]: Without dead ends: 314 [2018-10-27 04:48:13,761 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 44 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=131, Invalid=375, Unknown=0, NotChecked=0, Total=506 [2018-10-27 04:48:13,761 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 314 states. [2018-10-27 04:48:13,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 314 to 176. [2018-10-27 04:48:13,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-10-27 04:48:13,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 183 transitions. [2018-10-27 04:48:13,768 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 183 transitions. Word has length 45 [2018-10-27 04:48:13,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:13,768 INFO L481 AbstractCegarLoop]: Abstraction has 176 states and 183 transitions. [2018-10-27 04:48:13,768 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-10-27 04:48:13,768 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 183 transitions. [2018-10-27 04:48:13,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-10-27 04:48:13,769 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:13,769 INFO L375 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:13,769 INFO L424 AbstractCegarLoop]: === Iteration 40 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:13,770 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:13,770 INFO L82 PathProgramCache]: Analyzing trace with hash 496301051, now seen corresponding path program 1 times [2018-10-27 04:48:13,770 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:13,770 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 42 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:13,794 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:13,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:13,917 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:14,061 WARN L179 SmtUtils]: Spent 100.00 ms on a formula simplification that was a NOOP. DAG size: 12 [2018-10-27 04:48:14,101 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-10-27 04:48:14,124 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-10-27 04:48:14,125 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:14,148 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:14,176 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:14,176 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-10-27 04:48:14,382 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:48:14,396 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-27 04:48:14,396 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:14,424 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:14,448 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:14,448 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:15, output treesize:3 [2018-10-27 04:48:14,530 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-10-27 04:48:14,530 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:14,532 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:14,532 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-27 04:48:14,533 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-27 04:48:14,533 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-27 04:48:14,533 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-10-27 04:48:14,533 INFO L87 Difference]: Start difference. First operand 176 states and 183 transitions. Second operand 6 states. [2018-10-27 04:48:15,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:15,076 INFO L93 Difference]: Finished difference Result 201 states and 209 transitions. [2018-10-27 04:48:15,078 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-27 04:48:15,078 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 49 [2018-10-27 04:48:15,078 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:15,079 INFO L225 Difference]: With dead ends: 201 [2018-10-27 04:48:15,079 INFO L226 Difference]: Without dead ends: 201 [2018-10-27 04:48:15,079 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 43 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-10-27 04:48:15,079 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201 states. [2018-10-27 04:48:15,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201 to 181. [2018-10-27 04:48:15,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181 states. [2018-10-27 04:48:15,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 188 transitions. [2018-10-27 04:48:15,081 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 188 transitions. Word has length 49 [2018-10-27 04:48:15,082 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:15,082 INFO L481 AbstractCegarLoop]: Abstraction has 181 states and 188 transitions. [2018-10-27 04:48:15,082 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-27 04:48:15,082 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 188 transitions. [2018-10-27 04:48:15,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-10-27 04:48:15,082 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:15,082 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:15,083 INFO L424 AbstractCegarLoop]: === Iteration 41 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:15,083 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:15,083 INFO L82 PathProgramCache]: Analyzing trace with hash 837424276, now seen corresponding path program 1 times [2018-10-27 04:48:15,083 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:15,083 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:15,107 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:15,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:15,254 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:15,359 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:48:15,361 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:48:15,362 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,365 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,378 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:48:15,381 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:48:15,381 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,384 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,393 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,393 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:29, output treesize:7 [2018-10-27 04:48:15,479 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:48:15,481 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-27 04:48:15,481 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,484 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,494 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:48:15,495 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-27 04:48:15,496 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,499 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,504 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,504 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:32, output treesize:10 [2018-10-27 04:48:15,541 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:15,541 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:48:15,709 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:15,716 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:48:15,716 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-27 04:48:15,730 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:15,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:15,765 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:15,788 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:48:15,790 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:48:15,790 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,793 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,802 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:48:15,804 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:48:15,804 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,808 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,814 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,814 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:23, output treesize:1 [2018-10-27 04:48:15,900 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:48:15,920 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-27 04:48:15,920 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,945 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:16,060 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-10-27 04:48:16,068 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-10-27 04:48:16,068 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:16,072 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:16,079 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:16,079 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:29, output treesize:7 [2018-10-27 04:48:16,083 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:16,083 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:48:16,161 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:16,177 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 4 imperfect interpolant sequences. [2018-10-27 04:48:16,177 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 9, 10, 9] total 25 [2018-10-27 04:48:16,178 INFO L460 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-10-27 04:48:16,178 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-10-27 04:48:16,178 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=512, Unknown=0, NotChecked=0, Total=600 [2018-10-27 04:48:16,178 INFO L87 Difference]: Start difference. First operand 181 states and 188 transitions. Second operand 25 states. [2018-10-27 04:48:18,296 WARN L179 SmtUtils]: Spent 202.00 ms on a formula simplification. DAG size of input: 22 DAG size of output: 20 [2018-10-27 04:48:18,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:18,889 INFO L93 Difference]: Finished difference Result 278 states and 291 transitions. [2018-10-27 04:48:18,891 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-10-27 04:48:18,891 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 51 [2018-10-27 04:48:18,892 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:18,892 INFO L225 Difference]: With dead ends: 278 [2018-10-27 04:48:18,892 INFO L226 Difference]: Without dead ends: 278 [2018-10-27 04:48:18,893 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 228 GetRequests, 180 SyntacticMatches, 1 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 588 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=436, Invalid=1916, Unknown=0, NotChecked=0, Total=2352 [2018-10-27 04:48:18,893 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 278 states. [2018-10-27 04:48:18,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 278 to 201. [2018-10-27 04:48:18,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 201 states. [2018-10-27 04:48:18,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201 states to 201 states and 212 transitions. [2018-10-27 04:48:18,900 INFO L78 Accepts]: Start accepts. Automaton has 201 states and 212 transitions. Word has length 51 [2018-10-27 04:48:18,900 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:18,900 INFO L481 AbstractCegarLoop]: Abstraction has 201 states and 212 transitions. [2018-10-27 04:48:18,900 INFO L482 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-10-27 04:48:18,900 INFO L276 IsEmpty]: Start isEmpty. Operand 201 states and 212 transitions. [2018-10-27 04:48:18,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-10-27 04:48:18,901 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:18,901 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:18,901 INFO L424 AbstractCegarLoop]: === Iteration 42 === [mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr32ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr61ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr31ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr50ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr46ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr29ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr60ASSERT_VIOLATIONMEMORY_FREE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr63ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr40ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr65ASSERT_VIOLATIONMEMORY_FREE, mainErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr33ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr66ENSURES_VIOLATIONMEMORY_LEAK, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr38ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr41ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr42ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr62ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr39ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr64ASSERT_VIOLATIONMEMORY_FREE, mainErr56ASSERT_VIOLATIONMEMORY_FREE, mainErr55ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr43ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr37ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr57ASSERT_VIOLATIONMEMORY_FREE, mainErr48ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr47ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr54ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr30ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr36ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr49ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr59ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr45ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr35ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr44ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr52ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr51ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr53ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr27ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr34ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr58ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:18,912 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:18,912 INFO L82 PathProgramCache]: Analyzing trace with hash 190348323, now seen corresponding path program 1 times [2018-10-27 04:48:18,912 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:18,912 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_106417af-ab46-44a5-81b6-984b578842d8/bin-2019/utaipan/cvc4nyu Starting monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:18,939 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:19,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-10-27 04:48:19,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-10-27 04:48:19,598 INFO L442 BasicCegarLoop]: Counterexample might be feasible [2018-10-27 04:48:19,614 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,618 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,619 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,619 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,619 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,619 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,620 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,624 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,624 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,624 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,625 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,625 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,625 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,625 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,626 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,626 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,626 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,626 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,627 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,627 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,627 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,627 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,636 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,636 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,636 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,637 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,637 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,637 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,638 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,638 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,638 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,638 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,639 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,639 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,639 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,639 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,646 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,646 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,647 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,647 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,647 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,647 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,647 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,648 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,648 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,648 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,648 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,648 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,649 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,649 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,649 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,649 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,649 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,650 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,650 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,650 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,650 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,650 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,651 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,651 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,651 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,651 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,651 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,660 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,661 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,661 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,661 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,661 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,661 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,662 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,662 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,662 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,662 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,662 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,662 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,663 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,663 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,663 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,663 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,663 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,663 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,664 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,664 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,664 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,664 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,664 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled [2018-10-27 04:48:19,664 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled [2018-10-27 04:48:19,665 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,665 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,665 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled [2018-10-27 04:48:19,665 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled [2018-10-27 04:48:19,665 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,665 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,665 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled [2018-10-27 04:48:19,666 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled [2018-10-27 04:48:19,666 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,666 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,666 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled [2018-10-27 04:48:19,666 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled [2018-10-27 04:48:19,666 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,667 WARN L387 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-10-27 04:48:19,667 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,667 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled [2018-10-27 04:48:19,667 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled [2018-10-27 04:48:19,667 WARN L387 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled [2018-10-27 04:48:19,689 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.10 04:48:19 BoogieIcfgContainer [2018-10-27 04:48:19,689 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-10-27 04:48:19,689 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-10-27 04:48:19,689 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-10-27 04:48:19,690 INFO L276 PluginConnector]: Witness Printer initialized [2018-10-27 04:48:19,690 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.10 04:47:17" (3/4) ... [2018-10-27 04:48:19,693 INFO L147 WitnessPrinter]: No result that supports witness generation found [2018-10-27 04:48:19,693 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-10-27 04:48:19,694 INFO L168 Benchmark]: Toolchain (without parser) took 63855.84 ms. Allocated memory was 1.0 GB in the beginning and 1.4 GB in the end (delta: 395.3 MB). Free memory was 947.9 MB in the beginning and 1.3 GB in the end (delta: -320.8 MB). Peak memory consumption was 74.5 MB. Max. memory is 11.5 GB. [2018-10-27 04:48:19,694 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 978.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-10-27 04:48:19,695 INFO L168 Benchmark]: CACSL2BoogieTranslator took 419.44 ms. Allocated memory is still 1.0 GB. Free memory was 947.9 MB in the beginning and 926.4 MB in the end (delta: 21.5 MB). Peak memory consumption was 21.5 MB. Max. memory is 11.5 GB. [2018-10-27 04:48:19,695 INFO L168 Benchmark]: Boogie Procedure Inliner took 62.26 ms. Allocated memory is still 1.0 GB. Free memory was 926.4 MB in the beginning and 921.0 MB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2018-10-27 04:48:19,695 INFO L168 Benchmark]: Boogie Preprocessor took 120.30 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 164.6 MB). Free memory was 921.0 MB in the beginning and 1.2 GB in the end (delta: -229.4 MB). Peak memory consumption was 19.8 MB. Max. memory is 11.5 GB. [2018-10-27 04:48:19,695 INFO L168 Benchmark]: RCFGBuilder took 1422.12 ms. Allocated memory is still 1.2 GB. Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 60.2 MB). Peak memory consumption was 60.2 MB. Max. memory is 11.5 GB. [2018-10-27 04:48:19,695 INFO L168 Benchmark]: TraceAbstraction took 61823.21 ms. Allocated memory was 1.2 GB in the beginning and 1.4 GB in the end (delta: 230.7 MB). Free memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: -178.4 MB). Peak memory consumption was 52.3 MB. Max. memory is 11.5 GB. [2018-10-27 04:48:19,696 INFO L168 Benchmark]: Witness Printer took 4.13 ms. Allocated memory is still 1.4 GB. Free memory is still 1.3 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-10-27 04:48:19,698 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 978.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 419.44 ms. Allocated memory is still 1.0 GB. Free memory was 947.9 MB in the beginning and 926.4 MB in the end (delta: 21.5 MB). Peak memory consumption was 21.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 62.26 ms. Allocated memory is still 1.0 GB. Free memory was 926.4 MB in the beginning and 921.0 MB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 120.30 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 164.6 MB). Free memory was 921.0 MB in the beginning and 1.2 GB in the end (delta: -229.4 MB). Peak memory consumption was 19.8 MB. Max. memory is 11.5 GB. * RCFGBuilder took 1422.12 ms. Allocated memory is still 1.2 GB. Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 60.2 MB). Peak memory consumption was 60.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 61823.21 ms. Allocated memory was 1.2 GB in the beginning and 1.4 GB in the end (delta: 230.7 MB). Free memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: -178.4 MB). Peak memory consumption was 52.3 MB. Max. memory is 11.5 GB. * Witness Printer took 4.13 ms. Allocated memory is still 1.4 GB. Free memory is still 1.3 GB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.alloc_#res : $Pointer$ not handled * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 985]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: overapproximation of memtrack at line 985. Possible FailurePath: [L987] EXPR, FCALL malloc(sizeof(struct TSLL)) [L987] struct TSLL* null = malloc(sizeof(struct TSLL)); [L988] CALL null->next = ((void*)0) [L988] RET null->next = ((void*)0) [L989] CALL null->prev = ((void*)0) [L989] RET null->prev = ((void*)0) [L990] CALL null->colour = BLACK [L990] RET null->colour = BLACK [L992] EXPR, FCALL malloc(sizeof(struct TSLL)) [L992] struct TSLL* list = malloc(sizeof(struct TSLL)); [L993] CALL list->next = null [L993] RET list->next = null [L994] CALL list->prev = null [L994] RET list->prev = null [L995] CALL list->colour = BLACK [L995] RET list->colour = BLACK [L997] struct TSLL* end = list; [L1000] COND FALSE !(__VERIFIER_nondet_int()) [L1026] end = null [L1027] end = list [L1030] COND FALSE !(!(null != end)) [L1030] COND FALSE !(0) [L1031] CALL, EXPR end->colour [L1031] RET, EXPR end->colour [L1031] COND FALSE !(!(BLACK == end->colour)) [L1031] COND FALSE !(0) [L1032] COND TRUE null != end [L1034] CALL, EXPR end->colour [L1034] RET, EXPR end->colour [L1034] COND FALSE !(RED == end->colour) [L1041] CALL, EXPR end->next [L1041] RET, EXPR end->next [L1041] end = end->next [L1032] COND FALSE !(null != end) [L1045] COND TRUE null != list [L1047] CALL, EXPR list->colour [L1047] RET, EXPR list->colour [L1047] COND FALSE !(RED == list->colour) [L1056] CALL, EXPR list->next [L1056] RET, EXPR list->next [L1056] end = list->next [L1057] free(list) [L1057] free(list) [L1057] FCALL free(list) [L1058] list = end [L1045] COND FALSE !(null != list) [L1062] return 0; - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 176 locations, 67 error locations. UNSAFE Result, 61.7s OverallTime, 42 OverallIterations, 2 TraceHistogramMax, 44.2s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 4230 SDtfs, 10899 SDslu, 9425 SDs, 0 SdLazy, 16318 SolverSat, 1270 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 32.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1629 GetRequests, 1236 SyntacticMatches, 4 SemanticMatches, 389 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1206 ImplicationChecksByTransitivity, 11.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=201occurred in iteration=41, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 41 MinimizatonAttempts, 2304 StatesRemovedByMinimization, 37 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.4s SsaConstructionTime, 4.7s SatisfiabilityAnalysisTime, 10.2s InterpolantComputationTime, 1316 NumberOfCodeBlocks, 1316 NumberOfCodeBlocksAsserted, 44 NumberOfCheckSat, 1399 ConstructedInterpolants, 13 QuantifiedInterpolants, 362324 SizeOfPredicates, 730 NumberOfNonLiveVariables, 8159 ConjunctsInSsa, 749 ConjunctsInUnsatCore, 47 InterpolantComputations, 39 PerfectInterpolantSequences, 10/36 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request...