./Ultimate.py --spec ../../sv-benchmarks/c/MemSafety.prp --file ../../sv-benchmarks/c/memsafety-ext2/length_test03_true-valid-memsafety.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 1dbac8bc Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/config/TaipanMemDerefMemtrack.xml -i ../../sv-benchmarks/c/memsafety-ext2/length_test03_true-valid-memsafety.i -s /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 7db66fa755812d372ccac4d56a0ec85104dbcc6e ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/config/TaipanMemDerefMemtrack.xml -i ../../sv-benchmarks/c/memsafety-ext2/length_test03_true-valid-memsafety.i -s /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 7db66fa755812d372ccac4d56a0ec85104dbcc6e .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: AssertionError: var is still there: v_prenex_179 term size 41 --- Real Ultimate output --- This is Ultimate 0.1.23-1dbac8b [2018-10-27 04:46:28,644 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-10-27 04:46:28,646 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-10-27 04:46:28,657 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-10-27 04:46:28,658 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-10-27 04:46:28,658 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-10-27 04:46:28,659 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-10-27 04:46:28,661 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-10-27 04:46:28,662 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-10-27 04:46:28,663 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-10-27 04:46:28,663 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-10-27 04:46:28,663 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-10-27 04:46:28,665 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-10-27 04:46:28,665 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-10-27 04:46:28,666 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-10-27 04:46:28,667 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-10-27 04:46:28,667 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-10-27 04:46:28,669 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-10-27 04:46:28,670 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-10-27 04:46:28,671 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-10-27 04:46:28,673 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-10-27 04:46:28,673 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-10-27 04:46:28,675 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-10-27 04:46:28,675 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-10-27 04:46:28,675 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-10-27 04:46:28,676 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-10-27 04:46:28,677 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-10-27 04:46:28,678 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-10-27 04:46:28,678 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-10-27 04:46:28,679 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-10-27 04:46:28,679 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-10-27 04:46:28,680 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-10-27 04:46:28,680 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-10-27 04:46:28,681 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-10-27 04:46:28,681 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-10-27 04:46:28,682 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-10-27 04:46:28,682 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Default.epf [2018-10-27 04:46:28,693 INFO L110 SettingsManager]: Loading preferences was successful [2018-10-27 04:46:28,694 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-10-27 04:46:28,695 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-10-27 04:46:28,695 INFO L133 SettingsManager]: * User list type=DISABLED [2018-10-27 04:46:28,695 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-10-27 04:46:28,696 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-10-27 04:46:28,696 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-10-27 04:46:28,696 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-10-27 04:46:28,696 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-10-27 04:46:28,696 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-10-27 04:46:28,696 INFO L133 SettingsManager]: * Interval Domain=false [2018-10-27 04:46:28,697 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-10-27 04:46:28,697 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-10-27 04:46:28,697 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-10-27 04:46:28,697 INFO L133 SettingsManager]: * sizeof long=4 [2018-10-27 04:46:28,697 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-10-27 04:46:28,697 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-10-27 04:46:28,697 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-10-27 04:46:28,698 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-10-27 04:46:28,698 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-10-27 04:46:28,698 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-10-27 04:46:28,698 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-10-27 04:46:28,698 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-10-27 04:46:28,698 INFO L133 SettingsManager]: * sizeof long double=12 [2018-10-27 04:46:28,698 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-10-27 04:46:28,699 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-10-27 04:46:28,699 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-10-27 04:46:28,699 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-10-27 04:46:28,699 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-27 04:46:28,699 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-10-27 04:46:28,699 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-10-27 04:46:28,699 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-10-27 04:46:28,700 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-10-27 04:46:28,700 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-10-27 04:46:28,700 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 7db66fa755812d372ccac4d56a0ec85104dbcc6e [2018-10-27 04:46:28,734 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-10-27 04:46:28,749 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-10-27 04:46:28,752 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-10-27 04:46:28,754 INFO L271 PluginConnector]: Initializing CDTParser... [2018-10-27 04:46:28,754 INFO L276 PluginConnector]: CDTParser initialized [2018-10-27 04:46:28,755 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/../../sv-benchmarks/c/memsafety-ext2/length_test03_true-valid-memsafety.i [2018-10-27 04:46:28,797 INFO L218 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/data/028cd1901/1c88ba1fbebb4249891fb809adf23a8c/FLAGde7dff70c [2018-10-27 04:46:29,220 INFO L298 CDTParser]: Found 1 translation units. [2018-10-27 04:46:29,221 INFO L158 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/sv-benchmarks/c/memsafety-ext2/length_test03_true-valid-memsafety.i [2018-10-27 04:46:29,233 INFO L346 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/data/028cd1901/1c88ba1fbebb4249891fb809adf23a8c/FLAGde7dff70c [2018-10-27 04:46:29,245 INFO L354 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/data/028cd1901/1c88ba1fbebb4249891fb809adf23a8c [2018-10-27 04:46:29,247 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-10-27 04:46:29,249 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-10-27 04:46:29,249 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-10-27 04:46:29,249 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-10-27 04:46:29,253 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-10-27 04:46:29,254 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.10 04:46:29" (1/1) ... [2018-10-27 04:46:29,256 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2ad8fa87 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:46:29, skipping insertion in model container [2018-10-27 04:46:29,256 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.10 04:46:29" (1/1) ... [2018-10-27 04:46:29,265 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-10-27 04:46:29,298 INFO L174 MainTranslator]: Built tables and reachable declarations [2018-10-27 04:46:29,520 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-27 04:46:29,528 INFO L189 MainTranslator]: Completed pre-run [2018-10-27 04:46:29,582 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-27 04:46:29,616 INFO L193 MainTranslator]: Completed translation [2018-10-27 04:46:29,616 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:46:29 WrapperNode [2018-10-27 04:46:29,616 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-10-27 04:46:29,617 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-10-27 04:46:29,617 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-10-27 04:46:29,617 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-10-27 04:46:29,625 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:46:29" (1/1) ... [2018-10-27 04:46:29,637 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:46:29" (1/1) ... [2018-10-27 04:46:29,730 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-10-27 04:46:29,730 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-10-27 04:46:29,730 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-10-27 04:46:29,730 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-10-27 04:46:29,738 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:46:29" (1/1) ... [2018-10-27 04:46:29,738 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:46:29" (1/1) ... [2018-10-27 04:46:29,743 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:46:29" (1/1) ... [2018-10-27 04:46:29,743 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:46:29" (1/1) ... [2018-10-27 04:46:29,754 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:46:29" (1/1) ... [2018-10-27 04:46:29,758 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:46:29" (1/1) ... [2018-10-27 04:46:29,761 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:46:29" (1/1) ... [2018-10-27 04:46:29,764 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-10-27 04:46:29,764 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-10-27 04:46:29,764 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-10-27 04:46:29,765 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-10-27 04:46:29,765 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:46:29" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-27 04:46:29,820 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-10-27 04:46:29,820 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-10-27 04:46:29,820 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-10-27 04:46:29,821 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-10-27 04:46:29,821 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-10-27 04:46:29,821 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-10-27 04:46:29,821 INFO L130 BoogieDeclarations]: Found specification of procedure append [2018-10-27 04:46:29,821 INFO L138 BoogieDeclarations]: Found implementation of procedure append [2018-10-27 04:46:30,806 INFO L341 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-10-27 04:46:30,806 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.10 04:46:30 BoogieIcfgContainer [2018-10-27 04:46:30,806 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-10-27 04:46:30,807 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-10-27 04:46:30,807 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-10-27 04:46:30,811 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-10-27 04:46:30,811 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.10 04:46:29" (1/3) ... [2018-10-27 04:46:30,812 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7e51c056 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.10 04:46:30, skipping insertion in model container [2018-10-27 04:46:30,812 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:46:29" (2/3) ... [2018-10-27 04:46:30,813 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7e51c056 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.10 04:46:30, skipping insertion in model container [2018-10-27 04:46:30,813 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.10 04:46:30" (3/3) ... [2018-10-27 04:46:30,815 INFO L112 eAbstractionObserver]: Analyzing ICFG length_test03_true-valid-memsafety.i [2018-10-27 04:46:30,823 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-10-27 04:46:30,830 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 55 error locations. [2018-10-27 04:46:30,844 INFO L257 AbstractCegarLoop]: Starting to check reachability of 55 error locations. [2018-10-27 04:46:30,866 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-10-27 04:46:30,866 INFO L383 AbstractCegarLoop]: Hoare is false [2018-10-27 04:46:30,866 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-10-27 04:46:30,867 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-10-27 04:46:30,867 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-10-27 04:46:30,867 INFO L387 AbstractCegarLoop]: Difference is false [2018-10-27 04:46:30,867 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-10-27 04:46:30,868 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-10-27 04:46:30,884 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states. [2018-10-27 04:46:30,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-10-27 04:46:30,892 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:30,893 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:30,896 INFO L424 AbstractCegarLoop]: === Iteration 1 === [mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:30,902 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:30,903 INFO L82 PathProgramCache]: Analyzing trace with hash 1984049023, now seen corresponding path program 1 times [2018-10-27 04:46:30,905 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:30,946 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:30,946 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:30,946 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:30,946 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:30,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:31,071 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:31,073 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:31,073 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-27 04:46:31,074 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:31,078 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-27 04:46:31,090 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-27 04:46:31,091 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:46:31,093 INFO L87 Difference]: Start difference. First operand 141 states. Second operand 3 states. [2018-10-27 04:46:31,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:31,415 INFO L93 Difference]: Finished difference Result 141 states and 148 transitions. [2018-10-27 04:46:31,416 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-27 04:46:31,417 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-10-27 04:46:31,417 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:31,427 INFO L225 Difference]: With dead ends: 141 [2018-10-27 04:46:31,427 INFO L226 Difference]: Without dead ends: 138 [2018-10-27 04:46:31,429 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:46:31,443 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-10-27 04:46:31,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 136. [2018-10-27 04:46:31,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-10-27 04:46:31,469 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 142 transitions. [2018-10-27 04:46:31,470 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 142 transitions. Word has length 7 [2018-10-27 04:46:31,470 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:31,470 INFO L481 AbstractCegarLoop]: Abstraction has 136 states and 142 transitions. [2018-10-27 04:46:31,471 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-27 04:46:31,471 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 142 transitions. [2018-10-27 04:46:31,471 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-10-27 04:46:31,471 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:31,471 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:31,473 INFO L424 AbstractCegarLoop]: === Iteration 2 === [mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:31,474 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:31,474 INFO L82 PathProgramCache]: Analyzing trace with hash 1375977608, now seen corresponding path program 1 times [2018-10-27 04:46:31,474 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:31,475 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:31,475 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:31,475 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:31,475 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:31,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:31,606 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:31,606 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:31,606 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-27 04:46:31,606 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:31,608 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-27 04:46:31,608 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-27 04:46:31,608 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:46:31,609 INFO L87 Difference]: Start difference. First operand 136 states and 142 transitions. Second operand 3 states. [2018-10-27 04:46:31,838 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:31,838 INFO L93 Difference]: Finished difference Result 134 states and 140 transitions. [2018-10-27 04:46:31,838 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-27 04:46:31,839 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 8 [2018-10-27 04:46:31,839 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:31,840 INFO L225 Difference]: With dead ends: 134 [2018-10-27 04:46:31,840 INFO L226 Difference]: Without dead ends: 134 [2018-10-27 04:46:31,841 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:46:31,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-10-27 04:46:31,847 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-10-27 04:46:31,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-10-27 04:46:31,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 140 transitions. [2018-10-27 04:46:31,850 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 140 transitions. Word has length 8 [2018-10-27 04:46:31,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:31,851 INFO L481 AbstractCegarLoop]: Abstraction has 134 states and 140 transitions. [2018-10-27 04:46:31,851 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-27 04:46:31,851 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 140 transitions. [2018-10-27 04:46:31,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2018-10-27 04:46:31,851 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:31,852 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:31,853 INFO L424 AbstractCegarLoop]: === Iteration 3 === [mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:31,853 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:31,853 INFO L82 PathProgramCache]: Analyzing trace with hash -294367071, now seen corresponding path program 1 times [2018-10-27 04:46:31,853 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:31,854 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:31,854 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:31,854 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:31,854 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:31,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:31,918 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:31,918 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:31,918 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:46:31,918 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:31,919 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:46:31,919 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:46:31,919 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:46:31,919 INFO L87 Difference]: Start difference. First operand 134 states and 140 transitions. Second operand 5 states. [2018-10-27 04:46:32,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:32,387 INFO L93 Difference]: Finished difference Result 135 states and 142 transitions. [2018-10-27 04:46:32,388 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 04:46:32,388 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 9 [2018-10-27 04:46:32,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:32,390 INFO L225 Difference]: With dead ends: 135 [2018-10-27 04:46:32,390 INFO L226 Difference]: Without dead ends: 135 [2018-10-27 04:46:32,390 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:46:32,391 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-10-27 04:46:32,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 133. [2018-10-27 04:46:32,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-10-27 04:46:32,399 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 139 transitions. [2018-10-27 04:46:32,399 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 139 transitions. Word has length 9 [2018-10-27 04:46:32,399 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:32,399 INFO L481 AbstractCegarLoop]: Abstraction has 133 states and 139 transitions. [2018-10-27 04:46:32,399 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:46:32,400 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 139 transitions. [2018-10-27 04:46:32,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2018-10-27 04:46:32,401 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:32,401 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:32,402 INFO L424 AbstractCegarLoop]: === Iteration 4 === [mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:32,402 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:32,403 INFO L82 PathProgramCache]: Analyzing trace with hash -535444566, now seen corresponding path program 1 times [2018-10-27 04:46:32,403 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:32,404 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:32,404 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:32,404 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:32,404 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:32,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:32,480 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:32,480 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:32,480 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 04:46:32,480 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:32,480 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:46:32,481 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:46:32,481 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:46:32,481 INFO L87 Difference]: Start difference. First operand 133 states and 139 transitions. Second operand 4 states. [2018-10-27 04:46:32,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:32,638 INFO L93 Difference]: Finished difference Result 132 states and 138 transitions. [2018-10-27 04:46:32,639 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 04:46:32,639 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 10 [2018-10-27 04:46:32,640 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:32,640 INFO L225 Difference]: With dead ends: 132 [2018-10-27 04:46:32,640 INFO L226 Difference]: Without dead ends: 132 [2018-10-27 04:46:32,641 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:46:32,641 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-10-27 04:46:32,648 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 132. [2018-10-27 04:46:32,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-10-27 04:46:32,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 138 transitions. [2018-10-27 04:46:32,656 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 138 transitions. Word has length 10 [2018-10-27 04:46:32,656 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:32,656 INFO L481 AbstractCegarLoop]: Abstraction has 132 states and 138 transitions. [2018-10-27 04:46:32,656 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:46:32,656 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 138 transitions. [2018-10-27 04:46:32,657 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-10-27 04:46:32,657 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:32,657 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:32,658 INFO L424 AbstractCegarLoop]: === Iteration 5 === [mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:32,658 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:32,658 INFO L82 PathProgramCache]: Analyzing trace with hash 79516389, now seen corresponding path program 1 times [2018-10-27 04:46:32,658 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:32,659 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:32,659 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:32,660 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:32,660 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:32,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:32,724 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:32,725 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:32,725 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:46:32,725 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:32,725 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:46:32,726 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:46:32,726 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:46:32,726 INFO L87 Difference]: Start difference. First operand 132 states and 138 transitions. Second operand 5 states. [2018-10-27 04:46:32,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:32,847 INFO L93 Difference]: Finished difference Result 133 states and 140 transitions. [2018-10-27 04:46:32,847 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 04:46:32,848 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 13 [2018-10-27 04:46:32,848 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:32,848 INFO L225 Difference]: With dead ends: 133 [2018-10-27 04:46:32,848 INFO L226 Difference]: Without dead ends: 133 [2018-10-27 04:46:32,849 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:46:32,849 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-10-27 04:46:32,852 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 131. [2018-10-27 04:46:32,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-10-27 04:46:32,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 137 transitions. [2018-10-27 04:46:32,857 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 137 transitions. Word has length 13 [2018-10-27 04:46:32,857 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:32,857 INFO L481 AbstractCegarLoop]: Abstraction has 131 states and 137 transitions. [2018-10-27 04:46:32,857 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:46:32,857 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 137 transitions. [2018-10-27 04:46:32,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-10-27 04:46:32,858 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:32,858 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:32,860 INFO L424 AbstractCegarLoop]: === Iteration 6 === [mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:32,861 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:32,861 INFO L82 PathProgramCache]: Analyzing trace with hash -1829959186, now seen corresponding path program 1 times [2018-10-27 04:46:32,861 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:32,862 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:32,862 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:32,862 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:32,862 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:32,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:32,945 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:32,945 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:32,945 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 04:46:32,945 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:32,946 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:46:32,946 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:46:32,946 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:46:32,946 INFO L87 Difference]: Start difference. First operand 131 states and 137 transitions. Second operand 4 states. [2018-10-27 04:46:33,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:33,041 INFO L93 Difference]: Finished difference Result 132 states and 139 transitions. [2018-10-27 04:46:33,052 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 04:46:33,052 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2018-10-27 04:46:33,052 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:33,053 INFO L225 Difference]: With dead ends: 132 [2018-10-27 04:46:33,053 INFO L226 Difference]: Without dead ends: 132 [2018-10-27 04:46:33,054 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:46:33,054 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-10-27 04:46:33,059 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 130. [2018-10-27 04:46:33,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-10-27 04:46:33,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 136 transitions. [2018-10-27 04:46:33,060 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 136 transitions. Word has length 14 [2018-10-27 04:46:33,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:33,060 INFO L481 AbstractCegarLoop]: Abstraction has 130 states and 136 transitions. [2018-10-27 04:46:33,060 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:46:33,061 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 136 transitions. [2018-10-27 04:46:33,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-10-27 04:46:33,061 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:33,061 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:33,064 INFO L424 AbstractCegarLoop]: === Iteration 7 === [mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:33,064 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:33,064 INFO L82 PathProgramCache]: Analyzing trace with hash -529089576, now seen corresponding path program 1 times [2018-10-27 04:46:33,065 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:33,065 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:33,065 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:33,066 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:33,066 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:33,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:33,161 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:33,161 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:33,162 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-27 04:46:33,162 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:33,162 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-27 04:46:33,162 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-27 04:46:33,162 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:46:33,163 INFO L87 Difference]: Start difference. First operand 130 states and 136 transitions. Second operand 3 states. [2018-10-27 04:46:33,287 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:33,288 INFO L93 Difference]: Finished difference Result 129 states and 135 transitions. [2018-10-27 04:46:33,288 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-27 04:46:33,288 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2018-10-27 04:46:33,288 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:33,289 INFO L225 Difference]: With dead ends: 129 [2018-10-27 04:46:33,289 INFO L226 Difference]: Without dead ends: 129 [2018-10-27 04:46:33,289 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:46:33,290 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-10-27 04:46:33,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 129. [2018-10-27 04:46:33,293 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-10-27 04:46:33,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 135 transitions. [2018-10-27 04:46:33,294 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 135 transitions. Word has length 18 [2018-10-27 04:46:33,294 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:33,294 INFO L481 AbstractCegarLoop]: Abstraction has 129 states and 135 transitions. [2018-10-27 04:46:33,294 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-27 04:46:33,294 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 135 transitions. [2018-10-27 04:46:33,295 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-10-27 04:46:33,297 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:33,297 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:33,298 INFO L424 AbstractCegarLoop]: === Iteration 8 === [mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:33,299 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:33,299 INFO L82 PathProgramCache]: Analyzing trace with hash 778092487, now seen corresponding path program 1 times [2018-10-27 04:46:33,299 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:33,299 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:33,300 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:33,300 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:33,300 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:33,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:33,373 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:33,373 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:33,374 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-27 04:46:33,374 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:33,374 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-27 04:46:33,374 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-27 04:46:33,374 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:46:33,374 INFO L87 Difference]: Start difference. First operand 129 states and 135 transitions. Second operand 3 states. [2018-10-27 04:46:33,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:33,434 INFO L93 Difference]: Finished difference Result 128 states and 134 transitions. [2018-10-27 04:46:33,434 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-27 04:46:33,434 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2018-10-27 04:46:33,435 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:33,435 INFO L225 Difference]: With dead ends: 128 [2018-10-27 04:46:33,435 INFO L226 Difference]: Without dead ends: 128 [2018-10-27 04:46:33,435 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:46:33,436 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-10-27 04:46:33,438 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 128. [2018-10-27 04:46:33,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-10-27 04:46:33,439 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 134 transitions. [2018-10-27 04:46:33,439 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 134 transitions. Word has length 19 [2018-10-27 04:46:33,439 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:33,439 INFO L481 AbstractCegarLoop]: Abstraction has 128 states and 134 transitions. [2018-10-27 04:46:33,439 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-27 04:46:33,440 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 134 transitions. [2018-10-27 04:46:33,440 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-10-27 04:46:33,440 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:33,440 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:33,441 INFO L424 AbstractCegarLoop]: === Iteration 9 === [mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:33,441 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:33,441 INFO L82 PathProgramCache]: Analyzing trace with hash -1648936518, now seen corresponding path program 1 times [2018-10-27 04:46:33,442 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:33,442 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:33,442 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:33,442 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:33,443 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:33,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:33,629 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:33,629 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:33,630 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-10-27 04:46:33,630 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:33,630 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-27 04:46:33,630 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-27 04:46:33,630 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-10-27 04:46:33,631 INFO L87 Difference]: Start difference. First operand 128 states and 134 transitions. Second operand 9 states. [2018-10-27 04:46:34,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:34,044 INFO L93 Difference]: Finished difference Result 225 states and 236 transitions. [2018-10-27 04:46:34,044 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-27 04:46:34,044 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 20 [2018-10-27 04:46:34,044 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:34,045 INFO L225 Difference]: With dead ends: 225 [2018-10-27 04:46:34,045 INFO L226 Difference]: Without dead ends: 225 [2018-10-27 04:46:34,046 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2018-10-27 04:46:34,046 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225 states. [2018-10-27 04:46:34,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225 to 159. [2018-10-27 04:46:34,050 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-10-27 04:46:34,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 186 transitions. [2018-10-27 04:46:34,050 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 186 transitions. Word has length 20 [2018-10-27 04:46:34,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:34,051 INFO L481 AbstractCegarLoop]: Abstraction has 159 states and 186 transitions. [2018-10-27 04:46:34,051 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-27 04:46:34,051 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 186 transitions. [2018-10-27 04:46:34,051 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-10-27 04:46:34,051 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:34,051 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:34,055 INFO L424 AbstractCegarLoop]: === Iteration 10 === [mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:34,055 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:34,055 INFO L82 PathProgramCache]: Analyzing trace with hash 422575657, now seen corresponding path program 1 times [2018-10-27 04:46:34,055 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:34,056 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:34,056 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:34,056 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:34,056 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:34,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:34,273 WARN L179 SmtUtils]: Spent 115.00 ms on a formula simplification that was a NOOP. DAG size: 11 [2018-10-27 04:46:34,384 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:34,384 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:34,384 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-10-27 04:46:34,384 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:34,385 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-27 04:46:34,385 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-27 04:46:34,385 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2018-10-27 04:46:34,385 INFO L87 Difference]: Start difference. First operand 159 states and 186 transitions. Second operand 9 states. [2018-10-27 04:46:35,372 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:35,372 INFO L93 Difference]: Finished difference Result 249 states and 260 transitions. [2018-10-27 04:46:35,373 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-27 04:46:35,373 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 21 [2018-10-27 04:46:35,373 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:35,374 INFO L225 Difference]: With dead ends: 249 [2018-10-27 04:46:35,374 INFO L226 Difference]: Without dead ends: 249 [2018-10-27 04:46:35,374 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2018-10-27 04:46:35,375 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 249 states. [2018-10-27 04:46:35,378 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 249 to 188. [2018-10-27 04:46:35,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-10-27 04:46:35,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 235 transitions. [2018-10-27 04:46:35,379 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 235 transitions. Word has length 21 [2018-10-27 04:46:35,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:35,379 INFO L481 AbstractCegarLoop]: Abstraction has 188 states and 235 transitions. [2018-10-27 04:46:35,379 INFO L482 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-27 04:46:35,379 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 235 transitions. [2018-10-27 04:46:35,380 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-10-27 04:46:35,382 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:35,383 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:35,383 INFO L424 AbstractCegarLoop]: === Iteration 11 === [mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:35,384 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:35,384 INFO L82 PathProgramCache]: Analyzing trace with hash 402418015, now seen corresponding path program 1 times [2018-10-27 04:46:35,384 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:35,384 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:35,385 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:35,385 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:35,385 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:35,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:35,576 WARN L179 SmtUtils]: Spent 107.00 ms on a formula simplification that was a NOOP. DAG size: 11 [2018-10-27 04:46:35,718 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:35,718 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:35,718 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-10-27 04:46:35,718 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:35,719 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-10-27 04:46:35,719 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-10-27 04:46:35,719 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2018-10-27 04:46:35,719 INFO L87 Difference]: Start difference. First operand 188 states and 235 transitions. Second operand 10 states. [2018-10-27 04:46:36,321 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:36,322 INFO L93 Difference]: Finished difference Result 246 states and 257 transitions. [2018-10-27 04:46:36,323 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-27 04:46:36,323 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 24 [2018-10-27 04:46:36,323 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:36,324 INFO L225 Difference]: With dead ends: 246 [2018-10-27 04:46:36,324 INFO L226 Difference]: Without dead ends: 246 [2018-10-27 04:46:36,324 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2018-10-27 04:46:36,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246 states. [2018-10-27 04:46:36,328 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246 to 188. [2018-10-27 04:46:36,329 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-10-27 04:46:36,329 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 232 transitions. [2018-10-27 04:46:36,330 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 232 transitions. Word has length 24 [2018-10-27 04:46:36,330 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:36,330 INFO L481 AbstractCegarLoop]: Abstraction has 188 states and 232 transitions. [2018-10-27 04:46:36,330 INFO L482 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-10-27 04:46:36,330 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 232 transitions. [2018-10-27 04:46:36,331 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-10-27 04:46:36,331 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:36,331 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:36,332 INFO L424 AbstractCegarLoop]: === Iteration 12 === [mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:36,332 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:36,336 INFO L82 PathProgramCache]: Analyzing trace with hash 402424037, now seen corresponding path program 1 times [2018-10-27 04:46:36,336 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:36,337 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:36,337 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:36,337 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:36,337 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:36,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:36,417 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:36,417 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:36,417 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 04:46:36,417 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:36,418 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-27 04:46:36,418 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-27 04:46:36,418 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:46:36,418 INFO L87 Difference]: Start difference. First operand 188 states and 232 transitions. Second operand 3 states. [2018-10-27 04:46:36,436 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:36,437 INFO L93 Difference]: Finished difference Result 190 states and 234 transitions. [2018-10-27 04:46:36,443 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-27 04:46:36,443 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 24 [2018-10-27 04:46:36,443 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:36,444 INFO L225 Difference]: With dead ends: 190 [2018-10-27 04:46:36,444 INFO L226 Difference]: Without dead ends: 190 [2018-10-27 04:46:36,444 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:46:36,445 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 190 states. [2018-10-27 04:46:36,446 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 190 to 190. [2018-10-27 04:46:36,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-10-27 04:46:36,447 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 234 transitions. [2018-10-27 04:46:36,447 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 234 transitions. Word has length 24 [2018-10-27 04:46:36,447 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:36,447 INFO L481 AbstractCegarLoop]: Abstraction has 190 states and 234 transitions. [2018-10-27 04:46:36,447 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-27 04:46:36,448 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 234 transitions. [2018-10-27 04:46:36,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-10-27 04:46:36,449 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:36,449 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:36,450 INFO L424 AbstractCegarLoop]: === Iteration 13 === [mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:36,450 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:36,450 INFO L82 PathProgramCache]: Analyzing trace with hash 176661409, now seen corresponding path program 1 times [2018-10-27 04:46:36,450 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:36,450 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:36,451 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:36,451 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:36,451 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:36,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:36,725 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:36,725 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:36,725 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:46:36,725 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:36,725 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:46:36,725 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:46:36,726 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:46:36,726 INFO L87 Difference]: Start difference. First operand 190 states and 234 transitions. Second operand 5 states. [2018-10-27 04:46:37,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:37,007 INFO L93 Difference]: Finished difference Result 184 states and 225 transitions. [2018-10-27 04:46:37,007 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 04:46:37,007 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2018-10-27 04:46:37,008 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:37,008 INFO L225 Difference]: With dead ends: 184 [2018-10-27 04:46:37,008 INFO L226 Difference]: Without dead ends: 184 [2018-10-27 04:46:37,009 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:46:37,009 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-10-27 04:46:37,011 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 184. [2018-10-27 04:46:37,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-10-27 04:46:37,014 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 225 transitions. [2018-10-27 04:46:37,014 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 225 transitions. Word has length 26 [2018-10-27 04:46:37,014 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:37,014 INFO L481 AbstractCegarLoop]: Abstraction has 184 states and 225 transitions. [2018-10-27 04:46:37,014 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:46:37,015 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 225 transitions. [2018-10-27 04:46:37,015 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-10-27 04:46:37,015 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:37,015 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:37,016 INFO L424 AbstractCegarLoop]: === Iteration 14 === [mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:37,016 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:37,016 INFO L82 PathProgramCache]: Analyzing trace with hash 182972007, now seen corresponding path program 1 times [2018-10-27 04:46:37,016 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:37,017 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:37,017 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:37,017 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:37,017 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:37,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:37,149 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:37,149 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:37,149 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-27 04:46:37,149 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:37,150 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-27 04:46:37,150 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-27 04:46:37,150 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-10-27 04:46:37,150 INFO L87 Difference]: Start difference. First operand 184 states and 225 transitions. Second operand 6 states. [2018-10-27 04:46:37,285 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:37,286 INFO L93 Difference]: Finished difference Result 180 states and 217 transitions. [2018-10-27 04:46:37,287 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 04:46:37,288 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 26 [2018-10-27 04:46:37,288 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:37,288 INFO L225 Difference]: With dead ends: 180 [2018-10-27 04:46:37,288 INFO L226 Difference]: Without dead ends: 180 [2018-10-27 04:46:37,289 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:46:37,289 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-10-27 04:46:37,290 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 180. [2018-10-27 04:46:37,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-10-27 04:46:37,291 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 217 transitions. [2018-10-27 04:46:37,291 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 217 transitions. Word has length 26 [2018-10-27 04:46:37,291 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:37,292 INFO L481 AbstractCegarLoop]: Abstraction has 180 states and 217 transitions. [2018-10-27 04:46:37,292 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-27 04:46:37,292 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 217 transitions. [2018-10-27 04:46:37,293 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-10-27 04:46:37,293 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:37,293 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:37,293 INFO L424 AbstractCegarLoop]: === Iteration 15 === [mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:37,294 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:37,294 INFO L82 PathProgramCache]: Analyzing trace with hash 1181536563, now seen corresponding path program 1 times [2018-10-27 04:46:37,294 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:37,294 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:37,294 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:37,294 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:37,295 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:37,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:37,424 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:37,425 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:37,425 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-27 04:46:37,425 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:37,425 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-27 04:46:37,425 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-27 04:46:37,425 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:46:37,426 INFO L87 Difference]: Start difference. First operand 180 states and 217 transitions. Second operand 8 states. [2018-10-27 04:46:37,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:37,619 INFO L93 Difference]: Finished difference Result 189 states and 217 transitions. [2018-10-27 04:46:37,620 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-27 04:46:37,620 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 27 [2018-10-27 04:46:37,620 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:37,621 INFO L225 Difference]: With dead ends: 189 [2018-10-27 04:46:37,621 INFO L226 Difference]: Without dead ends: 189 [2018-10-27 04:46:37,621 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=89, Unknown=0, NotChecked=0, Total=132 [2018-10-27 04:46:37,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-10-27 04:46:37,625 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 150. [2018-10-27 04:46:37,625 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-10-27 04:46:37,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 165 transitions. [2018-10-27 04:46:37,626 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 165 transitions. Word has length 27 [2018-10-27 04:46:37,626 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:37,626 INFO L481 AbstractCegarLoop]: Abstraction has 150 states and 165 transitions. [2018-10-27 04:46:37,627 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-27 04:46:37,630 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 165 transitions. [2018-10-27 04:46:37,631 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-10-27 04:46:37,631 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:37,631 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:37,632 INFO L424 AbstractCegarLoop]: === Iteration 16 === [mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:37,632 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:37,632 INFO L82 PathProgramCache]: Analyzing trace with hash 1377165122, now seen corresponding path program 1 times [2018-10-27 04:46:37,632 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:37,633 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:37,633 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:37,633 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:37,633 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:37,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:37,724 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:37,725 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:37,725 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:46:37,725 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:37,725 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:46:37,725 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:46:37,725 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:46:37,726 INFO L87 Difference]: Start difference. First operand 150 states and 165 transitions. Second operand 5 states. [2018-10-27 04:46:37,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:37,836 INFO L93 Difference]: Finished difference Result 148 states and 161 transitions. [2018-10-27 04:46:37,837 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 04:46:37,837 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2018-10-27 04:46:37,837 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:37,838 INFO L225 Difference]: With dead ends: 148 [2018-10-27 04:46:37,838 INFO L226 Difference]: Without dead ends: 148 [2018-10-27 04:46:37,838 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-10-27 04:46:37,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-10-27 04:46:37,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 148. [2018-10-27 04:46:37,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-10-27 04:46:37,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 161 transitions. [2018-10-27 04:46:37,841 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 161 transitions. Word has length 27 [2018-10-27 04:46:37,841 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:37,841 INFO L481 AbstractCegarLoop]: Abstraction has 148 states and 161 transitions. [2018-10-27 04:46:37,841 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:46:37,842 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 161 transitions. [2018-10-27 04:46:37,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-10-27 04:46:37,842 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:37,842 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:37,842 INFO L424 AbstractCegarLoop]: === Iteration 17 === [mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:37,843 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:37,843 INFO L82 PathProgramCache]: Analyzing trace with hash 1585276725, now seen corresponding path program 1 times [2018-10-27 04:46:37,843 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:37,849 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:37,849 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:37,850 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:37,850 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:37,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:37,962 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:37,962 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:37,963 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-27 04:46:37,963 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:37,963 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-27 04:46:37,963 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-27 04:46:37,963 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:46:37,963 INFO L87 Difference]: Start difference. First operand 148 states and 161 transitions. Second operand 8 states. [2018-10-27 04:46:38,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:38,174 INFO L93 Difference]: Finished difference Result 156 states and 163 transitions. [2018-10-27 04:46:38,174 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-27 04:46:38,174 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 29 [2018-10-27 04:46:38,175 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:38,176 INFO L225 Difference]: With dead ends: 156 [2018-10-27 04:46:38,176 INFO L226 Difference]: Without dead ends: 156 [2018-10-27 04:46:38,177 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=89, Unknown=0, NotChecked=0, Total=132 [2018-10-27 04:46:38,177 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-10-27 04:46:38,179 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 148. [2018-10-27 04:46:38,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-10-27 04:46:38,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 159 transitions. [2018-10-27 04:46:38,180 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 159 transitions. Word has length 29 [2018-10-27 04:46:38,180 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:38,180 INFO L481 AbstractCegarLoop]: Abstraction has 148 states and 159 transitions. [2018-10-27 04:46:38,180 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-27 04:46:38,181 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 159 transitions. [2018-10-27 04:46:38,181 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-10-27 04:46:38,181 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:38,181 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:38,181 INFO L424 AbstractCegarLoop]: === Iteration 18 === [mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:38,182 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:38,182 INFO L82 PathProgramCache]: Analyzing trace with hash 605761572, now seen corresponding path program 1 times [2018-10-27 04:46:38,182 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:38,182 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:38,183 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:38,183 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:38,183 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:38,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:38,278 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:38,278 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:38,278 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-27 04:46:38,278 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:38,278 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-27 04:46:38,278 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-27 04:46:38,278 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-10-27 04:46:38,279 INFO L87 Difference]: Start difference. First operand 148 states and 159 transitions. Second operand 6 states. [2018-10-27 04:46:38,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:38,400 INFO L93 Difference]: Finished difference Result 150 states and 159 transitions. [2018-10-27 04:46:38,400 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 04:46:38,400 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 29 [2018-10-27 04:46:38,401 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:38,401 INFO L225 Difference]: With dead ends: 150 [2018-10-27 04:46:38,401 INFO L226 Difference]: Without dead ends: 150 [2018-10-27 04:46:38,401 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:46:38,402 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-10-27 04:46:38,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 146. [2018-10-27 04:46:38,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-10-27 04:46:38,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 155 transitions. [2018-10-27 04:46:38,404 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 155 transitions. Word has length 29 [2018-10-27 04:46:38,404 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:38,404 INFO L481 AbstractCegarLoop]: Abstraction has 146 states and 155 transitions. [2018-10-27 04:46:38,404 INFO L482 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-27 04:46:38,404 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 155 transitions. [2018-10-27 04:46:38,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-10-27 04:46:38,405 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:38,405 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:38,405 INFO L424 AbstractCegarLoop]: === Iteration 19 === [mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:38,405 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:38,405 INFO L82 PathProgramCache]: Analyzing trace with hash -1209380723, now seen corresponding path program 1 times [2018-10-27 04:46:38,406 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:38,406 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:38,406 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:38,406 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:38,406 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:38,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:38,629 WARN L179 SmtUtils]: Spent 136.00 ms on a formula simplification that was a NOOP. DAG size: 12 [2018-10-27 04:46:38,809 WARN L179 SmtUtils]: Spent 124.00 ms on a formula simplification that was a NOOP. DAG size: 16 [2018-10-27 04:46:38,872 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:38,873 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:38,873 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-10-27 04:46:38,873 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:38,873 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-10-27 04:46:38,873 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-10-27 04:46:38,873 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=109, Unknown=0, NotChecked=0, Total=132 [2018-10-27 04:46:38,874 INFO L87 Difference]: Start difference. First operand 146 states and 155 transitions. Second operand 12 states. [2018-10-27 04:46:39,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:39,269 INFO L93 Difference]: Finished difference Result 163 states and 174 transitions. [2018-10-27 04:46:39,269 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-10-27 04:46:39,269 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 32 [2018-10-27 04:46:39,270 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:39,270 INFO L225 Difference]: With dead ends: 163 [2018-10-27 04:46:39,270 INFO L226 Difference]: Without dead ends: 163 [2018-10-27 04:46:39,271 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=57, Invalid=249, Unknown=0, NotChecked=0, Total=306 [2018-10-27 04:46:39,271 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-10-27 04:46:39,273 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 154. [2018-10-27 04:46:39,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-10-27 04:46:39,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 164 transitions. [2018-10-27 04:46:39,274 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 164 transitions. Word has length 32 [2018-10-27 04:46:39,274 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:39,274 INFO L481 AbstractCegarLoop]: Abstraction has 154 states and 164 transitions. [2018-10-27 04:46:39,274 INFO L482 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-10-27 04:46:39,274 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 164 transitions. [2018-10-27 04:46:39,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-10-27 04:46:39,275 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:39,275 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:39,275 INFO L424 AbstractCegarLoop]: === Iteration 20 === [mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:39,276 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:39,276 INFO L82 PathProgramCache]: Analyzing trace with hash -394987703, now seen corresponding path program 1 times [2018-10-27 04:46:39,282 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:39,283 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:39,283 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:39,283 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:39,283 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:39,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:39,588 WARN L179 SmtUtils]: Spent 227.00 ms on a formula simplification. DAG size of input: 10 DAG size of output: 9 [2018-10-27 04:46:39,739 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:39,739 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:39,739 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-10-27 04:46:39,739 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:39,740 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-10-27 04:46:39,740 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-10-27 04:46:39,740 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=130, Unknown=0, NotChecked=0, Total=156 [2018-10-27 04:46:39,740 INFO L87 Difference]: Start difference. First operand 154 states and 164 transitions. Second operand 13 states. [2018-10-27 04:46:40,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:40,063 INFO L93 Difference]: Finished difference Result 159 states and 169 transitions. [2018-10-27 04:46:40,063 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-10-27 04:46:40,063 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 34 [2018-10-27 04:46:40,063 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:40,064 INFO L225 Difference]: With dead ends: 159 [2018-10-27 04:46:40,064 INFO L226 Difference]: Without dead ends: 159 [2018-10-27 04:46:40,064 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=59, Invalid=247, Unknown=0, NotChecked=0, Total=306 [2018-10-27 04:46:40,065 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-10-27 04:46:40,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 157. [2018-10-27 04:46:40,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-10-27 04:46:40,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 167 transitions. [2018-10-27 04:46:40,068 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 167 transitions. Word has length 34 [2018-10-27 04:46:40,068 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:40,068 INFO L481 AbstractCegarLoop]: Abstraction has 157 states and 167 transitions. [2018-10-27 04:46:40,068 INFO L482 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-10-27 04:46:40,068 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 167 transitions. [2018-10-27 04:46:40,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-10-27 04:46:40,068 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:40,069 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:40,069 INFO L424 AbstractCegarLoop]: === Iteration 21 === [mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:40,069 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:40,069 INFO L82 PathProgramCache]: Analyzing trace with hash 226936518, now seen corresponding path program 1 times [2018-10-27 04:46:40,069 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:40,070 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:40,070 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:40,070 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:40,070 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:40,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:40,161 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:40,162 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:46:40,162 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 04:46:40,162 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:46:40,162 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-27 04:46:40,162 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-27 04:46:40,162 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:46:40,162 INFO L87 Difference]: Start difference. First operand 157 states and 167 transitions. Second operand 3 states. [2018-10-27 04:46:40,309 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:40,310 INFO L93 Difference]: Finished difference Result 172 states and 183 transitions. [2018-10-27 04:46:40,316 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-27 04:46:40,316 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 42 [2018-10-27 04:46:40,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:40,317 INFO L225 Difference]: With dead ends: 172 [2018-10-27 04:46:40,317 INFO L226 Difference]: Without dead ends: 172 [2018-10-27 04:46:40,317 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:46:40,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2018-10-27 04:46:40,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 161. [2018-10-27 04:46:40,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-10-27 04:46:40,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 171 transitions. [2018-10-27 04:46:40,324 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 171 transitions. Word has length 42 [2018-10-27 04:46:40,324 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:40,324 INFO L481 AbstractCegarLoop]: Abstraction has 161 states and 171 transitions. [2018-10-27 04:46:40,324 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-27 04:46:40,324 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 171 transitions. [2018-10-27 04:46:40,325 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-10-27 04:46:40,325 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:40,328 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:40,329 INFO L424 AbstractCegarLoop]: === Iteration 22 === [mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:40,329 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:40,329 INFO L82 PathProgramCache]: Analyzing trace with hash 577923455, now seen corresponding path program 1 times [2018-10-27 04:46:40,329 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:40,333 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:40,333 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:40,333 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:40,333 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:40,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:40,833 WARN L179 SmtUtils]: Spent 156.00 ms on a formula simplification. DAG size of input: 10 DAG size of output: 9 [2018-10-27 04:46:41,138 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:41,139 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:46:41,139 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-27 04:46:41,139 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 46 with the following transitions: [2018-10-27 04:46:41,141 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [13], [15], [17], [19], [21], [25], [28], [31], [37], [41], [46], [125], [127], [129], [130], [131], [133], [136], [138], [140], [146], [148], [150], [152], [154], [156], [158], [160], [162], [188], [189], [190], [191], [193], [194], [195] [2018-10-27 04:46:41,185 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-10-27 04:46:41,185 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-10-27 04:46:42,419 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-10-27 04:46:42,421 INFO L272 AbstractInterpreter]: Visited 42 different actions 61 times. Never merged. Never widened. Never found a fixpoint. Largest state had 54 variables. [2018-10-27 04:46:42,430 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:42,431 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-10-27 04:46:42,431 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:46:42,431 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-27 04:46:42,439 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:42,439 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-27 04:46:42,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:42,517 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:46:42,572 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:46:42,573 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:46:42,595 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:46:42,595 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-27 04:46:42,701 WARN L854 $PredicateComparison]: unable to prove that (exists ((|append_#Ultimate.alloc_#res.base| Int)) (and (= 0 (select |c_old(#valid)| |append_#Ultimate.alloc_#res.base|)) (= (store |c_old(#valid)| |append_#Ultimate.alloc_#res.base| 1) |c_#valid|))) is different from true [2018-10-27 04:46:42,767 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:46:42,784 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:46:42,785 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-10-27 04:46:42,785 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:46:42,799 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:46:42,799 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-10-27 04:46:42,892 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 20 [2018-10-27 04:46:42,893 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:46:42,898 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-10-27 04:46:42,899 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:21, output treesize:20 [2018-10-27 04:46:43,322 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 3 not checked. [2018-10-27 04:46:43,323 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:46:45,238 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:45,255 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-10-27 04:46:45,255 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 8, 8] total 19 [2018-10-27 04:46:45,255 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-27 04:46:45,255 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-10-27 04:46:45,255 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-10-27 04:46:45,255 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=287, Unknown=3, NotChecked=34, Total=380 [2018-10-27 04:46:45,256 INFO L87 Difference]: Start difference. First operand 161 states and 171 transitions. Second operand 17 states. [2018-10-27 04:46:47,163 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:47,163 INFO L93 Difference]: Finished difference Result 195 states and 204 transitions. [2018-10-27 04:46:47,164 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-10-27 04:46:47,165 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 45 [2018-10-27 04:46:47,165 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:47,166 INFO L225 Difference]: With dead ends: 195 [2018-10-27 04:46:47,166 INFO L226 Difference]: Without dead ends: 195 [2018-10-27 04:46:47,166 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 80 SyntacticMatches, 4 SemanticMatches, 27 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 182 ImplicationChecksByTransitivity, 3.3s TimeCoverageRelationStatistics Valid=134, Invalid=620, Unknown=6, NotChecked=52, Total=812 [2018-10-27 04:46:47,166 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states. [2018-10-27 04:46:47,169 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 162. [2018-10-27 04:46:47,169 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-10-27 04:46:47,170 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 172 transitions. [2018-10-27 04:46:47,170 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 172 transitions. Word has length 45 [2018-10-27 04:46:47,170 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:47,170 INFO L481 AbstractCegarLoop]: Abstraction has 162 states and 172 transitions. [2018-10-27 04:46:47,170 INFO L482 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-10-27 04:46:47,170 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 172 transitions. [2018-10-27 04:46:47,171 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-10-27 04:46:47,171 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:47,171 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:47,171 INFO L424 AbstractCegarLoop]: === Iteration 23 === [mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:47,172 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:47,172 INFO L82 PathProgramCache]: Analyzing trace with hash 735758084, now seen corresponding path program 1 times [2018-10-27 04:46:47,172 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:47,173 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:47,173 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:47,173 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:47,173 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:47,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:47,373 WARN L179 SmtUtils]: Spent 107.00 ms on a formula simplification that was a NOOP. DAG size: 11 [2018-10-27 04:46:47,485 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:47,485 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:46:47,486 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-27 04:46:47,486 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 47 with the following transitions: [2018-10-27 04:46:47,486 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [13], [15], [17], [19], [21], [25], [28], [31], [37], [41], [46], [125], [127], [129], [131], [132], [133], [136], [138], [140], [146], [148], [150], [152], [154], [156], [158], [160], [162], [188], [189], [190], [191], [193], [194], [195] [2018-10-27 04:46:47,492 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-10-27 04:46:47,492 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-10-27 04:46:48,156 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-10-27 04:46:48,156 INFO L272 AbstractInterpreter]: Visited 42 different actions 61 times. Never merged. Never widened. Never found a fixpoint. Largest state had 54 variables. [2018-10-27 04:46:48,164 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:48,164 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-10-27 04:46:48,164 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:46:48,164 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-27 04:46:48,172 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:48,172 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-27 04:46:48,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:48,243 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:46:48,253 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:46:48,253 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:46:48,259 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:46:48,259 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:46:48,274 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:46:48,274 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:14 [2018-10-27 04:46:48,290 WARN L854 $PredicateComparison]: unable to prove that (exists ((|append_#Ultimate.alloc_~size| Int) (|append_#Ultimate.alloc_#res.base| Int)) (and (= 0 (select |c_old(#valid)| |append_#Ultimate.alloc_#res.base|)) (= (store |c_old(#valid)| |append_#Ultimate.alloc_#res.base| 1) |c_#valid|) (= (store |c_old(#length)| |append_#Ultimate.alloc_#res.base| |append_#Ultimate.alloc_~size|) |c_#length|))) is different from true [2018-10-27 04:46:48,348 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:46:48,366 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-10-27 04:46:48,366 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:46:48,386 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:46:48,387 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:46:48,388 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-10-27 04:46:48,388 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:46:48,396 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:46:48,396 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:31, output treesize:23 [2018-10-27 04:46:48,475 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:46:48,476 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:46:48,477 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:46:48,478 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-10-27 04:46:48,478 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:46:48,487 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-10-27 04:46:48,487 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:46:48,494 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:46:48,495 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:34, output treesize:9 [2018-10-27 04:46:48,522 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 4 not checked. [2018-10-27 04:46:48,522 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:46:48,810 WARN L179 SmtUtils]: Spent 170.00 ms on a formula simplification that was a NOOP. DAG size: 25 [2018-10-27 04:46:50,530 WARN L179 SmtUtils]: Spent 1.70 s on a formula simplification that was a NOOP. DAG size: 25 [2018-10-27 04:46:50,671 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 15 [2018-10-27 04:46:50,807 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 48 [2018-10-27 04:46:52,262 WARN L179 SmtUtils]: Spent 1.27 s on a formula simplification. DAG size of input: 113 DAG size of output: 36 [2018-10-27 04:46:52,725 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:52,751 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-10-27 04:46:52,751 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 8] total 22 [2018-10-27 04:46:52,752 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-27 04:46:52,752 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-10-27 04:46:52,752 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-10-27 04:46:52,752 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=397, Unknown=1, NotChecked=40, Total=506 [2018-10-27 04:46:52,752 INFO L87 Difference]: Start difference. First operand 162 states and 172 transitions. Second operand 16 states. [2018-10-27 04:46:54,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:46:54,481 INFO L93 Difference]: Finished difference Result 346 states and 369 transitions. [2018-10-27 04:46:54,482 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-10-27 04:46:54,482 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 46 [2018-10-27 04:46:54,483 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:46:54,484 INFO L225 Difference]: With dead ends: 346 [2018-10-27 04:46:54,484 INFO L226 Difference]: Without dead ends: 346 [2018-10-27 04:46:54,484 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 79 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 210 ImplicationChecksByTransitivity, 4.5s TimeCoverageRelationStatistics Valid=193, Invalid=927, Unknown=6, NotChecked=64, Total=1190 [2018-10-27 04:46:54,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 346 states. [2018-10-27 04:46:54,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 346 to 270. [2018-10-27 04:46:54,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 270 states. [2018-10-27 04:46:54,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 270 states to 270 states and 323 transitions. [2018-10-27 04:46:54,495 INFO L78 Accepts]: Start accepts. Automaton has 270 states and 323 transitions. Word has length 46 [2018-10-27 04:46:54,495 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:46:54,495 INFO L481 AbstractCegarLoop]: Abstraction has 270 states and 323 transitions. [2018-10-27 04:46:54,495 INFO L482 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-10-27 04:46:54,495 INFO L276 IsEmpty]: Start isEmpty. Operand 270 states and 323 transitions. [2018-10-27 04:46:54,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-10-27 04:46:54,496 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:46:54,496 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:46:54,499 INFO L424 AbstractCegarLoop]: === Iteration 24 === [mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:46:54,499 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:54,499 INFO L82 PathProgramCache]: Analyzing trace with hash 1751133860, now seen corresponding path program 1 times [2018-10-27 04:46:54,499 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:46:54,500 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:54,500 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:54,500 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:46:54,504 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:46:54,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:54,716 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:46:54,717 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:46:54,717 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-27 04:46:54,717 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 50 with the following transitions: [2018-10-27 04:46:54,717 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [13], [15], [17], [19], [21], [25], [28], [31], [37], [41], [46], [125], [127], [129], [131], [133], [136], [138], [139], [140], [146], [148], [150], [152], [154], [156], [158], [160], [162], [188], [189], [190], [191], [193], [194], [195] [2018-10-27 04:46:54,720 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-10-27 04:46:54,720 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-10-27 04:46:55,276 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-10-27 04:46:55,276 INFO L272 AbstractInterpreter]: Visited 42 different actions 61 times. Never merged. Never widened. Never found a fixpoint. Largest state had 54 variables. [2018-10-27 04:46:55,299 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:46:55,299 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-10-27 04:46:55,299 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:46:55,299 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-27 04:46:55,306 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:46:55,306 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-27 04:46:55,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:46:55,358 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:46:55,370 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:46:55,370 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:46:55,390 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:46:55,390 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:46:55,395 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:46:55,396 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:14 [2018-10-27 04:46:55,425 WARN L854 $PredicateComparison]: unable to prove that (exists ((|append_#Ultimate.alloc_~size| Int) (|append_#Ultimate.alloc_#res.base| Int)) (and (= 0 (select |c_old(#valid)| |append_#Ultimate.alloc_#res.base|)) (= (store |c_old(#valid)| |append_#Ultimate.alloc_#res.base| 1) |c_#valid|) (= (store |c_old(#length)| |append_#Ultimate.alloc_#res.base| |append_#Ultimate.alloc_~size|) |c_#length|))) is different from true [2018-10-27 04:46:55,488 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:46:55,508 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-10-27 04:46:55,509 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:46:55,603 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:46:55,604 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:46:55,605 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-10-27 04:46:55,605 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:46:55,618 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:46:55,618 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:31, output treesize:23 [2018-10-27 04:46:55,683 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:46:55,684 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:46:55,685 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:46:55,686 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-10-27 04:46:55,686 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:46:55,710 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-10-27 04:46:55,710 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:46:55,717 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:46:55,717 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:34, output treesize:9 [2018-10-27 04:46:55,762 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 7 not checked. [2018-10-27 04:46:55,762 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:46:59,885 WARN L179 SmtUtils]: Spent 4.07 s on a formula simplification that was a NOOP. DAG size: 27 [2018-10-27 04:47:01,937 WARN L179 SmtUtils]: Spent 2.03 s on a formula simplification that was a NOOP. DAG size: 27 [2018-10-27 04:47:02,095 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 15 [2018-10-27 04:47:02,114 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 21 [2018-10-27 04:47:02,675 WARN L179 SmtUtils]: Spent 165.00 ms on a formula simplification. DAG size of input: 109 DAG size of output: 40 [2018-10-27 04:47:03,358 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:03,384 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-10-27 04:47:03,384 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 8, 8] total 23 [2018-10-27 04:47:03,384 INFO L251 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-10-27 04:47:03,384 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-10-27 04:47:03,384 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-10-27 04:47:03,385 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=437, Unknown=1, NotChecked=42, Total=552 [2018-10-27 04:47:03,385 INFO L87 Difference]: Start difference. First operand 270 states and 323 transitions. Second operand 17 states. [2018-10-27 04:47:06,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:06,007 INFO L93 Difference]: Finished difference Result 340 states and 363 transitions. [2018-10-27 04:47:06,007 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-10-27 04:47:06,007 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 49 [2018-10-27 04:47:06,008 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:06,009 INFO L225 Difference]: With dead ends: 340 [2018-10-27 04:47:06,009 INFO L226 Difference]: Without dead ends: 340 [2018-10-27 04:47:06,009 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 122 GetRequests, 85 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 260 ImplicationChecksByTransitivity, 8.2s TimeCoverageRelationStatistics Valid=231, Invalid=1098, Unknown=7, NotChecked=70, Total=1406 [2018-10-27 04:47:06,009 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 340 states. [2018-10-27 04:47:06,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 340 to 270. [2018-10-27 04:47:06,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 270 states. [2018-10-27 04:47:06,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 270 states to 270 states and 317 transitions. [2018-10-27 04:47:06,014 INFO L78 Accepts]: Start accepts. Automaton has 270 states and 317 transitions. Word has length 49 [2018-10-27 04:47:06,014 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:06,014 INFO L481 AbstractCegarLoop]: Abstraction has 270 states and 317 transitions. [2018-10-27 04:47:06,014 INFO L482 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-10-27 04:47:06,014 INFO L276 IsEmpty]: Start isEmpty. Operand 270 states and 317 transitions. [2018-10-27 04:47:06,014 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-10-27 04:47:06,014 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:06,014 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:06,015 INFO L424 AbstractCegarLoop]: === Iteration 25 === [mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:06,015 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:06,015 INFO L82 PathProgramCache]: Analyzing trace with hash 1356220878, now seen corresponding path program 1 times [2018-10-27 04:47:06,015 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:06,015 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:06,015 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:06,015 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:06,015 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:06,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:06,158 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:06,158 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:06,158 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-27 04:47:06,158 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:06,159 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-27 04:47:06,159 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-27 04:47:06,159 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:47:06,159 INFO L87 Difference]: Start difference. First operand 270 states and 317 transitions. Second operand 8 states. [2018-10-27 04:47:06,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:06,314 INFO L93 Difference]: Finished difference Result 277 states and 320 transitions. [2018-10-27 04:47:06,314 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-27 04:47:06,314 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 52 [2018-10-27 04:47:06,315 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:06,315 INFO L225 Difference]: With dead ends: 277 [2018-10-27 04:47:06,315 INFO L226 Difference]: Without dead ends: 277 [2018-10-27 04:47:06,316 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=89, Unknown=0, NotChecked=0, Total=132 [2018-10-27 04:47:06,316 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 277 states. [2018-10-27 04:47:06,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 277 to 241. [2018-10-27 04:47:06,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 241 states. [2018-10-27 04:47:06,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 241 states to 241 states and 268 transitions. [2018-10-27 04:47:06,319 INFO L78 Accepts]: Start accepts. Automaton has 241 states and 268 transitions. Word has length 52 [2018-10-27 04:47:06,319 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:06,320 INFO L481 AbstractCegarLoop]: Abstraction has 241 states and 268 transitions. [2018-10-27 04:47:06,320 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-27 04:47:06,320 INFO L276 IsEmpty]: Start isEmpty. Operand 241 states and 268 transitions. [2018-10-27 04:47:06,322 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-10-27 04:47:06,322 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:06,322 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:06,322 INFO L424 AbstractCegarLoop]: === Iteration 26 === [mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:06,322 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:06,323 INFO L82 PathProgramCache]: Analyzing trace with hash 1953178896, now seen corresponding path program 1 times [2018-10-27 04:47:06,323 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:06,323 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:06,323 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:06,323 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:06,323 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:06,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:06,829 WARN L179 SmtUtils]: Spent 100.00 ms on a formula simplification that was a NOOP. DAG size: 13 [2018-10-27 04:47:07,124 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:07,125 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:07,125 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-27 04:47:07,125 INFO L258 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-10-27 04:47:07,125 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-27 04:47:07,125 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-27 04:47:07,125 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:47:07,125 INFO L87 Difference]: Start difference. First operand 241 states and 268 transitions. Second operand 8 states. [2018-10-27 04:47:07,278 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:07,279 INFO L93 Difference]: Finished difference Result 254 states and 275 transitions. [2018-10-27 04:47:07,280 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-27 04:47:07,280 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 54 [2018-10-27 04:47:07,280 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:07,281 INFO L225 Difference]: With dead ends: 254 [2018-10-27 04:47:07,281 INFO L226 Difference]: Without dead ends: 254 [2018-10-27 04:47:07,281 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=43, Invalid=89, Unknown=0, NotChecked=0, Total=132 [2018-10-27 04:47:07,281 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 254 states. [2018-10-27 04:47:07,284 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 254 to 239. [2018-10-27 04:47:07,285 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 239 states. [2018-10-27 04:47:07,285 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 239 states to 239 states and 262 transitions. [2018-10-27 04:47:07,285 INFO L78 Accepts]: Start accepts. Automaton has 239 states and 262 transitions. Word has length 54 [2018-10-27 04:47:07,286 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:07,286 INFO L481 AbstractCegarLoop]: Abstraction has 239 states and 262 transitions. [2018-10-27 04:47:07,286 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-27 04:47:07,286 INFO L276 IsEmpty]: Start isEmpty. Operand 239 states and 262 transitions. [2018-10-27 04:47:07,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-10-27 04:47:07,286 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:07,286 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:07,287 INFO L424 AbstractCegarLoop]: === Iteration 27 === [mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:07,287 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:07,287 INFO L82 PathProgramCache]: Analyzing trace with hash 1093930211, now seen corresponding path program 1 times [2018-10-27 04:47:07,287 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-10-27 04:47:07,287 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:07,288 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:07,288 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-27 04:47:07,288 INFO L288 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-10-27 04:47:07,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:07,604 WARN L179 SmtUtils]: Spent 211.00 ms on a formula simplification. DAG size of input: 10 DAG size of output: 9 [2018-10-27 04:47:07,807 WARN L179 SmtUtils]: Spent 150.00 ms on a formula simplification. DAG size of input: 14 DAG size of output: 13 [2018-10-27 04:47:08,209 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:08,209 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:47:08,209 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-10-27 04:47:08,209 INFO L200 CegarAbsIntRunner]: Running AI on error trace of length 56 with the following transitions: [2018-10-27 04:47:08,209 INFO L202 CegarAbsIntRunner]: [0], [1], [5], [7], [9], [11], [13], [15], [17], [19], [21], [25], [28], [33], [125], [127], [129], [131], [133], [136], [138], [140], [142], [146], [148], [150], [152], [154], [156], [158], [160], [162], [163], [165], [167], [169], [171], [173], [175], [177], [179], [180], [188], [189], [190], [191], [193], [194] [2018-10-27 04:47:08,211 INFO L148 AbstractInterpreter]: Using domain PoormanAbstractDomain with backing domain CompoundDomain [CongruenceDomain, OctagonDomain] [2018-10-27 04:47:08,211 INFO L101 FixpointEngine]: Starting fixpoint engine with domain PoormanAbstractDomain (maxUnwinding=3, maxParallelStates=2) [2018-10-27 04:47:08,659 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2018-10-27 04:47:08,660 INFO L272 AbstractInterpreter]: Visited 48 different actions 50 times. Merged at 1 different actions 1 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 58 variables. [2018-10-27 04:47:08,664 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:08,664 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-10-27 04:47:08,664 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:47:08,665 INFO L194 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-27 04:47:08,671 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:08,672 INFO L288 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-10-27 04:47:08,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:08,763 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:08,796 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:08,797 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:08,857 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:08,857 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:47:08,894 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:08,895 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:08,895 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-10-27 04:47:08,895 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:08,901 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:47:08,901 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:20, output treesize:18 [2018-10-27 04:47:09,151 WARN L179 SmtUtils]: Spent 142.00 ms on a formula simplification that was a NOOP. DAG size: 16 [2018-10-27 04:47:09,297 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-10-27 04:47:09,298 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-10-27 04:47:09,299 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:09,333 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:09,376 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:09,376 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:33, output treesize:29 [2018-10-27 04:47:09,416 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 21 treesize of output 33 [2018-10-27 04:47:09,418 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-10-27 04:47:09,418 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:09,438 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 26 [2018-10-27 04:47:09,439 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-10-27 04:47:09,740 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:47:09,826 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:47:09,826 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:47 [2018-10-27 04:47:09,898 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 52 treesize of output 57 [2018-10-27 04:47:09,901 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 52 [2018-10-27 04:47:09,901 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:09,944 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 35 treesize of output 34 [2018-10-27 04:47:09,945 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-10-27 04:47:09,960 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:47:09,980 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 20 [2018-10-27 04:47:10,000 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:10,001 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:10,055 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:10,072 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:47:10,072 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 6 variables, input treesize:76, output treesize:42 [2018-10-27 04:47:10,115 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-10-27 04:47:10,115 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:10,125 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:10,126 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:10,126 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:10,127 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 52 [2018-10-27 04:47:10,127 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:10,137 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:47:10,137 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:76, output treesize:49 [2018-10-27 04:47:10,211 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:10,212 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:10,213 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:10,214 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:10,215 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 75 [2018-10-27 04:47:10,215 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:10,230 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-10-27 04:47:10,231 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:63, output treesize:75 [2018-10-27 04:47:10,471 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 54 [2018-10-27 04:47:10,474 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:10,474 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:10,481 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:10,498 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-10-27 04:47:10,498 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:89, output treesize:78 [2018-10-27 04:47:10,561 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 54 [2018-10-27 04:47:10,574 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:10,575 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:10,582 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:10,599 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-10-27 04:47:10,600 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:91, output treesize:80 [2018-10-27 04:47:10,889 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 39 [2018-10-27 04:47:10,891 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:10,892 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 23 [2018-10-27 04:47:10,892 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:10,897 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:10,912 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-10-27 04:47:10,912 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:87, output treesize:45 [2018-10-27 04:47:10,973 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:10,973 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:47:13,199 WARN L179 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 25 [2018-10-27 04:47:13,513 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 62 [2018-10-27 04:47:13,630 WARN L179 SmtUtils]: Spent 116.00 ms on a formula simplification that was a NOOP. DAG size: 50 [2018-10-27 04:47:13,632 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-10-27 04:47:13,633 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:13,644 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:13,645 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:13,661 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 50 treesize of output 74 [2018-10-27 04:47:13,801 WARN L179 SmtUtils]: Spent 137.00 ms on a formula simplification. DAG size of input: 94 DAG size of output: 65 [2018-10-27 04:47:13,803 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 52 [2018-10-27 04:47:13,812 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 22 [2018-10-27 04:47:13,812 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-10-27 04:47:13,828 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:47:13,871 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 42 treesize of output 52 [2018-10-27 04:47:13,881 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 43 treesize of output 53 [2018-10-27 04:47:13,882 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 2 xjuncts. [2018-10-27 04:47:13,928 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 5 case distinctions, treesize of input 45 treesize of output 70 [2018-10-27 04:47:13,929 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 8 xjuncts. [2018-10-27 04:47:14,008 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-10-27 04:47:14,082 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2018-10-27 04:47:14,084 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:14,086 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:14,094 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 30 treesize of output 42 [2018-10-27 04:47:14,095 INFO L267 ElimStorePlain]: Start of recursive call 11: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-10-27 04:47:14,120 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-10-27 04:47:14,122 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 40 [2018-10-27 04:47:14,146 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 30 treesize of output 44 [2018-10-27 04:47:14,147 INFO L267 ElimStorePlain]: Start of recursive call 13: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 8 xjuncts. [2018-10-27 04:47:14,220 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 5 xjuncts. [2018-10-27 04:47:14,240 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2018-10-27 04:47:14,270 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 28 treesize of output 44 [2018-10-27 04:47:14,271 INFO L267 ElimStorePlain]: Start of recursive call 15: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 8 xjuncts. [2018-10-27 04:47:14,307 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 5 xjuncts. [2018-10-27 04:47:14,313 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 40 [2018-10-27 04:47:14,316 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:14,321 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:14,340 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 2 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 5 case distinctions, treesize of input 36 treesize of output 70 [2018-10-27 04:47:14,343 INFO L267 ElimStorePlain]: Start of recursive call 17: 8 dim-0 vars, End of recursive call: 8 dim-0 vars, and 20 xjuncts. [2018-10-27 04:47:14,533 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: 8 dim-0 vars, and 13 xjuncts. [2018-10-27 04:47:14,536 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 38 [2018-10-27 04:47:14,551 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 24 [2018-10-27 04:47:14,552 INFO L267 ElimStorePlain]: Start of recursive call 19: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:47:14,561 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:47:14,914 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 39 [2018-10-27 04:47:14,920 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 8 [2018-10-27 04:47:14,920 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 2 xjuncts. [2018-10-27 04:47:14,934 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:14,935 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:14,935 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 22 [2018-10-27 04:47:14,936 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:47:14,944 INFO L267 ElimStorePlain]: Start of recursive call 20: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:47:14,946 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 37 [2018-10-27 04:47:14,948 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:47:14,948 INFO L267 ElimStorePlain]: Start of recursive call 24: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:14,974 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:14,975 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:14,976 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 22 [2018-10-27 04:47:14,976 INFO L267 ElimStorePlain]: Start of recursive call 25: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:47:14,982 INFO L267 ElimStorePlain]: Start of recursive call 23: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:47:15,364 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 42 [2018-10-27 04:47:15,366 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:15,369 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:47:15,582 WARN L522 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-27 04:47:15,583 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: var is still there: v_prenex_66 term size 41 at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:221) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.elimAllRec(ElimStorePlain.java:199) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.elim(PartialQuantifierElimination.java:293) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.tryToEliminate(PartialQuantifierElimination.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer$QuantifierEliminationPostprocessor.postprocess(IterativePredicateTransformer.java:245) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:439) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:383) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:290) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:330) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:175) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:162) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructForwardBackward(TraceCheckConstructor.java:224) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructTraceCheck(TraceCheckConstructor.java:188) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:165) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseTaipanRefinementStrategy.getTraceCheck(BaseTaipanRefinementStrategy.java:216) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:223) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:197) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:70) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:429) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:435) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:376) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:312) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:123) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:316) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-10-27 04:47:15,586 INFO L168 Benchmark]: Toolchain (without parser) took 46337.89 ms. Allocated memory was 1.0 GB in the beginning and 1.8 GB in the end (delta: 810.0 MB). Free memory was 959.1 MB in the beginning and 1.5 GB in the end (delta: -556.0 MB). Peak memory consumption was 842.1 MB. Max. memory is 11.5 GB. [2018-10-27 04:47:15,586 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 985.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-10-27 04:47:15,586 INFO L168 Benchmark]: CACSL2BoogieTranslator took 367.43 ms. Allocated memory is still 1.0 GB. Free memory was 959.1 MB in the beginning and 937.5 MB in the end (delta: 21.7 MB). Peak memory consumption was 21.7 MB. Max. memory is 11.5 GB. [2018-10-27 04:47:15,587 INFO L168 Benchmark]: Boogie Procedure Inliner took 112.62 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 176.2 MB). Free memory was 937.5 MB in the beginning and 1.2 GB in the end (delta: -235.7 MB). Peak memory consumption was 19.3 MB. Max. memory is 11.5 GB. [2018-10-27 04:47:15,587 INFO L168 Benchmark]: Boogie Preprocessor took 34.21 ms. Allocated memory is still 1.2 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. [2018-10-27 04:47:15,587 INFO L168 Benchmark]: RCFGBuilder took 1042.21 ms. Allocated memory is still 1.2 GB. Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 54.8 MB). Peak memory consumption was 54.8 MB. Max. memory is 11.5 GB. [2018-10-27 04:47:15,587 INFO L168 Benchmark]: TraceAbstraction took 44778.05 ms. Allocated memory was 1.2 GB in the beginning and 1.8 GB in the end (delta: 633.9 MB). Free memory was 1.1 GB in the beginning and 1.5 GB in the end (delta: -403.4 MB). Peak memory consumption was 818.5 MB. Max. memory is 11.5 GB. [2018-10-27 04:47:15,601 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 985.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 367.43 ms. Allocated memory is still 1.0 GB. Free memory was 959.1 MB in the beginning and 937.5 MB in the end (delta: 21.7 MB). Peak memory consumption was 21.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 112.62 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 176.2 MB). Free memory was 937.5 MB in the beginning and 1.2 GB in the end (delta: -235.7 MB). Peak memory consumption was 19.3 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 34.21 ms. Allocated memory is still 1.2 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 1042.21 ms. Allocated memory is still 1.2 GB. Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 54.8 MB). Peak memory consumption was 54.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 44778.05 ms. Allocated memory was 1.2 GB in the beginning and 1.8 GB in the end (delta: 633.9 MB). Free memory was 1.1 GB in the beginning and 1.5 GB in the end (delta: -403.4 MB). Peak memory consumption was 818.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: AssertionError: var is still there: v_prenex_66 term size 41 de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: var is still there: v_prenex_66 term size 41: de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request... ### Bit-precise run ### This is Ultimate 0.1.23-1dbac8b [2018-10-27 04:47:17,409 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-10-27 04:47:17,410 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-10-27 04:47:17,419 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-10-27 04:47:17,421 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-10-27 04:47:17,422 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-10-27 04:47:17,423 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-10-27 04:47:17,426 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-10-27 04:47:17,428 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-10-27 04:47:17,429 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-10-27 04:47:17,430 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-10-27 04:47:17,430 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-10-27 04:47:17,430 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-10-27 04:47:17,431 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-10-27 04:47:17,431 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-10-27 04:47:17,432 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-10-27 04:47:17,432 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-10-27 04:47:17,434 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-10-27 04:47:17,435 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-10-27 04:47:17,436 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-10-27 04:47:17,437 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-10-27 04:47:17,438 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-10-27 04:47:17,440 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-10-27 04:47:17,440 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-10-27 04:47:17,440 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-10-27 04:47:17,441 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-10-27 04:47:17,442 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-10-27 04:47:17,442 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-10-27 04:47:17,443 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-10-27 04:47:17,444 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-10-27 04:47:17,445 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-10-27 04:47:17,445 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-10-27 04:47:17,445 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-10-27 04:47:17,445 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-10-27 04:47:17,446 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-10-27 04:47:17,447 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-10-27 04:47:17,447 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/config/svcomp-DerefFreeMemtrack-32bit-Taipan_Bitvector.epf [2018-10-27 04:47:17,459 INFO L110 SettingsManager]: Loading preferences was successful [2018-10-27 04:47:17,459 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-10-27 04:47:17,460 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-10-27 04:47:17,460 INFO L133 SettingsManager]: * User list type=DISABLED [2018-10-27 04:47:17,460 INFO L133 SettingsManager]: * calls to implemented procedures=false [2018-10-27 04:47:17,460 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-10-27 04:47:17,460 INFO L133 SettingsManager]: * Abstract domain=CompoundDomain [2018-10-27 04:47:17,460 INFO L133 SettingsManager]: * Interval Domain=false [2018-10-27 04:47:17,461 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-10-27 04:47:17,461 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-10-27 04:47:17,461 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-10-27 04:47:17,461 INFO L133 SettingsManager]: * sizeof long=4 [2018-10-27 04:47:17,461 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-10-27 04:47:17,462 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-10-27 04:47:17,462 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-10-27 04:47:17,462 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-10-27 04:47:17,462 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-10-27 04:47:17,462 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-10-27 04:47:17,462 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-10-27 04:47:17,462 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-10-27 04:47:17,463 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-10-27 04:47:17,463 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-10-27 04:47:17,463 INFO L133 SettingsManager]: * sizeof long double=12 [2018-10-27 04:47:17,463 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-10-27 04:47:17,463 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-10-27 04:47:17,463 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-10-27 04:47:17,463 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-10-27 04:47:17,464 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-27 04:47:17,464 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-10-27 04:47:17,466 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-10-27 04:47:17,466 INFO L133 SettingsManager]: * Trace refinement strategy=WALRUS [2018-10-27 04:47:17,467 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-10-27 04:47:17,467 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-10-27 04:47:17,467 INFO L133 SettingsManager]: * Logic for external solver=AUFBV Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 7db66fa755812d372ccac4d56a0ec85104dbcc6e [2018-10-27 04:47:17,499 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-10-27 04:47:17,509 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-10-27 04:47:17,512 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-10-27 04:47:17,513 INFO L271 PluginConnector]: Initializing CDTParser... [2018-10-27 04:47:17,513 INFO L276 PluginConnector]: CDTParser initialized [2018-10-27 04:47:17,514 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/../../sv-benchmarks/c/memsafety-ext2/length_test03_true-valid-memsafety.i [2018-10-27 04:47:17,554 INFO L218 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/data/368ceea86/1ea4fe44403943d0915cf718d2d0c369/FLAGa73f8b590 [2018-10-27 04:47:17,986 INFO L298 CDTParser]: Found 1 translation units. [2018-10-27 04:47:17,989 INFO L158 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/sv-benchmarks/c/memsafety-ext2/length_test03_true-valid-memsafety.i [2018-10-27 04:47:18,000 INFO L346 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/data/368ceea86/1ea4fe44403943d0915cf718d2d0c369/FLAGa73f8b590 [2018-10-27 04:47:18,015 INFO L354 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/data/368ceea86/1ea4fe44403943d0915cf718d2d0c369 [2018-10-27 04:47:18,017 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-10-27 04:47:18,019 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-10-27 04:47:18,022 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-10-27 04:47:18,022 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-10-27 04:47:18,025 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-10-27 04:47:18,026 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.10 04:47:18" (1/1) ... [2018-10-27 04:47:18,029 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@474fd4db and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:18, skipping insertion in model container [2018-10-27 04:47:18,029 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.10 04:47:18" (1/1) ... [2018-10-27 04:47:18,038 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-10-27 04:47:18,076 INFO L174 MainTranslator]: Built tables and reachable declarations [2018-10-27 04:47:18,332 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-27 04:47:18,347 INFO L189 MainTranslator]: Completed pre-run [2018-10-27 04:47:18,402 INFO L202 PostProcessor]: Analyzing one entry point: main [2018-10-27 04:47:18,443 INFO L193 MainTranslator]: Completed translation [2018-10-27 04:47:18,443 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:18 WrapperNode [2018-10-27 04:47:18,443 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-10-27 04:47:18,444 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-10-27 04:47:18,444 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-10-27 04:47:18,445 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-10-27 04:47:18,452 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:18" (1/1) ... [2018-10-27 04:47:18,470 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:18" (1/1) ... [2018-10-27 04:47:18,510 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-10-27 04:47:18,511 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-10-27 04:47:18,511 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-10-27 04:47:18,511 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-10-27 04:47:18,579 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:18" (1/1) ... [2018-10-27 04:47:18,579 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:18" (1/1) ... [2018-10-27 04:47:18,586 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:18" (1/1) ... [2018-10-27 04:47:18,586 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:18" (1/1) ... [2018-10-27 04:47:18,597 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:18" (1/1) ... [2018-10-27 04:47:18,602 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:18" (1/1) ... [2018-10-27 04:47:18,611 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:18" (1/1) ... [2018-10-27 04:47:18,617 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-10-27 04:47:18,617 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-10-27 04:47:18,617 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-10-27 04:47:18,617 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-10-27 04:47:18,618 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:18" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-27 04:47:18,660 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-10-27 04:47:18,660 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-10-27 04:47:18,660 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-10-27 04:47:18,661 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-10-27 04:47:18,661 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-10-27 04:47:18,661 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-10-27 04:47:18,661 INFO L130 BoogieDeclarations]: Found specification of procedure append [2018-10-27 04:47:18,661 INFO L138 BoogieDeclarations]: Found implementation of procedure append [2018-10-27 04:47:19,778 INFO L341 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-10-27 04:47:19,779 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.10 04:47:19 BoogieIcfgContainer [2018-10-27 04:47:19,779 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-10-27 04:47:19,780 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-10-27 04:47:19,780 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-10-27 04:47:19,782 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-10-27 04:47:19,782 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.10 04:47:18" (1/3) ... [2018-10-27 04:47:19,783 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@9c134a5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.10 04:47:19, skipping insertion in model container [2018-10-27 04:47:19,783 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.10 04:47:18" (2/3) ... [2018-10-27 04:47:19,783 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@9c134a5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.10 04:47:19, skipping insertion in model container [2018-10-27 04:47:19,783 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.10 04:47:19" (3/3) ... [2018-10-27 04:47:19,786 INFO L112 eAbstractionObserver]: Analyzing ICFG length_test03_true-valid-memsafety.i [2018-10-27 04:47:19,794 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-10-27 04:47:19,799 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 55 error locations. [2018-10-27 04:47:19,811 INFO L257 AbstractCegarLoop]: Starting to check reachability of 55 error locations. [2018-10-27 04:47:19,828 INFO L135 ementStrategyFactory]: Using default assertion order modulation [2018-10-27 04:47:19,828 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-10-27 04:47:19,828 INFO L383 AbstractCegarLoop]: Hoare is false [2018-10-27 04:47:19,829 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-10-27 04:47:19,829 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-10-27 04:47:19,829 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-10-27 04:47:19,829 INFO L387 AbstractCegarLoop]: Difference is false [2018-10-27 04:47:19,829 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-10-27 04:47:19,829 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-10-27 04:47:19,842 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states. [2018-10-27 04:47:19,849 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-10-27 04:47:19,849 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:19,850 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:19,853 INFO L424 AbstractCegarLoop]: === Iteration 1 === [mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:19,858 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:19,858 INFO L82 PathProgramCache]: Analyzing trace with hash 1096514590, now seen corresponding path program 1 times [2018-10-27 04:47:19,861 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:19,861 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:19,875 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:19,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:19,913 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:19,956 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:19,958 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:19,962 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:19,962 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-27 04:47:19,979 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:19,979 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:19,987 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:19,987 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-27 04:47:19,992 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-27 04:47:20,005 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-27 04:47:20,006 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:47:20,008 INFO L87 Difference]: Start difference. First operand 140 states. Second operand 3 states. [2018-10-27 04:47:20,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:20,863 INFO L93 Difference]: Finished difference Result 140 states and 147 transitions. [2018-10-27 04:47:20,864 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-27 04:47:20,865 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-10-27 04:47:20,865 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:20,875 INFO L225 Difference]: With dead ends: 140 [2018-10-27 04:47:20,875 INFO L226 Difference]: Without dead ends: 137 [2018-10-27 04:47:20,877 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:47:20,891 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-10-27 04:47:20,912 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 135. [2018-10-27 04:47:20,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-10-27 04:47:20,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 141 transitions. [2018-10-27 04:47:20,920 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 141 transitions. Word has length 7 [2018-10-27 04:47:20,921 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:20,921 INFO L481 AbstractCegarLoop]: Abstraction has 135 states and 141 transitions. [2018-10-27 04:47:20,921 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-27 04:47:20,921 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 141 transitions. [2018-10-27 04:47:20,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-10-27 04:47:20,922 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:20,922 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:20,923 INFO L424 AbstractCegarLoop]: === Iteration 2 === [mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:20,923 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:20,924 INFO L82 PathProgramCache]: Analyzing trace with hash -367786039, now seen corresponding path program 1 times [2018-10-27 04:47:20,924 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:20,924 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:20,947 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:20,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:20,981 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:20,997 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:20,998 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:21,004 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:21,004 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:12 [2018-10-27 04:47:21,029 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:21,029 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:21,033 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:21,033 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-27 04:47:21,034 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-27 04:47:21,035 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-27 04:47:21,035 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:47:21,035 INFO L87 Difference]: Start difference. First operand 135 states and 141 transitions. Second operand 3 states. [2018-10-27 04:47:21,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:21,391 INFO L93 Difference]: Finished difference Result 133 states and 139 transitions. [2018-10-27 04:47:21,392 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-27 04:47:21,392 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 8 [2018-10-27 04:47:21,392 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:21,393 INFO L225 Difference]: With dead ends: 133 [2018-10-27 04:47:21,393 INFO L226 Difference]: Without dead ends: 133 [2018-10-27 04:47:21,394 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:47:21,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-10-27 04:47:21,400 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 133. [2018-10-27 04:47:21,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-10-27 04:47:21,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 139 transitions. [2018-10-27 04:47:21,404 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 139 transitions. Word has length 8 [2018-10-27 04:47:21,404 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:21,404 INFO L481 AbstractCegarLoop]: Abstraction has 133 states and 139 transitions. [2018-10-27 04:47:21,404 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-27 04:47:21,405 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 139 transitions. [2018-10-27 04:47:21,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2018-10-27 04:47:21,405 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:21,405 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:21,406 INFO L424 AbstractCegarLoop]: === Iteration 3 === [mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:21,406 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:21,407 INFO L82 PathProgramCache]: Analyzing trace with hash 1483534720, now seen corresponding path program 1 times [2018-10-27 04:47:21,407 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:21,407 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:21,439 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:21,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:21,467 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:21,472 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:21,473 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:21,476 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:21,477 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:47:21,505 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:21,505 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:21,507 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:21,507 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:21,507 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:47:21,507 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:47:21,507 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:21,508 INFO L87 Difference]: Start difference. First operand 133 states and 139 transitions. Second operand 5 states. [2018-10-27 04:47:21,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:21,878 INFO L93 Difference]: Finished difference Result 134 states and 141 transitions. [2018-10-27 04:47:21,879 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 04:47:21,880 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 9 [2018-10-27 04:47:21,880 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:21,880 INFO L225 Difference]: With dead ends: 134 [2018-10-27 04:47:21,881 INFO L226 Difference]: Without dead ends: 134 [2018-10-27 04:47:21,881 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2018-10-27 04:47:21,881 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-10-27 04:47:21,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 132. [2018-10-27 04:47:21,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-10-27 04:47:21,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 138 transitions. [2018-10-27 04:47:21,889 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 138 transitions. Word has length 9 [2018-10-27 04:47:21,889 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:21,889 INFO L481 AbstractCegarLoop]: Abstraction has 132 states and 138 transitions. [2018-10-27 04:47:21,889 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:47:21,890 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 138 transitions. [2018-10-27 04:47:21,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2018-10-27 04:47:21,890 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:21,890 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:21,891 INFO L424 AbstractCegarLoop]: === Iteration 4 === [mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:21,891 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:21,892 INFO L82 PathProgramCache]: Analyzing trace with hash -1255063893, now seen corresponding path program 1 times [2018-10-27 04:47:21,892 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:21,892 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:21,913 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:21,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:21,953 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:21,977 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:21,977 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:22,018 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:22,019 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:47:22,047 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:22,047 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:22,048 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:22,048 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 04:47:22,049 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:47:22,049 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:47:22,049 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:47:22,049 INFO L87 Difference]: Start difference. First operand 132 states and 138 transitions. Second operand 4 states. [2018-10-27 04:47:22,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:22,397 INFO L93 Difference]: Finished difference Result 133 states and 140 transitions. [2018-10-27 04:47:22,399 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 04:47:22,399 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 10 [2018-10-27 04:47:22,399 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:22,400 INFO L225 Difference]: With dead ends: 133 [2018-10-27 04:47:22,400 INFO L226 Difference]: Without dead ends: 133 [2018-10-27 04:47:22,401 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:22,401 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-10-27 04:47:22,406 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 131. [2018-10-27 04:47:22,407 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-10-27 04:47:22,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 137 transitions. [2018-10-27 04:47:22,408 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 137 transitions. Word has length 10 [2018-10-27 04:47:22,408 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:22,409 INFO L481 AbstractCegarLoop]: Abstraction has 131 states and 137 transitions. [2018-10-27 04:47:22,409 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:47:22,409 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 137 transitions. [2018-10-27 04:47:22,409 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-10-27 04:47:22,409 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:22,409 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:22,410 INFO L424 AbstractCegarLoop]: === Iteration 5 === [mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:22,411 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:22,411 INFO L82 PathProgramCache]: Analyzing trace with hash -1918079932, now seen corresponding path program 1 times [2018-10-27 04:47:22,411 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:22,411 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:22,426 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:22,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:22,476 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:22,500 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:22,501 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:22,514 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:22,514 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-27 04:47:22,523 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:22,524 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:22,527 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:22,527 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 04:47:22,527 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:47:22,527 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:47:22,528 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:47:22,528 INFO L87 Difference]: Start difference. First operand 131 states and 137 transitions. Second operand 4 states. [2018-10-27 04:47:22,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:22,925 INFO L93 Difference]: Finished difference Result 132 states and 139 transitions. [2018-10-27 04:47:22,927 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 04:47:22,927 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2018-10-27 04:47:22,927 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:22,928 INFO L225 Difference]: With dead ends: 132 [2018-10-27 04:47:22,928 INFO L226 Difference]: Without dead ends: 132 [2018-10-27 04:47:22,928 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:22,929 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-10-27 04:47:22,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 130. [2018-10-27 04:47:22,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-10-27 04:47:22,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 136 transitions. [2018-10-27 04:47:22,936 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 136 transitions. Word has length 13 [2018-10-27 04:47:22,936 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:22,936 INFO L481 AbstractCegarLoop]: Abstraction has 130 states and 136 transitions. [2018-10-27 04:47:22,936 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:47:22,936 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 136 transitions. [2018-10-27 04:47:22,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-10-27 04:47:22,937 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:22,937 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:22,937 INFO L424 AbstractCegarLoop]: === Iteration 6 === [mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:22,938 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:22,938 INFO L82 PathProgramCache]: Analyzing trace with hash 669064303, now seen corresponding path program 1 times [2018-10-27 04:47:22,938 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:22,938 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:22,954 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:23,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:23,012 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:23,020 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:23,020 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:23,045 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:23,045 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:47:23,092 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:23,092 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:23,094 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:23,094 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 04:47:23,094 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:47:23,095 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:47:23,095 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:47:23,095 INFO L87 Difference]: Start difference. First operand 130 states and 136 transitions. Second operand 4 states. [2018-10-27 04:47:23,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:23,559 INFO L93 Difference]: Finished difference Result 131 states and 138 transitions. [2018-10-27 04:47:23,559 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 04:47:23,559 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2018-10-27 04:47:23,560 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:23,560 INFO L225 Difference]: With dead ends: 131 [2018-10-27 04:47:23,560 INFO L226 Difference]: Without dead ends: 131 [2018-10-27 04:47:23,561 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:23,561 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-10-27 04:47:23,565 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 129. [2018-10-27 04:47:23,565 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-10-27 04:47:23,566 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 135 transitions. [2018-10-27 04:47:23,566 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 135 transitions. Word has length 14 [2018-10-27 04:47:23,566 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:23,566 INFO L481 AbstractCegarLoop]: Abstraction has 129 states and 135 transitions. [2018-10-27 04:47:23,566 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:47:23,567 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 135 transitions. [2018-10-27 04:47:23,567 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-10-27 04:47:23,567 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:23,567 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:23,569 INFO L424 AbstractCegarLoop]: === Iteration 7 === [mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:23,570 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:23,570 INFO L82 PathProgramCache]: Analyzing trace with hash -534011400, now seen corresponding path program 1 times [2018-10-27 04:47:23,570 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:23,570 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:23,587 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:23,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:23,666 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:23,676 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:23,677 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:23,678 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:23,679 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-27 04:47:23,681 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:23,681 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:23,683 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:23,683 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-27 04:47:23,683 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-27 04:47:23,683 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-27 04:47:23,683 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:47:23,684 INFO L87 Difference]: Start difference. First operand 129 states and 135 transitions. Second operand 3 states. [2018-10-27 04:47:23,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:23,898 INFO L93 Difference]: Finished difference Result 128 states and 134 transitions. [2018-10-27 04:47:23,898 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-27 04:47:23,898 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2018-10-27 04:47:23,898 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:23,899 INFO L225 Difference]: With dead ends: 128 [2018-10-27 04:47:23,899 INFO L226 Difference]: Without dead ends: 128 [2018-10-27 04:47:23,899 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:47:23,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-10-27 04:47:23,902 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 128. [2018-10-27 04:47:23,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-10-27 04:47:23,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 134 transitions. [2018-10-27 04:47:23,905 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 134 transitions. Word has length 18 [2018-10-27 04:47:23,905 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:23,905 INFO L481 AbstractCegarLoop]: Abstraction has 128 states and 134 transitions. [2018-10-27 04:47:23,905 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-27 04:47:23,905 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 134 transitions. [2018-10-27 04:47:23,918 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-10-27 04:47:23,918 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:23,918 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:23,919 INFO L424 AbstractCegarLoop]: === Iteration 8 === [mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:23,919 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:23,919 INFO L82 PathProgramCache]: Analyzing trace with hash 625515942, now seen corresponding path program 1 times [2018-10-27 04:47:23,920 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:23,920 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:23,937 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:23,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:24,011 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:24,018 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:24,019 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:24,024 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:24,024 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:12 [2018-10-27 04:47:24,035 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:24,035 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:24,044 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:24,044 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-27 04:47:24,044 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-27 04:47:24,044 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-27 04:47:24,044 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:47:24,045 INFO L87 Difference]: Start difference. First operand 128 states and 134 transitions. Second operand 3 states. [2018-10-27 04:47:24,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:24,257 INFO L93 Difference]: Finished difference Result 127 states and 133 transitions. [2018-10-27 04:47:24,257 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-27 04:47:24,257 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2018-10-27 04:47:24,258 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:24,258 INFO L225 Difference]: With dead ends: 127 [2018-10-27 04:47:24,258 INFO L226 Difference]: Without dead ends: 127 [2018-10-27 04:47:24,259 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:47:24,259 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-10-27 04:47:24,261 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2018-10-27 04:47:24,261 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-10-27 04:47:24,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 133 transitions. [2018-10-27 04:47:24,262 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 133 transitions. Word has length 19 [2018-10-27 04:47:24,262 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:24,262 INFO L481 AbstractCegarLoop]: Abstraction has 127 states and 133 transitions. [2018-10-27 04:47:24,262 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-27 04:47:24,262 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 133 transitions. [2018-10-27 04:47:24,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-10-27 04:47:24,264 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:24,264 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:24,265 INFO L424 AbstractCegarLoop]: === Iteration 9 === [mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:24,265 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:24,265 INFO L82 PathProgramCache]: Analyzing trace with hash -2083842118, now seen corresponding path program 1 times [2018-10-27 04:47:24,266 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:24,266 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:24,279 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:24,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:24,378 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:24,383 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:24,383 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:24,390 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:24,390 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:47:24,412 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:24,413 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:24,414 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-10-27 04:47:24,415 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:24,420 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:47:24,420 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-10-27 04:47:24,470 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-10-27 04:47:24,471 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:24,477 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-10-27 04:47:24,478 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:23, output treesize:20 [2018-10-27 04:47:24,538 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:24,538 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:24,548 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:24,548 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-27 04:47:24,549 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-27 04:47:24,549 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-27 04:47:24,549 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:47:24,549 INFO L87 Difference]: Start difference. First operand 127 states and 133 transitions. Second operand 8 states. [2018-10-27 04:47:25,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:25,602 INFO L93 Difference]: Finished difference Result 224 states and 235 transitions. [2018-10-27 04:47:25,602 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 04:47:25,602 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 20 [2018-10-27 04:47:25,603 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:25,603 INFO L225 Difference]: With dead ends: 224 [2018-10-27 04:47:25,603 INFO L226 Difference]: Without dead ends: 224 [2018-10-27 04:47:25,604 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2018-10-27 04:47:25,604 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2018-10-27 04:47:25,607 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 158. [2018-10-27 04:47:25,608 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-10-27 04:47:25,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 185 transitions. [2018-10-27 04:47:25,609 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 185 transitions. Word has length 20 [2018-10-27 04:47:25,610 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:25,610 INFO L481 AbstractCegarLoop]: Abstraction has 158 states and 185 transitions. [2018-10-27 04:47:25,610 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-27 04:47:25,610 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 185 transitions. [2018-10-27 04:47:25,610 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-10-27 04:47:25,610 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:25,610 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:25,611 INFO L424 AbstractCegarLoop]: === Iteration 10 === [mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:25,611 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:25,612 INFO L82 PathProgramCache]: Analyzing trace with hash -174596056, now seen corresponding path program 1 times [2018-10-27 04:47:25,615 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:25,615 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:25,626 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:25,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:25,752 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:25,756 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:25,757 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:25,784 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:25,784 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:25,790 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:25,790 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-10-27 04:47:25,811 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:25,813 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:25,813 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-27 04:47:25,814 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:25,826 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-10-27 04:47:25,827 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:25,839 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:25,839 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-10-27 04:47:25,861 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:25,867 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 14 treesize of output 15 [2018-10-27 04:47:25,868 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-10-27 04:47:25,881 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:47:25,881 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:24 [2018-10-27 04:47:25,940 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:25,940 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:25,955 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:25,955 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-27 04:47:25,956 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-27 04:47:25,956 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-27 04:47:25,956 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:47:25,956 INFO L87 Difference]: Start difference. First operand 158 states and 185 transitions. Second operand 7 states. [2018-10-27 04:47:27,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:27,103 INFO L93 Difference]: Finished difference Result 229 states and 259 transitions. [2018-10-27 04:47:27,103 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-27 04:47:27,103 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 21 [2018-10-27 04:47:27,104 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:27,104 INFO L225 Difference]: With dead ends: 229 [2018-10-27 04:47:27,104 INFO L226 Difference]: Without dead ends: 229 [2018-10-27 04:47:27,105 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:47:27,105 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229 states. [2018-10-27 04:47:27,109 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229 to 191. [2018-10-27 04:47:27,109 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 191 states. [2018-10-27 04:47:27,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191 states to 191 states and 239 transitions. [2018-10-27 04:47:27,110 INFO L78 Accepts]: Start accepts. Automaton has 191 states and 239 transitions. Word has length 21 [2018-10-27 04:47:27,110 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:27,111 INFO L481 AbstractCegarLoop]: Abstraction has 191 states and 239 transitions. [2018-10-27 04:47:27,111 INFO L482 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-27 04:47:27,111 INFO L276 IsEmpty]: Start isEmpty. Operand 191 states and 239 transitions. [2018-10-27 04:47:27,111 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-10-27 04:47:27,111 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:27,111 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:27,114 INFO L424 AbstractCegarLoop]: === Iteration 11 === [mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:27,114 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:27,114 INFO L82 PathProgramCache]: Analyzing trace with hash -185544929, now seen corresponding path program 1 times [2018-10-27 04:47:27,114 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:27,114 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/cvc4nyu Starting monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:27,136 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:27,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:27,261 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:27,268 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:27,268 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:27,275 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:27,275 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:27,280 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:27,280 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-10-27 04:47:27,325 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:27,349 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:27,350 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-27 04:47:27,350 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:27,419 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-10-27 04:47:27,420 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:27,428 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:27,429 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-10-27 04:47:27,455 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:27,463 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 14 treesize of output 15 [2018-10-27 04:47:27,464 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-10-27 04:47:27,480 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:47:27,480 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:24 [2018-10-27 04:47:27,594 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:27,594 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:27,605 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:27,605 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-27 04:47:27,605 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-27 04:47:27,605 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-27 04:47:27,605 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:47:27,605 INFO L87 Difference]: Start difference. First operand 191 states and 239 transitions. Second operand 8 states. [2018-10-27 04:47:29,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:29,360 INFO L93 Difference]: Finished difference Result 226 states and 256 transitions. [2018-10-27 04:47:29,361 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-27 04:47:29,361 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 24 [2018-10-27 04:47:29,362 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:29,363 INFO L225 Difference]: With dead ends: 226 [2018-10-27 04:47:29,363 INFO L226 Difference]: Without dead ends: 226 [2018-10-27 04:47:29,363 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 16 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-10-27 04:47:29,363 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226 states. [2018-10-27 04:47:29,367 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226 to 191. [2018-10-27 04:47:29,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 191 states. [2018-10-27 04:47:29,369 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191 states to 191 states and 236 transitions. [2018-10-27 04:47:29,369 INFO L78 Accepts]: Start accepts. Automaton has 191 states and 236 transitions. Word has length 24 [2018-10-27 04:47:29,370 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:29,370 INFO L481 AbstractCegarLoop]: Abstraction has 191 states and 236 transitions. [2018-10-27 04:47:29,370 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-27 04:47:29,370 INFO L276 IsEmpty]: Start isEmpty. Operand 191 states and 236 transitions. [2018-10-27 04:47:29,370 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-10-27 04:47:29,370 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:29,370 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:29,371 INFO L424 AbstractCegarLoop]: === Iteration 12 === [mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:29,372 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:29,372 INFO L82 PathProgramCache]: Analyzing trace with hash -185538907, now seen corresponding path program 1 times [2018-10-27 04:47:29,372 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:29,372 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:29,388 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:29,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:29,432 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:29,449 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:29,449 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:29,450 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:29,451 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 04:47:29,451 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-27 04:47:29,451 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-27 04:47:29,451 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:47:29,451 INFO L87 Difference]: Start difference. First operand 191 states and 236 transitions. Second operand 3 states. [2018-10-27 04:47:29,463 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:29,463 INFO L93 Difference]: Finished difference Result 194 states and 239 transitions. [2018-10-27 04:47:29,463 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-27 04:47:29,463 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 24 [2018-10-27 04:47:29,464 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:29,464 INFO L225 Difference]: With dead ends: 194 [2018-10-27 04:47:29,464 INFO L226 Difference]: Without dead ends: 194 [2018-10-27 04:47:29,465 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:47:29,465 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2018-10-27 04:47:29,467 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 194. [2018-10-27 04:47:29,467 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-10-27 04:47:29,468 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 239 transitions. [2018-10-27 04:47:29,468 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 239 transitions. Word has length 24 [2018-10-27 04:47:29,472 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:29,472 INFO L481 AbstractCegarLoop]: Abstraction has 194 states and 239 transitions. [2018-10-27 04:47:29,472 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-27 04:47:29,472 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 239 transitions. [2018-10-27 04:47:29,473 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-10-27 04:47:29,473 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:29,473 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:29,474 INFO L424 AbstractCegarLoop]: === Iteration 13 === [mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:29,474 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:29,474 INFO L82 PathProgramCache]: Analyzing trace with hash 2079955265, now seen corresponding path program 1 times [2018-10-27 04:47:29,474 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:29,474 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/cvc4nyu Starting monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:29,500 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:29,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:29,634 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:29,681 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:29,681 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:29,683 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:29,683 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-27 04:47:29,684 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-27 04:47:29,684 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-27 04:47:29,684 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:29,684 INFO L87 Difference]: Start difference. First operand 194 states and 239 transitions. Second operand 5 states. [2018-10-27 04:47:29,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:29,987 INFO L93 Difference]: Finished difference Result 188 states and 227 transitions. [2018-10-27 04:47:29,987 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-27 04:47:29,987 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2018-10-27 04:47:29,988 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:29,988 INFO L225 Difference]: With dead ends: 188 [2018-10-27 04:47:29,988 INFO L226 Difference]: Without dead ends: 188 [2018-10-27 04:47:29,989 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-10-27 04:47:29,989 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states. [2018-10-27 04:47:29,991 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 188. [2018-10-27 04:47:29,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-10-27 04:47:29,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 227 transitions. [2018-10-27 04:47:29,993 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 227 transitions. Word has length 26 [2018-10-27 04:47:29,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:29,994 INFO L481 AbstractCegarLoop]: Abstraction has 188 states and 227 transitions. [2018-10-27 04:47:29,994 INFO L482 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-27 04:47:29,994 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 227 transitions. [2018-10-27 04:47:29,994 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-10-27 04:47:29,994 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:29,994 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:29,995 INFO L424 AbstractCegarLoop]: === Iteration 14 === [mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:29,995 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:29,995 INFO L82 PathProgramCache]: Analyzing trace with hash 2086265863, now seen corresponding path program 1 times [2018-10-27 04:47:29,996 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:29,996 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:30,010 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:30,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:30,095 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:30,100 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:30,100 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:30,102 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:30,102 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-27 04:47:30,110 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:30,110 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:30,112 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:30,112 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 04:47:30,113 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:47:30,113 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:47:30,113 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:47:30,113 INFO L87 Difference]: Start difference. First operand 188 states and 227 transitions. Second operand 4 states. [2018-10-27 04:47:30,561 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:30,561 INFO L93 Difference]: Finished difference Result 184 states and 215 transitions. [2018-10-27 04:47:30,562 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 04:47:30,562 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 26 [2018-10-27 04:47:30,562 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:30,563 INFO L225 Difference]: With dead ends: 184 [2018-10-27 04:47:30,563 INFO L226 Difference]: Without dead ends: 184 [2018-10-27 04:47:30,563 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:30,563 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-10-27 04:47:30,566 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 184. [2018-10-27 04:47:30,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-10-27 04:47:30,567 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 215 transitions. [2018-10-27 04:47:30,567 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 215 transitions. Word has length 26 [2018-10-27 04:47:30,567 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:30,567 INFO L481 AbstractCegarLoop]: Abstraction has 184 states and 215 transitions. [2018-10-27 04:47:30,568 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:47:30,568 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 215 transitions. [2018-10-27 04:47:30,570 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-10-27 04:47:30,570 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:30,570 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:30,570 INFO L424 AbstractCegarLoop]: === Iteration 15 === [mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:30,570 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:30,571 INFO L82 PathProgramCache]: Analyzing trace with hash 54103954, now seen corresponding path program 1 times [2018-10-27 04:47:30,571 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:30,571 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/cvc4nyu Starting monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:30,590 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:30,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:30,705 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:30,774 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:30,774 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:30,775 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:30,776 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-27 04:47:30,776 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-27 04:47:30,776 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-27 04:47:30,776 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:47:30,776 INFO L87 Difference]: Start difference. First operand 184 states and 215 transitions. Second operand 8 states. [2018-10-27 04:47:31,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:31,268 INFO L93 Difference]: Finished difference Result 198 states and 215 transitions. [2018-10-27 04:47:31,268 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-27 04:47:31,268 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 27 [2018-10-27 04:47:31,269 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:31,270 INFO L225 Difference]: With dead ends: 198 [2018-10-27 04:47:31,270 INFO L226 Difference]: Without dead ends: 198 [2018-10-27 04:47:31,270 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=89, Unknown=0, NotChecked=0, Total=132 [2018-10-27 04:47:31,270 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 198 states. [2018-10-27 04:47:31,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 198 to 185. [2018-10-27 04:47:31,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 185 states. [2018-10-27 04:47:31,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 213 transitions. [2018-10-27 04:47:31,276 INFO L78 Accepts]: Start accepts. Automaton has 185 states and 213 transitions. Word has length 27 [2018-10-27 04:47:31,276 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:31,276 INFO L481 AbstractCegarLoop]: Abstraction has 185 states and 213 transitions. [2018-10-27 04:47:31,276 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-27 04:47:31,276 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 213 transitions. [2018-10-27 04:47:31,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-10-27 04:47:31,277 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:31,277 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:31,277 INFO L424 AbstractCegarLoop]: === Iteration 16 === [mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:31,278 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:31,278 INFO L82 PathProgramCache]: Analyzing trace with hash 249732513, now seen corresponding path program 1 times [2018-10-27 04:47:31,278 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:31,278 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/cvc4nyu Starting monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:31,293 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:31,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:31,387 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:31,400 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:31,401 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:31,405 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:31,405 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:47:31,423 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:31,423 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:31,436 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:31,436 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 04:47:31,437 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:47:31,437 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:47:31,437 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:47:31,437 INFO L87 Difference]: Start difference. First operand 185 states and 213 transitions. Second operand 4 states. [2018-10-27 04:47:31,733 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:31,733 INFO L93 Difference]: Finished difference Result 183 states and 207 transitions. [2018-10-27 04:47:31,733 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 04:47:31,733 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 27 [2018-10-27 04:47:31,734 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:31,734 INFO L225 Difference]: With dead ends: 183 [2018-10-27 04:47:31,734 INFO L226 Difference]: Without dead ends: 183 [2018-10-27 04:47:31,734 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:31,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2018-10-27 04:47:31,736 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 183. [2018-10-27 04:47:31,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2018-10-27 04:47:31,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 207 transitions. [2018-10-27 04:47:31,737 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 207 transitions. Word has length 27 [2018-10-27 04:47:31,737 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:31,738 INFO L481 AbstractCegarLoop]: Abstraction has 183 states and 207 transitions. [2018-10-27 04:47:31,738 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:47:31,738 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 207 transitions. [2018-10-27 04:47:31,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-10-27 04:47:31,738 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:31,738 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:31,739 INFO L424 AbstractCegarLoop]: === Iteration 17 === [mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:31,739 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:31,739 INFO L82 PathProgramCache]: Analyzing trace with hash 454298036, now seen corresponding path program 1 times [2018-10-27 04:47:31,739 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:31,739 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/cvc4nyu Starting monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:31,761 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:31,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:31,865 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:31,922 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:31,922 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:31,924 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:31,924 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-27 04:47:31,924 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-27 04:47:31,924 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-27 04:47:31,924 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:47:31,924 INFO L87 Difference]: Start difference. First operand 183 states and 207 transitions. Second operand 8 states. [2018-10-27 04:47:32,447 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:32,447 INFO L93 Difference]: Finished difference Result 196 states and 209 transitions. [2018-10-27 04:47:32,448 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-27 04:47:32,448 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 29 [2018-10-27 04:47:32,448 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:32,449 INFO L225 Difference]: With dead ends: 196 [2018-10-27 04:47:32,449 INFO L226 Difference]: Without dead ends: 196 [2018-10-27 04:47:32,449 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=89, Unknown=0, NotChecked=0, Total=132 [2018-10-27 04:47:32,449 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states. [2018-10-27 04:47:32,451 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 183. [2018-10-27 04:47:32,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2018-10-27 04:47:32,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 203 transitions. [2018-10-27 04:47:32,451 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 203 transitions. Word has length 29 [2018-10-27 04:47:32,451 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:32,452 INFO L481 AbstractCegarLoop]: Abstraction has 183 states and 203 transitions. [2018-10-27 04:47:32,452 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-27 04:47:32,452 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 203 transitions. [2018-10-27 04:47:32,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-10-27 04:47:32,453 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:32,453 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:32,454 INFO L424 AbstractCegarLoop]: === Iteration 18 === [mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:32,454 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:32,454 INFO L82 PathProgramCache]: Analyzing trace with hash -525217117, now seen corresponding path program 1 times [2018-10-27 04:47:32,454 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:32,454 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/cvc4nyu Starting monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:32,467 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:32,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:32,571 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:32,597 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:32,597 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:32,675 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:32,675 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:47:32,727 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:32,728 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:32,734 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:32,734 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 04:47:32,734 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-27 04:47:32,734 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-27 04:47:32,734 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-27 04:47:32,735 INFO L87 Difference]: Start difference. First operand 183 states and 203 transitions. Second operand 4 states. [2018-10-27 04:47:33,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:33,059 INFO L93 Difference]: Finished difference Result 187 states and 203 transitions. [2018-10-27 04:47:33,060 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-27 04:47:33,060 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2018-10-27 04:47:33,060 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:33,061 INFO L225 Difference]: With dead ends: 187 [2018-10-27 04:47:33,061 INFO L226 Difference]: Without dead ends: 187 [2018-10-27 04:47:33,061 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-27 04:47:33,062 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2018-10-27 04:47:33,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 181. [2018-10-27 04:47:33,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181 states. [2018-10-27 04:47:33,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 197 transitions. [2018-10-27 04:47:33,064 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 197 transitions. Word has length 29 [2018-10-27 04:47:33,068 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:33,068 INFO L481 AbstractCegarLoop]: Abstraction has 181 states and 197 transitions. [2018-10-27 04:47:33,068 INFO L482 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-27 04:47:33,068 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 197 transitions. [2018-10-27 04:47:33,069 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-10-27 04:47:33,069 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:33,069 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:33,070 INFO L424 AbstractCegarLoop]: === Iteration 19 === [mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:33,070 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:33,070 INFO L82 PathProgramCache]: Analyzing trace with hash -177068595, now seen corresponding path program 1 times [2018-10-27 04:47:33,070 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:33,070 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/cvc4nyu Starting monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:33,083 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:33,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:33,270 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:33,291 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:33,291 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,300 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,300 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:22, output treesize:21 [2018-10-27 04:47:33,317 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:47:33,320 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:33,320 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,322 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,337 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-10-27 04:47:33,348 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:33,348 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,373 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,454 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,455 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:41, output treesize:33 [2018-10-27 04:47:33,483 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:33,485 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:33,485 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-27 04:47:33,486 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,525 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-10-27 04:47:33,529 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:33,532 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-10-27 04:47:33,532 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,541 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,565 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-10-27 04:47:33,568 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:33,570 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-10-27 04:47:33,571 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,578 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,594 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,594 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 5 variables, input treesize:57, output treesize:25 [2018-10-27 04:47:33,634 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-10-27 04:47:33,637 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:33,637 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,644 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,675 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-10-27 04:47:33,678 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:33,678 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,685 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,698 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,698 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:44, output treesize:22 [2018-10-27 04:47:33,724 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-10-27 04:47:33,728 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:33,728 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,735 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,757 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-10-27 04:47:33,759 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:33,759 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,766 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,780 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,780 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 6 variables, input treesize:44, output treesize:18 [2018-10-27 04:47:33,862 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-10-27 04:47:33,866 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,870 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-10-27 04:47:33,870 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,871 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:33,871 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:1 [2018-10-27 04:47:33,885 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:33,885 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:33,887 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:33,887 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-10-27 04:47:33,887 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-10-27 04:47:33,887 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-10-27 04:47:33,888 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2018-10-27 04:47:33,888 INFO L87 Difference]: Start difference. First operand 181 states and 197 transitions. Second operand 11 states. [2018-10-27 04:47:35,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:35,023 INFO L93 Difference]: Finished difference Result 180 states and 195 transitions. [2018-10-27 04:47:35,023 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-10-27 04:47:35,023 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 32 [2018-10-27 04:47:35,024 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:35,024 INFO L225 Difference]: With dead ends: 180 [2018-10-27 04:47:35,024 INFO L226 Difference]: Without dead ends: 180 [2018-10-27 04:47:35,025 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=54, Invalid=218, Unknown=0, NotChecked=0, Total=272 [2018-10-27 04:47:35,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-10-27 04:47:35,027 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 180. [2018-10-27 04:47:35,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-10-27 04:47:35,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 195 transitions. [2018-10-27 04:47:35,029 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 195 transitions. Word has length 32 [2018-10-27 04:47:35,029 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:35,029 INFO L481 AbstractCegarLoop]: Abstraction has 180 states and 195 transitions. [2018-10-27 04:47:35,029 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-10-27 04:47:35,029 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 195 transitions. [2018-10-27 04:47:35,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-10-27 04:47:35,030 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:35,030 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:35,030 INFO L424 AbstractCegarLoop]: === Iteration 20 === [mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:35,030 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:35,031 INFO L82 PathProgramCache]: Analyzing trace with hash -480478103, now seen corresponding path program 1 times [2018-10-27 04:47:35,031 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:35,031 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/cvc4nyu Starting monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:35,047 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:35,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:35,268 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:35,288 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:35,289 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:35,298 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:35,298 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:47:35,319 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:35,320 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:35,321 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-10-27 04:47:35,321 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:35,343 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-10-27 04:47:35,345 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-10-27 04:47:35,345 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:35,347 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:35,364 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-10-27 04:47:35,366 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-10-27 04:47:35,366 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:35,369 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:35,377 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:35,378 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 3 variables, input treesize:43, output treesize:29 [2018-10-27 04:47:35,405 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-10-27 04:47:35,408 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:35,408 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:35,415 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:35,437 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-10-27 04:47:35,461 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:35,461 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:35,475 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:35,489 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:35,489 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:48, output treesize:26 [2018-10-27 04:47:35,514 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-10-27 04:47:35,516 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:35,516 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:35,523 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:35,545 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-10-27 04:47:35,548 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:47:35,548 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:35,555 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:35,569 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:35,569 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 6 variables, input treesize:48, output treesize:22 [2018-10-27 04:47:35,669 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:35,669 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:35,671 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:35,671 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-10-27 04:47:35,672 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-10-27 04:47:35,672 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-10-27 04:47:35,672 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-10-27 04:47:35,672 INFO L87 Difference]: Start difference. First operand 180 states and 195 transitions. Second operand 11 states. [2018-10-27 04:47:36,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:36,435 INFO L93 Difference]: Finished difference Result 168 states and 180 transitions. [2018-10-27 04:47:36,436 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-10-27 04:47:36,436 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 34 [2018-10-27 04:47:36,436 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:36,437 INFO L225 Difference]: With dead ends: 168 [2018-10-27 04:47:36,437 INFO L226 Difference]: Without dead ends: 168 [2018-10-27 04:47:36,437 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=47, Invalid=163, Unknown=0, NotChecked=0, Total=210 [2018-10-27 04:47:36,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states. [2018-10-27 04:47:36,439 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 168. [2018-10-27 04:47:36,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-10-27 04:47:36,439 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 180 transitions. [2018-10-27 04:47:36,439 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 180 transitions. Word has length 34 [2018-10-27 04:47:36,440 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:36,440 INFO L481 AbstractCegarLoop]: Abstraction has 168 states and 180 transitions. [2018-10-27 04:47:36,440 INFO L482 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-10-27 04:47:36,440 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 180 transitions. [2018-10-27 04:47:36,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-10-27 04:47:36,443 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:36,443 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:36,444 INFO L424 AbstractCegarLoop]: === Iteration 21 === [mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:36,444 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:36,444 INFO L82 PathProgramCache]: Analyzing trace with hash 1152905065, now seen corresponding path program 1 times [2018-10-27 04:47:36,444 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:36,444 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/cvc4nyu Starting monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:36,457 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:36,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:36,579 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:36,586 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:36,586 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:47:36,588 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:47:36,588 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-27 04:47:36,588 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-27 04:47:36,588 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-27 04:47:36,588 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:47:36,588 INFO L87 Difference]: Start difference. First operand 168 states and 180 transitions. Second operand 3 states. [2018-10-27 04:47:36,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:47:36,760 INFO L93 Difference]: Finished difference Result 183 states and 196 transitions. [2018-10-27 04:47:36,761 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-27 04:47:36,762 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2018-10-27 04:47:36,762 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:47:36,762 INFO L225 Difference]: With dead ends: 183 [2018-10-27 04:47:36,762 INFO L226 Difference]: Without dead ends: 183 [2018-10-27 04:47:36,763 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-27 04:47:36,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2018-10-27 04:47:36,765 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 172. [2018-10-27 04:47:36,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-10-27 04:47:36,766 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 184 transitions. [2018-10-27 04:47:36,766 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 184 transitions. Word has length 41 [2018-10-27 04:47:36,766 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:47:36,766 INFO L481 AbstractCegarLoop]: Abstraction has 172 states and 184 transitions. [2018-10-27 04:47:36,766 INFO L482 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-27 04:47:36,766 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 184 transitions. [2018-10-27 04:47:36,767 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-10-27 04:47:36,767 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:47:36,767 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:47:36,767 INFO L424 AbstractCegarLoop]: === Iteration 22 === [mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:47:36,767 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:47:36,767 INFO L82 PathProgramCache]: Analyzing trace with hash -2007997801, now seen corresponding path program 1 times [2018-10-27 04:47:36,768 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:47:36,772 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/cvc4nyu Starting monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:47:36,791 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:37,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:37,198 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:37,212 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:47:37,212 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:37,289 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:37,289 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:47:37,395 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:37,396 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:37,397 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-10-27 04:47:37,397 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:37,403 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:47:37,404 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:20, output treesize:18 [2018-10-27 04:47:37,533 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-10-27 04:47:37,533 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:37,545 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-10-27 04:47:37,545 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:33, output treesize:30 [2018-10-27 04:47:37,632 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:37,635 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-10-27 04:47:37,635 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:37,655 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:37,656 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:37,657 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:37,658 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 13 [2018-10-27 04:47:37,658 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:37,673 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:37,673 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:38, output treesize:11 [2018-10-27 04:47:37,735 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:37,735 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:47:40,695 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 19 [2018-10-27 04:47:40,696 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:47:40,773 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2018-10-27 04:47:40,774 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:47:40,778 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 25 [2018-10-27 04:47:40,779 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:47:40,865 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 21 [2018-10-27 04:47:40,866 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:47:40,979 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 3 dim-1 vars, End of recursive call: 12 dim-0 vars, and 4 xjuncts. [2018-10-27 04:47:40,980 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 10 variables, input treesize:73, output treesize:86 [2018-10-27 04:47:43,869 WARN L179 SmtUtils]: Spent 181.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 51 [2018-10-27 04:47:43,875 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:47:43,875 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-27 04:47:43,880 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:47:43,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:47:43,949 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:47:44,815 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:44,817 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-10-27 04:47:44,818 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:44,841 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:44,842 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:47:44,842 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-10-27 04:47:44,843 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:44,852 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:47:44,852 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:11 [2018-10-27 04:47:44,858 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:47:44,859 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:47:49,153 WARN L179 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 36 DAG size of output: 33 [2018-10-27 04:47:49,392 WARN L179 SmtUtils]: Spent 158.00 ms on a formula simplification. DAG size of input: 53 DAG size of output: 1 [2018-10-27 04:47:49,392 INFO L267 ElimStorePlain]: Start of recursive call 1: End of recursive call: and 1 xjuncts. [2018-10-27 04:47:49,393 INFO L202 ElimStorePlain]: Needed 1 recursive calls to eliminate 9 variables, input treesize:98, output treesize:1 [2018-10-27 04:47:52,152 WARN L179 SmtUtils]: Spent 120.00 ms on a formula simplification that was a NOOP. DAG size: 45 [2018-10-27 04:47:52,503 WARN L179 SmtUtils]: Spent 108.00 ms on a formula simplification that was a NOOP. DAG size: 46 [2018-10-27 04:47:52,678 WARN L179 SmtUtils]: Spent 164.00 ms on a formula simplification that was a NOOP. DAG size: 69 [2018-10-27 04:47:52,751 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 50 treesize of output 54 [2018-10-27 04:47:52,752 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-0 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-10-27 04:47:52,811 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 53 treesize of output 71 [2018-10-27 04:47:52,815 INFO L267 ElimStorePlain]: Start of recursive call 3: 13 dim-0 vars, End of recursive call: 13 dim-0 vars, and 8 xjuncts. [2018-10-27 04:47:52,868 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 51 treesize of output 69 [2018-10-27 04:47:52,873 INFO L267 ElimStorePlain]: Start of recursive call 4: 13 dim-0 vars, End of recursive call: 13 dim-0 vars, and 8 xjuncts. [2018-10-27 04:47:54,824 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 50 [2018-10-27 04:47:54,826 INFO L267 ElimStorePlain]: Start of recursive call 5: 3 dim-0 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-10-27 04:47:56,904 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 48 [2018-10-27 04:47:56,906 INFO L267 ElimStorePlain]: Start of recursive call 6: 3 dim-0 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-10-27 04:47:59,142 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 3 dim-1 vars, End of recursive call: 65 dim-0 vars, and 22 xjuncts. [2018-10-27 04:47:59,142 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 7 variables, input treesize:142, output treesize:1066 [2018-10-27 04:48:02,703 WARN L179 SmtUtils]: Spent 2.31 s on a formula simplification. DAG size of input: 390 DAG size of output: 93 [2018-10-27 04:48:02,715 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:48:02,716 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:48:02,717 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 27 [2018-10-27 04:48:02,717 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:02,960 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:48:02,961 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:48:02,962 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 39 [2018-10-27 04:48:02,962 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:03,402 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:48:03,403 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:48:03,403 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 31 [2018-10-27 04:48:03,404 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:03,650 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:48:03,651 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:48:03,652 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 39 [2018-10-27 04:48:03,652 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:03,941 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:48:03,942 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:48:03,943 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 39 [2018-10-27 04:48:03,943 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:04,183 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:48:04,183 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:48:04,184 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 22 [2018-10-27 04:48:04,184 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:04,335 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:48:04,335 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:48:04,336 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 25 [2018-10-27 04:48:04,336 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:04,463 INFO L267 ElimStorePlain]: Start of recursive call 1: 9 dim-0 vars, 7 dim-1 vars, End of recursive call: 2 dim-0 vars, and 5 xjuncts. [2018-10-27 04:48:04,463 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 16 variables, input treesize:286, output treesize:138 [2018-10-27 04:48:04,843 WARN L179 SmtUtils]: Spent 161.00 ms on a formula simplification that was a NOOP. DAG size: 44 [2018-10-27 04:48:05,271 WARN L179 SmtUtils]: Spent 212.00 ms on a formula simplification. DAG size of input: 39 DAG size of output: 32 [2018-10-27 04:48:05,288 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:05,304 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 3 imperfect interpolant sequences. [2018-10-27 04:48:05,305 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 10] total 32 [2018-10-27 04:48:05,305 INFO L460 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-10-27 04:48:05,305 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-10-27 04:48:05,306 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=116, Invalid=1002, Unknown=4, NotChecked=0, Total=1122 [2018-10-27 04:48:05,306 INFO L87 Difference]: Start difference. First operand 172 states and 184 transitions. Second operand 33 states. [2018-10-27 04:48:06,785 WARN L179 SmtUtils]: Spent 321.00 ms on a formula simplification that was a NOOP. DAG size: 25 [2018-10-27 04:48:07,328 WARN L179 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 41 [2018-10-27 04:48:07,702 WARN L179 SmtUtils]: Spent 188.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 48 [2018-10-27 04:48:08,763 WARN L179 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 32 [2018-10-27 04:48:09,213 WARN L179 SmtUtils]: Spent 188.00 ms on a formula simplification. DAG size of input: 86 DAG size of output: 32 [2018-10-27 04:48:09,992 WARN L179 SmtUtils]: Spent 305.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 37 [2018-10-27 04:48:11,114 WARN L179 SmtUtils]: Spent 500.00 ms on a formula simplification. DAG size of input: 84 DAG size of output: 44 [2018-10-27 04:48:14,431 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:14,431 INFO L93 Difference]: Finished difference Result 207 states and 217 transitions. [2018-10-27 04:48:14,433 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-10-27 04:48:14,433 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 43 [2018-10-27 04:48:14,433 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:14,434 INFO L225 Difference]: With dead ends: 207 [2018-10-27 04:48:14,434 INFO L226 Difference]: Without dead ends: 207 [2018-10-27 04:48:14,435 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 101 SyntacticMatches, 3 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 436 ImplicationChecksByTransitivity, 21.3s TimeCoverageRelationStatistics Valid=327, Invalid=1830, Unknown=5, NotChecked=0, Total=2162 [2018-10-27 04:48:14,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2018-10-27 04:48:14,438 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 169. [2018-10-27 04:48:14,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-10-27 04:48:14,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 178 transitions. [2018-10-27 04:48:14,438 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 178 transitions. Word has length 43 [2018-10-27 04:48:14,439 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:14,439 INFO L481 AbstractCegarLoop]: Abstraction has 169 states and 178 transitions. [2018-10-27 04:48:14,439 INFO L482 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-10-27 04:48:14,439 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 178 transitions. [2018-10-27 04:48:14,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-10-27 04:48:14,439 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:14,439 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:14,440 INFO L424 AbstractCegarLoop]: === Iteration 23 === [mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:14,443 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:14,444 INFO L82 PathProgramCache]: Analyzing trace with hash -468036069, now seen corresponding path program 1 times [2018-10-27 04:48:14,444 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:14,444 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/cvc4nyu Starting monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:14,466 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:14,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:14,675 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:14,684 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:14,684 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:14,688 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:14,688 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-27 04:48:14,704 WARN L854 $PredicateComparison]: unable to prove that (exists ((|append_write~$Pointer$_#value.base| (_ BitVec 32))) (and (= |c_#valid| (store |c_old(#valid)| |append_write~$Pointer$_#value.base| (_ bv1 1))) (= (select |c_old(#valid)| |append_write~$Pointer$_#value.base|) (_ bv0 1)))) is different from true [2018-10-27 04:48:14,710 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:14,711 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:14,712 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-10-27 04:48:14,712 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:14,717 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:14,717 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:19, output treesize:16 [2018-10-27 04:48:14,755 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:48:14,756 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2018-10-27 04:48:14,756 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:14,762 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:14,762 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:22, output treesize:20 [2018-10-27 04:48:14,813 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:14,813 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:48:14,949 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:48:14,949 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-27 04:48:14,956 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:15,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:15,034 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:15,060 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:15,061 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,066 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,066 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-10-27 04:48:15,069 WARN L854 $PredicateComparison]: unable to prove that (exists ((|append_#t~malloc2.base| (_ BitVec 32))) (and (= |c_#valid| (store |c_old(#valid)| |append_#t~malloc2.base| (_ bv1 1))) (= (select |c_old(#valid)| |append_#t~malloc2.base|) (_ bv0 1)))) is different from true [2018-10-27 04:48:15,120 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:15,144 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:15,145 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-10-27 04:48:15,145 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,253 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:15,253 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:16 [2018-10-27 04:48:15,436 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:15,460 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:15,480 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:48:15,481 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 42 [2018-10-27 04:48:15,481 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:15,611 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:15,612 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:27, output treesize:31 [2018-10-27 04:48:15,837 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 3 not checked. [2018-10-27 04:48:15,837 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:48:16,201 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-27 04:48:16,202 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8] total 12 [2018-10-27 04:48:16,202 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-10-27 04:48:16,202 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-10-27 04:48:16,202 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=228, Unknown=2, NotChecked=62, Total=342 [2018-10-27 04:48:16,202 INFO L87 Difference]: Start difference. First operand 169 states and 178 transitions. Second operand 13 states. [2018-10-27 04:48:17,189 WARN L179 SmtUtils]: Spent 235.00 ms on a formula simplification that was a NOOP. DAG size: 17 [2018-10-27 04:48:19,316 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:19,316 INFO L93 Difference]: Finished difference Result 199 states and 207 transitions. [2018-10-27 04:48:19,317 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-27 04:48:19,317 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 44 [2018-10-27 04:48:19,317 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:19,318 INFO L225 Difference]: With dead ends: 199 [2018-10-27 04:48:19,318 INFO L226 Difference]: Without dead ends: 199 [2018-10-27 04:48:19,318 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 86 SyntacticMatches, 7 SemanticMatches, 20 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 66 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=78, Invalid=308, Unknown=2, NotChecked=74, Total=462 [2018-10-27 04:48:19,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 199 states. [2018-10-27 04:48:19,320 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 199 to 168. [2018-10-27 04:48:19,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-10-27 04:48:19,321 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 177 transitions. [2018-10-27 04:48:19,321 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 177 transitions. Word has length 44 [2018-10-27 04:48:19,321 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:19,321 INFO L481 AbstractCegarLoop]: Abstraction has 168 states and 177 transitions. [2018-10-27 04:48:19,321 INFO L482 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-10-27 04:48:19,321 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 177 transitions. [2018-10-27 04:48:19,322 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-10-27 04:48:19,322 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:19,322 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:19,322 INFO L424 AbstractCegarLoop]: === Iteration 24 === [mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:19,322 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:19,322 INFO L82 PathProgramCache]: Analyzing trace with hash -1624216089, now seen corresponding path program 1 times [2018-10-27 04:48:19,323 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:19,323 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/cvc4nyu Starting monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:19,346 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:19,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:19,645 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:19,652 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:19,653 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:19,664 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:19,664 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:19,670 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:19,670 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-10-27 04:48:19,713 WARN L854 $PredicateComparison]: unable to prove that (exists ((|append_#Ultimate.alloc_~size| (_ BitVec 32)) (|append_write~$Pointer$_#value.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |append_write~$Pointer$_#value.base| |append_#Ultimate.alloc_~size|)) (= (select |c_old(#valid)| |append_write~$Pointer$_#value.base|) (_ bv0 1)))) is different from true [2018-10-27 04:48:19,721 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:19,722 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:19,722 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-10-27 04:48:19,723 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:19,733 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-10-27 04:48:19,734 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:19,741 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:19,741 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:9 [2018-10-27 04:48:19,838 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:19,844 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 14 treesize of output 15 [2018-10-27 04:48:19,845 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-10-27 04:48:19,856 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:48:19,856 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:24 [2018-10-27 04:48:19,927 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:19,927 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:48:20,375 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:48:20,375 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-27 04:48:20,384 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:20,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:20,483 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:20,501 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:20,501 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:20,509 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:20,510 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:20,515 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:20,516 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:19, output treesize:17 [2018-10-27 04:48:20,546 WARN L854 $PredicateComparison]: unable to prove that (exists ((|append_#Ultimate.alloc_~size| (_ BitVec 32)) (|append_#Ultimate.alloc_#res.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |append_#Ultimate.alloc_#res.base| |append_#Ultimate.alloc_~size|)) (= (_ bv0 1) (select |c_old(#valid)| |append_#Ultimate.alloc_#res.base|)))) is different from true [2018-10-27 04:48:20,566 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:20,569 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-10-27 04:48:20,569 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:20,582 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:20,583 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:20,583 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-10-27 04:48:20,583 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:20,591 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:20,591 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:9 [2018-10-27 04:48:20,595 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:20,601 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 14 treesize of output 15 [2018-10-27 04:48:20,601 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-10-27 04:48:20,614 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:48:20,614 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:24 [2018-10-27 04:48:20,630 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 4 not checked. [2018-10-27 04:48:20,630 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:48:20,877 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-27 04:48:20,878 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 11 [2018-10-27 04:48:20,878 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-10-27 04:48:20,878 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-10-27 04:48:20,878 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=174, Unknown=2, NotChecked=54, Total=272 [2018-10-27 04:48:20,878 INFO L87 Difference]: Start difference. First operand 168 states and 177 transitions. Second operand 12 states. [2018-10-27 04:48:23,769 WARN L179 SmtUtils]: Spent 2.15 s on a formula simplification. DAG size of input: 52 DAG size of output: 45 [2018-10-27 04:48:25,000 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:25,000 INFO L93 Difference]: Finished difference Result 214 states and 227 transitions. [2018-10-27 04:48:25,001 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-10-27 04:48:25,001 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 45 [2018-10-27 04:48:25,001 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:25,002 INFO L225 Difference]: With dead ends: 214 [2018-10-27 04:48:25,002 INFO L226 Difference]: Without dead ends: 214 [2018-10-27 04:48:25,002 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 92 SyntacticMatches, 8 SemanticMatches, 18 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 60 ImplicationChecksByTransitivity, 3.2s TimeCoverageRelationStatistics Valid=60, Invalid=252, Unknown=2, NotChecked=66, Total=380 [2018-10-27 04:48:25,003 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states. [2018-10-27 04:48:25,005 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 207. [2018-10-27 04:48:25,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2018-10-27 04:48:25,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 224 transitions. [2018-10-27 04:48:25,006 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 224 transitions. Word has length 45 [2018-10-27 04:48:25,006 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:25,006 INFO L481 AbstractCegarLoop]: Abstraction has 207 states and 224 transitions. [2018-10-27 04:48:25,006 INFO L482 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-10-27 04:48:25,006 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 224 transitions. [2018-10-27 04:48:25,007 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-10-27 04:48:25,007 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:25,007 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:25,007 INFO L424 AbstractCegarLoop]: === Iteration 25 === [mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:25,007 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:25,007 INFO L82 PathProgramCache]: Analyzing trace with hash 80213248, now seen corresponding path program 1 times [2018-10-27 04:48:25,008 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:25,012 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/cvc4nyu Starting monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:25,039 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:25,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:25,316 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:25,320 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:25,320 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:25,332 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:25,332 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:25,337 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:25,337 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-10-27 04:48:25,377 WARN L854 $PredicateComparison]: unable to prove that (exists ((|append_#Ultimate.alloc_~size| (_ BitVec 32)) (|append_write~$Pointer$_#value.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |append_write~$Pointer$_#value.base| |append_#Ultimate.alloc_~size|)) (= (select |c_old(#valid)| |append_write~$Pointer$_#value.base|) (_ bv0 1)))) is different from true [2018-10-27 04:48:25,385 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:25,386 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-10-27 04:48:25,387 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:25,399 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:25,400 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:25,401 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 4 [2018-10-27 04:48:25,401 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:25,409 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:25,410 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:9 [2018-10-27 04:48:25,436 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:25,481 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 14 treesize of output 15 [2018-10-27 04:48:25,481 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-10-27 04:48:25,494 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:48:25,495 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:24 [2018-10-27 04:48:25,638 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:25,638 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:48:26,475 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:48:26,476 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-27 04:48:26,482 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:26,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:26,586 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:26,596 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:26,597 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:26,608 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:26,609 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:26,615 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:26,616 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:19, output treesize:17 [2018-10-27 04:48:26,718 WARN L854 $PredicateComparison]: unable to prove that (exists ((|append_#Ultimate.alloc_~size| (_ BitVec 32)) (|append_write~$Pointer$_#ptr.base| (_ BitVec 32))) (and (= (select |c_old(#valid)| |append_write~$Pointer$_#ptr.base|) (_ bv0 1)) (= |c_#length| (store |c_old(#length)| |append_write~$Pointer$_#ptr.base| |append_#Ultimate.alloc_~size|)) (= |c_#valid| (store |c_old(#valid)| |append_write~$Pointer$_#ptr.base| (_ bv1 1))))) is different from true [2018-10-27 04:48:26,723 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:26,724 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-10-27 04:48:26,725 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:26,740 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:26,741 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:26,742 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-10-27 04:48:26,742 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:26,755 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:26,756 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:33, output treesize:24 [2018-10-27 04:48:26,858 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:26,859 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:26,860 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-10-27 04:48:26,860 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:26,878 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:26,879 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:26,880 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:48:26,881 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-10-27 04:48:26,881 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:26,892 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:26,893 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:37, output treesize:16 [2018-10-27 04:48:27,104 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:27,104 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:48:27,718 WARN L179 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 50 [2018-10-27 04:48:29,177 WARN L179 SmtUtils]: Spent 150.00 ms on a formula simplification that was a NOOP. DAG size: 72 [2018-10-27 04:48:29,195 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-27 04:48:29,195 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11] total 18 [2018-10-27 04:48:29,195 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-10-27 04:48:29,195 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-10-27 04:48:29,196 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=124, Invalid=693, Unknown=3, NotChecked=110, Total=930 [2018-10-27 04:48:29,196 INFO L87 Difference]: Start difference. First operand 207 states and 224 transitions. Second operand 19 states. [2018-10-27 04:48:30,892 WARN L179 SmtUtils]: Spent 626.00 ms on a formula simplification that was a NOOP. DAG size: 27 [2018-10-27 04:48:33,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:33,873 INFO L93 Difference]: Finished difference Result 234 states and 248 transitions. [2018-10-27 04:48:33,874 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-10-27 04:48:33,874 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 48 [2018-10-27 04:48:33,875 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:33,875 INFO L225 Difference]: With dead ends: 234 [2018-10-27 04:48:33,876 INFO L226 Difference]: Without dead ends: 234 [2018-10-27 04:48:33,876 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 90 SyntacticMatches, 7 SemanticMatches, 34 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 307 ImplicationChecksByTransitivity, 5.0s TimeCoverageRelationStatistics Valid=194, Invalid=933, Unknown=3, NotChecked=130, Total=1260 [2018-10-27 04:48:33,876 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 234 states. [2018-10-27 04:48:33,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 234 to 162. [2018-10-27 04:48:33,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-10-27 04:48:33,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 171 transitions. [2018-10-27 04:48:33,880 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 171 transitions. Word has length 48 [2018-10-27 04:48:33,880 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:33,880 INFO L481 AbstractCegarLoop]: Abstraction has 162 states and 171 transitions. [2018-10-27 04:48:33,880 INFO L482 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-10-27 04:48:33,880 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 171 transitions. [2018-10-27 04:48:33,881 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-10-27 04:48:33,881 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:33,881 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:33,881 INFO L424 AbstractCegarLoop]: === Iteration 26 === [mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:33,881 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:33,881 INFO L82 PathProgramCache]: Analyzing trace with hash 1631228433, now seen corresponding path program 1 times [2018-10-27 04:48:33,882 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:33,882 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/cvc4nyu Starting monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:33,917 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:34,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:34,132 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:34,210 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:34,210 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-10-27 04:48:34,212 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-27 04:48:34,212 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-27 04:48:34,212 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-27 04:48:34,212 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-27 04:48:34,212 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-10-27 04:48:34,213 INFO L87 Difference]: Start difference. First operand 162 states and 171 transitions. Second operand 8 states. [2018-10-27 04:48:35,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:48:35,059 INFO L93 Difference]: Finished difference Result 165 states and 172 transitions. [2018-10-27 04:48:35,060 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-10-27 04:48:35,060 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 51 [2018-10-27 04:48:35,060 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:48:35,061 INFO L225 Difference]: With dead ends: 165 [2018-10-27 04:48:35,061 INFO L226 Difference]: Without dead ends: 165 [2018-10-27 04:48:35,061 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 47 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=89, Unknown=0, NotChecked=0, Total=132 [2018-10-27 04:48:35,062 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-10-27 04:48:35,064 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 161. [2018-10-27 04:48:35,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-10-27 04:48:35,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 170 transitions. [2018-10-27 04:48:35,069 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 170 transitions. Word has length 51 [2018-10-27 04:48:35,069 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:48:35,069 INFO L481 AbstractCegarLoop]: Abstraction has 161 states and 170 transitions. [2018-10-27 04:48:35,069 INFO L482 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-27 04:48:35,069 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 170 transitions. [2018-10-27 04:48:35,069 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-10-27 04:48:35,069 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:48:35,070 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:48:35,070 INFO L424 AbstractCegarLoop]: === Iteration 27 === [mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:48:35,070 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:48:35,070 INFO L82 PathProgramCache]: Analyzing trace with hash -1950672898, now seen corresponding path program 1 times [2018-10-27 04:48:35,071 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:48:35,071 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/cvc4nyu Starting monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:48:35,102 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:48:35,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:48:35,696 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:48:35,698 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:48:35,698 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:35,716 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:35,716 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:12 [2018-10-27 04:48:35,755 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:35,756 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:35,757 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-10-27 04:48:35,757 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:35,765 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:35,765 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:20, output treesize:18 [2018-10-27 04:48:35,840 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-10-27 04:48:35,842 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-10-27 04:48:35,843 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:35,846 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:35,856 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:35,857 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:28, output treesize:24 [2018-10-27 04:48:35,937 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 21 treesize of output 33 [2018-10-27 04:48:35,946 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-10-27 04:48:35,946 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:36,094 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 26 [2018-10-27 04:48:36,094 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-10-27 04:48:36,129 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:48:36,162 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:48:36,162 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:32, output treesize:37 [2018-10-27 04:48:36,210 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 20 [2018-10-27 04:48:36,212 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:48:36,213 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:36,219 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:36,294 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 47 treesize of output 52 [2018-10-27 04:48:36,318 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-10-27 04:48:36,318 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:36,420 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 35 treesize of output 34 [2018-10-27 04:48:36,420 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-10-27 04:48:36,466 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:48:36,519 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:48:36,519 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 6 variables, input treesize:71, output treesize:37 [2018-10-27 04:48:36,570 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-10-27 04:48:36,570 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:36,586 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:36,588 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:36,589 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:36,590 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 54 [2018-10-27 04:48:36,590 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:36,606 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:36,606 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:75, output treesize:51 [2018-10-27 04:48:36,702 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:36,703 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:36,704 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:36,705 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:48:36,706 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 77 [2018-10-27 04:48:36,707 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:36,754 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:36,755 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:60, output treesize:69 [2018-10-27 04:48:36,993 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 53 [2018-10-27 04:48:36,998 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-10-27 04:48:36,998 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:37,013 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:37,050 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:37,050 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:82, output treesize:78 [2018-10-27 04:48:37,211 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 56 [2018-10-27 04:48:37,263 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 23 [2018-10-27 04:48:37,264 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-10-27 04:48:37,299 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:48:37,371 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 5 dim-0 vars, and 2 xjuncts. [2018-10-27 04:48:37,371 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:91, output treesize:150 [2018-10-27 04:48:37,482 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 32 [2018-10-27 04:48:37,485 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 19 [2018-10-27 04:48:37,485 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:48:37,496 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:48:37,517 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-10-27 04:48:37,517 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:71, output treesize:48 [2018-10-27 04:48:37,583 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:48:37,583 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:48:40,427 WARN L179 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 24 [2018-10-27 04:48:44,176 WARN L179 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 26 [2018-10-27 04:48:52,463 WARN L179 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 24 [2018-10-27 04:49:09,636 WARN L179 SmtUtils]: Spent 310.00 ms on a formula simplification that was a NOOP. DAG size: 68 [2018-10-27 04:49:09,825 WARN L179 SmtUtils]: Spent 188.00 ms on a formula simplification that was a NOOP. DAG size: 48 [2018-10-27 04:49:10,050 WARN L179 SmtUtils]: Spent 224.00 ms on a formula simplification that was a NOOP. DAG size: 56 [2018-10-27 04:49:10,287 WARN L179 SmtUtils]: Spent 236.00 ms on a formula simplification that was a NOOP. DAG size: 54 [2018-10-27 04:49:10,303 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 129 treesize of output 81 [2018-10-27 04:49:10,526 WARN L179 SmtUtils]: Spent 221.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 50 [2018-10-27 04:49:10,550 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-10-27 04:49:10,550 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:49:10,653 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:49:10,747 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 56 treesize of output 75 [2018-10-27 04:49:11,017 WARN L179 SmtUtils]: Spent 267.00 ms on a formula simplification. DAG size of input: 94 DAG size of output: 75 [2018-10-27 04:49:11,152 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 45 treesize of output 55 [2018-10-27 04:49:11,169 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:49:11,174 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:49:11,202 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 63 [2018-10-27 04:49:11,203 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 3 xjuncts. [2018-10-27 04:49:11,693 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 43 treesize of output 53 [2018-10-27 04:49:11,693 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-10-27 04:49:11,840 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:49:12,042 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 59 [2018-10-27 04:49:12,080 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 22 [2018-10-27 04:49:12,080 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-10-27 04:49:12,124 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:49:12,427 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:49:12,436 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 53 [2018-10-27 04:49:12,451 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 8 [2018-10-27 04:49:12,451 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 2 xjuncts. [2018-10-27 04:49:12,491 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 33 [2018-10-27 04:49:12,556 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2018-10-27 04:49:12,556 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-10-27 04:49:12,567 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:49:12,588 INFO L267 ElimStorePlain]: Start of recursive call 10: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:49:12,592 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:49:12,600 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 51 [2018-10-27 04:49:12,626 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 33 [2018-10-27 04:49:12,682 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2018-10-27 04:49:12,682 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-10-27 04:49:12,694 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:49:12,723 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:49:12,723 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-10-27 04:49:12,738 INFO L267 ElimStorePlain]: Start of recursive call 14: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:49:13,101 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 38 [2018-10-27 04:49:13,114 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 18 [2018-10-27 04:49:13,114 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-10-27 04:49:13,130 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:49:13,142 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2018-10-27 04:49:13,163 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 28 treesize of output 26 [2018-10-27 04:49:13,163 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 2 xjuncts. [2018-10-27 04:49:13,192 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:49:13,196 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 40 [2018-10-27 04:49:13,214 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 22 [2018-10-27 04:49:13,214 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 2 xjuncts. [2018-10-27 04:49:13,242 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:49:13,315 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:49:13,358 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:49:13,414 INFO L267 ElimStorePlain]: Start of recursive call 1: 9 dim-0 vars, 1 dim-2 vars, End of recursive call: 6 dim-0 vars, and 3 xjuncts. [2018-10-27 04:49:13,415 INFO L202 ElimStorePlain]: Needed 23 recursive calls to eliminate 10 variables, input treesize:145, output treesize:86 [2018-10-27 04:49:13,544 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-27 04:49:13,544 INFO L225 ckRefinementStrategy]: Switched to mode Z3_FPBP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-27 04:49:13,550 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:49:13,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:49:13,668 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:49:13,671 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:49:13,671 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:49:13,675 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:49:13,675 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:49:13,681 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:49:13,683 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:49:13,683 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-10-27 04:49:13,684 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:49:13,694 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:49:13,694 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:20, output treesize:18 [2018-10-27 04:49:14,266 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-10-27 04:49:14,269 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-10-27 04:49:14,269 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:49:14,273 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:49:14,289 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:49:14,290 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:40, output treesize:36 [2018-10-27 04:49:14,440 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 21 treesize of output 33 [2018-10-27 04:49:14,482 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 26 [2018-10-27 04:49:14,483 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-10-27 04:49:14,566 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 17 [2018-10-27 04:49:14,566 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-10-27 04:49:14,605 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:49:14,650 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:49:14,650 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:44, output treesize:61 [2018-10-27 04:49:16,836 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 25 [2018-10-27 04:49:16,839 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:49:16,839 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:49:16,861 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:49:16,941 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 59 treesize of output 64 [2018-10-27 04:49:16,954 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 59 [2018-10-27 04:49:16,955 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:49:17,090 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 44 treesize of output 40 [2018-10-27 04:49:17,091 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-10-27 04:49:17,324 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:49:17,396 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:49:17,397 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 6 variables, input treesize:88, output treesize:71 [2018-10-27 04:49:17,530 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:49:17,531 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:49:17,532 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:49:17,533 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 69 [2018-10-27 04:49:17,533 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:49:17,569 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:49:17,569 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:92, output treesize:53 [2018-10-27 04:49:17,656 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:49:17,657 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:49:17,658 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:49:17,660 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:49:17,661 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 77 [2018-10-27 04:49:17,661 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:49:17,686 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:49:17,686 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:60, output treesize:69 [2018-10-27 04:49:18,002 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 47 [2018-10-27 04:49:18,009 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:49:18,009 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:49:18,025 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:49:18,060 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:49:18,060 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:76, output treesize:65 [2018-10-27 04:49:18,218 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 47 [2018-10-27 04:49:18,223 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:49:18,223 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:49:18,240 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:49:18,276 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-10-27 04:49:18,276 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:80, output treesize:69 [2018-10-27 04:49:18,342 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 32 [2018-10-27 04:49:18,345 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 19 [2018-10-27 04:49:18,346 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:49:18,355 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:49:18,377 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-10-27 04:49:18,377 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:71, output treesize:48 [2018-10-27 04:49:18,390 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:49:18,390 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:49:35,191 WARN L179 SmtUtils]: Spent 1.61 s on a formula simplification that was a NOOP. DAG size: 26 [2018-10-27 04:49:48,143 WARN L179 SmtUtils]: Spent 316.00 ms on a formula simplification that was a NOOP. DAG size: 70 [2018-10-27 04:49:48,369 WARN L179 SmtUtils]: Spent 225.00 ms on a formula simplification that was a NOOP. DAG size: 53 [2018-10-27 04:49:48,696 WARN L179 SmtUtils]: Spent 326.00 ms on a formula simplification that was a NOOP. DAG size: 61 [2018-10-27 04:49:49,000 WARN L179 SmtUtils]: Spent 303.00 ms on a formula simplification that was a NOOP. DAG size: 59 [2018-10-27 04:49:49,015 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 64 [2018-10-27 04:49:49,141 WARN L179 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 49 [2018-10-27 04:49:49,149 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-10-27 04:49:49,149 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:49:49,187 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:49:49,188 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:49:49,189 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 68 [2018-10-27 04:49:49,393 INFO L477 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 5 case distinctions, treesize of input 33 treesize of output 63 [2018-10-27 04:49:50,604 WARN L179 SmtUtils]: Spent 1.21 s on a formula simplification. DAG size of input: 123 DAG size of output: 116 [2018-10-27 04:49:50,617 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:49:50,660 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 40 treesize of output 52 [2018-10-27 04:49:50,661 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 3 xjuncts. [2018-10-27 04:49:51,641 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:49:51,647 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:49:51,651 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 33 [2018-10-27 04:49:51,651 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-10-27 04:49:53,307 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 40 [2018-10-27 04:49:53,308 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-10-27 04:49:53,662 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 22 treesize of output 32 [2018-10-27 04:49:53,662 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-10-27 04:49:54,985 INFO L267 ElimStorePlain]: Start of recursive call 5: 4 dim-0 vars, 7 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:49:55,186 INFO L477 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 5 case distinctions, treesize of input 57 treesize of output 84 [2018-10-27 04:49:56,770 WARN L179 SmtUtils]: Spent 1.58 s on a formula simplification. DAG size of input: 164 DAG size of output: 160 [2018-10-27 04:49:56,786 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:49:56,791 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 63 [2018-10-27 04:49:56,791 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-10-27 04:49:56,811 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:49:56,812 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:49:56,817 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 66 [2018-10-27 04:49:56,817 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-10-27 04:49:56,836 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:49:56,837 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 51 [2018-10-27 04:49:56,838 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-10-27 04:49:57,659 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:49:57,667 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:49:57,702 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 52 treesize of output 66 [2018-10-27 04:49:57,703 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 3 xjuncts. [2018-10-27 04:49:58,741 INFO L303 Elim1Store]: Index analysis took 118 ms [2018-10-27 04:49:58,742 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 63 [2018-10-27 04:49:58,742 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-10-27 04:49:59,322 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 46 treesize of output 55 [2018-10-27 04:49:59,323 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 2 xjuncts. [2018-10-27 04:50:00,673 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:50:00,686 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:50:00,766 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 68 [2018-10-27 04:50:00,767 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 3 xjuncts. [2018-10-27 04:50:01,318 INFO L267 ElimStorePlain]: Start of recursive call 10: 4 dim-0 vars, 7 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:50:01,426 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 36 [2018-10-27 04:50:01,444 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 22 [2018-10-27 04:50:01,444 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 2 xjuncts. [2018-10-27 04:50:01,491 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:50:01,498 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 34 [2018-10-27 04:50:01,504 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 18 [2018-10-27 04:50:01,504 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:01,522 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:50:01,527 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 36 [2018-10-27 04:50:01,544 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 22 [2018-10-27 04:50:01,544 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 2 xjuncts. [2018-10-27 04:50:01,580 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:50:01,630 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:50:01,664 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:50:01,713 INFO L267 ElimStorePlain]: Start of recursive call 1: 10 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-10-27 04:50:01,713 INFO L202 ElimStorePlain]: Needed 23 recursive calls to eliminate 11 variables, input treesize:123, output treesize:69 [2018-10-27 04:50:05,933 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-27 04:50:05,933 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 21] total 30 [2018-10-27 04:50:05,933 INFO L460 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-10-27 04:50:05,934 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-10-27 04:50:05,934 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=169, Invalid=1878, Unknown=23, NotChecked=0, Total=2070 [2018-10-27 04:50:05,934 INFO L87 Difference]: Start difference. First operand 161 states and 170 transitions. Second operand 31 states. [2018-10-27 04:50:08,298 WARN L179 SmtUtils]: Spent 152.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 47 [2018-10-27 04:50:08,823 WARN L179 SmtUtils]: Spent 230.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 52 [2018-10-27 04:50:09,651 WARN L179 SmtUtils]: Spent 417.00 ms on a formula simplification that was a NOOP. DAG size: 32 [2018-10-27 04:50:10,614 WARN L179 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 51 [2018-10-27 04:50:11,072 WARN L179 SmtUtils]: Spent 216.00 ms on a formula simplification. DAG size of input: 103 DAG size of output: 67 [2018-10-27 04:50:11,412 WARN L179 SmtUtils]: Spent 186.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 67 [2018-10-27 04:50:11,982 WARN L179 SmtUtils]: Spent 173.00 ms on a formula simplification. DAG size of input: 66 DAG size of output: 58 [2018-10-27 04:50:12,307 WARN L179 SmtUtils]: Spent 172.00 ms on a formula simplification. DAG size of input: 108 DAG size of output: 70 [2018-10-27 04:50:13,051 WARN L179 SmtUtils]: Spent 330.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 69 [2018-10-27 04:50:14,284 WARN L179 SmtUtils]: Spent 617.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 75 [2018-10-27 04:50:16,029 WARN L179 SmtUtils]: Spent 344.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 70 [2018-10-27 04:50:16,870 WARN L179 SmtUtils]: Spent 206.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 47 [2018-10-27 04:50:18,232 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-27 04:50:18,232 INFO L93 Difference]: Finished difference Result 198 states and 208 transitions. [2018-10-27 04:50:18,234 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-10-27 04:50:18,234 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 54 [2018-10-27 04:50:18,234 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-27 04:50:18,235 INFO L225 Difference]: With dead ends: 198 [2018-10-27 04:50:18,235 INFO L226 Difference]: Without dead ends: 198 [2018-10-27 04:50:18,236 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 96 SyntacticMatches, 6 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1039 ImplicationChecksByTransitivity, 75.7s TimeCoverageRelationStatistics Valid=488, Invalid=3649, Unknown=23, NotChecked=0, Total=4160 [2018-10-27 04:50:18,236 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 198 states. [2018-10-27 04:50:18,238 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 198 to 161. [2018-10-27 04:50:18,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-10-27 04:50:18,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 169 transitions. [2018-10-27 04:50:18,239 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 169 transitions. Word has length 54 [2018-10-27 04:50:18,239 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-27 04:50:18,239 INFO L481 AbstractCegarLoop]: Abstraction has 161 states and 169 transitions. [2018-10-27 04:50:18,239 INFO L482 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-10-27 04:50:18,239 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 169 transitions. [2018-10-27 04:50:18,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-10-27 04:50:18,240 INFO L367 BasicCegarLoop]: Found error trace [2018-10-27 04:50:18,240 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-27 04:50:18,240 INFO L424 AbstractCegarLoop]: === Iteration 28 === [mainErr22ASSERT_VIOLATIONMEMORY_FREE, mainErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr25ASSERT_VIOLATIONMEMORY_FREE, mainErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr15ASSERT_VIOLATIONMEMORY_FREE, mainErr27ASSERT_VIOLATIONMEMORY_FREE, mainErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr26ASSERT_VIOLATIONMEMORY_FREE, mainErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr23ASSERT_VIOLATIONMEMORY_FREE, mainErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr14ASSERT_VIOLATIONMEMORY_FREE, mainErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr24ASSERT_VIOLATIONMEMORY_FREE, mainErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr28ENSURES_VIOLATIONMEMORY_LEAK, mainErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, mainErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr16ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr3ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr25ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr18ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr9ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr11ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr12ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr13ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr20ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr6ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr21ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr19ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr23ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr10ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr17ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr8ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr24ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr14ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr22ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr15ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr7ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr4ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr5ASSERT_VIOLATIONMEMORY_DEREFERENCE, appendErr2ASSERT_VIOLATIONMEMORY_DEREFERENCE]=== [2018-10-27 04:50:18,241 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-27 04:50:18,241 INFO L82 PathProgramCache]: Analyzing trace with hash -341317482, now seen corresponding path program 1 times [2018-10-27 04:50:18,241 INFO L225 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-10-27 04:50:18,241 INFO L69 tionRefinementEngine]: Using refinement strategy WalrusRefinementStrategy No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_058f5044-2e8c-400f-88ba-a85b38f193dc/bin-2019/utaipan/cvc4nyu Starting monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:50:18,268 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-27 04:50:18,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-27 04:50:18,831 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-27 04:50:18,880 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:50:18,881 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:18,961 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:50:18,961 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-10-27 04:50:19,104 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:50:19,136 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:50:19,137 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-10-27 04:50:19,137 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:19,292 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:50:19,292 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:20, output treesize:18 [2018-10-27 04:50:19,486 WARN L179 SmtUtils]: Spent 137.00 ms on a formula simplification that was a NOOP. DAG size: 16 [2018-10-27 04:50:19,668 WARN L179 SmtUtils]: Spent 104.00 ms on a formula simplification that was a NOOP. DAG size: 18 [2018-10-27 04:50:19,710 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-10-27 04:50:19,710 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:19,724 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:50:19,724 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:27, output treesize:26 [2018-10-27 04:50:19,795 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-10-27 04:50:19,798 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-10-27 04:50:19,798 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:19,802 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:50:19,826 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-10-27 04:50:19,829 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-10-27 04:50:19,829 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:19,833 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:50:19,852 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:50:19,852 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:46, output treesize:38 [2018-10-27 04:50:19,944 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 21 treesize of output 33 [2018-10-27 04:50:19,948 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-10-27 04:50:19,948 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:20,062 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 26 [2018-10-27 04:50:20,063 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-10-27 04:50:20,118 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:50:20,212 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 21 treesize of output 33 [2018-10-27 04:50:20,216 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-10-27 04:50:20,216 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:20,318 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 26 [2018-10-27 04:50:20,318 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-10-27 04:50:20,356 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:50:20,431 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-10-27 04:50:20,431 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 5 variables, input treesize:59, output treesize:122 [2018-10-27 04:50:20,585 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 92 treesize of output 110 [2018-10-27 04:50:20,658 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 90 treesize of output 103 [2018-10-27 04:50:20,658 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-10-27 04:50:20,803 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 82 [2018-10-27 04:50:20,803 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:20,902 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:50:21,218 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 36 [2018-10-27 04:50:21,221 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:50:21,221 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:21,235 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:50:21,425 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 62 [2018-10-27 04:50:21,431 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 38 [2018-10-27 04:50:21,431 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:21,450 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:50:21,497 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 82 treesize of output 83 [2018-10-27 04:50:21,514 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 82 [2018-10-27 04:50:21,515 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:21,714 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 66 treesize of output 57 [2018-10-27 04:50:21,714 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 2 xjuncts. [2018-10-27 04:50:21,812 INFO L267 ElimStorePlain]: Start of recursive call 9: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:50:21,957 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 32 [2018-10-27 04:50:21,960 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:50:21,960 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:21,973 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:50:22,077 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 4 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:50:22,078 INFO L202 ElimStorePlain]: Needed 13 recursive calls to eliminate 10 variables, input treesize:132, output treesize:83 [2018-10-27 04:50:22,154 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-10-27 04:50:22,154 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:22,180 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:50:22,182 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:50:22,184 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:50:22,185 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 54 [2018-10-27 04:50:22,185 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:22,208 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:50:22,209 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:102, output treesize:73 [2018-10-27 04:50:22,340 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:50:22,342 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-10-27 04:50:22,343 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:22,379 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:50:22,380 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:50:22,382 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:50:22,383 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:50:22,387 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 37 [2018-10-27 04:50:22,387 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:22,417 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:50:22,417 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:76, output treesize:40 [2018-10-27 04:50:22,615 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 26 [2018-10-27 04:50:22,619 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-10-27 04:50:22,620 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:22,629 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:50:22,666 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 40 [2018-10-27 04:50:22,670 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:50:22,670 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:22,684 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:50:22,711 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-10-27 04:50:22,711 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:70, output treesize:55 [2018-10-27 04:50:22,803 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 29 [2018-10-27 04:50:22,823 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 23 [2018-10-27 04:50:22,824 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-10-27 04:50:22,852 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:50:22,926 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 40 [2018-10-27 04:50:22,932 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-10-27 04:50:22,932 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:22,950 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:50:23,006 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-10-27 04:50:23,006 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 7 variables, input treesize:77, output treesize:88 [2018-10-27 04:50:23,086 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-10-27 04:50:23,089 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-10-27 04:50:23,089 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:23,093 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:50:23,104 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-10-27 04:50:23,106 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-10-27 04:50:23,106 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:23,111 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:50:23,119 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:50:23,119 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:44, output treesize:14 [2018-10-27 04:50:23,175 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-27 04:50:23,176 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-10-27 04:50:24,100 WARN L179 SmtUtils]: Spent 169.00 ms on a formula simplification that was a NOOP. DAG size: 48 [2018-10-27 04:50:28,670 WARN L179 SmtUtils]: Spent 923.00 ms on a formula simplification that was a NOOP. DAG size: 66 [2018-10-27 04:50:29,733 WARN L179 SmtUtils]: Spent 263.00 ms on a formula simplification that was a NOOP. DAG size: 60 [2018-10-27 04:50:35,105 WARN L179 SmtUtils]: Spent 762.00 ms on a formula simplification that was a NOOP. DAG size: 58 [2018-10-27 04:50:39,821 WARN L179 SmtUtils]: Spent 524.00 ms on a formula simplification that was a NOOP. DAG size: 78 [2018-10-27 04:50:42,212 WARN L179 SmtUtils]: Spent 694.00 ms on a formula simplification that was a NOOP. DAG size: 78 [2018-10-27 04:50:43,639 WARN L179 SmtUtils]: Spent 1.42 s on a formula simplification that was a NOOP. DAG size: 104 [2018-10-27 04:50:44,895 WARN L179 SmtUtils]: Spent 1.25 s on a formula simplification that was a NOOP. DAG size: 78 [2018-10-27 04:50:46,275 WARN L179 SmtUtils]: Spent 1.38 s on a formula simplification that was a NOOP. DAG size: 86 [2018-10-27 04:50:47,479 WARN L179 SmtUtils]: Spent 1.20 s on a formula simplification that was a NOOP. DAG size: 84 [2018-10-27 04:50:47,504 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 224 treesize of output 227 [2018-10-27 04:50:47,687 WARN L179 SmtUtils]: Spent 182.00 ms on a formula simplification that was a NOOP. DAG size: 73 [2018-10-27 04:50:47,701 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 83 [2018-10-27 04:50:47,701 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:47,798 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 209 treesize of output 209 [2018-10-27 04:50:47,799 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-10-27 04:50:48,044 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 5 xjuncts. [2018-10-27 04:50:50,885 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 255 treesize of output 146 [2018-10-27 04:50:51,434 WARN L179 SmtUtils]: Spent 547.00 ms on a formula simplification. DAG size of input: 84 DAG size of output: 47 [2018-10-27 04:50:51,444 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-10-27 04:50:51,445 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:51,535 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:50:51,642 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 86 treesize of output 92 [2018-10-27 04:50:52,322 WARN L179 SmtUtils]: Spent 678.00 ms on a formula simplification. DAG size of input: 94 DAG size of output: 75 [2018-10-27 04:50:52,328 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 76 [2018-10-27 04:50:52,350 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 22 [2018-10-27 04:50:52,351 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-10-27 04:50:52,403 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:50:52,813 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 44 treesize of output 54 [2018-10-27 04:50:53,199 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 45 treesize of output 55 [2018-10-27 04:50:53,199 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 2 xjuncts. [2018-10-27 04:50:53,346 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:50:53,355 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:50:53,422 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 47 treesize of output 68 [2018-10-27 04:50:53,423 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 3 xjuncts. [2018-10-27 04:50:53,954 INFO L267 ElimStorePlain]: Start of recursive call 10: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:50:54,515 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:50:54,524 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 61 [2018-10-27 04:50:54,533 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 36 [2018-10-27 04:50:54,612 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2018-10-27 04:50:54,612 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:54,625 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:50:54,646 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:50:55,156 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 40 [2018-10-27 04:50:55,193 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 18 [2018-10-27 04:50:55,193 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 2 xjuncts. [2018-10-27 04:50:55,244 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:50:55,253 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 40 [2018-10-27 04:50:55,294 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 18 [2018-10-27 04:50:55,295 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 2 xjuncts. [2018-10-27 04:50:55,340 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:50:55,357 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2018-10-27 04:50:55,386 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 14 [2018-10-27 04:50:55,387 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:55,416 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:50:55,542 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:50:55,723 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:50:57,531 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 301 treesize of output 232 [2018-10-27 04:50:57,826 WARN L179 SmtUtils]: Spent 293.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 67 [2018-10-27 04:50:57,850 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-10-27 04:50:57,850 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-10-27 04:50:58,007 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:50:58,079 INFO L303 Elim1Store]: Index analysis took 122 ms [2018-10-27 04:50:58,139 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 73 treesize of output 83 [2018-10-27 04:50:58,486 WARN L179 SmtUtils]: Spent 345.00 ms on a formula simplification. DAG size of input: 90 DAG size of output: 70 [2018-10-27 04:50:58,572 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 46 treesize of output 56 [2018-10-27 04:50:58,622 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:50:58,631 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:50:58,668 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 49 treesize of output 64 [2018-10-27 04:50:58,669 INFO L267 ElimStorePlain]: Start of recursive call 26: End of recursive call: and 3 xjuncts. [2018-10-27 04:50:59,142 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 44 treesize of output 50 [2018-10-27 04:50:59,142 INFO L267 ElimStorePlain]: Start of recursive call 27: End of recursive call: and 2 xjuncts. [2018-10-27 04:50:59,400 INFO L267 ElimStorePlain]: Start of recursive call 25: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:50:59,809 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 60 [2018-10-27 04:50:59,834 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 22 [2018-10-27 04:50:59,834 INFO L267 ElimStorePlain]: Start of recursive call 29: End of recursive call: and 2 xjuncts. [2018-10-27 04:50:59,934 INFO L267 ElimStorePlain]: Start of recursive call 28: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:51:00,430 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:51:00,440 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 52 [2018-10-27 04:51:00,608 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 35 treesize of output 42 [2018-10-27 04:51:00,783 WARN L179 SmtUtils]: Spent 174.00 ms on a formula simplification. DAG size of input: 39 DAG size of output: 36 [2018-10-27 04:51:00,798 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-10-27 04:51:00,798 INFO L267 ElimStorePlain]: Start of recursive call 32: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:00,829 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 19 [2018-10-27 04:51:00,829 INFO L267 ElimStorePlain]: Start of recursive call 33: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:00,850 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 18 [2018-10-27 04:51:00,851 INFO L267 ElimStorePlain]: Start of recursive call 34: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:01,087 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 23 [2018-10-27 04:51:01,088 INFO L267 ElimStorePlain]: Start of recursive call 35: End of recursive call: and 2 xjuncts. [2018-10-27 04:51:01,201 INFO L267 ElimStorePlain]: Start of recursive call 31: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:51:01,371 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:01,371 INFO L267 ElimStorePlain]: Start of recursive call 36: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:01,463 INFO L267 ElimStorePlain]: Start of recursive call 30: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:51:01,468 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:51:01,476 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 54 [2018-10-27 04:51:01,532 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 35 treesize of output 42 [2018-10-27 04:51:01,687 WARN L179 SmtUtils]: Spent 153.00 ms on a formula simplification. DAG size of input: 40 DAG size of output: 36 [2018-10-27 04:51:01,696 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 18 [2018-10-27 04:51:01,696 INFO L267 ElimStorePlain]: Start of recursive call 39: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:01,715 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-10-27 04:51:01,715 INFO L267 ElimStorePlain]: Start of recursive call 40: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:01,727 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 19 [2018-10-27 04:51:01,727 INFO L267 ElimStorePlain]: Start of recursive call 41: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:01,881 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 23 [2018-10-27 04:51:01,881 INFO L267 ElimStorePlain]: Start of recursive call 42: End of recursive call: and 2 xjuncts. [2018-10-27 04:51:01,970 INFO L267 ElimStorePlain]: Start of recursive call 38: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:51:02,111 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 8 [2018-10-27 04:51:02,111 INFO L267 ElimStorePlain]: Start of recursive call 43: End of recursive call: and 2 xjuncts. [2018-10-27 04:51:02,225 INFO L267 ElimStorePlain]: Start of recursive call 37: 2 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-10-27 04:51:07,065 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2018-10-27 04:51:07,116 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 27 treesize of output 21 [2018-10-27 04:51:07,117 INFO L267 ElimStorePlain]: Start of recursive call 45: End of recursive call: and 2 xjuncts. [2018-10-27 04:51:07,235 INFO L267 ElimStorePlain]: Start of recursive call 44: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:51:07,248 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 35 [2018-10-27 04:51:07,277 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:51:07,278 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2018-10-27 04:51:07,279 INFO L267 ElimStorePlain]: Start of recursive call 47: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:07,338 INFO L267 ElimStorePlain]: Start of recursive call 46: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:51:07,350 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2018-10-27 04:51:07,422 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 27 treesize of output 21 [2018-10-27 04:51:07,422 INFO L267 ElimStorePlain]: Start of recursive call 49: End of recursive call: and 2 xjuncts. [2018-10-27 04:51:07,557 INFO L267 ElimStorePlain]: Start of recursive call 48: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:51:07,885 INFO L267 ElimStorePlain]: Start of recursive call 24: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-10-27 04:51:08,106 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-10-27 04:51:08,131 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 340 treesize of output 311 [2018-10-27 04:51:08,453 WARN L179 SmtUtils]: Spent 321.00 ms on a formula simplification. DAG size of input: 78 DAG size of output: 68 [2018-10-27 04:51:08,471 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-10-27 04:51:08,471 INFO L267 ElimStorePlain]: Start of recursive call 51: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:08,625 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:51:08,714 INFO L303 Elim1Store]: Index analysis took 138 ms [2018-10-27 04:51:08,764 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 42 treesize of output 63 [2018-10-27 04:51:09,016 WARN L179 SmtUtils]: Spent 250.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 67 [2018-10-27 04:51:09,022 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 48 [2018-10-27 04:51:09,046 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 22 [2018-10-27 04:51:09,046 INFO L267 ElimStorePlain]: Start of recursive call 54: End of recursive call: and 2 xjuncts. [2018-10-27 04:51:09,139 INFO L267 ElimStorePlain]: Start of recursive call 53: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:51:09,501 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 34 treesize of output 44 [2018-10-27 04:51:09,557 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 35 treesize of output 41 [2018-10-27 04:51:09,558 INFO L267 ElimStorePlain]: Start of recursive call 56: End of recursive call: and 2 xjuncts. [2018-10-27 04:51:09,801 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:51:09,818 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:51:09,847 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 37 treesize of output 52 [2018-10-27 04:51:09,847 INFO L267 ElimStorePlain]: Start of recursive call 57: End of recursive call: and 3 xjuncts. [2018-10-27 04:51:10,098 INFO L267 ElimStorePlain]: Start of recursive call 55: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-10-27 04:51:10,499 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:51:10,513 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 39 [2018-10-27 04:51:10,520 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-10-27 04:51:10,521 INFO L267 ElimStorePlain]: Start of recursive call 59: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:10,613 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 22 treesize of output 32 [2018-10-27 04:51:10,722 WARN L179 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 32 DAG size of output: 31 [2018-10-27 04:51:10,743 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 20 [2018-10-27 04:51:10,743 INFO L267 ElimStorePlain]: Start of recursive call 61: End of recursive call: and 2 xjuncts. [2018-10-27 04:51:11,066 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 13 [2018-10-27 04:51:11,067 INFO L267 ElimStorePlain]: Start of recursive call 62: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:11,074 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 15 [2018-10-27 04:51:11,074 INFO L267 ElimStorePlain]: Start of recursive call 63: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:11,157 INFO L267 ElimStorePlain]: Start of recursive call 60: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:51:11,270 INFO L267 ElimStorePlain]: Start of recursive call 58: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:51:11,277 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:51:11,290 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 41 [2018-10-27 04:51:11,351 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 22 treesize of output 32 [2018-10-27 04:51:11,466 WARN L179 SmtUtils]: Spent 114.00 ms on a formula simplification. DAG size of input: 32 DAG size of output: 31 [2018-10-27 04:51:11,475 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 13 [2018-10-27 04:51:11,476 INFO L267 ElimStorePlain]: Start of recursive call 66: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:11,485 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 15 [2018-10-27 04:51:11,485 INFO L267 ElimStorePlain]: Start of recursive call 67: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:11,494 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 16 [2018-10-27 04:51:11,495 INFO L267 ElimStorePlain]: Start of recursive call 68: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:11,641 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 20 [2018-10-27 04:51:11,641 INFO L267 ElimStorePlain]: Start of recursive call 69: End of recursive call: and 2 xjuncts. [2018-10-27 04:51:11,720 INFO L267 ElimStorePlain]: Start of recursive call 65: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:51:11,846 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 8 [2018-10-27 04:51:11,846 INFO L267 ElimStorePlain]: Start of recursive call 70: End of recursive call: and 2 xjuncts. [2018-10-27 04:51:11,975 INFO L267 ElimStorePlain]: Start of recursive call 64: 2 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-10-27 04:51:13,753 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 30 [2018-10-27 04:51:13,823 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 20 treesize of output 18 [2018-10-27 04:51:13,823 INFO L267 ElimStorePlain]: Start of recursive call 72: End of recursive call: and 2 xjuncts. [2018-10-27 04:51:13,935 INFO L267 ElimStorePlain]: Start of recursive call 71: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:51:13,945 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 28 [2018-10-27 04:51:13,957 INFO L700 Elim1Store]: detected not equals via solver [2018-10-27 04:51:13,959 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2018-10-27 04:51:13,959 INFO L267 ElimStorePlain]: Start of recursive call 74: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:14,009 INFO L267 ElimStorePlain]: Start of recursive call 73: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-10-27 04:51:14,020 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 30 [2018-10-27 04:51:14,067 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 20 treesize of output 18 [2018-10-27 04:51:14,067 INFO L267 ElimStorePlain]: Start of recursive call 76: End of recursive call: and 2 xjuncts. [2018-10-27 04:51:14,144 INFO L267 ElimStorePlain]: Start of recursive call 75: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:51:14,419 INFO L267 ElimStorePlain]: Start of recursive call 52: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 5 xjuncts. [2018-10-27 04:51:14,766 INFO L267 ElimStorePlain]: Start of recursive call 50: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-10-27 04:51:14,801 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 219 treesize of output 190 [2018-10-27 04:51:15,033 WARN L179 SmtUtils]: Spent 231.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 65 [2018-10-27 04:51:15,047 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-10-27 04:51:15,047 INFO L267 ElimStorePlain]: Start of recursive call 78: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:15,184 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:51:15,276 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 42 treesize of output 63 [2018-10-27 04:51:15,567 WARN L179 SmtUtils]: Spent 288.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 68 [2018-10-27 04:51:15,646 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 37 treesize of output 47 [2018-10-27 04:51:15,880 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 5 case distinctions, treesize of input 40 treesize of output 65 [2018-10-27 04:51:15,880 INFO L267 ElimStorePlain]: Start of recursive call 81: End of recursive call: and 8 xjuncts. [2018-10-27 04:51:16,545 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 29 treesize of output 35 [2018-10-27 04:51:16,546 INFO L267 ElimStorePlain]: Start of recursive call 82: End of recursive call: and 2 xjuncts. [2018-10-27 04:51:16,664 INFO L267 ElimStorePlain]: Start of recursive call 80: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:51:17,009 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 44 [2018-10-27 04:51:17,052 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 22 [2018-10-27 04:51:17,052 INFO L267 ElimStorePlain]: Start of recursive call 84: End of recursive call: and 2 xjuncts. [2018-10-27 04:51:17,133 INFO L267 ElimStorePlain]: Start of recursive call 83: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-10-27 04:51:17,475 INFO L682 Elim1Store]: detected equality via solver [2018-10-27 04:51:17,534 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 40 treesize of output 51 [2018-10-27 04:51:17,544 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 41 [2018-10-27 04:51:17,637 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 14 treesize of output 14 [2018-10-27 04:51:17,638 INFO L267 ElimStorePlain]: Start of recursive call 87: End of recursive call: and 2 xjuncts. [2018-10-27 04:51:17,648 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 6 [2018-10-27 04:51:17,648 INFO L267 ElimStorePlain]: Start of recursive call 88: End of recursive call: and 1 xjuncts. [2018-10-27 04:51:17,825 INFO L267 ElimStorePlain]: Start of recursive call 86: 1 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-10-27 04:51:18,650 WARN L522 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 34 cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-10-27 04:51:18,651 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: var is still there: v_prenex_179 term size 41 at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:221) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.elimAllRec(ElimStorePlain.java:199) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.elim(PartialQuantifierElimination.java:293) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.tryToEliminate(PartialQuantifierElimination.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer$QuantifierEliminationPostprocessor.postprocess(IterativePredicateTransformer.java:245) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:439) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:383) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:290) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:330) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:175) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:162) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructForwardBackward(TraceCheckConstructor.java:224) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructTraceCheck(TraceCheckConstructor.java:188) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:165) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.MultiTrackRefinementStrategy.getTraceCheck(MultiTrackRefinementStrategy.java:234) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:223) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:197) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:70) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:429) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:435) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:376) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:312) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:123) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:316) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-10-27 04:51:18,654 INFO L168 Benchmark]: Toolchain (without parser) took 240635.57 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 302.5 MB). Free memory was 949.2 MB in the beginning and 1.3 GB in the end (delta: -329.6 MB). Peak memory consumption was 479.7 MB. Max. memory is 11.5 GB. [2018-10-27 04:51:18,654 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-10-27 04:51:18,655 INFO L168 Benchmark]: CACSL2BoogieTranslator took 421.74 ms. Allocated memory is still 1.0 GB. Free memory was 947.9 MB in the beginning and 926.4 MB in the end (delta: 21.5 MB). Peak memory consumption was 21.5 MB. Max. memory is 11.5 GB. [2018-10-27 04:51:18,655 INFO L168 Benchmark]: Boogie Procedure Inliner took 66.25 ms. Allocated memory is still 1.0 GB. Free memory was 926.4 MB in the beginning and 921.0 MB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2018-10-27 04:51:18,655 INFO L168 Benchmark]: Boogie Preprocessor took 106.03 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 129.0 MB). Free memory was 921.0 MB in the beginning and 1.1 GB in the end (delta: -193.2 MB). Peak memory consumption was 17.8 MB. Max. memory is 11.5 GB. [2018-10-27 04:51:18,655 INFO L168 Benchmark]: RCFGBuilder took 1161.95 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 51.5 MB). Peak memory consumption was 51.5 MB. Max. memory is 11.5 GB. [2018-10-27 04:51:18,656 INFO L168 Benchmark]: TraceAbstraction took 238873.85 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 173.5 MB). Free memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: -216.0 MB). Peak memory consumption was 464.3 MB. Max. memory is 11.5 GB. [2018-10-27 04:51:18,669 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 978.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 421.74 ms. Allocated memory is still 1.0 GB. Free memory was 947.9 MB in the beginning and 926.4 MB in the end (delta: 21.5 MB). Peak memory consumption was 21.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 66.25 ms. Allocated memory is still 1.0 GB. Free memory was 926.4 MB in the beginning and 921.0 MB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 106.03 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 129.0 MB). Free memory was 921.0 MB in the beginning and 1.1 GB in the end (delta: -193.2 MB). Peak memory consumption was 17.8 MB. Max. memory is 11.5 GB. * RCFGBuilder took 1161.95 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 51.5 MB). Peak memory consumption was 51.5 MB. Max. memory is 11.5 GB. * TraceAbstraction took 238873.85 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 173.5 MB). Free memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: -216.0 MB). Peak memory consumption was 464.3 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: AssertionError: var is still there: v_prenex_179 term size 41 de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: var is still there: v_prenex_179 term size 41: de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request...